1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2014-2015 Hisilicon Limited. 4 */ 5 6 #ifndef __HNAE_H 7 #define __HNAE_H 8 9 /* Names used in this framework: 10 * ae handle (handle): 11 * a set of queues provided by AE 12 * ring buffer queue (rbq): 13 * the channel between upper layer and the AE, can do tx and rx 14 * ring: 15 * a tx or rx channel within a rbq 16 * ring description (desc): 17 * an element in the ring with packet information 18 * buffer: 19 * a memory region referred by desc with the full packet payload 20 * 21 * "num" means a static number set as a parameter, "count" mean a dynamic 22 * number set while running 23 * "cb" means control block 24 */ 25 26 #include <linux/acpi.h> 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/module.h> 30 #include <linux/netdevice.h> 31 #include <linux/notifier.h> 32 #include <linux/phy.h> 33 #include <linux/types.h> 34 35 #define HNAE_DRIVER_VERSION "2.0" 36 #define HNAE_DRIVER_NAME "hns" 37 #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation." 38 #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver" 39 #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem" 40 41 #ifdef DEBUG 42 43 #ifndef assert 44 #define assert(expr) \ 45 do { \ 46 if (!(expr)) { \ 47 pr_err("Assertion failed! %s, %s, %s, line %d\n", \ 48 #expr, __FILE__, __func__, __LINE__); \ 49 } \ 50 } while (0) 51 #endif 52 53 #else 54 55 #ifndef assert 56 #define assert(expr) 57 #endif 58 59 #endif 60 61 #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0') 62 #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0') 63 #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1) 64 #define AE_NAME_SIZE 16 65 66 #define BD_SIZE_2048_MAX_MTU 6000 67 68 /* some said the RX and TX RCB format should not be the same in the future. But 69 * it is the same now... 70 */ 71 #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */ 72 #define RCB_REG_BASEADDR_H 0x04 73 #define RCB_REG_BD_NUM 0x08 74 #define RCB_REG_BD_LEN 0x0C 75 #define RCB_REG_PKTLINE 0x10 76 #define RCB_REG_TAIL 0x18 77 #define RCB_REG_HEAD 0x1C 78 #define RCB_REG_FBDNUM 0x20 79 #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */ 80 #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */ 81 82 #define HNS_RX_HEAD_SIZE 256 83 84 #define HNAE_AE_REGISTER 0x1 85 86 #define RCB_RING_NAME_LEN (IFNAMSIZ + 4) 87 88 #define HNAE_LOWEST_LATENCY_COAL_PARAM 30 89 #define HNAE_LOW_LATENCY_COAL_PARAM 80 90 #define HNAE_BULK_LATENCY_COAL_PARAM 150 91 92 enum hnae_led_state { 93 HNAE_LED_INACTIVE, 94 HNAE_LED_ACTIVE, 95 HNAE_LED_ON, 96 HNAE_LED_OFF 97 }; 98 99 #define HNS_RX_FLAG_VLAN_PRESENT 0x1 100 #define HNS_RX_FLAG_L3ID_IPV4 0x0 101 #define HNS_RX_FLAG_L3ID_IPV6 0x1 102 #define HNS_RX_FLAG_L4ID_UDP 0x0 103 #define HNS_RX_FLAG_L4ID_TCP 0x1 104 #define HNS_RX_FLAG_L4ID_SCTP 0x3 105 106 #define HNS_TXD_ASID_S 0 107 #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S) 108 #define HNS_TXD_BUFNUM_S 8 109 #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S) 110 #define HNS_TXD_PORTID_S 10 111 #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S) 112 113 #define HNS_TXD_RA_B 8 114 #define HNS_TXD_RI_B 9 115 #define HNS_TXD_L4CS_B 10 116 #define HNS_TXD_L3CS_B 11 117 #define HNS_TXD_FE_B 12 118 #define HNS_TXD_VLD_B 13 119 #define HNS_TXD_IPOFFSET_S 14 120 #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 121 122 #define HNS_RXD_IPOFFSET_S 0 123 #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 124 #define HNS_RXD_BUFNUM_S 8 125 #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S) 126 #define HNS_RXD_PORTID_S 10 127 #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S) 128 #define HNS_RXD_DMAC_S 13 129 #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S) 130 #define HNS_RXD_VLAN_S 15 131 #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S) 132 #define HNS_RXD_L3ID_S 17 133 #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S) 134 #define HNS_RXD_L4ID_S 21 135 #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S) 136 #define HNS_RXD_FE_B 25 137 #define HNS_RXD_FRAG_B 26 138 #define HNS_RXD_VLD_B 27 139 #define HNS_RXD_L2E_B 28 140 #define HNS_RXD_L3E_B 29 141 #define HNS_RXD_L4E_B 30 142 #define HNS_RXD_DROP_B 31 143 144 #define HNS_RXD_VLANID_S 8 145 #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S) 146 #define HNS_RXD_CFI_B 20 147 #define HNS_RXD_PRI_S 21 148 #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S) 149 #define HNS_RXD_ASID_S 24 150 #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S) 151 152 #define HNSV2_TXD_BUFNUM_S 0 153 #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S) 154 #define HNSV2_TXD_PORTID_S 4 155 #define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S) 156 #define HNSV2_TXD_RI_B 1 157 #define HNSV2_TXD_L4CS_B 2 158 #define HNSV2_TXD_L3CS_B 3 159 #define HNSV2_TXD_FE_B 4 160 #define HNSV2_TXD_VLD_B 5 161 162 #define HNSV2_TXD_TSE_B 0 163 #define HNSV2_TXD_VLAN_EN_B 1 164 #define HNSV2_TXD_SNAP_B 2 165 #define HNSV2_TXD_IPV6_B 3 166 #define HNSV2_TXD_SCTP_B 4 167 168 /* hardware spec ring buffer format */ 169 struct __packed hnae_desc { 170 __le64 addr; 171 union { 172 struct { 173 union { 174 __le16 asid_bufnum_pid; 175 __le16 asid; 176 }; 177 __le16 send_size; 178 union { 179 __le32 flag_ipoffset; 180 struct { 181 __u8 bn_pid; 182 __u8 ra_ri_cs_fe_vld; 183 __u8 ip_offset; 184 __u8 tse_vlan_snap_v6_sctp_nth; 185 }; 186 }; 187 __le16 mss; 188 __u8 l4_len; 189 __u8 reserved1; 190 __le16 paylen; 191 __u8 vmid; 192 __u8 qid; 193 __le32 reserved2[2]; 194 } tx; 195 196 struct { 197 __le32 ipoff_bnum_pid_flag; 198 __le16 pkt_len; 199 __le16 size; 200 union { 201 __le32 vlan_pri_asid; 202 struct { 203 __le16 asid; 204 __le16 vlan_cfi_pri; 205 }; 206 }; 207 __le32 rss_hash; 208 __le32 reserved_1[2]; 209 } rx; 210 }; 211 }; 212 213 struct hnae_desc_cb { 214 dma_addr_t dma; /* dma address of this desc */ 215 void *buf; /* cpu addr for a desc */ 216 217 /* priv data for the desc, e.g. skb when use with ip stack*/ 218 void *priv; 219 u32 page_offset; 220 u32 length; /* length of the buffer */ 221 222 u16 reuse_flag; 223 224 /* desc type, used by the ring user to mark the type of the priv data */ 225 u16 type; 226 }; 227 228 #define setflags(flags, bits) ((flags) |= (bits)) 229 #define unsetflags(flags, bits) ((flags) &= ~(bits)) 230 231 /* hnae_ring->flags fields */ 232 #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */ 233 #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR) 234 #define is_rx_ring(ring) (!is_tx_ring(ring)) 235 #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \ 236 DMA_TO_DEVICE : DMA_FROM_DEVICE) 237 238 struct ring_stats { 239 u64 io_err_cnt; 240 u64 sw_err_cnt; 241 u64 seg_pkt_cnt; 242 union { 243 struct { 244 u64 tx_pkts; 245 u64 tx_bytes; 246 u64 tx_err_cnt; 247 u64 restart_queue; 248 u64 tx_busy; 249 }; 250 struct { 251 u64 rx_pkts; 252 u64 rx_bytes; 253 u64 rx_err_cnt; 254 u64 reuse_pg_cnt; 255 u64 err_pkt_len; 256 u64 non_vld_descs; 257 u64 err_bd_num; 258 u64 l2_err; 259 u64 l3l4_csum_err; 260 }; 261 }; 262 }; 263 264 struct hnae_queue; 265 266 struct hnae_ring { 267 u8 __iomem *io_base; /* base io address for the ring */ 268 struct hnae_desc *desc; /* dma map address space */ 269 struct hnae_desc_cb *desc_cb; 270 struct hnae_queue *q; 271 int irq; 272 char ring_name[RCB_RING_NAME_LEN]; 273 274 /* statistic */ 275 struct ring_stats stats; 276 277 /* ring lock for poll one */ 278 spinlock_t lock; 279 280 dma_addr_t desc_dma_addr; 281 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 282 u16 desc_num; /* total number of desc */ 283 u16 max_desc_num_per_pkt; 284 u16 max_raw_data_sz_per_desc; 285 u16 max_pkt_size; 286 int next_to_use; /* idx of next spare desc */ 287 288 /* idx of lastest sent desc, the ring is empty when equal to 289 * next_to_use 290 */ 291 int next_to_clean; 292 293 int flags; /* ring attribute */ 294 int irq_init_flag; 295 296 /* total rx bytes after last rx rate calucated */ 297 u64 coal_last_rx_bytes; 298 unsigned long coal_last_jiffies; 299 u32 coal_param; 300 u32 coal_rx_rate; /* rx rate in MB */ 301 }; 302 303 #define ring_ptr_move_fw(ring, p) \ 304 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 305 #define ring_ptr_move_bw(ring, p) \ 306 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 307 308 enum hns_desc_type { 309 DESC_TYPE_SKB, 310 DESC_TYPE_PAGE, 311 }; 312 313 #define assert_is_ring_idx(ring, idx) \ 314 assert((idx) >= 0 && (idx) < (ring)->desc_num) 315 316 /* the distance between [begin, end) in a ring buffer 317 * note: there is a unuse slot between the begin and the end 318 */ 319 static inline int ring_dist(struct hnae_ring *ring, int begin, int end) 320 { 321 assert_is_ring_idx(ring, begin); 322 assert_is_ring_idx(ring, end); 323 324 return (end - begin + ring->desc_num) % ring->desc_num; 325 } 326 327 static inline int ring_space(struct hnae_ring *ring) 328 { 329 return ring->desc_num - 330 ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1; 331 } 332 333 static inline int is_ring_empty(struct hnae_ring *ring) 334 { 335 assert_is_ring_idx(ring, ring->next_to_use); 336 assert_is_ring_idx(ring, ring->next_to_clean); 337 338 return ring->next_to_use == ring->next_to_clean; 339 } 340 341 #define hnae_buf_size(_ring) ((_ring)->buf_size) 342 #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring))) 343 #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring)) 344 345 struct hnae_handle; 346 347 /* allocate and dma map space for hnae desc */ 348 struct hnae_buf_ops { 349 int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 350 void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 351 int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 352 void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 353 }; 354 355 struct hnae_queue { 356 u8 __iomem *io_base; 357 phys_addr_t phy_base; 358 struct hnae_ae_dev *dev; /* the device who use this queue */ 359 struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp; 360 struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp; 361 struct hnae_handle *handle; 362 }; 363 364 /*hnae loop mode*/ 365 enum hnae_loop { 366 MAC_INTERNALLOOP_MAC = 0, 367 MAC_INTERNALLOOP_SERDES, 368 MAC_INTERNALLOOP_PHY, 369 MAC_LOOP_PHY_NONE, 370 MAC_LOOP_NONE, 371 }; 372 373 /*hnae port type*/ 374 enum hnae_port_type { 375 HNAE_PORT_SERVICE = 0, 376 HNAE_PORT_DEBUG 377 }; 378 379 /* mac media type */ 380 enum hnae_media_type { 381 HNAE_MEDIA_TYPE_UNKNOWN = 0, 382 HNAE_MEDIA_TYPE_FIBER, 383 HNAE_MEDIA_TYPE_COPPER, 384 HNAE_MEDIA_TYPE_BACKPLANE, 385 }; 386 387 /* This struct defines the operation on the handle. 388 * 389 * get_handle(): (mandatory) 390 * Get a handle from AE according to its name and options. 391 * the AE driver should manage the space used by handle and its queues while 392 * the HNAE framework will allocate desc and desc_cb for all rings in the 393 * queues. 394 * put_handle(): 395 * Release the handle. 396 * start(): 397 * Enable the hardware, include all queues 398 * stop(): 399 * Disable the hardware 400 * set_opts(): (mandatory) 401 * Set options to the AE 402 * get_opts(): (mandatory) 403 * Get options from the AE 404 * get_status(): 405 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 406 * non-ok 407 * toggle_ring_irq(): (mandatory) 408 * Set the ring irq to be enabled(0) or disable(1) 409 * toggle_queue_status(): (mandatory) 410 * Set the queue to be enabled(1) or disable(0), this will not change the 411 * ring irq state 412 * adjust_link() 413 * adjust link status 414 * set_loopback() 415 * set loopback 416 * get_ring_bdnum_limit() 417 * get ring bd number limit 418 * get_pauseparam() 419 * get tx and rx of pause frame use 420 * set_autoneg() 421 * set auto autonegotiation of pause frame use 422 * get_autoneg() 423 * get auto autonegotiation of pause frame use 424 * set_pauseparam() 425 * set tx and rx of pause frame use 426 * get_coalesce_usecs() 427 * get usecs to delay a TX interrupt after a packet is sent 428 * get_rx_max_coalesced_frames() 429 * get Maximum number of packets to be sent before a TX interrupt. 430 * set_coalesce_usecs() 431 * set usecs to delay a TX interrupt after a packet is sent 432 * set_coalesce_frames() 433 * set Maximum number of packets to be sent before a TX interrupt. 434 * get_ringnum() 435 * get RX/TX ring number 436 * get_max_ringnum() 437 * get RX/TX ring maximum number 438 * get_mac_addr() 439 * get mac address 440 * set_mac_addr() 441 * set mac address 442 * clr_mc_addr() 443 * clear mcast tcam table 444 * set_mc_addr() 445 * set multicast mode 446 * add_uc_addr() 447 * add ucast address 448 * rm_uc_addr() 449 * remove ucast address 450 * set_mtu() 451 * set mtu 452 * update_stats() 453 * update Old network device statistics 454 * get_ethtool_stats() 455 * get ethtool network device statistics 456 * get_strings() 457 * get a set of strings that describe the requested objects 458 * get_sset_count() 459 * get number of strings that @get_strings will write 460 * update_led_status() 461 * update the led status 462 * set_led_id() 463 * set led id 464 * get_regs() 465 * get regs dump 466 * get_regs_len() 467 * get the len of the regs dump 468 */ 469 struct hnae_ae_ops { 470 struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev, 471 u32 port_id); 472 void (*put_handle)(struct hnae_handle *handle); 473 void (*init_queue)(struct hnae_queue *q); 474 void (*fini_queue)(struct hnae_queue *q); 475 int (*start)(struct hnae_handle *handle); 476 void (*stop)(struct hnae_handle *handle); 477 void (*reset)(struct hnae_handle *handle); 478 int (*set_opts)(struct hnae_handle *handle, int type, void *opts); 479 int (*get_opts)(struct hnae_handle *handle, int type, void **opts); 480 int (*get_status)(struct hnae_handle *handle); 481 int (*get_info)(struct hnae_handle *handle, 482 u8 *auto_neg, u16 *speed, u8 *duplex); 483 void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val); 484 void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex); 485 bool (*need_adjust_link)(struct hnae_handle *handle, 486 int speed, int duplex); 487 int (*set_loopback)(struct hnae_handle *handle, 488 enum hnae_loop loop_mode, int en); 489 void (*get_ring_bdnum_limit)(struct hnae_queue *queue, 490 u32 *uplimit); 491 void (*get_pauseparam)(struct hnae_handle *handle, 492 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 493 int (*set_autoneg)(struct hnae_handle *handle, u8 enable); 494 int (*get_autoneg)(struct hnae_handle *handle); 495 int (*set_pauseparam)(struct hnae_handle *handle, 496 u32 auto_neg, u32 rx_en, u32 tx_en); 497 void (*get_coalesce_usecs)(struct hnae_handle *handle, 498 u32 *tx_usecs, u32 *rx_usecs); 499 void (*get_max_coalesced_frames)(struct hnae_handle *handle, 500 u32 *tx_frames, u32 *rx_frames); 501 int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout); 502 int (*set_coalesce_frames)(struct hnae_handle *handle, 503 u32 tx_frames, u32 rx_frames); 504 void (*get_coalesce_range)(struct hnae_handle *handle, 505 u32 *tx_frames_low, u32 *rx_frames_low, 506 u32 *tx_frames_high, u32 *rx_frames_high, 507 u32 *tx_usecs_low, u32 *rx_usecs_low, 508 u32 *tx_usecs_high, u32 *rx_usecs_high); 509 void (*set_promisc_mode)(struct hnae_handle *handle, u32 en); 510 int (*get_mac_addr)(struct hnae_handle *handle, void **p); 511 int (*set_mac_addr)(struct hnae_handle *handle, void *p); 512 int (*add_uc_addr)(struct hnae_handle *handle, 513 const unsigned char *addr); 514 int (*rm_uc_addr)(struct hnae_handle *handle, 515 const unsigned char *addr); 516 int (*clr_mc_addr)(struct hnae_handle *handle); 517 int (*set_mc_addr)(struct hnae_handle *handle, void *addr); 518 int (*set_mtu)(struct hnae_handle *handle, int new_mtu); 519 void (*set_tso_stats)(struct hnae_handle *handle, int enable); 520 void (*update_stats)(struct hnae_handle *handle, 521 struct net_device_stats *net_stats); 522 void (*get_stats)(struct hnae_handle *handle, u64 *data); 523 void (*get_strings)(struct hnae_handle *handle, 524 u32 stringset, u8 *data); 525 int (*get_sset_count)(struct hnae_handle *handle, int stringset); 526 void (*update_led_status)(struct hnae_handle *handle); 527 int (*set_led_id)(struct hnae_handle *handle, 528 enum hnae_led_state status); 529 void (*get_regs)(struct hnae_handle *handle, void *data); 530 int (*get_regs_len)(struct hnae_handle *handle); 531 u32 (*get_rss_key_size)(struct hnae_handle *handle); 532 u32 (*get_rss_indir_size)(struct hnae_handle *handle); 533 int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key, 534 u8 *hfunc); 535 int (*set_rss)(struct hnae_handle *handle, const u32 *indir, 536 const u8 *key, const u8 hfunc); 537 }; 538 539 struct hnae_ae_dev { 540 struct device cls_dev; /* the class dev */ 541 struct device *dev; /* the presented dev */ 542 struct hnae_ae_ops *ops; 543 struct list_head node; 544 struct module *owner; /* the module who provides this dev */ 545 int id; 546 char name[AE_NAME_SIZE]; 547 struct list_head handle_list; 548 spinlock_t lock; /* lock to protect the handle_list */ 549 }; 550 551 struct hnae_handle { 552 struct device *owner_dev; /* the device which make use of this handle */ 553 struct hnae_ae_dev *dev; /* the device who provides this handle */ 554 struct phy_device *phy_dev; 555 phy_interface_t phy_if; 556 u32 if_support; 557 int q_num; 558 int vf_id; 559 unsigned long coal_last_jiffies; 560 u32 coal_param; /* self adapt coalesce param */ 561 /* the ring index of last ring that set coal param */ 562 u32 coal_ring_idx; 563 u32 eport_id; 564 u32 dport_id; /* v2 tx bd should fill the dport_id */ 565 bool coal_adapt_en; 566 enum hnae_port_type port_type; 567 enum hnae_media_type media_type; 568 struct list_head node; /* list to hnae_ae_dev->handle_list */ 569 struct hnae_buf_ops *bops; /* operation for the buffer */ 570 struct hnae_queue **qs; /* array base of all queues */ 571 }; 572 573 #define ring_to_dev(ring) ((ring)->q->dev->dev) 574 575 struct hnae_handle *hnae_get_handle(struct device *owner_dev, 576 const struct fwnode_handle *fwnode, 577 u32 port_id, 578 struct hnae_buf_ops *bops); 579 580 void hnae_put_handle(struct hnae_handle *handle); 581 int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner); 582 void hnae_ae_unregister(struct hnae_ae_dev *dev); 583 584 int hnae_register_notifier(struct notifier_block *nb); 585 void hnae_unregister_notifier(struct notifier_block *nb); 586 int hnae_reinit_handle(struct hnae_handle *handle); 587 588 #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \ 589 (q)->tx_ring.io_base + RCB_REG_TAIL) 590 591 #ifndef assert 592 #define assert(cond) 593 #endif 594 595 static inline int hnae_reserve_buffer_map(struct hnae_ring *ring, 596 struct hnae_desc_cb *cb) 597 { 598 struct hnae_buf_ops *bops = ring->q->handle->bops; 599 int ret; 600 601 ret = bops->alloc_buffer(ring, cb); 602 if (ret) 603 goto out; 604 605 ret = bops->map_buffer(ring, cb); 606 if (ret) 607 goto out_with_buf; 608 609 return 0; 610 611 out_with_buf: 612 bops->free_buffer(ring, cb); 613 out: 614 return ret; 615 } 616 617 static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i) 618 { 619 int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]); 620 621 if (ret) 622 return ret; 623 624 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 625 626 return 0; 627 } 628 629 static inline void hnae_buffer_detach(struct hnae_ring *ring, int i) 630 { 631 ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]); 632 ring->desc[i].addr = 0; 633 } 634 635 static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i) 636 { 637 struct hnae_buf_ops *bops = ring->q->handle->bops; 638 struct hnae_desc_cb *cb = &ring->desc_cb[i]; 639 640 if (!ring->desc_cb[i].dma) 641 return; 642 643 hnae_buffer_detach(ring, i); 644 bops->free_buffer(ring, cb); 645 } 646 647 /* detach a in-used buffer and replace with a reserved one */ 648 static inline void hnae_replace_buffer(struct hnae_ring *ring, int i, 649 struct hnae_desc_cb *res_cb) 650 { 651 struct hnae_buf_ops *bops = ring->q->handle->bops; 652 653 bops->unmap_buffer(ring, &ring->desc_cb[i]); 654 ring->desc_cb[i] = *res_cb; 655 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 656 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 657 } 658 659 static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i) 660 { 661 ring->desc_cb[i].reuse_flag = 0; 662 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma 663 + ring->desc_cb[i].page_offset); 664 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 665 } 666 667 /* when reinit buffer size, we should reinit buffer description */ 668 static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h) 669 { 670 int i, j; 671 struct hnae_ring *ring; 672 673 for (i = 0; i < h->q_num; i++) { 674 ring = &h->qs[i]->rx_ring; 675 for (j = 0; j < ring->desc_num; j++) 676 ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma); 677 } 678 679 wmb(); /* commit all data before submit */ 680 } 681 682 /* when reinit buffer size, we should reinit page offset */ 683 static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h) 684 { 685 int i, j; 686 struct hnae_ring *ring; 687 688 for (i = 0; i < h->q_num; i++) { 689 ring = &h->qs[i]->rx_ring; 690 for (j = 0; j < ring->desc_num; j++) { 691 ring->desc_cb[j].page_offset = 0; 692 if (ring->desc[j].addr != 693 cpu_to_le64(ring->desc_cb[j].dma)) 694 ring->desc[j].addr = 695 cpu_to_le64(ring->desc_cb[j].dma); 696 } 697 } 698 699 wmb(); /* commit all data before submit */ 700 } 701 702 #define hnae_set_field(origin, mask, shift, val) \ 703 do { \ 704 (origin) &= (~(mask)); \ 705 (origin) |= ((val) << (shift)) & (mask); \ 706 } while (0) 707 708 #define hnae_set_bit(origin, shift, val) \ 709 hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) 710 711 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 712 713 #define hnae_get_bit(origin, shift) \ 714 hnae_get_field((origin), (0x1 << (shift)), (shift)) 715 716 #endif 717