1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __HNAE_H 11 #define __HNAE_H 12 13 /* Names used in this framework: 14 * ae handle (handle): 15 * a set of queues provided by AE 16 * ring buffer queue (rbq): 17 * the channel between upper layer and the AE, can do tx and rx 18 * ring: 19 * a tx or rx channel within a rbq 20 * ring description (desc): 21 * an element in the ring with packet information 22 * buffer: 23 * a memory region referred by desc with the full packet payload 24 * 25 * "num" means a static number set as a parameter, "count" mean a dynamic 26 * number set while running 27 * "cb" means control block 28 */ 29 30 #include <linux/delay.h> 31 #include <linux/device.h> 32 #include <linux/module.h> 33 #include <linux/netdevice.h> 34 #include <linux/notifier.h> 35 #include <linux/phy.h> 36 #include <linux/types.h> 37 38 #define HNAE_DRIVER_VERSION "2.0" 39 #define HNAE_DRIVER_NAME "hns" 40 #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation." 41 #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver" 42 #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem" 43 44 #ifdef DEBUG 45 46 #ifndef assert 47 #define assert(expr) \ 48 do { \ 49 if (!(expr)) { \ 50 pr_err("Assertion failed! %s, %s, %s, line %d\n", \ 51 #expr, __FILE__, __func__, __LINE__); \ 52 } \ 53 } while (0) 54 #endif 55 56 #else 57 58 #ifndef assert 59 #define assert(expr) 60 #endif 61 62 #endif 63 64 #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0') 65 #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0') 66 #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1) 67 #define AE_NAME_SIZE 16 68 69 /* some said the RX and TX RCB format should not be the same in the future. But 70 * it is the same now... 71 */ 72 #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */ 73 #define RCB_REG_BASEADDR_H 0x04 74 #define RCB_REG_BD_NUM 0x08 75 #define RCB_REG_BD_LEN 0x0C 76 #define RCB_REG_PKTLINE 0x10 77 #define RCB_REG_TAIL 0x18 78 #define RCB_REG_HEAD 0x1C 79 #define RCB_REG_FBDNUM 0x20 80 #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */ 81 #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */ 82 83 #define HNS_RX_HEAD_SIZE 256 84 85 #define HNAE_AE_REGISTER 0x1 86 87 #define RCB_RING_NAME_LEN 16 88 89 enum hnae_led_state { 90 HNAE_LED_INACTIVE, 91 HNAE_LED_ACTIVE, 92 HNAE_LED_ON, 93 HNAE_LED_OFF 94 }; 95 96 #define HNS_RX_FLAG_VLAN_PRESENT 0x1 97 #define HNS_RX_FLAG_L3ID_IPV4 0x0 98 #define HNS_RX_FLAG_L3ID_IPV6 0x1 99 #define HNS_RX_FLAG_L4ID_UDP 0x0 100 #define HNS_RX_FLAG_L4ID_TCP 0x1 101 102 #define HNS_TXD_ASID_S 0 103 #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S) 104 #define HNS_TXD_BUFNUM_S 8 105 #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S) 106 #define HNS_TXD_PORTID_S 10 107 #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S) 108 109 #define HNS_TXD_RA_B 8 110 #define HNS_TXD_RI_B 9 111 #define HNS_TXD_L4CS_B 10 112 #define HNS_TXD_L3CS_B 11 113 #define HNS_TXD_FE_B 12 114 #define HNS_TXD_VLD_B 13 115 #define HNS_TXD_IPOFFSET_S 14 116 #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 117 118 #define HNS_RXD_IPOFFSET_S 0 119 #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 120 #define HNS_RXD_BUFNUM_S 8 121 #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S) 122 #define HNS_RXD_PORTID_S 10 123 #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S) 124 #define HNS_RXD_DMAC_S 13 125 #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S) 126 #define HNS_RXD_VLAN_S 15 127 #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S) 128 #define HNS_RXD_L3ID_S 17 129 #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S) 130 #define HNS_RXD_L4ID_S 21 131 #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S) 132 #define HNS_RXD_FE_B 25 133 #define HNS_RXD_FRAG_B 26 134 #define HNS_RXD_VLD_B 27 135 #define HNS_RXD_L2E_B 28 136 #define HNS_RXD_L3E_B 29 137 #define HNS_RXD_L4E_B 30 138 #define HNS_RXD_DROP_B 31 139 140 #define HNS_RXD_VLANID_S 8 141 #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S) 142 #define HNS_RXD_CFI_B 20 143 #define HNS_RXD_PRI_S 21 144 #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S) 145 #define HNS_RXD_ASID_S 24 146 #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S) 147 148 #define HNSV2_TXD_BUFNUM_S 0 149 #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S) 150 #define HNSV2_TXD_RI_B 1 151 #define HNSV2_TXD_L4CS_B 2 152 #define HNSV2_TXD_L3CS_B 3 153 #define HNSV2_TXD_FE_B 4 154 #define HNSV2_TXD_VLD_B 5 155 156 #define HNSV2_TXD_TSE_B 0 157 #define HNSV2_TXD_VLAN_EN_B 1 158 #define HNSV2_TXD_SNAP_B 2 159 #define HNSV2_TXD_IPV6_B 3 160 #define HNSV2_TXD_SCTP_B 4 161 162 /* hardware spec ring buffer format */ 163 struct __packed hnae_desc { 164 __le64 addr; 165 union { 166 struct { 167 union { 168 __le16 asid_bufnum_pid; 169 __le16 asid; 170 }; 171 __le16 send_size; 172 union { 173 __le32 flag_ipoffset; 174 struct { 175 __u8 bn_pid; 176 __u8 ra_ri_cs_fe_vld; 177 __u8 ip_offset; 178 __u8 tse_vlan_snap_v6_sctp_nth; 179 }; 180 }; 181 __le16 mss; 182 __u8 l4_len; 183 __u8 reserved1; 184 __le16 paylen; 185 __u8 vmid; 186 __u8 qid; 187 __le32 reserved2[2]; 188 } tx; 189 190 struct { 191 __le32 ipoff_bnum_pid_flag; 192 __le16 pkt_len; 193 __le16 size; 194 union { 195 __le32 vlan_pri_asid; 196 struct { 197 __le16 asid; 198 __le16 vlan_cfi_pri; 199 }; 200 }; 201 __le32 rss_hash; 202 __le32 reserved_1[2]; 203 } rx; 204 }; 205 }; 206 207 struct hnae_desc_cb { 208 dma_addr_t dma; /* dma address of this desc */ 209 void *buf; /* cpu addr for a desc */ 210 211 /* priv data for the desc, e.g. skb when use with ip stack*/ 212 void *priv; 213 u16 page_offset; 214 u16 reuse_flag; 215 216 u16 length; /* length of the buffer */ 217 218 /* desc type, used by the ring user to mark the type of the priv data */ 219 u16 type; 220 }; 221 222 #define setflags(flags, bits) ((flags) |= (bits)) 223 #define unsetflags(flags, bits) ((flags) &= ~(bits)) 224 225 /* hnae_ring->flags fields */ 226 #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */ 227 #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR) 228 #define is_rx_ring(ring) (!is_tx_ring(ring)) 229 #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \ 230 DMA_TO_DEVICE : DMA_FROM_DEVICE) 231 232 struct ring_stats { 233 u64 io_err_cnt; 234 u64 sw_err_cnt; 235 u64 seg_pkt_cnt; 236 union { 237 struct { 238 u64 tx_pkts; 239 u64 tx_bytes; 240 u64 tx_err_cnt; 241 u64 restart_queue; 242 u64 tx_busy; 243 }; 244 struct { 245 u64 rx_pkts; 246 u64 rx_bytes; 247 u64 rx_err_cnt; 248 u64 reuse_pg_cnt; 249 u64 err_pkt_len; 250 u64 non_vld_descs; 251 u64 err_bd_num; 252 u64 l2_err; 253 u64 l3l4_csum_err; 254 }; 255 }; 256 }; 257 258 struct hnae_queue; 259 260 struct hnae_ring { 261 u8 __iomem *io_base; /* base io address for the ring */ 262 struct hnae_desc *desc; /* dma map address space */ 263 struct hnae_desc_cb *desc_cb; 264 struct hnae_queue *q; 265 int irq; 266 char ring_name[RCB_RING_NAME_LEN]; 267 268 /* statistic */ 269 struct ring_stats stats; 270 271 dma_addr_t desc_dma_addr; 272 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 273 u16 desc_num; /* total number of desc */ 274 u16 max_desc_num_per_pkt; 275 u16 max_raw_data_sz_per_desc; 276 u16 max_pkt_size; 277 int next_to_use; /* idx of next spare desc */ 278 279 /* idx of lastest sent desc, the ring is empty when equal to 280 * next_to_use 281 */ 282 int next_to_clean; 283 284 int flags; /* ring attribute */ 285 int irq_init_flag; 286 }; 287 288 #define ring_ptr_move_fw(ring, p) \ 289 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 290 #define ring_ptr_move_bw(ring, p) \ 291 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 292 293 enum hns_desc_type { 294 DESC_TYPE_SKB, 295 DESC_TYPE_PAGE, 296 }; 297 298 #define assert_is_ring_idx(ring, idx) \ 299 assert((idx) >= 0 && (idx) < (ring)->desc_num) 300 301 /* the distance between [begin, end) in a ring buffer 302 * note: there is a unuse slot between the begin and the end 303 */ 304 static inline int ring_dist(struct hnae_ring *ring, int begin, int end) 305 { 306 assert_is_ring_idx(ring, begin); 307 assert_is_ring_idx(ring, end); 308 309 return (end - begin + ring->desc_num) % ring->desc_num; 310 } 311 312 static inline int ring_space(struct hnae_ring *ring) 313 { 314 return ring->desc_num - 315 ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1; 316 } 317 318 static inline int is_ring_empty(struct hnae_ring *ring) 319 { 320 assert_is_ring_idx(ring, ring->next_to_use); 321 assert_is_ring_idx(ring, ring->next_to_clean); 322 323 return ring->next_to_use == ring->next_to_clean; 324 } 325 326 #define hnae_buf_size(_ring) ((_ring)->buf_size) 327 #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring))) 328 #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring)) 329 330 struct hnae_handle; 331 332 /* allocate and dma map space for hnae desc */ 333 struct hnae_buf_ops { 334 int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 335 void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 336 int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 337 void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 338 }; 339 340 struct hnae_queue { 341 void __iomem *io_base; 342 phys_addr_t phy_base; 343 struct hnae_ae_dev *dev; /* the device who use this queue */ 344 struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp; 345 struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp; 346 struct hnae_handle *handle; 347 }; 348 349 /*hnae loop mode*/ 350 enum hnae_loop { 351 MAC_INTERNALLOOP_MAC = 0, 352 MAC_INTERNALLOOP_SERDES, 353 MAC_INTERNALLOOP_PHY, 354 MAC_LOOP_NONE, 355 }; 356 357 /*hnae port type*/ 358 enum hnae_port_type { 359 HNAE_PORT_SERVICE = 0, 360 HNAE_PORT_DEBUG 361 }; 362 363 /* This struct defines the operation on the handle. 364 * 365 * get_handle(): (mandatory) 366 * Get a handle from AE according to its name and options. 367 * the AE driver should manage the space used by handle and its queues while 368 * the HNAE framework will allocate desc and desc_cb for all rings in the 369 * queues. 370 * put_handle(): 371 * Release the handle. 372 * start(): 373 * Enable the hardware, include all queues 374 * stop(): 375 * Disable the hardware 376 * set_opts(): (mandatory) 377 * Set options to the AE 378 * get_opts(): (mandatory) 379 * Get options from the AE 380 * get_status(): 381 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 382 * non-ok 383 * toggle_ring_irq(): (mandatory) 384 * Set the ring irq to be enabled(0) or disable(1) 385 * toggle_queue_status(): (mandatory) 386 * Set the queue to be enabled(1) or disable(0), this will not change the 387 * ring irq state 388 * adjust_link() 389 * adjust link status 390 * set_loopback() 391 * set loopback 392 * get_ring_bdnum_limit() 393 * get ring bd number limit 394 * get_pauseparam() 395 * get tx and rx of pause frame use 396 * set_autoneg() 397 * set auto autonegotiation of pause frame use 398 * get_autoneg() 399 * get auto autonegotiation of pause frame use 400 * set_pauseparam() 401 * set tx and rx of pause frame use 402 * get_coalesce_usecs() 403 * get usecs to delay a TX interrupt after a packet is sent 404 * get_rx_max_coalesced_frames() 405 * get Maximum number of packets to be sent before a TX interrupt. 406 * set_coalesce_usecs() 407 * set usecs to delay a TX interrupt after a packet is sent 408 * set_coalesce_frames() 409 * set Maximum number of packets to be sent before a TX interrupt. 410 * get_ringnum() 411 * get RX/TX ring number 412 * get_max_ringnum() 413 * get RX/TX ring maximum number 414 * get_mac_addr() 415 * get mac address 416 * set_mac_addr() 417 * set mac address 418 * set_mc_addr() 419 * set multicast mode 420 * set_mtu() 421 * set mtu 422 * update_stats() 423 * update Old network device statistics 424 * get_ethtool_stats() 425 * get ethtool network device statistics 426 * get_strings() 427 * get a set of strings that describe the requested objects 428 * get_sset_count() 429 * get number of strings that @get_strings will write 430 * update_led_status() 431 * update the led status 432 * set_led_id() 433 * set led id 434 * get_regs() 435 * get regs dump 436 * get_regs_len() 437 * get the len of the regs dump 438 */ 439 struct hnae_ae_ops { 440 struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev, 441 u32 port_id); 442 void (*put_handle)(struct hnae_handle *handle); 443 void (*init_queue)(struct hnae_queue *q); 444 void (*fini_queue)(struct hnae_queue *q); 445 int (*start)(struct hnae_handle *handle); 446 void (*stop)(struct hnae_handle *handle); 447 void (*reset)(struct hnae_handle *handle); 448 int (*set_opts)(struct hnae_handle *handle, int type, void *opts); 449 int (*get_opts)(struct hnae_handle *handle, int type, void **opts); 450 int (*get_status)(struct hnae_handle *handle); 451 int (*get_info)(struct hnae_handle *handle, 452 u8 *auto_neg, u16 *speed, u8 *duplex); 453 void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val); 454 void (*toggle_queue_status)(struct hnae_queue *queue, u32 val); 455 void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex); 456 int (*set_loopback)(struct hnae_handle *handle, 457 enum hnae_loop loop_mode, int en); 458 void (*get_ring_bdnum_limit)(struct hnae_queue *queue, 459 u32 *uplimit); 460 void (*get_pauseparam)(struct hnae_handle *handle, 461 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 462 int (*set_autoneg)(struct hnae_handle *handle, u8 enable); 463 int (*get_autoneg)(struct hnae_handle *handle); 464 int (*set_pauseparam)(struct hnae_handle *handle, 465 u32 auto_neg, u32 rx_en, u32 tx_en); 466 void (*get_coalesce_usecs)(struct hnae_handle *handle, 467 u32 *tx_usecs, u32 *rx_usecs); 468 void (*get_rx_max_coalesced_frames)(struct hnae_handle *handle, 469 u32 *tx_frames, u32 *rx_frames); 470 void (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout); 471 int (*set_coalesce_frames)(struct hnae_handle *handle, 472 u32 coalesce_frames); 473 void (*set_promisc_mode)(struct hnae_handle *handle, u32 en); 474 int (*get_mac_addr)(struct hnae_handle *handle, void **p); 475 int (*set_mac_addr)(struct hnae_handle *handle, void *p); 476 int (*set_mc_addr)(struct hnae_handle *handle, void *addr); 477 int (*set_mtu)(struct hnae_handle *handle, int new_mtu); 478 void (*set_tso_stats)(struct hnae_handle *handle, int enable); 479 void (*update_stats)(struct hnae_handle *handle, 480 struct net_device_stats *net_stats); 481 void (*get_stats)(struct hnae_handle *handle, u64 *data); 482 void (*get_strings)(struct hnae_handle *handle, 483 u32 stringset, u8 *data); 484 int (*get_sset_count)(struct hnae_handle *handle, int stringset); 485 void (*update_led_status)(struct hnae_handle *handle); 486 int (*set_led_id)(struct hnae_handle *handle, 487 enum hnae_led_state status); 488 void (*get_regs)(struct hnae_handle *handle, void *data); 489 int (*get_regs_len)(struct hnae_handle *handle); 490 u32 (*get_rss_key_size)(struct hnae_handle *handle); 491 u32 (*get_rss_indir_size)(struct hnae_handle *handle); 492 int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key, 493 u8 *hfunc); 494 int (*set_rss)(struct hnae_handle *handle, const u32 *indir, 495 const u8 *key, const u8 hfunc); 496 }; 497 498 struct hnae_ae_dev { 499 struct device cls_dev; /* the class dev */ 500 struct device *dev; /* the presented dev */ 501 struct hnae_ae_ops *ops; 502 struct list_head node; 503 struct module *owner; /* the module who provides this dev */ 504 int id; 505 char name[AE_NAME_SIZE]; 506 struct list_head handle_list; 507 spinlock_t lock; /* lock to protect the handle_list */ 508 }; 509 510 struct hnae_handle { 511 struct device *owner_dev; /* the device which make use of this handle */ 512 struct hnae_ae_dev *dev; /* the device who provides this handle */ 513 struct device_node *phy_node; 514 phy_interface_t phy_if; 515 u32 if_support; 516 int q_num; 517 int vf_id; 518 u32 eport_id; 519 enum hnae_port_type port_type; 520 struct list_head node; /* list to hnae_ae_dev->handle_list */ 521 struct hnae_buf_ops *bops; /* operation for the buffer */ 522 struct hnae_queue **qs; /* array base of all queues */ 523 }; 524 525 #define ring_to_dev(ring) ((ring)->q->dev->dev) 526 527 struct hnae_handle *hnae_get_handle(struct device *owner_dev, const char *ae_id, 528 u32 port_id, struct hnae_buf_ops *bops); 529 void hnae_put_handle(struct hnae_handle *handle); 530 int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner); 531 void hnae_ae_unregister(struct hnae_ae_dev *dev); 532 533 int hnae_register_notifier(struct notifier_block *nb); 534 void hnae_unregister_notifier(struct notifier_block *nb); 535 int hnae_reinit_handle(struct hnae_handle *handle); 536 537 #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \ 538 (q)->tx_ring.io_base + RCB_REG_TAIL) 539 540 #ifndef assert 541 #define assert(cond) 542 #endif 543 544 static inline int hnae_reserve_buffer_map(struct hnae_ring *ring, 545 struct hnae_desc_cb *cb) 546 { 547 struct hnae_buf_ops *bops = ring->q->handle->bops; 548 int ret; 549 550 ret = bops->alloc_buffer(ring, cb); 551 if (ret) 552 goto out; 553 554 ret = bops->map_buffer(ring, cb); 555 if (ret) 556 goto out_with_buf; 557 558 return 0; 559 560 out_with_buf: 561 bops->free_buffer(ring, cb); 562 out: 563 return ret; 564 } 565 566 static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i) 567 { 568 int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]); 569 570 if (ret) 571 return ret; 572 573 ring->desc[i].addr = (__le64)ring->desc_cb[i].dma; 574 575 return 0; 576 } 577 578 static inline void hnae_buffer_detach(struct hnae_ring *ring, int i) 579 { 580 ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]); 581 ring->desc[i].addr = 0; 582 } 583 584 static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i) 585 { 586 struct hnae_buf_ops *bops = ring->q->handle->bops; 587 struct hnae_desc_cb *cb = &ring->desc_cb[i]; 588 589 if (!ring->desc_cb[i].dma) 590 return; 591 592 hnae_buffer_detach(ring, i); 593 bops->free_buffer(ring, cb); 594 } 595 596 /* detach a in-used buffer and replace with a reserved one */ 597 static inline void hnae_replace_buffer(struct hnae_ring *ring, int i, 598 struct hnae_desc_cb *res_cb) 599 { 600 struct hnae_buf_ops *bops = ring->q->handle->bops; 601 602 bops->unmap_buffer(ring, &ring->desc_cb[i]); 603 ring->desc_cb[i] = *res_cb; 604 ring->desc[i].addr = (__le64)ring->desc_cb[i].dma; 605 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 606 } 607 608 static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i) 609 { 610 ring->desc_cb[i].reuse_flag = 0; 611 ring->desc[i].addr = (__le64)(ring->desc_cb[i].dma 612 + ring->desc_cb[i].page_offset); 613 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 614 } 615 616 #define hnae_set_field(origin, mask, shift, val) \ 617 do { \ 618 (origin) &= (~(mask)); \ 619 (origin) |= ((val) << (shift)) & (mask); \ 620 } while (0) 621 622 #define hnae_set_bit(origin, shift, val) \ 623 hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) 624 625 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 626 627 #define hnae_get_bit(origin, shift) \ 628 hnae_get_field((origin), (0x1 << (shift)), (shift)) 629 630 #endif 631