1 /*
2  * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
3  *
4  * Copyright (c) 2003 Intracom S.A.
5  *  by Pantelis Antoniou <panto@intracom.gr>
6  *
7  * 2005 (c) MontaVista Software, Inc.
8  * Vitaly Bordug <vbordug@ru.mvista.com>
9  *
10  * This file is licensed under the terms of the GNU General Public License
11  * version 2. This program is licensed "as is" without any warranty of any
12  * kind, whether express or implied.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/skbuff.h>
27 #include <linux/spinlock.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/bitops.h>
31 #include <linux/fs.h>
32 #include <linux/platform_device.h>
33 #include <linux/of_address.h>
34 #include <linux/of_irq.h>
35 #include <linux/of_platform.h>
36 
37 #include <asm/irq.h>
38 #include <linux/uaccess.h>
39 
40 #ifdef CONFIG_8xx
41 #include <asm/8xx_immap.h>
42 #include <asm/pgtable.h>
43 #include <asm/cpm1.h>
44 #endif
45 
46 #include "fs_enet.h"
47 
48 /*************************************************/
49 #if defined(CONFIG_CPM1)
50 /* for a 8xx __raw_xxx's are sufficient */
51 #define __fs_out32(addr, x)	__raw_writel(x, addr)
52 #define __fs_out16(addr, x)	__raw_writew(x, addr)
53 #define __fs_out8(addr, x)	__raw_writeb(x, addr)
54 #define __fs_in32(addr)	__raw_readl(addr)
55 #define __fs_in16(addr)	__raw_readw(addr)
56 #define __fs_in8(addr)	__raw_readb(addr)
57 #else
58 /* for others play it safe */
59 #define __fs_out32(addr, x)	out_be32(addr, x)
60 #define __fs_out16(addr, x)	out_be16(addr, x)
61 #define __fs_in32(addr)	in_be32(addr)
62 #define __fs_in16(addr)	in_be16(addr)
63 #define __fs_out8(addr, x)	out_8(addr, x)
64 #define __fs_in8(addr)	in_8(addr)
65 #endif
66 
67 /* write, read, set bits, clear bits */
68 #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
69 #define R32(_p, _m)     __fs_in32(&(_p)->_m)
70 #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
71 #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
72 
73 #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
74 #define R16(_p, _m)     __fs_in16(&(_p)->_m)
75 #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
76 #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
77 
78 #define W8(_p, _m, _v)  __fs_out8(&(_p)->_m, (_v))
79 #define R8(_p, _m)      __fs_in8(&(_p)->_m)
80 #define S8(_p, _m, _v)  W8(_p, _m, R8(_p, _m) | (_v))
81 #define C8(_p, _m, _v)  W8(_p, _m, R8(_p, _m) & ~(_v))
82 
83 #define SCC_MAX_MULTICAST_ADDRS	64
84 
85 /*
86  * Delay to wait for SCC reset command to complete (in us)
87  */
88 #define SCC_RESET_DELAY		50
89 
90 static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
91 {
92 	const struct fs_platform_info *fpi = fep->fpi;
93 
94 	return cpm_command(fpi->cp_command, op);
95 }
96 
97 static int do_pd_setup(struct fs_enet_private *fep)
98 {
99 	struct platform_device *ofdev = to_platform_device(fep->dev);
100 
101 	fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
102 	if (!fep->interrupt)
103 		return -EINVAL;
104 
105 	fep->scc.sccp = of_iomap(ofdev->dev.of_node, 0);
106 	if (!fep->scc.sccp)
107 		return -EINVAL;
108 
109 	fep->scc.ep = of_iomap(ofdev->dev.of_node, 1);
110 	if (!fep->scc.ep) {
111 		iounmap(fep->scc.sccp);
112 		return -EINVAL;
113 	}
114 
115 	return 0;
116 }
117 
118 #define SCC_NAPI_EVENT_MSK	(SCCE_ENET_RXF | SCCE_ENET_RXB | SCCE_ENET_TXB)
119 #define SCC_EVENT		(SCCE_ENET_RXF | SCCE_ENET_TXB)
120 #define SCC_ERR_EVENT_MSK	(SCCE_ENET_TXE | SCCE_ENET_BSY)
121 
122 static int setup_data(struct net_device *dev)
123 {
124 	struct fs_enet_private *fep = netdev_priv(dev);
125 
126 	do_pd_setup(fep);
127 
128 	fep->scc.hthi = 0;
129 	fep->scc.htlo = 0;
130 
131 	fep->ev_napi = SCC_NAPI_EVENT_MSK;
132 	fep->ev = SCC_EVENT | SCCE_ENET_TXE;
133 	fep->ev_err = SCC_ERR_EVENT_MSK;
134 
135 	return 0;
136 }
137 
138 static int allocate_bd(struct net_device *dev)
139 {
140 	struct fs_enet_private *fep = netdev_priv(dev);
141 	const struct fs_platform_info *fpi = fep->fpi;
142 
143 	fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
144 					 sizeof(cbd_t), 8);
145 	if (IS_ERR_VALUE(fep->ring_mem_addr))
146 		return -ENOMEM;
147 
148 	fep->ring_base = (void __iomem __force*)
149 		cpm_dpram_addr(fep->ring_mem_addr);
150 
151 	return 0;
152 }
153 
154 static void free_bd(struct net_device *dev)
155 {
156 	struct fs_enet_private *fep = netdev_priv(dev);
157 
158 	if (fep->ring_base)
159 		cpm_dpfree(fep->ring_mem_addr);
160 }
161 
162 static void cleanup_data(struct net_device *dev)
163 {
164 	/* nothing */
165 }
166 
167 static void set_promiscuous_mode(struct net_device *dev)
168 {
169 	struct fs_enet_private *fep = netdev_priv(dev);
170 	scc_t __iomem *sccp = fep->scc.sccp;
171 
172 	S16(sccp, scc_psmr, SCC_PSMR_PRO);
173 }
174 
175 static void set_multicast_start(struct net_device *dev)
176 {
177 	struct fs_enet_private *fep = netdev_priv(dev);
178 	scc_enet_t __iomem *ep = fep->scc.ep;
179 
180 	W16(ep, sen_gaddr1, 0);
181 	W16(ep, sen_gaddr2, 0);
182 	W16(ep, sen_gaddr3, 0);
183 	W16(ep, sen_gaddr4, 0);
184 }
185 
186 static void set_multicast_one(struct net_device *dev, const u8 * mac)
187 {
188 	struct fs_enet_private *fep = netdev_priv(dev);
189 	scc_enet_t __iomem *ep = fep->scc.ep;
190 	u16 taddrh, taddrm, taddrl;
191 
192 	taddrh = ((u16) mac[5] << 8) | mac[4];
193 	taddrm = ((u16) mac[3] << 8) | mac[2];
194 	taddrl = ((u16) mac[1] << 8) | mac[0];
195 
196 	W16(ep, sen_taddrh, taddrh);
197 	W16(ep, sen_taddrm, taddrm);
198 	W16(ep, sen_taddrl, taddrl);
199 	scc_cr_cmd(fep, CPM_CR_SET_GADDR);
200 }
201 
202 static void set_multicast_finish(struct net_device *dev)
203 {
204 	struct fs_enet_private *fep = netdev_priv(dev);
205 	scc_t __iomem *sccp = fep->scc.sccp;
206 	scc_enet_t __iomem *ep = fep->scc.ep;
207 
208 	/* clear promiscuous always */
209 	C16(sccp, scc_psmr, SCC_PSMR_PRO);
210 
211 	/* if all multi or too many multicasts; just enable all */
212 	if ((dev->flags & IFF_ALLMULTI) != 0 ||
213 	    netdev_mc_count(dev) > SCC_MAX_MULTICAST_ADDRS) {
214 
215 		W16(ep, sen_gaddr1, 0xffff);
216 		W16(ep, sen_gaddr2, 0xffff);
217 		W16(ep, sen_gaddr3, 0xffff);
218 		W16(ep, sen_gaddr4, 0xffff);
219 	}
220 }
221 
222 static void set_multicast_list(struct net_device *dev)
223 {
224 	struct netdev_hw_addr *ha;
225 
226 	if ((dev->flags & IFF_PROMISC) == 0) {
227 		set_multicast_start(dev);
228 		netdev_for_each_mc_addr(ha, dev)
229 			set_multicast_one(dev, ha->addr);
230 		set_multicast_finish(dev);
231 	} else
232 		set_promiscuous_mode(dev);
233 }
234 
235 /*
236  * This function is called to start or restart the FEC during a link
237  * change.  This only happens when switching between half and full
238  * duplex.
239  */
240 static void restart(struct net_device *dev)
241 {
242 	struct fs_enet_private *fep = netdev_priv(dev);
243 	scc_t __iomem *sccp = fep->scc.sccp;
244 	scc_enet_t __iomem *ep = fep->scc.ep;
245 	const struct fs_platform_info *fpi = fep->fpi;
246 	u16 paddrh, paddrm, paddrl;
247 	const unsigned char *mac;
248 	int i;
249 
250 	C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
251 
252 	/* clear everything (slow & steady does it) */
253 	for (i = 0; i < sizeof(*ep); i++)
254 		__fs_out8((u8 __iomem *)ep + i, 0);
255 
256 	/* point to bds */
257 	W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
258 	W16(ep, sen_genscc.scc_tbase,
259 	    fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
260 
261 	/* Initialize function code registers for big-endian.
262 	 */
263 #ifndef CONFIG_NOT_COHERENT_CACHE
264 	W8(ep, sen_genscc.scc_rfcr, SCC_EB | SCC_GBL);
265 	W8(ep, sen_genscc.scc_tfcr, SCC_EB | SCC_GBL);
266 #else
267 	W8(ep, sen_genscc.scc_rfcr, SCC_EB);
268 	W8(ep, sen_genscc.scc_tfcr, SCC_EB);
269 #endif
270 
271 	/* Set maximum bytes per receive buffer.
272 	 * This appears to be an Ethernet frame size, not the buffer
273 	 * fragment size.  It must be a multiple of four.
274 	 */
275 	W16(ep, sen_genscc.scc_mrblr, 0x5f0);
276 
277 	/* Set CRC preset and mask.
278 	 */
279 	W32(ep, sen_cpres, 0xffffffff);
280 	W32(ep, sen_cmask, 0xdebb20e3);
281 
282 	W32(ep, sen_crcec, 0);	/* CRC Error counter */
283 	W32(ep, sen_alec, 0);	/* alignment error counter */
284 	W32(ep, sen_disfc, 0);	/* discard frame counter */
285 
286 	W16(ep, sen_pads, 0x8888);	/* Tx short frame pad character */
287 	W16(ep, sen_retlim, 15);	/* Retry limit threshold */
288 
289 	W16(ep, sen_maxflr, 0x5ee);	/* maximum frame length register */
290 
291 	W16(ep, sen_minflr, PKT_MINBUF_SIZE);	/* minimum frame length register */
292 
293 	W16(ep, sen_maxd1, 0x000005f0);	/* maximum DMA1 length */
294 	W16(ep, sen_maxd2, 0x000005f0);	/* maximum DMA2 length */
295 
296 	/* Clear hash tables.
297 	 */
298 	W16(ep, sen_gaddr1, 0);
299 	W16(ep, sen_gaddr2, 0);
300 	W16(ep, sen_gaddr3, 0);
301 	W16(ep, sen_gaddr4, 0);
302 	W16(ep, sen_iaddr1, 0);
303 	W16(ep, sen_iaddr2, 0);
304 	W16(ep, sen_iaddr3, 0);
305 	W16(ep, sen_iaddr4, 0);
306 
307 	/* set address
308 	 */
309 	mac = dev->dev_addr;
310 	paddrh = ((u16) mac[5] << 8) | mac[4];
311 	paddrm = ((u16) mac[3] << 8) | mac[2];
312 	paddrl = ((u16) mac[1] << 8) | mac[0];
313 
314 	W16(ep, sen_paddrh, paddrh);
315 	W16(ep, sen_paddrm, paddrm);
316 	W16(ep, sen_paddrl, paddrl);
317 
318 	W16(ep, sen_pper, 0);
319 	W16(ep, sen_taddrl, 0);
320 	W16(ep, sen_taddrm, 0);
321 	W16(ep, sen_taddrh, 0);
322 
323 	fs_init_bds(dev);
324 
325 	scc_cr_cmd(fep, CPM_CR_INIT_TRX);
326 
327 	W16(sccp, scc_scce, 0xffff);
328 
329 	/* Enable interrupts we wish to service.
330 	 */
331 	W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
332 
333 	/* Set GSMR_H to enable all normal operating modes.
334 	 * Set GSMR_L to enable Ethernet to MC68160.
335 	 */
336 	W32(sccp, scc_gsmrh, 0);
337 	W32(sccp, scc_gsmrl,
338 	    SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
339 	    SCC_GSMRL_MODE_ENET);
340 
341 	/* Set sync/delimiters.
342 	 */
343 	W16(sccp, scc_dsr, 0xd555);
344 
345 	/* Set processing mode.  Use Ethernet CRC, catch broadcast, and
346 	 * start frame search 22 bit times after RENA.
347 	 */
348 	W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
349 
350 	/* Set full duplex mode if needed */
351 	if (dev->phydev->duplex)
352 		S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
353 
354 	/* Restore multicast and promiscuous settings */
355 	set_multicast_list(dev);
356 
357 	S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
358 }
359 
360 static void stop(struct net_device *dev)
361 {
362 	struct fs_enet_private *fep = netdev_priv(dev);
363 	scc_t __iomem *sccp = fep->scc.sccp;
364 	int i;
365 
366 	for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
367 		udelay(1);
368 
369 	if (i == SCC_RESET_DELAY)
370 		dev_warn(fep->dev, "SCC timeout on graceful transmit stop\n");
371 
372 	W16(sccp, scc_sccm, 0);
373 	C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
374 
375 	fs_cleanup_bds(dev);
376 }
377 
378 static void napi_clear_event_fs(struct net_device *dev)
379 {
380 	struct fs_enet_private *fep = netdev_priv(dev);
381 	scc_t __iomem *sccp = fep->scc.sccp;
382 
383 	W16(sccp, scc_scce, SCC_NAPI_EVENT_MSK);
384 }
385 
386 static void napi_enable_fs(struct net_device *dev)
387 {
388 	struct fs_enet_private *fep = netdev_priv(dev);
389 	scc_t __iomem *sccp = fep->scc.sccp;
390 
391 	S16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
392 }
393 
394 static void napi_disable_fs(struct net_device *dev)
395 {
396 	struct fs_enet_private *fep = netdev_priv(dev);
397 	scc_t __iomem *sccp = fep->scc.sccp;
398 
399 	C16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
400 }
401 
402 static void rx_bd_done(struct net_device *dev)
403 {
404 	/* nothing */
405 }
406 
407 static void tx_kickstart(struct net_device *dev)
408 {
409 	/* nothing */
410 }
411 
412 static u32 get_int_events(struct net_device *dev)
413 {
414 	struct fs_enet_private *fep = netdev_priv(dev);
415 	scc_t __iomem *sccp = fep->scc.sccp;
416 
417 	return (u32) R16(sccp, scc_scce);
418 }
419 
420 static void clear_int_events(struct net_device *dev, u32 int_events)
421 {
422 	struct fs_enet_private *fep = netdev_priv(dev);
423 	scc_t __iomem *sccp = fep->scc.sccp;
424 
425 	W16(sccp, scc_scce, int_events & 0xffff);
426 }
427 
428 static void ev_error(struct net_device *dev, u32 int_events)
429 {
430 	struct fs_enet_private *fep = netdev_priv(dev);
431 
432 	dev_warn(fep->dev, "SCC ERROR(s) 0x%x\n", int_events);
433 }
434 
435 static int get_regs(struct net_device *dev, void *p, int *sizep)
436 {
437 	struct fs_enet_private *fep = netdev_priv(dev);
438 
439 	if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t __iomem *))
440 		return -EINVAL;
441 
442 	memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
443 	p = (char *)p + sizeof(scc_t);
444 
445 	memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t __iomem *));
446 
447 	return 0;
448 }
449 
450 static int get_regs_len(struct net_device *dev)
451 {
452 	return sizeof(scc_t) + sizeof(scc_enet_t __iomem *);
453 }
454 
455 static void tx_restart(struct net_device *dev)
456 {
457 	struct fs_enet_private *fep = netdev_priv(dev);
458 
459 	scc_cr_cmd(fep, CPM_CR_RESTART_TX);
460 }
461 
462 
463 
464 /*************************************************************************/
465 
466 const struct fs_ops fs_scc_ops = {
467 	.setup_data		= setup_data,
468 	.cleanup_data		= cleanup_data,
469 	.set_multicast_list	= set_multicast_list,
470 	.restart		= restart,
471 	.stop			= stop,
472 	.napi_clear_event	= napi_clear_event_fs,
473 	.napi_enable		= napi_enable_fs,
474 	.napi_disable		= napi_disable_fs,
475 	.rx_bd_done		= rx_bd_done,
476 	.tx_kickstart		= tx_kickstart,
477 	.get_int_events		= get_int_events,
478 	.clear_int_events	= clear_int_events,
479 	.ev_error		= ev_error,
480 	.get_regs		= get_regs,
481 	.get_regs_len		= get_regs_len,
482 	.tx_restart		= tx_restart,
483 	.allocate_bd		= allocate_bd,
484 	.free_bd		= free_bd,
485 };
486