1 /*
2  * Freescale Ethernet controllers
3  *
4  * Copyright (c) 2005 Intracom S.A.
5  *  by Pantelis Antoniou <panto@intracom.gr>
6  *
7  * 2005 (c) MontaVista Software, Inc.
8  * Vitaly Bordug <vbordug@ru.mvista.com>
9  *
10  * This file is licensed under the terms of the GNU General Public License
11  * version 2. This program is licensed "as is" without any warranty of any
12  * kind, whether express or implied.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/skbuff.h>
27 #include <linux/spinlock.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/bitops.h>
31 #include <linux/fs.h>
32 #include <linux/platform_device.h>
33 #include <linux/of_address.h>
34 #include <linux/of_device.h>
35 #include <linux/of_irq.h>
36 #include <linux/gfp.h>
37 
38 #include <asm/irq.h>
39 #include <asm/uaccess.h>
40 
41 #ifdef CONFIG_8xx
42 #include <asm/8xx_immap.h>
43 #include <asm/pgtable.h>
44 #include <asm/mpc8xx.h>
45 #include <asm/cpm1.h>
46 #endif
47 
48 #include "fs_enet.h"
49 #include "fec.h"
50 
51 /*************************************************/
52 
53 #if defined(CONFIG_CPM1)
54 /* for a CPM1 __raw_xxx's are sufficient */
55 #define __fs_out32(addr, x)	__raw_writel(x, addr)
56 #define __fs_out16(addr, x)	__raw_writew(x, addr)
57 #define __fs_in32(addr)	__raw_readl(addr)
58 #define __fs_in16(addr)	__raw_readw(addr)
59 #else
60 /* for others play it safe */
61 #define __fs_out32(addr, x)	out_be32(addr, x)
62 #define __fs_out16(addr, x)	out_be16(addr, x)
63 #define __fs_in32(addr)	in_be32(addr)
64 #define __fs_in16(addr)	in_be16(addr)
65 #endif
66 
67 /* write */
68 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
69 
70 /* read */
71 #define FR(_fecp, _reg)	__fs_in32(&(_fecp)->fec_ ## _reg)
72 
73 /* set bits */
74 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
75 
76 /* clear bits */
77 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
78 
79 /*
80  * Delay to wait for FEC reset command to complete (in us)
81  */
82 #define FEC_RESET_DELAY		50
83 
84 static int whack_reset(struct fec __iomem *fecp)
85 {
86 	int i;
87 
88 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
89 	for (i = 0; i < FEC_RESET_DELAY; i++) {
90 		if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
91 			return 0;	/* OK */
92 		udelay(1);
93 	}
94 
95 	return -1;
96 }
97 
98 static int do_pd_setup(struct fs_enet_private *fep)
99 {
100 	struct platform_device *ofdev = to_platform_device(fep->dev);
101 
102 	fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
103 	if (fep->interrupt == NO_IRQ)
104 		return -EINVAL;
105 
106 	fep->fec.fecp = of_iomap(ofdev->dev.of_node, 0);
107 	if (!fep->fcc.fccp)
108 		return -EINVAL;
109 
110 	return 0;
111 }
112 
113 #define FEC_NAPI_RX_EVENT_MSK	(FEC_ENET_RXF | FEC_ENET_RXB)
114 #define FEC_RX_EVENT		(FEC_ENET_RXF)
115 #define FEC_TX_EVENT		(FEC_ENET_TXF)
116 #define FEC_ERR_EVENT_MSK	(FEC_ENET_HBERR | FEC_ENET_BABR | \
117 				 FEC_ENET_BABT | FEC_ENET_EBERR)
118 
119 static int setup_data(struct net_device *dev)
120 {
121 	struct fs_enet_private *fep = netdev_priv(dev);
122 
123 	if (do_pd_setup(fep) != 0)
124 		return -EINVAL;
125 
126 	fep->fec.hthi = 0;
127 	fep->fec.htlo = 0;
128 
129 	fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
130 	fep->ev_rx = FEC_RX_EVENT;
131 	fep->ev_tx = FEC_TX_EVENT;
132 	fep->ev_err = FEC_ERR_EVENT_MSK;
133 
134 	return 0;
135 }
136 
137 static int allocate_bd(struct net_device *dev)
138 {
139 	struct fs_enet_private *fep = netdev_priv(dev);
140 	const struct fs_platform_info *fpi = fep->fpi;
141 
142 	fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
143 					    (fpi->tx_ring + fpi->rx_ring) *
144 					    sizeof(cbd_t), &fep->ring_mem_addr,
145 					    GFP_KERNEL);
146 	if (fep->ring_base == NULL)
147 		return -ENOMEM;
148 
149 	return 0;
150 }
151 
152 static void free_bd(struct net_device *dev)
153 {
154 	struct fs_enet_private *fep = netdev_priv(dev);
155 	const struct fs_platform_info *fpi = fep->fpi;
156 
157 	if(fep->ring_base)
158 		dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
159 					* sizeof(cbd_t),
160 					(void __force *)fep->ring_base,
161 					fep->ring_mem_addr);
162 }
163 
164 static void cleanup_data(struct net_device *dev)
165 {
166 	/* nothing */
167 }
168 
169 static void set_promiscuous_mode(struct net_device *dev)
170 {
171 	struct fs_enet_private *fep = netdev_priv(dev);
172 	struct fec __iomem *fecp = fep->fec.fecp;
173 
174 	FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
175 }
176 
177 static void set_multicast_start(struct net_device *dev)
178 {
179 	struct fs_enet_private *fep = netdev_priv(dev);
180 
181 	fep->fec.hthi = 0;
182 	fep->fec.htlo = 0;
183 }
184 
185 static void set_multicast_one(struct net_device *dev, const u8 *mac)
186 {
187 	struct fs_enet_private *fep = netdev_priv(dev);
188 	int temp, hash_index, i, j;
189 	u32 crc, csrVal;
190 	u8 byte, msb;
191 
192 	crc = 0xffffffff;
193 	for (i = 0; i < 6; i++) {
194 		byte = mac[i];
195 		for (j = 0; j < 8; j++) {
196 			msb = crc >> 31;
197 			crc <<= 1;
198 			if (msb ^ (byte & 0x1))
199 				crc ^= FEC_CRC_POLY;
200 			byte >>= 1;
201 		}
202 	}
203 
204 	temp = (crc & 0x3f) >> 1;
205 	hash_index = ((temp & 0x01) << 4) |
206 		     ((temp & 0x02) << 2) |
207 		     ((temp & 0x04)) |
208 		     ((temp & 0x08) >> 2) |
209 		     ((temp & 0x10) >> 4);
210 	csrVal = 1 << hash_index;
211 	if (crc & 1)
212 		fep->fec.hthi |= csrVal;
213 	else
214 		fep->fec.htlo |= csrVal;
215 }
216 
217 static void set_multicast_finish(struct net_device *dev)
218 {
219 	struct fs_enet_private *fep = netdev_priv(dev);
220 	struct fec __iomem *fecp = fep->fec.fecp;
221 
222 	/* if all multi or too many multicasts; just enable all */
223 	if ((dev->flags & IFF_ALLMULTI) != 0 ||
224 	    netdev_mc_count(dev) > FEC_MAX_MULTICAST_ADDRS) {
225 		fep->fec.hthi = 0xffffffffU;
226 		fep->fec.htlo = 0xffffffffU;
227 	}
228 
229 	FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
230 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
231 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
232 }
233 
234 static void set_multicast_list(struct net_device *dev)
235 {
236 	struct netdev_hw_addr *ha;
237 
238 	if ((dev->flags & IFF_PROMISC) == 0) {
239 		set_multicast_start(dev);
240 		netdev_for_each_mc_addr(ha, dev)
241 			set_multicast_one(dev, ha->addr);
242 		set_multicast_finish(dev);
243 	} else
244 		set_promiscuous_mode(dev);
245 }
246 
247 static void restart(struct net_device *dev)
248 {
249 	struct fs_enet_private *fep = netdev_priv(dev);
250 	struct fec __iomem *fecp = fep->fec.fecp;
251 	const struct fs_platform_info *fpi = fep->fpi;
252 	dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
253 	int r;
254 	u32 addrhi, addrlo;
255 
256 	struct mii_bus* mii = fep->phydev->bus;
257 	struct fec_info* fec_inf = mii->priv;
258 
259 	r = whack_reset(fep->fec.fecp);
260 	if (r != 0)
261 		dev_err(fep->dev, "FEC Reset FAILED!\n");
262 	/*
263 	 * Set station address.
264 	 */
265 	addrhi = ((u32) dev->dev_addr[0] << 24) |
266 		 ((u32) dev->dev_addr[1] << 16) |
267 		 ((u32) dev->dev_addr[2] <<  8) |
268 		  (u32) dev->dev_addr[3];
269 	addrlo = ((u32) dev->dev_addr[4] << 24) |
270 		 ((u32) dev->dev_addr[5] << 16);
271 	FW(fecp, addr_low, addrhi);
272 	FW(fecp, addr_high, addrlo);
273 
274 	/*
275 	 * Reset all multicast.
276 	 */
277 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
278 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
279 
280 	/*
281 	 * Set maximum receive buffer size.
282 	 */
283 	FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
284 #ifdef CONFIG_FS_ENET_MPC5121_FEC
285 	FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16);
286 #else
287 	FW(fecp, r_hash, PKT_MAXBUF_SIZE);
288 #endif
289 
290 	/* get physical address */
291 	rx_bd_base_phys = fep->ring_mem_addr;
292 	tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
293 
294 	/*
295 	 * Set receive and transmit descriptor base.
296 	 */
297 	FW(fecp, r_des_start, rx_bd_base_phys);
298 	FW(fecp, x_des_start, tx_bd_base_phys);
299 
300 	fs_init_bds(dev);
301 
302 	/*
303 	 * Enable big endian and don't care about SDMA FC.
304 	 */
305 #ifdef CONFIG_FS_ENET_MPC5121_FEC
306 	FS(fecp, dma_control, 0xC0000000);
307 #else
308 	FW(fecp, fun_code, 0x78000000);
309 #endif
310 
311 	/*
312 	 * Set MII speed.
313 	 */
314 	FW(fecp, mii_speed, fec_inf->mii_speed);
315 
316 	/*
317 	 * Clear any outstanding interrupt.
318 	 */
319 	FW(fecp, ievent, 0xffc0);
320 #ifndef CONFIG_FS_ENET_MPC5121_FEC
321 	FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
322 
323 	FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE);	/* MII enable */
324 #else
325 	/*
326 	 * Only set MII/RMII mode - do not touch maximum frame length
327 	 * configured before.
328 	 */
329 	FS(fecp, r_cntrl, fpi->use_rmii ?
330 			FEC_RCNTRL_RMII_MODE : FEC_RCNTRL_MII_MODE);
331 #endif
332 	/*
333 	 * adjust to duplex mode
334 	 */
335 	if (fep->phydev->duplex) {
336 		FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
337 		FS(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD enable */
338 	} else {
339 		FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
340 		FC(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD disable */
341 	}
342 
343 	/*
344 	 * Enable interrupts we wish to service.
345 	 */
346 	FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
347 	   FEC_ENET_RXF | FEC_ENET_RXB);
348 
349 	/*
350 	 * And last, enable the transmit and receive processing.
351 	 */
352 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
353 	FW(fecp, r_des_active, 0x01000000);
354 }
355 
356 static void stop(struct net_device *dev)
357 {
358 	struct fs_enet_private *fep = netdev_priv(dev);
359 	const struct fs_platform_info *fpi = fep->fpi;
360 	struct fec __iomem *fecp = fep->fec.fecp;
361 
362 	struct fec_info* feci= fep->phydev->bus->priv;
363 
364 	int i;
365 
366 	if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
367 		return;		/* already down */
368 
369 	FW(fecp, x_cntrl, 0x01);	/* Graceful transmit stop */
370 	for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
371 	     i < FEC_RESET_DELAY; i++)
372 		udelay(1);
373 
374 	if (i == FEC_RESET_DELAY)
375 		dev_warn(fep->dev, "FEC timeout on graceful transmit stop\n");
376 	/*
377 	 * Disable FEC. Let only MII interrupts.
378 	 */
379 	FW(fecp, imask, 0);
380 	FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
381 
382 	fs_cleanup_bds(dev);
383 
384 	/* shut down FEC1? that's where the mii bus is */
385 	if (fpi->has_phy) {
386 		FS(fecp, r_cntrl, fpi->use_rmii ?
387 				FEC_RCNTRL_RMII_MODE :
388 				FEC_RCNTRL_MII_MODE);	/* MII/RMII enable */
389 		FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
390 		FW(fecp, ievent, FEC_ENET_MII);
391 		FW(fecp, mii_speed, feci->mii_speed);
392 	}
393 }
394 
395 static void napi_clear_rx_event(struct net_device *dev)
396 {
397 	struct fs_enet_private *fep = netdev_priv(dev);
398 	struct fec __iomem *fecp = fep->fec.fecp;
399 
400 	FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
401 }
402 
403 static void napi_enable_rx(struct net_device *dev)
404 {
405 	struct fs_enet_private *fep = netdev_priv(dev);
406 	struct fec __iomem *fecp = fep->fec.fecp;
407 
408 	FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
409 }
410 
411 static void napi_disable_rx(struct net_device *dev)
412 {
413 	struct fs_enet_private *fep = netdev_priv(dev);
414 	struct fec __iomem *fecp = fep->fec.fecp;
415 
416 	FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
417 }
418 
419 static void rx_bd_done(struct net_device *dev)
420 {
421 	struct fs_enet_private *fep = netdev_priv(dev);
422 	struct fec __iomem *fecp = fep->fec.fecp;
423 
424 	FW(fecp, r_des_active, 0x01000000);
425 }
426 
427 static void tx_kickstart(struct net_device *dev)
428 {
429 	struct fs_enet_private *fep = netdev_priv(dev);
430 	struct fec __iomem *fecp = fep->fec.fecp;
431 
432 	FW(fecp, x_des_active, 0x01000000);
433 }
434 
435 static u32 get_int_events(struct net_device *dev)
436 {
437 	struct fs_enet_private *fep = netdev_priv(dev);
438 	struct fec __iomem *fecp = fep->fec.fecp;
439 
440 	return FR(fecp, ievent) & FR(fecp, imask);
441 }
442 
443 static void clear_int_events(struct net_device *dev, u32 int_events)
444 {
445 	struct fs_enet_private *fep = netdev_priv(dev);
446 	struct fec __iomem *fecp = fep->fec.fecp;
447 
448 	FW(fecp, ievent, int_events);
449 }
450 
451 static void ev_error(struct net_device *dev, u32 int_events)
452 {
453 	struct fs_enet_private *fep = netdev_priv(dev);
454 
455 	dev_warn(fep->dev, "FEC ERROR(s) 0x%x\n", int_events);
456 }
457 
458 static int get_regs(struct net_device *dev, void *p, int *sizep)
459 {
460 	struct fs_enet_private *fep = netdev_priv(dev);
461 
462 	if (*sizep < sizeof(struct fec))
463 		return -EINVAL;
464 
465 	memcpy_fromio(p, fep->fec.fecp, sizeof(struct fec));
466 
467 	return 0;
468 }
469 
470 static int get_regs_len(struct net_device *dev)
471 {
472 	return sizeof(struct fec);
473 }
474 
475 static void tx_restart(struct net_device *dev)
476 {
477 	/* nothing */
478 }
479 
480 /*************************************************************************/
481 
482 const struct fs_ops fs_fec_ops = {
483 	.setup_data		= setup_data,
484 	.cleanup_data		= cleanup_data,
485 	.set_multicast_list	= set_multicast_list,
486 	.restart		= restart,
487 	.stop			= stop,
488 	.napi_clear_rx_event	= napi_clear_rx_event,
489 	.napi_enable_rx		= napi_enable_rx,
490 	.napi_disable_rx	= napi_disable_rx,
491 	.rx_bd_done		= rx_bd_done,
492 	.tx_kickstart		= tx_kickstart,
493 	.get_int_events		= get_int_events,
494 	.clear_int_events	= clear_int_events,
495 	.ev_error		= ev_error,
496 	.get_regs		= get_regs,
497 	.get_regs_len		= get_regs_len,
498 	.tx_restart		= tx_restart,
499 	.allocate_bd		= allocate_bd,
500 	.free_bd		= free_bd,
501 };
502 
503