1 /*
2  * Freescale Ethernet controllers
3  *
4  * Copyright (c) 2005 Intracom S.A.
5  *  by Pantelis Antoniou <panto@intracom.gr>
6  *
7  * 2005 (c) MontaVista Software, Inc.
8  * Vitaly Bordug <vbordug@ru.mvista.com>
9  *
10  * This file is licensed under the terms of the GNU General Public License
11  * version 2. This program is licensed "as is" without any warranty of any
12  * kind, whether express or implied.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/skbuff.h>
27 #include <linux/spinlock.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/bitops.h>
31 #include <linux/fs.h>
32 #include <linux/platform_device.h>
33 #include <linux/of_address.h>
34 #include <linux/of_device.h>
35 #include <linux/of_irq.h>
36 #include <linux/gfp.h>
37 
38 #include <asm/irq.h>
39 #include <asm/uaccess.h>
40 
41 #ifdef CONFIG_8xx
42 #include <asm/8xx_immap.h>
43 #include <asm/pgtable.h>
44 #include <asm/cpm1.h>
45 #endif
46 
47 #include "fs_enet.h"
48 #include "fec.h"
49 
50 /*************************************************/
51 
52 #if defined(CONFIG_CPM1)
53 /* for a CPM1 __raw_xxx's are sufficient */
54 #define __fs_out32(addr, x)	__raw_writel(x, addr)
55 #define __fs_out16(addr, x)	__raw_writew(x, addr)
56 #define __fs_in32(addr)	__raw_readl(addr)
57 #define __fs_in16(addr)	__raw_readw(addr)
58 #else
59 /* for others play it safe */
60 #define __fs_out32(addr, x)	out_be32(addr, x)
61 #define __fs_out16(addr, x)	out_be16(addr, x)
62 #define __fs_in32(addr)	in_be32(addr)
63 #define __fs_in16(addr)	in_be16(addr)
64 #endif
65 
66 /* write */
67 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
68 
69 /* read */
70 #define FR(_fecp, _reg)	__fs_in32(&(_fecp)->fec_ ## _reg)
71 
72 /* set bits */
73 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
74 
75 /* clear bits */
76 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
77 
78 /*
79  * Delay to wait for FEC reset command to complete (in us)
80  */
81 #define FEC_RESET_DELAY		50
82 
83 static int whack_reset(struct fec __iomem *fecp)
84 {
85 	int i;
86 
87 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
88 	for (i = 0; i < FEC_RESET_DELAY; i++) {
89 		if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
90 			return 0;	/* OK */
91 		udelay(1);
92 	}
93 
94 	return -1;
95 }
96 
97 static int do_pd_setup(struct fs_enet_private *fep)
98 {
99 	struct platform_device *ofdev = to_platform_device(fep->dev);
100 
101 	fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
102 	if (fep->interrupt == NO_IRQ)
103 		return -EINVAL;
104 
105 	fep->fec.fecp = of_iomap(ofdev->dev.of_node, 0);
106 	if (!fep->fcc.fccp)
107 		return -EINVAL;
108 
109 	return 0;
110 }
111 
112 #define FEC_NAPI_EVENT_MSK	(FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_TXF)
113 #define FEC_EVENT		(FEC_ENET_RXF | FEC_ENET_TXF)
114 #define FEC_ERR_EVENT_MSK	(FEC_ENET_HBERR | FEC_ENET_BABR | \
115 				 FEC_ENET_BABT | FEC_ENET_EBERR)
116 
117 static int setup_data(struct net_device *dev)
118 {
119 	struct fs_enet_private *fep = netdev_priv(dev);
120 
121 	if (do_pd_setup(fep) != 0)
122 		return -EINVAL;
123 
124 	fep->fec.hthi = 0;
125 	fep->fec.htlo = 0;
126 
127 	fep->ev_napi = FEC_NAPI_EVENT_MSK;
128 	fep->ev = FEC_EVENT;
129 	fep->ev_err = FEC_ERR_EVENT_MSK;
130 
131 	return 0;
132 }
133 
134 static int allocate_bd(struct net_device *dev)
135 {
136 	struct fs_enet_private *fep = netdev_priv(dev);
137 	const struct fs_platform_info *fpi = fep->fpi;
138 
139 	fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
140 					    (fpi->tx_ring + fpi->rx_ring) *
141 					    sizeof(cbd_t), &fep->ring_mem_addr,
142 					    GFP_KERNEL);
143 	if (fep->ring_base == NULL)
144 		return -ENOMEM;
145 
146 	return 0;
147 }
148 
149 static void free_bd(struct net_device *dev)
150 {
151 	struct fs_enet_private *fep = netdev_priv(dev);
152 	const struct fs_platform_info *fpi = fep->fpi;
153 
154 	if(fep->ring_base)
155 		dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
156 					* sizeof(cbd_t),
157 					(void __force *)fep->ring_base,
158 					fep->ring_mem_addr);
159 }
160 
161 static void cleanup_data(struct net_device *dev)
162 {
163 	/* nothing */
164 }
165 
166 static void set_promiscuous_mode(struct net_device *dev)
167 {
168 	struct fs_enet_private *fep = netdev_priv(dev);
169 	struct fec __iomem *fecp = fep->fec.fecp;
170 
171 	FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
172 }
173 
174 static void set_multicast_start(struct net_device *dev)
175 {
176 	struct fs_enet_private *fep = netdev_priv(dev);
177 
178 	fep->fec.hthi = 0;
179 	fep->fec.htlo = 0;
180 }
181 
182 static void set_multicast_one(struct net_device *dev, const u8 *mac)
183 {
184 	struct fs_enet_private *fep = netdev_priv(dev);
185 	int temp, hash_index, i, j;
186 	u32 crc, csrVal;
187 	u8 byte, msb;
188 
189 	crc = 0xffffffff;
190 	for (i = 0; i < 6; i++) {
191 		byte = mac[i];
192 		for (j = 0; j < 8; j++) {
193 			msb = crc >> 31;
194 			crc <<= 1;
195 			if (msb ^ (byte & 0x1))
196 				crc ^= FEC_CRC_POLY;
197 			byte >>= 1;
198 		}
199 	}
200 
201 	temp = (crc & 0x3f) >> 1;
202 	hash_index = ((temp & 0x01) << 4) |
203 		     ((temp & 0x02) << 2) |
204 		     ((temp & 0x04)) |
205 		     ((temp & 0x08) >> 2) |
206 		     ((temp & 0x10) >> 4);
207 	csrVal = 1 << hash_index;
208 	if (crc & 1)
209 		fep->fec.hthi |= csrVal;
210 	else
211 		fep->fec.htlo |= csrVal;
212 }
213 
214 static void set_multicast_finish(struct net_device *dev)
215 {
216 	struct fs_enet_private *fep = netdev_priv(dev);
217 	struct fec __iomem *fecp = fep->fec.fecp;
218 
219 	/* if all multi or too many multicasts; just enable all */
220 	if ((dev->flags & IFF_ALLMULTI) != 0 ||
221 	    netdev_mc_count(dev) > FEC_MAX_MULTICAST_ADDRS) {
222 		fep->fec.hthi = 0xffffffffU;
223 		fep->fec.htlo = 0xffffffffU;
224 	}
225 
226 	FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
227 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
228 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
229 }
230 
231 static void set_multicast_list(struct net_device *dev)
232 {
233 	struct netdev_hw_addr *ha;
234 
235 	if ((dev->flags & IFF_PROMISC) == 0) {
236 		set_multicast_start(dev);
237 		netdev_for_each_mc_addr(ha, dev)
238 			set_multicast_one(dev, ha->addr);
239 		set_multicast_finish(dev);
240 	} else
241 		set_promiscuous_mode(dev);
242 }
243 
244 static void restart(struct net_device *dev)
245 {
246 	struct fs_enet_private *fep = netdev_priv(dev);
247 	struct fec __iomem *fecp = fep->fec.fecp;
248 	const struct fs_platform_info *fpi = fep->fpi;
249 	dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
250 	int r;
251 	u32 addrhi, addrlo;
252 
253 	struct mii_bus *mii = dev->phydev->mdio.bus;
254 	struct fec_info* fec_inf = mii->priv;
255 
256 	r = whack_reset(fep->fec.fecp);
257 	if (r != 0)
258 		dev_err(fep->dev, "FEC Reset FAILED!\n");
259 	/*
260 	 * Set station address.
261 	 */
262 	addrhi = ((u32) dev->dev_addr[0] << 24) |
263 		 ((u32) dev->dev_addr[1] << 16) |
264 		 ((u32) dev->dev_addr[2] <<  8) |
265 		  (u32) dev->dev_addr[3];
266 	addrlo = ((u32) dev->dev_addr[4] << 24) |
267 		 ((u32) dev->dev_addr[5] << 16);
268 	FW(fecp, addr_low, addrhi);
269 	FW(fecp, addr_high, addrlo);
270 
271 	/*
272 	 * Reset all multicast.
273 	 */
274 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
275 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
276 
277 	/*
278 	 * Set maximum receive buffer size.
279 	 */
280 	FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
281 #ifdef CONFIG_FS_ENET_MPC5121_FEC
282 	FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16);
283 #else
284 	FW(fecp, r_hash, PKT_MAXBUF_SIZE);
285 #endif
286 
287 	/* get physical address */
288 	rx_bd_base_phys = fep->ring_mem_addr;
289 	tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
290 
291 	/*
292 	 * Set receive and transmit descriptor base.
293 	 */
294 	FW(fecp, r_des_start, rx_bd_base_phys);
295 	FW(fecp, x_des_start, tx_bd_base_phys);
296 
297 	fs_init_bds(dev);
298 
299 	/*
300 	 * Enable big endian and don't care about SDMA FC.
301 	 */
302 #ifdef CONFIG_FS_ENET_MPC5121_FEC
303 	FS(fecp, dma_control, 0xC0000000);
304 #else
305 	FW(fecp, fun_code, 0x78000000);
306 #endif
307 
308 	/*
309 	 * Set MII speed.
310 	 */
311 	FW(fecp, mii_speed, fec_inf->mii_speed);
312 
313 	/*
314 	 * Clear any outstanding interrupt.
315 	 */
316 	FW(fecp, ievent, 0xffc0);
317 #ifndef CONFIG_FS_ENET_MPC5121_FEC
318 	FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
319 
320 	FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE);	/* MII enable */
321 #else
322 	/*
323 	 * Only set MII/RMII mode - do not touch maximum frame length
324 	 * configured before.
325 	 */
326 	FS(fecp, r_cntrl, fpi->use_rmii ?
327 			FEC_RCNTRL_RMII_MODE : FEC_RCNTRL_MII_MODE);
328 #endif
329 	/*
330 	 * adjust to duplex mode
331 	 */
332 	if (dev->phydev->duplex) {
333 		FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
334 		FS(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD enable */
335 	} else {
336 		FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
337 		FC(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD disable */
338 	}
339 
340 	/* Restore multicast and promiscuous settings */
341 	set_multicast_list(dev);
342 
343 	/*
344 	 * Enable interrupts we wish to service.
345 	 */
346 	FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
347 	   FEC_ENET_RXF | FEC_ENET_RXB);
348 
349 	/*
350 	 * And last, enable the transmit and receive processing.
351 	 */
352 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
353 	FW(fecp, r_des_active, 0x01000000);
354 }
355 
356 static void stop(struct net_device *dev)
357 {
358 	struct fs_enet_private *fep = netdev_priv(dev);
359 	const struct fs_platform_info *fpi = fep->fpi;
360 	struct fec __iomem *fecp = fep->fec.fecp;
361 
362 	struct fec_info *feci = dev->phydev->mdio.bus->priv;
363 
364 	int i;
365 
366 	if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
367 		return;		/* already down */
368 
369 	FW(fecp, x_cntrl, 0x01);	/* Graceful transmit stop */
370 	for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
371 	     i < FEC_RESET_DELAY; i++)
372 		udelay(1);
373 
374 	if (i == FEC_RESET_DELAY)
375 		dev_warn(fep->dev, "FEC timeout on graceful transmit stop\n");
376 	/*
377 	 * Disable FEC. Let only MII interrupts.
378 	 */
379 	FW(fecp, imask, 0);
380 	FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
381 
382 	fs_cleanup_bds(dev);
383 
384 	/* shut down FEC1? that's where the mii bus is */
385 	if (fpi->has_phy) {
386 		FS(fecp, r_cntrl, fpi->use_rmii ?
387 				FEC_RCNTRL_RMII_MODE :
388 				FEC_RCNTRL_MII_MODE);	/* MII/RMII enable */
389 		FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
390 		FW(fecp, ievent, FEC_ENET_MII);
391 		FW(fecp, mii_speed, feci->mii_speed);
392 	}
393 }
394 
395 static void napi_clear_event_fs(struct net_device *dev)
396 {
397 	struct fs_enet_private *fep = netdev_priv(dev);
398 	struct fec __iomem *fecp = fep->fec.fecp;
399 
400 	FW(fecp, ievent, FEC_NAPI_EVENT_MSK);
401 }
402 
403 static void napi_enable_fs(struct net_device *dev)
404 {
405 	struct fs_enet_private *fep = netdev_priv(dev);
406 	struct fec __iomem *fecp = fep->fec.fecp;
407 
408 	FS(fecp, imask, FEC_NAPI_EVENT_MSK);
409 }
410 
411 static void napi_disable_fs(struct net_device *dev)
412 {
413 	struct fs_enet_private *fep = netdev_priv(dev);
414 	struct fec __iomem *fecp = fep->fec.fecp;
415 
416 	FC(fecp, imask, FEC_NAPI_EVENT_MSK);
417 }
418 
419 static void rx_bd_done(struct net_device *dev)
420 {
421 	struct fs_enet_private *fep = netdev_priv(dev);
422 	struct fec __iomem *fecp = fep->fec.fecp;
423 
424 	FW(fecp, r_des_active, 0x01000000);
425 }
426 
427 static void tx_kickstart(struct net_device *dev)
428 {
429 	struct fs_enet_private *fep = netdev_priv(dev);
430 	struct fec __iomem *fecp = fep->fec.fecp;
431 
432 	FW(fecp, x_des_active, 0x01000000);
433 }
434 
435 static u32 get_int_events(struct net_device *dev)
436 {
437 	struct fs_enet_private *fep = netdev_priv(dev);
438 	struct fec __iomem *fecp = fep->fec.fecp;
439 
440 	return FR(fecp, ievent) & FR(fecp, imask);
441 }
442 
443 static void clear_int_events(struct net_device *dev, u32 int_events)
444 {
445 	struct fs_enet_private *fep = netdev_priv(dev);
446 	struct fec __iomem *fecp = fep->fec.fecp;
447 
448 	FW(fecp, ievent, int_events);
449 }
450 
451 static void ev_error(struct net_device *dev, u32 int_events)
452 {
453 	struct fs_enet_private *fep = netdev_priv(dev);
454 
455 	dev_warn(fep->dev, "FEC ERROR(s) 0x%x\n", int_events);
456 }
457 
458 static int get_regs(struct net_device *dev, void *p, int *sizep)
459 {
460 	struct fs_enet_private *fep = netdev_priv(dev);
461 
462 	if (*sizep < sizeof(struct fec))
463 		return -EINVAL;
464 
465 	memcpy_fromio(p, fep->fec.fecp, sizeof(struct fec));
466 
467 	return 0;
468 }
469 
470 static int get_regs_len(struct net_device *dev)
471 {
472 	return sizeof(struct fec);
473 }
474 
475 static void tx_restart(struct net_device *dev)
476 {
477 	/* nothing */
478 }
479 
480 /*************************************************************************/
481 
482 const struct fs_ops fs_fec_ops = {
483 	.setup_data		= setup_data,
484 	.cleanup_data		= cleanup_data,
485 	.set_multicast_list	= set_multicast_list,
486 	.restart		= restart,
487 	.stop			= stop,
488 	.napi_clear_event	= napi_clear_event_fs,
489 	.napi_enable		= napi_enable_fs,
490 	.napi_disable		= napi_disable_fs,
491 	.rx_bd_done		= rx_bd_done,
492 	.tx_kickstart		= tx_kickstart,
493 	.get_int_events		= get_int_events,
494 	.clear_int_events	= clear_int_events,
495 	.ev_error		= ev_error,
496 	.get_regs		= get_regs,
497 	.get_regs_len		= get_regs_len,
498 	.tx_restart		= tx_restart,
499 	.allocate_bd		= allocate_bd,
500 	.free_bd		= free_bd,
501 };
502 
503