1 /* 2 * Copyright 2008-2015 Freescale Semiconductor Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* FM MAC ... */ 34 #ifndef __FM_MAC_H 35 #define __FM_MAC_H 36 37 #include "fman.h" 38 39 #include <linux/slab.h> 40 #include <linux/phy.h> 41 #include <linux/if_ether.h> 42 43 struct fman_mac; 44 45 /* Ethernet Address */ 46 typedef u8 enet_addr_t[ETH_ALEN]; 47 48 #define ENET_ADDR_TO_UINT64(_enet_addr) \ 49 (u64)(((u64)(_enet_addr)[0] << 40) | \ 50 ((u64)(_enet_addr)[1] << 32) | \ 51 ((u64)(_enet_addr)[2] << 24) | \ 52 ((u64)(_enet_addr)[3] << 16) | \ 53 ((u64)(_enet_addr)[4] << 8) | \ 54 ((u64)(_enet_addr)[5])) 55 56 #define MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enet_addr) \ 57 do { \ 58 int i; \ 59 for (i = 0; i < ETH_ALEN; i++) \ 60 (_enet_addr)[i] = \ 61 (u8)((_addr64) >> ((5 - i) * 8)); \ 62 } while (0) 63 64 /* defaults */ 65 #define DEFAULT_RESET_ON_INIT false 66 67 /* PFC defines */ 68 #define FSL_FM_PAUSE_TIME_ENABLE 0xf000 69 #define FSL_FM_PAUSE_TIME_DISABLE 0 70 #define FSL_FM_PAUSE_THRESH_DEFAULT 0 71 72 #define FM_MAC_NO_PFC 0xff 73 74 /* HASH defines */ 75 #define ETH_HASH_ENTRY_OBJ(ptr) \ 76 hlist_entry_safe(ptr, struct eth_hash_entry, node) 77 78 /* FM MAC Exceptions */ 79 enum fman_mac_exceptions { 80 FM_MAC_EX_10G_MDIO_SCAN_EVENT = 0 81 /* 10GEC MDIO scan event interrupt */ 82 , FM_MAC_EX_10G_MDIO_CMD_CMPL 83 /* 10GEC MDIO command completion interrupt */ 84 , FM_MAC_EX_10G_REM_FAULT 85 /* 10GEC, mEMAC Remote fault interrupt */ 86 , FM_MAC_EX_10G_LOC_FAULT 87 /* 10GEC, mEMAC Local fault interrupt */ 88 , FM_MAC_EX_10G_TX_ECC_ER 89 /* 10GEC, mEMAC Transmit frame ECC error interrupt */ 90 , FM_MAC_EX_10G_TX_FIFO_UNFL 91 /* 10GEC, mEMAC Transmit FIFO underflow interrupt */ 92 , FM_MAC_EX_10G_TX_FIFO_OVFL 93 /* 10GEC, mEMAC Transmit FIFO overflow interrupt */ 94 , FM_MAC_EX_10G_TX_ER 95 /* 10GEC Transmit frame error interrupt */ 96 , FM_MAC_EX_10G_RX_FIFO_OVFL 97 /* 10GEC, mEMAC Receive FIFO overflow interrupt */ 98 , FM_MAC_EX_10G_RX_ECC_ER 99 /* 10GEC, mEMAC Receive frame ECC error interrupt */ 100 , FM_MAC_EX_10G_RX_JAB_FRM 101 /* 10GEC Receive jabber frame interrupt */ 102 , FM_MAC_EX_10G_RX_OVRSZ_FRM 103 /* 10GEC Receive oversized frame interrupt */ 104 , FM_MAC_EX_10G_RX_RUNT_FRM 105 /* 10GEC Receive runt frame interrupt */ 106 , FM_MAC_EX_10G_RX_FRAG_FRM 107 /* 10GEC Receive fragment frame interrupt */ 108 , FM_MAC_EX_10G_RX_LEN_ER 109 /* 10GEC Receive payload length error interrupt */ 110 , FM_MAC_EX_10G_RX_CRC_ER 111 /* 10GEC Receive CRC error interrupt */ 112 , FM_MAC_EX_10G_RX_ALIGN_ER 113 /* 10GEC Receive alignment error interrupt */ 114 , FM_MAC_EX_1G_BAB_RX 115 /* dTSEC Babbling receive error */ 116 , FM_MAC_EX_1G_RX_CTL 117 /* dTSEC Receive control (pause frame) interrupt */ 118 , FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET 119 /* dTSEC Graceful transmit stop complete */ 120 , FM_MAC_EX_1G_BAB_TX 121 /* dTSEC Babbling transmit error */ 122 , FM_MAC_EX_1G_TX_CTL 123 /* dTSEC Transmit control (pause frame) interrupt */ 124 , FM_MAC_EX_1G_TX_ERR 125 /* dTSEC Transmit error */ 126 , FM_MAC_EX_1G_LATE_COL 127 /* dTSEC Late collision */ 128 , FM_MAC_EX_1G_COL_RET_LMT 129 /* dTSEC Collision retry limit */ 130 , FM_MAC_EX_1G_TX_FIFO_UNDRN 131 /* dTSEC Transmit FIFO underrun */ 132 , FM_MAC_EX_1G_MAG_PCKT 133 /* dTSEC Magic Packet detection */ 134 , FM_MAC_EX_1G_MII_MNG_RD_COMPLET 135 /* dTSEC MII management read completion */ 136 , FM_MAC_EX_1G_MII_MNG_WR_COMPLET 137 /* dTSEC MII management write completion */ 138 , FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET 139 /* dTSEC Graceful receive stop complete */ 140 , FM_MAC_EX_1G_DATA_ERR 141 /* dTSEC Internal data error on transmit */ 142 , FM_MAC_1G_RX_DATA_ERR 143 /* dTSEC Internal data error on receive */ 144 , FM_MAC_EX_1G_1588_TS_RX_ERR 145 /* dTSEC Time-Stamp Receive Error */ 146 , FM_MAC_EX_1G_RX_MIB_CNT_OVFL 147 /* dTSEC MIB counter overflow */ 148 , FM_MAC_EX_TS_FIFO_ECC_ERR 149 /* mEMAC Time-stamp FIFO ECC error interrupt; 150 * not supported on T4240/B4860 rev1 chips 151 */ 152 , FM_MAC_EX_MAGIC_PACKET_INDICATION = FM_MAC_EX_1G_MAG_PCKT 153 /* mEMAC Magic Packet Indication Interrupt */ 154 }; 155 156 struct eth_hash_entry { 157 u64 addr; /* Ethernet Address */ 158 struct list_head node; 159 }; 160 161 typedef void (fman_mac_exception_cb)(void *dev_id, 162 enum fman_mac_exceptions exceptions); 163 164 /* FMan MAC config input */ 165 struct fman_mac_params { 166 /* Base of memory mapped FM MAC registers */ 167 void __iomem *base_addr; 168 /* MAC address of device; First octet is sent first */ 169 enet_addr_t addr; 170 /* MAC ID; numbering of dTSEC and 1G-mEMAC: 171 * 0 - FM_MAX_NUM_OF_1G_MACS; 172 * numbering of 10G-MAC (TGEC) and 10G-mEMAC: 173 * 0 - FM_MAX_NUM_OF_10G_MACS 174 */ 175 u8 mac_id; 176 /* PHY interface */ 177 phy_interface_t phy_if; 178 /* Note that the speed should indicate the maximum rate that 179 * this MAC should support rather than the actual speed; 180 */ 181 u16 max_speed; 182 /* A handle to the FM object this port related to */ 183 void *fm; 184 void *dev_id; /* device cookie used by the exception cbs */ 185 fman_mac_exception_cb *event_cb; /* MDIO Events Callback Routine */ 186 fman_mac_exception_cb *exception_cb;/* Exception Callback Routine */ 187 /* SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC 188 * and phy or backplane; Note: 1000BaseX auto-negotiation relates only 189 * to interface between MAC and phy/backplane, SGMII phy can still 190 * synchronize with far-end phy at 10Mbps, 100Mbps or 1000Mbps 191 */ 192 bool basex_if; 193 /* Pointer to TBI/PCS PHY node, used for TBI/PCS PHY access */ 194 struct device_node *internal_phy_node; 195 }; 196 197 struct eth_hash_t { 198 u16 size; 199 struct list_head *lsts; 200 }; 201 202 static inline struct eth_hash_entry 203 *dequeue_addr_from_hash_entry(struct list_head *addr_lst) 204 { 205 struct eth_hash_entry *hash_entry = NULL; 206 207 if (!list_empty(addr_lst)) { 208 hash_entry = ETH_HASH_ENTRY_OBJ(addr_lst->next); 209 list_del_init(&hash_entry->node); 210 } 211 return hash_entry; 212 } 213 214 static inline void free_hash_table(struct eth_hash_t *hash) 215 { 216 struct eth_hash_entry *hash_entry; 217 int i = 0; 218 219 if (hash) { 220 if (hash->lsts) { 221 for (i = 0; i < hash->size; i++) { 222 hash_entry = 223 dequeue_addr_from_hash_entry(&hash->lsts[i]); 224 while (hash_entry) { 225 kfree(hash_entry); 226 hash_entry = 227 dequeue_addr_from_hash_entry(&hash-> 228 lsts[i]); 229 } 230 } 231 232 kfree(hash->lsts); 233 } 234 235 kfree(hash); 236 } 237 } 238 239 static inline struct eth_hash_t *alloc_hash_table(u16 size) 240 { 241 u32 i; 242 struct eth_hash_t *hash; 243 244 /* Allocate address hash table */ 245 hash = kmalloc(sizeof(*hash), GFP_KERNEL); 246 if (!hash) 247 return NULL; 248 249 hash->size = size; 250 251 hash->lsts = kmalloc_array(hash->size, sizeof(struct list_head), 252 GFP_KERNEL); 253 if (!hash->lsts) { 254 kfree(hash); 255 return NULL; 256 } 257 258 for (i = 0; i < hash->size; i++) 259 INIT_LIST_HEAD(&hash->lsts[i]); 260 261 return hash; 262 } 263 264 #endif /* __FM_MAC_H */ 265