1# SPDX-License-Identifier: GPL-2.0-only
2config FSL_FMAN
3	tristate "FMan support"
4	depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST
5	select GENERIC_ALLOCATOR
6	select PHYLIB
7	select CRC32
8	default n
9	help
10		Freescale Data-Path Acceleration Architecture Frame Manager
11		(FMan) support
12
13config DPAA_ERRATUM_A050385
14	bool
15	depends on ARM64 && FSL_DPAA
16	default y
17	help
18		DPAA FMan erratum A050385 software workaround implementation:
19		align buffers, data start, SG fragment length to avoid FMan DMA
20		splits.
21		FMAN DMA read or writes under heavy traffic load may cause FMAN
22		internal resource leak thus stopping further packet processing.
23		The FMAN internal queue can overflow when FMAN splits single
24		read or write transactions into multiple smaller transactions
25		such that more than 17 AXI transactions are in flight from FMAN
26		to interconnect. When the FMAN internal queue overflows, it can
27		stall further packet processing. The issue can occur with any
28		one of the following three conditions:
29		1. FMAN AXI transaction crosses 4K address boundary (Errata
30		A010022)
31		2. FMAN DMA address for an AXI transaction is not 16 byte
32		aligned, i.e. the last 4 bits of an address are non-zero
33		3. Scatter Gather (SG) frames have more than one SG buffer in
34		the SG list and any one of the buffers, except the last
35		buffer in the SG list has data size that is not a multiple
36		of 16 bytes, i.e., other than 16, 32, 48, 64, etc.
37		With any one of the above three conditions present, there is
38		likelihood of stalled FMAN packet processing, especially under
39		stress with multiple ports injecting line-rate traffic.
40