1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* Copyright 2017-2019 NXP */ 3 4 #include <linux/mdio.h> 5 #include <linux/module.h> 6 #include <linux/fsl/enetc_mdio.h> 7 #include <linux/of_mdio.h> 8 #include <linux/of_net.h> 9 #include "enetc_pf.h" 10 11 #define ENETC_DRV_NAME_STR "ENETC PF driver" 12 13 static void enetc_pf_get_primary_mac_addr(struct enetc_hw *hw, int si, u8 *addr) 14 { 15 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si)); 16 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); 17 18 *(u32 *)addr = upper; 19 *(u16 *)(addr + 4) = lower; 20 } 21 22 static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si, 23 const u8 *addr) 24 { 25 u32 upper = *(const u32 *)addr; 26 u16 lower = *(const u16 *)(addr + 4); 27 28 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); 29 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); 30 } 31 32 static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr) 33 { 34 struct enetc_ndev_priv *priv = netdev_priv(ndev); 35 struct sockaddr *saddr = addr; 36 37 if (!is_valid_ether_addr(saddr->sa_data)) 38 return -EADDRNOTAVAIL; 39 40 memcpy(ndev->dev_addr, saddr->sa_data, ndev->addr_len); 41 enetc_pf_set_primary_mac_addr(&priv->si->hw, 0, saddr->sa_data); 42 43 return 0; 44 } 45 46 static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map) 47 { 48 u32 val = enetc_port_rd(hw, ENETC_PSIPVMR); 49 50 val &= ~ENETC_PSIPVMR_SET_VP(ENETC_VLAN_PROMISC_MAP_ALL); 51 enetc_port_wr(hw, ENETC_PSIPVMR, ENETC_PSIPVMR_SET_VP(si_map) | val); 52 } 53 54 static void enetc_enable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 55 { 56 pf->vlan_promisc_simap |= BIT(si_idx); 57 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 58 } 59 60 static void enetc_disable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 61 { 62 pf->vlan_promisc_simap &= ~BIT(si_idx); 63 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 64 } 65 66 static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos) 67 { 68 u32 val = 0; 69 70 if (vlan) 71 val = ENETC_PSIVLAN_EN | ENETC_PSIVLAN_SET_QOS(qos) | vlan; 72 73 enetc_port_wr(hw, ENETC_PSIVLANR(si), val); 74 } 75 76 static int enetc_mac_addr_hash_idx(const u8 *addr) 77 { 78 u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16; 79 u64 mask = 0; 80 int res = 0; 81 int i; 82 83 for (i = 0; i < 8; i++) 84 mask |= BIT_ULL(i * 6); 85 86 for (i = 0; i < 6; i++) 87 res |= (hweight64(fold & (mask << i)) & 0x1) << i; 88 89 return res; 90 } 91 92 static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter) 93 { 94 filter->mac_addr_cnt = 0; 95 96 bitmap_zero(filter->mac_hash_table, 97 ENETC_MADDR_HASH_TBL_SZ); 98 } 99 100 static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter, 101 const unsigned char *addr) 102 { 103 /* add exact match addr */ 104 ether_addr_copy(filter->mac_addr, addr); 105 filter->mac_addr_cnt++; 106 } 107 108 static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter, 109 const unsigned char *addr) 110 { 111 int idx = enetc_mac_addr_hash_idx(addr); 112 113 /* add hash table entry */ 114 __set_bit(idx, filter->mac_hash_table); 115 filter->mac_addr_cnt++; 116 } 117 118 static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type) 119 { 120 bool err = si->errata & ENETC_ERR_UCMCSWP; 121 122 if (type == UC) { 123 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), 0); 124 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), 0); 125 } else { /* MC */ 126 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), 0); 127 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), 0); 128 } 129 } 130 131 static void enetc_set_mac_ht_flt(struct enetc_si *si, int si_idx, int type, 132 u32 *hash) 133 { 134 bool err = si->errata & ENETC_ERR_UCMCSWP; 135 136 if (type == UC) { 137 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), *hash); 138 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), *(hash + 1)); 139 } else { /* MC */ 140 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), *hash); 141 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), *(hash + 1)); 142 } 143 } 144 145 static void enetc_sync_mac_filters(struct enetc_pf *pf) 146 { 147 struct enetc_mac_filter *f = pf->mac_filter; 148 struct enetc_si *si = pf->si; 149 int i, pos; 150 151 pos = EMETC_MAC_ADDR_FILT_RES; 152 153 for (i = 0; i < MADDR_TYPE; i++, f++) { 154 bool em = (f->mac_addr_cnt == 1) && (i == UC); 155 bool clear = !f->mac_addr_cnt; 156 157 if (clear) { 158 if (i == UC) 159 enetc_clear_mac_flt_entry(si, pos); 160 161 enetc_clear_mac_ht_flt(si, 0, i); 162 continue; 163 } 164 165 /* exact match filter */ 166 if (em) { 167 int err; 168 169 enetc_clear_mac_ht_flt(si, 0, UC); 170 171 err = enetc_set_mac_flt_entry(si, pos, f->mac_addr, 172 BIT(0)); 173 if (!err) 174 continue; 175 176 /* fallback to HT filtering */ 177 dev_warn(&si->pdev->dev, "fallback to HT filt (%d)\n", 178 err); 179 } 180 181 /* hash table filter, clear EM filter for UC entries */ 182 if (i == UC) 183 enetc_clear_mac_flt_entry(si, pos); 184 185 enetc_set_mac_ht_flt(si, 0, i, (u32 *)f->mac_hash_table); 186 } 187 } 188 189 static void enetc_pf_set_rx_mode(struct net_device *ndev) 190 { 191 struct enetc_ndev_priv *priv = netdev_priv(ndev); 192 struct enetc_pf *pf = enetc_si_priv(priv->si); 193 char vlan_promisc_simap = pf->vlan_promisc_simap; 194 struct enetc_hw *hw = &priv->si->hw; 195 bool uprom = false, mprom = false; 196 struct enetc_mac_filter *filter; 197 struct netdev_hw_addr *ha; 198 u32 psipmr = 0; 199 bool em; 200 201 if (ndev->flags & IFF_PROMISC) { 202 /* enable promisc mode for SI0 (PF) */ 203 psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0); 204 uprom = true; 205 mprom = true; 206 /* Enable VLAN promiscuous mode for SI0 (PF) */ 207 vlan_promisc_simap |= BIT(0); 208 } else if (ndev->flags & IFF_ALLMULTI) { 209 /* enable multi cast promisc mode for SI0 (PF) */ 210 psipmr = ENETC_PSIPMR_SET_MP(0); 211 mprom = true; 212 } 213 214 enetc_set_vlan_promisc(&pf->si->hw, vlan_promisc_simap); 215 216 /* first 2 filter entries belong to PF */ 217 if (!uprom) { 218 /* Update unicast filters */ 219 filter = &pf->mac_filter[UC]; 220 enetc_reset_mac_addr_filter(filter); 221 222 em = (netdev_uc_count(ndev) == 1); 223 netdev_for_each_uc_addr(ha, ndev) { 224 if (em) { 225 enetc_add_mac_addr_em_filter(filter, ha->addr); 226 break; 227 } 228 229 enetc_add_mac_addr_ht_filter(filter, ha->addr); 230 } 231 } 232 233 if (!mprom) { 234 /* Update multicast filters */ 235 filter = &pf->mac_filter[MC]; 236 enetc_reset_mac_addr_filter(filter); 237 238 netdev_for_each_mc_addr(ha, ndev) { 239 if (!is_multicast_ether_addr(ha->addr)) 240 continue; 241 242 enetc_add_mac_addr_ht_filter(filter, ha->addr); 243 } 244 } 245 246 if (!uprom || !mprom) 247 /* update PF entries */ 248 enetc_sync_mac_filters(pf); 249 250 psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) & 251 ~(ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0)); 252 enetc_port_wr(hw, ENETC_PSIPMR, psipmr); 253 } 254 255 static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx, 256 u32 *hash) 257 { 258 enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), *hash); 259 enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), *(hash + 1)); 260 } 261 262 static int enetc_vid_hash_idx(unsigned int vid) 263 { 264 int res = 0; 265 int i; 266 267 for (i = 0; i < 6; i++) 268 res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i; 269 270 return res; 271 } 272 273 static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash) 274 { 275 int i; 276 277 if (rehash) { 278 bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE); 279 280 for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) { 281 int hidx = enetc_vid_hash_idx(i); 282 283 __set_bit(hidx, pf->vlan_ht_filter); 284 } 285 } 286 287 enetc_set_vlan_ht_filter(&pf->si->hw, 0, (u32 *)pf->vlan_ht_filter); 288 } 289 290 static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid) 291 { 292 struct enetc_ndev_priv *priv = netdev_priv(ndev); 293 struct enetc_pf *pf = enetc_si_priv(priv->si); 294 int idx; 295 296 __set_bit(vid, pf->active_vlans); 297 298 idx = enetc_vid_hash_idx(vid); 299 if (!__test_and_set_bit(idx, pf->vlan_ht_filter)) 300 enetc_sync_vlan_ht_filter(pf, false); 301 302 return 0; 303 } 304 305 static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid) 306 { 307 struct enetc_ndev_priv *priv = netdev_priv(ndev); 308 struct enetc_pf *pf = enetc_si_priv(priv->si); 309 310 __clear_bit(vid, pf->active_vlans); 311 enetc_sync_vlan_ht_filter(pf, true); 312 313 return 0; 314 } 315 316 static void enetc_set_loopback(struct net_device *ndev, bool en) 317 { 318 struct enetc_ndev_priv *priv = netdev_priv(ndev); 319 struct enetc_hw *hw = &priv->si->hw; 320 u32 reg; 321 322 reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 323 if (reg & ENETC_PMO_IFM_RG) { 324 /* RGMII mode */ 325 reg = (reg & ~ENETC_PM0_IFM_RLP) | 326 (en ? ENETC_PM0_IFM_RLP : 0); 327 enetc_port_wr(hw, ENETC_PM0_IF_MODE, reg); 328 } else { 329 /* assume SGMII mode */ 330 reg = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 331 reg = (reg & ~ENETC_PM0_CMD_XGLP) | 332 (en ? ENETC_PM0_CMD_XGLP : 0); 333 reg = (reg & ~ENETC_PM0_CMD_PHY_TX_EN) | 334 (en ? ENETC_PM0_CMD_PHY_TX_EN : 0); 335 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, reg); 336 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, reg); 337 } 338 } 339 340 static int enetc_pf_set_vf_mac(struct net_device *ndev, int vf, u8 *mac) 341 { 342 struct enetc_ndev_priv *priv = netdev_priv(ndev); 343 struct enetc_pf *pf = enetc_si_priv(priv->si); 344 struct enetc_vf_state *vf_state; 345 346 if (vf >= pf->total_vfs) 347 return -EINVAL; 348 349 if (!is_valid_ether_addr(mac)) 350 return -EADDRNOTAVAIL; 351 352 vf_state = &pf->vf_state[vf]; 353 vf_state->flags |= ENETC_VF_FLAG_PF_SET_MAC; 354 enetc_pf_set_primary_mac_addr(&priv->si->hw, vf + 1, mac); 355 return 0; 356 } 357 358 static int enetc_pf_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, 359 u8 qos, __be16 proto) 360 { 361 struct enetc_ndev_priv *priv = netdev_priv(ndev); 362 struct enetc_pf *pf = enetc_si_priv(priv->si); 363 364 if (priv->si->errata & ENETC_ERR_VLAN_ISOL) 365 return -EOPNOTSUPP; 366 367 if (vf >= pf->total_vfs) 368 return -EINVAL; 369 370 if (proto != htons(ETH_P_8021Q)) 371 /* only C-tags supported for now */ 372 return -EPROTONOSUPPORT; 373 374 enetc_set_isol_vlan(&priv->si->hw, vf + 1, vlan, qos); 375 return 0; 376 } 377 378 static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en) 379 { 380 struct enetc_ndev_priv *priv = netdev_priv(ndev); 381 struct enetc_pf *pf = enetc_si_priv(priv->si); 382 u32 cfgr; 383 384 if (vf >= pf->total_vfs) 385 return -EINVAL; 386 387 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); 388 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); 389 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); 390 391 return 0; 392 } 393 394 static void enetc_port_setup_primary_mac_address(struct enetc_si *si) 395 { 396 unsigned char mac_addr[MAX_ADDR_LEN]; 397 struct enetc_pf *pf = enetc_si_priv(si); 398 struct enetc_hw *hw = &si->hw; 399 int i; 400 401 /* check MAC addresses for PF and all VFs, if any is 0 set it ro rand */ 402 for (i = 0; i < pf->total_vfs + 1; i++) { 403 enetc_pf_get_primary_mac_addr(hw, i, mac_addr); 404 if (!is_zero_ether_addr(mac_addr)) 405 continue; 406 eth_random_addr(mac_addr); 407 dev_info(&si->pdev->dev, "no MAC address specified for SI%d, using %pM\n", 408 i, mac_addr); 409 enetc_pf_set_primary_mac_addr(hw, i, mac_addr); 410 } 411 } 412 413 static void enetc_port_assign_rfs_entries(struct enetc_si *si) 414 { 415 struct enetc_pf *pf = enetc_si_priv(si); 416 struct enetc_hw *hw = &si->hw; 417 int num_entries, vf_entries, i; 418 u32 val; 419 420 /* split RFS entries between functions */ 421 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 422 num_entries = ENETC_PRFSCAPR_GET_NUM_RFS(val); 423 vf_entries = num_entries / (pf->total_vfs + 1); 424 425 for (i = 0; i < pf->total_vfs; i++) 426 enetc_port_wr(hw, ENETC_PSIRFSCFGR(i + 1), vf_entries); 427 enetc_port_wr(hw, ENETC_PSIRFSCFGR(0), 428 num_entries - vf_entries * pf->total_vfs); 429 430 /* enable RFS on port */ 431 enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE); 432 } 433 434 static void enetc_port_si_configure(struct enetc_si *si) 435 { 436 struct enetc_pf *pf = enetc_si_priv(si); 437 struct enetc_hw *hw = &si->hw; 438 int num_rings, i; 439 u32 val; 440 441 val = enetc_port_rd(hw, ENETC_PCAPR0); 442 num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val)); 443 444 val = ENETC_PSICFGR0_SET_TXBDR(ENETC_PF_NUM_RINGS); 445 val |= ENETC_PSICFGR0_SET_RXBDR(ENETC_PF_NUM_RINGS); 446 447 if (unlikely(num_rings < ENETC_PF_NUM_RINGS)) { 448 val = ENETC_PSICFGR0_SET_TXBDR(num_rings); 449 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 450 451 dev_warn(&si->pdev->dev, "Found %d rings, expected %d!\n", 452 num_rings, ENETC_PF_NUM_RINGS); 453 454 num_rings = 0; 455 } 456 457 /* Add default one-time settings for SI0 (PF) */ 458 val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 459 460 enetc_port_wr(hw, ENETC_PSICFGR0(0), val); 461 462 if (num_rings) 463 num_rings -= ENETC_PF_NUM_RINGS; 464 465 /* Configure the SIs for each available VF */ 466 val = ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 467 val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE; 468 469 if (num_rings) { 470 num_rings /= pf->total_vfs; 471 val |= ENETC_PSICFGR0_SET_TXBDR(num_rings); 472 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 473 } 474 475 for (i = 0; i < pf->total_vfs; i++) 476 enetc_port_wr(hw, ENETC_PSICFGR0(i + 1), val); 477 478 /* Port level VLAN settings */ 479 val = ENETC_PVCLCTR_OVTPIDL(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 480 enetc_port_wr(hw, ENETC_PVCLCTR, val); 481 /* use outer tag for VLAN filtering */ 482 enetc_port_wr(hw, ENETC_PSIVLANFMR, ENETC_PSIVLANFMR_VS); 483 } 484 485 static void enetc_configure_port_mac(struct enetc_hw *hw) 486 { 487 enetc_port_wr(hw, ENETC_PM0_MAXFRM, 488 ENETC_SET_MAXFRM(ENETC_RX_MAXFRM_SIZE)); 489 490 enetc_port_wr(hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE); 491 enetc_port_wr(hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE); 492 493 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 494 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 495 496 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 497 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 498 } 499 500 static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode) 501 { 502 /* set auto-speed for RGMII */ 503 if (enetc_port_rd(hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG || 504 phy_interface_mode_is_rgmii(phy_mode)) 505 enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_RGAUTO); 506 507 if (phy_mode == PHY_INTERFACE_MODE_USXGMII) 508 enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII); 509 } 510 511 static void enetc_mac_enable(struct enetc_hw *hw, bool en) 512 { 513 u32 val = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 514 515 val &= ~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN); 516 val |= en ? (ENETC_PM0_TX_EN | ENETC_PM0_RX_EN) : 0; 517 518 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, val); 519 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, val); 520 } 521 522 static void enetc_configure_port_pmac(struct enetc_hw *hw) 523 { 524 u32 temp; 525 526 /* Set pMAC step lock */ 527 temp = enetc_port_rd(hw, ENETC_PFPMR); 528 enetc_port_wr(hw, ENETC_PFPMR, 529 temp | ENETC_PFPMR_PMACE | ENETC_PFPMR_MWLM); 530 531 temp = enetc_port_rd(hw, ENETC_MMCSR); 532 enetc_port_wr(hw, ENETC_MMCSR, temp | ENETC_MMCSR_ME); 533 } 534 535 static void enetc_configure_port(struct enetc_pf *pf) 536 { 537 u8 hash_key[ENETC_RSSHASH_KEY_SIZE]; 538 struct enetc_hw *hw = &pf->si->hw; 539 540 enetc_configure_port_pmac(hw); 541 542 enetc_configure_port_mac(hw); 543 544 enetc_port_si_configure(pf->si); 545 546 /* set up hash key */ 547 get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE); 548 enetc_set_rss_key(hw, hash_key); 549 550 /* split up RFS entries */ 551 enetc_port_assign_rfs_entries(pf->si); 552 553 /* fix-up primary MAC addresses, if not set already */ 554 enetc_port_setup_primary_mac_address(pf->si); 555 556 /* enforce VLAN promisc mode for all SIs */ 557 pf->vlan_promisc_simap = ENETC_VLAN_PROMISC_MAP_ALL; 558 enetc_set_vlan_promisc(hw, pf->vlan_promisc_simap); 559 560 enetc_port_wr(hw, ENETC_PSIPMR, 0); 561 562 /* enable port */ 563 enetc_port_wr(hw, ENETC_PMR, ENETC_PMR_EN); 564 } 565 566 /* Messaging */ 567 static u16 enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf *pf, 568 int vf_id) 569 { 570 struct enetc_vf_state *vf_state = &pf->vf_state[vf_id]; 571 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 572 struct enetc_msg_cmd_set_primary_mac *cmd; 573 struct device *dev = &pf->si->pdev->dev; 574 u16 cmd_id; 575 char *addr; 576 577 cmd = (struct enetc_msg_cmd_set_primary_mac *)msg->vaddr; 578 cmd_id = cmd->header.id; 579 if (cmd_id != ENETC_MSG_CMD_MNG_ADD) 580 return ENETC_MSG_CMD_STATUS_FAIL; 581 582 addr = cmd->mac.sa_data; 583 if (vf_state->flags & ENETC_VF_FLAG_PF_SET_MAC) 584 dev_warn(dev, "Attempt to override PF set mac addr for VF%d\n", 585 vf_id); 586 else 587 enetc_pf_set_primary_mac_addr(&pf->si->hw, vf_id + 1, addr); 588 589 return ENETC_MSG_CMD_STATUS_OK; 590 } 591 592 void enetc_msg_handle_rxmsg(struct enetc_pf *pf, int vf_id, u16 *status) 593 { 594 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 595 struct device *dev = &pf->si->pdev->dev; 596 struct enetc_msg_cmd_header *cmd_hdr; 597 u16 cmd_type; 598 599 *status = ENETC_MSG_CMD_STATUS_OK; 600 cmd_hdr = (struct enetc_msg_cmd_header *)msg->vaddr; 601 cmd_type = cmd_hdr->type; 602 603 switch (cmd_type) { 604 case ENETC_MSG_CMD_MNG_MAC: 605 *status = enetc_msg_pf_set_vf_primary_mac_addr(pf, vf_id); 606 break; 607 default: 608 dev_err(dev, "command not supported (cmd_type: 0x%x)\n", 609 cmd_type); 610 } 611 } 612 613 #ifdef CONFIG_PCI_IOV 614 static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs) 615 { 616 struct enetc_si *si = pci_get_drvdata(pdev); 617 struct enetc_pf *pf = enetc_si_priv(si); 618 int err; 619 620 if (!num_vfs) { 621 enetc_msg_psi_free(pf); 622 kfree(pf->vf_state); 623 pf->num_vfs = 0; 624 pci_disable_sriov(pdev); 625 } else { 626 pf->num_vfs = num_vfs; 627 628 pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state), 629 GFP_KERNEL); 630 if (!pf->vf_state) { 631 pf->num_vfs = 0; 632 return -ENOMEM; 633 } 634 635 err = enetc_msg_psi_init(pf); 636 if (err) { 637 dev_err(&pdev->dev, "enetc_msg_psi_init (%d)\n", err); 638 goto err_msg_psi; 639 } 640 641 err = pci_enable_sriov(pdev, num_vfs); 642 if (err) { 643 dev_err(&pdev->dev, "pci_enable_sriov err %d\n", err); 644 goto err_en_sriov; 645 } 646 } 647 648 return num_vfs; 649 650 err_en_sriov: 651 enetc_msg_psi_free(pf); 652 err_msg_psi: 653 kfree(pf->vf_state); 654 pf->num_vfs = 0; 655 656 return err; 657 } 658 #else 659 #define enetc_sriov_configure(pdev, num_vfs) (void)0 660 #endif 661 662 static int enetc_pf_set_features(struct net_device *ndev, 663 netdev_features_t features) 664 { 665 netdev_features_t changed = ndev->features ^ features; 666 struct enetc_ndev_priv *priv = netdev_priv(ndev); 667 668 if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { 669 struct enetc_pf *pf = enetc_si_priv(priv->si); 670 671 if (!!(features & NETIF_F_HW_VLAN_CTAG_FILTER)) 672 enetc_disable_si_vlan_promisc(pf, 0); 673 else 674 enetc_enable_si_vlan_promisc(pf, 0); 675 } 676 677 if (changed & NETIF_F_LOOPBACK) 678 enetc_set_loopback(ndev, !!(features & NETIF_F_LOOPBACK)); 679 680 return enetc_set_features(ndev, features); 681 } 682 683 static const struct net_device_ops enetc_ndev_ops = { 684 .ndo_open = enetc_open, 685 .ndo_stop = enetc_close, 686 .ndo_start_xmit = enetc_xmit, 687 .ndo_get_stats = enetc_get_stats, 688 .ndo_set_mac_address = enetc_pf_set_mac_addr, 689 .ndo_set_rx_mode = enetc_pf_set_rx_mode, 690 .ndo_vlan_rx_add_vid = enetc_vlan_rx_add_vid, 691 .ndo_vlan_rx_kill_vid = enetc_vlan_rx_del_vid, 692 .ndo_set_vf_mac = enetc_pf_set_vf_mac, 693 .ndo_set_vf_vlan = enetc_pf_set_vf_vlan, 694 .ndo_set_vf_spoofchk = enetc_pf_set_vf_spoofchk, 695 .ndo_set_features = enetc_pf_set_features, 696 .ndo_do_ioctl = enetc_ioctl, 697 .ndo_setup_tc = enetc_setup_tc, 698 }; 699 700 static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev, 701 const struct net_device_ops *ndev_ops) 702 { 703 struct enetc_ndev_priv *priv = netdev_priv(ndev); 704 705 SET_NETDEV_DEV(ndev, &si->pdev->dev); 706 priv->ndev = ndev; 707 priv->si = si; 708 priv->dev = &si->pdev->dev; 709 si->ndev = ndev; 710 711 priv->msg_enable = (NETIF_MSG_WOL << 1) - 1; 712 ndev->netdev_ops = ndev_ops; 713 enetc_set_ethtool_ops(ndev); 714 ndev->watchdog_timeo = 5 * HZ; 715 ndev->max_mtu = ENETC_MAX_MTU; 716 717 ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | 718 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 719 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK; 720 ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM | 721 NETIF_F_HW_VLAN_CTAG_TX | 722 NETIF_F_HW_VLAN_CTAG_RX; 723 724 if (si->num_rss) 725 ndev->hw_features |= NETIF_F_RXHASH; 726 727 ndev->priv_flags |= IFF_UNICAST_FLT; 728 729 if (si->hw_features & ENETC_SI_F_QBV) 730 priv->active_offloads |= ENETC_F_QBV; 731 732 if (si->hw_features & ENETC_SI_F_PSFP && !enetc_psfp_enable(priv)) { 733 priv->active_offloads |= ENETC_F_QCI; 734 ndev->features |= NETIF_F_HW_TC; 735 ndev->hw_features |= NETIF_F_HW_TC; 736 } 737 738 /* pick up primary MAC address from SI */ 739 enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr); 740 } 741 742 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np) 743 { 744 struct device *dev = &pf->si->pdev->dev; 745 struct enetc_mdio_priv *mdio_priv; 746 struct mii_bus *bus; 747 int err; 748 749 bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv)); 750 if (!bus) 751 return -ENOMEM; 752 753 bus->name = "Freescale ENETC MDIO Bus"; 754 bus->read = enetc_mdio_read; 755 bus->write = enetc_mdio_write; 756 bus->parent = dev; 757 mdio_priv = bus->priv; 758 mdio_priv->hw = &pf->si->hw; 759 mdio_priv->mdio_base = ENETC_EMDIO_BASE; 760 snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); 761 762 err = of_mdiobus_register(bus, np); 763 if (err) { 764 dev_err(dev, "cannot register MDIO bus\n"); 765 return err; 766 } 767 768 pf->mdio = bus; 769 770 return 0; 771 } 772 773 static void enetc_mdio_remove(struct enetc_pf *pf) 774 { 775 if (pf->mdio) 776 mdiobus_unregister(pf->mdio); 777 } 778 779 static int enetc_imdio_create(struct enetc_pf *pf) 780 { 781 struct device *dev = &pf->si->pdev->dev; 782 struct enetc_mdio_priv *mdio_priv; 783 struct lynx_pcs *pcs_lynx; 784 struct mdio_device *pcs; 785 struct mii_bus *bus; 786 int err; 787 788 bus = mdiobus_alloc_size(sizeof(*mdio_priv)); 789 if (!bus) 790 return -ENOMEM; 791 792 bus->name = "Freescale ENETC internal MDIO Bus"; 793 bus->read = enetc_mdio_read; 794 bus->write = enetc_mdio_write; 795 bus->parent = dev; 796 bus->phy_mask = ~0; 797 mdio_priv = bus->priv; 798 mdio_priv->hw = &pf->si->hw; 799 mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE; 800 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev)); 801 802 err = mdiobus_register(bus); 803 if (err) { 804 dev_err(dev, "cannot register internal MDIO bus (%d)\n", err); 805 goto free_mdio_bus; 806 } 807 808 pcs = mdio_device_create(bus, 0); 809 if (IS_ERR(pcs)) { 810 err = PTR_ERR(pcs); 811 dev_err(dev, "cannot create pcs (%d)\n", err); 812 goto unregister_mdiobus; 813 } 814 815 pcs_lynx = lynx_pcs_create(pcs); 816 if (!pcs_lynx) { 817 mdio_device_free(pcs); 818 err = -ENOMEM; 819 dev_err(dev, "cannot create lynx pcs (%d)\n", err); 820 goto unregister_mdiobus; 821 } 822 823 pf->imdio = bus; 824 pf->pcs = pcs_lynx; 825 826 return 0; 827 828 unregister_mdiobus: 829 mdiobus_unregister(bus); 830 free_mdio_bus: 831 mdiobus_free(bus); 832 return err; 833 } 834 835 static void enetc_imdio_remove(struct enetc_pf *pf) 836 { 837 if (pf->pcs) { 838 mdio_device_free(pf->pcs->mdio); 839 lynx_pcs_destroy(pf->pcs); 840 } 841 if (pf->imdio) { 842 mdiobus_unregister(pf->imdio); 843 mdiobus_free(pf->imdio); 844 } 845 } 846 847 static bool enetc_port_has_pcs(struct enetc_pf *pf) 848 { 849 return (pf->if_mode == PHY_INTERFACE_MODE_SGMII || 850 pf->if_mode == PHY_INTERFACE_MODE_2500BASEX || 851 pf->if_mode == PHY_INTERFACE_MODE_USXGMII); 852 } 853 854 static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node) 855 { 856 struct device_node *mdio_np; 857 int err; 858 859 mdio_np = of_get_child_by_name(node, "mdio"); 860 if (mdio_np) { 861 err = enetc_mdio_probe(pf, mdio_np); 862 863 of_node_put(mdio_np); 864 if (err) 865 return err; 866 } 867 868 if (enetc_port_has_pcs(pf)) { 869 err = enetc_imdio_create(pf); 870 if (err) { 871 enetc_mdio_remove(pf); 872 return err; 873 } 874 } 875 876 return 0; 877 } 878 879 static void enetc_mdiobus_destroy(struct enetc_pf *pf) 880 { 881 enetc_mdio_remove(pf); 882 enetc_imdio_remove(pf); 883 } 884 885 static void enetc_pl_mac_validate(struct phylink_config *config, 886 unsigned long *supported, 887 struct phylink_link_state *state) 888 { 889 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 890 891 if (state->interface != PHY_INTERFACE_MODE_NA && 892 state->interface != PHY_INTERFACE_MODE_INTERNAL && 893 state->interface != PHY_INTERFACE_MODE_SGMII && 894 state->interface != PHY_INTERFACE_MODE_2500BASEX && 895 state->interface != PHY_INTERFACE_MODE_USXGMII && 896 !phy_interface_mode_is_rgmii(state->interface)) { 897 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 898 return; 899 } 900 901 phylink_set_port_modes(mask); 902 phylink_set(mask, Autoneg); 903 phylink_set(mask, Pause); 904 phylink_set(mask, Asym_Pause); 905 phylink_set(mask, 10baseT_Half); 906 phylink_set(mask, 10baseT_Full); 907 phylink_set(mask, 100baseT_Half); 908 phylink_set(mask, 100baseT_Full); 909 phylink_set(mask, 100baseT_Half); 910 phylink_set(mask, 1000baseT_Half); 911 phylink_set(mask, 1000baseT_Full); 912 913 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 914 state->interface == PHY_INTERFACE_MODE_2500BASEX || 915 state->interface == PHY_INTERFACE_MODE_USXGMII) { 916 phylink_set(mask, 2500baseT_Full); 917 phylink_set(mask, 2500baseX_Full); 918 } 919 920 bitmap_and(supported, supported, mask, 921 __ETHTOOL_LINK_MODE_MASK_NBITS); 922 bitmap_and(state->advertising, state->advertising, mask, 923 __ETHTOOL_LINK_MODE_MASK_NBITS); 924 } 925 926 static void enetc_pl_mac_config(struct phylink_config *config, 927 unsigned int mode, 928 const struct phylink_link_state *state) 929 { 930 struct enetc_pf *pf = phylink_to_enetc_pf(config); 931 struct enetc_ndev_priv *priv; 932 933 enetc_mac_config(&pf->si->hw, state->interface); 934 935 priv = netdev_priv(pf->si->ndev); 936 if (pf->pcs) 937 phylink_set_pcs(priv->phylink, &pf->pcs->pcs); 938 } 939 940 static void enetc_pl_mac_link_up(struct phylink_config *config, 941 struct phy_device *phy, unsigned int mode, 942 phy_interface_t interface, int speed, 943 int duplex, bool tx_pause, bool rx_pause) 944 { 945 struct enetc_pf *pf = phylink_to_enetc_pf(config); 946 struct enetc_ndev_priv *priv; 947 948 priv = netdev_priv(pf->si->ndev); 949 if (priv->active_offloads & ENETC_F_QBV) 950 enetc_sched_speed_set(priv, speed); 951 952 enetc_mac_enable(&pf->si->hw, true); 953 } 954 955 static void enetc_pl_mac_link_down(struct phylink_config *config, 956 unsigned int mode, 957 phy_interface_t interface) 958 { 959 struct enetc_pf *pf = phylink_to_enetc_pf(config); 960 961 enetc_mac_enable(&pf->si->hw, false); 962 } 963 964 static const struct phylink_mac_ops enetc_mac_phylink_ops = { 965 .validate = enetc_pl_mac_validate, 966 .mac_config = enetc_pl_mac_config, 967 .mac_link_up = enetc_pl_mac_link_up, 968 .mac_link_down = enetc_pl_mac_link_down, 969 }; 970 971 static int enetc_phylink_create(struct enetc_ndev_priv *priv, 972 struct device_node *node) 973 { 974 struct enetc_pf *pf = enetc_si_priv(priv->si); 975 struct phylink *phylink; 976 int err; 977 978 pf->phylink_config.dev = &priv->ndev->dev; 979 pf->phylink_config.type = PHYLINK_NETDEV; 980 981 phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node), 982 pf->if_mode, &enetc_mac_phylink_ops); 983 if (IS_ERR(phylink)) { 984 err = PTR_ERR(phylink); 985 return err; 986 } 987 988 priv->phylink = phylink; 989 990 return 0; 991 } 992 993 static void enetc_phylink_destroy(struct enetc_ndev_priv *priv) 994 { 995 if (priv->phylink) 996 phylink_destroy(priv->phylink); 997 } 998 999 /* Initialize the entire shared memory for the flow steering entries 1000 * of this port (PF + VFs) 1001 */ 1002 static int enetc_init_port_rfs_memory(struct enetc_si *si) 1003 { 1004 struct enetc_cmd_rfse rfse = {0}; 1005 struct enetc_hw *hw = &si->hw; 1006 int num_rfs, i, err = 0; 1007 u32 val; 1008 1009 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 1010 num_rfs = ENETC_PRFSCAPR_GET_NUM_RFS(val); 1011 1012 for (i = 0; i < num_rfs; i++) { 1013 err = enetc_set_fs_entry(si, &rfse, i); 1014 if (err) 1015 break; 1016 } 1017 1018 return err; 1019 } 1020 1021 static int enetc_init_port_rss_memory(struct enetc_si *si) 1022 { 1023 struct enetc_hw *hw = &si->hw; 1024 int num_rss, err; 1025 int *rss_table; 1026 u32 val; 1027 1028 val = enetc_port_rd(hw, ENETC_PRSSCAPR); 1029 num_rss = ENETC_PRSSCAPR_GET_NUM_RSS(val); 1030 if (!num_rss) 1031 return 0; 1032 1033 rss_table = kcalloc(num_rss, sizeof(*rss_table), GFP_KERNEL); 1034 if (!rss_table) 1035 return -ENOMEM; 1036 1037 err = enetc_set_rss_table(si, rss_table, num_rss); 1038 1039 kfree(rss_table); 1040 1041 return err; 1042 } 1043 1044 static int enetc_pf_probe(struct pci_dev *pdev, 1045 const struct pci_device_id *ent) 1046 { 1047 struct device_node *node = pdev->dev.of_node; 1048 struct enetc_ndev_priv *priv; 1049 struct net_device *ndev; 1050 struct enetc_si *si; 1051 struct enetc_pf *pf; 1052 int err; 1053 1054 if (node && !of_device_is_available(node)) { 1055 dev_info(&pdev->dev, "device is disabled, skipping\n"); 1056 return -ENODEV; 1057 } 1058 1059 err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf)); 1060 if (err) { 1061 dev_err(&pdev->dev, "PCI probing failed\n"); 1062 return err; 1063 } 1064 1065 si = pci_get_drvdata(pdev); 1066 if (!si->hw.port || !si->hw.global) { 1067 err = -ENODEV; 1068 dev_err(&pdev->dev, "could not map PF space, probing a VF?\n"); 1069 goto err_map_pf_space; 1070 } 1071 1072 pf = enetc_si_priv(si); 1073 pf->si = si; 1074 pf->total_vfs = pci_sriov_get_totalvfs(pdev); 1075 1076 enetc_configure_port(pf); 1077 1078 enetc_get_si_caps(si); 1079 1080 ndev = alloc_etherdev_mq(sizeof(*priv), ENETC_MAX_NUM_TXQS); 1081 if (!ndev) { 1082 err = -ENOMEM; 1083 dev_err(&pdev->dev, "netdev creation failed\n"); 1084 goto err_alloc_netdev; 1085 } 1086 1087 enetc_pf_netdev_setup(si, ndev, &enetc_ndev_ops); 1088 1089 priv = netdev_priv(ndev); 1090 1091 enetc_init_si_rings_params(priv); 1092 1093 err = enetc_alloc_si_resources(priv); 1094 if (err) { 1095 dev_err(&pdev->dev, "SI resource alloc failed\n"); 1096 goto err_alloc_si_res; 1097 } 1098 1099 err = enetc_init_port_rfs_memory(si); 1100 if (err) { 1101 dev_err(&pdev->dev, "Failed to initialize RFS memory\n"); 1102 goto err_init_port_rfs; 1103 } 1104 1105 err = enetc_init_port_rss_memory(si); 1106 if (err) { 1107 dev_err(&pdev->dev, "Failed to initialize RSS memory\n"); 1108 goto err_init_port_rss; 1109 } 1110 1111 err = enetc_alloc_msix(priv); 1112 if (err) { 1113 dev_err(&pdev->dev, "MSIX alloc failed\n"); 1114 goto err_alloc_msix; 1115 } 1116 1117 if (!of_get_phy_mode(node, &pf->if_mode)) { 1118 err = enetc_mdiobus_create(pf, node); 1119 if (err) 1120 goto err_mdiobus_create; 1121 1122 err = enetc_phylink_create(priv, node); 1123 if (err) 1124 goto err_phylink_create; 1125 } 1126 1127 err = register_netdev(ndev); 1128 if (err) 1129 goto err_reg_netdev; 1130 1131 return 0; 1132 1133 err_reg_netdev: 1134 enetc_phylink_destroy(priv); 1135 err_phylink_create: 1136 enetc_mdiobus_destroy(pf); 1137 err_mdiobus_create: 1138 enetc_free_msix(priv); 1139 err_init_port_rss: 1140 err_init_port_rfs: 1141 err_alloc_msix: 1142 enetc_free_si_resources(priv); 1143 err_alloc_si_res: 1144 si->ndev = NULL; 1145 free_netdev(ndev); 1146 err_alloc_netdev: 1147 err_map_pf_space: 1148 enetc_pci_remove(pdev); 1149 1150 return err; 1151 } 1152 1153 static void enetc_pf_remove(struct pci_dev *pdev) 1154 { 1155 struct enetc_si *si = pci_get_drvdata(pdev); 1156 struct enetc_pf *pf = enetc_si_priv(si); 1157 struct enetc_ndev_priv *priv; 1158 1159 priv = netdev_priv(si->ndev); 1160 enetc_phylink_destroy(priv); 1161 enetc_mdiobus_destroy(pf); 1162 1163 if (pf->num_vfs) 1164 enetc_sriov_configure(pdev, 0); 1165 1166 unregister_netdev(si->ndev); 1167 1168 enetc_free_msix(priv); 1169 1170 enetc_free_si_resources(priv); 1171 1172 free_netdev(si->ndev); 1173 1174 enetc_pci_remove(pdev); 1175 } 1176 1177 static const struct pci_device_id enetc_pf_id_table[] = { 1178 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) }, 1179 { 0, } /* End of table. */ 1180 }; 1181 MODULE_DEVICE_TABLE(pci, enetc_pf_id_table); 1182 1183 static struct pci_driver enetc_pf_driver = { 1184 .name = KBUILD_MODNAME, 1185 .id_table = enetc_pf_id_table, 1186 .probe = enetc_pf_probe, 1187 .remove = enetc_pf_remove, 1188 #ifdef CONFIG_PCI_IOV 1189 .sriov_configure = enetc_sriov_configure, 1190 #endif 1191 }; 1192 module_pci_driver(enetc_pf_driver); 1193 1194 MODULE_DESCRIPTION(ENETC_DRV_NAME_STR); 1195 MODULE_LICENSE("Dual BSD/GPL"); 1196