1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* Copyright 2017-2019 NXP */ 3 4 #include <linux/mdio.h> 5 #include <linux/module.h> 6 #include <linux/fsl/enetc_mdio.h> 7 #include <linux/of_mdio.h> 8 #include <linux/of_net.h> 9 #include "enetc_pf.h" 10 11 #define ENETC_DRV_NAME_STR "ENETC PF driver" 12 13 static void enetc_pf_get_primary_mac_addr(struct enetc_hw *hw, int si, u8 *addr) 14 { 15 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si)); 16 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); 17 18 *(u32 *)addr = upper; 19 *(u16 *)(addr + 4) = lower; 20 } 21 22 static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si, 23 const u8 *addr) 24 { 25 u32 upper = *(const u32 *)addr; 26 u16 lower = *(const u16 *)(addr + 4); 27 28 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); 29 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); 30 } 31 32 static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr) 33 { 34 struct enetc_ndev_priv *priv = netdev_priv(ndev); 35 struct sockaddr *saddr = addr; 36 37 if (!is_valid_ether_addr(saddr->sa_data)) 38 return -EADDRNOTAVAIL; 39 40 memcpy(ndev->dev_addr, saddr->sa_data, ndev->addr_len); 41 enetc_pf_set_primary_mac_addr(&priv->si->hw, 0, saddr->sa_data); 42 43 return 0; 44 } 45 46 static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map) 47 { 48 u32 val = enetc_port_rd(hw, ENETC_PSIPVMR); 49 50 val &= ~ENETC_PSIPVMR_SET_VP(ENETC_VLAN_PROMISC_MAP_ALL); 51 enetc_port_wr(hw, ENETC_PSIPVMR, ENETC_PSIPVMR_SET_VP(si_map) | val); 52 } 53 54 static void enetc_enable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 55 { 56 pf->vlan_promisc_simap |= BIT(si_idx); 57 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 58 } 59 60 static void enetc_disable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 61 { 62 pf->vlan_promisc_simap &= ~BIT(si_idx); 63 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 64 } 65 66 static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos) 67 { 68 u32 val = 0; 69 70 if (vlan) 71 val = ENETC_PSIVLAN_EN | ENETC_PSIVLAN_SET_QOS(qos) | vlan; 72 73 enetc_port_wr(hw, ENETC_PSIVLANR(si), val); 74 } 75 76 static int enetc_mac_addr_hash_idx(const u8 *addr) 77 { 78 u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16; 79 u64 mask = 0; 80 int res = 0; 81 int i; 82 83 for (i = 0; i < 8; i++) 84 mask |= BIT_ULL(i * 6); 85 86 for (i = 0; i < 6; i++) 87 res |= (hweight64(fold & (mask << i)) & 0x1) << i; 88 89 return res; 90 } 91 92 static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter) 93 { 94 filter->mac_addr_cnt = 0; 95 96 bitmap_zero(filter->mac_hash_table, 97 ENETC_MADDR_HASH_TBL_SZ); 98 } 99 100 static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter, 101 const unsigned char *addr) 102 { 103 /* add exact match addr */ 104 ether_addr_copy(filter->mac_addr, addr); 105 filter->mac_addr_cnt++; 106 } 107 108 static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter, 109 const unsigned char *addr) 110 { 111 int idx = enetc_mac_addr_hash_idx(addr); 112 113 /* add hash table entry */ 114 __set_bit(idx, filter->mac_hash_table); 115 filter->mac_addr_cnt++; 116 } 117 118 static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type) 119 { 120 bool err = si->errata & ENETC_ERR_UCMCSWP; 121 122 if (type == UC) { 123 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), 0); 124 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), 0); 125 } else { /* MC */ 126 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), 0); 127 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), 0); 128 } 129 } 130 131 static void enetc_set_mac_ht_flt(struct enetc_si *si, int si_idx, int type, 132 u32 *hash) 133 { 134 bool err = si->errata & ENETC_ERR_UCMCSWP; 135 136 if (type == UC) { 137 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), *hash); 138 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), *(hash + 1)); 139 } else { /* MC */ 140 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), *hash); 141 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), *(hash + 1)); 142 } 143 } 144 145 static void enetc_sync_mac_filters(struct enetc_pf *pf) 146 { 147 struct enetc_mac_filter *f = pf->mac_filter; 148 struct enetc_si *si = pf->si; 149 int i, pos; 150 151 pos = EMETC_MAC_ADDR_FILT_RES; 152 153 for (i = 0; i < MADDR_TYPE; i++, f++) { 154 bool em = (f->mac_addr_cnt == 1) && (i == UC); 155 bool clear = !f->mac_addr_cnt; 156 157 if (clear) { 158 if (i == UC) 159 enetc_clear_mac_flt_entry(si, pos); 160 161 enetc_clear_mac_ht_flt(si, 0, i); 162 continue; 163 } 164 165 /* exact match filter */ 166 if (em) { 167 int err; 168 169 enetc_clear_mac_ht_flt(si, 0, UC); 170 171 err = enetc_set_mac_flt_entry(si, pos, f->mac_addr, 172 BIT(0)); 173 if (!err) 174 continue; 175 176 /* fallback to HT filtering */ 177 dev_warn(&si->pdev->dev, "fallback to HT filt (%d)\n", 178 err); 179 } 180 181 /* hash table filter, clear EM filter for UC entries */ 182 if (i == UC) 183 enetc_clear_mac_flt_entry(si, pos); 184 185 enetc_set_mac_ht_flt(si, 0, i, (u32 *)f->mac_hash_table); 186 } 187 } 188 189 static void enetc_pf_set_rx_mode(struct net_device *ndev) 190 { 191 struct enetc_ndev_priv *priv = netdev_priv(ndev); 192 struct enetc_pf *pf = enetc_si_priv(priv->si); 193 struct enetc_hw *hw = &priv->si->hw; 194 bool uprom = false, mprom = false; 195 struct enetc_mac_filter *filter; 196 struct netdev_hw_addr *ha; 197 u32 psipmr = 0; 198 bool em; 199 200 if (ndev->flags & IFF_PROMISC) { 201 /* enable promisc mode for SI0 (PF) */ 202 psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0); 203 uprom = true; 204 mprom = true; 205 } else if (ndev->flags & IFF_ALLMULTI) { 206 /* enable multi cast promisc mode for SI0 (PF) */ 207 psipmr = ENETC_PSIPMR_SET_MP(0); 208 mprom = true; 209 } 210 211 /* first 2 filter entries belong to PF */ 212 if (!uprom) { 213 /* Update unicast filters */ 214 filter = &pf->mac_filter[UC]; 215 enetc_reset_mac_addr_filter(filter); 216 217 em = (netdev_uc_count(ndev) == 1); 218 netdev_for_each_uc_addr(ha, ndev) { 219 if (em) { 220 enetc_add_mac_addr_em_filter(filter, ha->addr); 221 break; 222 } 223 224 enetc_add_mac_addr_ht_filter(filter, ha->addr); 225 } 226 } 227 228 if (!mprom) { 229 /* Update multicast filters */ 230 filter = &pf->mac_filter[MC]; 231 enetc_reset_mac_addr_filter(filter); 232 233 netdev_for_each_mc_addr(ha, ndev) { 234 if (!is_multicast_ether_addr(ha->addr)) 235 continue; 236 237 enetc_add_mac_addr_ht_filter(filter, ha->addr); 238 } 239 } 240 241 if (!uprom || !mprom) 242 /* update PF entries */ 243 enetc_sync_mac_filters(pf); 244 245 psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) & 246 ~(ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0)); 247 enetc_port_wr(hw, ENETC_PSIPMR, psipmr); 248 } 249 250 static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx, 251 u32 *hash) 252 { 253 enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), *hash); 254 enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), *(hash + 1)); 255 } 256 257 static int enetc_vid_hash_idx(unsigned int vid) 258 { 259 int res = 0; 260 int i; 261 262 for (i = 0; i < 6; i++) 263 res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i; 264 265 return res; 266 } 267 268 static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash) 269 { 270 int i; 271 272 if (rehash) { 273 bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE); 274 275 for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) { 276 int hidx = enetc_vid_hash_idx(i); 277 278 __set_bit(hidx, pf->vlan_ht_filter); 279 } 280 } 281 282 enetc_set_vlan_ht_filter(&pf->si->hw, 0, (u32 *)pf->vlan_ht_filter); 283 } 284 285 static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid) 286 { 287 struct enetc_ndev_priv *priv = netdev_priv(ndev); 288 struct enetc_pf *pf = enetc_si_priv(priv->si); 289 int idx; 290 291 __set_bit(vid, pf->active_vlans); 292 293 idx = enetc_vid_hash_idx(vid); 294 if (!__test_and_set_bit(idx, pf->vlan_ht_filter)) 295 enetc_sync_vlan_ht_filter(pf, false); 296 297 return 0; 298 } 299 300 static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid) 301 { 302 struct enetc_ndev_priv *priv = netdev_priv(ndev); 303 struct enetc_pf *pf = enetc_si_priv(priv->si); 304 305 __clear_bit(vid, pf->active_vlans); 306 enetc_sync_vlan_ht_filter(pf, true); 307 308 return 0; 309 } 310 311 static void enetc_set_loopback(struct net_device *ndev, bool en) 312 { 313 struct enetc_ndev_priv *priv = netdev_priv(ndev); 314 struct enetc_hw *hw = &priv->si->hw; 315 u32 reg; 316 317 reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 318 if (reg & ENETC_PM0_IFM_RG) { 319 /* RGMII mode */ 320 reg = (reg & ~ENETC_PM0_IFM_RLP) | 321 (en ? ENETC_PM0_IFM_RLP : 0); 322 enetc_port_wr(hw, ENETC_PM0_IF_MODE, reg); 323 } else { 324 /* assume SGMII mode */ 325 reg = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 326 reg = (reg & ~ENETC_PM0_CMD_XGLP) | 327 (en ? ENETC_PM0_CMD_XGLP : 0); 328 reg = (reg & ~ENETC_PM0_CMD_PHY_TX_EN) | 329 (en ? ENETC_PM0_CMD_PHY_TX_EN : 0); 330 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, reg); 331 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, reg); 332 } 333 } 334 335 static int enetc_pf_set_vf_mac(struct net_device *ndev, int vf, u8 *mac) 336 { 337 struct enetc_ndev_priv *priv = netdev_priv(ndev); 338 struct enetc_pf *pf = enetc_si_priv(priv->si); 339 struct enetc_vf_state *vf_state; 340 341 if (vf >= pf->total_vfs) 342 return -EINVAL; 343 344 if (!is_valid_ether_addr(mac)) 345 return -EADDRNOTAVAIL; 346 347 vf_state = &pf->vf_state[vf]; 348 vf_state->flags |= ENETC_VF_FLAG_PF_SET_MAC; 349 enetc_pf_set_primary_mac_addr(&priv->si->hw, vf + 1, mac); 350 return 0; 351 } 352 353 static int enetc_pf_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, 354 u8 qos, __be16 proto) 355 { 356 struct enetc_ndev_priv *priv = netdev_priv(ndev); 357 struct enetc_pf *pf = enetc_si_priv(priv->si); 358 359 if (priv->si->errata & ENETC_ERR_VLAN_ISOL) 360 return -EOPNOTSUPP; 361 362 if (vf >= pf->total_vfs) 363 return -EINVAL; 364 365 if (proto != htons(ETH_P_8021Q)) 366 /* only C-tags supported for now */ 367 return -EPROTONOSUPPORT; 368 369 enetc_set_isol_vlan(&priv->si->hw, vf + 1, vlan, qos); 370 return 0; 371 } 372 373 static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en) 374 { 375 struct enetc_ndev_priv *priv = netdev_priv(ndev); 376 struct enetc_pf *pf = enetc_si_priv(priv->si); 377 u32 cfgr; 378 379 if (vf >= pf->total_vfs) 380 return -EINVAL; 381 382 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); 383 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); 384 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); 385 386 return 0; 387 } 388 389 static void enetc_port_setup_primary_mac_address(struct enetc_si *si) 390 { 391 unsigned char mac_addr[MAX_ADDR_LEN]; 392 struct enetc_pf *pf = enetc_si_priv(si); 393 struct enetc_hw *hw = &si->hw; 394 int i; 395 396 /* check MAC addresses for PF and all VFs, if any is 0 set it ro rand */ 397 for (i = 0; i < pf->total_vfs + 1; i++) { 398 enetc_pf_get_primary_mac_addr(hw, i, mac_addr); 399 if (!is_zero_ether_addr(mac_addr)) 400 continue; 401 eth_random_addr(mac_addr); 402 dev_info(&si->pdev->dev, "no MAC address specified for SI%d, using %pM\n", 403 i, mac_addr); 404 enetc_pf_set_primary_mac_addr(hw, i, mac_addr); 405 } 406 } 407 408 static void enetc_port_assign_rfs_entries(struct enetc_si *si) 409 { 410 struct enetc_pf *pf = enetc_si_priv(si); 411 struct enetc_hw *hw = &si->hw; 412 int num_entries, vf_entries, i; 413 u32 val; 414 415 /* split RFS entries between functions */ 416 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 417 num_entries = ENETC_PRFSCAPR_GET_NUM_RFS(val); 418 vf_entries = num_entries / (pf->total_vfs + 1); 419 420 for (i = 0; i < pf->total_vfs; i++) 421 enetc_port_wr(hw, ENETC_PSIRFSCFGR(i + 1), vf_entries); 422 enetc_port_wr(hw, ENETC_PSIRFSCFGR(0), 423 num_entries - vf_entries * pf->total_vfs); 424 425 /* enable RFS on port */ 426 enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE); 427 } 428 429 static void enetc_port_si_configure(struct enetc_si *si) 430 { 431 struct enetc_pf *pf = enetc_si_priv(si); 432 struct enetc_hw *hw = &si->hw; 433 int num_rings, i; 434 u32 val; 435 436 val = enetc_port_rd(hw, ENETC_PCAPR0); 437 num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val)); 438 439 val = ENETC_PSICFGR0_SET_TXBDR(ENETC_PF_NUM_RINGS); 440 val |= ENETC_PSICFGR0_SET_RXBDR(ENETC_PF_NUM_RINGS); 441 442 if (unlikely(num_rings < ENETC_PF_NUM_RINGS)) { 443 val = ENETC_PSICFGR0_SET_TXBDR(num_rings); 444 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 445 446 dev_warn(&si->pdev->dev, "Found %d rings, expected %d!\n", 447 num_rings, ENETC_PF_NUM_RINGS); 448 449 num_rings = 0; 450 } 451 452 /* Add default one-time settings for SI0 (PF) */ 453 val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 454 455 enetc_port_wr(hw, ENETC_PSICFGR0(0), val); 456 457 if (num_rings) 458 num_rings -= ENETC_PF_NUM_RINGS; 459 460 /* Configure the SIs for each available VF */ 461 val = ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 462 val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE; 463 464 if (num_rings) { 465 num_rings /= pf->total_vfs; 466 val |= ENETC_PSICFGR0_SET_TXBDR(num_rings); 467 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 468 } 469 470 for (i = 0; i < pf->total_vfs; i++) 471 enetc_port_wr(hw, ENETC_PSICFGR0(i + 1), val); 472 473 /* Port level VLAN settings */ 474 val = ENETC_PVCLCTR_OVTPIDL(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 475 enetc_port_wr(hw, ENETC_PVCLCTR, val); 476 /* use outer tag for VLAN filtering */ 477 enetc_port_wr(hw, ENETC_PSIVLANFMR, ENETC_PSIVLANFMR_VS); 478 } 479 480 static void enetc_configure_port_mac(struct enetc_hw *hw) 481 { 482 enetc_port_wr(hw, ENETC_PM0_MAXFRM, 483 ENETC_SET_MAXFRM(ENETC_RX_MAXFRM_SIZE)); 484 485 enetc_port_wr(hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE); 486 enetc_port_wr(hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE); 487 488 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 489 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 490 491 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 492 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 493 494 /* On LS1028A, the MAC RX FIFO defaults to 2, which is too high 495 * and may lead to RX lock-up under traffic. Set it to 1 instead, 496 * as recommended by the hardware team. 497 */ 498 enetc_port_wr(hw, ENETC_PM0_RX_FIFO, ENETC_PM0_RX_FIFO_VAL); 499 } 500 501 static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode) 502 { 503 u32 val; 504 505 if (phy_interface_mode_is_rgmii(phy_mode)) { 506 val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 507 val &= ~ENETC_PM0_IFM_EN_AUTO; 508 val &= ENETC_PM0_IFM_IFMODE_MASK; 509 val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG; 510 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 511 } 512 513 if (phy_mode == PHY_INTERFACE_MODE_USXGMII) { 514 val = ENETC_PM0_IFM_FULL_DPX | ENETC_PM0_IFM_IFMODE_XGMII; 515 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 516 } 517 } 518 519 static void enetc_mac_enable(struct enetc_hw *hw, bool en) 520 { 521 u32 val = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 522 523 val &= ~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN); 524 val |= en ? (ENETC_PM0_TX_EN | ENETC_PM0_RX_EN) : 0; 525 526 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, val); 527 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, val); 528 } 529 530 static void enetc_configure_port_pmac(struct enetc_hw *hw) 531 { 532 u32 temp; 533 534 /* Set pMAC step lock */ 535 temp = enetc_port_rd(hw, ENETC_PFPMR); 536 enetc_port_wr(hw, ENETC_PFPMR, 537 temp | ENETC_PFPMR_PMACE | ENETC_PFPMR_MWLM); 538 539 temp = enetc_port_rd(hw, ENETC_MMCSR); 540 enetc_port_wr(hw, ENETC_MMCSR, temp | ENETC_MMCSR_ME); 541 } 542 543 static void enetc_configure_port(struct enetc_pf *pf) 544 { 545 u8 hash_key[ENETC_RSSHASH_KEY_SIZE]; 546 struct enetc_hw *hw = &pf->si->hw; 547 548 enetc_configure_port_pmac(hw); 549 550 enetc_configure_port_mac(hw); 551 552 enetc_port_si_configure(pf->si); 553 554 /* set up hash key */ 555 get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE); 556 enetc_set_rss_key(hw, hash_key); 557 558 /* split up RFS entries */ 559 enetc_port_assign_rfs_entries(pf->si); 560 561 /* fix-up primary MAC addresses, if not set already */ 562 enetc_port_setup_primary_mac_address(pf->si); 563 564 /* enforce VLAN promisc mode for all SIs */ 565 pf->vlan_promisc_simap = ENETC_VLAN_PROMISC_MAP_ALL; 566 enetc_set_vlan_promisc(hw, pf->vlan_promisc_simap); 567 568 enetc_port_wr(hw, ENETC_PSIPMR, 0); 569 570 /* enable port */ 571 enetc_port_wr(hw, ENETC_PMR, ENETC_PMR_EN); 572 } 573 574 /* Messaging */ 575 static u16 enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf *pf, 576 int vf_id) 577 { 578 struct enetc_vf_state *vf_state = &pf->vf_state[vf_id]; 579 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 580 struct enetc_msg_cmd_set_primary_mac *cmd; 581 struct device *dev = &pf->si->pdev->dev; 582 u16 cmd_id; 583 char *addr; 584 585 cmd = (struct enetc_msg_cmd_set_primary_mac *)msg->vaddr; 586 cmd_id = cmd->header.id; 587 if (cmd_id != ENETC_MSG_CMD_MNG_ADD) 588 return ENETC_MSG_CMD_STATUS_FAIL; 589 590 addr = cmd->mac.sa_data; 591 if (vf_state->flags & ENETC_VF_FLAG_PF_SET_MAC) 592 dev_warn(dev, "Attempt to override PF set mac addr for VF%d\n", 593 vf_id); 594 else 595 enetc_pf_set_primary_mac_addr(&pf->si->hw, vf_id + 1, addr); 596 597 return ENETC_MSG_CMD_STATUS_OK; 598 } 599 600 void enetc_msg_handle_rxmsg(struct enetc_pf *pf, int vf_id, u16 *status) 601 { 602 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 603 struct device *dev = &pf->si->pdev->dev; 604 struct enetc_msg_cmd_header *cmd_hdr; 605 u16 cmd_type; 606 607 *status = ENETC_MSG_CMD_STATUS_OK; 608 cmd_hdr = (struct enetc_msg_cmd_header *)msg->vaddr; 609 cmd_type = cmd_hdr->type; 610 611 switch (cmd_type) { 612 case ENETC_MSG_CMD_MNG_MAC: 613 *status = enetc_msg_pf_set_vf_primary_mac_addr(pf, vf_id); 614 break; 615 default: 616 dev_err(dev, "command not supported (cmd_type: 0x%x)\n", 617 cmd_type); 618 } 619 } 620 621 #ifdef CONFIG_PCI_IOV 622 static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs) 623 { 624 struct enetc_si *si = pci_get_drvdata(pdev); 625 struct enetc_pf *pf = enetc_si_priv(si); 626 int err; 627 628 if (!num_vfs) { 629 enetc_msg_psi_free(pf); 630 kfree(pf->vf_state); 631 pf->num_vfs = 0; 632 pci_disable_sriov(pdev); 633 } else { 634 pf->num_vfs = num_vfs; 635 636 pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state), 637 GFP_KERNEL); 638 if (!pf->vf_state) { 639 pf->num_vfs = 0; 640 return -ENOMEM; 641 } 642 643 err = enetc_msg_psi_init(pf); 644 if (err) { 645 dev_err(&pdev->dev, "enetc_msg_psi_init (%d)\n", err); 646 goto err_msg_psi; 647 } 648 649 err = pci_enable_sriov(pdev, num_vfs); 650 if (err) { 651 dev_err(&pdev->dev, "pci_enable_sriov err %d\n", err); 652 goto err_en_sriov; 653 } 654 } 655 656 return num_vfs; 657 658 err_en_sriov: 659 enetc_msg_psi_free(pf); 660 err_msg_psi: 661 kfree(pf->vf_state); 662 pf->num_vfs = 0; 663 664 return err; 665 } 666 #else 667 #define enetc_sriov_configure(pdev, num_vfs) (void)0 668 #endif 669 670 static int enetc_pf_set_features(struct net_device *ndev, 671 netdev_features_t features) 672 { 673 netdev_features_t changed = ndev->features ^ features; 674 struct enetc_ndev_priv *priv = netdev_priv(ndev); 675 676 if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { 677 struct enetc_pf *pf = enetc_si_priv(priv->si); 678 679 if (!!(features & NETIF_F_HW_VLAN_CTAG_FILTER)) 680 enetc_disable_si_vlan_promisc(pf, 0); 681 else 682 enetc_enable_si_vlan_promisc(pf, 0); 683 } 684 685 if (changed & NETIF_F_LOOPBACK) 686 enetc_set_loopback(ndev, !!(features & NETIF_F_LOOPBACK)); 687 688 return enetc_set_features(ndev, features); 689 } 690 691 static const struct net_device_ops enetc_ndev_ops = { 692 .ndo_open = enetc_open, 693 .ndo_stop = enetc_close, 694 .ndo_start_xmit = enetc_xmit, 695 .ndo_get_stats = enetc_get_stats, 696 .ndo_set_mac_address = enetc_pf_set_mac_addr, 697 .ndo_set_rx_mode = enetc_pf_set_rx_mode, 698 .ndo_vlan_rx_add_vid = enetc_vlan_rx_add_vid, 699 .ndo_vlan_rx_kill_vid = enetc_vlan_rx_del_vid, 700 .ndo_set_vf_mac = enetc_pf_set_vf_mac, 701 .ndo_set_vf_vlan = enetc_pf_set_vf_vlan, 702 .ndo_set_vf_spoofchk = enetc_pf_set_vf_spoofchk, 703 .ndo_set_features = enetc_pf_set_features, 704 .ndo_do_ioctl = enetc_ioctl, 705 .ndo_setup_tc = enetc_setup_tc, 706 }; 707 708 static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev, 709 const struct net_device_ops *ndev_ops) 710 { 711 struct enetc_ndev_priv *priv = netdev_priv(ndev); 712 713 SET_NETDEV_DEV(ndev, &si->pdev->dev); 714 priv->ndev = ndev; 715 priv->si = si; 716 priv->dev = &si->pdev->dev; 717 si->ndev = ndev; 718 719 priv->msg_enable = (NETIF_MSG_WOL << 1) - 1; 720 ndev->netdev_ops = ndev_ops; 721 enetc_set_ethtool_ops(ndev); 722 ndev->watchdog_timeo = 5 * HZ; 723 ndev->max_mtu = ENETC_MAX_MTU; 724 725 ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | 726 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 727 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK; 728 ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM | 729 NETIF_F_HW_VLAN_CTAG_TX | 730 NETIF_F_HW_VLAN_CTAG_RX; 731 732 if (si->num_rss) 733 ndev->hw_features |= NETIF_F_RXHASH; 734 735 ndev->priv_flags |= IFF_UNICAST_FLT; 736 737 if (si->hw_features & ENETC_SI_F_QBV) 738 priv->active_offloads |= ENETC_F_QBV; 739 740 if (si->hw_features & ENETC_SI_F_PSFP && !enetc_psfp_enable(priv)) { 741 priv->active_offloads |= ENETC_F_QCI; 742 ndev->features |= NETIF_F_HW_TC; 743 ndev->hw_features |= NETIF_F_HW_TC; 744 } 745 746 /* pick up primary MAC address from SI */ 747 enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr); 748 } 749 750 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np) 751 { 752 struct device *dev = &pf->si->pdev->dev; 753 struct enetc_mdio_priv *mdio_priv; 754 struct mii_bus *bus; 755 int err; 756 757 bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv)); 758 if (!bus) 759 return -ENOMEM; 760 761 bus->name = "Freescale ENETC MDIO Bus"; 762 bus->read = enetc_mdio_read; 763 bus->write = enetc_mdio_write; 764 bus->parent = dev; 765 mdio_priv = bus->priv; 766 mdio_priv->hw = &pf->si->hw; 767 mdio_priv->mdio_base = ENETC_EMDIO_BASE; 768 snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); 769 770 err = of_mdiobus_register(bus, np); 771 if (err) { 772 dev_err(dev, "cannot register MDIO bus\n"); 773 return err; 774 } 775 776 pf->mdio = bus; 777 778 return 0; 779 } 780 781 static void enetc_mdio_remove(struct enetc_pf *pf) 782 { 783 if (pf->mdio) 784 mdiobus_unregister(pf->mdio); 785 } 786 787 static int enetc_imdio_create(struct enetc_pf *pf) 788 { 789 struct device *dev = &pf->si->pdev->dev; 790 struct enetc_mdio_priv *mdio_priv; 791 struct lynx_pcs *pcs_lynx; 792 struct mdio_device *pcs; 793 struct mii_bus *bus; 794 int err; 795 796 bus = mdiobus_alloc_size(sizeof(*mdio_priv)); 797 if (!bus) 798 return -ENOMEM; 799 800 bus->name = "Freescale ENETC internal MDIO Bus"; 801 bus->read = enetc_mdio_read; 802 bus->write = enetc_mdio_write; 803 bus->parent = dev; 804 bus->phy_mask = ~0; 805 mdio_priv = bus->priv; 806 mdio_priv->hw = &pf->si->hw; 807 mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE; 808 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev)); 809 810 err = mdiobus_register(bus); 811 if (err) { 812 dev_err(dev, "cannot register internal MDIO bus (%d)\n", err); 813 goto free_mdio_bus; 814 } 815 816 pcs = mdio_device_create(bus, 0); 817 if (IS_ERR(pcs)) { 818 err = PTR_ERR(pcs); 819 dev_err(dev, "cannot create pcs (%d)\n", err); 820 goto unregister_mdiobus; 821 } 822 823 pcs_lynx = lynx_pcs_create(pcs); 824 if (!pcs_lynx) { 825 mdio_device_free(pcs); 826 err = -ENOMEM; 827 dev_err(dev, "cannot create lynx pcs (%d)\n", err); 828 goto unregister_mdiobus; 829 } 830 831 pf->imdio = bus; 832 pf->pcs = pcs_lynx; 833 834 return 0; 835 836 unregister_mdiobus: 837 mdiobus_unregister(bus); 838 free_mdio_bus: 839 mdiobus_free(bus); 840 return err; 841 } 842 843 static void enetc_imdio_remove(struct enetc_pf *pf) 844 { 845 if (pf->pcs) { 846 mdio_device_free(pf->pcs->mdio); 847 lynx_pcs_destroy(pf->pcs); 848 } 849 if (pf->imdio) { 850 mdiobus_unregister(pf->imdio); 851 mdiobus_free(pf->imdio); 852 } 853 } 854 855 static bool enetc_port_has_pcs(struct enetc_pf *pf) 856 { 857 return (pf->if_mode == PHY_INTERFACE_MODE_SGMII || 858 pf->if_mode == PHY_INTERFACE_MODE_2500BASEX || 859 pf->if_mode == PHY_INTERFACE_MODE_USXGMII); 860 } 861 862 static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node) 863 { 864 struct device_node *mdio_np; 865 int err; 866 867 mdio_np = of_get_child_by_name(node, "mdio"); 868 if (mdio_np) { 869 err = enetc_mdio_probe(pf, mdio_np); 870 871 of_node_put(mdio_np); 872 if (err) 873 return err; 874 } 875 876 if (enetc_port_has_pcs(pf)) { 877 err = enetc_imdio_create(pf); 878 if (err) { 879 enetc_mdio_remove(pf); 880 return err; 881 } 882 } 883 884 return 0; 885 } 886 887 static void enetc_mdiobus_destroy(struct enetc_pf *pf) 888 { 889 enetc_mdio_remove(pf); 890 enetc_imdio_remove(pf); 891 } 892 893 static void enetc_pl_mac_validate(struct phylink_config *config, 894 unsigned long *supported, 895 struct phylink_link_state *state) 896 { 897 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 898 899 if (state->interface != PHY_INTERFACE_MODE_NA && 900 state->interface != PHY_INTERFACE_MODE_INTERNAL && 901 state->interface != PHY_INTERFACE_MODE_SGMII && 902 state->interface != PHY_INTERFACE_MODE_2500BASEX && 903 state->interface != PHY_INTERFACE_MODE_USXGMII && 904 !phy_interface_mode_is_rgmii(state->interface)) { 905 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 906 return; 907 } 908 909 phylink_set_port_modes(mask); 910 phylink_set(mask, Autoneg); 911 phylink_set(mask, Pause); 912 phylink_set(mask, Asym_Pause); 913 phylink_set(mask, 10baseT_Half); 914 phylink_set(mask, 10baseT_Full); 915 phylink_set(mask, 100baseT_Half); 916 phylink_set(mask, 100baseT_Full); 917 phylink_set(mask, 100baseT_Half); 918 phylink_set(mask, 1000baseT_Half); 919 phylink_set(mask, 1000baseT_Full); 920 921 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 922 state->interface == PHY_INTERFACE_MODE_2500BASEX || 923 state->interface == PHY_INTERFACE_MODE_USXGMII) { 924 phylink_set(mask, 2500baseT_Full); 925 phylink_set(mask, 2500baseX_Full); 926 } 927 928 bitmap_and(supported, supported, mask, 929 __ETHTOOL_LINK_MODE_MASK_NBITS); 930 bitmap_and(state->advertising, state->advertising, mask, 931 __ETHTOOL_LINK_MODE_MASK_NBITS); 932 } 933 934 static void enetc_pl_mac_config(struct phylink_config *config, 935 unsigned int mode, 936 const struct phylink_link_state *state) 937 { 938 struct enetc_pf *pf = phylink_to_enetc_pf(config); 939 struct enetc_ndev_priv *priv; 940 941 enetc_mac_config(&pf->si->hw, state->interface); 942 943 priv = netdev_priv(pf->si->ndev); 944 if (pf->pcs) 945 phylink_set_pcs(priv->phylink, &pf->pcs->pcs); 946 } 947 948 static void enetc_force_rgmii_mac(struct enetc_hw *hw, int speed, int duplex) 949 { 950 u32 old_val, val; 951 952 old_val = val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 953 954 if (speed == SPEED_1000) { 955 val &= ~ENETC_PM0_IFM_SSP_MASK; 956 val |= ENETC_PM0_IFM_SSP_1000; 957 } else if (speed == SPEED_100) { 958 val &= ~ENETC_PM0_IFM_SSP_MASK; 959 val |= ENETC_PM0_IFM_SSP_100; 960 } else if (speed == SPEED_10) { 961 val &= ~ENETC_PM0_IFM_SSP_MASK; 962 val |= ENETC_PM0_IFM_SSP_10; 963 } 964 965 if (duplex == DUPLEX_FULL) 966 val |= ENETC_PM0_IFM_FULL_DPX; 967 else 968 val &= ~ENETC_PM0_IFM_FULL_DPX; 969 970 if (val == old_val) 971 return; 972 973 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 974 } 975 976 static void enetc_pl_mac_link_up(struct phylink_config *config, 977 struct phy_device *phy, unsigned int mode, 978 phy_interface_t interface, int speed, 979 int duplex, bool tx_pause, bool rx_pause) 980 { 981 struct enetc_pf *pf = phylink_to_enetc_pf(config); 982 struct enetc_ndev_priv *priv; 983 984 priv = netdev_priv(pf->si->ndev); 985 if (priv->active_offloads & ENETC_F_QBV) 986 enetc_sched_speed_set(priv, speed); 987 988 if (!phylink_autoneg_inband(mode) && 989 phy_interface_mode_is_rgmii(interface)) 990 enetc_force_rgmii_mac(&pf->si->hw, speed, duplex); 991 992 enetc_mac_enable(&pf->si->hw, true); 993 } 994 995 static void enetc_pl_mac_link_down(struct phylink_config *config, 996 unsigned int mode, 997 phy_interface_t interface) 998 { 999 struct enetc_pf *pf = phylink_to_enetc_pf(config); 1000 1001 enetc_mac_enable(&pf->si->hw, false); 1002 } 1003 1004 static const struct phylink_mac_ops enetc_mac_phylink_ops = { 1005 .validate = enetc_pl_mac_validate, 1006 .mac_config = enetc_pl_mac_config, 1007 .mac_link_up = enetc_pl_mac_link_up, 1008 .mac_link_down = enetc_pl_mac_link_down, 1009 }; 1010 1011 static int enetc_phylink_create(struct enetc_ndev_priv *priv, 1012 struct device_node *node) 1013 { 1014 struct enetc_pf *pf = enetc_si_priv(priv->si); 1015 struct phylink *phylink; 1016 int err; 1017 1018 pf->phylink_config.dev = &priv->ndev->dev; 1019 pf->phylink_config.type = PHYLINK_NETDEV; 1020 1021 phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node), 1022 pf->if_mode, &enetc_mac_phylink_ops); 1023 if (IS_ERR(phylink)) { 1024 err = PTR_ERR(phylink); 1025 return err; 1026 } 1027 1028 priv->phylink = phylink; 1029 1030 return 0; 1031 } 1032 1033 static void enetc_phylink_destroy(struct enetc_ndev_priv *priv) 1034 { 1035 if (priv->phylink) 1036 phylink_destroy(priv->phylink); 1037 } 1038 1039 /* Initialize the entire shared memory for the flow steering entries 1040 * of this port (PF + VFs) 1041 */ 1042 static int enetc_init_port_rfs_memory(struct enetc_si *si) 1043 { 1044 struct enetc_cmd_rfse rfse = {0}; 1045 struct enetc_hw *hw = &si->hw; 1046 int num_rfs, i, err = 0; 1047 u32 val; 1048 1049 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 1050 num_rfs = ENETC_PRFSCAPR_GET_NUM_RFS(val); 1051 1052 for (i = 0; i < num_rfs; i++) { 1053 err = enetc_set_fs_entry(si, &rfse, i); 1054 if (err) 1055 break; 1056 } 1057 1058 return err; 1059 } 1060 1061 static int enetc_init_port_rss_memory(struct enetc_si *si) 1062 { 1063 struct enetc_hw *hw = &si->hw; 1064 int num_rss, err; 1065 int *rss_table; 1066 u32 val; 1067 1068 val = enetc_port_rd(hw, ENETC_PRSSCAPR); 1069 num_rss = ENETC_PRSSCAPR_GET_NUM_RSS(val); 1070 if (!num_rss) 1071 return 0; 1072 1073 rss_table = kcalloc(num_rss, sizeof(*rss_table), GFP_KERNEL); 1074 if (!rss_table) 1075 return -ENOMEM; 1076 1077 err = enetc_set_rss_table(si, rss_table, num_rss); 1078 1079 kfree(rss_table); 1080 1081 return err; 1082 } 1083 1084 static void enetc_init_unused_port(struct enetc_si *si) 1085 { 1086 struct device *dev = &si->pdev->dev; 1087 struct enetc_hw *hw = &si->hw; 1088 int err; 1089 1090 si->cbd_ring.bd_count = ENETC_CBDR_DEFAULT_SIZE; 1091 err = enetc_alloc_cbdr(dev, &si->cbd_ring); 1092 if (err) 1093 return; 1094 1095 enetc_setup_cbdr(hw, &si->cbd_ring); 1096 1097 enetc_init_port_rfs_memory(si); 1098 enetc_init_port_rss_memory(si); 1099 1100 enetc_clear_cbdr(hw); 1101 enetc_free_cbdr(dev, &si->cbd_ring); 1102 } 1103 1104 static int enetc_pf_probe(struct pci_dev *pdev, 1105 const struct pci_device_id *ent) 1106 { 1107 struct device_node *node = pdev->dev.of_node; 1108 struct enetc_ndev_priv *priv; 1109 struct net_device *ndev; 1110 struct enetc_si *si; 1111 struct enetc_pf *pf; 1112 int err; 1113 1114 err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf)); 1115 if (err) { 1116 dev_err(&pdev->dev, "PCI probing failed\n"); 1117 return err; 1118 } 1119 1120 si = pci_get_drvdata(pdev); 1121 if (!si->hw.port || !si->hw.global) { 1122 err = -ENODEV; 1123 dev_err(&pdev->dev, "could not map PF space, probing a VF?\n"); 1124 goto err_map_pf_space; 1125 } 1126 1127 if (node && !of_device_is_available(node)) { 1128 enetc_init_unused_port(si); 1129 dev_info(&pdev->dev, "device is disabled, skipping\n"); 1130 err = -ENODEV; 1131 goto err_device_disabled; 1132 } 1133 1134 pf = enetc_si_priv(si); 1135 pf->si = si; 1136 pf->total_vfs = pci_sriov_get_totalvfs(pdev); 1137 1138 enetc_configure_port(pf); 1139 1140 enetc_get_si_caps(si); 1141 1142 ndev = alloc_etherdev_mq(sizeof(*priv), ENETC_MAX_NUM_TXQS); 1143 if (!ndev) { 1144 err = -ENOMEM; 1145 dev_err(&pdev->dev, "netdev creation failed\n"); 1146 goto err_alloc_netdev; 1147 } 1148 1149 enetc_pf_netdev_setup(si, ndev, &enetc_ndev_ops); 1150 1151 priv = netdev_priv(ndev); 1152 1153 enetc_init_si_rings_params(priv); 1154 1155 err = enetc_alloc_si_resources(priv); 1156 if (err) { 1157 dev_err(&pdev->dev, "SI resource alloc failed\n"); 1158 goto err_alloc_si_res; 1159 } 1160 1161 err = enetc_init_port_rfs_memory(si); 1162 if (err) { 1163 dev_err(&pdev->dev, "Failed to initialize RFS memory\n"); 1164 goto err_init_port_rfs; 1165 } 1166 1167 err = enetc_init_port_rss_memory(si); 1168 if (err) { 1169 dev_err(&pdev->dev, "Failed to initialize RSS memory\n"); 1170 goto err_init_port_rss; 1171 } 1172 1173 err = enetc_configure_si(priv); 1174 if (err) { 1175 dev_err(&pdev->dev, "Failed to configure SI\n"); 1176 goto err_config_si; 1177 } 1178 1179 err = enetc_alloc_msix(priv); 1180 if (err) { 1181 dev_err(&pdev->dev, "MSIX alloc failed\n"); 1182 goto err_alloc_msix; 1183 } 1184 1185 if (!of_get_phy_mode(node, &pf->if_mode)) { 1186 err = enetc_mdiobus_create(pf, node); 1187 if (err) 1188 goto err_mdiobus_create; 1189 1190 err = enetc_phylink_create(priv, node); 1191 if (err) 1192 goto err_phylink_create; 1193 } 1194 1195 err = register_netdev(ndev); 1196 if (err) 1197 goto err_reg_netdev; 1198 1199 return 0; 1200 1201 err_reg_netdev: 1202 enetc_phylink_destroy(priv); 1203 err_phylink_create: 1204 enetc_mdiobus_destroy(pf); 1205 err_mdiobus_create: 1206 enetc_free_msix(priv); 1207 err_config_si: 1208 err_init_port_rss: 1209 err_init_port_rfs: 1210 err_alloc_msix: 1211 enetc_free_si_resources(priv); 1212 err_alloc_si_res: 1213 si->ndev = NULL; 1214 free_netdev(ndev); 1215 err_alloc_netdev: 1216 err_device_disabled: 1217 err_map_pf_space: 1218 enetc_pci_remove(pdev); 1219 1220 return err; 1221 } 1222 1223 static void enetc_pf_remove(struct pci_dev *pdev) 1224 { 1225 struct enetc_si *si = pci_get_drvdata(pdev); 1226 struct enetc_pf *pf = enetc_si_priv(si); 1227 struct enetc_ndev_priv *priv; 1228 1229 priv = netdev_priv(si->ndev); 1230 1231 if (pf->num_vfs) 1232 enetc_sriov_configure(pdev, 0); 1233 1234 unregister_netdev(si->ndev); 1235 1236 enetc_phylink_destroy(priv); 1237 enetc_mdiobus_destroy(pf); 1238 1239 enetc_free_msix(priv); 1240 1241 enetc_free_si_resources(priv); 1242 1243 free_netdev(si->ndev); 1244 1245 enetc_pci_remove(pdev); 1246 } 1247 1248 static const struct pci_device_id enetc_pf_id_table[] = { 1249 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) }, 1250 { 0, } /* End of table. */ 1251 }; 1252 MODULE_DEVICE_TABLE(pci, enetc_pf_id_table); 1253 1254 static struct pci_driver enetc_pf_driver = { 1255 .name = KBUILD_MODNAME, 1256 .id_table = enetc_pf_id_table, 1257 .probe = enetc_pf_probe, 1258 .remove = enetc_pf_remove, 1259 #ifdef CONFIG_PCI_IOV 1260 .sriov_configure = enetc_sriov_configure, 1261 #endif 1262 }; 1263 module_pci_driver(enetc_pf_driver); 1264 1265 MODULE_DESCRIPTION(ENETC_DRV_NAME_STR); 1266 MODULE_LICENSE("Dual BSD/GPL"); 1267