1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2017-2019 NXP */ 3 4 #include <linux/timer.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/dma-mapping.h> 9 #include <linux/skbuff.h> 10 #include <linux/ethtool.h> 11 #include <linux/if_vlan.h> 12 #include <linux/phylink.h> 13 #include <linux/dim.h> 14 15 #include "enetc_hw.h" 16 17 #define ENETC_MAC_MAXFRM_SIZE 9600 18 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \ 19 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN)) 20 21 #define ENETC_CBD_DATA_MEM_ALIGN 64 22 23 struct enetc_tx_swbd { 24 union { 25 struct sk_buff *skb; 26 struct xdp_frame *xdp_frame; 27 }; 28 dma_addr_t dma; 29 struct page *page; /* valid only if is_xdp_tx */ 30 u16 page_offset; /* valid only if is_xdp_tx */ 31 u16 len; 32 enum dma_data_direction dir; 33 u8 is_dma_page:1; 34 u8 check_wb:1; 35 u8 do_twostep_tstamp:1; 36 u8 is_eof:1; 37 u8 is_xdp_tx:1; 38 u8 is_xdp_redirect:1; 39 }; 40 41 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE 42 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */ 43 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */ 44 #define ENETC_RXB_DMA_SIZE \ 45 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD) 46 #define ENETC_RXB_DMA_SIZE_XDP \ 47 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM) 48 49 struct enetc_rx_swbd { 50 dma_addr_t dma; 51 struct page *page; 52 u16 page_offset; 53 enum dma_data_direction dir; 54 u16 len; 55 }; 56 57 /* ENETC overhead: optional extension BD + 1 BD gap */ 58 #define ENETC_TXBDS_NEEDED(val) ((val) + 2) 59 /* max # of chained Tx BDs is 15, including head and extension BD */ 60 #define ENETC_MAX_SKB_FRAGS 13 61 #define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1) 62 63 struct enetc_ring_stats { 64 unsigned int packets; 65 unsigned int bytes; 66 unsigned int rx_alloc_errs; 67 unsigned int xdp_drops; 68 unsigned int xdp_tx; 69 unsigned int xdp_tx_drops; 70 unsigned int xdp_redirect; 71 unsigned int xdp_redirect_failures; 72 unsigned int xdp_redirect_sg; 73 unsigned int recycles; 74 unsigned int recycle_failures; 75 }; 76 77 struct enetc_xdp_data { 78 struct xdp_rxq_info rxq; 79 struct bpf_prog *prog; 80 int xdp_tx_in_flight; 81 }; 82 83 #define ENETC_RX_RING_DEFAULT_SIZE 2048 84 #define ENETC_TX_RING_DEFAULT_SIZE 2048 85 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2) 86 87 struct enetc_bdr { 88 struct device *dev; /* for DMA mapping */ 89 struct net_device *ndev; 90 void *bd_base; /* points to Rx or Tx BD ring */ 91 union { 92 void __iomem *tpir; 93 void __iomem *rcir; 94 }; 95 u16 index; 96 int bd_count; /* # of BDs */ 97 int next_to_use; 98 int next_to_clean; 99 union { 100 struct enetc_tx_swbd *tx_swbd; 101 struct enetc_rx_swbd *rx_swbd; 102 }; 103 union { 104 void __iomem *tcir; /* Tx */ 105 int next_to_alloc; /* Rx */ 106 }; 107 void __iomem *idr; /* Interrupt Detect Register pointer */ 108 109 int buffer_offset; 110 struct enetc_xdp_data xdp; 111 112 struct enetc_ring_stats stats; 113 114 dma_addr_t bd_dma_base; 115 u8 tsd_enable; /* Time specific departure */ 116 bool ext_en; /* enable h/w descriptor extensions */ 117 118 /* DMA buffer for TSO headers */ 119 char *tso_headers; 120 dma_addr_t tso_headers_dma; 121 } ____cacheline_aligned_in_smp; 122 123 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i) 124 { 125 if (unlikely(++*i == bdr->bd_count)) 126 *i = 0; 127 } 128 129 static inline int enetc_bd_unused(struct enetc_bdr *bdr) 130 { 131 if (bdr->next_to_clean > bdr->next_to_use) 132 return bdr->next_to_clean - bdr->next_to_use - 1; 133 134 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; 135 } 136 137 static inline int enetc_swbd_unused(struct enetc_bdr *bdr) 138 { 139 if (bdr->next_to_clean > bdr->next_to_alloc) 140 return bdr->next_to_clean - bdr->next_to_alloc - 1; 141 142 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1; 143 } 144 145 /* Control BD ring */ 146 #define ENETC_CBDR_DEFAULT_SIZE 64 147 struct enetc_cbdr { 148 void *bd_base; /* points to Rx or Tx BD ring */ 149 void __iomem *pir; 150 void __iomem *cir; 151 void __iomem *mr; /* mode register */ 152 153 int bd_count; /* # of BDs */ 154 int next_to_use; 155 int next_to_clean; 156 157 dma_addr_t bd_dma_base; 158 struct device *dma_dev; 159 }; 160 161 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i])) 162 163 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i) 164 { 165 int hw_idx = i; 166 167 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 168 if (rx_ring->ext_en) 169 hw_idx = 2 * i; 170 #endif 171 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]); 172 } 173 174 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring, 175 union enetc_rx_bd **old_rxbd, int *old_index) 176 { 177 union enetc_rx_bd *new_rxbd = *old_rxbd; 178 int new_index = *old_index; 179 180 new_rxbd++; 181 182 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 183 if (rx_ring->ext_en) 184 new_rxbd++; 185 #endif 186 187 if (unlikely(++new_index == rx_ring->bd_count)) { 188 new_rxbd = rx_ring->bd_base; 189 new_index = 0; 190 } 191 192 *old_rxbd = new_rxbd; 193 *old_index = new_index; 194 } 195 196 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd) 197 { 198 return ++rxbd; 199 } 200 201 struct enetc_msg_swbd { 202 void *vaddr; 203 dma_addr_t dma; 204 int size; 205 }; 206 207 #define ENETC_REV1 0x1 208 enum enetc_errata { 209 ENETC_ERR_VLAN_ISOL = BIT(0), 210 ENETC_ERR_UCMCSWP = BIT(1), 211 }; 212 213 #define ENETC_SI_F_QBV BIT(0) 214 #define ENETC_SI_F_PSFP BIT(1) 215 216 /* PCI IEP device data */ 217 struct enetc_si { 218 struct pci_dev *pdev; 219 struct enetc_hw hw; 220 enum enetc_errata errata; 221 222 struct net_device *ndev; /* back ref. */ 223 224 struct enetc_cbdr cbd_ring; 225 226 int num_rx_rings; /* how many rings are available in the SI */ 227 int num_tx_rings; 228 int num_fs_entries; 229 int num_rss; /* number of RSS buckets */ 230 unsigned short pad; 231 int hw_features; 232 }; 233 234 #define ENETC_SI_ALIGN 32 235 236 static inline void *enetc_si_priv(const struct enetc_si *si) 237 { 238 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN); 239 } 240 241 static inline bool enetc_si_is_pf(struct enetc_si *si) 242 { 243 return !!(si->hw.port); 244 } 245 246 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev) 247 { 248 switch (pf_pdev->devfn) { 249 case 0: 250 return 0; 251 case 1: 252 return 1; 253 case 2: 254 return 2; 255 case 6: 256 return 3; 257 default: 258 return -1; 259 } 260 } 261 262 #define ENETC_MAX_NUM_TXQS 8 263 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8) 264 265 struct enetc_int_vector { 266 void __iomem *rbier; 267 void __iomem *tbier_base; 268 void __iomem *ricr1; 269 unsigned long tx_rings_map; 270 int count_tx_rings; 271 u32 rx_ictt; 272 u16 comp_cnt; 273 bool rx_dim_en, rx_napi_work; 274 struct napi_struct napi ____cacheline_aligned_in_smp; 275 struct dim rx_dim ____cacheline_aligned_in_smp; 276 char name[ENETC_INT_NAME_MAX]; 277 278 struct enetc_bdr rx_ring; 279 struct enetc_bdr tx_ring[]; 280 } ____cacheline_aligned_in_smp; 281 282 struct enetc_cls_rule { 283 struct ethtool_rx_flow_spec fs; 284 int used; 285 }; 286 287 #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */ 288 struct psfp_cap { 289 u32 max_streamid; 290 u32 max_psfp_filter; 291 u32 max_psfp_gate; 292 u32 max_psfp_gatelist; 293 u32 max_psfp_meter; 294 }; 295 296 #define ENETC_F_TX_TSTAMP_MASK 0xff 297 /* TODO: more hardware offloads */ 298 enum enetc_active_offloads { 299 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */ 300 ENETC_F_TX_TSTAMP = BIT(0), 301 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1), 302 303 ENETC_F_RX_TSTAMP = BIT(8), 304 ENETC_F_QBV = BIT(9), 305 ENETC_F_QCI = BIT(10), 306 }; 307 308 enum enetc_flags_bit { 309 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0, 310 }; 311 312 /* interrupt coalescing modes */ 313 enum enetc_ic_mode { 314 /* one interrupt per frame */ 315 ENETC_IC_NONE = 0, 316 /* activated when int coalescing time is set to a non-0 value */ 317 ENETC_IC_RX_MANUAL = BIT(0), 318 ENETC_IC_TX_MANUAL = BIT(1), 319 /* use dynamic interrupt moderation */ 320 ENETC_IC_RX_ADAPTIVE = BIT(2), 321 }; 322 323 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2) 324 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2) 325 #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600) 326 327 struct enetc_ndev_priv { 328 struct net_device *ndev; 329 struct device *dev; /* dma-mapping device */ 330 struct enetc_si *si; 331 332 int bdr_int_num; /* number of Rx/Tx ring interrupts */ 333 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT]; 334 u16 num_rx_rings, num_tx_rings; 335 u16 rx_bd_count, tx_bd_count; 336 337 u16 msg_enable; 338 enum enetc_active_offloads active_offloads; 339 340 u32 speed; /* store speed for compare update pspeed */ 341 342 struct enetc_bdr **xdp_tx_ring; 343 struct enetc_bdr *tx_ring[16]; 344 struct enetc_bdr *rx_ring[16]; 345 346 struct enetc_cls_rule *cls_rules; 347 348 struct psfp_cap psfp_cap; 349 350 struct phylink *phylink; 351 int ic_mode; 352 u32 tx_ictt; 353 354 struct bpf_prog *xdp_prog; 355 356 unsigned long flags; 357 358 struct work_struct tx_onestep_tstamp; 359 struct sk_buff_head tx_skbs; 360 }; 361 362 /* Messaging */ 363 364 /* VF-PF set primary MAC address message format */ 365 struct enetc_msg_cmd_set_primary_mac { 366 struct enetc_msg_cmd_header header; 367 struct sockaddr mac; 368 }; 369 370 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i])) 371 372 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */ 373 374 /* PTP driver exports */ 375 extern int enetc_phc_index; 376 377 /* SI common */ 378 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv); 379 void enetc_pci_remove(struct pci_dev *pdev); 380 int enetc_alloc_msix(struct enetc_ndev_priv *priv); 381 void enetc_free_msix(struct enetc_ndev_priv *priv); 382 void enetc_get_si_caps(struct enetc_si *si); 383 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 384 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 385 void enetc_free_si_resources(struct enetc_ndev_priv *priv); 386 int enetc_configure_si(struct enetc_ndev_priv *priv); 387 388 int enetc_open(struct net_device *ndev); 389 int enetc_close(struct net_device *ndev); 390 void enetc_start(struct net_device *ndev); 391 void enetc_stop(struct net_device *ndev); 392 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev); 393 struct net_device_stats *enetc_get_stats(struct net_device *ndev); 394 int enetc_set_features(struct net_device *ndev, 395 netdev_features_t features); 396 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd); 397 int enetc_setup_tc(struct net_device *ndev, enum tc_setup_type type, 398 void *type_data); 399 int enetc_setup_bpf(struct net_device *dev, struct netdev_bpf *xdp); 400 int enetc_xdp_xmit(struct net_device *ndev, int num_frames, 401 struct xdp_frame **frames, u32 flags); 402 403 /* ethtool */ 404 void enetc_set_ethtool_ops(struct net_device *ndev); 405 406 /* control buffer descriptor ring (CBDR) */ 407 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count, 408 struct enetc_cbdr *cbdr); 409 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr); 410 int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 411 char *mac_addr, int si_map); 412 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index); 413 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse, 414 int index); 415 void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes); 416 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count); 417 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count); 418 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd); 419 420 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si, 421 struct enetc_cbd *cbd, 422 int size, dma_addr_t *dma, 423 void **data_align) 424 { 425 struct enetc_cbdr *ring = &si->cbd_ring; 426 dma_addr_t dma_align; 427 void *data; 428 429 data = dma_alloc_coherent(ring->dma_dev, 430 size + ENETC_CBD_DATA_MEM_ALIGN, 431 dma, GFP_KERNEL); 432 if (!data) { 433 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n"); 434 return NULL; 435 } 436 437 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN); 438 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN); 439 440 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align)); 441 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align)); 442 cbd->length = cpu_to_le16(size); 443 444 return data; 445 } 446 447 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size, 448 void *data, dma_addr_t *dma) 449 { 450 struct enetc_cbdr *ring = &si->cbd_ring; 451 452 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN, 453 data, *dma); 454 } 455 456 #ifdef CONFIG_FSL_ENETC_QOS 457 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data); 458 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed); 459 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data); 460 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data); 461 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 462 void *cb_priv); 463 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data); 464 int enetc_psfp_init(struct enetc_ndev_priv *priv); 465 int enetc_psfp_clean(struct enetc_ndev_priv *priv); 466 467 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv) 468 { 469 u32 reg; 470 471 reg = enetc_port_rd(&priv->si->hw, ENETC_PSIDCAPR); 472 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK; 473 /* Port stream filter capability */ 474 reg = enetc_port_rd(&priv->si->hw, ENETC_PSFCAPR); 475 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK; 476 /* Port stream gate capability */ 477 reg = enetc_port_rd(&priv->si->hw, ENETC_PSGCAPR); 478 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK); 479 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16; 480 /* Port flow meter capability */ 481 reg = enetc_port_rd(&priv->si->hw, ENETC_PFMCAPR); 482 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK; 483 } 484 485 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 486 { 487 struct enetc_hw *hw = &priv->si->hw; 488 int err; 489 490 enetc_get_max_cap(priv); 491 492 err = enetc_psfp_init(priv); 493 if (err) 494 return err; 495 496 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | 497 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS | 498 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC); 499 500 return 0; 501 } 502 503 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 504 { 505 struct enetc_hw *hw = &priv->si->hw; 506 int err; 507 508 err = enetc_psfp_clean(priv); 509 if (err) 510 return err; 511 512 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & 513 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS & 514 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC); 515 516 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap)); 517 518 return 0; 519 } 520 521 #else 522 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP 523 #define enetc_sched_speed_set(priv, speed) (void)0 524 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP 525 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP 526 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP 527 #define enetc_setup_tc_block_cb NULL 528 529 #define enetc_get_max_cap(p) \ 530 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap)) 531 532 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 533 { 534 return 0; 535 } 536 537 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 538 { 539 return 0; 540 } 541 #endif 542