1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2017-2019 NXP */ 3 4 #include <linux/timer.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/dma-mapping.h> 9 #include <linux/skbuff.h> 10 #include <linux/ethtool.h> 11 #include <linux/if_vlan.h> 12 #include <linux/phylink.h> 13 #include <linux/dim.h> 14 15 #include "enetc_hw.h" 16 17 #define ENETC_MAC_MAXFRM_SIZE 9600 18 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \ 19 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN)) 20 21 #define ENETC_CBD_DATA_MEM_ALIGN 64 22 23 struct enetc_tx_swbd { 24 union { 25 struct sk_buff *skb; 26 struct xdp_frame *xdp_frame; 27 }; 28 dma_addr_t dma; 29 struct page *page; /* valid only if is_xdp_tx */ 30 u16 page_offset; /* valid only if is_xdp_tx */ 31 u16 len; 32 enum dma_data_direction dir; 33 u8 is_dma_page:1; 34 u8 check_wb:1; 35 u8 do_twostep_tstamp:1; 36 u8 is_eof:1; 37 u8 is_xdp_tx:1; 38 u8 is_xdp_redirect:1; 39 u8 qbv_en:1; 40 }; 41 42 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE 43 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */ 44 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */ 45 #define ENETC_RXB_DMA_SIZE \ 46 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD) 47 #define ENETC_RXB_DMA_SIZE_XDP \ 48 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM) 49 50 struct enetc_rx_swbd { 51 dma_addr_t dma; 52 struct page *page; 53 u16 page_offset; 54 enum dma_data_direction dir; 55 u16 len; 56 }; 57 58 /* ENETC overhead: optional extension BD + 1 BD gap */ 59 #define ENETC_TXBDS_NEEDED(val) ((val) + 2) 60 /* max # of chained Tx BDs is 15, including head and extension BD */ 61 #define ENETC_MAX_SKB_FRAGS 13 62 #define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1) 63 64 struct enetc_ring_stats { 65 unsigned int packets; 66 unsigned int bytes; 67 unsigned int rx_alloc_errs; 68 unsigned int xdp_drops; 69 unsigned int xdp_tx; 70 unsigned int xdp_tx_drops; 71 unsigned int xdp_redirect; 72 unsigned int xdp_redirect_failures; 73 unsigned int recycles; 74 unsigned int recycle_failures; 75 unsigned int win_drop; 76 }; 77 78 struct enetc_xdp_data { 79 struct xdp_rxq_info rxq; 80 struct bpf_prog *prog; 81 int xdp_tx_in_flight; 82 }; 83 84 #define ENETC_RX_RING_DEFAULT_SIZE 2048 85 #define ENETC_TX_RING_DEFAULT_SIZE 2048 86 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2) 87 88 struct enetc_bdr_resource { 89 /* Input arguments saved for teardown */ 90 struct device *dev; /* for DMA mapping */ 91 size_t bd_count; 92 size_t bd_size; 93 94 /* Resource proper */ 95 void *bd_base; /* points to Rx or Tx BD ring */ 96 dma_addr_t bd_dma_base; 97 union { 98 struct enetc_tx_swbd *tx_swbd; 99 struct enetc_rx_swbd *rx_swbd; 100 }; 101 char *tso_headers; 102 dma_addr_t tso_headers_dma; 103 }; 104 105 struct enetc_bdr { 106 struct device *dev; /* for DMA mapping */ 107 struct net_device *ndev; 108 void *bd_base; /* points to Rx or Tx BD ring */ 109 union { 110 void __iomem *tpir; 111 void __iomem *rcir; 112 }; 113 u16 index; 114 u16 prio; 115 int bd_count; /* # of BDs */ 116 int next_to_use; 117 int next_to_clean; 118 union { 119 struct enetc_tx_swbd *tx_swbd; 120 struct enetc_rx_swbd *rx_swbd; 121 }; 122 union { 123 void __iomem *tcir; /* Tx */ 124 int next_to_alloc; /* Rx */ 125 }; 126 void __iomem *idr; /* Interrupt Detect Register pointer */ 127 128 int buffer_offset; 129 struct enetc_xdp_data xdp; 130 131 struct enetc_ring_stats stats; 132 133 dma_addr_t bd_dma_base; 134 u8 tsd_enable; /* Time specific departure */ 135 bool ext_en; /* enable h/w descriptor extensions */ 136 137 /* DMA buffer for TSO headers */ 138 char *tso_headers; 139 dma_addr_t tso_headers_dma; 140 } ____cacheline_aligned_in_smp; 141 142 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i) 143 { 144 if (unlikely(++*i == bdr->bd_count)) 145 *i = 0; 146 } 147 148 static inline int enetc_bd_unused(struct enetc_bdr *bdr) 149 { 150 if (bdr->next_to_clean > bdr->next_to_use) 151 return bdr->next_to_clean - bdr->next_to_use - 1; 152 153 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; 154 } 155 156 static inline int enetc_swbd_unused(struct enetc_bdr *bdr) 157 { 158 if (bdr->next_to_clean > bdr->next_to_alloc) 159 return bdr->next_to_clean - bdr->next_to_alloc - 1; 160 161 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1; 162 } 163 164 /* Control BD ring */ 165 #define ENETC_CBDR_DEFAULT_SIZE 64 166 struct enetc_cbdr { 167 void *bd_base; /* points to Rx or Tx BD ring */ 168 void __iomem *pir; 169 void __iomem *cir; 170 void __iomem *mr; /* mode register */ 171 172 int bd_count; /* # of BDs */ 173 int next_to_use; 174 int next_to_clean; 175 176 dma_addr_t bd_dma_base; 177 struct device *dma_dev; 178 }; 179 180 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i])) 181 182 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i) 183 { 184 int hw_idx = i; 185 186 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 187 if (rx_ring->ext_en) 188 hw_idx = 2 * i; 189 #endif 190 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]); 191 } 192 193 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring, 194 union enetc_rx_bd **old_rxbd, int *old_index) 195 { 196 union enetc_rx_bd *new_rxbd = *old_rxbd; 197 int new_index = *old_index; 198 199 new_rxbd++; 200 201 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 202 if (rx_ring->ext_en) 203 new_rxbd++; 204 #endif 205 206 if (unlikely(++new_index == rx_ring->bd_count)) { 207 new_rxbd = rx_ring->bd_base; 208 new_index = 0; 209 } 210 211 *old_rxbd = new_rxbd; 212 *old_index = new_index; 213 } 214 215 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd) 216 { 217 return ++rxbd; 218 } 219 220 struct enetc_msg_swbd { 221 void *vaddr; 222 dma_addr_t dma; 223 int size; 224 }; 225 226 #define ENETC_REV1 0x1 227 enum enetc_errata { 228 ENETC_ERR_VLAN_ISOL = BIT(0), 229 ENETC_ERR_UCMCSWP = BIT(1), 230 }; 231 232 #define ENETC_SI_F_PSFP BIT(0) 233 #define ENETC_SI_F_QBV BIT(1) 234 #define ENETC_SI_F_QBU BIT(2) 235 236 /* PCI IEP device data */ 237 struct enetc_si { 238 struct pci_dev *pdev; 239 struct enetc_hw hw; 240 enum enetc_errata errata; 241 242 struct net_device *ndev; /* back ref. */ 243 244 struct enetc_cbdr cbd_ring; 245 246 int num_rx_rings; /* how many rings are available in the SI */ 247 int num_tx_rings; 248 int num_fs_entries; 249 int num_rss; /* number of RSS buckets */ 250 unsigned short pad; 251 int hw_features; 252 }; 253 254 #define ENETC_SI_ALIGN 32 255 256 static inline void *enetc_si_priv(const struct enetc_si *si) 257 { 258 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN); 259 } 260 261 static inline bool enetc_si_is_pf(struct enetc_si *si) 262 { 263 return !!(si->hw.port); 264 } 265 266 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev) 267 { 268 switch (pf_pdev->devfn) { 269 case 0: 270 return 0; 271 case 1: 272 return 1; 273 case 2: 274 return 2; 275 case 6: 276 return 3; 277 default: 278 return -1; 279 } 280 } 281 282 #define ENETC_MAX_NUM_TXQS 8 283 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8) 284 285 struct enetc_int_vector { 286 void __iomem *rbier; 287 void __iomem *tbier_base; 288 void __iomem *ricr1; 289 unsigned long tx_rings_map; 290 int count_tx_rings; 291 u32 rx_ictt; 292 u16 comp_cnt; 293 bool rx_dim_en, rx_napi_work; 294 struct napi_struct napi ____cacheline_aligned_in_smp; 295 struct dim rx_dim ____cacheline_aligned_in_smp; 296 char name[ENETC_INT_NAME_MAX]; 297 298 struct enetc_bdr rx_ring; 299 struct enetc_bdr tx_ring[]; 300 } ____cacheline_aligned_in_smp; 301 302 struct enetc_cls_rule { 303 struct ethtool_rx_flow_spec fs; 304 int used; 305 }; 306 307 #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */ 308 struct psfp_cap { 309 u32 max_streamid; 310 u32 max_psfp_filter; 311 u32 max_psfp_gate; 312 u32 max_psfp_gatelist; 313 u32 max_psfp_meter; 314 }; 315 316 #define ENETC_F_TX_TSTAMP_MASK 0xff 317 enum enetc_active_offloads { 318 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */ 319 ENETC_F_TX_TSTAMP = BIT(0), 320 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1), 321 322 ENETC_F_RX_TSTAMP = BIT(8), 323 ENETC_F_QBV = BIT(9), 324 ENETC_F_QCI = BIT(10), 325 ENETC_F_QBU = BIT(11), 326 }; 327 328 enum enetc_flags_bit { 329 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0, 330 }; 331 332 /* interrupt coalescing modes */ 333 enum enetc_ic_mode { 334 /* one interrupt per frame */ 335 ENETC_IC_NONE = 0, 336 /* activated when int coalescing time is set to a non-0 value */ 337 ENETC_IC_RX_MANUAL = BIT(0), 338 ENETC_IC_TX_MANUAL = BIT(1), 339 /* use dynamic interrupt moderation */ 340 ENETC_IC_RX_ADAPTIVE = BIT(2), 341 }; 342 343 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2) 344 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2) 345 #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600) 346 347 struct enetc_ndev_priv { 348 struct net_device *ndev; 349 struct device *dev; /* dma-mapping device */ 350 struct enetc_si *si; 351 352 int bdr_int_num; /* number of Rx/Tx ring interrupts */ 353 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT]; 354 u16 num_rx_rings, num_tx_rings; 355 u16 rx_bd_count, tx_bd_count; 356 357 u16 msg_enable; 358 359 u8 preemptible_tcs; 360 361 enum enetc_active_offloads active_offloads; 362 363 u32 speed; /* store speed for compare update pspeed */ 364 365 struct enetc_bdr **xdp_tx_ring; 366 struct enetc_bdr *tx_ring[16]; 367 struct enetc_bdr *rx_ring[16]; 368 const struct enetc_bdr_resource *tx_res; 369 const struct enetc_bdr_resource *rx_res; 370 371 struct enetc_cls_rule *cls_rules; 372 373 struct psfp_cap psfp_cap; 374 375 /* Minimum number of TX queues required by the network stack */ 376 unsigned int min_num_stack_tx_queues; 377 378 struct phylink *phylink; 379 int ic_mode; 380 u32 tx_ictt; 381 382 struct bpf_prog *xdp_prog; 383 384 unsigned long flags; 385 386 struct work_struct tx_onestep_tstamp; 387 struct sk_buff_head tx_skbs; 388 389 /* Serialize access to MAC Merge state between ethtool requests 390 * and link state updates 391 */ 392 struct mutex mm_lock; 393 }; 394 395 /* Messaging */ 396 397 /* VF-PF set primary MAC address message format */ 398 struct enetc_msg_cmd_set_primary_mac { 399 struct enetc_msg_cmd_header header; 400 struct sockaddr mac; 401 }; 402 403 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i])) 404 405 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */ 406 407 /* PTP driver exports */ 408 extern int enetc_phc_index; 409 410 /* SI common */ 411 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg); 412 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val); 413 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv); 414 void enetc_pci_remove(struct pci_dev *pdev); 415 int enetc_alloc_msix(struct enetc_ndev_priv *priv); 416 void enetc_free_msix(struct enetc_ndev_priv *priv); 417 void enetc_get_si_caps(struct enetc_si *si); 418 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 419 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 420 void enetc_free_si_resources(struct enetc_ndev_priv *priv); 421 int enetc_configure_si(struct enetc_ndev_priv *priv); 422 423 int enetc_open(struct net_device *ndev); 424 int enetc_close(struct net_device *ndev); 425 void enetc_start(struct net_device *ndev); 426 void enetc_stop(struct net_device *ndev); 427 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev); 428 struct net_device_stats *enetc_get_stats(struct net_device *ndev); 429 void enetc_set_features(struct net_device *ndev, netdev_features_t features); 430 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd); 431 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data); 432 void enetc_reset_tc_mqprio(struct net_device *ndev); 433 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf); 434 int enetc_xdp_xmit(struct net_device *ndev, int num_frames, 435 struct xdp_frame **frames, u32 flags); 436 437 /* ethtool */ 438 void enetc_set_ethtool_ops(struct net_device *ndev); 439 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link); 440 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv); 441 442 /* control buffer descriptor ring (CBDR) */ 443 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count, 444 struct enetc_cbdr *cbdr); 445 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr); 446 int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 447 char *mac_addr, int si_map); 448 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index); 449 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse, 450 int index); 451 void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes); 452 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count); 453 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count); 454 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd); 455 456 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si, 457 struct enetc_cbd *cbd, 458 int size, dma_addr_t *dma, 459 void **data_align) 460 { 461 struct enetc_cbdr *ring = &si->cbd_ring; 462 dma_addr_t dma_align; 463 void *data; 464 465 data = dma_alloc_coherent(ring->dma_dev, 466 size + ENETC_CBD_DATA_MEM_ALIGN, 467 dma, GFP_KERNEL); 468 if (!data) { 469 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n"); 470 return NULL; 471 } 472 473 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN); 474 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN); 475 476 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align)); 477 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align)); 478 cbd->length = cpu_to_le16(size); 479 480 return data; 481 } 482 483 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size, 484 void *data, dma_addr_t *dma) 485 { 486 struct enetc_cbdr *ring = &si->cbd_ring; 487 488 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN, 489 data, *dma); 490 } 491 492 void enetc_reset_ptcmsdur(struct enetc_hw *hw); 493 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu); 494 495 #ifdef CONFIG_FSL_ENETC_QOS 496 int enetc_qos_query_caps(struct net_device *ndev, void *type_data); 497 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data); 498 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed); 499 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data); 500 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data); 501 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 502 void *cb_priv); 503 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data); 504 int enetc_psfp_init(struct enetc_ndev_priv *priv); 505 int enetc_psfp_clean(struct enetc_ndev_priv *priv); 506 int enetc_set_psfp(struct net_device *ndev, bool en); 507 508 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv) 509 { 510 struct enetc_hw *hw = &priv->si->hw; 511 u32 reg; 512 513 reg = enetc_port_rd(hw, ENETC_PSIDCAPR); 514 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK; 515 /* Port stream filter capability */ 516 reg = enetc_port_rd(hw, ENETC_PSFCAPR); 517 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK; 518 /* Port stream gate capability */ 519 reg = enetc_port_rd(hw, ENETC_PSGCAPR); 520 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK); 521 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16; 522 /* Port flow meter capability */ 523 reg = enetc_port_rd(hw, ENETC_PFMCAPR); 524 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK; 525 } 526 527 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 528 { 529 struct enetc_hw *hw = &priv->si->hw; 530 int err; 531 532 enetc_get_max_cap(priv); 533 534 err = enetc_psfp_init(priv); 535 if (err) 536 return err; 537 538 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | 539 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS | 540 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC); 541 542 return 0; 543 } 544 545 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 546 { 547 struct enetc_hw *hw = &priv->si->hw; 548 int err; 549 550 err = enetc_psfp_clean(priv); 551 if (err) 552 return err; 553 554 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & 555 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS & 556 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC); 557 558 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap)); 559 560 return 0; 561 } 562 563 #else 564 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP 565 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP 566 #define enetc_sched_speed_set(priv, speed) (void)0 567 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP 568 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP 569 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP 570 #define enetc_setup_tc_block_cb NULL 571 572 #define enetc_get_max_cap(p) \ 573 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap)) 574 575 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 576 { 577 return 0; 578 } 579 580 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 581 { 582 return 0; 583 } 584 585 static inline int enetc_set_psfp(struct net_device *ndev, bool en) 586 { 587 return 0; 588 } 589 #endif 590