1d4fd0404SClaudiu Manoil /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2d4fd0404SClaudiu Manoil /* Copyright 2017-2019 NXP */
3d4fd0404SClaudiu Manoil 
4d4fd0404SClaudiu Manoil #include <linux/timer.h>
5d4fd0404SClaudiu Manoil #include <linux/pci.h>
6d4fd0404SClaudiu Manoil #include <linux/netdevice.h>
7d4fd0404SClaudiu Manoil #include <linux/etherdevice.h>
8d4fd0404SClaudiu Manoil #include <linux/dma-mapping.h>
9d4fd0404SClaudiu Manoil #include <linux/skbuff.h>
10d4fd0404SClaudiu Manoil #include <linux/ethtool.h>
11d4fd0404SClaudiu Manoil #include <linux/if_vlan.h>
12d4fd0404SClaudiu Manoil #include <linux/phy.h>
13d4fd0404SClaudiu Manoil 
14d4fd0404SClaudiu Manoil #include "enetc_hw.h"
15d4fd0404SClaudiu Manoil 
16d4fd0404SClaudiu Manoil #define ENETC_MAC_MAXFRM_SIZE	9600
17d4fd0404SClaudiu Manoil #define ENETC_MAX_MTU		(ENETC_MAC_MAXFRM_SIZE - \
18d4fd0404SClaudiu Manoil 				(ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
19d4fd0404SClaudiu Manoil 
20d4fd0404SClaudiu Manoil struct enetc_tx_swbd {
21d4fd0404SClaudiu Manoil 	struct sk_buff *skb;
22d4fd0404SClaudiu Manoil 	dma_addr_t dma;
23d4fd0404SClaudiu Manoil 	u16 len;
24d4fd0404SClaudiu Manoil 	u16 is_dma_page;
25d4fd0404SClaudiu Manoil };
26d4fd0404SClaudiu Manoil 
27d4fd0404SClaudiu Manoil #define ENETC_RX_MAXFRM_SIZE	ENETC_MAC_MAXFRM_SIZE
28d4fd0404SClaudiu Manoil #define ENETC_RXB_TRUESIZE	2048 /* PAGE_SIZE >> 1 */
29d4fd0404SClaudiu Manoil #define ENETC_RXB_PAD		NET_SKB_PAD /* add extra space if needed */
30d4fd0404SClaudiu Manoil #define ENETC_RXB_DMA_SIZE	\
31d4fd0404SClaudiu Manoil 	(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
32d4fd0404SClaudiu Manoil 
33d4fd0404SClaudiu Manoil struct enetc_rx_swbd {
34d4fd0404SClaudiu Manoil 	dma_addr_t dma;
35d4fd0404SClaudiu Manoil 	struct page *page;
36d4fd0404SClaudiu Manoil 	u16 page_offset;
37d4fd0404SClaudiu Manoil };
38d4fd0404SClaudiu Manoil 
39d4fd0404SClaudiu Manoil struct enetc_ring_stats {
40d4fd0404SClaudiu Manoil 	unsigned int packets;
41d4fd0404SClaudiu Manoil 	unsigned int bytes;
42d4fd0404SClaudiu Manoil 	unsigned int rx_alloc_errs;
43d4fd0404SClaudiu Manoil };
44d4fd0404SClaudiu Manoil 
45d4fd0404SClaudiu Manoil #define ENETC_BDR_DEFAULT_SIZE	1024
46d4fd0404SClaudiu Manoil #define ENETC_DEFAULT_TX_WORK	256
47d4fd0404SClaudiu Manoil 
48d4fd0404SClaudiu Manoil struct enetc_bdr {
49d4fd0404SClaudiu Manoil 	struct device *dev; /* for DMA mapping */
50d4fd0404SClaudiu Manoil 	struct net_device *ndev;
51d4fd0404SClaudiu Manoil 	void *bd_base; /* points to Rx or Tx BD ring */
52d4fd0404SClaudiu Manoil 	union {
53d4fd0404SClaudiu Manoil 		void __iomem *tpir;
54d4fd0404SClaudiu Manoil 		void __iomem *rcir;
55d4fd0404SClaudiu Manoil 	};
56d4fd0404SClaudiu Manoil 	u16 index;
57d4fd0404SClaudiu Manoil 	int bd_count; /* # of BDs */
58d4fd0404SClaudiu Manoil 	int next_to_use;
59d4fd0404SClaudiu Manoil 	int next_to_clean;
60d4fd0404SClaudiu Manoil 	union {
61d4fd0404SClaudiu Manoil 		struct enetc_tx_swbd *tx_swbd;
62d4fd0404SClaudiu Manoil 		struct enetc_rx_swbd *rx_swbd;
63d4fd0404SClaudiu Manoil 	};
64d4fd0404SClaudiu Manoil 	union {
65d4fd0404SClaudiu Manoil 		void __iomem *tcir; /* Tx */
66d4fd0404SClaudiu Manoil 		int next_to_alloc; /* Rx */
67d4fd0404SClaudiu Manoil 	};
68d4fd0404SClaudiu Manoil 	void __iomem *idr; /* Interrupt Detect Register pointer */
69d4fd0404SClaudiu Manoil 
70d4fd0404SClaudiu Manoil 	struct enetc_ring_stats stats;
71d4fd0404SClaudiu Manoil 
72d4fd0404SClaudiu Manoil 	dma_addr_t bd_dma_base;
73d4fd0404SClaudiu Manoil } ____cacheline_aligned_in_smp;
74d4fd0404SClaudiu Manoil 
75d4fd0404SClaudiu Manoil static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
76d4fd0404SClaudiu Manoil {
77d4fd0404SClaudiu Manoil 	if (unlikely(++*i == bdr->bd_count))
78d4fd0404SClaudiu Manoil 		*i = 0;
79d4fd0404SClaudiu Manoil }
80d4fd0404SClaudiu Manoil 
81d4fd0404SClaudiu Manoil static inline int enetc_bd_unused(struct enetc_bdr *bdr)
82d4fd0404SClaudiu Manoil {
83d4fd0404SClaudiu Manoil 	if (bdr->next_to_clean > bdr->next_to_use)
84d4fd0404SClaudiu Manoil 		return bdr->next_to_clean - bdr->next_to_use - 1;
85d4fd0404SClaudiu Manoil 
86d4fd0404SClaudiu Manoil 	return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
87d4fd0404SClaudiu Manoil }
88d4fd0404SClaudiu Manoil 
89d4fd0404SClaudiu Manoil /* Control BD ring */
90d4fd0404SClaudiu Manoil #define ENETC_CBDR_DEFAULT_SIZE	64
91d4fd0404SClaudiu Manoil struct enetc_cbdr {
92d4fd0404SClaudiu Manoil 	void *bd_base; /* points to Rx or Tx BD ring */
93d4fd0404SClaudiu Manoil 	void __iomem *pir;
94d4fd0404SClaudiu Manoil 	void __iomem *cir;
95d4fd0404SClaudiu Manoil 
96d4fd0404SClaudiu Manoil 	int bd_count; /* # of BDs */
97d4fd0404SClaudiu Manoil 	int next_to_use;
98d4fd0404SClaudiu Manoil 	int next_to_clean;
99d4fd0404SClaudiu Manoil 
100d4fd0404SClaudiu Manoil 	dma_addr_t bd_dma_base;
101d4fd0404SClaudiu Manoil };
102d4fd0404SClaudiu Manoil 
103d4fd0404SClaudiu Manoil #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
104d4fd0404SClaudiu Manoil #define ENETC_RXBD(BDR, i) (&(((union enetc_rx_bd *)((BDR).bd_base))[i]))
105d4fd0404SClaudiu Manoil 
106beb74ac8SClaudiu Manoil struct enetc_msg_swbd {
107beb74ac8SClaudiu Manoil 	void *vaddr;
108beb74ac8SClaudiu Manoil 	dma_addr_t dma;
109beb74ac8SClaudiu Manoil 	int size;
110beb74ac8SClaudiu Manoil };
111beb74ac8SClaudiu Manoil 
112d4fd0404SClaudiu Manoil #define ENETC_REV1	0x1
113d4fd0404SClaudiu Manoil enum enetc_errata {
114d4fd0404SClaudiu Manoil 	ENETC_ERR_TXCSUM	= BIT(0),
115d4fd0404SClaudiu Manoil 	ENETC_ERR_VLAN_ISOL	= BIT(1),
116d4fd0404SClaudiu Manoil 	ENETC_ERR_UCMCSWP	= BIT(2),
117d4fd0404SClaudiu Manoil };
118d4fd0404SClaudiu Manoil 
119d4fd0404SClaudiu Manoil /* PCI IEP device data */
120d4fd0404SClaudiu Manoil struct enetc_si {
121d4fd0404SClaudiu Manoil 	struct pci_dev *pdev;
122d4fd0404SClaudiu Manoil 	struct enetc_hw hw;
123d4fd0404SClaudiu Manoil 	enum enetc_errata errata;
124d4fd0404SClaudiu Manoil 
125d4fd0404SClaudiu Manoil 	struct net_device *ndev; /* back ref. */
126d4fd0404SClaudiu Manoil 
127d4fd0404SClaudiu Manoil 	struct enetc_cbdr cbd_ring;
128d4fd0404SClaudiu Manoil 
129d4fd0404SClaudiu Manoil 	int num_rx_rings; /* how many rings are available in the SI */
130d4fd0404SClaudiu Manoil 	int num_tx_rings;
131d382563fSClaudiu Manoil 	int num_fs_entries;
132d382563fSClaudiu Manoil 	int num_rss; /* number of RSS buckets */
133d4fd0404SClaudiu Manoil 	unsigned short pad;
134d4fd0404SClaudiu Manoil };
135d4fd0404SClaudiu Manoil 
136d4fd0404SClaudiu Manoil #define ENETC_SI_ALIGN	32
137d4fd0404SClaudiu Manoil 
138d4fd0404SClaudiu Manoil static inline void *enetc_si_priv(const struct enetc_si *si)
139d4fd0404SClaudiu Manoil {
140d4fd0404SClaudiu Manoil 	return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
141d4fd0404SClaudiu Manoil }
142d4fd0404SClaudiu Manoil 
143d4fd0404SClaudiu Manoil static inline bool enetc_si_is_pf(struct enetc_si *si)
144d4fd0404SClaudiu Manoil {
145d4fd0404SClaudiu Manoil 	return !!(si->hw.port);
146d4fd0404SClaudiu Manoil }
147d4fd0404SClaudiu Manoil 
148d4fd0404SClaudiu Manoil #define ENETC_MAX_NUM_TXQS	8
149d4fd0404SClaudiu Manoil #define ENETC_INT_NAME_MAX	(IFNAMSIZ + 8)
150d4fd0404SClaudiu Manoil 
151d4fd0404SClaudiu Manoil struct enetc_int_vector {
152d4fd0404SClaudiu Manoil 	void __iomem *rbier;
153d4fd0404SClaudiu Manoil 	void __iomem *tbier_base;
154d4fd0404SClaudiu Manoil 	unsigned long tx_rings_map;
155d4fd0404SClaudiu Manoil 	int count_tx_rings;
156d4fd0404SClaudiu Manoil 	struct napi_struct napi;
157d4fd0404SClaudiu Manoil 	char name[ENETC_INT_NAME_MAX];
158d4fd0404SClaudiu Manoil 
159d4fd0404SClaudiu Manoil 	struct enetc_bdr rx_ring ____cacheline_aligned_in_smp;
160d4fd0404SClaudiu Manoil 	struct enetc_bdr tx_ring[0];
161d4fd0404SClaudiu Manoil };
162d4fd0404SClaudiu Manoil 
163d382563fSClaudiu Manoil struct enetc_cls_rule {
164d382563fSClaudiu Manoil 	struct ethtool_rx_flow_spec fs;
165d382563fSClaudiu Manoil 	int used;
166d382563fSClaudiu Manoil };
167d382563fSClaudiu Manoil 
168d4fd0404SClaudiu Manoil #define ENETC_MAX_BDR_INT	2 /* fixed to max # of available cpus */
169d4fd0404SClaudiu Manoil 
170d4fd0404SClaudiu Manoil struct enetc_ndev_priv {
171d4fd0404SClaudiu Manoil 	struct net_device *ndev;
172d4fd0404SClaudiu Manoil 	struct device *dev; /* dma-mapping device */
173d4fd0404SClaudiu Manoil 	struct enetc_si *si;
174d4fd0404SClaudiu Manoil 
175d4fd0404SClaudiu Manoil 	int bdr_int_num; /* number of Rx/Tx ring interrupts */
176d4fd0404SClaudiu Manoil 	struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
177d4fd0404SClaudiu Manoil 	u16 num_rx_rings, num_tx_rings;
178d4fd0404SClaudiu Manoil 	u16 rx_bd_count, tx_bd_count;
179d4fd0404SClaudiu Manoil 
180d4fd0404SClaudiu Manoil 	u16 msg_enable;
181d4fd0404SClaudiu Manoil 
182d4fd0404SClaudiu Manoil 	struct enetc_bdr *tx_ring[16];
183d4fd0404SClaudiu Manoil 	struct enetc_bdr *rx_ring[16];
184d4fd0404SClaudiu Manoil 
185d382563fSClaudiu Manoil 	struct enetc_cls_rule *cls_rules;
186d382563fSClaudiu Manoil 
187d4fd0404SClaudiu Manoil 	struct device_node *phy_node;
188d4fd0404SClaudiu Manoil 	phy_interface_t if_mode;
189d4fd0404SClaudiu Manoil };
190d4fd0404SClaudiu Manoil 
191beb74ac8SClaudiu Manoil /* Messaging */
192beb74ac8SClaudiu Manoil 
193beb74ac8SClaudiu Manoil /* VF-PF set primary MAC address message format */
194beb74ac8SClaudiu Manoil struct enetc_msg_cmd_set_primary_mac {
195beb74ac8SClaudiu Manoil 	struct enetc_msg_cmd_header header;
196beb74ac8SClaudiu Manoil 	struct sockaddr mac;
197beb74ac8SClaudiu Manoil };
198beb74ac8SClaudiu Manoil 
199d4fd0404SClaudiu Manoil #define ENETC_CBD(R, i)	(&(((struct enetc_cbd *)((R).bd_base))[i]))
200d4fd0404SClaudiu Manoil 
201d4fd0404SClaudiu Manoil #define ENETC_CBDR_TIMEOUT	1000 /* usecs */
202d4fd0404SClaudiu Manoil 
203d4fd0404SClaudiu Manoil /* SI common */
204d4fd0404SClaudiu Manoil int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
205d4fd0404SClaudiu Manoil void enetc_pci_remove(struct pci_dev *pdev);
206d4fd0404SClaudiu Manoil int enetc_alloc_msix(struct enetc_ndev_priv *priv);
207d4fd0404SClaudiu Manoil void enetc_free_msix(struct enetc_ndev_priv *priv);
208d4fd0404SClaudiu Manoil void enetc_get_si_caps(struct enetc_si *si);
209d4fd0404SClaudiu Manoil void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
210d4fd0404SClaudiu Manoil int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
211d4fd0404SClaudiu Manoil void enetc_free_si_resources(struct enetc_ndev_priv *priv);
212d4fd0404SClaudiu Manoil 
213d4fd0404SClaudiu Manoil int enetc_open(struct net_device *ndev);
214d4fd0404SClaudiu Manoil int enetc_close(struct net_device *ndev);
215d4fd0404SClaudiu Manoil netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
216d4fd0404SClaudiu Manoil struct net_device_stats *enetc_get_stats(struct net_device *ndev);
217d382563fSClaudiu Manoil int enetc_set_features(struct net_device *ndev,
218d382563fSClaudiu Manoil 		       netdev_features_t features);
219d4fd0404SClaudiu Manoil /* ethtool */
220d4fd0404SClaudiu Manoil void enetc_set_ethtool_ops(struct net_device *ndev);
221d4fd0404SClaudiu Manoil 
222d4fd0404SClaudiu Manoil /* control buffer descriptor ring (CBDR) */
223d4fd0404SClaudiu Manoil int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
224d4fd0404SClaudiu Manoil 			    char *mac_addr, int si_map);
225d4fd0404SClaudiu Manoil int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
226d382563fSClaudiu Manoil int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
227d382563fSClaudiu Manoil 		       int index);
228d382563fSClaudiu Manoil void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
229d382563fSClaudiu Manoil int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
230d382563fSClaudiu Manoil int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
231