1d4fd0404SClaudiu Manoil /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2d4fd0404SClaudiu Manoil /* Copyright 2017-2019 NXP */ 3d4fd0404SClaudiu Manoil 4d4fd0404SClaudiu Manoil #include <linux/timer.h> 5d4fd0404SClaudiu Manoil #include <linux/pci.h> 6d4fd0404SClaudiu Manoil #include <linux/netdevice.h> 7d4fd0404SClaudiu Manoil #include <linux/etherdevice.h> 8d4fd0404SClaudiu Manoil #include <linux/dma-mapping.h> 9d4fd0404SClaudiu Manoil #include <linux/skbuff.h> 10d4fd0404SClaudiu Manoil #include <linux/ethtool.h> 11d4fd0404SClaudiu Manoil #include <linux/if_vlan.h> 12d4fd0404SClaudiu Manoil #include <linux/phy.h> 13d4fd0404SClaudiu Manoil 14d4fd0404SClaudiu Manoil #include "enetc_hw.h" 15d4fd0404SClaudiu Manoil 16d4fd0404SClaudiu Manoil #define ENETC_MAC_MAXFRM_SIZE 9600 17d4fd0404SClaudiu Manoil #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \ 18d4fd0404SClaudiu Manoil (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN)) 19d4fd0404SClaudiu Manoil 20d4fd0404SClaudiu Manoil struct enetc_tx_swbd { 21d4fd0404SClaudiu Manoil struct sk_buff *skb; 22d4fd0404SClaudiu Manoil dma_addr_t dma; 23d4fd0404SClaudiu Manoil u16 len; 24d3982312SY.b. Lu u8 is_dma_page:1; 25d3982312SY.b. Lu u8 check_wb:1; 26d3982312SY.b. Lu u8 do_tstamp:1; 27d4fd0404SClaudiu Manoil }; 28d4fd0404SClaudiu Manoil 29d4fd0404SClaudiu Manoil #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE 30d4fd0404SClaudiu Manoil #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */ 31d4fd0404SClaudiu Manoil #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */ 32d4fd0404SClaudiu Manoil #define ENETC_RXB_DMA_SIZE \ 33d4fd0404SClaudiu Manoil (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD) 34d4fd0404SClaudiu Manoil 35d4fd0404SClaudiu Manoil struct enetc_rx_swbd { 36d4fd0404SClaudiu Manoil dma_addr_t dma; 37d4fd0404SClaudiu Manoil struct page *page; 38d4fd0404SClaudiu Manoil u16 page_offset; 39d4fd0404SClaudiu Manoil }; 40d4fd0404SClaudiu Manoil 41d4fd0404SClaudiu Manoil struct enetc_ring_stats { 42d4fd0404SClaudiu Manoil unsigned int packets; 43d4fd0404SClaudiu Manoil unsigned int bytes; 44d4fd0404SClaudiu Manoil unsigned int rx_alloc_errs; 45d4fd0404SClaudiu Manoil }; 46d4fd0404SClaudiu Manoil 47d4fd0404SClaudiu Manoil #define ENETC_BDR_DEFAULT_SIZE 1024 48d4fd0404SClaudiu Manoil #define ENETC_DEFAULT_TX_WORK 256 49d4fd0404SClaudiu Manoil 50d4fd0404SClaudiu Manoil struct enetc_bdr { 51d4fd0404SClaudiu Manoil struct device *dev; /* for DMA mapping */ 52d4fd0404SClaudiu Manoil struct net_device *ndev; 53d4fd0404SClaudiu Manoil void *bd_base; /* points to Rx or Tx BD ring */ 54d4fd0404SClaudiu Manoil union { 55d4fd0404SClaudiu Manoil void __iomem *tpir; 56d4fd0404SClaudiu Manoil void __iomem *rcir; 57d4fd0404SClaudiu Manoil }; 58d4fd0404SClaudiu Manoil u16 index; 59d4fd0404SClaudiu Manoil int bd_count; /* # of BDs */ 60d4fd0404SClaudiu Manoil int next_to_use; 61d4fd0404SClaudiu Manoil int next_to_clean; 62d4fd0404SClaudiu Manoil union { 63d4fd0404SClaudiu Manoil struct enetc_tx_swbd *tx_swbd; 64d4fd0404SClaudiu Manoil struct enetc_rx_swbd *rx_swbd; 65d4fd0404SClaudiu Manoil }; 66d4fd0404SClaudiu Manoil union { 67d4fd0404SClaudiu Manoil void __iomem *tcir; /* Tx */ 68d4fd0404SClaudiu Manoil int next_to_alloc; /* Rx */ 69d4fd0404SClaudiu Manoil }; 70d4fd0404SClaudiu Manoil void __iomem *idr; /* Interrupt Detect Register pointer */ 71d4fd0404SClaudiu Manoil 72d4fd0404SClaudiu Manoil struct enetc_ring_stats stats; 73d4fd0404SClaudiu Manoil 74d4fd0404SClaudiu Manoil dma_addr_t bd_dma_base; 750d08c9ecSPo Liu u8 tsd_enable; /* Time specific departure */ 76434cebabSClaudiu Manoil bool ext_en; /* enable h/w descriptor extensions */ 77d4fd0404SClaudiu Manoil } ____cacheline_aligned_in_smp; 78d4fd0404SClaudiu Manoil 79d4fd0404SClaudiu Manoil static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i) 80d4fd0404SClaudiu Manoil { 81d4fd0404SClaudiu Manoil if (unlikely(++*i == bdr->bd_count)) 82d4fd0404SClaudiu Manoil *i = 0; 83d4fd0404SClaudiu Manoil } 84d4fd0404SClaudiu Manoil 85d4fd0404SClaudiu Manoil static inline int enetc_bd_unused(struct enetc_bdr *bdr) 86d4fd0404SClaudiu Manoil { 87d4fd0404SClaudiu Manoil if (bdr->next_to_clean > bdr->next_to_use) 88d4fd0404SClaudiu Manoil return bdr->next_to_clean - bdr->next_to_use - 1; 89d4fd0404SClaudiu Manoil 90d4fd0404SClaudiu Manoil return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; 91d4fd0404SClaudiu Manoil } 92d4fd0404SClaudiu Manoil 93d4fd0404SClaudiu Manoil /* Control BD ring */ 94d4fd0404SClaudiu Manoil #define ENETC_CBDR_DEFAULT_SIZE 64 95d4fd0404SClaudiu Manoil struct enetc_cbdr { 96d4fd0404SClaudiu Manoil void *bd_base; /* points to Rx or Tx BD ring */ 97d4fd0404SClaudiu Manoil void __iomem *pir; 98d4fd0404SClaudiu Manoil void __iomem *cir; 99d4fd0404SClaudiu Manoil 100d4fd0404SClaudiu Manoil int bd_count; /* # of BDs */ 101d4fd0404SClaudiu Manoil int next_to_use; 102d4fd0404SClaudiu Manoil int next_to_clean; 103d4fd0404SClaudiu Manoil 104d4fd0404SClaudiu Manoil dma_addr_t bd_dma_base; 105d4fd0404SClaudiu Manoil }; 106d4fd0404SClaudiu Manoil 107d4fd0404SClaudiu Manoil #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i])) 108714239acSClaudiu Manoil 109714239acSClaudiu Manoil static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i) 110714239acSClaudiu Manoil { 111434cebabSClaudiu Manoil int hw_idx = i; 112434cebabSClaudiu Manoil 113434cebabSClaudiu Manoil #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 114434cebabSClaudiu Manoil if (rx_ring->ext_en) 115434cebabSClaudiu Manoil hw_idx = 2 * i; 116434cebabSClaudiu Manoil #endif 117434cebabSClaudiu Manoil return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]); 118714239acSClaudiu Manoil } 119714239acSClaudiu Manoil 120714239acSClaudiu Manoil static inline union enetc_rx_bd *enetc_rxbd_next(struct enetc_bdr *rx_ring, 121714239acSClaudiu Manoil union enetc_rx_bd *rxbd, 122714239acSClaudiu Manoil int i) 123714239acSClaudiu Manoil { 124714239acSClaudiu Manoil rxbd++; 125434cebabSClaudiu Manoil #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 126434cebabSClaudiu Manoil if (rx_ring->ext_en) 127434cebabSClaudiu Manoil rxbd++; 128434cebabSClaudiu Manoil #endif 129714239acSClaudiu Manoil if (unlikely(++i == rx_ring->bd_count)) 130714239acSClaudiu Manoil rxbd = rx_ring->bd_base; 131714239acSClaudiu Manoil 132714239acSClaudiu Manoil return rxbd; 133714239acSClaudiu Manoil } 134d4fd0404SClaudiu Manoil 135434cebabSClaudiu Manoil static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd) 136434cebabSClaudiu Manoil { 137434cebabSClaudiu Manoil return ++rxbd; 138434cebabSClaudiu Manoil } 139434cebabSClaudiu Manoil 140beb74ac8SClaudiu Manoil struct enetc_msg_swbd { 141beb74ac8SClaudiu Manoil void *vaddr; 142beb74ac8SClaudiu Manoil dma_addr_t dma; 143beb74ac8SClaudiu Manoil int size; 144beb74ac8SClaudiu Manoil }; 145beb74ac8SClaudiu Manoil 146d4fd0404SClaudiu Manoil #define ENETC_REV1 0x1 147d4fd0404SClaudiu Manoil enum enetc_errata { 148d4fd0404SClaudiu Manoil ENETC_ERR_TXCSUM = BIT(0), 149d4fd0404SClaudiu Manoil ENETC_ERR_VLAN_ISOL = BIT(1), 150d4fd0404SClaudiu Manoil ENETC_ERR_UCMCSWP = BIT(2), 151d4fd0404SClaudiu Manoil }; 152d4fd0404SClaudiu Manoil 1532e47cb41SPo Liu #define ENETC_SI_F_QBV BIT(0) 15479e49982SPo Liu #define ENETC_SI_F_PSFP BIT(1) 1552e47cb41SPo Liu 156d4fd0404SClaudiu Manoil /* PCI IEP device data */ 157d4fd0404SClaudiu Manoil struct enetc_si { 158d4fd0404SClaudiu Manoil struct pci_dev *pdev; 159d4fd0404SClaudiu Manoil struct enetc_hw hw; 160d4fd0404SClaudiu Manoil enum enetc_errata errata; 161d4fd0404SClaudiu Manoil 162d4fd0404SClaudiu Manoil struct net_device *ndev; /* back ref. */ 163d4fd0404SClaudiu Manoil 164d4fd0404SClaudiu Manoil struct enetc_cbdr cbd_ring; 165d4fd0404SClaudiu Manoil 166d4fd0404SClaudiu Manoil int num_rx_rings; /* how many rings are available in the SI */ 167d4fd0404SClaudiu Manoil int num_tx_rings; 168d382563fSClaudiu Manoil int num_fs_entries; 169d382563fSClaudiu Manoil int num_rss; /* number of RSS buckets */ 170d4fd0404SClaudiu Manoil unsigned short pad; 1712e47cb41SPo Liu int hw_features; 172d4fd0404SClaudiu Manoil }; 173d4fd0404SClaudiu Manoil 174d4fd0404SClaudiu Manoil #define ENETC_SI_ALIGN 32 175d4fd0404SClaudiu Manoil 176d4fd0404SClaudiu Manoil static inline void *enetc_si_priv(const struct enetc_si *si) 177d4fd0404SClaudiu Manoil { 178d4fd0404SClaudiu Manoil return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN); 179d4fd0404SClaudiu Manoil } 180d4fd0404SClaudiu Manoil 181d4fd0404SClaudiu Manoil static inline bool enetc_si_is_pf(struct enetc_si *si) 182d4fd0404SClaudiu Manoil { 183d4fd0404SClaudiu Manoil return !!(si->hw.port); 184d4fd0404SClaudiu Manoil } 185d4fd0404SClaudiu Manoil 186d4fd0404SClaudiu Manoil #define ENETC_MAX_NUM_TXQS 8 187d4fd0404SClaudiu Manoil #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8) 188d4fd0404SClaudiu Manoil 189d4fd0404SClaudiu Manoil struct enetc_int_vector { 190d4fd0404SClaudiu Manoil void __iomem *rbier; 191d4fd0404SClaudiu Manoil void __iomem *tbier_base; 192d4fd0404SClaudiu Manoil unsigned long tx_rings_map; 193d4fd0404SClaudiu Manoil int count_tx_rings; 194d4fd0404SClaudiu Manoil struct napi_struct napi; 195d4fd0404SClaudiu Manoil char name[ENETC_INT_NAME_MAX]; 196d4fd0404SClaudiu Manoil 197d4fd0404SClaudiu Manoil struct enetc_bdr rx_ring ____cacheline_aligned_in_smp; 198cc5b48b5SGustavo A. R. Silva struct enetc_bdr tx_ring[]; 199d4fd0404SClaudiu Manoil }; 200d4fd0404SClaudiu Manoil 201d382563fSClaudiu Manoil struct enetc_cls_rule { 202d382563fSClaudiu Manoil struct ethtool_rx_flow_spec fs; 203d382563fSClaudiu Manoil int used; 204d382563fSClaudiu Manoil }; 205d382563fSClaudiu Manoil 206d4fd0404SClaudiu Manoil #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */ 20779e49982SPo Liu struct psfp_cap { 20879e49982SPo Liu u32 max_streamid; 20979e49982SPo Liu u32 max_psfp_filter; 21079e49982SPo Liu u32 max_psfp_gate; 21179e49982SPo Liu u32 max_psfp_gatelist; 21279e49982SPo Liu u32 max_psfp_meter; 21379e49982SPo Liu }; 214d4fd0404SClaudiu Manoil 215d3982312SY.b. Lu /* TODO: more hardware offloads */ 216d3982312SY.b. Lu enum enetc_active_offloads { 217d3982312SY.b. Lu ENETC_F_RX_TSTAMP = BIT(0), 218d3982312SY.b. Lu ENETC_F_TX_TSTAMP = BIT(1), 2192e47cb41SPo Liu ENETC_F_QBV = BIT(2), 22079e49982SPo Liu ENETC_F_QCI = BIT(3), 221d3982312SY.b. Lu }; 222d3982312SY.b. Lu 223d4fd0404SClaudiu Manoil struct enetc_ndev_priv { 224d4fd0404SClaudiu Manoil struct net_device *ndev; 225d4fd0404SClaudiu Manoil struct device *dev; /* dma-mapping device */ 226d4fd0404SClaudiu Manoil struct enetc_si *si; 227d4fd0404SClaudiu Manoil 228d4fd0404SClaudiu Manoil int bdr_int_num; /* number of Rx/Tx ring interrupts */ 229d4fd0404SClaudiu Manoil struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT]; 230d4fd0404SClaudiu Manoil u16 num_rx_rings, num_tx_rings; 231d4fd0404SClaudiu Manoil u16 rx_bd_count, tx_bd_count; 232d4fd0404SClaudiu Manoil 233d4fd0404SClaudiu Manoil u16 msg_enable; 234d3982312SY.b. Lu int active_offloads; 235d4fd0404SClaudiu Manoil 2362e47cb41SPo Liu u32 speed; /* store speed for compare update pspeed */ 2372e47cb41SPo Liu 238d4fd0404SClaudiu Manoil struct enetc_bdr *tx_ring[16]; 239d4fd0404SClaudiu Manoil struct enetc_bdr *rx_ring[16]; 240d4fd0404SClaudiu Manoil 241d382563fSClaudiu Manoil struct enetc_cls_rule *cls_rules; 242d382563fSClaudiu Manoil 24379e49982SPo Liu struct psfp_cap psfp_cap; 24479e49982SPo Liu 245d4fd0404SClaudiu Manoil struct device_node *phy_node; 246d4fd0404SClaudiu Manoil phy_interface_t if_mode; 247d4fd0404SClaudiu Manoil }; 248d4fd0404SClaudiu Manoil 249beb74ac8SClaudiu Manoil /* Messaging */ 250beb74ac8SClaudiu Manoil 251beb74ac8SClaudiu Manoil /* VF-PF set primary MAC address message format */ 252beb74ac8SClaudiu Manoil struct enetc_msg_cmd_set_primary_mac { 253beb74ac8SClaudiu Manoil struct enetc_msg_cmd_header header; 254beb74ac8SClaudiu Manoil struct sockaddr mac; 255beb74ac8SClaudiu Manoil }; 256beb74ac8SClaudiu Manoil 257d4fd0404SClaudiu Manoil #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i])) 258d4fd0404SClaudiu Manoil 259d4fd0404SClaudiu Manoil #define ENETC_CBDR_TIMEOUT 1000 /* usecs */ 260d4fd0404SClaudiu Manoil 26141514737SY.b. Lu /* PTP driver exports */ 26241514737SY.b. Lu extern int enetc_phc_index; 26341514737SY.b. Lu 264d4fd0404SClaudiu Manoil /* SI common */ 265d4fd0404SClaudiu Manoil int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv); 266d4fd0404SClaudiu Manoil void enetc_pci_remove(struct pci_dev *pdev); 267d4fd0404SClaudiu Manoil int enetc_alloc_msix(struct enetc_ndev_priv *priv); 268d4fd0404SClaudiu Manoil void enetc_free_msix(struct enetc_ndev_priv *priv); 269d4fd0404SClaudiu Manoil void enetc_get_si_caps(struct enetc_si *si); 270d4fd0404SClaudiu Manoil void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 271d4fd0404SClaudiu Manoil int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 272d4fd0404SClaudiu Manoil void enetc_free_si_resources(struct enetc_ndev_priv *priv); 273d4fd0404SClaudiu Manoil 274d4fd0404SClaudiu Manoil int enetc_open(struct net_device *ndev); 275d4fd0404SClaudiu Manoil int enetc_close(struct net_device *ndev); 276d4fd0404SClaudiu Manoil netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev); 277d4fd0404SClaudiu Manoil struct net_device_stats *enetc_get_stats(struct net_device *ndev); 278d382563fSClaudiu Manoil int enetc_set_features(struct net_device *ndev, 279d382563fSClaudiu Manoil netdev_features_t features); 280d3982312SY.b. Lu int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd); 281cbe9e835SCamelia Groza int enetc_setup_tc(struct net_device *ndev, enum tc_setup_type type, 282cbe9e835SCamelia Groza void *type_data); 283cbe9e835SCamelia Groza 284d4fd0404SClaudiu Manoil /* ethtool */ 285d4fd0404SClaudiu Manoil void enetc_set_ethtool_ops(struct net_device *ndev); 286d4fd0404SClaudiu Manoil 287d4fd0404SClaudiu Manoil /* control buffer descriptor ring (CBDR) */ 288d4fd0404SClaudiu Manoil int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 289d4fd0404SClaudiu Manoil char *mac_addr, int si_map); 290d4fd0404SClaudiu Manoil int enetc_clear_mac_flt_entry(struct enetc_si *si, int index); 291d382563fSClaudiu Manoil int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse, 292d382563fSClaudiu Manoil int index); 293d382563fSClaudiu Manoil void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes); 294d382563fSClaudiu Manoil int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count); 295d382563fSClaudiu Manoil int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count); 29634c6adf1SPo Liu int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd); 29734c6adf1SPo Liu 29834c6adf1SPo Liu #ifdef CONFIG_FSL_ENETC_QOS 29934c6adf1SPo Liu int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data); 3002e47cb41SPo Liu void enetc_sched_speed_set(struct net_device *ndev); 301c431047cSPo Liu int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data); 3020d08c9ecSPo Liu int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data); 303888ae5a3SPo Liu int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 304888ae5a3SPo Liu void *cb_priv); 305888ae5a3SPo Liu int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data); 306888ae5a3SPo Liu int enetc_psfp_init(struct enetc_ndev_priv *priv); 307888ae5a3SPo Liu int enetc_psfp_clean(struct enetc_ndev_priv *priv); 30879e49982SPo Liu 30979e49982SPo Liu static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv) 31079e49982SPo Liu { 31179e49982SPo Liu u32 reg; 31279e49982SPo Liu 31379e49982SPo Liu reg = enetc_port_rd(&priv->si->hw, ENETC_PSIDCAPR); 31479e49982SPo Liu priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK; 31579e49982SPo Liu /* Port stream filter capability */ 31679e49982SPo Liu reg = enetc_port_rd(&priv->si->hw, ENETC_PSFCAPR); 31779e49982SPo Liu priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK; 31879e49982SPo Liu /* Port stream gate capability */ 31979e49982SPo Liu reg = enetc_port_rd(&priv->si->hw, ENETC_PSGCAPR); 32079e49982SPo Liu priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK); 32179e49982SPo Liu priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16; 32279e49982SPo Liu /* Port flow meter capability */ 32379e49982SPo Liu reg = enetc_port_rd(&priv->si->hw, ENETC_PFMCAPR); 32479e49982SPo Liu priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK; 32579e49982SPo Liu } 32679e49982SPo Liu 327888ae5a3SPo Liu static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 32879e49982SPo Liu { 329888ae5a3SPo Liu struct enetc_hw *hw = &priv->si->hw; 330888ae5a3SPo Liu int err; 331888ae5a3SPo Liu 332888ae5a3SPo Liu enetc_get_max_cap(priv); 333888ae5a3SPo Liu 334888ae5a3SPo Liu err = enetc_psfp_init(priv); 335888ae5a3SPo Liu if (err) 336888ae5a3SPo Liu return err; 337888ae5a3SPo Liu 33879e49982SPo Liu enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | 33979e49982SPo Liu ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS | 34079e49982SPo Liu ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC); 341888ae5a3SPo Liu 342888ae5a3SPo Liu return 0; 34379e49982SPo Liu } 34479e49982SPo Liu 345888ae5a3SPo Liu static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 34679e49982SPo Liu { 347888ae5a3SPo Liu struct enetc_hw *hw = &priv->si->hw; 348888ae5a3SPo Liu int err; 349888ae5a3SPo Liu 350888ae5a3SPo Liu err = enetc_psfp_clean(priv); 351888ae5a3SPo Liu if (err) 352888ae5a3SPo Liu return err; 353888ae5a3SPo Liu 35479e49982SPo Liu enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & 35579e49982SPo Liu ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS & 35679e49982SPo Liu ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC); 357888ae5a3SPo Liu 358888ae5a3SPo Liu memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap)); 359888ae5a3SPo Liu 360888ae5a3SPo Liu return 0; 36179e49982SPo Liu } 362888ae5a3SPo Liu 36334c6adf1SPo Liu #else 36434c6adf1SPo Liu #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP 3652e47cb41SPo Liu #define enetc_sched_speed_set(ndev) (void)0 366c431047cSPo Liu #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP 3670d08c9ecSPo Liu #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP 368888ae5a3SPo Liu #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP 369888ae5a3SPo Liu #define enetc_setup_tc_block_cb NULL 370888ae5a3SPo Liu 37179e49982SPo Liu #define enetc_get_max_cap(p) \ 37279e49982SPo Liu memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap)) 37379e49982SPo Liu 374888ae5a3SPo Liu static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 375888ae5a3SPo Liu { 376888ae5a3SPo Liu return 0; 377888ae5a3SPo Liu } 378888ae5a3SPo Liu 379888ae5a3SPo Liu static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 380888ae5a3SPo Liu { 381888ae5a3SPo Liu return 0; 382888ae5a3SPo Liu } 38334c6adf1SPo Liu #endif 384