1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2014-2016 Freescale Semiconductor Inc.
4  * Copyright 2017-2021 NXP
5  *
6  */
7 
8 #ifndef __FSL_DPSW_CMD_H
9 #define __FSL_DPSW_CMD_H
10 
11 #include "dpsw.h"
12 
13 /* DPSW Version */
14 #define DPSW_VER_MAJOR		8
15 #define DPSW_VER_MINOR		9
16 
17 #define DPSW_CMD_BASE_VERSION	1
18 #define DPSW_CMD_VERSION_2	2
19 #define DPSW_CMD_ID_OFFSET	4
20 
21 #define DPSW_CMD_ID(id)	(((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_BASE_VERSION)
22 #define DPSW_CMD_V2(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_VERSION_2)
23 
24 /* Command IDs */
25 #define DPSW_CMDID_CLOSE                    DPSW_CMD_ID(0x800)
26 #define DPSW_CMDID_OPEN                     DPSW_CMD_ID(0x802)
27 
28 #define DPSW_CMDID_GET_API_VERSION          DPSW_CMD_ID(0xa02)
29 
30 #define DPSW_CMDID_ENABLE                   DPSW_CMD_ID(0x002)
31 #define DPSW_CMDID_DISABLE                  DPSW_CMD_ID(0x003)
32 #define DPSW_CMDID_GET_ATTR                 DPSW_CMD_V2(0x004)
33 #define DPSW_CMDID_RESET                    DPSW_CMD_ID(0x005)
34 
35 #define DPSW_CMDID_SET_IRQ_ENABLE           DPSW_CMD_ID(0x012)
36 
37 #define DPSW_CMDID_SET_IRQ_MASK             DPSW_CMD_ID(0x014)
38 
39 #define DPSW_CMDID_GET_IRQ_STATUS           DPSW_CMD_ID(0x016)
40 #define DPSW_CMDID_CLEAR_IRQ_STATUS         DPSW_CMD_ID(0x017)
41 
42 #define DPSW_CMDID_IF_SET_TCI               DPSW_CMD_ID(0x030)
43 #define DPSW_CMDID_IF_SET_STP               DPSW_CMD_ID(0x031)
44 
45 #define DPSW_CMDID_IF_GET_COUNTER           DPSW_CMD_V2(0x034)
46 
47 #define DPSW_CMDID_IF_ENABLE                DPSW_CMD_ID(0x03D)
48 #define DPSW_CMDID_IF_DISABLE               DPSW_CMD_ID(0x03E)
49 
50 #define DPSW_CMDID_IF_GET_ATTR              DPSW_CMD_ID(0x042)
51 
52 #define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH  DPSW_CMD_ID(0x044)
53 
54 #define DPSW_CMDID_IF_GET_LINK_STATE        DPSW_CMD_ID(0x046)
55 
56 #define DPSW_CMDID_IF_GET_TCI               DPSW_CMD_ID(0x04A)
57 
58 #define DPSW_CMDID_IF_SET_LINK_CFG          DPSW_CMD_ID(0x04C)
59 
60 #define DPSW_CMDID_VLAN_ADD                 DPSW_CMD_ID(0x060)
61 #define DPSW_CMDID_VLAN_ADD_IF              DPSW_CMD_V2(0x061)
62 #define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED     DPSW_CMD_ID(0x062)
63 
64 #define DPSW_CMDID_VLAN_REMOVE_IF           DPSW_CMD_ID(0x064)
65 #define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED  DPSW_CMD_ID(0x065)
66 #define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING  DPSW_CMD_ID(0x066)
67 #define DPSW_CMDID_VLAN_REMOVE              DPSW_CMD_ID(0x067)
68 
69 #define DPSW_CMDID_FDB_ADD                  DPSW_CMD_ID(0x082)
70 #define DPSW_CMDID_FDB_REMOVE               DPSW_CMD_ID(0x083)
71 #define DPSW_CMDID_FDB_ADD_UNICAST          DPSW_CMD_ID(0x084)
72 #define DPSW_CMDID_FDB_REMOVE_UNICAST       DPSW_CMD_ID(0x085)
73 #define DPSW_CMDID_FDB_ADD_MULTICAST        DPSW_CMD_ID(0x086)
74 #define DPSW_CMDID_FDB_REMOVE_MULTICAST     DPSW_CMD_ID(0x087)
75 #define DPSW_CMDID_FDB_DUMP                 DPSW_CMD_ID(0x08A)
76 
77 #define DPSW_CMDID_IF_GET_PORT_MAC_ADDR     DPSW_CMD_ID(0x0A7)
78 
79 #define DPSW_CMDID_CTRL_IF_GET_ATTR         DPSW_CMD_ID(0x0A0)
80 #define DPSW_CMDID_CTRL_IF_SET_POOLS        DPSW_CMD_ID(0x0A1)
81 #define DPSW_CMDID_CTRL_IF_ENABLE           DPSW_CMD_ID(0x0A2)
82 #define DPSW_CMDID_CTRL_IF_DISABLE          DPSW_CMD_ID(0x0A3)
83 #define DPSW_CMDID_CTRL_IF_SET_QUEUE        DPSW_CMD_ID(0x0A6)
84 
85 #define DPSW_CMDID_SET_EGRESS_FLOOD         DPSW_CMD_ID(0x0AC)
86 
87 /* Macros for accessing command fields smaller than 1byte */
88 #define DPSW_MASK(field)        \
89 	GENMASK(DPSW_##field##_SHIFT + DPSW_##field##_SIZE - 1, \
90 		DPSW_##field##_SHIFT)
91 #define dpsw_set_field(var, field, val) \
92 	((var) |= (((val) << DPSW_##field##_SHIFT) & DPSW_MASK(field)))
93 #define dpsw_get_field(var, field)      \
94 	(((var) & DPSW_MASK(field)) >> DPSW_##field##_SHIFT)
95 #define dpsw_get_bit(var, bit) \
96 	(((var)  >> (bit)) & GENMASK(0, 0))
97 
98 #pragma pack(push, 1)
99 struct dpsw_cmd_open {
100 	__le32 dpsw_id;
101 };
102 
103 #define DPSW_COMPONENT_TYPE_SHIFT	0
104 #define DPSW_COMPONENT_TYPE_SIZE	4
105 
106 struct dpsw_cmd_create {
107 	/* cmd word 0 */
108 	__le16 num_ifs;
109 	u8 max_fdbs;
110 	u8 max_meters_per_if;
111 	/* from LSB: only the first 4 bits */
112 	u8 component_type;
113 	u8 pad[3];
114 	/* cmd word 1 */
115 	__le16 max_vlans;
116 	__le16 max_fdb_entries;
117 	__le16 fdb_aging_time;
118 	__le16 max_fdb_mc_groups;
119 	/* cmd word 2 */
120 	__le64 options;
121 };
122 
123 struct dpsw_cmd_destroy {
124 	__le32 dpsw_id;
125 };
126 
127 #define DPSW_ENABLE_SHIFT 0
128 #define DPSW_ENABLE_SIZE  1
129 
130 struct dpsw_rsp_is_enabled {
131 	/* from LSB: enable:1 */
132 	u8 enabled;
133 };
134 
135 struct dpsw_cmd_set_irq_enable {
136 	u8 enable_state;
137 	u8 pad[3];
138 	u8 irq_index;
139 };
140 
141 struct dpsw_cmd_get_irq_enable {
142 	__le32 pad;
143 	u8 irq_index;
144 };
145 
146 struct dpsw_rsp_get_irq_enable {
147 	u8 enable_state;
148 };
149 
150 struct dpsw_cmd_set_irq_mask {
151 	__le32 mask;
152 	u8 irq_index;
153 };
154 
155 struct dpsw_cmd_get_irq_mask {
156 	__le32 pad;
157 	u8 irq_index;
158 };
159 
160 struct dpsw_rsp_get_irq_mask {
161 	__le32 mask;
162 };
163 
164 struct dpsw_cmd_get_irq_status {
165 	__le32 status;
166 	u8 irq_index;
167 };
168 
169 struct dpsw_rsp_get_irq_status {
170 	__le32 status;
171 };
172 
173 struct dpsw_cmd_clear_irq_status {
174 	__le32 status;
175 	u8 irq_index;
176 };
177 
178 #define DPSW_COMPONENT_TYPE_SHIFT	0
179 #define DPSW_COMPONENT_TYPE_SIZE	4
180 
181 #define DPSW_FLOODING_CFG_SHIFT		0
182 #define DPSW_FLOODING_CFG_SIZE		4
183 
184 #define DPSW_BROADCAST_CFG_SHIFT	4
185 #define DPSW_BROADCAST_CFG_SIZE		4
186 
187 struct dpsw_rsp_get_attr {
188 	/* cmd word 0 */
189 	__le16 num_ifs;
190 	u8 max_fdbs;
191 	u8 num_fdbs;
192 	__le16 max_vlans;
193 	__le16 num_vlans;
194 	/* cmd word 1 */
195 	__le16 max_fdb_entries;
196 	__le16 fdb_aging_time;
197 	__le32 dpsw_id;
198 	/* cmd word 2 */
199 	__le16 mem_size;
200 	__le16 max_fdb_mc_groups;
201 	u8 max_meters_per_if;
202 	/* from LSB only the first 4 bits */
203 	u8 component_type;
204 	/* [0:3] - flooding configuration
205 	 * [4:7] - broadcast configuration
206 	 */
207 	u8 repl_cfg;
208 	u8 pad;
209 	/* cmd word 3 */
210 	__le64 options;
211 };
212 
213 #define DPSW_VLAN_ID_SHIFT	0
214 #define DPSW_VLAN_ID_SIZE	12
215 #define DPSW_DEI_SHIFT		12
216 #define DPSW_DEI_SIZE		1
217 #define DPSW_PCP_SHIFT		13
218 #define DPSW_PCP_SIZE		3
219 
220 struct dpsw_cmd_if_set_tci {
221 	__le16 if_id;
222 	/* from LSB: VLAN_ID:12 DEI:1 PCP:3 */
223 	__le16 conf;
224 };
225 
226 struct dpsw_cmd_if_get_tci {
227 	__le16 if_id;
228 };
229 
230 struct dpsw_rsp_if_get_tci {
231 	__le16 pad;
232 	__le16 vlan_id;
233 	u8 dei;
234 	u8 pcp;
235 };
236 
237 #define DPSW_STATE_SHIFT	0
238 #define DPSW_STATE_SIZE		4
239 
240 struct dpsw_cmd_if_set_stp {
241 	__le16 if_id;
242 	__le16 vlan_id;
243 	/* only the first LSB 4 bits */
244 	u8 state;
245 };
246 
247 #define DPSW_COUNTER_TYPE_SHIFT		0
248 #define DPSW_COUNTER_TYPE_SIZE		5
249 
250 struct dpsw_cmd_if_get_counter {
251 	__le16 if_id;
252 	/* from LSB: type:5 */
253 	u8 type;
254 };
255 
256 struct dpsw_rsp_if_get_counter {
257 	__le64 pad;
258 	__le64 counter;
259 };
260 
261 struct dpsw_cmd_if {
262 	__le16 if_id;
263 };
264 
265 #define DPSW_ADMIT_UNTAGGED_SHIFT	0
266 #define DPSW_ADMIT_UNTAGGED_SIZE	4
267 #define DPSW_ENABLED_SHIFT		5
268 #define DPSW_ENABLED_SIZE		1
269 #define DPSW_ACCEPT_ALL_VLAN_SHIFT	6
270 #define DPSW_ACCEPT_ALL_VLAN_SIZE	1
271 
272 struct dpsw_rsp_if_get_attr {
273 	/* cmd word 0 */
274 	/* from LSB: admit_untagged:4 enabled:1 accept_all_vlan:1 */
275 	u8 conf;
276 	u8 pad1;
277 	u8 num_tcs;
278 	u8 pad2;
279 	__le16 qdid;
280 	/* cmd word 1 */
281 	__le32 options;
282 	__le32 pad3;
283 	/* cmd word 2 */
284 	__le32 rate;
285 };
286 
287 struct dpsw_cmd_if_set_max_frame_length {
288 	__le16 if_id;
289 	__le16 frame_length;
290 };
291 
292 struct dpsw_cmd_if_set_link_cfg {
293 	/* cmd word 0 */
294 	__le16 if_id;
295 	u8 pad[6];
296 	/* cmd word 1 */
297 	__le32 rate;
298 	__le32 pad1;
299 	/* cmd word 2 */
300 	__le64 options;
301 };
302 
303 struct dpsw_cmd_if_get_link_state {
304 	__le16 if_id;
305 };
306 
307 #define DPSW_UP_SHIFT	0
308 #define DPSW_UP_SIZE	1
309 
310 struct dpsw_rsp_if_get_link_state {
311 	/* cmd word 0 */
312 	__le32 pad0;
313 	u8 up;
314 	u8 pad1[3];
315 	/* cmd word 1 */
316 	__le32 rate;
317 	__le32 pad2;
318 	/* cmd word 2 */
319 	__le64 options;
320 };
321 
322 struct dpsw_vlan_add {
323 	__le16 fdb_id;
324 	__le16 vlan_id;
325 };
326 
327 struct dpsw_cmd_vlan_add_if {
328 	/* cmd word 0 */
329 	__le16 options;
330 	__le16 vlan_id;
331 	__le16 fdb_id;
332 	__le16 pad0;
333 	/* cmd word 1-4 */
334 	__le64 if_id;
335 };
336 
337 struct dpsw_cmd_vlan_manage_if {
338 	/* cmd word 0 */
339 	__le16 pad0;
340 	__le16 vlan_id;
341 	__le32 pad1;
342 	/* cmd word 1-4 */
343 	__le64 if_id;
344 };
345 
346 struct dpsw_cmd_vlan_remove {
347 	__le16 pad;
348 	__le16 vlan_id;
349 };
350 
351 struct dpsw_cmd_fdb_add {
352 	__le32 pad;
353 	__le16 fdb_ageing_time;
354 	__le16 num_fdb_entries;
355 };
356 
357 struct dpsw_rsp_fdb_add {
358 	__le16 fdb_id;
359 };
360 
361 struct dpsw_cmd_fdb_remove {
362 	__le16 fdb_id;
363 };
364 
365 #define DPSW_ENTRY_TYPE_SHIFT	0
366 #define DPSW_ENTRY_TYPE_SIZE	4
367 
368 struct dpsw_cmd_fdb_unicast_op {
369 	/* cmd word 0 */
370 	__le16 fdb_id;
371 	u8 mac_addr[6];
372 	/* cmd word 1 */
373 	__le16 if_egress;
374 	/* only the first 4 bits from LSB */
375 	u8 type;
376 };
377 
378 struct dpsw_cmd_fdb_multicast_op {
379 	/* cmd word 0 */
380 	__le16 fdb_id;
381 	__le16 num_ifs;
382 	/* only the first 4 bits from LSB */
383 	u8 type;
384 	u8 pad[3];
385 	/* cmd word 1 */
386 	u8 mac_addr[6];
387 	__le16 pad2;
388 	/* cmd word 2-5 */
389 	__le64 if_id;
390 };
391 
392 struct dpsw_cmd_fdb_dump {
393 	__le16 fdb_id;
394 	__le16 pad0;
395 	__le32 pad1;
396 	__le64 iova_addr;
397 	__le32 iova_size;
398 };
399 
400 struct dpsw_rsp_fdb_dump {
401 	__le16 num_entries;
402 };
403 
404 struct dpsw_rsp_ctrl_if_get_attr {
405 	__le64 pad;
406 	__le32 rx_fqid;
407 	__le32 rx_err_fqid;
408 	__le32 tx_err_conf_fqid;
409 };
410 
411 #define DPSW_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
412 struct dpsw_cmd_ctrl_if_set_pools {
413 	u8 num_dpbp;
414 	u8 backup_pool_mask;
415 	__le16 pad;
416 	__le32 dpbp_id[DPSW_MAX_DPBP];
417 	__le16 buffer_size[DPSW_MAX_DPBP];
418 };
419 
420 #define DPSW_DEST_TYPE_SHIFT	0
421 #define DPSW_DEST_TYPE_SIZE	4
422 
423 struct dpsw_cmd_ctrl_if_set_queue {
424 	__le32 dest_id;
425 	u8 dest_priority;
426 	u8 pad;
427 	/* from LSB: dest_type:4 */
428 	u8 dest_type;
429 	u8 qtype;
430 	__le64 user_ctx;
431 	__le32 options;
432 };
433 
434 struct dpsw_rsp_get_api_version {
435 	__le16 version_major;
436 	__le16 version_minor;
437 };
438 
439 struct dpsw_rsp_if_get_mac_addr {
440 	__le16 pad;
441 	u8 mac_addr[6];
442 };
443 
444 struct dpsw_cmd_set_egress_flood {
445 	__le16 fdb_id;
446 	u8 flood_type;
447 	u8 pad[5];
448 	__le64 if_id;
449 };
450 #pragma pack(pop)
451 #endif /* __FSL_DPSW_CMD_H */
452