1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2013-2016 Freescale Semiconductor Inc. 3 * Copyright 2016 NXP 4 */ 5 #ifndef _FSL_DPNI_CMD_H 6 #define _FSL_DPNI_CMD_H 7 8 #include "dpni.h" 9 10 /* DPNI Version */ 11 #define DPNI_VER_MAJOR 7 12 #define DPNI_VER_MINOR 0 13 #define DPNI_CMD_BASE_VERSION 1 14 #define DPNI_CMD_2ND_VERSION 2 15 #define DPNI_CMD_ID_OFFSET 4 16 17 #define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION) 18 #define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION) 19 20 #define DPNI_CMDID_OPEN DPNI_CMD(0x801) 21 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800) 22 #define DPNI_CMDID_CREATE DPNI_CMD(0x901) 23 #define DPNI_CMDID_DESTROY DPNI_CMD(0x900) 24 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01) 25 26 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002) 27 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003) 28 #define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004) 29 #define DPNI_CMDID_RESET DPNI_CMD(0x005) 30 #define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006) 31 32 #define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010) 33 #define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011) 34 #define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012) 35 #define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013) 36 #define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014) 37 #define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015) 38 #define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016) 39 #define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017) 40 41 #define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200) 42 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B) 43 44 #define DPNI_CMDID_GET_QDID DPNI_CMD(0x210) 45 #define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212) 46 #define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215) 47 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216) 48 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217) 49 #define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A) 50 #define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V2(0x21B) 51 52 #define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220) 53 #define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221) 54 #define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222) 55 #define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223) 56 #define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224) 57 #define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225) 58 #define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226) 59 #define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227) 60 #define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228) 61 62 #define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235) 63 64 #define DPNI_CMDID_SET_QOS_TBL DPNI_CMD(0x240) 65 #define DPNI_CMDID_ADD_QOS_ENT DPNI_CMD(0x241) 66 #define DPNI_CMDID_REMOVE_QOS_ENT DPNI_CMD(0x242) 67 #define DPNI_CMDID_CLR_QOS_TBL DPNI_CMD(0x243) 68 #define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244) 69 #define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245) 70 #define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246) 71 72 #define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D) 73 #define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F) 74 #define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260) 75 #define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261) 76 #define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262) 77 78 #define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263) 79 80 #define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264) 81 #define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265) 82 83 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266) 84 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267) 85 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268) 86 #define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269) 87 #define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A) 88 #define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B) 89 #define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C) 90 91 #define DPNI_CMDID_SET_RX_FS_DIST DPNI_CMD(0x273) 92 #define DPNI_CMDID_SET_RX_HASH_DIST DPNI_CMD(0x274) 93 #define DPNI_CMDID_GET_LINK_CFG DPNI_CMD(0x278) 94 95 /* Macros for accessing command fields smaller than 1byte */ 96 #define DPNI_MASK(field) \ 97 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \ 98 DPNI_##field##_SHIFT) 99 100 #define dpni_set_field(var, field, val) \ 101 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field))) 102 #define dpni_get_field(var, field) \ 103 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT) 104 105 struct dpni_cmd_open { 106 __le32 dpni_id; 107 }; 108 109 #define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) 110 struct dpni_cmd_set_pools { 111 /* cmd word 0 */ 112 u8 num_dpbp; 113 u8 backup_pool_mask; 114 __le16 pad; 115 /* cmd word 0..4 */ 116 __le32 dpbp_id[DPNI_MAX_DPBP]; 117 /* cmd word 4..6 */ 118 __le16 buffer_size[DPNI_MAX_DPBP]; 119 }; 120 121 /* The enable indication is always the least significant bit */ 122 #define DPNI_ENABLE_SHIFT 0 123 #define DPNI_ENABLE_SIZE 1 124 125 struct dpni_rsp_is_enabled { 126 u8 enabled; 127 }; 128 129 struct dpni_rsp_get_irq { 130 /* response word 0 */ 131 __le32 irq_val; 132 __le32 pad; 133 /* response word 1 */ 134 __le64 irq_addr; 135 /* response word 2 */ 136 __le32 irq_num; 137 __le32 type; 138 }; 139 140 struct dpni_cmd_set_irq_enable { 141 u8 enable; 142 u8 pad[3]; 143 u8 irq_index; 144 }; 145 146 struct dpni_cmd_get_irq_enable { 147 __le32 pad; 148 u8 irq_index; 149 }; 150 151 struct dpni_rsp_get_irq_enable { 152 u8 enabled; 153 }; 154 155 struct dpni_cmd_set_irq_mask { 156 __le32 mask; 157 u8 irq_index; 158 }; 159 160 struct dpni_cmd_get_irq_mask { 161 __le32 pad; 162 u8 irq_index; 163 }; 164 165 struct dpni_rsp_get_irq_mask { 166 __le32 mask; 167 }; 168 169 struct dpni_cmd_get_irq_status { 170 __le32 status; 171 u8 irq_index; 172 }; 173 174 struct dpni_rsp_get_irq_status { 175 __le32 status; 176 }; 177 178 struct dpni_cmd_clear_irq_status { 179 __le32 status; 180 u8 irq_index; 181 }; 182 183 struct dpni_rsp_get_attr { 184 /* response word 0 */ 185 __le32 options; 186 u8 num_queues; 187 u8 num_tcs; 188 u8 mac_filter_entries; 189 u8 pad0; 190 /* response word 1 */ 191 u8 vlan_filter_entries; 192 u8 pad1; 193 u8 qos_entries; 194 u8 pad2; 195 __le16 fs_entries; 196 __le16 pad3; 197 /* response word 2 */ 198 u8 qos_key_size; 199 u8 fs_key_size; 200 __le16 wriop_version; 201 }; 202 203 #define DPNI_ERROR_ACTION_SHIFT 0 204 #define DPNI_ERROR_ACTION_SIZE 4 205 #define DPNI_FRAME_ANN_SHIFT 4 206 #define DPNI_FRAME_ANN_SIZE 1 207 208 struct dpni_cmd_set_errors_behavior { 209 __le32 errors; 210 /* from least significant bit: error_action:4, set_frame_annotation:1 */ 211 u8 flags; 212 }; 213 214 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation 215 * buffer layouts, but they all share the same parameters. 216 * If one of the functions changes, below structure needs to be split. 217 */ 218 219 #define DPNI_PASS_TS_SHIFT 0 220 #define DPNI_PASS_TS_SIZE 1 221 #define DPNI_PASS_PR_SHIFT 1 222 #define DPNI_PASS_PR_SIZE 1 223 #define DPNI_PASS_FS_SHIFT 2 224 #define DPNI_PASS_FS_SIZE 1 225 226 struct dpni_cmd_get_buffer_layout { 227 u8 qtype; 228 }; 229 230 struct dpni_rsp_get_buffer_layout { 231 /* response word 0 */ 232 u8 pad0[6]; 233 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 234 u8 flags; 235 u8 pad1; 236 /* response word 1 */ 237 __le16 private_data_size; 238 __le16 data_align; 239 __le16 head_room; 240 __le16 tail_room; 241 }; 242 243 struct dpni_cmd_set_buffer_layout { 244 /* cmd word 0 */ 245 u8 qtype; 246 u8 pad0[3]; 247 __le16 options; 248 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 249 u8 flags; 250 u8 pad1; 251 /* cmd word 1 */ 252 __le16 private_data_size; 253 __le16 data_align; 254 __le16 head_room; 255 __le16 tail_room; 256 }; 257 258 struct dpni_cmd_set_offload { 259 u8 pad[3]; 260 u8 dpni_offload; 261 __le32 config; 262 }; 263 264 struct dpni_cmd_get_offload { 265 u8 pad[3]; 266 u8 dpni_offload; 267 }; 268 269 struct dpni_rsp_get_offload { 270 __le32 pad; 271 __le32 config; 272 }; 273 274 struct dpni_cmd_get_qdid { 275 u8 qtype; 276 }; 277 278 struct dpni_rsp_get_qdid { 279 __le16 qdid; 280 }; 281 282 struct dpni_rsp_get_tx_data_offset { 283 __le16 data_offset; 284 }; 285 286 struct dpni_cmd_get_statistics { 287 u8 page_number; 288 }; 289 290 struct dpni_rsp_get_statistics { 291 __le64 counter[DPNI_STATISTICS_CNT]; 292 }; 293 294 struct dpni_cmd_link_cfg { 295 /* cmd word 0 */ 296 __le64 pad0; 297 /* cmd word 1 */ 298 __le32 rate; 299 __le32 pad1; 300 /* cmd word 2 */ 301 __le64 options; 302 }; 303 304 #define DPNI_LINK_STATE_SHIFT 0 305 #define DPNI_LINK_STATE_SIZE 1 306 307 struct dpni_rsp_get_link_state { 308 /* response word 0 */ 309 __le32 pad0; 310 /* from LSB: up:1 */ 311 u8 flags; 312 u8 pad1[3]; 313 /* response word 1 */ 314 __le32 rate; 315 __le32 pad2; 316 /* response word 2 */ 317 __le64 options; 318 }; 319 320 struct dpni_cmd_set_max_frame_length { 321 __le16 max_frame_length; 322 }; 323 324 struct dpni_rsp_get_max_frame_length { 325 __le16 max_frame_length; 326 }; 327 328 struct dpni_cmd_set_multicast_promisc { 329 u8 enable; 330 }; 331 332 struct dpni_rsp_get_multicast_promisc { 333 u8 enabled; 334 }; 335 336 struct dpni_cmd_set_unicast_promisc { 337 u8 enable; 338 }; 339 340 struct dpni_rsp_get_unicast_promisc { 341 u8 enabled; 342 }; 343 344 struct dpni_cmd_set_primary_mac_addr { 345 __le16 pad; 346 u8 mac_addr[6]; 347 }; 348 349 struct dpni_rsp_get_primary_mac_addr { 350 __le16 pad; 351 u8 mac_addr[6]; 352 }; 353 354 struct dpni_rsp_get_port_mac_addr { 355 __le16 pad; 356 u8 mac_addr[6]; 357 }; 358 359 struct dpni_cmd_add_mac_addr { 360 __le16 pad; 361 u8 mac_addr[6]; 362 }; 363 364 struct dpni_cmd_remove_mac_addr { 365 __le16 pad; 366 u8 mac_addr[6]; 367 }; 368 369 #define DPNI_UNICAST_FILTERS_SHIFT 0 370 #define DPNI_UNICAST_FILTERS_SIZE 1 371 #define DPNI_MULTICAST_FILTERS_SHIFT 1 372 #define DPNI_MULTICAST_FILTERS_SIZE 1 373 374 struct dpni_cmd_clear_mac_filters { 375 /* from LSB: unicast:1, multicast:1 */ 376 u8 flags; 377 }; 378 379 #define DPNI_DIST_MODE_SHIFT 0 380 #define DPNI_DIST_MODE_SIZE 4 381 #define DPNI_MISS_ACTION_SHIFT 4 382 #define DPNI_MISS_ACTION_SIZE 4 383 384 struct dpni_cmd_set_rx_tc_dist { 385 /* cmd word 0 */ 386 __le16 dist_size; 387 u8 tc_id; 388 /* from LSB: dist_mode:4, miss_action:4 */ 389 u8 flags; 390 __le16 pad0; 391 __le16 default_flow_id; 392 /* cmd word 1..5 */ 393 __le64 pad1[5]; 394 /* cmd word 6 */ 395 __le64 key_cfg_iova; 396 }; 397 398 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at 399 * key_cfg_iova) 400 */ 401 struct dpni_mask_cfg { 402 u8 mask; 403 u8 offset; 404 }; 405 406 #define DPNI_EFH_TYPE_SHIFT 0 407 #define DPNI_EFH_TYPE_SIZE 4 408 #define DPNI_EXTRACT_TYPE_SHIFT 0 409 #define DPNI_EXTRACT_TYPE_SIZE 4 410 411 struct dpni_dist_extract { 412 /* word 0 */ 413 u8 prot; 414 /* EFH type stored in the 4 least significant bits */ 415 u8 efh_type; 416 u8 size; 417 u8 offset; 418 __le32 field; 419 /* word 1 */ 420 u8 hdr_index; 421 u8 constant; 422 u8 num_of_repeats; 423 u8 num_of_byte_masks; 424 /* Extraction type is stored in the 4 LSBs */ 425 u8 extract_type; 426 u8 pad[3]; 427 /* word 2 */ 428 struct dpni_mask_cfg masks[4]; 429 }; 430 431 struct dpni_ext_set_rx_tc_dist { 432 /* extension word 0 */ 433 u8 num_extracts; 434 u8 pad[7]; 435 /* words 1..25 */ 436 struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS]; 437 }; 438 439 struct dpni_cmd_get_queue { 440 u8 qtype; 441 u8 tc; 442 u8 index; 443 }; 444 445 #define DPNI_DEST_TYPE_SHIFT 0 446 #define DPNI_DEST_TYPE_SIZE 4 447 #define DPNI_STASH_CTRL_SHIFT 6 448 #define DPNI_STASH_CTRL_SIZE 1 449 #define DPNI_HOLD_ACTIVE_SHIFT 7 450 #define DPNI_HOLD_ACTIVE_SIZE 1 451 452 struct dpni_rsp_get_queue { 453 /* response word 0 */ 454 __le64 pad0; 455 /* response word 1 */ 456 __le32 dest_id; 457 __le16 pad1; 458 u8 dest_prio; 459 /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */ 460 u8 flags; 461 /* response word 2 */ 462 __le64 flc; 463 /* response word 3 */ 464 __le64 user_context; 465 /* response word 4 */ 466 __le32 fqid; 467 __le16 qdbin; 468 }; 469 470 struct dpni_cmd_set_queue { 471 /* cmd word 0 */ 472 u8 qtype; 473 u8 tc; 474 u8 index; 475 u8 options; 476 __le32 pad0; 477 /* cmd word 1 */ 478 __le32 dest_id; 479 __le16 pad1; 480 u8 dest_prio; 481 u8 flags; 482 /* cmd word 2 */ 483 __le64 flc; 484 /* cmd word 3 */ 485 __le64 user_context; 486 }; 487 488 struct dpni_cmd_set_taildrop { 489 /* cmd word 0 */ 490 u8 congestion_point; 491 u8 qtype; 492 u8 tc; 493 u8 index; 494 __le32 pad0; 495 /* cmd word 1 */ 496 /* Only least significant bit is relevant */ 497 u8 enable; 498 u8 pad1; 499 u8 units; 500 u8 pad2; 501 __le32 threshold; 502 }; 503 504 struct dpni_cmd_get_taildrop { 505 u8 congestion_point; 506 u8 qtype; 507 u8 tc; 508 u8 index; 509 }; 510 511 struct dpni_rsp_get_taildrop { 512 /* cmd word 0 */ 513 __le64 pad0; 514 /* cmd word 1 */ 515 /* only least significant bit is relevant */ 516 u8 enable; 517 u8 pad1; 518 u8 units; 519 u8 pad2; 520 __le32 threshold; 521 }; 522 523 struct dpni_rsp_get_api_version { 524 __le16 major; 525 __le16 minor; 526 }; 527 528 #define DPNI_RX_FS_DIST_ENABLE_SHIFT 0 529 #define DPNI_RX_FS_DIST_ENABLE_SIZE 1 530 struct dpni_cmd_set_rx_fs_dist { 531 __le16 dist_size; 532 u8 enable; 533 u8 tc; 534 __le16 miss_flow_id; 535 __le16 pad; 536 __le64 key_cfg_iova; 537 }; 538 539 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0 540 #define DPNI_RX_HASH_DIST_ENABLE_SIZE 1 541 struct dpni_cmd_set_rx_hash_dist { 542 __le16 dist_size; 543 u8 enable; 544 u8 tc; 545 __le32 pad; 546 __le64 key_cfg_iova; 547 }; 548 549 struct dpni_cmd_add_fs_entry { 550 /* cmd word 0 */ 551 __le16 options; 552 u8 tc_id; 553 u8 key_size; 554 __le16 index; 555 __le16 flow_id; 556 /* cmd word 1 */ 557 __le64 key_iova; 558 /* cmd word 2 */ 559 __le64 mask_iova; 560 /* cmd word 3 */ 561 __le64 flc; 562 }; 563 564 struct dpni_cmd_remove_fs_entry { 565 /* cmd word 0 */ 566 __le16 pad0; 567 u8 tc_id; 568 u8 key_size; 569 __le32 pad1; 570 /* cmd word 1 */ 571 __le64 key_iova; 572 /* cmd word 2 */ 573 __le64 mask_iova; 574 }; 575 576 #define DPNI_DISCARD_ON_MISS_SHIFT 0 577 #define DPNI_DISCARD_ON_MISS_SIZE 1 578 579 struct dpni_cmd_set_qos_table { 580 __le32 pad; 581 u8 default_tc; 582 /* only the LSB */ 583 u8 discard_on_miss; 584 __le16 pad1[21]; 585 __le64 key_cfg_iova; 586 }; 587 588 struct dpni_cmd_add_qos_entry { 589 __le16 pad; 590 u8 tc_id; 591 u8 key_size; 592 __le16 index; 593 __le16 pad1; 594 __le64 key_iova; 595 __le64 mask_iova; 596 }; 597 598 struct dpni_cmd_remove_qos_entry { 599 u8 pad[3]; 600 u8 key_size; 601 __le32 pad1; 602 __le64 key_iova; 603 __le64 mask_iova; 604 }; 605 606 #define DPNI_DEST_TYPE_SHIFT 0 607 #define DPNI_DEST_TYPE_SIZE 4 608 #define DPNI_CONG_UNITS_SHIFT 4 609 #define DPNI_CONG_UNITS_SIZE 2 610 611 struct dpni_cmd_set_congestion_notification { 612 /* cmd word 0 */ 613 u8 qtype; 614 u8 tc; 615 u8 pad[6]; 616 /* cmd word 1 */ 617 __le32 dest_id; 618 __le16 notification_mode; 619 u8 dest_priority; 620 /* from LSB: dest_type: 4 units:2 */ 621 u8 type_units; 622 /* cmd word 2 */ 623 __le64 message_iova; 624 /* cmd word 3 */ 625 __le64 message_ctx; 626 /* cmd word 4 */ 627 __le32 threshold_entry; 628 __le32 threshold_exit; 629 }; 630 631 #define DPNI_COUPLED_SHIFT 0 632 #define DPNI_COUPLED_SIZE 1 633 634 struct dpni_cmd_set_tx_shaping { 635 __le16 tx_cr_max_burst_size; 636 __le16 tx_er_max_burst_size; 637 __le32 pad; 638 __le32 tx_cr_rate_limit; 639 __le32 tx_er_rate_limit; 640 /* from LSB: coupled:1 */ 641 u8 coupled; 642 }; 643 644 #endif /* _FSL_DPNI_CMD_H */ 645