1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  * Copyright 2020 NXP
5  */
6 #ifndef _FSL_DPNI_CMD_H
7 #define _FSL_DPNI_CMD_H
8 
9 #include "dpni.h"
10 
11 /* DPNI Version */
12 #define DPNI_VER_MAJOR				7
13 #define DPNI_VER_MINOR				0
14 #define DPNI_CMD_BASE_VERSION			1
15 #define DPNI_CMD_2ND_VERSION			2
16 #define DPNI_CMD_ID_OFFSET			4
17 
18 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
19 #define DPNI_CMD_V2(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION)
20 
21 #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
22 #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
23 #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
24 #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
25 #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
26 
27 #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
28 #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
29 #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
30 #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
31 #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
32 
33 #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
34 #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
35 #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
36 #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
37 #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
38 #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
39 #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
40 #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
41 
42 #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
43 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
44 
45 #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
46 #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
47 #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
48 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
49 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
50 #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
51 #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD_V2(0x21B)
52 
53 #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
54 #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
55 #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
56 #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
57 #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
58 #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
59 #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
60 #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
61 #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
62 
63 #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
64 
65 #define DPNI_CMDID_SET_QOS_TBL				DPNI_CMD(0x240)
66 #define DPNI_CMDID_ADD_QOS_ENT				DPNI_CMD(0x241)
67 #define DPNI_CMDID_REMOVE_QOS_ENT			DPNI_CMD(0x242)
68 #define DPNI_CMDID_CLR_QOS_TBL				DPNI_CMD(0x243)
69 #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
70 #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
71 #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
72 
73 #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
74 #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
75 #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
76 #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
77 #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
78 
79 #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
80 
81 #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
82 #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
83 
84 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
85 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
86 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
87 #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
88 #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
89 #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
90 #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
91 
92 #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
93 #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
94 #define DPNI_CMDID_GET_LINK_CFG				DPNI_CMD(0x278)
95 
96 #define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
97 #define DPNI_CMDID_GET_SINGLE_STEP_CFG			DPNI_CMD(0x27a)
98 
99 /* Macros for accessing command fields smaller than 1byte */
100 #define DPNI_MASK(field)	\
101 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
102 		DPNI_##field##_SHIFT)
103 
104 #define dpni_set_field(var, field, val)	\
105 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
106 #define dpni_get_field(var, field)	\
107 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
108 
109 struct dpni_cmd_open {
110 	__le32 dpni_id;
111 };
112 
113 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
114 struct dpni_cmd_set_pools {
115 	/* cmd word 0 */
116 	u8 num_dpbp;
117 	u8 backup_pool_mask;
118 	__le16 pad;
119 	/* cmd word 0..4 */
120 	__le32 dpbp_id[DPNI_MAX_DPBP];
121 	/* cmd word 4..6 */
122 	__le16 buffer_size[DPNI_MAX_DPBP];
123 };
124 
125 /* The enable indication is always the least significant bit */
126 #define DPNI_ENABLE_SHIFT		0
127 #define DPNI_ENABLE_SIZE		1
128 
129 struct dpni_rsp_is_enabled {
130 	u8 enabled;
131 };
132 
133 struct dpni_rsp_get_irq {
134 	/* response word 0 */
135 	__le32 irq_val;
136 	__le32 pad;
137 	/* response word 1 */
138 	__le64 irq_addr;
139 	/* response word 2 */
140 	__le32 irq_num;
141 	__le32 type;
142 };
143 
144 struct dpni_cmd_set_irq_enable {
145 	u8 enable;
146 	u8 pad[3];
147 	u8 irq_index;
148 };
149 
150 struct dpni_cmd_get_irq_enable {
151 	__le32 pad;
152 	u8 irq_index;
153 };
154 
155 struct dpni_rsp_get_irq_enable {
156 	u8 enabled;
157 };
158 
159 struct dpni_cmd_set_irq_mask {
160 	__le32 mask;
161 	u8 irq_index;
162 };
163 
164 struct dpni_cmd_get_irq_mask {
165 	__le32 pad;
166 	u8 irq_index;
167 };
168 
169 struct dpni_rsp_get_irq_mask {
170 	__le32 mask;
171 };
172 
173 struct dpni_cmd_get_irq_status {
174 	__le32 status;
175 	u8 irq_index;
176 };
177 
178 struct dpni_rsp_get_irq_status {
179 	__le32 status;
180 };
181 
182 struct dpni_cmd_clear_irq_status {
183 	__le32 status;
184 	u8 irq_index;
185 };
186 
187 struct dpni_rsp_get_attr {
188 	/* response word 0 */
189 	__le32 options;
190 	u8 num_queues;
191 	u8 num_tcs;
192 	u8 mac_filter_entries;
193 	u8 pad0;
194 	/* response word 1 */
195 	u8 vlan_filter_entries;
196 	u8 pad1;
197 	u8 qos_entries;
198 	u8 pad2;
199 	__le16 fs_entries;
200 	__le16 pad3;
201 	/* response word 2 */
202 	u8 qos_key_size;
203 	u8 fs_key_size;
204 	__le16 wriop_version;
205 };
206 
207 #define DPNI_ERROR_ACTION_SHIFT		0
208 #define DPNI_ERROR_ACTION_SIZE		4
209 #define DPNI_FRAME_ANN_SHIFT		4
210 #define DPNI_FRAME_ANN_SIZE		1
211 
212 struct dpni_cmd_set_errors_behavior {
213 	__le32 errors;
214 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
215 	u8 flags;
216 };
217 
218 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
219  * buffer layouts, but they all share the same parameters.
220  * If one of the functions changes, below structure needs to be split.
221  */
222 
223 #define DPNI_PASS_TS_SHIFT		0
224 #define DPNI_PASS_TS_SIZE		1
225 #define DPNI_PASS_PR_SHIFT		1
226 #define DPNI_PASS_PR_SIZE		1
227 #define DPNI_PASS_FS_SHIFT		2
228 #define DPNI_PASS_FS_SIZE		1
229 
230 struct dpni_cmd_get_buffer_layout {
231 	u8 qtype;
232 };
233 
234 struct dpni_rsp_get_buffer_layout {
235 	/* response word 0 */
236 	u8 pad0[6];
237 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
238 	u8 flags;
239 	u8 pad1;
240 	/* response word 1 */
241 	__le16 private_data_size;
242 	__le16 data_align;
243 	__le16 head_room;
244 	__le16 tail_room;
245 };
246 
247 struct dpni_cmd_set_buffer_layout {
248 	/* cmd word 0 */
249 	u8 qtype;
250 	u8 pad0[3];
251 	__le16 options;
252 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
253 	u8 flags;
254 	u8 pad1;
255 	/* cmd word 1 */
256 	__le16 private_data_size;
257 	__le16 data_align;
258 	__le16 head_room;
259 	__le16 tail_room;
260 };
261 
262 struct dpni_cmd_set_offload {
263 	u8 pad[3];
264 	u8 dpni_offload;
265 	__le32 config;
266 };
267 
268 struct dpni_cmd_get_offload {
269 	u8 pad[3];
270 	u8 dpni_offload;
271 };
272 
273 struct dpni_rsp_get_offload {
274 	__le32 pad;
275 	__le32 config;
276 };
277 
278 struct dpni_cmd_get_qdid {
279 	u8 qtype;
280 };
281 
282 struct dpni_rsp_get_qdid {
283 	__le16 qdid;
284 };
285 
286 struct dpni_rsp_get_tx_data_offset {
287 	__le16 data_offset;
288 };
289 
290 struct dpni_cmd_get_statistics {
291 	u8 page_number;
292 };
293 
294 struct dpni_rsp_get_statistics {
295 	__le64 counter[DPNI_STATISTICS_CNT];
296 };
297 
298 struct dpni_cmd_link_cfg {
299 	/* cmd word 0 */
300 	__le64 pad0;
301 	/* cmd word 1 */
302 	__le32 rate;
303 	__le32 pad1;
304 	/* cmd word 2 */
305 	__le64 options;
306 };
307 
308 #define DPNI_LINK_STATE_SHIFT		0
309 #define DPNI_LINK_STATE_SIZE		1
310 
311 struct dpni_rsp_get_link_state {
312 	/* response word 0 */
313 	__le32 pad0;
314 	/* from LSB: up:1 */
315 	u8 flags;
316 	u8 pad1[3];
317 	/* response word 1 */
318 	__le32 rate;
319 	__le32 pad2;
320 	/* response word 2 */
321 	__le64 options;
322 };
323 
324 struct dpni_cmd_set_max_frame_length {
325 	__le16 max_frame_length;
326 };
327 
328 struct dpni_rsp_get_max_frame_length {
329 	__le16 max_frame_length;
330 };
331 
332 struct dpni_cmd_set_multicast_promisc {
333 	u8 enable;
334 };
335 
336 struct dpni_rsp_get_multicast_promisc {
337 	u8 enabled;
338 };
339 
340 struct dpni_cmd_set_unicast_promisc {
341 	u8 enable;
342 };
343 
344 struct dpni_rsp_get_unicast_promisc {
345 	u8 enabled;
346 };
347 
348 struct dpni_cmd_set_primary_mac_addr {
349 	__le16 pad;
350 	u8 mac_addr[6];
351 };
352 
353 struct dpni_rsp_get_primary_mac_addr {
354 	__le16 pad;
355 	u8 mac_addr[6];
356 };
357 
358 struct dpni_rsp_get_port_mac_addr {
359 	__le16 pad;
360 	u8 mac_addr[6];
361 };
362 
363 struct dpni_cmd_add_mac_addr {
364 	__le16 pad;
365 	u8 mac_addr[6];
366 };
367 
368 struct dpni_cmd_remove_mac_addr {
369 	__le16 pad;
370 	u8 mac_addr[6];
371 };
372 
373 #define DPNI_UNICAST_FILTERS_SHIFT	0
374 #define DPNI_UNICAST_FILTERS_SIZE	1
375 #define DPNI_MULTICAST_FILTERS_SHIFT	1
376 #define DPNI_MULTICAST_FILTERS_SIZE	1
377 
378 struct dpni_cmd_clear_mac_filters {
379 	/* from LSB: unicast:1, multicast:1 */
380 	u8 flags;
381 };
382 
383 #define DPNI_DIST_MODE_SHIFT		0
384 #define DPNI_DIST_MODE_SIZE		4
385 #define DPNI_MISS_ACTION_SHIFT		4
386 #define DPNI_MISS_ACTION_SIZE		4
387 
388 struct dpni_cmd_set_rx_tc_dist {
389 	/* cmd word 0 */
390 	__le16 dist_size;
391 	u8 tc_id;
392 	/* from LSB: dist_mode:4, miss_action:4 */
393 	u8 flags;
394 	__le16 pad0;
395 	__le16 default_flow_id;
396 	/* cmd word 1..5 */
397 	__le64 pad1[5];
398 	/* cmd word 6 */
399 	__le64 key_cfg_iova;
400 };
401 
402 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
403  * key_cfg_iova)
404  */
405 struct dpni_mask_cfg {
406 	u8 mask;
407 	u8 offset;
408 };
409 
410 #define DPNI_EFH_TYPE_SHIFT		0
411 #define DPNI_EFH_TYPE_SIZE		4
412 #define DPNI_EXTRACT_TYPE_SHIFT		0
413 #define DPNI_EXTRACT_TYPE_SIZE		4
414 
415 struct dpni_dist_extract {
416 	/* word 0 */
417 	u8 prot;
418 	/* EFH type stored in the 4 least significant bits */
419 	u8 efh_type;
420 	u8 size;
421 	u8 offset;
422 	__le32 field;
423 	/* word 1 */
424 	u8 hdr_index;
425 	u8 constant;
426 	u8 num_of_repeats;
427 	u8 num_of_byte_masks;
428 	/* Extraction type is stored in the 4 LSBs */
429 	u8 extract_type;
430 	u8 pad[3];
431 	/* word 2 */
432 	struct dpni_mask_cfg masks[4];
433 };
434 
435 struct dpni_ext_set_rx_tc_dist {
436 	/* extension word 0 */
437 	u8 num_extracts;
438 	u8 pad[7];
439 	/* words 1..25 */
440 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
441 };
442 
443 struct dpni_cmd_get_queue {
444 	u8 qtype;
445 	u8 tc;
446 	u8 index;
447 };
448 
449 #define DPNI_DEST_TYPE_SHIFT		0
450 #define DPNI_DEST_TYPE_SIZE		4
451 #define DPNI_STASH_CTRL_SHIFT		6
452 #define DPNI_STASH_CTRL_SIZE		1
453 #define DPNI_HOLD_ACTIVE_SHIFT		7
454 #define DPNI_HOLD_ACTIVE_SIZE		1
455 
456 struct dpni_rsp_get_queue {
457 	/* response word 0 */
458 	__le64 pad0;
459 	/* response word 1 */
460 	__le32 dest_id;
461 	__le16 pad1;
462 	u8 dest_prio;
463 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
464 	u8 flags;
465 	/* response word 2 */
466 	__le64 flc;
467 	/* response word 3 */
468 	__le64 user_context;
469 	/* response word 4 */
470 	__le32 fqid;
471 	__le16 qdbin;
472 };
473 
474 struct dpni_cmd_set_queue {
475 	/* cmd word 0 */
476 	u8 qtype;
477 	u8 tc;
478 	u8 index;
479 	u8 options;
480 	__le32 pad0;
481 	/* cmd word 1 */
482 	__le32 dest_id;
483 	__le16 pad1;
484 	u8 dest_prio;
485 	u8 flags;
486 	/* cmd word 2 */
487 	__le64 flc;
488 	/* cmd word 3 */
489 	__le64 user_context;
490 };
491 
492 struct dpni_cmd_set_taildrop {
493 	/* cmd word 0 */
494 	u8 congestion_point;
495 	u8 qtype;
496 	u8 tc;
497 	u8 index;
498 	__le32 pad0;
499 	/* cmd word 1 */
500 	/* Only least significant bit is relevant */
501 	u8 enable;
502 	u8 pad1;
503 	u8 units;
504 	u8 pad2;
505 	__le32 threshold;
506 };
507 
508 struct dpni_cmd_get_taildrop {
509 	u8 congestion_point;
510 	u8 qtype;
511 	u8 tc;
512 	u8 index;
513 };
514 
515 struct dpni_rsp_get_taildrop {
516 	/* cmd word 0 */
517 	__le64 pad0;
518 	/* cmd word 1 */
519 	/* only least significant bit is relevant */
520 	u8 enable;
521 	u8 pad1;
522 	u8 units;
523 	u8 pad2;
524 	__le32 threshold;
525 };
526 
527 struct dpni_rsp_get_api_version {
528 	__le16 major;
529 	__le16 minor;
530 };
531 
532 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
533 #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
534 struct dpni_cmd_set_rx_fs_dist {
535 	__le16 dist_size;
536 	u8 enable;
537 	u8 tc;
538 	__le16 miss_flow_id;
539 	__le16 pad;
540 	__le64 key_cfg_iova;
541 };
542 
543 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
544 #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
545 struct dpni_cmd_set_rx_hash_dist {
546 	__le16 dist_size;
547 	u8 enable;
548 	u8 tc;
549 	__le32 pad;
550 	__le64 key_cfg_iova;
551 };
552 
553 struct dpni_cmd_add_fs_entry {
554 	/* cmd word 0 */
555 	__le16 options;
556 	u8 tc_id;
557 	u8 key_size;
558 	__le16 index;
559 	__le16 flow_id;
560 	/* cmd word 1 */
561 	__le64 key_iova;
562 	/* cmd word 2 */
563 	__le64 mask_iova;
564 	/* cmd word 3 */
565 	__le64 flc;
566 };
567 
568 struct dpni_cmd_remove_fs_entry {
569 	/* cmd word 0 */
570 	__le16 pad0;
571 	u8 tc_id;
572 	u8 key_size;
573 	__le32 pad1;
574 	/* cmd word 1 */
575 	__le64 key_iova;
576 	/* cmd word 2 */
577 	__le64 mask_iova;
578 };
579 
580 #define DPNI_DISCARD_ON_MISS_SHIFT	0
581 #define DPNI_DISCARD_ON_MISS_SIZE	1
582 
583 struct dpni_cmd_set_qos_table {
584 	__le32 pad;
585 	u8 default_tc;
586 	/* only the LSB */
587 	u8 discard_on_miss;
588 	__le16 pad1[21];
589 	__le64 key_cfg_iova;
590 };
591 
592 struct dpni_cmd_add_qos_entry {
593 	__le16 pad;
594 	u8 tc_id;
595 	u8 key_size;
596 	__le16 index;
597 	__le16 pad1;
598 	__le64 key_iova;
599 	__le64 mask_iova;
600 };
601 
602 struct dpni_cmd_remove_qos_entry {
603 	u8 pad[3];
604 	u8 key_size;
605 	__le32 pad1;
606 	__le64 key_iova;
607 	__le64 mask_iova;
608 };
609 
610 #define DPNI_DEST_TYPE_SHIFT		0
611 #define DPNI_DEST_TYPE_SIZE		4
612 #define DPNI_CONG_UNITS_SHIFT		4
613 #define DPNI_CONG_UNITS_SIZE		2
614 
615 struct dpni_cmd_set_congestion_notification {
616 	/* cmd word 0 */
617 	u8 qtype;
618 	u8 tc;
619 	u8 pad[6];
620 	/* cmd word 1 */
621 	__le32 dest_id;
622 	__le16 notification_mode;
623 	u8 dest_priority;
624 	/* from LSB: dest_type: 4 units:2 */
625 	u8 type_units;
626 	/* cmd word 2 */
627 	__le64 message_iova;
628 	/* cmd word 3 */
629 	__le64 message_ctx;
630 	/* cmd word 4 */
631 	__le32 threshold_entry;
632 	__le32 threshold_exit;
633 };
634 
635 #define DPNI_COUPLED_SHIFT	0
636 #define DPNI_COUPLED_SIZE	1
637 
638 struct dpni_cmd_set_tx_shaping {
639 	__le16 tx_cr_max_burst_size;
640 	__le16 tx_er_max_burst_size;
641 	__le32 pad;
642 	__le32 tx_cr_rate_limit;
643 	__le32 tx_er_rate_limit;
644 	/* from LSB: coupled:1 */
645 	u8 coupled;
646 };
647 
648 #define DPNI_PTP_ENABLE_SHIFT			0
649 #define DPNI_PTP_ENABLE_SIZE			1
650 #define DPNI_PTP_CH_UPDATE_SHIFT		1
651 #define DPNI_PTP_CH_UPDATE_SIZE			1
652 
653 struct dpni_cmd_single_step_cfg {
654 	__le16 flags;
655 	__le16 offset;
656 	__le32 peer_delay;
657 };
658 
659 struct dpni_rsp_single_step_cfg {
660 	__le16 flags;
661 	__le16 offset;
662 	__le32 peer_delay;
663 };
664 
665 #endif /* _FSL_DPNI_CMD_H */
666