1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  */
5 #ifndef _FSL_DPNI_CMD_H
6 #define _FSL_DPNI_CMD_H
7 
8 #include "dpni.h"
9 
10 /* DPNI Version */
11 #define DPNI_VER_MAJOR				7
12 #define DPNI_VER_MINOR				0
13 #define DPNI_CMD_BASE_VERSION			1
14 #define DPNI_CMD_ID_OFFSET			4
15 
16 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
17 
18 #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
19 #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
20 #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
21 #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
22 #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
23 
24 #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
25 #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
26 #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
27 #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
28 #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
29 
30 #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
31 #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
32 #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
33 #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
34 #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
35 #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
36 #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
37 #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
38 
39 #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
40 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
41 
42 #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
43 #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
44 #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
45 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
46 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
47 #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
48 #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD(0x21B)
49 
50 #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
51 #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
52 #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
53 #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
54 #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
55 #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
56 #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
57 #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
58 #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
59 
60 #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
61 
62 #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
63 #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
64 #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
65 
66 #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
67 #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
68 #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
69 #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
70 #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
71 
72 #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
73 
74 #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
75 #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
76 
77 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
78 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
79 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
80 #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
81 #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
82 #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
83 #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
84 
85 #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
86 #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
87 
88 /* Macros for accessing command fields smaller than 1byte */
89 #define DPNI_MASK(field)	\
90 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
91 		DPNI_##field##_SHIFT)
92 
93 #define dpni_set_field(var, field, val)	\
94 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
95 #define dpni_get_field(var, field)	\
96 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
97 
98 struct dpni_cmd_open {
99 	__le32 dpni_id;
100 };
101 
102 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
103 struct dpni_cmd_set_pools {
104 	/* cmd word 0 */
105 	u8 num_dpbp;
106 	u8 backup_pool_mask;
107 	__le16 pad;
108 	/* cmd word 0..4 */
109 	__le32 dpbp_id[DPNI_MAX_DPBP];
110 	/* cmd word 4..6 */
111 	__le16 buffer_size[DPNI_MAX_DPBP];
112 };
113 
114 /* The enable indication is always the least significant bit */
115 #define DPNI_ENABLE_SHIFT		0
116 #define DPNI_ENABLE_SIZE		1
117 
118 struct dpni_rsp_is_enabled {
119 	u8 enabled;
120 };
121 
122 struct dpni_rsp_get_irq {
123 	/* response word 0 */
124 	__le32 irq_val;
125 	__le32 pad;
126 	/* response word 1 */
127 	__le64 irq_addr;
128 	/* response word 2 */
129 	__le32 irq_num;
130 	__le32 type;
131 };
132 
133 struct dpni_cmd_set_irq_enable {
134 	u8 enable;
135 	u8 pad[3];
136 	u8 irq_index;
137 };
138 
139 struct dpni_cmd_get_irq_enable {
140 	__le32 pad;
141 	u8 irq_index;
142 };
143 
144 struct dpni_rsp_get_irq_enable {
145 	u8 enabled;
146 };
147 
148 struct dpni_cmd_set_irq_mask {
149 	__le32 mask;
150 	u8 irq_index;
151 };
152 
153 struct dpni_cmd_get_irq_mask {
154 	__le32 pad;
155 	u8 irq_index;
156 };
157 
158 struct dpni_rsp_get_irq_mask {
159 	__le32 mask;
160 };
161 
162 struct dpni_cmd_get_irq_status {
163 	__le32 status;
164 	u8 irq_index;
165 };
166 
167 struct dpni_rsp_get_irq_status {
168 	__le32 status;
169 };
170 
171 struct dpni_cmd_clear_irq_status {
172 	__le32 status;
173 	u8 irq_index;
174 };
175 
176 struct dpni_rsp_get_attr {
177 	/* response word 0 */
178 	__le32 options;
179 	u8 num_queues;
180 	u8 num_tcs;
181 	u8 mac_filter_entries;
182 	u8 pad0;
183 	/* response word 1 */
184 	u8 vlan_filter_entries;
185 	u8 pad1;
186 	u8 qos_entries;
187 	u8 pad2;
188 	__le16 fs_entries;
189 	__le16 pad3;
190 	/* response word 2 */
191 	u8 qos_key_size;
192 	u8 fs_key_size;
193 	__le16 wriop_version;
194 };
195 
196 #define DPNI_ERROR_ACTION_SHIFT		0
197 #define DPNI_ERROR_ACTION_SIZE		4
198 #define DPNI_FRAME_ANN_SHIFT		4
199 #define DPNI_FRAME_ANN_SIZE		1
200 
201 struct dpni_cmd_set_errors_behavior {
202 	__le32 errors;
203 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
204 	u8 flags;
205 };
206 
207 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
208  * buffer layouts, but they all share the same parameters.
209  * If one of the functions changes, below structure needs to be split.
210  */
211 
212 #define DPNI_PASS_TS_SHIFT		0
213 #define DPNI_PASS_TS_SIZE		1
214 #define DPNI_PASS_PR_SHIFT		1
215 #define DPNI_PASS_PR_SIZE		1
216 #define DPNI_PASS_FS_SHIFT		2
217 #define DPNI_PASS_FS_SIZE		1
218 
219 struct dpni_cmd_get_buffer_layout {
220 	u8 qtype;
221 };
222 
223 struct dpni_rsp_get_buffer_layout {
224 	/* response word 0 */
225 	u8 pad0[6];
226 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
227 	u8 flags;
228 	u8 pad1;
229 	/* response word 1 */
230 	__le16 private_data_size;
231 	__le16 data_align;
232 	__le16 head_room;
233 	__le16 tail_room;
234 };
235 
236 struct dpni_cmd_set_buffer_layout {
237 	/* cmd word 0 */
238 	u8 qtype;
239 	u8 pad0[3];
240 	__le16 options;
241 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
242 	u8 flags;
243 	u8 pad1;
244 	/* cmd word 1 */
245 	__le16 private_data_size;
246 	__le16 data_align;
247 	__le16 head_room;
248 	__le16 tail_room;
249 };
250 
251 struct dpni_cmd_set_offload {
252 	u8 pad[3];
253 	u8 dpni_offload;
254 	__le32 config;
255 };
256 
257 struct dpni_cmd_get_offload {
258 	u8 pad[3];
259 	u8 dpni_offload;
260 };
261 
262 struct dpni_rsp_get_offload {
263 	__le32 pad;
264 	__le32 config;
265 };
266 
267 struct dpni_cmd_get_qdid {
268 	u8 qtype;
269 };
270 
271 struct dpni_rsp_get_qdid {
272 	__le16 qdid;
273 };
274 
275 struct dpni_rsp_get_tx_data_offset {
276 	__le16 data_offset;
277 };
278 
279 struct dpni_cmd_get_statistics {
280 	u8 page_number;
281 };
282 
283 struct dpni_rsp_get_statistics {
284 	__le64 counter[DPNI_STATISTICS_CNT];
285 };
286 
287 struct dpni_cmd_set_link_cfg {
288 	/* cmd word 0 */
289 	__le64 pad0;
290 	/* cmd word 1 */
291 	__le32 rate;
292 	__le32 pad1;
293 	/* cmd word 2 */
294 	__le64 options;
295 };
296 
297 #define DPNI_LINK_STATE_SHIFT		0
298 #define DPNI_LINK_STATE_SIZE		1
299 
300 struct dpni_rsp_get_link_state {
301 	/* response word 0 */
302 	__le32 pad0;
303 	/* from LSB: up:1 */
304 	u8 flags;
305 	u8 pad1[3];
306 	/* response word 1 */
307 	__le32 rate;
308 	__le32 pad2;
309 	/* response word 2 */
310 	__le64 options;
311 };
312 
313 struct dpni_cmd_set_max_frame_length {
314 	__le16 max_frame_length;
315 };
316 
317 struct dpni_rsp_get_max_frame_length {
318 	__le16 max_frame_length;
319 };
320 
321 struct dpni_cmd_set_multicast_promisc {
322 	u8 enable;
323 };
324 
325 struct dpni_rsp_get_multicast_promisc {
326 	u8 enabled;
327 };
328 
329 struct dpni_cmd_set_unicast_promisc {
330 	u8 enable;
331 };
332 
333 struct dpni_rsp_get_unicast_promisc {
334 	u8 enabled;
335 };
336 
337 struct dpni_cmd_set_primary_mac_addr {
338 	__le16 pad;
339 	u8 mac_addr[6];
340 };
341 
342 struct dpni_rsp_get_primary_mac_addr {
343 	__le16 pad;
344 	u8 mac_addr[6];
345 };
346 
347 struct dpni_rsp_get_port_mac_addr {
348 	__le16 pad;
349 	u8 mac_addr[6];
350 };
351 
352 struct dpni_cmd_add_mac_addr {
353 	__le16 pad;
354 	u8 mac_addr[6];
355 };
356 
357 struct dpni_cmd_remove_mac_addr {
358 	__le16 pad;
359 	u8 mac_addr[6];
360 };
361 
362 #define DPNI_UNICAST_FILTERS_SHIFT	0
363 #define DPNI_UNICAST_FILTERS_SIZE	1
364 #define DPNI_MULTICAST_FILTERS_SHIFT	1
365 #define DPNI_MULTICAST_FILTERS_SIZE	1
366 
367 struct dpni_cmd_clear_mac_filters {
368 	/* from LSB: unicast:1, multicast:1 */
369 	u8 flags;
370 };
371 
372 #define DPNI_DIST_MODE_SHIFT		0
373 #define DPNI_DIST_MODE_SIZE		4
374 #define DPNI_MISS_ACTION_SHIFT		4
375 #define DPNI_MISS_ACTION_SIZE		4
376 
377 struct dpni_cmd_set_rx_tc_dist {
378 	/* cmd word 0 */
379 	__le16 dist_size;
380 	u8 tc_id;
381 	/* from LSB: dist_mode:4, miss_action:4 */
382 	u8 flags;
383 	__le16 pad0;
384 	__le16 default_flow_id;
385 	/* cmd word 1..5 */
386 	__le64 pad1[5];
387 	/* cmd word 6 */
388 	__le64 key_cfg_iova;
389 };
390 
391 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
392  * key_cfg_iova)
393  */
394 struct dpni_mask_cfg {
395 	u8 mask;
396 	u8 offset;
397 };
398 
399 #define DPNI_EFH_TYPE_SHIFT		0
400 #define DPNI_EFH_TYPE_SIZE		4
401 #define DPNI_EXTRACT_TYPE_SHIFT		0
402 #define DPNI_EXTRACT_TYPE_SIZE		4
403 
404 struct dpni_dist_extract {
405 	/* word 0 */
406 	u8 prot;
407 	/* EFH type stored in the 4 least significant bits */
408 	u8 efh_type;
409 	u8 size;
410 	u8 offset;
411 	__le32 field;
412 	/* word 1 */
413 	u8 hdr_index;
414 	u8 constant;
415 	u8 num_of_repeats;
416 	u8 num_of_byte_masks;
417 	/* Extraction type is stored in the 4 LSBs */
418 	u8 extract_type;
419 	u8 pad[3];
420 	/* word 2 */
421 	struct dpni_mask_cfg masks[4];
422 };
423 
424 struct dpni_ext_set_rx_tc_dist {
425 	/* extension word 0 */
426 	u8 num_extracts;
427 	u8 pad[7];
428 	/* words 1..25 */
429 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
430 };
431 
432 struct dpni_cmd_get_queue {
433 	u8 qtype;
434 	u8 tc;
435 	u8 index;
436 };
437 
438 #define DPNI_DEST_TYPE_SHIFT		0
439 #define DPNI_DEST_TYPE_SIZE		4
440 #define DPNI_STASH_CTRL_SHIFT		6
441 #define DPNI_STASH_CTRL_SIZE		1
442 #define DPNI_HOLD_ACTIVE_SHIFT		7
443 #define DPNI_HOLD_ACTIVE_SIZE		1
444 
445 struct dpni_rsp_get_queue {
446 	/* response word 0 */
447 	__le64 pad0;
448 	/* response word 1 */
449 	__le32 dest_id;
450 	__le16 pad1;
451 	u8 dest_prio;
452 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
453 	u8 flags;
454 	/* response word 2 */
455 	__le64 flc;
456 	/* response word 3 */
457 	__le64 user_context;
458 	/* response word 4 */
459 	__le32 fqid;
460 	__le16 qdbin;
461 };
462 
463 struct dpni_cmd_set_queue {
464 	/* cmd word 0 */
465 	u8 qtype;
466 	u8 tc;
467 	u8 index;
468 	u8 options;
469 	__le32 pad0;
470 	/* cmd word 1 */
471 	__le32 dest_id;
472 	__le16 pad1;
473 	u8 dest_prio;
474 	u8 flags;
475 	/* cmd word 2 */
476 	__le64 flc;
477 	/* cmd word 3 */
478 	__le64 user_context;
479 };
480 
481 struct dpni_cmd_set_taildrop {
482 	/* cmd word 0 */
483 	u8 congestion_point;
484 	u8 qtype;
485 	u8 tc;
486 	u8 index;
487 	__le32 pad0;
488 	/* cmd word 1 */
489 	/* Only least significant bit is relevant */
490 	u8 enable;
491 	u8 pad1;
492 	u8 units;
493 	u8 pad2;
494 	__le32 threshold;
495 };
496 
497 struct dpni_cmd_get_taildrop {
498 	u8 congestion_point;
499 	u8 qtype;
500 	u8 tc;
501 	u8 index;
502 };
503 
504 struct dpni_rsp_get_taildrop {
505 	/* cmd word 0 */
506 	__le64 pad0;
507 	/* cmd word 1 */
508 	/* only least significant bit is relevant */
509 	u8 enable;
510 	u8 pad1;
511 	u8 units;
512 	u8 pad2;
513 	__le32 threshold;
514 };
515 
516 struct dpni_rsp_get_api_version {
517 	__le16 major;
518 	__le16 minor;
519 };
520 
521 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
522 #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
523 struct dpni_cmd_set_rx_fs_dist {
524 	__le16 dist_size;
525 	u8 enable;
526 	u8 tc;
527 	__le16 miss_flow_id;
528 	__le16 pad;
529 	__le64 key_cfg_iova;
530 };
531 
532 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
533 #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
534 struct dpni_cmd_set_rx_hash_dist {
535 	__le16 dist_size;
536 	u8 enable;
537 	u8 tc;
538 	__le32 pad;
539 	__le64 key_cfg_iova;
540 };
541 
542 struct dpni_cmd_add_fs_entry {
543 	/* cmd word 0 */
544 	__le16 options;
545 	u8 tc_id;
546 	u8 key_size;
547 	__le16 index;
548 	__le16 flow_id;
549 	/* cmd word 1 */
550 	__le64 key_iova;
551 	/* cmd word 2 */
552 	__le64 mask_iova;
553 	/* cmd word 3 */
554 	__le64 flc;
555 };
556 
557 struct dpni_cmd_remove_fs_entry {
558 	/* cmd word 0 */
559 	__le16 pad0;
560 	u8 tc_id;
561 	u8 key_size;
562 	__le32 pad1;
563 	/* cmd word 1 */
564 	__le64 key_iova;
565 	/* cmd word 2 */
566 	__le64 mask_iova;
567 };
568 
569 #endif /* _FSL_DPNI_CMD_H */
570