1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  */
5 #ifndef _FSL_DPNI_CMD_H
6 #define _FSL_DPNI_CMD_H
7 
8 #include "dpni.h"
9 
10 /* DPNI Version */
11 #define DPNI_VER_MAJOR				7
12 #define DPNI_VER_MINOR				0
13 #define DPNI_CMD_BASE_VERSION			1
14 #define DPNI_CMD_ID_OFFSET			4
15 
16 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
17 
18 #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
19 #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
20 #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
21 #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
22 #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
23 
24 #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
25 #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
26 #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
27 #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
28 #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
29 
30 #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
31 #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
32 #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
33 #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
34 #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
35 #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
36 #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
37 #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
38 
39 #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
40 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
41 
42 #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
43 #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
44 #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
45 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
46 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
47 #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
48 #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD(0x21B)
49 
50 #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
51 #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
52 #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
53 #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
54 #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
55 #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
56 #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
57 #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
58 #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
59 
60 #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
61 
62 #define DPNI_CMDID_SET_QOS_TBL				DPNI_CMD(0x240)
63 #define DPNI_CMDID_ADD_QOS_ENT				DPNI_CMD(0x241)
64 #define DPNI_CMDID_REMOVE_QOS_ENT			DPNI_CMD(0x242)
65 #define DPNI_CMDID_CLR_QOS_TBL				DPNI_CMD(0x243)
66 #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
67 #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
68 #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
69 
70 #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
71 #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
72 #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
73 #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
74 #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
75 
76 #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
77 
78 #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
79 #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
80 
81 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
82 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
83 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
84 #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
85 #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
86 #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
87 #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
88 
89 #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
90 #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
91 #define DPNI_CMDID_GET_LINK_CFG				DPNI_CMD(0x278)
92 
93 /* Macros for accessing command fields smaller than 1byte */
94 #define DPNI_MASK(field)	\
95 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
96 		DPNI_##field##_SHIFT)
97 
98 #define dpni_set_field(var, field, val)	\
99 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
100 #define dpni_get_field(var, field)	\
101 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
102 
103 struct dpni_cmd_open {
104 	__le32 dpni_id;
105 };
106 
107 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
108 struct dpni_cmd_set_pools {
109 	/* cmd word 0 */
110 	u8 num_dpbp;
111 	u8 backup_pool_mask;
112 	__le16 pad;
113 	/* cmd word 0..4 */
114 	__le32 dpbp_id[DPNI_MAX_DPBP];
115 	/* cmd word 4..6 */
116 	__le16 buffer_size[DPNI_MAX_DPBP];
117 };
118 
119 /* The enable indication is always the least significant bit */
120 #define DPNI_ENABLE_SHIFT		0
121 #define DPNI_ENABLE_SIZE		1
122 
123 struct dpni_rsp_is_enabled {
124 	u8 enabled;
125 };
126 
127 struct dpni_rsp_get_irq {
128 	/* response word 0 */
129 	__le32 irq_val;
130 	__le32 pad;
131 	/* response word 1 */
132 	__le64 irq_addr;
133 	/* response word 2 */
134 	__le32 irq_num;
135 	__le32 type;
136 };
137 
138 struct dpni_cmd_set_irq_enable {
139 	u8 enable;
140 	u8 pad[3];
141 	u8 irq_index;
142 };
143 
144 struct dpni_cmd_get_irq_enable {
145 	__le32 pad;
146 	u8 irq_index;
147 };
148 
149 struct dpni_rsp_get_irq_enable {
150 	u8 enabled;
151 };
152 
153 struct dpni_cmd_set_irq_mask {
154 	__le32 mask;
155 	u8 irq_index;
156 };
157 
158 struct dpni_cmd_get_irq_mask {
159 	__le32 pad;
160 	u8 irq_index;
161 };
162 
163 struct dpni_rsp_get_irq_mask {
164 	__le32 mask;
165 };
166 
167 struct dpni_cmd_get_irq_status {
168 	__le32 status;
169 	u8 irq_index;
170 };
171 
172 struct dpni_rsp_get_irq_status {
173 	__le32 status;
174 };
175 
176 struct dpni_cmd_clear_irq_status {
177 	__le32 status;
178 	u8 irq_index;
179 };
180 
181 struct dpni_rsp_get_attr {
182 	/* response word 0 */
183 	__le32 options;
184 	u8 num_queues;
185 	u8 num_tcs;
186 	u8 mac_filter_entries;
187 	u8 pad0;
188 	/* response word 1 */
189 	u8 vlan_filter_entries;
190 	u8 pad1;
191 	u8 qos_entries;
192 	u8 pad2;
193 	__le16 fs_entries;
194 	__le16 pad3;
195 	/* response word 2 */
196 	u8 qos_key_size;
197 	u8 fs_key_size;
198 	__le16 wriop_version;
199 };
200 
201 #define DPNI_ERROR_ACTION_SHIFT		0
202 #define DPNI_ERROR_ACTION_SIZE		4
203 #define DPNI_FRAME_ANN_SHIFT		4
204 #define DPNI_FRAME_ANN_SIZE		1
205 
206 struct dpni_cmd_set_errors_behavior {
207 	__le32 errors;
208 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
209 	u8 flags;
210 };
211 
212 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
213  * buffer layouts, but they all share the same parameters.
214  * If one of the functions changes, below structure needs to be split.
215  */
216 
217 #define DPNI_PASS_TS_SHIFT		0
218 #define DPNI_PASS_TS_SIZE		1
219 #define DPNI_PASS_PR_SHIFT		1
220 #define DPNI_PASS_PR_SIZE		1
221 #define DPNI_PASS_FS_SHIFT		2
222 #define DPNI_PASS_FS_SIZE		1
223 
224 struct dpni_cmd_get_buffer_layout {
225 	u8 qtype;
226 };
227 
228 struct dpni_rsp_get_buffer_layout {
229 	/* response word 0 */
230 	u8 pad0[6];
231 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
232 	u8 flags;
233 	u8 pad1;
234 	/* response word 1 */
235 	__le16 private_data_size;
236 	__le16 data_align;
237 	__le16 head_room;
238 	__le16 tail_room;
239 };
240 
241 struct dpni_cmd_set_buffer_layout {
242 	/* cmd word 0 */
243 	u8 qtype;
244 	u8 pad0[3];
245 	__le16 options;
246 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
247 	u8 flags;
248 	u8 pad1;
249 	/* cmd word 1 */
250 	__le16 private_data_size;
251 	__le16 data_align;
252 	__le16 head_room;
253 	__le16 tail_room;
254 };
255 
256 struct dpni_cmd_set_offload {
257 	u8 pad[3];
258 	u8 dpni_offload;
259 	__le32 config;
260 };
261 
262 struct dpni_cmd_get_offload {
263 	u8 pad[3];
264 	u8 dpni_offload;
265 };
266 
267 struct dpni_rsp_get_offload {
268 	__le32 pad;
269 	__le32 config;
270 };
271 
272 struct dpni_cmd_get_qdid {
273 	u8 qtype;
274 };
275 
276 struct dpni_rsp_get_qdid {
277 	__le16 qdid;
278 };
279 
280 struct dpni_rsp_get_tx_data_offset {
281 	__le16 data_offset;
282 };
283 
284 struct dpni_cmd_get_statistics {
285 	u8 page_number;
286 };
287 
288 struct dpni_rsp_get_statistics {
289 	__le64 counter[DPNI_STATISTICS_CNT];
290 };
291 
292 struct dpni_cmd_link_cfg {
293 	/* cmd word 0 */
294 	__le64 pad0;
295 	/* cmd word 1 */
296 	__le32 rate;
297 	__le32 pad1;
298 	/* cmd word 2 */
299 	__le64 options;
300 };
301 
302 #define DPNI_LINK_STATE_SHIFT		0
303 #define DPNI_LINK_STATE_SIZE		1
304 
305 struct dpni_rsp_get_link_state {
306 	/* response word 0 */
307 	__le32 pad0;
308 	/* from LSB: up:1 */
309 	u8 flags;
310 	u8 pad1[3];
311 	/* response word 1 */
312 	__le32 rate;
313 	__le32 pad2;
314 	/* response word 2 */
315 	__le64 options;
316 };
317 
318 struct dpni_cmd_set_max_frame_length {
319 	__le16 max_frame_length;
320 };
321 
322 struct dpni_rsp_get_max_frame_length {
323 	__le16 max_frame_length;
324 };
325 
326 struct dpni_cmd_set_multicast_promisc {
327 	u8 enable;
328 };
329 
330 struct dpni_rsp_get_multicast_promisc {
331 	u8 enabled;
332 };
333 
334 struct dpni_cmd_set_unicast_promisc {
335 	u8 enable;
336 };
337 
338 struct dpni_rsp_get_unicast_promisc {
339 	u8 enabled;
340 };
341 
342 struct dpni_cmd_set_primary_mac_addr {
343 	__le16 pad;
344 	u8 mac_addr[6];
345 };
346 
347 struct dpni_rsp_get_primary_mac_addr {
348 	__le16 pad;
349 	u8 mac_addr[6];
350 };
351 
352 struct dpni_rsp_get_port_mac_addr {
353 	__le16 pad;
354 	u8 mac_addr[6];
355 };
356 
357 struct dpni_cmd_add_mac_addr {
358 	__le16 pad;
359 	u8 mac_addr[6];
360 };
361 
362 struct dpni_cmd_remove_mac_addr {
363 	__le16 pad;
364 	u8 mac_addr[6];
365 };
366 
367 #define DPNI_UNICAST_FILTERS_SHIFT	0
368 #define DPNI_UNICAST_FILTERS_SIZE	1
369 #define DPNI_MULTICAST_FILTERS_SHIFT	1
370 #define DPNI_MULTICAST_FILTERS_SIZE	1
371 
372 struct dpni_cmd_clear_mac_filters {
373 	/* from LSB: unicast:1, multicast:1 */
374 	u8 flags;
375 };
376 
377 #define DPNI_DIST_MODE_SHIFT		0
378 #define DPNI_DIST_MODE_SIZE		4
379 #define DPNI_MISS_ACTION_SHIFT		4
380 #define DPNI_MISS_ACTION_SIZE		4
381 
382 struct dpni_cmd_set_rx_tc_dist {
383 	/* cmd word 0 */
384 	__le16 dist_size;
385 	u8 tc_id;
386 	/* from LSB: dist_mode:4, miss_action:4 */
387 	u8 flags;
388 	__le16 pad0;
389 	__le16 default_flow_id;
390 	/* cmd word 1..5 */
391 	__le64 pad1[5];
392 	/* cmd word 6 */
393 	__le64 key_cfg_iova;
394 };
395 
396 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
397  * key_cfg_iova)
398  */
399 struct dpni_mask_cfg {
400 	u8 mask;
401 	u8 offset;
402 };
403 
404 #define DPNI_EFH_TYPE_SHIFT		0
405 #define DPNI_EFH_TYPE_SIZE		4
406 #define DPNI_EXTRACT_TYPE_SHIFT		0
407 #define DPNI_EXTRACT_TYPE_SIZE		4
408 
409 struct dpni_dist_extract {
410 	/* word 0 */
411 	u8 prot;
412 	/* EFH type stored in the 4 least significant bits */
413 	u8 efh_type;
414 	u8 size;
415 	u8 offset;
416 	__le32 field;
417 	/* word 1 */
418 	u8 hdr_index;
419 	u8 constant;
420 	u8 num_of_repeats;
421 	u8 num_of_byte_masks;
422 	/* Extraction type is stored in the 4 LSBs */
423 	u8 extract_type;
424 	u8 pad[3];
425 	/* word 2 */
426 	struct dpni_mask_cfg masks[4];
427 };
428 
429 struct dpni_ext_set_rx_tc_dist {
430 	/* extension word 0 */
431 	u8 num_extracts;
432 	u8 pad[7];
433 	/* words 1..25 */
434 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
435 };
436 
437 struct dpni_cmd_get_queue {
438 	u8 qtype;
439 	u8 tc;
440 	u8 index;
441 };
442 
443 #define DPNI_DEST_TYPE_SHIFT		0
444 #define DPNI_DEST_TYPE_SIZE		4
445 #define DPNI_STASH_CTRL_SHIFT		6
446 #define DPNI_STASH_CTRL_SIZE		1
447 #define DPNI_HOLD_ACTIVE_SHIFT		7
448 #define DPNI_HOLD_ACTIVE_SIZE		1
449 
450 struct dpni_rsp_get_queue {
451 	/* response word 0 */
452 	__le64 pad0;
453 	/* response word 1 */
454 	__le32 dest_id;
455 	__le16 pad1;
456 	u8 dest_prio;
457 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
458 	u8 flags;
459 	/* response word 2 */
460 	__le64 flc;
461 	/* response word 3 */
462 	__le64 user_context;
463 	/* response word 4 */
464 	__le32 fqid;
465 	__le16 qdbin;
466 };
467 
468 struct dpni_cmd_set_queue {
469 	/* cmd word 0 */
470 	u8 qtype;
471 	u8 tc;
472 	u8 index;
473 	u8 options;
474 	__le32 pad0;
475 	/* cmd word 1 */
476 	__le32 dest_id;
477 	__le16 pad1;
478 	u8 dest_prio;
479 	u8 flags;
480 	/* cmd word 2 */
481 	__le64 flc;
482 	/* cmd word 3 */
483 	__le64 user_context;
484 };
485 
486 struct dpni_cmd_set_taildrop {
487 	/* cmd word 0 */
488 	u8 congestion_point;
489 	u8 qtype;
490 	u8 tc;
491 	u8 index;
492 	__le32 pad0;
493 	/* cmd word 1 */
494 	/* Only least significant bit is relevant */
495 	u8 enable;
496 	u8 pad1;
497 	u8 units;
498 	u8 pad2;
499 	__le32 threshold;
500 };
501 
502 struct dpni_cmd_get_taildrop {
503 	u8 congestion_point;
504 	u8 qtype;
505 	u8 tc;
506 	u8 index;
507 };
508 
509 struct dpni_rsp_get_taildrop {
510 	/* cmd word 0 */
511 	__le64 pad0;
512 	/* cmd word 1 */
513 	/* only least significant bit is relevant */
514 	u8 enable;
515 	u8 pad1;
516 	u8 units;
517 	u8 pad2;
518 	__le32 threshold;
519 };
520 
521 struct dpni_rsp_get_api_version {
522 	__le16 major;
523 	__le16 minor;
524 };
525 
526 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
527 #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
528 struct dpni_cmd_set_rx_fs_dist {
529 	__le16 dist_size;
530 	u8 enable;
531 	u8 tc;
532 	__le16 miss_flow_id;
533 	__le16 pad;
534 	__le64 key_cfg_iova;
535 };
536 
537 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
538 #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
539 struct dpni_cmd_set_rx_hash_dist {
540 	__le16 dist_size;
541 	u8 enable;
542 	u8 tc;
543 	__le32 pad;
544 	__le64 key_cfg_iova;
545 };
546 
547 struct dpni_cmd_add_fs_entry {
548 	/* cmd word 0 */
549 	__le16 options;
550 	u8 tc_id;
551 	u8 key_size;
552 	__le16 index;
553 	__le16 flow_id;
554 	/* cmd word 1 */
555 	__le64 key_iova;
556 	/* cmd word 2 */
557 	__le64 mask_iova;
558 	/* cmd word 3 */
559 	__le64 flc;
560 };
561 
562 struct dpni_cmd_remove_fs_entry {
563 	/* cmd word 0 */
564 	__le16 pad0;
565 	u8 tc_id;
566 	u8 key_size;
567 	__le32 pad1;
568 	/* cmd word 1 */
569 	__le64 key_iova;
570 	/* cmd word 2 */
571 	__le64 mask_iova;
572 };
573 
574 #define DPNI_DISCARD_ON_MISS_SHIFT	0
575 #define DPNI_DISCARD_ON_MISS_SIZE	1
576 
577 struct dpni_cmd_set_qos_table {
578 	__le32 pad;
579 	u8 default_tc;
580 	/* only the LSB */
581 	u8 discard_on_miss;
582 	__le16 pad1[21];
583 	__le64 key_cfg_iova;
584 };
585 
586 struct dpni_cmd_add_qos_entry {
587 	__le16 pad;
588 	u8 tc_id;
589 	u8 key_size;
590 	__le16 index;
591 	__le16 pad1;
592 	__le64 key_iova;
593 	__le64 mask_iova;
594 };
595 
596 struct dpni_cmd_remove_qos_entry {
597 	u8 pad[3];
598 	u8 key_size;
599 	__le32 pad1;
600 	__le64 key_iova;
601 	__le64 mask_iova;
602 };
603 
604 #define DPNI_DEST_TYPE_SHIFT		0
605 #define DPNI_DEST_TYPE_SIZE		4
606 #define DPNI_CONG_UNITS_SHIFT		4
607 #define DPNI_CONG_UNITS_SIZE		2
608 
609 struct dpni_cmd_set_congestion_notification {
610 	/* cmd word 0 */
611 	u8 qtype;
612 	u8 tc;
613 	u8 pad[6];
614 	/* cmd word 1 */
615 	__le32 dest_id;
616 	__le16 notification_mode;
617 	u8 dest_priority;
618 	/* from LSB: dest_type: 4 units:2 */
619 	u8 type_units;
620 	/* cmd word 2 */
621 	__le64 message_iova;
622 	/* cmd word 3 */
623 	__le64 message_ctx;
624 	/* cmd word 4 */
625 	__le32 threshold_entry;
626 	__le32 threshold_exit;
627 };
628 
629 #define DPNI_COUPLED_SHIFT	0
630 #define DPNI_COUPLED_SIZE	1
631 
632 struct dpni_cmd_set_tx_shaping {
633 	__le16 tx_cr_max_burst_size;
634 	__le16 tx_er_max_burst_size;
635 	__le32 pad;
636 	__le32 tx_cr_rate_limit;
637 	__le32 tx_er_rate_limit;
638 	/* from LSB: coupled:1 */
639 	u8 coupled;
640 };
641 
642 #endif /* _FSL_DPNI_CMD_H */
643