1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  * Copyright 2020 NXP
5  */
6 #ifndef _FSL_DPNI_CMD_H
7 #define _FSL_DPNI_CMD_H
8 
9 #include "dpni.h"
10 
11 /* DPNI Version */
12 #define DPNI_VER_MAJOR				7
13 #define DPNI_VER_MINOR				0
14 #define DPNI_CMD_BASE_VERSION			1
15 #define DPNI_CMD_ID_OFFSET			4
16 
17 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
18 
19 #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
20 #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
21 #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
22 #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
23 #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
24 
25 #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
26 #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
27 #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
28 #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
29 #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
30 
31 #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
32 #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
33 #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
34 #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
35 #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
36 #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
37 #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
38 #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
39 
40 #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
41 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
42 
43 #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
44 #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
45 #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
46 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
47 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
48 #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
49 #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD(0x21B)
50 
51 #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
52 #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
53 #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
54 #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
55 #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
56 #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
57 #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
58 #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
59 #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
60 
61 #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
62 
63 #define DPNI_CMDID_SET_QOS_TBL				DPNI_CMD(0x240)
64 #define DPNI_CMDID_ADD_QOS_ENT				DPNI_CMD(0x241)
65 #define DPNI_CMDID_REMOVE_QOS_ENT			DPNI_CMD(0x242)
66 #define DPNI_CMDID_CLR_QOS_TBL				DPNI_CMD(0x243)
67 #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
68 #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
69 #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
70 
71 #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
72 #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
73 #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
74 #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
75 #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
76 
77 #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
78 
79 #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
80 #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
81 
82 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
83 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
84 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
85 #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
86 #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
87 #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
88 #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
89 
90 #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
91 #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
92 #define DPNI_CMDID_GET_LINK_CFG				DPNI_CMD(0x278)
93 
94 #define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
95 #define DPNI_CMDID_GET_SINGLE_STEP_CFG			DPNI_CMD(0x27a)
96 
97 /* Macros for accessing command fields smaller than 1byte */
98 #define DPNI_MASK(field)	\
99 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
100 		DPNI_##field##_SHIFT)
101 
102 #define dpni_set_field(var, field, val)	\
103 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
104 #define dpni_get_field(var, field)	\
105 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
106 
107 struct dpni_cmd_open {
108 	__le32 dpni_id;
109 };
110 
111 #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
112 struct dpni_cmd_set_pools {
113 	/* cmd word 0 */
114 	u8 num_dpbp;
115 	u8 backup_pool_mask;
116 	__le16 pad;
117 	/* cmd word 0..4 */
118 	__le32 dpbp_id[DPNI_MAX_DPBP];
119 	/* cmd word 4..6 */
120 	__le16 buffer_size[DPNI_MAX_DPBP];
121 };
122 
123 /* The enable indication is always the least significant bit */
124 #define DPNI_ENABLE_SHIFT		0
125 #define DPNI_ENABLE_SIZE		1
126 
127 struct dpni_rsp_is_enabled {
128 	u8 enabled;
129 };
130 
131 struct dpni_rsp_get_irq {
132 	/* response word 0 */
133 	__le32 irq_val;
134 	__le32 pad;
135 	/* response word 1 */
136 	__le64 irq_addr;
137 	/* response word 2 */
138 	__le32 irq_num;
139 	__le32 type;
140 };
141 
142 struct dpni_cmd_set_irq_enable {
143 	u8 enable;
144 	u8 pad[3];
145 	u8 irq_index;
146 };
147 
148 struct dpni_cmd_get_irq_enable {
149 	__le32 pad;
150 	u8 irq_index;
151 };
152 
153 struct dpni_rsp_get_irq_enable {
154 	u8 enabled;
155 };
156 
157 struct dpni_cmd_set_irq_mask {
158 	__le32 mask;
159 	u8 irq_index;
160 };
161 
162 struct dpni_cmd_get_irq_mask {
163 	__le32 pad;
164 	u8 irq_index;
165 };
166 
167 struct dpni_rsp_get_irq_mask {
168 	__le32 mask;
169 };
170 
171 struct dpni_cmd_get_irq_status {
172 	__le32 status;
173 	u8 irq_index;
174 };
175 
176 struct dpni_rsp_get_irq_status {
177 	__le32 status;
178 };
179 
180 struct dpni_cmd_clear_irq_status {
181 	__le32 status;
182 	u8 irq_index;
183 };
184 
185 struct dpni_rsp_get_attr {
186 	/* response word 0 */
187 	__le32 options;
188 	u8 num_queues;
189 	u8 num_tcs;
190 	u8 mac_filter_entries;
191 	u8 pad0;
192 	/* response word 1 */
193 	u8 vlan_filter_entries;
194 	u8 pad1;
195 	u8 qos_entries;
196 	u8 pad2;
197 	__le16 fs_entries;
198 	__le16 pad3;
199 	/* response word 2 */
200 	u8 qos_key_size;
201 	u8 fs_key_size;
202 	__le16 wriop_version;
203 };
204 
205 #define DPNI_ERROR_ACTION_SHIFT		0
206 #define DPNI_ERROR_ACTION_SIZE		4
207 #define DPNI_FRAME_ANN_SHIFT		4
208 #define DPNI_FRAME_ANN_SIZE		1
209 
210 struct dpni_cmd_set_errors_behavior {
211 	__le32 errors;
212 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
213 	u8 flags;
214 };
215 
216 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
217  * buffer layouts, but they all share the same parameters.
218  * If one of the functions changes, below structure needs to be split.
219  */
220 
221 #define DPNI_PASS_TS_SHIFT		0
222 #define DPNI_PASS_TS_SIZE		1
223 #define DPNI_PASS_PR_SHIFT		1
224 #define DPNI_PASS_PR_SIZE		1
225 #define DPNI_PASS_FS_SHIFT		2
226 #define DPNI_PASS_FS_SIZE		1
227 
228 struct dpni_cmd_get_buffer_layout {
229 	u8 qtype;
230 };
231 
232 struct dpni_rsp_get_buffer_layout {
233 	/* response word 0 */
234 	u8 pad0[6];
235 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
236 	u8 flags;
237 	u8 pad1;
238 	/* response word 1 */
239 	__le16 private_data_size;
240 	__le16 data_align;
241 	__le16 head_room;
242 	__le16 tail_room;
243 };
244 
245 struct dpni_cmd_set_buffer_layout {
246 	/* cmd word 0 */
247 	u8 qtype;
248 	u8 pad0[3];
249 	__le16 options;
250 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
251 	u8 flags;
252 	u8 pad1;
253 	/* cmd word 1 */
254 	__le16 private_data_size;
255 	__le16 data_align;
256 	__le16 head_room;
257 	__le16 tail_room;
258 };
259 
260 struct dpni_cmd_set_offload {
261 	u8 pad[3];
262 	u8 dpni_offload;
263 	__le32 config;
264 };
265 
266 struct dpni_cmd_get_offload {
267 	u8 pad[3];
268 	u8 dpni_offload;
269 };
270 
271 struct dpni_rsp_get_offload {
272 	__le32 pad;
273 	__le32 config;
274 };
275 
276 struct dpni_cmd_get_qdid {
277 	u8 qtype;
278 };
279 
280 struct dpni_rsp_get_qdid {
281 	__le16 qdid;
282 };
283 
284 struct dpni_rsp_get_tx_data_offset {
285 	__le16 data_offset;
286 };
287 
288 struct dpni_cmd_get_statistics {
289 	u8 page_number;
290 };
291 
292 struct dpni_rsp_get_statistics {
293 	__le64 counter[DPNI_STATISTICS_CNT];
294 };
295 
296 struct dpni_cmd_link_cfg {
297 	/* cmd word 0 */
298 	__le64 pad0;
299 	/* cmd word 1 */
300 	__le32 rate;
301 	__le32 pad1;
302 	/* cmd word 2 */
303 	__le64 options;
304 };
305 
306 #define DPNI_LINK_STATE_SHIFT		0
307 #define DPNI_LINK_STATE_SIZE		1
308 
309 struct dpni_rsp_get_link_state {
310 	/* response word 0 */
311 	__le32 pad0;
312 	/* from LSB: up:1 */
313 	u8 flags;
314 	u8 pad1[3];
315 	/* response word 1 */
316 	__le32 rate;
317 	__le32 pad2;
318 	/* response word 2 */
319 	__le64 options;
320 };
321 
322 struct dpni_cmd_set_max_frame_length {
323 	__le16 max_frame_length;
324 };
325 
326 struct dpni_rsp_get_max_frame_length {
327 	__le16 max_frame_length;
328 };
329 
330 struct dpni_cmd_set_multicast_promisc {
331 	u8 enable;
332 };
333 
334 struct dpni_rsp_get_multicast_promisc {
335 	u8 enabled;
336 };
337 
338 struct dpni_cmd_set_unicast_promisc {
339 	u8 enable;
340 };
341 
342 struct dpni_rsp_get_unicast_promisc {
343 	u8 enabled;
344 };
345 
346 struct dpni_cmd_set_primary_mac_addr {
347 	__le16 pad;
348 	u8 mac_addr[6];
349 };
350 
351 struct dpni_rsp_get_primary_mac_addr {
352 	__le16 pad;
353 	u8 mac_addr[6];
354 };
355 
356 struct dpni_rsp_get_port_mac_addr {
357 	__le16 pad;
358 	u8 mac_addr[6];
359 };
360 
361 struct dpni_cmd_add_mac_addr {
362 	__le16 pad;
363 	u8 mac_addr[6];
364 };
365 
366 struct dpni_cmd_remove_mac_addr {
367 	__le16 pad;
368 	u8 mac_addr[6];
369 };
370 
371 #define DPNI_UNICAST_FILTERS_SHIFT	0
372 #define DPNI_UNICAST_FILTERS_SIZE	1
373 #define DPNI_MULTICAST_FILTERS_SHIFT	1
374 #define DPNI_MULTICAST_FILTERS_SIZE	1
375 
376 struct dpni_cmd_clear_mac_filters {
377 	/* from LSB: unicast:1, multicast:1 */
378 	u8 flags;
379 };
380 
381 #define DPNI_DIST_MODE_SHIFT		0
382 #define DPNI_DIST_MODE_SIZE		4
383 #define DPNI_MISS_ACTION_SHIFT		4
384 #define DPNI_MISS_ACTION_SIZE		4
385 
386 struct dpni_cmd_set_rx_tc_dist {
387 	/* cmd word 0 */
388 	__le16 dist_size;
389 	u8 tc_id;
390 	/* from LSB: dist_mode:4, miss_action:4 */
391 	u8 flags;
392 	__le16 pad0;
393 	__le16 default_flow_id;
394 	/* cmd word 1..5 */
395 	__le64 pad1[5];
396 	/* cmd word 6 */
397 	__le64 key_cfg_iova;
398 };
399 
400 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
401  * key_cfg_iova)
402  */
403 struct dpni_mask_cfg {
404 	u8 mask;
405 	u8 offset;
406 };
407 
408 #define DPNI_EFH_TYPE_SHIFT		0
409 #define DPNI_EFH_TYPE_SIZE		4
410 #define DPNI_EXTRACT_TYPE_SHIFT		0
411 #define DPNI_EXTRACT_TYPE_SIZE		4
412 
413 struct dpni_dist_extract {
414 	/* word 0 */
415 	u8 prot;
416 	/* EFH type stored in the 4 least significant bits */
417 	u8 efh_type;
418 	u8 size;
419 	u8 offset;
420 	__le32 field;
421 	/* word 1 */
422 	u8 hdr_index;
423 	u8 constant;
424 	u8 num_of_repeats;
425 	u8 num_of_byte_masks;
426 	/* Extraction type is stored in the 4 LSBs */
427 	u8 extract_type;
428 	u8 pad[3];
429 	/* word 2 */
430 	struct dpni_mask_cfg masks[4];
431 };
432 
433 struct dpni_ext_set_rx_tc_dist {
434 	/* extension word 0 */
435 	u8 num_extracts;
436 	u8 pad[7];
437 	/* words 1..25 */
438 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
439 };
440 
441 struct dpni_cmd_get_queue {
442 	u8 qtype;
443 	u8 tc;
444 	u8 index;
445 };
446 
447 #define DPNI_DEST_TYPE_SHIFT		0
448 #define DPNI_DEST_TYPE_SIZE		4
449 #define DPNI_STASH_CTRL_SHIFT		6
450 #define DPNI_STASH_CTRL_SIZE		1
451 #define DPNI_HOLD_ACTIVE_SHIFT		7
452 #define DPNI_HOLD_ACTIVE_SIZE		1
453 
454 struct dpni_rsp_get_queue {
455 	/* response word 0 */
456 	__le64 pad0;
457 	/* response word 1 */
458 	__le32 dest_id;
459 	__le16 pad1;
460 	u8 dest_prio;
461 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
462 	u8 flags;
463 	/* response word 2 */
464 	__le64 flc;
465 	/* response word 3 */
466 	__le64 user_context;
467 	/* response word 4 */
468 	__le32 fqid;
469 	__le16 qdbin;
470 };
471 
472 struct dpni_cmd_set_queue {
473 	/* cmd word 0 */
474 	u8 qtype;
475 	u8 tc;
476 	u8 index;
477 	u8 options;
478 	__le32 pad0;
479 	/* cmd word 1 */
480 	__le32 dest_id;
481 	__le16 pad1;
482 	u8 dest_prio;
483 	u8 flags;
484 	/* cmd word 2 */
485 	__le64 flc;
486 	/* cmd word 3 */
487 	__le64 user_context;
488 };
489 
490 struct dpni_cmd_set_taildrop {
491 	/* cmd word 0 */
492 	u8 congestion_point;
493 	u8 qtype;
494 	u8 tc;
495 	u8 index;
496 	__le32 pad0;
497 	/* cmd word 1 */
498 	/* Only least significant bit is relevant */
499 	u8 enable;
500 	u8 pad1;
501 	u8 units;
502 	u8 pad2;
503 	__le32 threshold;
504 };
505 
506 struct dpni_cmd_get_taildrop {
507 	u8 congestion_point;
508 	u8 qtype;
509 	u8 tc;
510 	u8 index;
511 };
512 
513 struct dpni_rsp_get_taildrop {
514 	/* cmd word 0 */
515 	__le64 pad0;
516 	/* cmd word 1 */
517 	/* only least significant bit is relevant */
518 	u8 enable;
519 	u8 pad1;
520 	u8 units;
521 	u8 pad2;
522 	__le32 threshold;
523 };
524 
525 struct dpni_rsp_get_api_version {
526 	__le16 major;
527 	__le16 minor;
528 };
529 
530 #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
531 #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
532 struct dpni_cmd_set_rx_fs_dist {
533 	__le16 dist_size;
534 	u8 enable;
535 	u8 tc;
536 	__le16 miss_flow_id;
537 	__le16 pad;
538 	__le64 key_cfg_iova;
539 };
540 
541 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
542 #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
543 struct dpni_cmd_set_rx_hash_dist {
544 	__le16 dist_size;
545 	u8 enable;
546 	u8 tc;
547 	__le32 pad;
548 	__le64 key_cfg_iova;
549 };
550 
551 struct dpni_cmd_add_fs_entry {
552 	/* cmd word 0 */
553 	__le16 options;
554 	u8 tc_id;
555 	u8 key_size;
556 	__le16 index;
557 	__le16 flow_id;
558 	/* cmd word 1 */
559 	__le64 key_iova;
560 	/* cmd word 2 */
561 	__le64 mask_iova;
562 	/* cmd word 3 */
563 	__le64 flc;
564 };
565 
566 struct dpni_cmd_remove_fs_entry {
567 	/* cmd word 0 */
568 	__le16 pad0;
569 	u8 tc_id;
570 	u8 key_size;
571 	__le32 pad1;
572 	/* cmd word 1 */
573 	__le64 key_iova;
574 	/* cmd word 2 */
575 	__le64 mask_iova;
576 };
577 
578 #define DPNI_DISCARD_ON_MISS_SHIFT	0
579 #define DPNI_DISCARD_ON_MISS_SIZE	1
580 
581 struct dpni_cmd_set_qos_table {
582 	__le32 pad;
583 	u8 default_tc;
584 	/* only the LSB */
585 	u8 discard_on_miss;
586 	__le16 pad1[21];
587 	__le64 key_cfg_iova;
588 };
589 
590 struct dpni_cmd_add_qos_entry {
591 	__le16 pad;
592 	u8 tc_id;
593 	u8 key_size;
594 	__le16 index;
595 	__le16 pad1;
596 	__le64 key_iova;
597 	__le64 mask_iova;
598 };
599 
600 struct dpni_cmd_remove_qos_entry {
601 	u8 pad[3];
602 	u8 key_size;
603 	__le32 pad1;
604 	__le64 key_iova;
605 	__le64 mask_iova;
606 };
607 
608 #define DPNI_DEST_TYPE_SHIFT		0
609 #define DPNI_DEST_TYPE_SIZE		4
610 #define DPNI_CONG_UNITS_SHIFT		4
611 #define DPNI_CONG_UNITS_SIZE		2
612 
613 struct dpni_cmd_set_congestion_notification {
614 	/* cmd word 0 */
615 	u8 qtype;
616 	u8 tc;
617 	u8 pad[6];
618 	/* cmd word 1 */
619 	__le32 dest_id;
620 	__le16 notification_mode;
621 	u8 dest_priority;
622 	/* from LSB: dest_type: 4 units:2 */
623 	u8 type_units;
624 	/* cmd word 2 */
625 	__le64 message_iova;
626 	/* cmd word 3 */
627 	__le64 message_ctx;
628 	/* cmd word 4 */
629 	__le32 threshold_entry;
630 	__le32 threshold_exit;
631 };
632 
633 #define DPNI_COUPLED_SHIFT	0
634 #define DPNI_COUPLED_SIZE	1
635 
636 struct dpni_cmd_set_tx_shaping {
637 	__le16 tx_cr_max_burst_size;
638 	__le16 tx_er_max_burst_size;
639 	__le32 pad;
640 	__le32 tx_cr_rate_limit;
641 	__le32 tx_er_rate_limit;
642 	/* from LSB: coupled:1 */
643 	u8 coupled;
644 };
645 
646 #define DPNI_PTP_ENABLE_SHIFT			0
647 #define DPNI_PTP_ENABLE_SIZE			1
648 #define DPNI_PTP_CH_UPDATE_SHIFT		1
649 #define DPNI_PTP_CH_UPDATE_SIZE			1
650 
651 struct dpni_cmd_single_step_cfg {
652 	__le16 flags;
653 	__le16 offset;
654 	__le32 peer_delay;
655 };
656 
657 struct dpni_rsp_single_step_cfg {
658 	__le16 flags;
659 	__le16 offset;
660 	__le32 peer_delay;
661 };
662 
663 #endif /* _FSL_DPNI_CMD_H */
664