1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2014-2016 Freescale Semiconductor Inc.
3  * Copyright 2016 NXP
4  * Copyright 2020 NXP
5  */
6 
7 #include <linux/net_tstamp.h>
8 #include <linux/nospec.h>
9 
10 #include "dpni.h"	/* DPNI_LINK_OPT_* */
11 #include "dpaa2-eth.h"
12 
13 /* To be kept in sync with DPNI statistics */
14 static char dpaa2_ethtool_stats[][ETH_GSTRING_LEN] = {
15 	"[hw] rx frames",
16 	"[hw] rx bytes",
17 	"[hw] rx mcast frames",
18 	"[hw] rx mcast bytes",
19 	"[hw] rx bcast frames",
20 	"[hw] rx bcast bytes",
21 	"[hw] tx frames",
22 	"[hw] tx bytes",
23 	"[hw] tx mcast frames",
24 	"[hw] tx mcast bytes",
25 	"[hw] tx bcast frames",
26 	"[hw] tx bcast bytes",
27 	"[hw] rx filtered frames",
28 	"[hw] rx discarded frames",
29 	"[hw] rx nobuffer discards",
30 	"[hw] tx discarded frames",
31 	"[hw] tx confirmed frames",
32 	"[hw] tx dequeued bytes",
33 	"[hw] tx dequeued frames",
34 	"[hw] tx rejected bytes",
35 	"[hw] tx rejected frames",
36 	"[hw] tx pending frames",
37 };
38 
39 #define DPAA2_ETH_NUM_STATS	ARRAY_SIZE(dpaa2_ethtool_stats)
40 
41 static char dpaa2_ethtool_extras[][ETH_GSTRING_LEN] = {
42 	/* per-cpu stats */
43 	"[drv] tx conf frames",
44 	"[drv] tx conf bytes",
45 	"[drv] tx sg frames",
46 	"[drv] tx sg bytes",
47 	"[drv] tx tso frames",
48 	"[drv] tx tso bytes",
49 	"[drv] rx sg frames",
50 	"[drv] rx sg bytes",
51 	"[drv] tx converted sg frames",
52 	"[drv] tx converted sg bytes",
53 	"[drv] enqueue portal busy",
54 	/* Channel stats */
55 	"[drv] dequeue portal busy",
56 	"[drv] channel pull errors",
57 	"[drv] cdan",
58 	"[drv] xdp drop",
59 	"[drv] xdp tx",
60 	"[drv] xdp tx errors",
61 	"[drv] xdp redirect",
62 	/* FQ stats */
63 	"[qbman] rx pending frames",
64 	"[qbman] rx pending bytes",
65 	"[qbman] tx conf pending frames",
66 	"[qbman] tx conf pending bytes",
67 	"[qbman] buffer count",
68 };
69 
70 #define DPAA2_ETH_NUM_EXTRA_STATS	ARRAY_SIZE(dpaa2_ethtool_extras)
71 
72 static void dpaa2_eth_get_drvinfo(struct net_device *net_dev,
73 				  struct ethtool_drvinfo *drvinfo)
74 {
75 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
76 
77 	strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
78 
79 	snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
80 		 "%u.%u", priv->dpni_ver_major, priv->dpni_ver_minor);
81 
82 	strscpy(drvinfo->bus_info, dev_name(net_dev->dev.parent->parent),
83 		sizeof(drvinfo->bus_info));
84 }
85 
86 static int dpaa2_eth_nway_reset(struct net_device *net_dev)
87 {
88 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
89 
90 	if (dpaa2_eth_is_type_phy(priv))
91 		return phylink_ethtool_nway_reset(priv->mac->phylink);
92 
93 	return -EOPNOTSUPP;
94 }
95 
96 static int
97 dpaa2_eth_get_link_ksettings(struct net_device *net_dev,
98 			     struct ethtool_link_ksettings *link_settings)
99 {
100 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
101 
102 	if (dpaa2_eth_is_type_phy(priv))
103 		return phylink_ethtool_ksettings_get(priv->mac->phylink,
104 						     link_settings);
105 
106 	link_settings->base.autoneg = AUTONEG_DISABLE;
107 	if (!(priv->link_state.options & DPNI_LINK_OPT_HALF_DUPLEX))
108 		link_settings->base.duplex = DUPLEX_FULL;
109 	link_settings->base.speed = priv->link_state.rate;
110 
111 	return 0;
112 }
113 
114 static int
115 dpaa2_eth_set_link_ksettings(struct net_device *net_dev,
116 			     const struct ethtool_link_ksettings *link_settings)
117 {
118 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
119 
120 	if (!dpaa2_eth_is_type_phy(priv))
121 		return -ENOTSUPP;
122 
123 	return phylink_ethtool_ksettings_set(priv->mac->phylink, link_settings);
124 }
125 
126 static void dpaa2_eth_get_pauseparam(struct net_device *net_dev,
127 				     struct ethtool_pauseparam *pause)
128 {
129 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
130 	u64 link_options = priv->link_state.options;
131 
132 	if (dpaa2_eth_is_type_phy(priv)) {
133 		phylink_ethtool_get_pauseparam(priv->mac->phylink, pause);
134 		return;
135 	}
136 
137 	pause->rx_pause = dpaa2_eth_rx_pause_enabled(link_options);
138 	pause->tx_pause = dpaa2_eth_tx_pause_enabled(link_options);
139 	pause->autoneg = AUTONEG_DISABLE;
140 }
141 
142 static int dpaa2_eth_set_pauseparam(struct net_device *net_dev,
143 				    struct ethtool_pauseparam *pause)
144 {
145 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
146 	struct dpni_link_cfg cfg = {0};
147 	int err;
148 
149 	if (!dpaa2_eth_has_pause_support(priv)) {
150 		netdev_info(net_dev, "No pause frame support for DPNI version < %d.%d\n",
151 			    DPNI_PAUSE_VER_MAJOR, DPNI_PAUSE_VER_MINOR);
152 		return -EOPNOTSUPP;
153 	}
154 
155 	if (dpaa2_eth_is_type_phy(priv))
156 		return phylink_ethtool_set_pauseparam(priv->mac->phylink,
157 						      pause);
158 	if (pause->autoneg)
159 		return -EOPNOTSUPP;
160 
161 	cfg.rate = priv->link_state.rate;
162 	cfg.options = priv->link_state.options;
163 	if (pause->rx_pause)
164 		cfg.options |= DPNI_LINK_OPT_PAUSE;
165 	else
166 		cfg.options &= ~DPNI_LINK_OPT_PAUSE;
167 	if (!!pause->rx_pause ^ !!pause->tx_pause)
168 		cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
169 	else
170 		cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
171 
172 	if (cfg.options == priv->link_state.options)
173 		return 0;
174 
175 	err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg);
176 	if (err) {
177 		netdev_err(net_dev, "dpni_set_link_state failed\n");
178 		return err;
179 	}
180 
181 	priv->link_state.options = cfg.options;
182 
183 	return 0;
184 }
185 
186 static void dpaa2_eth_get_strings(struct net_device *netdev, u32 stringset,
187 				  u8 *data)
188 {
189 	struct dpaa2_eth_priv *priv = netdev_priv(netdev);
190 	u8 *p = data;
191 	int i;
192 
193 	switch (stringset) {
194 	case ETH_SS_STATS:
195 		for (i = 0; i < DPAA2_ETH_NUM_STATS; i++) {
196 			strscpy(p, dpaa2_ethtool_stats[i], ETH_GSTRING_LEN);
197 			p += ETH_GSTRING_LEN;
198 		}
199 		for (i = 0; i < DPAA2_ETH_NUM_EXTRA_STATS; i++) {
200 			strscpy(p, dpaa2_ethtool_extras[i], ETH_GSTRING_LEN);
201 			p += ETH_GSTRING_LEN;
202 		}
203 		if (dpaa2_eth_has_mac(priv))
204 			dpaa2_mac_get_strings(p);
205 		break;
206 	}
207 }
208 
209 static int dpaa2_eth_get_sset_count(struct net_device *net_dev, int sset)
210 {
211 	int num_ss_stats = DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS;
212 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
213 
214 	switch (sset) {
215 	case ETH_SS_STATS: /* ethtool_get_stats(), ethtool_get_drvinfo() */
216 		if (dpaa2_eth_has_mac(priv))
217 			num_ss_stats += dpaa2_mac_get_sset_count();
218 		return num_ss_stats;
219 	default:
220 		return -EOPNOTSUPP;
221 	}
222 }
223 
224 /** Fill in hardware counters, as returned by MC.
225  */
226 static void dpaa2_eth_get_ethtool_stats(struct net_device *net_dev,
227 					struct ethtool_stats *stats,
228 					u64 *data)
229 {
230 	int i = 0;
231 	int j, k, err;
232 	int num_cnt;
233 	union dpni_statistics dpni_stats;
234 	u32 fcnt, bcnt;
235 	u32 fcnt_rx_total = 0, fcnt_tx_total = 0;
236 	u32 bcnt_rx_total = 0, bcnt_tx_total = 0;
237 	u32 buf_cnt;
238 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
239 	struct dpaa2_eth_drv_stats *extras;
240 	struct dpaa2_eth_ch_stats *ch_stats;
241 	int dpni_stats_page_size[DPNI_STATISTICS_CNT] = {
242 		sizeof(dpni_stats.page_0),
243 		sizeof(dpni_stats.page_1),
244 		sizeof(dpni_stats.page_2),
245 		sizeof(dpni_stats.page_3),
246 		sizeof(dpni_stats.page_4),
247 		sizeof(dpni_stats.page_5),
248 		sizeof(dpni_stats.page_6),
249 	};
250 
251 	memset(data, 0,
252 	       sizeof(u64) * (DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS));
253 
254 	/* Print standard counters, from DPNI statistics */
255 	for (j = 0; j <= 6; j++) {
256 		/* We're not interested in pages 4 & 5 for now */
257 		if (j == 4 || j == 5)
258 			continue;
259 		err = dpni_get_statistics(priv->mc_io, 0, priv->mc_token,
260 					  j, &dpni_stats);
261 		if (err == -EINVAL)
262 			/* Older firmware versions don't support all pages */
263 			memset(&dpni_stats, 0, sizeof(dpni_stats));
264 		else if (err)
265 			netdev_warn(net_dev, "dpni_get_stats(%d) failed\n", j);
266 
267 		num_cnt = dpni_stats_page_size[j] / sizeof(u64);
268 		for (k = 0; k < num_cnt; k++)
269 			*(data + i++) = dpni_stats.raw.counter[k];
270 	}
271 
272 	/* Print per-cpu extra stats */
273 	for_each_online_cpu(k) {
274 		extras = per_cpu_ptr(priv->percpu_extras, k);
275 		for (j = 0; j < sizeof(*extras) / sizeof(__u64); j++)
276 			*((__u64 *)data + i + j) += *((__u64 *)extras + j);
277 	}
278 	i += j;
279 
280 	/* Per-channel stats */
281 	for (k = 0; k < priv->num_channels; k++) {
282 		ch_stats = &priv->channel[k]->stats;
283 		for (j = 0; j < DPAA2_ETH_CH_STATS; j++)
284 			*((__u64 *)data + i + j) += *((__u64 *)ch_stats + j);
285 	}
286 	i += j;
287 
288 	for (j = 0; j < priv->num_fqs; j++) {
289 		/* Print FQ instantaneous counts */
290 		err = dpaa2_io_query_fq_count(NULL, priv->fq[j].fqid,
291 					      &fcnt, &bcnt);
292 		if (err) {
293 			netdev_warn(net_dev, "FQ query error %d", err);
294 			return;
295 		}
296 
297 		if (priv->fq[j].type == DPAA2_TX_CONF_FQ) {
298 			fcnt_tx_total += fcnt;
299 			bcnt_tx_total += bcnt;
300 		} else {
301 			fcnt_rx_total += fcnt;
302 			bcnt_rx_total += bcnt;
303 		}
304 	}
305 
306 	*(data + i++) = fcnt_rx_total;
307 	*(data + i++) = bcnt_rx_total;
308 	*(data + i++) = fcnt_tx_total;
309 	*(data + i++) = bcnt_tx_total;
310 
311 	err = dpaa2_io_query_bp_count(NULL, priv->bpid, &buf_cnt);
312 	if (err) {
313 		netdev_warn(net_dev, "Buffer count query error %d\n", err);
314 		return;
315 	}
316 	*(data + i++) = buf_cnt;
317 
318 	if (dpaa2_eth_has_mac(priv))
319 		dpaa2_mac_get_ethtool_stats(priv->mac, data + i);
320 }
321 
322 static int dpaa2_eth_prep_eth_rule(struct ethhdr *eth_value, struct ethhdr *eth_mask,
323 				   void *key, void *mask, u64 *fields)
324 {
325 	int off;
326 
327 	if (eth_mask->h_proto) {
328 		off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
329 		*(__be16 *)(key + off) = eth_value->h_proto;
330 		*(__be16 *)(mask + off) = eth_mask->h_proto;
331 		*fields |= DPAA2_ETH_DIST_ETHTYPE;
332 	}
333 
334 	if (!is_zero_ether_addr(eth_mask->h_source)) {
335 		off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_SA);
336 		ether_addr_copy(key + off, eth_value->h_source);
337 		ether_addr_copy(mask + off, eth_mask->h_source);
338 		*fields |= DPAA2_ETH_DIST_ETHSRC;
339 	}
340 
341 	if (!is_zero_ether_addr(eth_mask->h_dest)) {
342 		off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_DA);
343 		ether_addr_copy(key + off, eth_value->h_dest);
344 		ether_addr_copy(mask + off, eth_mask->h_dest);
345 		*fields |= DPAA2_ETH_DIST_ETHDST;
346 	}
347 
348 	return 0;
349 }
350 
351 static int dpaa2_eth_prep_uip_rule(struct ethtool_usrip4_spec *uip_value,
352 				   struct ethtool_usrip4_spec *uip_mask,
353 				   void *key, void *mask, u64 *fields)
354 {
355 	int off;
356 	u32 tmp_value, tmp_mask;
357 
358 	if (uip_mask->tos || uip_mask->ip_ver)
359 		return -EOPNOTSUPP;
360 
361 	if (uip_mask->ip4src) {
362 		off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_SRC);
363 		*(__be32 *)(key + off) = uip_value->ip4src;
364 		*(__be32 *)(mask + off) = uip_mask->ip4src;
365 		*fields |= DPAA2_ETH_DIST_IPSRC;
366 	}
367 
368 	if (uip_mask->ip4dst) {
369 		off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_DST);
370 		*(__be32 *)(key + off) = uip_value->ip4dst;
371 		*(__be32 *)(mask + off) = uip_mask->ip4dst;
372 		*fields |= DPAA2_ETH_DIST_IPDST;
373 	}
374 
375 	if (uip_mask->proto) {
376 		off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_PROTO);
377 		*(u8 *)(key + off) = uip_value->proto;
378 		*(u8 *)(mask + off) = uip_mask->proto;
379 		*fields |= DPAA2_ETH_DIST_IPPROTO;
380 	}
381 
382 	if (uip_mask->l4_4_bytes) {
383 		tmp_value = be32_to_cpu(uip_value->l4_4_bytes);
384 		tmp_mask = be32_to_cpu(uip_mask->l4_4_bytes);
385 
386 		off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
387 		*(__be16 *)(key + off) = htons(tmp_value >> 16);
388 		*(__be16 *)(mask + off) = htons(tmp_mask >> 16);
389 		*fields |= DPAA2_ETH_DIST_L4SRC;
390 
391 		off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
392 		*(__be16 *)(key + off) = htons(tmp_value & 0xFFFF);
393 		*(__be16 *)(mask + off) = htons(tmp_mask & 0xFFFF);
394 		*fields |= DPAA2_ETH_DIST_L4DST;
395 	}
396 
397 	/* Only apply the rule for IPv4 frames */
398 	off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
399 	*(__be16 *)(key + off) = htons(ETH_P_IP);
400 	*(__be16 *)(mask + off) = htons(0xFFFF);
401 	*fields |= DPAA2_ETH_DIST_ETHTYPE;
402 
403 	return 0;
404 }
405 
406 static int dpaa2_eth_prep_l4_rule(struct ethtool_tcpip4_spec *l4_value,
407 				  struct ethtool_tcpip4_spec *l4_mask,
408 				  void *key, void *mask, u8 l4_proto, u64 *fields)
409 {
410 	int off;
411 
412 	if (l4_mask->tos)
413 		return -EOPNOTSUPP;
414 
415 	if (l4_mask->ip4src) {
416 		off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_SRC);
417 		*(__be32 *)(key + off) = l4_value->ip4src;
418 		*(__be32 *)(mask + off) = l4_mask->ip4src;
419 		*fields |= DPAA2_ETH_DIST_IPSRC;
420 	}
421 
422 	if (l4_mask->ip4dst) {
423 		off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_DST);
424 		*(__be32 *)(key + off) = l4_value->ip4dst;
425 		*(__be32 *)(mask + off) = l4_mask->ip4dst;
426 		*fields |= DPAA2_ETH_DIST_IPDST;
427 	}
428 
429 	if (l4_mask->psrc) {
430 		off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
431 		*(__be16 *)(key + off) = l4_value->psrc;
432 		*(__be16 *)(mask + off) = l4_mask->psrc;
433 		*fields |= DPAA2_ETH_DIST_L4SRC;
434 	}
435 
436 	if (l4_mask->pdst) {
437 		off = dpaa2_eth_cls_fld_off(NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
438 		*(__be16 *)(key + off) = l4_value->pdst;
439 		*(__be16 *)(mask + off) = l4_mask->pdst;
440 		*fields |= DPAA2_ETH_DIST_L4DST;
441 	}
442 
443 	/* Only apply the rule for IPv4 frames with the specified L4 proto */
444 	off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_TYPE);
445 	*(__be16 *)(key + off) = htons(ETH_P_IP);
446 	*(__be16 *)(mask + off) = htons(0xFFFF);
447 	*fields |= DPAA2_ETH_DIST_ETHTYPE;
448 
449 	off = dpaa2_eth_cls_fld_off(NET_PROT_IP, NH_FLD_IP_PROTO);
450 	*(u8 *)(key + off) = l4_proto;
451 	*(u8 *)(mask + off) = 0xFF;
452 	*fields |= DPAA2_ETH_DIST_IPPROTO;
453 
454 	return 0;
455 }
456 
457 static int dpaa2_eth_prep_ext_rule(struct ethtool_flow_ext *ext_value,
458 				   struct ethtool_flow_ext *ext_mask,
459 				   void *key, void *mask, u64 *fields)
460 {
461 	int off;
462 
463 	if (ext_mask->vlan_etype)
464 		return -EOPNOTSUPP;
465 
466 	if (ext_mask->vlan_tci) {
467 		off = dpaa2_eth_cls_fld_off(NET_PROT_VLAN, NH_FLD_VLAN_TCI);
468 		*(__be16 *)(key + off) = ext_value->vlan_tci;
469 		*(__be16 *)(mask + off) = ext_mask->vlan_tci;
470 		*fields |= DPAA2_ETH_DIST_VLAN;
471 	}
472 
473 	return 0;
474 }
475 
476 static int dpaa2_eth_prep_mac_ext_rule(struct ethtool_flow_ext *ext_value,
477 				       struct ethtool_flow_ext *ext_mask,
478 				       void *key, void *mask, u64 *fields)
479 {
480 	int off;
481 
482 	if (!is_zero_ether_addr(ext_mask->h_dest)) {
483 		off = dpaa2_eth_cls_fld_off(NET_PROT_ETH, NH_FLD_ETH_DA);
484 		ether_addr_copy(key + off, ext_value->h_dest);
485 		ether_addr_copy(mask + off, ext_mask->h_dest);
486 		*fields |= DPAA2_ETH_DIST_ETHDST;
487 	}
488 
489 	return 0;
490 }
491 
492 static int dpaa2_eth_prep_cls_rule(struct ethtool_rx_flow_spec *fs, void *key,
493 				   void *mask, u64 *fields)
494 {
495 	int err;
496 
497 	switch (fs->flow_type & 0xFF) {
498 	case ETHER_FLOW:
499 		err = dpaa2_eth_prep_eth_rule(&fs->h_u.ether_spec, &fs->m_u.ether_spec,
500 					      key, mask, fields);
501 		break;
502 	case IP_USER_FLOW:
503 		err = dpaa2_eth_prep_uip_rule(&fs->h_u.usr_ip4_spec,
504 					      &fs->m_u.usr_ip4_spec, key, mask, fields);
505 		break;
506 	case TCP_V4_FLOW:
507 		err = dpaa2_eth_prep_l4_rule(&fs->h_u.tcp_ip4_spec, &fs->m_u.tcp_ip4_spec,
508 					     key, mask, IPPROTO_TCP, fields);
509 		break;
510 	case UDP_V4_FLOW:
511 		err = dpaa2_eth_prep_l4_rule(&fs->h_u.udp_ip4_spec, &fs->m_u.udp_ip4_spec,
512 					     key, mask, IPPROTO_UDP, fields);
513 		break;
514 	case SCTP_V4_FLOW:
515 		err = dpaa2_eth_prep_l4_rule(&fs->h_u.sctp_ip4_spec,
516 					     &fs->m_u.sctp_ip4_spec, key, mask,
517 					     IPPROTO_SCTP, fields);
518 		break;
519 	default:
520 		return -EOPNOTSUPP;
521 	}
522 
523 	if (err)
524 		return err;
525 
526 	if (fs->flow_type & FLOW_EXT) {
527 		err = dpaa2_eth_prep_ext_rule(&fs->h_ext, &fs->m_ext, key, mask, fields);
528 		if (err)
529 			return err;
530 	}
531 
532 	if (fs->flow_type & FLOW_MAC_EXT) {
533 		err = dpaa2_eth_prep_mac_ext_rule(&fs->h_ext, &fs->m_ext, key,
534 						  mask, fields);
535 		if (err)
536 			return err;
537 	}
538 
539 	return 0;
540 }
541 
542 static int dpaa2_eth_do_cls_rule(struct net_device *net_dev,
543 				 struct ethtool_rx_flow_spec *fs,
544 				 bool add)
545 {
546 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
547 	struct device *dev = net_dev->dev.parent;
548 	struct dpni_rule_cfg rule_cfg = { 0 };
549 	struct dpni_fs_action_cfg fs_act = { 0 };
550 	dma_addr_t key_iova;
551 	u64 fields = 0;
552 	void *key_buf;
553 	int i, err;
554 
555 	if (fs->ring_cookie != RX_CLS_FLOW_DISC &&
556 	    fs->ring_cookie >= dpaa2_eth_queue_count(priv))
557 		return -EINVAL;
558 
559 	rule_cfg.key_size = dpaa2_eth_cls_key_size(DPAA2_ETH_DIST_ALL);
560 
561 	/* allocate twice the key size, for the actual key and for mask */
562 	key_buf = kzalloc(rule_cfg.key_size * 2, GFP_KERNEL);
563 	if (!key_buf)
564 		return -ENOMEM;
565 
566 	/* Fill the key and mask memory areas */
567 	err = dpaa2_eth_prep_cls_rule(fs, key_buf, key_buf + rule_cfg.key_size, &fields);
568 	if (err)
569 		goto free_mem;
570 
571 	if (!dpaa2_eth_fs_mask_enabled(priv)) {
572 		/* Masking allows us to configure a maximal key during init and
573 		 * use it for all flow steering rules. Without it, we include
574 		 * in the key only the fields actually used, so we need to
575 		 * extract the others from the final key buffer.
576 		 *
577 		 * Program the FS key if needed, or return error if previously
578 		 * set key can't be used for the current rule. User needs to
579 		 * delete existing rules in this case to allow for the new one.
580 		 */
581 		if (!priv->rx_cls_fields) {
582 			err = dpaa2_eth_set_cls(net_dev, fields);
583 			if (err)
584 				goto free_mem;
585 
586 			priv->rx_cls_fields = fields;
587 		} else if (priv->rx_cls_fields != fields) {
588 			netdev_err(net_dev, "No support for multiple FS keys, need to delete existing rules\n");
589 			err = -EOPNOTSUPP;
590 			goto free_mem;
591 		}
592 
593 		dpaa2_eth_cls_trim_rule(key_buf, fields);
594 		rule_cfg.key_size = dpaa2_eth_cls_key_size(fields);
595 	}
596 
597 	key_iova = dma_map_single(dev, key_buf, rule_cfg.key_size * 2,
598 				  DMA_TO_DEVICE);
599 	if (dma_mapping_error(dev, key_iova)) {
600 		err = -ENOMEM;
601 		goto free_mem;
602 	}
603 
604 	rule_cfg.key_iova = key_iova;
605 	if (dpaa2_eth_fs_mask_enabled(priv))
606 		rule_cfg.mask_iova = key_iova + rule_cfg.key_size;
607 
608 	if (add) {
609 		if (fs->ring_cookie == RX_CLS_FLOW_DISC)
610 			fs_act.options |= DPNI_FS_OPT_DISCARD;
611 		else
612 			fs_act.flow_id = fs->ring_cookie;
613 	}
614 	for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
615 		if (add)
616 			err = dpni_add_fs_entry(priv->mc_io, 0, priv->mc_token,
617 						i, fs->location, &rule_cfg,
618 						&fs_act);
619 		else
620 			err = dpni_remove_fs_entry(priv->mc_io, 0,
621 						   priv->mc_token, i,
622 						   &rule_cfg);
623 		if (err || priv->dpni_attrs.options & DPNI_OPT_SHARED_FS)
624 			break;
625 	}
626 
627 	dma_unmap_single(dev, key_iova, rule_cfg.key_size * 2, DMA_TO_DEVICE);
628 
629 free_mem:
630 	kfree(key_buf);
631 
632 	return err;
633 }
634 
635 static int dpaa2_eth_num_cls_rules(struct dpaa2_eth_priv *priv)
636 {
637 	int i, rules = 0;
638 
639 	for (i = 0; i < dpaa2_eth_fs_count(priv); i++)
640 		if (priv->cls_rules[i].in_use)
641 			rules++;
642 
643 	return rules;
644 }
645 
646 static int dpaa2_eth_update_cls_rule(struct net_device *net_dev,
647 				     struct ethtool_rx_flow_spec *new_fs,
648 				     unsigned int location)
649 {
650 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
651 	struct dpaa2_eth_cls_rule *rule;
652 	int err = -EINVAL;
653 
654 	if (!priv->rx_cls_enabled)
655 		return -EOPNOTSUPP;
656 
657 	if (location >= dpaa2_eth_fs_count(priv))
658 		return -EINVAL;
659 
660 	rule = &priv->cls_rules[location];
661 
662 	/* If a rule is present at the specified location, delete it. */
663 	if (rule->in_use) {
664 		err = dpaa2_eth_do_cls_rule(net_dev, &rule->fs, false);
665 		if (err)
666 			return err;
667 
668 		rule->in_use = 0;
669 
670 		if (!dpaa2_eth_fs_mask_enabled(priv) &&
671 		    !dpaa2_eth_num_cls_rules(priv))
672 			priv->rx_cls_fields = 0;
673 	}
674 
675 	/* If no new entry to add, return here */
676 	if (!new_fs)
677 		return err;
678 
679 	err = dpaa2_eth_do_cls_rule(net_dev, new_fs, true);
680 	if (err)
681 		return err;
682 
683 	rule->in_use = 1;
684 	rule->fs = *new_fs;
685 
686 	return 0;
687 }
688 
689 static int dpaa2_eth_get_rxnfc(struct net_device *net_dev,
690 			       struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
691 {
692 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
693 	int max_rules = dpaa2_eth_fs_count(priv);
694 	int i, j = 0;
695 
696 	switch (rxnfc->cmd) {
697 	case ETHTOOL_GRXFH:
698 		/* we purposely ignore cmd->flow_type for now, because the
699 		 * classifier only supports a single set of fields for all
700 		 * protocols
701 		 */
702 		rxnfc->data = priv->rx_hash_fields;
703 		break;
704 	case ETHTOOL_GRXRINGS:
705 		rxnfc->data = dpaa2_eth_queue_count(priv);
706 		break;
707 	case ETHTOOL_GRXCLSRLCNT:
708 		rxnfc->rule_cnt = 0;
709 		rxnfc->rule_cnt = dpaa2_eth_num_cls_rules(priv);
710 		rxnfc->data = max_rules;
711 		break;
712 	case ETHTOOL_GRXCLSRULE:
713 		if (rxnfc->fs.location >= max_rules)
714 			return -EINVAL;
715 		rxnfc->fs.location = array_index_nospec(rxnfc->fs.location,
716 							max_rules);
717 		if (!priv->cls_rules[rxnfc->fs.location].in_use)
718 			return -EINVAL;
719 		rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs;
720 		break;
721 	case ETHTOOL_GRXCLSRLALL:
722 		for (i = 0; i < max_rules; i++) {
723 			if (!priv->cls_rules[i].in_use)
724 				continue;
725 			if (j == rxnfc->rule_cnt)
726 				return -EMSGSIZE;
727 			rule_locs[j++] = i;
728 		}
729 		rxnfc->rule_cnt = j;
730 		rxnfc->data = max_rules;
731 		break;
732 	default:
733 		return -EOPNOTSUPP;
734 	}
735 
736 	return 0;
737 }
738 
739 static int dpaa2_eth_set_rxnfc(struct net_device *net_dev,
740 			       struct ethtool_rxnfc *rxnfc)
741 {
742 	int err = 0;
743 
744 	switch (rxnfc->cmd) {
745 	case ETHTOOL_SRXFH:
746 		if ((rxnfc->data & DPAA2_RXH_SUPPORTED) != rxnfc->data)
747 			return -EOPNOTSUPP;
748 		err = dpaa2_eth_set_hash(net_dev, rxnfc->data);
749 		break;
750 	case ETHTOOL_SRXCLSRLINS:
751 		err = dpaa2_eth_update_cls_rule(net_dev, &rxnfc->fs, rxnfc->fs.location);
752 		break;
753 	case ETHTOOL_SRXCLSRLDEL:
754 		err = dpaa2_eth_update_cls_rule(net_dev, NULL, rxnfc->fs.location);
755 		break;
756 	default:
757 		err = -EOPNOTSUPP;
758 	}
759 
760 	return err;
761 }
762 
763 int dpaa2_phc_index = -1;
764 EXPORT_SYMBOL(dpaa2_phc_index);
765 
766 static int dpaa2_eth_get_ts_info(struct net_device *dev,
767 				 struct ethtool_ts_info *info)
768 {
769 	if (!dpaa2_ptp)
770 		return ethtool_op_get_ts_info(dev, info);
771 
772 	info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
773 				SOF_TIMESTAMPING_RX_HARDWARE |
774 				SOF_TIMESTAMPING_RAW_HARDWARE;
775 
776 	info->phc_index = dpaa2_phc_index;
777 
778 	info->tx_types = (1 << HWTSTAMP_TX_OFF) |
779 			 (1 << HWTSTAMP_TX_ON) |
780 			 (1 << HWTSTAMP_TX_ONESTEP_SYNC);
781 
782 	info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
783 			   (1 << HWTSTAMP_FILTER_ALL);
784 	return 0;
785 }
786 
787 static int dpaa2_eth_get_tunable(struct net_device *net_dev,
788 				 const struct ethtool_tunable *tuna,
789 				 void *data)
790 {
791 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
792 	int err = 0;
793 
794 	switch (tuna->id) {
795 	case ETHTOOL_RX_COPYBREAK:
796 		*(u32 *)data = priv->rx_copybreak;
797 		break;
798 	default:
799 		err = -EOPNOTSUPP;
800 		break;
801 	}
802 
803 	return err;
804 }
805 
806 static int dpaa2_eth_set_tunable(struct net_device *net_dev,
807 				 const struct ethtool_tunable *tuna,
808 				 const void *data)
809 {
810 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
811 	int err = 0;
812 
813 	switch (tuna->id) {
814 	case ETHTOOL_RX_COPYBREAK:
815 		priv->rx_copybreak = *(u32 *)data;
816 		break;
817 	default:
818 		err = -EOPNOTSUPP;
819 		break;
820 	}
821 
822 	return err;
823 }
824 
825 static int dpaa2_eth_get_coalesce(struct net_device *dev,
826 				  struct ethtool_coalesce *ic,
827 				  struct kernel_ethtool_coalesce *kernel_coal,
828 				  struct netlink_ext_ack *extack)
829 {
830 	struct dpaa2_eth_priv *priv = netdev_priv(dev);
831 	struct dpaa2_io *dpio = priv->channel[0]->dpio;
832 
833 	dpaa2_io_get_irq_coalescing(dpio, &ic->rx_coalesce_usecs);
834 	ic->use_adaptive_rx_coalesce = dpaa2_io_get_adaptive_coalescing(dpio);
835 
836 	return 0;
837 }
838 
839 static int dpaa2_eth_set_coalesce(struct net_device *dev,
840 				  struct ethtool_coalesce *ic,
841 				  struct kernel_ethtool_coalesce *kernel_coal,
842 				  struct netlink_ext_ack *extack)
843 {
844 	struct dpaa2_eth_priv *priv = netdev_priv(dev);
845 	struct dpaa2_io *dpio;
846 	int prev_adaptive;
847 	u32 prev_rx_usecs;
848 	int i, j, err;
849 
850 	/* Keep track of the previous value, just in case we fail */
851 	dpio = priv->channel[0]->dpio;
852 	dpaa2_io_get_irq_coalescing(dpio, &prev_rx_usecs);
853 	prev_adaptive = dpaa2_io_get_adaptive_coalescing(dpio);
854 
855 	/* Setup new value for rx coalescing */
856 	for (i = 0; i < priv->num_channels; i++) {
857 		dpio = priv->channel[i]->dpio;
858 
859 		dpaa2_io_set_adaptive_coalescing(dpio,
860 						 ic->use_adaptive_rx_coalesce);
861 		err = dpaa2_io_set_irq_coalescing(dpio, ic->rx_coalesce_usecs);
862 		if (err)
863 			goto restore_rx_usecs;
864 	}
865 
866 	return 0;
867 
868 restore_rx_usecs:
869 	for (j = 0; j < i; j++) {
870 		dpio = priv->channel[j]->dpio;
871 
872 		dpaa2_io_set_irq_coalescing(dpio, prev_rx_usecs);
873 		dpaa2_io_set_adaptive_coalescing(dpio, prev_adaptive);
874 	}
875 
876 	return err;
877 }
878 
879 const struct ethtool_ops dpaa2_ethtool_ops = {
880 	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
881 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
882 	.get_drvinfo = dpaa2_eth_get_drvinfo,
883 	.nway_reset = dpaa2_eth_nway_reset,
884 	.get_link = ethtool_op_get_link,
885 	.get_link_ksettings = dpaa2_eth_get_link_ksettings,
886 	.set_link_ksettings = dpaa2_eth_set_link_ksettings,
887 	.get_pauseparam = dpaa2_eth_get_pauseparam,
888 	.set_pauseparam = dpaa2_eth_set_pauseparam,
889 	.get_sset_count = dpaa2_eth_get_sset_count,
890 	.get_ethtool_stats = dpaa2_eth_get_ethtool_stats,
891 	.get_strings = dpaa2_eth_get_strings,
892 	.get_rxnfc = dpaa2_eth_get_rxnfc,
893 	.set_rxnfc = dpaa2_eth_set_rxnfc,
894 	.get_ts_info = dpaa2_eth_get_ts_info,
895 	.get_tunable = dpaa2_eth_get_tunable,
896 	.set_tunable = dpaa2_eth_set_tunable,
897 	.get_coalesce = dpaa2_eth_get_coalesce,
898 	.set_coalesce = dpaa2_eth_set_coalesce,
899 };
900