1 /* Copyright 2008 - 2016 Freescale Semiconductor Inc. 2 * 3 * Redistribution and use in source and binary forms, with or without 4 * modification, are permitted provided that the following conditions are met: 5 * * Redistributions of source code must retain the above copyright 6 * notice, this list of conditions and the following disclaimer. 7 * * Redistributions in binary form must reproduce the above copyright 8 * notice, this list of conditions and the following disclaimer in the 9 * documentation and/or other materials provided with the distribution. 10 * * Neither the name of Freescale Semiconductor nor the 11 * names of its contributors may be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * ALTERNATIVELY, this software may be distributed under the terms of the 15 * GNU General Public License ("GPL") as published by the Free Software 16 * Foundation, either version 2 of that License or (at your option) any 17 * later version. 18 * 19 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __DPAA_H 32 #define __DPAA_H 33 34 #include <linux/netdevice.h> 35 #include <linux/refcount.h> 36 #include <soc/fsl/qman.h> 37 #include <soc/fsl/bman.h> 38 39 #include "fman.h" 40 #include "mac.h" 41 #include "dpaa_eth_trace.h" 42 43 /* Number of prioritised traffic classes */ 44 #define DPAA_TC_NUM 4 45 /* Number of Tx queues per traffic class */ 46 #define DPAA_TC_TXQ_NUM NR_CPUS 47 /* Total number of Tx queues */ 48 #define DPAA_ETH_TXQ_NUM (DPAA_TC_NUM * DPAA_TC_TXQ_NUM) 49 50 #define DPAA_BPS_NUM 3 /* number of bpools per interface */ 51 52 /* More detailed FQ types - used for fine-grained WQ assignments */ 53 enum dpaa_fq_type { 54 FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */ 55 FQ_TYPE_RX_ERROR, /* Rx Error FQs */ 56 FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */ 57 FQ_TYPE_TX, /* "Real" Tx FQs */ 58 FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */ 59 FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */ 60 FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */ 61 }; 62 63 struct dpaa_fq { 64 struct qman_fq fq_base; 65 struct list_head list; 66 struct net_device *net_dev; 67 bool init; 68 u32 fqid; 69 u32 flags; 70 u16 channel; 71 u8 wq; 72 enum dpaa_fq_type fq_type; 73 }; 74 75 struct dpaa_fq_cbs { 76 struct qman_fq rx_defq; 77 struct qman_fq tx_defq; 78 struct qman_fq rx_errq; 79 struct qman_fq tx_errq; 80 struct qman_fq egress_ern; 81 }; 82 83 struct dpaa_bp { 84 /* device used in the DMA mapping operations */ 85 struct device *dev; 86 /* current number of buffers in the buffer pool alloted to each CPU */ 87 int __percpu *percpu_count; 88 /* all buffers allocated for this pool have this raw size */ 89 size_t raw_size; 90 /* all buffers in this pool have this same usable size */ 91 size_t size; 92 /* the buffer pools are initialized with config_count buffers for each 93 * CPU; at runtime the number of buffers per CPU is constantly brought 94 * back to this level 95 */ 96 u16 config_count; 97 u8 bpid; 98 struct bman_pool *pool; 99 /* bpool can be seeded before use by this cb */ 100 int (*seed_cb)(struct dpaa_bp *); 101 /* bpool can be emptied before freeing by this cb */ 102 void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *); 103 refcount_t refs; 104 }; 105 106 struct dpaa_rx_errors { 107 u64 dme; /* DMA Error */ 108 u64 fpe; /* Frame Physical Error */ 109 u64 fse; /* Frame Size Error */ 110 u64 phe; /* Header Error */ 111 }; 112 113 /* Counters for QMan ERN frames - one counter per rejection code */ 114 struct dpaa_ern_cnt { 115 u64 cg_tdrop; /* Congestion group taildrop */ 116 u64 wred; /* WRED congestion */ 117 u64 err_cond; /* Error condition */ 118 u64 early_window; /* Order restoration, frame too early */ 119 u64 late_window; /* Order restoration, frame too late */ 120 u64 fq_tdrop; /* FQ taildrop */ 121 u64 fq_retired; /* FQ is retired */ 122 u64 orp_zero; /* ORP disabled */ 123 }; 124 125 struct dpaa_napi_portal { 126 struct napi_struct napi; 127 struct qman_portal *p; 128 bool down; 129 }; 130 131 struct dpaa_percpu_priv { 132 struct net_device *net_dev; 133 struct dpaa_napi_portal np; 134 u64 in_interrupt; 135 u64 tx_confirm; 136 /* fragmented (non-linear) skbuffs received from the stack */ 137 u64 tx_frag_skbuffs; 138 struct rtnl_link_stats64 stats; 139 struct dpaa_rx_errors rx_errors; 140 struct dpaa_ern_cnt ern_cnt; 141 }; 142 143 struct dpaa_buffer_layout { 144 u16 priv_data_size; 145 }; 146 147 struct dpaa_priv { 148 struct dpaa_percpu_priv __percpu *percpu_priv; 149 struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM]; 150 /* Store here the needed Tx headroom for convenience and speed 151 * (even though it can be computed based on the fields of buf_layout) 152 */ 153 u16 tx_headroom; 154 struct net_device *net_dev; 155 struct mac_device *mac_dev; 156 struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM]; 157 struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM]; 158 159 u16 channel; 160 struct list_head dpaa_fq_list; 161 162 u8 num_tc; 163 bool keygen_in_use; 164 u32 msg_enable; /* net_device message level */ 165 166 struct { 167 /* All egress queues to a given net device belong to one 168 * (and the same) congestion group. 169 */ 170 struct qman_cgr cgr; 171 /* If congested, when it began. Used for performance stats. */ 172 u32 congestion_start_jiffies; 173 /* Number of jiffies the Tx port was congested. */ 174 u32 congested_jiffies; 175 /* Counter for the number of times the CGR 176 * entered congestion state 177 */ 178 u32 cgr_congested_count; 179 } cgr_data; 180 /* Use a per-port CGR for ingress traffic. */ 181 bool use_ingress_cgr; 182 struct qman_cgr ingress_cgr; 183 184 struct dpaa_buffer_layout buf_layout[2]; 185 u16 rx_headroom; 186 187 bool tx_tstamp; /* Tx timestamping enabled */ 188 bool rx_tstamp; /* Rx timestamping enabled */ 189 }; 190 191 /* from dpaa_ethtool.c */ 192 extern const struct ethtool_ops dpaa_ethtool_ops; 193 194 /* from dpaa_eth_sysfs.c */ 195 void dpaa_eth_sysfs_remove(struct device *dev); 196 void dpaa_eth_sysfs_init(struct device *dev); 197 #endif /* __DPAA_H */ 198