1 /* Copyright 2008 - 2016 Freescale Semiconductor Inc.
2  *
3  * Redistribution and use in source and binary forms, with or without
4  * modification, are permitted provided that the following conditions are met:
5  *     * Redistributions of source code must retain the above copyright
6  *	 notice, this list of conditions and the following disclaimer.
7  *     * Redistributions in binary form must reproduce the above copyright
8  *	 notice, this list of conditions and the following disclaimer in the
9  *	 documentation and/or other materials provided with the distribution.
10  *     * Neither the name of Freescale Semiconductor nor the
11  *	 names of its contributors may be used to endorse or promote products
12  *	 derived from this software without specific prior written permission.
13  *
14  * ALTERNATIVELY, this software may be distributed under the terms of the
15  * GNU General Public License ("GPL") as published by the Free Software
16  * Foundation, either version 2 of that License or (at your option) any
17  * later version.
18  *
19  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
20  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
23  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __DPAA_H
32 #define __DPAA_H
33 
34 #include <linux/netdevice.h>
35 #include <soc/fsl/qman.h>
36 #include <soc/fsl/bman.h>
37 
38 #include "fman.h"
39 #include "mac.h"
40 #include "dpaa_eth_trace.h"
41 
42 #define DPAA_ETH_TXQ_NUM	NR_CPUS
43 
44 #define DPAA_BPS_NUM 3 /* number of bpools per interface */
45 
46 /* More detailed FQ types - used for fine-grained WQ assignments */
47 enum dpaa_fq_type {
48 	FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
49 	FQ_TYPE_RX_ERROR,	/* Rx Error FQs */
50 	FQ_TYPE_TX,		/* "Real" Tx FQs */
51 	FQ_TYPE_TX_CONFIRM,	/* Tx default Conf FQ (actually an Rx FQ) */
52 	FQ_TYPE_TX_CONF_MQ,	/* Tx conf FQs (one for each Tx FQ) */
53 	FQ_TYPE_TX_ERROR,	/* Tx Error FQs (these are actually Rx FQs) */
54 };
55 
56 struct dpaa_fq {
57 	struct qman_fq fq_base;
58 	struct list_head list;
59 	struct net_device *net_dev;
60 	bool init;
61 	u32 fqid;
62 	u32 flags;
63 	u16 channel;
64 	u8 wq;
65 	enum dpaa_fq_type fq_type;
66 };
67 
68 struct dpaa_fq_cbs {
69 	struct qman_fq rx_defq;
70 	struct qman_fq tx_defq;
71 	struct qman_fq rx_errq;
72 	struct qman_fq tx_errq;
73 	struct qman_fq egress_ern;
74 };
75 
76 struct dpaa_bp {
77 	/* device used in the DMA mapping operations */
78 	struct device *dev;
79 	/* current number of buffers in the buffer pool alloted to each CPU */
80 	int __percpu *percpu_count;
81 	/* all buffers allocated for this pool have this raw size */
82 	size_t raw_size;
83 	/* all buffers in this pool have this same usable size */
84 	size_t size;
85 	/* the buffer pools are initialized with config_count buffers for each
86 	 * CPU; at runtime the number of buffers per CPU is constantly brought
87 	 * back to this level
88 	 */
89 	u16 config_count;
90 	u8 bpid;
91 	struct bman_pool *pool;
92 	/* bpool can be seeded before use by this cb */
93 	int (*seed_cb)(struct dpaa_bp *);
94 	/* bpool can be emptied before freeing by this cb */
95 	void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *);
96 	atomic_t refs;
97 };
98 
99 struct dpaa_rx_errors {
100 	u64 dme;		/* DMA Error */
101 	u64 fpe;		/* Frame Physical Error */
102 	u64 fse;		/* Frame Size Error */
103 	u64 phe;		/* Header Error */
104 };
105 
106 /* Counters for QMan ERN frames - one counter per rejection code */
107 struct dpaa_ern_cnt {
108 	u64 cg_tdrop;		/* Congestion group taildrop */
109 	u64 wred;		/* WRED congestion */
110 	u64 err_cond;		/* Error condition */
111 	u64 early_window;	/* Order restoration, frame too early */
112 	u64 late_window;	/* Order restoration, frame too late */
113 	u64 fq_tdrop;		/* FQ taildrop */
114 	u64 fq_retired;		/* FQ is retired */
115 	u64 orp_zero;		/* ORP disabled */
116 };
117 
118 struct dpaa_napi_portal {
119 	struct napi_struct napi;
120 	struct qman_portal *p;
121 	bool down;
122 };
123 
124 struct dpaa_percpu_priv {
125 	struct net_device *net_dev;
126 	struct dpaa_napi_portal np;
127 	u64 in_interrupt;
128 	u64 tx_confirm;
129 	/* fragmented (non-linear) skbuffs received from the stack */
130 	u64 tx_frag_skbuffs;
131 	struct rtnl_link_stats64 stats;
132 	struct dpaa_rx_errors rx_errors;
133 	struct dpaa_ern_cnt ern_cnt;
134 };
135 
136 struct dpaa_buffer_layout {
137 	u16 priv_data_size;
138 };
139 
140 struct dpaa_priv {
141 	struct dpaa_percpu_priv __percpu *percpu_priv;
142 	struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM];
143 	/* Store here the needed Tx headroom for convenience and speed
144 	 * (even though it can be computed based on the fields of buf_layout)
145 	 */
146 	u16 tx_headroom;
147 	struct net_device *net_dev;
148 	struct mac_device *mac_dev;
149 	struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
150 	struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];
151 
152 	u16 channel;
153 	struct list_head dpaa_fq_list;
154 
155 	u32 msg_enable;	/* net_device message level */
156 
157 	struct {
158 		/* All egress queues to a given net device belong to one
159 		 * (and the same) congestion group.
160 		 */
161 		struct qman_cgr cgr;
162 		/* If congested, when it began. Used for performance stats. */
163 		u32 congestion_start_jiffies;
164 		/* Number of jiffies the Tx port was congested. */
165 		u32 congested_jiffies;
166 		/* Counter for the number of times the CGR
167 		 * entered congestion state
168 		 */
169 		u32 cgr_congested_count;
170 	} cgr_data;
171 	/* Use a per-port CGR for ingress traffic. */
172 	bool use_ingress_cgr;
173 	struct qman_cgr ingress_cgr;
174 
175 	struct dpaa_buffer_layout buf_layout[2];
176 	u16 rx_headroom;
177 };
178 
179 /* from dpaa_ethtool.c */
180 extern const struct ethtool_ops dpaa_ethtool_ops;
181 
182 /* from dpaa_eth_sysfs.c */
183 void dpaa_eth_sysfs_remove(struct device *dev);
184 void dpaa_eth_sysfs_init(struct device *dev);
185 #endif	/* __DPAA_H */
186