19ad1a374SMadalin Bucur /* Copyright 2008 - 2016 Freescale Semiconductor Inc. 29ad1a374SMadalin Bucur * 39ad1a374SMadalin Bucur * Redistribution and use in source and binary forms, with or without 49ad1a374SMadalin Bucur * modification, are permitted provided that the following conditions are met: 59ad1a374SMadalin Bucur * * Redistributions of source code must retain the above copyright 69ad1a374SMadalin Bucur * notice, this list of conditions and the following disclaimer. 79ad1a374SMadalin Bucur * * Redistributions in binary form must reproduce the above copyright 89ad1a374SMadalin Bucur * notice, this list of conditions and the following disclaimer in the 99ad1a374SMadalin Bucur * documentation and/or other materials provided with the distribution. 109ad1a374SMadalin Bucur * * Neither the name of Freescale Semiconductor nor the 119ad1a374SMadalin Bucur * names of its contributors may be used to endorse or promote products 129ad1a374SMadalin Bucur * derived from this software without specific prior written permission. 139ad1a374SMadalin Bucur * 149ad1a374SMadalin Bucur * ALTERNATIVELY, this software may be distributed under the terms of the 159ad1a374SMadalin Bucur * GNU General Public License ("GPL") as published by the Free Software 169ad1a374SMadalin Bucur * Foundation, either version 2 of that License or (at your option) any 179ad1a374SMadalin Bucur * later version. 189ad1a374SMadalin Bucur * 199ad1a374SMadalin Bucur * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 209ad1a374SMadalin Bucur * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 219ad1a374SMadalin Bucur * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 229ad1a374SMadalin Bucur * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 239ad1a374SMadalin Bucur * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 249ad1a374SMadalin Bucur * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 259ad1a374SMadalin Bucur * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 269ad1a374SMadalin Bucur * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 279ad1a374SMadalin Bucur * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 289ad1a374SMadalin Bucur * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 299ad1a374SMadalin Bucur */ 309ad1a374SMadalin Bucur 319ad1a374SMadalin Bucur #ifndef __DPAA_H 329ad1a374SMadalin Bucur #define __DPAA_H 339ad1a374SMadalin Bucur 349ad1a374SMadalin Bucur #include <linux/netdevice.h> 359ad1a374SMadalin Bucur #include <soc/fsl/qman.h> 369ad1a374SMadalin Bucur #include <soc/fsl/bman.h> 379ad1a374SMadalin Bucur 389ad1a374SMadalin Bucur #include "fman.h" 399ad1a374SMadalin Bucur #include "mac.h" 40eb11ddf3SMadalin Bucur #include "dpaa_eth_trace.h" 419ad1a374SMadalin Bucur 42c44efa1dSCamelia Groza /* Number of prioritised traffic classes */ 43c44efa1dSCamelia Groza #define DPAA_TC_NUM 4 44c44efa1dSCamelia Groza /* Number of Tx queues per traffic class */ 45c44efa1dSCamelia Groza #define DPAA_TC_TXQ_NUM NR_CPUS 46c44efa1dSCamelia Groza /* Total number of Tx queues */ 47c44efa1dSCamelia Groza #define DPAA_ETH_TXQ_NUM (DPAA_TC_NUM * DPAA_TC_TXQ_NUM) 489ad1a374SMadalin Bucur 499ad1a374SMadalin Bucur #define DPAA_BPS_NUM 3 /* number of bpools per interface */ 509ad1a374SMadalin Bucur 519ad1a374SMadalin Bucur /* More detailed FQ types - used for fine-grained WQ assignments */ 529ad1a374SMadalin Bucur enum dpaa_fq_type { 539ad1a374SMadalin Bucur FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */ 549ad1a374SMadalin Bucur FQ_TYPE_RX_ERROR, /* Rx Error FQs */ 553150b7c2SMadalin Bucur FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */ 569ad1a374SMadalin Bucur FQ_TYPE_TX, /* "Real" Tx FQs */ 579ad1a374SMadalin Bucur FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */ 589ad1a374SMadalin Bucur FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */ 599ad1a374SMadalin Bucur FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */ 609ad1a374SMadalin Bucur }; 619ad1a374SMadalin Bucur 629ad1a374SMadalin Bucur struct dpaa_fq { 639ad1a374SMadalin Bucur struct qman_fq fq_base; 649ad1a374SMadalin Bucur struct list_head list; 659ad1a374SMadalin Bucur struct net_device *net_dev; 669ad1a374SMadalin Bucur bool init; 679ad1a374SMadalin Bucur u32 fqid; 689ad1a374SMadalin Bucur u32 flags; 699ad1a374SMadalin Bucur u16 channel; 709ad1a374SMadalin Bucur u8 wq; 719ad1a374SMadalin Bucur enum dpaa_fq_type fq_type; 729ad1a374SMadalin Bucur }; 739ad1a374SMadalin Bucur 749ad1a374SMadalin Bucur struct dpaa_fq_cbs { 759ad1a374SMadalin Bucur struct qman_fq rx_defq; 769ad1a374SMadalin Bucur struct qman_fq tx_defq; 779ad1a374SMadalin Bucur struct qman_fq rx_errq; 789ad1a374SMadalin Bucur struct qman_fq tx_errq; 799ad1a374SMadalin Bucur struct qman_fq egress_ern; 809ad1a374SMadalin Bucur }; 819ad1a374SMadalin Bucur 829ad1a374SMadalin Bucur struct dpaa_bp { 839ad1a374SMadalin Bucur /* device used in the DMA mapping operations */ 849ad1a374SMadalin Bucur struct device *dev; 859ad1a374SMadalin Bucur /* current number of buffers in the buffer pool alloted to each CPU */ 869ad1a374SMadalin Bucur int __percpu *percpu_count; 879ad1a374SMadalin Bucur /* all buffers allocated for this pool have this raw size */ 889ad1a374SMadalin Bucur size_t raw_size; 899ad1a374SMadalin Bucur /* all buffers in this pool have this same usable size */ 909ad1a374SMadalin Bucur size_t size; 919ad1a374SMadalin Bucur /* the buffer pools are initialized with config_count buffers for each 929ad1a374SMadalin Bucur * CPU; at runtime the number of buffers per CPU is constantly brought 939ad1a374SMadalin Bucur * back to this level 949ad1a374SMadalin Bucur */ 959ad1a374SMadalin Bucur u16 config_count; 969ad1a374SMadalin Bucur u8 bpid; 979ad1a374SMadalin Bucur struct bman_pool *pool; 989ad1a374SMadalin Bucur /* bpool can be seeded before use by this cb */ 999ad1a374SMadalin Bucur int (*seed_cb)(struct dpaa_bp *); 1009ad1a374SMadalin Bucur /* bpool can be emptied before freeing by this cb */ 1019ad1a374SMadalin Bucur void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *); 1029ad1a374SMadalin Bucur atomic_t refs; 1039ad1a374SMadalin Bucur }; 1049ad1a374SMadalin Bucur 105b0ce0d02SMadalin Bucur struct dpaa_rx_errors { 106b0ce0d02SMadalin Bucur u64 dme; /* DMA Error */ 107b0ce0d02SMadalin Bucur u64 fpe; /* Frame Physical Error */ 108b0ce0d02SMadalin Bucur u64 fse; /* Frame Size Error */ 109b0ce0d02SMadalin Bucur u64 phe; /* Header Error */ 110b0ce0d02SMadalin Bucur }; 111b0ce0d02SMadalin Bucur 112b0ce0d02SMadalin Bucur /* Counters for QMan ERN frames - one counter per rejection code */ 113b0ce0d02SMadalin Bucur struct dpaa_ern_cnt { 114b0ce0d02SMadalin Bucur u64 cg_tdrop; /* Congestion group taildrop */ 115b0ce0d02SMadalin Bucur u64 wred; /* WRED congestion */ 116b0ce0d02SMadalin Bucur u64 err_cond; /* Error condition */ 117b0ce0d02SMadalin Bucur u64 early_window; /* Order restoration, frame too early */ 118b0ce0d02SMadalin Bucur u64 late_window; /* Order restoration, frame too late */ 119b0ce0d02SMadalin Bucur u64 fq_tdrop; /* FQ taildrop */ 120b0ce0d02SMadalin Bucur u64 fq_retired; /* FQ is retired */ 121b0ce0d02SMadalin Bucur u64 orp_zero; /* ORP disabled */ 122b0ce0d02SMadalin Bucur }; 123b0ce0d02SMadalin Bucur 1249ad1a374SMadalin Bucur struct dpaa_napi_portal { 1259ad1a374SMadalin Bucur struct napi_struct napi; 1269ad1a374SMadalin Bucur struct qman_portal *p; 1279ad1a374SMadalin Bucur bool down; 1289ad1a374SMadalin Bucur }; 1299ad1a374SMadalin Bucur 1309ad1a374SMadalin Bucur struct dpaa_percpu_priv { 1319ad1a374SMadalin Bucur struct net_device *net_dev; 1329ad1a374SMadalin Bucur struct dpaa_napi_portal np; 133b0ce0d02SMadalin Bucur u64 in_interrupt; 134b0ce0d02SMadalin Bucur u64 tx_confirm; 135b0ce0d02SMadalin Bucur /* fragmented (non-linear) skbuffs received from the stack */ 136b0ce0d02SMadalin Bucur u64 tx_frag_skbuffs; 1379ad1a374SMadalin Bucur struct rtnl_link_stats64 stats; 138b0ce0d02SMadalin Bucur struct dpaa_rx_errors rx_errors; 139b0ce0d02SMadalin Bucur struct dpaa_ern_cnt ern_cnt; 1409ad1a374SMadalin Bucur }; 1419ad1a374SMadalin Bucur 1429ad1a374SMadalin Bucur struct dpaa_buffer_layout { 1439ad1a374SMadalin Bucur u16 priv_data_size; 1449ad1a374SMadalin Bucur }; 1459ad1a374SMadalin Bucur 1469ad1a374SMadalin Bucur struct dpaa_priv { 1479ad1a374SMadalin Bucur struct dpaa_percpu_priv __percpu *percpu_priv; 1489ad1a374SMadalin Bucur struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM]; 1499ad1a374SMadalin Bucur /* Store here the needed Tx headroom for convenience and speed 1509ad1a374SMadalin Bucur * (even though it can be computed based on the fields of buf_layout) 1519ad1a374SMadalin Bucur */ 1529ad1a374SMadalin Bucur u16 tx_headroom; 1539ad1a374SMadalin Bucur struct net_device *net_dev; 1549ad1a374SMadalin Bucur struct mac_device *mac_dev; 1559ad1a374SMadalin Bucur struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM]; 1569ad1a374SMadalin Bucur struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM]; 1579ad1a374SMadalin Bucur 1589ad1a374SMadalin Bucur u16 channel; 1599ad1a374SMadalin Bucur struct list_head dpaa_fq_list; 1609ad1a374SMadalin Bucur 161c44efa1dSCamelia Groza u8 num_tc; 162056057e2SMadalin Bucur bool keygen_in_use; 1639ad1a374SMadalin Bucur u32 msg_enable; /* net_device message level */ 1649ad1a374SMadalin Bucur 1659ad1a374SMadalin Bucur struct { 1669ad1a374SMadalin Bucur /* All egress queues to a given net device belong to one 1679ad1a374SMadalin Bucur * (and the same) congestion group. 1689ad1a374SMadalin Bucur */ 1699ad1a374SMadalin Bucur struct qman_cgr cgr; 170b0ce0d02SMadalin Bucur /* If congested, when it began. Used for performance stats. */ 171b0ce0d02SMadalin Bucur u32 congestion_start_jiffies; 172b0ce0d02SMadalin Bucur /* Number of jiffies the Tx port was congested. */ 173b0ce0d02SMadalin Bucur u32 congested_jiffies; 174b0ce0d02SMadalin Bucur /* Counter for the number of times the CGR 175b0ce0d02SMadalin Bucur * entered congestion state 176b0ce0d02SMadalin Bucur */ 177b0ce0d02SMadalin Bucur u32 cgr_congested_count; 1789ad1a374SMadalin Bucur } cgr_data; 1799ad1a374SMadalin Bucur /* Use a per-port CGR for ingress traffic. */ 1809ad1a374SMadalin Bucur bool use_ingress_cgr; 1819ad1a374SMadalin Bucur struct qman_cgr ingress_cgr; 1829ad1a374SMadalin Bucur 1839ad1a374SMadalin Bucur struct dpaa_buffer_layout buf_layout[2]; 1849ad1a374SMadalin Bucur u16 rx_headroom; 1859ad1a374SMadalin Bucur }; 186b0cdb168SMadalin Bucur 187b0cdb168SMadalin Bucur /* from dpaa_ethtool.c */ 188b0cdb168SMadalin Bucur extern const struct ethtool_ops dpaa_ethtool_ops; 189846a86e2SMadalin Bucur 190846a86e2SMadalin Bucur /* from dpaa_eth_sysfs.c */ 191846a86e2SMadalin Bucur void dpaa_eth_sysfs_remove(struct device *dev); 192846a86e2SMadalin Bucur void dpaa_eth_sysfs_init(struct device *dev); 1939ad1a374SMadalin Bucur #endif /* __DPAA_H */ 194