1d8064c10SSean Anderson /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
2d8064c10SSean Anderson /*
3d8064c10SSean Anderson  * Copyright 2008 - 2016 Freescale Semiconductor Inc.
49ad1a374SMadalin Bucur  */
59ad1a374SMadalin Bucur 
69ad1a374SMadalin Bucur #ifndef __DPAA_H
79ad1a374SMadalin Bucur #define __DPAA_H
89ad1a374SMadalin Bucur 
99ad1a374SMadalin Bucur #include <linux/netdevice.h>
1031168a6dSChuhong Yuan #include <linux/refcount.h>
11*6f9bad6bSJakub Kicinski #include <net/xdp.h>
129ad1a374SMadalin Bucur #include <soc/fsl/qman.h>
139ad1a374SMadalin Bucur #include <soc/fsl/bman.h>
149ad1a374SMadalin Bucur 
159ad1a374SMadalin Bucur #include "fman.h"
169ad1a374SMadalin Bucur #include "mac.h"
17eb11ddf3SMadalin Bucur #include "dpaa_eth_trace.h"
189ad1a374SMadalin Bucur 
19c44efa1dSCamelia Groza /* Number of prioritised traffic classes */
20c44efa1dSCamelia Groza #define DPAA_TC_NUM		4
21c44efa1dSCamelia Groza /* Number of Tx queues per traffic class */
22c44efa1dSCamelia Groza #define DPAA_TC_TXQ_NUM		NR_CPUS
23c44efa1dSCamelia Groza /* Total number of Tx queues */
24c44efa1dSCamelia Groza #define DPAA_ETH_TXQ_NUM	(DPAA_TC_NUM * DPAA_TC_TXQ_NUM)
259ad1a374SMadalin Bucur 
269ad1a374SMadalin Bucur /* More detailed FQ types - used for fine-grained WQ assignments */
279ad1a374SMadalin Bucur enum dpaa_fq_type {
289ad1a374SMadalin Bucur 	FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
299ad1a374SMadalin Bucur 	FQ_TYPE_RX_ERROR,	/* Rx Error FQs */
303150b7c2SMadalin Bucur 	FQ_TYPE_RX_PCD,		/* Rx Parse Classify Distribute FQs */
319ad1a374SMadalin Bucur 	FQ_TYPE_TX,		/* "Real" Tx FQs */
329ad1a374SMadalin Bucur 	FQ_TYPE_TX_CONFIRM,	/* Tx default Conf FQ (actually an Rx FQ) */
339ad1a374SMadalin Bucur 	FQ_TYPE_TX_CONF_MQ,	/* Tx conf FQs (one for each Tx FQ) */
349ad1a374SMadalin Bucur 	FQ_TYPE_TX_ERROR,	/* Tx Error FQs (these are actually Rx FQs) */
359ad1a374SMadalin Bucur };
369ad1a374SMadalin Bucur 
379ad1a374SMadalin Bucur struct dpaa_fq {
389ad1a374SMadalin Bucur 	struct qman_fq fq_base;
399ad1a374SMadalin Bucur 	struct list_head list;
409ad1a374SMadalin Bucur 	struct net_device *net_dev;
419ad1a374SMadalin Bucur 	bool init;
429ad1a374SMadalin Bucur 	u32 fqid;
439ad1a374SMadalin Bucur 	u32 flags;
449ad1a374SMadalin Bucur 	u16 channel;
459ad1a374SMadalin Bucur 	u8 wq;
469ad1a374SMadalin Bucur 	enum dpaa_fq_type fq_type;
47d57e57d0SCamelia Groza 	struct xdp_rxq_info xdp_rxq;
489ad1a374SMadalin Bucur };
499ad1a374SMadalin Bucur 
509ad1a374SMadalin Bucur struct dpaa_fq_cbs {
519ad1a374SMadalin Bucur 	struct qman_fq rx_defq;
529ad1a374SMadalin Bucur 	struct qman_fq tx_defq;
539ad1a374SMadalin Bucur 	struct qman_fq rx_errq;
549ad1a374SMadalin Bucur 	struct qman_fq tx_errq;
559ad1a374SMadalin Bucur 	struct qman_fq egress_ern;
569ad1a374SMadalin Bucur };
579ad1a374SMadalin Bucur 
58060ad66fSMadalin Bucur struct dpaa_priv;
59060ad66fSMadalin Bucur 
609ad1a374SMadalin Bucur struct dpaa_bp {
61060ad66fSMadalin Bucur 	/* used in the DMA mapping operations */
62060ad66fSMadalin Bucur 	struct dpaa_priv *priv;
639ad1a374SMadalin Bucur 	/* current number of buffers in the buffer pool alloted to each CPU */
649ad1a374SMadalin Bucur 	int __percpu *percpu_count;
659ad1a374SMadalin Bucur 	/* all buffers allocated for this pool have this raw size */
669ad1a374SMadalin Bucur 	size_t raw_size;
679ad1a374SMadalin Bucur 	/* all buffers in this pool have this same usable size */
689ad1a374SMadalin Bucur 	size_t size;
699ad1a374SMadalin Bucur 	/* the buffer pools are initialized with config_count buffers for each
709ad1a374SMadalin Bucur 	 * CPU; at runtime the number of buffers per CPU is constantly brought
719ad1a374SMadalin Bucur 	 * back to this level
729ad1a374SMadalin Bucur 	 */
739ad1a374SMadalin Bucur 	u16 config_count;
749ad1a374SMadalin Bucur 	u8 bpid;
759ad1a374SMadalin Bucur 	struct bman_pool *pool;
769ad1a374SMadalin Bucur 	/* bpool can be seeded before use by this cb */
779ad1a374SMadalin Bucur 	int (*seed_cb)(struct dpaa_bp *);
789ad1a374SMadalin Bucur 	/* bpool can be emptied before freeing by this cb */
799ad1a374SMadalin Bucur 	void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *);
8031168a6dSChuhong Yuan 	refcount_t refs;
819ad1a374SMadalin Bucur };
829ad1a374SMadalin Bucur 
83b0ce0d02SMadalin Bucur struct dpaa_rx_errors {
84b0ce0d02SMadalin Bucur 	u64 dme;		/* DMA Error */
85b0ce0d02SMadalin Bucur 	u64 fpe;		/* Frame Physical Error */
86b0ce0d02SMadalin Bucur 	u64 fse;		/* Frame Size Error */
87b0ce0d02SMadalin Bucur 	u64 phe;		/* Header Error */
88b0ce0d02SMadalin Bucur };
89b0ce0d02SMadalin Bucur 
90b0ce0d02SMadalin Bucur /* Counters for QMan ERN frames - one counter per rejection code */
91b0ce0d02SMadalin Bucur struct dpaa_ern_cnt {
92b0ce0d02SMadalin Bucur 	u64 cg_tdrop;		/* Congestion group taildrop */
93b0ce0d02SMadalin Bucur 	u64 wred;		/* WRED congestion */
94b0ce0d02SMadalin Bucur 	u64 err_cond;		/* Error condition */
95b0ce0d02SMadalin Bucur 	u64 early_window;	/* Order restoration, frame too early */
96b0ce0d02SMadalin Bucur 	u64 late_window;	/* Order restoration, frame too late */
97b0ce0d02SMadalin Bucur 	u64 fq_tdrop;		/* FQ taildrop */
98b0ce0d02SMadalin Bucur 	u64 fq_retired;		/* FQ is retired */
99b0ce0d02SMadalin Bucur 	u64 orp_zero;		/* ORP disabled */
100b0ce0d02SMadalin Bucur };
101b0ce0d02SMadalin Bucur 
1029ad1a374SMadalin Bucur struct dpaa_napi_portal {
1039ad1a374SMadalin Bucur 	struct napi_struct napi;
1049ad1a374SMadalin Bucur 	struct qman_portal *p;
1059ad1a374SMadalin Bucur 	bool down;
106a1e031ffSCamelia Groza 	int xdp_act;
1079ad1a374SMadalin Bucur };
1089ad1a374SMadalin Bucur 
1099ad1a374SMadalin Bucur struct dpaa_percpu_priv {
1109ad1a374SMadalin Bucur 	struct net_device *net_dev;
1119ad1a374SMadalin Bucur 	struct dpaa_napi_portal np;
112b0ce0d02SMadalin Bucur 	u64 in_interrupt;
113b0ce0d02SMadalin Bucur 	u64 tx_confirm;
114b0ce0d02SMadalin Bucur 	/* fragmented (non-linear) skbuffs received from the stack */
115b0ce0d02SMadalin Bucur 	u64 tx_frag_skbuffs;
1169ad1a374SMadalin Bucur 	struct rtnl_link_stats64 stats;
117b0ce0d02SMadalin Bucur 	struct dpaa_rx_errors rx_errors;
118b0ce0d02SMadalin Bucur 	struct dpaa_ern_cnt ern_cnt;
1199ad1a374SMadalin Bucur };
1209ad1a374SMadalin Bucur 
1219ad1a374SMadalin Bucur struct dpaa_buffer_layout {
1229ad1a374SMadalin Bucur 	u16 priv_data_size;
1239ad1a374SMadalin Bucur };
1249ad1a374SMadalin Bucur 
125fb9afd96SCamelia Groza /* Information to be used on the Tx confirmation path. Stored just
126fb9afd96SCamelia Groza  * before the start of the transmit buffer. Maximum size allowed
127fb9afd96SCamelia Groza  * is DPAA_TX_PRIV_DATA_SIZE bytes.
128fb9afd96SCamelia Groza  */
129fb9afd96SCamelia Groza struct dpaa_eth_swbp {
130fb9afd96SCamelia Groza 	struct sk_buff *skb;
131d57e57d0SCamelia Groza 	struct xdp_frame *xdpf;
132fb9afd96SCamelia Groza };
133fb9afd96SCamelia Groza 
1349ad1a374SMadalin Bucur struct dpaa_priv {
1359ad1a374SMadalin Bucur 	struct dpaa_percpu_priv __percpu *percpu_priv;
136f07f3004SMadalin Bucur 	struct dpaa_bp *dpaa_bp;
1379ad1a374SMadalin Bucur 	/* Store here the needed Tx headroom for convenience and speed
1389ad1a374SMadalin Bucur 	 * (even though it can be computed based on the fields of buf_layout)
1399ad1a374SMadalin Bucur 	 */
1409ad1a374SMadalin Bucur 	u16 tx_headroom;
1419ad1a374SMadalin Bucur 	struct net_device *net_dev;
1429ad1a374SMadalin Bucur 	struct mac_device *mac_dev;
143060ad66fSMadalin Bucur 	struct device *rx_dma_dev;
144060ad66fSMadalin Bucur 	struct device *tx_dma_dev;
1459ad1a374SMadalin Bucur 	struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
1469ad1a374SMadalin Bucur 	struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];
1479ad1a374SMadalin Bucur 
1489ad1a374SMadalin Bucur 	u16 channel;
1499ad1a374SMadalin Bucur 	struct list_head dpaa_fq_list;
1509ad1a374SMadalin Bucur 
151c44efa1dSCamelia Groza 	u8 num_tc;
152056057e2SMadalin Bucur 	bool keygen_in_use;
1539ad1a374SMadalin Bucur 	u32 msg_enable;	/* net_device message level */
1549ad1a374SMadalin Bucur 
1559ad1a374SMadalin Bucur 	struct {
1569ad1a374SMadalin Bucur 		/* All egress queues to a given net device belong to one
1579ad1a374SMadalin Bucur 		 * (and the same) congestion group.
1589ad1a374SMadalin Bucur 		 */
1599ad1a374SMadalin Bucur 		struct qman_cgr cgr;
160b0ce0d02SMadalin Bucur 		/* If congested, when it began. Used for performance stats. */
161b0ce0d02SMadalin Bucur 		u32 congestion_start_jiffies;
162b0ce0d02SMadalin Bucur 		/* Number of jiffies the Tx port was congested. */
163b0ce0d02SMadalin Bucur 		u32 congested_jiffies;
164b0ce0d02SMadalin Bucur 		/* Counter for the number of times the CGR
165b0ce0d02SMadalin Bucur 		 * entered congestion state
166b0ce0d02SMadalin Bucur 		 */
167b0ce0d02SMadalin Bucur 		u32 cgr_congested_count;
1689ad1a374SMadalin Bucur 	} cgr_data;
1699ad1a374SMadalin Bucur 	/* Use a per-port CGR for ingress traffic. */
1709ad1a374SMadalin Bucur 	bool use_ingress_cgr;
1719ad1a374SMadalin Bucur 	struct qman_cgr ingress_cgr;
1729ad1a374SMadalin Bucur 
1739ad1a374SMadalin Bucur 	struct dpaa_buffer_layout buf_layout[2];
1749ad1a374SMadalin Bucur 	u16 rx_headroom;
1754664856eSYangbo Lu 
1764664856eSYangbo Lu 	bool tx_tstamp; /* Tx timestamping enabled */
1774664856eSYangbo Lu 	bool rx_tstamp; /* Rx timestamping enabled */
17886c0c196SCamelia Groza 
17986c0c196SCamelia Groza 	struct bpf_prog *xdp_prog;
1809ad1a374SMadalin Bucur };
181b0cdb168SMadalin Bucur 
182b0cdb168SMadalin Bucur /* from dpaa_ethtool.c */
183b0cdb168SMadalin Bucur extern const struct ethtool_ops dpaa_ethtool_ops;
184846a86e2SMadalin Bucur 
185846a86e2SMadalin Bucur /* from dpaa_eth_sysfs.c */
186846a86e2SMadalin Bucur void dpaa_eth_sysfs_remove(struct device *dev);
187846a86e2SMadalin Bucur void dpaa_eth_sysfs_init(struct device *dev);
1889ad1a374SMadalin Bucur #endif	/* __DPAA_H */
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