1 /* 2 * Copyright(c) 2015 EZchip Technologies. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 */ 16 17 #include <linux/module.h> 18 #include <linux/etherdevice.h> 19 #include <linux/of_address.h> 20 #include <linux/of_irq.h> 21 #include <linux/of_net.h> 22 #include <linux/of_platform.h> 23 #include "nps_enet.h" 24 25 #define DRV_NAME "nps_mgt_enet" 26 27 static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len) 28 { 29 struct nps_enet_priv *priv = netdev_priv(ndev); 30 u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32)); 31 32 /* Empty Rx FIFO buffer by reading all words */ 33 for (i = 0; i < len; i++) 34 nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF); 35 } 36 37 static void nps_enet_read_rx_fifo(struct net_device *ndev, 38 unsigned char *dst, u32 length) 39 { 40 struct nps_enet_priv *priv = netdev_priv(ndev); 41 s32 i, last = length & (sizeof(u32) - 1); 42 u32 *reg = (u32 *)dst, len = length / sizeof(u32); 43 bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32)); 44 45 /* In case dst is not aligned we need an intermediate buffer */ 46 if (dst_is_aligned) 47 for (i = 0; i < len; i++, reg++) 48 *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF); 49 else { /* !dst_is_aligned */ 50 for (i = 0; i < len; i++, reg++) { 51 u32 buf = 52 nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF); 53 54 /* to accommodate word-unaligned address of "reg" 55 * we have to do memcpy_toio() instead of simple "=". 56 */ 57 memcpy_toio((void __iomem *)reg, &buf, sizeof(buf)); 58 } 59 } 60 61 /* copy last bytes (if any) */ 62 if (last) { 63 u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF); 64 65 memcpy_toio((void __iomem *)reg, &buf, last); 66 } 67 } 68 69 static u32 nps_enet_rx_handler(struct net_device *ndev) 70 { 71 u32 frame_len, err = 0; 72 u32 work_done = 0; 73 struct nps_enet_priv *priv = netdev_priv(ndev); 74 struct sk_buff *skb; 75 struct nps_enet_rx_ctl rx_ctrl; 76 77 rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL); 78 frame_len = rx_ctrl.nr; 79 80 /* Check if we got RX */ 81 if (!rx_ctrl.cr) 82 return work_done; 83 84 /* If we got here there is a work for us */ 85 work_done++; 86 87 /* Check Rx error */ 88 if (rx_ctrl.er) { 89 ndev->stats.rx_errors++; 90 err = 1; 91 } 92 93 /* Check Rx CRC error */ 94 if (rx_ctrl.crc) { 95 ndev->stats.rx_crc_errors++; 96 ndev->stats.rx_dropped++; 97 err = 1; 98 } 99 100 /* Check Frame length Min 64b */ 101 if (unlikely(frame_len < ETH_ZLEN)) { 102 ndev->stats.rx_length_errors++; 103 ndev->stats.rx_dropped++; 104 err = 1; 105 } 106 107 if (err) 108 goto rx_irq_clean; 109 110 /* Skb allocation */ 111 skb = netdev_alloc_skb_ip_align(ndev, frame_len); 112 if (unlikely(!skb)) { 113 ndev->stats.rx_errors++; 114 ndev->stats.rx_dropped++; 115 goto rx_irq_clean; 116 } 117 118 /* Copy frame from Rx fifo into the skb */ 119 nps_enet_read_rx_fifo(ndev, skb->data, frame_len); 120 121 skb_put(skb, frame_len); 122 skb->protocol = eth_type_trans(skb, ndev); 123 skb->ip_summed = CHECKSUM_UNNECESSARY; 124 125 ndev->stats.rx_packets++; 126 ndev->stats.rx_bytes += frame_len; 127 netif_receive_skb(skb); 128 129 goto rx_irq_frame_done; 130 131 rx_irq_clean: 132 /* Clean Rx fifo */ 133 nps_enet_clean_rx_fifo(ndev, frame_len); 134 135 rx_irq_frame_done: 136 /* Ack Rx ctrl register */ 137 nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0); 138 139 return work_done; 140 } 141 142 static void nps_enet_tx_handler(struct net_device *ndev) 143 { 144 struct nps_enet_priv *priv = netdev_priv(ndev); 145 struct nps_enet_tx_ctl tx_ctrl; 146 147 tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL); 148 149 /* Check if we got TX */ 150 if (!priv->tx_packet_sent || tx_ctrl.ct) 151 return; 152 153 /* Check Tx transmit error */ 154 if (unlikely(tx_ctrl.et)) { 155 ndev->stats.tx_errors++; 156 } else { 157 ndev->stats.tx_packets++; 158 ndev->stats.tx_bytes += tx_ctrl.nt; 159 } 160 161 if (priv->tx_skb) { 162 dev_kfree_skb(priv->tx_skb); 163 priv->tx_skb = NULL; 164 } 165 166 priv->tx_packet_sent = false; 167 168 if (netif_queue_stopped(ndev)) 169 netif_wake_queue(ndev); 170 } 171 172 /** 173 * nps_enet_poll - NAPI poll handler. 174 * @napi: Pointer to napi_struct structure. 175 * @budget: How many frames to process on one call. 176 * 177 * returns: Number of processed frames 178 */ 179 static int nps_enet_poll(struct napi_struct *napi, int budget) 180 { 181 struct net_device *ndev = napi->dev; 182 struct nps_enet_priv *priv = netdev_priv(ndev); 183 struct nps_enet_buf_int_enable buf_int_enable; 184 u32 work_done; 185 186 buf_int_enable.rx_rdy = NPS_ENET_ENABLE; 187 buf_int_enable.tx_done = NPS_ENET_ENABLE; 188 nps_enet_tx_handler(ndev); 189 work_done = nps_enet_rx_handler(ndev); 190 if (work_done < budget) { 191 napi_complete(napi); 192 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 193 buf_int_enable.value); 194 } 195 196 return work_done; 197 } 198 199 /** 200 * nps_enet_irq_handler - Global interrupt handler for ENET. 201 * @irq: irq number. 202 * @dev_instance: device instance. 203 * 204 * returns: IRQ_HANDLED for all cases. 205 * 206 * EZchip ENET has 2 interrupt causes, and depending on bits raised in 207 * CTRL registers we may tell what is a reason for interrupt to fire up. 208 * We got one for RX and the other for TX (completion). 209 */ 210 static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance) 211 { 212 struct net_device *ndev = dev_instance; 213 struct nps_enet_priv *priv = netdev_priv(ndev); 214 struct nps_enet_buf_int_cause buf_int_cause; 215 216 buf_int_cause.value = 217 nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE); 218 219 if (buf_int_cause.tx_done || buf_int_cause.rx_rdy) 220 if (likely(napi_schedule_prep(&priv->napi))) { 221 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0); 222 __napi_schedule(&priv->napi); 223 } 224 225 return IRQ_HANDLED; 226 } 227 228 static void nps_enet_set_hw_mac_address(struct net_device *ndev) 229 { 230 struct nps_enet_priv *priv = netdev_priv(ndev); 231 struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1; 232 struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2; 233 234 /* set MAC address in HW */ 235 ge_mac_cfg_1.octet_0 = ndev->dev_addr[0]; 236 ge_mac_cfg_1.octet_1 = ndev->dev_addr[1]; 237 ge_mac_cfg_1.octet_2 = ndev->dev_addr[2]; 238 ge_mac_cfg_1.octet_3 = ndev->dev_addr[3]; 239 ge_mac_cfg_2->octet_4 = ndev->dev_addr[4]; 240 ge_mac_cfg_2->octet_5 = ndev->dev_addr[5]; 241 242 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1, 243 ge_mac_cfg_1.value); 244 245 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, 246 ge_mac_cfg_2->value); 247 } 248 249 /** 250 * nps_enet_hw_reset - Reset the network device. 251 * @ndev: Pointer to the network device. 252 * 253 * This function reset the PCS and TX fifo. 254 * The programming model is to set the relevant reset bits 255 * wait for some time for this to propagate and then unset 256 * the reset bits. This way we ensure that reset procedure 257 * is done successfully by device. 258 */ 259 static void nps_enet_hw_reset(struct net_device *ndev) 260 { 261 struct nps_enet_priv *priv = netdev_priv(ndev); 262 struct nps_enet_ge_rst ge_rst; 263 struct nps_enet_phase_fifo_ctl phase_fifo_ctl; 264 265 ge_rst.value = 0; 266 phase_fifo_ctl.value = 0; 267 /* Pcs reset sequence*/ 268 ge_rst.gmac_0 = NPS_ENET_ENABLE; 269 nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value); 270 usleep_range(10, 20); 271 ge_rst.value = 0; 272 nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value); 273 274 /* Tx fifo reset sequence */ 275 phase_fifo_ctl.rst = NPS_ENET_ENABLE; 276 phase_fifo_ctl.init = NPS_ENET_ENABLE; 277 nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL, 278 phase_fifo_ctl.value); 279 usleep_range(10, 20); 280 phase_fifo_ctl.value = 0; 281 nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL, 282 phase_fifo_ctl.value); 283 } 284 285 static void nps_enet_hw_enable_control(struct net_device *ndev) 286 { 287 struct nps_enet_priv *priv = netdev_priv(ndev); 288 struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0; 289 struct nps_enet_buf_int_enable buf_int_enable; 290 struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2; 291 struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3; 292 s32 max_frame_length; 293 294 ge_mac_cfg_0.value = 0; 295 buf_int_enable.value = 0; 296 /* Enable Rx and Tx statistics */ 297 ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN; 298 299 /* Discard packets with different MAC address */ 300 ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE; 301 302 /* Discard multicast packets */ 303 ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE; 304 305 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, 306 ge_mac_cfg_2->value); 307 308 /* Discard Packets bigger than max frame length */ 309 max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN; 310 if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) { 311 ge_mac_cfg_3->max_len = max_frame_length; 312 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3, 313 ge_mac_cfg_3->value); 314 } 315 316 /* Enable interrupts */ 317 buf_int_enable.rx_rdy = NPS_ENET_ENABLE; 318 buf_int_enable.tx_done = NPS_ENET_ENABLE; 319 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 320 buf_int_enable.value); 321 322 /* Write device MAC address to HW */ 323 nps_enet_set_hw_mac_address(ndev); 324 325 /* Rx and Tx HW features */ 326 ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE; 327 ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE; 328 ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE; 329 330 /* IFG configuration */ 331 ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG; 332 ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG; 333 334 /* preamble configuration */ 335 ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE; 336 ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN; 337 338 /* enable flow control frames */ 339 ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE; 340 ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE; 341 ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR; 342 343 /* Enable Rx and Tx */ 344 ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE; 345 ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE; 346 347 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 348 ge_mac_cfg_0.value); 349 } 350 351 static void nps_enet_hw_disable_control(struct net_device *ndev) 352 { 353 struct nps_enet_priv *priv = netdev_priv(ndev); 354 355 /* Disable interrupts */ 356 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0); 357 358 /* Disable Rx and Tx */ 359 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0); 360 } 361 362 static void nps_enet_send_frame(struct net_device *ndev, 363 struct sk_buff *skb) 364 { 365 struct nps_enet_priv *priv = netdev_priv(ndev); 366 struct nps_enet_tx_ctl tx_ctrl; 367 short length = skb->len; 368 u32 i, len = DIV_ROUND_UP(length, sizeof(u32)); 369 u32 *src = (u32 *)virt_to_phys(skb->data); 370 bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32)); 371 372 tx_ctrl.value = 0; 373 /* In case src is not aligned we need an intermediate buffer */ 374 if (src_is_aligned) 375 for (i = 0; i < len; i++, src++) 376 nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src); 377 else { /* !src_is_aligned */ 378 for (i = 0; i < len; i++, src++) { 379 u32 buf; 380 381 /* to accommodate word-unaligned address of "src" 382 * we have to do memcpy_fromio() instead of simple "=" 383 */ 384 memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf)); 385 nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf); 386 } 387 } 388 /* Write the length of the Frame */ 389 tx_ctrl.nt = length; 390 391 /* Indicate SW is done */ 392 priv->tx_packet_sent = true; 393 tx_ctrl.ct = NPS_ENET_ENABLE; 394 395 /* Send Frame */ 396 nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value); 397 } 398 399 /** 400 * nps_enet_set_mac_address - Set the MAC address for this device. 401 * @ndev: Pointer to net_device structure. 402 * @p: 6 byte Address to be written as MAC address. 403 * 404 * This function copies the HW address from the sockaddr structure to the 405 * net_device structure and updates the address in HW. 406 * 407 * returns: -EBUSY if the net device is busy or 0 if the address is set 408 * successfully. 409 */ 410 static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p) 411 { 412 struct sockaddr *addr = p; 413 s32 res; 414 415 if (netif_running(ndev)) 416 return -EBUSY; 417 418 res = eth_mac_addr(ndev, p); 419 if (!res) { 420 ether_addr_copy(ndev->dev_addr, addr->sa_data); 421 nps_enet_set_hw_mac_address(ndev); 422 } 423 424 return res; 425 } 426 427 /** 428 * nps_enet_set_rx_mode - Change the receive filtering mode. 429 * @ndev: Pointer to the network device. 430 * 431 * This function enables/disables promiscuous mode 432 */ 433 static void nps_enet_set_rx_mode(struct net_device *ndev) 434 { 435 struct nps_enet_priv *priv = netdev_priv(ndev); 436 struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2; 437 438 ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value; 439 440 if (ndev->flags & IFF_PROMISC) { 441 ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE; 442 ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE; 443 } else { 444 ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE; 445 ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE; 446 } 447 448 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value); 449 } 450 451 /** 452 * nps_enet_open - Open the network device. 453 * @ndev: Pointer to the network device. 454 * 455 * returns: 0, on success or non-zero error value on failure. 456 * 457 * This function sets the MAC address, requests and enables an IRQ 458 * for the ENET device and starts the Tx queue. 459 */ 460 static s32 nps_enet_open(struct net_device *ndev) 461 { 462 struct nps_enet_priv *priv = netdev_priv(ndev); 463 s32 err; 464 465 /* Reset private variables */ 466 priv->tx_packet_sent = false; 467 priv->ge_mac_cfg_2.value = 0; 468 priv->ge_mac_cfg_3.value = 0; 469 470 /* ge_mac_cfg_3 default values */ 471 priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH; 472 priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN; 473 474 /* Disable HW device */ 475 nps_enet_hw_disable_control(ndev); 476 477 /* irq Rx allocation */ 478 err = request_irq(priv->irq, nps_enet_irq_handler, 479 0, "enet-rx-tx", ndev); 480 if (err) 481 return err; 482 483 napi_enable(&priv->napi); 484 485 /* Enable HW device */ 486 nps_enet_hw_reset(ndev); 487 nps_enet_hw_enable_control(ndev); 488 489 netif_start_queue(ndev); 490 491 return 0; 492 } 493 494 /** 495 * nps_enet_stop - Close the network device. 496 * @ndev: Pointer to the network device. 497 * 498 * This function stops the Tx queue, disables interrupts for the ENET device. 499 */ 500 static s32 nps_enet_stop(struct net_device *ndev) 501 { 502 struct nps_enet_priv *priv = netdev_priv(ndev); 503 504 napi_disable(&priv->napi); 505 netif_stop_queue(ndev); 506 nps_enet_hw_disable_control(ndev); 507 free_irq(priv->irq, ndev); 508 509 return 0; 510 } 511 512 /** 513 * nps_enet_start_xmit - Starts the data transmission. 514 * @skb: sk_buff pointer that contains data to be Transmitted. 515 * @ndev: Pointer to net_device structure. 516 * 517 * returns: NETDEV_TX_OK, on success 518 * NETDEV_TX_BUSY, if any of the descriptors are not free. 519 * 520 * This function is invoked from upper layers to initiate transmission. 521 */ 522 static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb, 523 struct net_device *ndev) 524 { 525 struct nps_enet_priv *priv = netdev_priv(ndev); 526 527 /* This driver handles one frame at a time */ 528 netif_stop_queue(ndev); 529 530 nps_enet_send_frame(ndev, skb); 531 532 priv->tx_skb = skb; 533 534 return NETDEV_TX_OK; 535 } 536 537 #ifdef CONFIG_NET_POLL_CONTROLLER 538 static void nps_enet_poll_controller(struct net_device *ndev) 539 { 540 disable_irq(ndev->irq); 541 nps_enet_irq_handler(ndev->irq, ndev); 542 enable_irq(ndev->irq); 543 } 544 #endif 545 546 static const struct net_device_ops nps_netdev_ops = { 547 .ndo_open = nps_enet_open, 548 .ndo_stop = nps_enet_stop, 549 .ndo_start_xmit = nps_enet_start_xmit, 550 .ndo_set_mac_address = nps_enet_set_mac_address, 551 .ndo_set_rx_mode = nps_enet_set_rx_mode, 552 #ifdef CONFIG_NET_POLL_CONTROLLER 553 .ndo_poll_controller = nps_enet_poll_controller, 554 #endif 555 }; 556 557 static s32 nps_enet_probe(struct platform_device *pdev) 558 { 559 struct device *dev = &pdev->dev; 560 struct net_device *ndev; 561 struct nps_enet_priv *priv; 562 s32 err = 0; 563 const char *mac_addr; 564 struct resource *res_regs; 565 566 if (!dev->of_node) 567 return -ENODEV; 568 569 ndev = alloc_etherdev(sizeof(struct nps_enet_priv)); 570 if (!ndev) 571 return -ENOMEM; 572 573 platform_set_drvdata(pdev, ndev); 574 SET_NETDEV_DEV(ndev, dev); 575 priv = netdev_priv(ndev); 576 577 /* The EZ NET specific entries in the device structure. */ 578 ndev->netdev_ops = &nps_netdev_ops; 579 ndev->watchdog_timeo = (400 * HZ / 1000); 580 /* FIXME :: no multicast support yet */ 581 ndev->flags &= ~IFF_MULTICAST; 582 583 res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 584 priv->regs_base = devm_ioremap_resource(dev, res_regs); 585 if (IS_ERR(priv->regs_base)) { 586 err = PTR_ERR(priv->regs_base); 587 goto out_netdev; 588 } 589 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base); 590 591 /* set kernel MAC address to dev */ 592 mac_addr = of_get_mac_address(dev->of_node); 593 if (mac_addr) 594 ether_addr_copy(ndev->dev_addr, mac_addr); 595 else 596 eth_hw_addr_random(ndev); 597 598 /* Get IRQ number */ 599 priv->irq = platform_get_irq(pdev, 0); 600 if (!priv->irq) { 601 dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n"); 602 err = -ENODEV; 603 goto out_netdev; 604 } 605 606 netif_napi_add(ndev, &priv->napi, nps_enet_poll, 607 NPS_ENET_NAPI_POLL_WEIGHT); 608 609 /* Register the driver. Should be the last thing in probe */ 610 err = register_netdev(ndev); 611 if (err) { 612 dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n", 613 ndev->name, (s32)err); 614 goto out_netif_api; 615 } 616 617 dev_info(dev, "(rx/tx=%d)\n", priv->irq); 618 return 0; 619 620 out_netif_api: 621 netif_napi_del(&priv->napi); 622 out_netdev: 623 if (err) 624 free_netdev(ndev); 625 626 return err; 627 } 628 629 static s32 nps_enet_remove(struct platform_device *pdev) 630 { 631 struct net_device *ndev = platform_get_drvdata(pdev); 632 struct nps_enet_priv *priv = netdev_priv(ndev); 633 634 unregister_netdev(ndev); 635 free_netdev(ndev); 636 netif_napi_del(&priv->napi); 637 638 return 0; 639 } 640 641 static const struct of_device_id nps_enet_dt_ids[] = { 642 { .compatible = "ezchip,nps-mgt-enet" }, 643 { /* Sentinel */ } 644 }; 645 646 static struct platform_driver nps_enet_driver = { 647 .probe = nps_enet_probe, 648 .remove = nps_enet_remove, 649 .driver = { 650 .name = DRV_NAME, 651 .of_match_table = nps_enet_dt_ids, 652 }, 653 }; 654 655 module_platform_driver(nps_enet_driver); 656 657 MODULE_AUTHOR("EZchip Semiconductor"); 658 MODULE_LICENSE("GPL v2"); 659