1 /* 2 * Copyright (C) 2005 - 2015 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 /* 19 * The driver sends configuration and managements command requests to the 20 * firmware in the BE. These requests are communicated to the processor 21 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one 22 * WRB inside a MAILBOX. 23 * The commands are serviced by the ARM processor in the BladeEngine's MPU. 24 */ 25 26 struct be_sge { 27 u32 pa_lo; 28 u32 pa_hi; 29 u32 len; 30 }; 31 32 #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/ 33 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */ 34 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */ 35 struct be_mcc_wrb { 36 u32 embedded; /* dword 0 */ 37 u32 payload_length; /* dword 1 */ 38 u32 tag0; /* dword 2 */ 39 u32 tag1; /* dword 3 */ 40 u32 rsvd; /* dword 4 */ 41 union { 42 u8 embedded_payload[236]; /* used by embedded cmds */ 43 struct be_sge sgl[19]; /* used by non-embedded cmds */ 44 } payload; 45 }; 46 47 #define CQE_FLAGS_VALID_MASK BIT(31) 48 #define CQE_FLAGS_ASYNC_MASK BIT(30) 49 #define CQE_FLAGS_COMPLETED_MASK BIT(28) 50 #define CQE_FLAGS_CONSUMED_MASK BIT(27) 51 52 /* Completion Status */ 53 enum mcc_base_status { 54 MCC_STATUS_SUCCESS = 0, 55 MCC_STATUS_FAILED = 1, 56 MCC_STATUS_ILLEGAL_REQUEST = 2, 57 MCC_STATUS_ILLEGAL_FIELD = 3, 58 MCC_STATUS_INSUFFICIENT_BUFFER = 4, 59 MCC_STATUS_UNAUTHORIZED_REQUEST = 5, 60 MCC_STATUS_NOT_SUPPORTED = 66, 61 MCC_STATUS_FEATURE_NOT_SUPPORTED = 68 62 }; 63 64 /* Additional status */ 65 enum mcc_addl_status { 66 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16, 67 MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d, 68 MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a, 69 MCC_ADDL_STATUS_INSUFFICIENT_VLANS = 0xab 70 }; 71 72 #define CQE_BASE_STATUS_MASK 0xFFFF 73 #define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */ 74 #define CQE_ADDL_STATUS_MASK 0xFF 75 #define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */ 76 77 #define base_status(status) \ 78 ((enum mcc_base_status) \ 79 (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0)) 80 #define addl_status(status) \ 81 ((enum mcc_addl_status) \ 82 (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \ 83 CQE_ADDL_STATUS_MASK : 0)) 84 85 struct be_mcc_compl { 86 u32 status; /* dword 0 */ 87 u32 tag0; /* dword 1 */ 88 u32 tag1; /* dword 2 */ 89 u32 flags; /* dword 3 */ 90 }; 91 92 /* When the async bit of mcc_compl flags is set, flags 93 * is interpreted as follows: 94 */ 95 #define ASYNC_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */ 96 #define ASYNC_EVENT_CODE_MASK 0xFF 97 #define ASYNC_EVENT_TYPE_SHIFT 16 98 #define ASYNC_EVENT_TYPE_MASK 0xFF 99 #define ASYNC_EVENT_CODE_LINK_STATE 0x1 100 #define ASYNC_EVENT_CODE_GRP_5 0x5 101 #define ASYNC_EVENT_QOS_SPEED 0x1 102 #define ASYNC_EVENT_COS_PRIORITY 0x2 103 #define ASYNC_EVENT_PVID_STATE 0x3 104 #define ASYNC_EVENT_CODE_QNQ 0x6 105 #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1 106 #define ASYNC_EVENT_CODE_SLIPORT 0x11 107 #define ASYNC_EVENT_PORT_MISCONFIG 0x9 108 #define ASYNC_EVENT_FW_CONTROL 0x5 109 110 enum { 111 LINK_DOWN = 0x0, 112 LINK_UP = 0x1 113 }; 114 #define LINK_STATUS_MASK 0x1 115 #define LOGICAL_LINK_STATUS_MASK 0x2 116 117 /* When the event code of compl->flags is link-state, the mcc_compl 118 * must be interpreted as follows 119 */ 120 struct be_async_event_link_state { 121 u8 physical_port; 122 u8 port_link_status; 123 u8 port_duplex; 124 u8 port_speed; 125 u8 port_fault; 126 u8 rsvd0[7]; 127 u32 flags; 128 } __packed; 129 130 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED 131 * the mcc_compl must be interpreted as follows 132 */ 133 struct be_async_event_grp5_qos_link_speed { 134 u8 physical_port; 135 u8 rsvd[5]; 136 u16 qos_link_speed; 137 u32 event_tag; 138 u32 flags; 139 } __packed; 140 141 /* When the event code of compl->flags is GRP5 and event type is 142 * CoS-Priority, the mcc_compl must be interpreted as follows 143 */ 144 struct be_async_event_grp5_cos_priority { 145 u8 physical_port; 146 u8 available_priority_bmap; 147 u8 reco_default_priority; 148 u8 valid; 149 u8 rsvd0; 150 u8 event_tag; 151 u32 flags; 152 } __packed; 153 154 /* When the event code of compl->flags is GRP5 and event type is 155 * PVID state, the mcc_compl must be interpreted as follows 156 */ 157 struct be_async_event_grp5_pvid_state { 158 u8 enabled; 159 u8 rsvd0; 160 u16 tag; 161 u32 event_tag; 162 u32 rsvd1; 163 u32 flags; 164 } __packed; 165 166 /* async event indicating outer VLAN tag in QnQ */ 167 struct be_async_event_qnq { 168 u8 valid; /* Indicates if outer VLAN is valid */ 169 u8 rsvd0; 170 u16 vlan_tag; 171 u32 event_tag; 172 u8 rsvd1[4]; 173 u32 flags; 174 } __packed; 175 176 #define INCOMPATIBLE_SFP 0x3 177 /* async event indicating misconfigured port */ 178 struct be_async_event_misconfig_port { 179 u32 event_data_word1; 180 u32 event_data_word2; 181 u32 rsvd0; 182 u32 flags; 183 } __packed; 184 185 #define BMC_FILT_BROADCAST_ARP BIT(0) 186 #define BMC_FILT_BROADCAST_DHCP_CLIENT BIT(1) 187 #define BMC_FILT_BROADCAST_DHCP_SERVER BIT(2) 188 #define BMC_FILT_BROADCAST_NET_BIOS BIT(3) 189 #define BMC_FILT_BROADCAST BIT(7) 190 #define BMC_FILT_MULTICAST_IPV6_NEIGH_ADVER BIT(8) 191 #define BMC_FILT_MULTICAST_IPV6_RA BIT(9) 192 #define BMC_FILT_MULTICAST_IPV6_RAS BIT(10) 193 #define BMC_FILT_MULTICAST BIT(15) 194 struct be_async_fw_control { 195 u32 event_data_word1; 196 u32 event_data_word2; 197 u32 evt_tag; 198 u32 event_data_word4; 199 } __packed; 200 201 struct be_mcc_mailbox { 202 struct be_mcc_wrb wrb; 203 struct be_mcc_compl compl; 204 }; 205 206 #define CMD_SUBSYSTEM_COMMON 0x1 207 #define CMD_SUBSYSTEM_ETH 0x3 208 #define CMD_SUBSYSTEM_LOWLEVEL 0xb 209 210 #define OPCODE_COMMON_NTWK_MAC_QUERY 1 211 #define OPCODE_COMMON_NTWK_MAC_SET 2 212 #define OPCODE_COMMON_NTWK_MULTICAST_SET 3 213 #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4 214 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5 215 #define OPCODE_COMMON_READ_FLASHROM 6 216 #define OPCODE_COMMON_WRITE_FLASHROM 7 217 #define OPCODE_COMMON_CQ_CREATE 12 218 #define OPCODE_COMMON_EQ_CREATE 13 219 #define OPCODE_COMMON_MCC_CREATE 21 220 #define OPCODE_COMMON_SET_QOS 28 221 #define OPCODE_COMMON_MCC_CREATE_EXT 90 222 #define OPCODE_COMMON_SEEPROM_READ 30 223 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32 224 #define OPCODE_COMMON_NTWK_RX_FILTER 34 225 #define OPCODE_COMMON_GET_FW_VERSION 35 226 #define OPCODE_COMMON_SET_FLOW_CONTROL 36 227 #define OPCODE_COMMON_GET_FLOW_CONTROL 37 228 #define OPCODE_COMMON_SET_FRAME_SIZE 39 229 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 230 #define OPCODE_COMMON_FIRMWARE_CONFIG 42 231 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50 232 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51 233 #define OPCODE_COMMON_MCC_DESTROY 53 234 #define OPCODE_COMMON_CQ_DESTROY 54 235 #define OPCODE_COMMON_EQ_DESTROY 55 236 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58 237 #define OPCODE_COMMON_NTWK_PMAC_ADD 59 238 #define OPCODE_COMMON_NTWK_PMAC_DEL 60 239 #define OPCODE_COMMON_FUNCTION_RESET 61 240 #define OPCODE_COMMON_MANAGE_FAT 68 241 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69 242 #define OPCODE_COMMON_GET_BEACON_STATE 70 243 #define OPCODE_COMMON_READ_TRANSRECV_DATA 73 244 #define OPCODE_COMMON_GET_PORT_NAME 77 245 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG 80 246 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89 247 #define OPCODE_COMMON_SET_FN_PRIVILEGES 100 248 #define OPCODE_COMMON_GET_PHY_DETAILS 102 249 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103 250 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121 251 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES 125 252 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES 126 253 #define OPCODE_COMMON_GET_MAC_LIST 147 254 #define OPCODE_COMMON_SET_MAC_LIST 148 255 #define OPCODE_COMMON_GET_HSW_CONFIG 152 256 #define OPCODE_COMMON_GET_FUNC_CONFIG 160 257 #define OPCODE_COMMON_GET_PROFILE_CONFIG 164 258 #define OPCODE_COMMON_SET_PROFILE_CONFIG 165 259 #define OPCODE_COMMON_GET_ACTIVE_PROFILE 167 260 #define OPCODE_COMMON_SET_HSW_CONFIG 153 261 #define OPCODE_COMMON_GET_FN_PRIVILEGES 170 262 #define OPCODE_COMMON_READ_OBJECT 171 263 #define OPCODE_COMMON_WRITE_OBJECT 172 264 #define OPCODE_COMMON_DELETE_OBJECT 174 265 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS 193 266 #define OPCODE_COMMON_GET_IFACE_LIST 194 267 #define OPCODE_COMMON_ENABLE_DISABLE_VF 196 268 269 #define OPCODE_ETH_RSS_CONFIG 1 270 #define OPCODE_ETH_ACPI_CONFIG 2 271 #define OPCODE_ETH_PROMISCUOUS 3 272 #define OPCODE_ETH_GET_STATISTICS 4 273 #define OPCODE_ETH_TX_CREATE 7 274 #define OPCODE_ETH_RX_CREATE 8 275 #define OPCODE_ETH_TX_DESTROY 9 276 #define OPCODE_ETH_RX_DESTROY 10 277 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12 278 #define OPCODE_ETH_GET_PPORT_STATS 18 279 280 #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17 281 #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18 282 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19 283 284 struct be_cmd_req_hdr { 285 u8 opcode; /* dword 0 */ 286 u8 subsystem; /* dword 0 */ 287 u8 port_number; /* dword 0 */ 288 u8 domain; /* dword 0 */ 289 u32 timeout; /* dword 1 */ 290 u32 request_length; /* dword 2 */ 291 u8 version; /* dword 3 */ 292 u8 rsvd[3]; /* dword 3 */ 293 }; 294 295 #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */ 296 #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */ 297 struct be_cmd_resp_hdr { 298 u8 opcode; /* dword 0 */ 299 u8 subsystem; /* dword 0 */ 300 u8 rsvd[2]; /* dword 0 */ 301 u8 base_status; /* dword 1 */ 302 u8 addl_status; /* dword 1 */ 303 u8 rsvd1[2]; /* dword 1 */ 304 u32 response_length; /* dword 2 */ 305 u32 actual_resp_len; /* dword 3 */ 306 }; 307 308 struct phys_addr { 309 u32 lo; 310 u32 hi; 311 }; 312 313 /************************** 314 * BE Command definitions * 315 **************************/ 316 317 /* Pseudo amap definition in which each bit of the actual structure is defined 318 * as a byte: used to calculate offset/shift/mask of each field */ 319 struct amap_eq_context { 320 u8 cidx[13]; /* dword 0*/ 321 u8 rsvd0[3]; /* dword 0*/ 322 u8 epidx[13]; /* dword 0*/ 323 u8 valid; /* dword 0*/ 324 u8 rsvd1; /* dword 0*/ 325 u8 size; /* dword 0*/ 326 u8 pidx[13]; /* dword 1*/ 327 u8 rsvd2[3]; /* dword 1*/ 328 u8 pd[10]; /* dword 1*/ 329 u8 count[3]; /* dword 1*/ 330 u8 solevent; /* dword 1*/ 331 u8 stalled; /* dword 1*/ 332 u8 armed; /* dword 1*/ 333 u8 rsvd3[4]; /* dword 2*/ 334 u8 func[8]; /* dword 2*/ 335 u8 rsvd4; /* dword 2*/ 336 u8 delaymult[10]; /* dword 2*/ 337 u8 rsvd5[2]; /* dword 2*/ 338 u8 phase[2]; /* dword 2*/ 339 u8 nodelay; /* dword 2*/ 340 u8 rsvd6[4]; /* dword 2*/ 341 u8 rsvd7[32]; /* dword 3*/ 342 } __packed; 343 344 struct be_cmd_req_eq_create { 345 struct be_cmd_req_hdr hdr; 346 u16 num_pages; /* sword */ 347 u16 rsvd0; /* sword */ 348 u8 context[sizeof(struct amap_eq_context) / 8]; 349 struct phys_addr pages[8]; 350 } __packed; 351 352 struct be_cmd_resp_eq_create { 353 struct be_cmd_resp_hdr resp_hdr; 354 u16 eq_id; /* sword */ 355 u16 msix_idx; /* available only in v2 */ 356 } __packed; 357 358 /******************** Mac query ***************************/ 359 enum { 360 MAC_ADDRESS_TYPE_STORAGE = 0x0, 361 MAC_ADDRESS_TYPE_NETWORK = 0x1, 362 MAC_ADDRESS_TYPE_PD = 0x2, 363 MAC_ADDRESS_TYPE_MANAGEMENT = 0x3 364 }; 365 366 struct mac_addr { 367 u16 size_of_struct; 368 u8 addr[ETH_ALEN]; 369 } __packed; 370 371 struct be_cmd_req_mac_query { 372 struct be_cmd_req_hdr hdr; 373 u8 type; 374 u8 permanent; 375 u16 if_id; 376 u32 pmac_id; 377 } __packed; 378 379 struct be_cmd_resp_mac_query { 380 struct be_cmd_resp_hdr hdr; 381 struct mac_addr mac; 382 }; 383 384 /******************** PMac Add ***************************/ 385 struct be_cmd_req_pmac_add { 386 struct be_cmd_req_hdr hdr; 387 u32 if_id; 388 u8 mac_address[ETH_ALEN]; 389 u8 rsvd0[2]; 390 } __packed; 391 392 struct be_cmd_resp_pmac_add { 393 struct be_cmd_resp_hdr hdr; 394 u32 pmac_id; 395 }; 396 397 /******************** PMac Del ***************************/ 398 struct be_cmd_req_pmac_del { 399 struct be_cmd_req_hdr hdr; 400 u32 if_id; 401 u32 pmac_id; 402 }; 403 404 /******************** Create CQ ***************************/ 405 /* Pseudo amap definition in which each bit of the actual structure is defined 406 * as a byte: used to calculate offset/shift/mask of each field */ 407 struct amap_cq_context_be { 408 u8 cidx[11]; /* dword 0*/ 409 u8 rsvd0; /* dword 0*/ 410 u8 coalescwm[2]; /* dword 0*/ 411 u8 nodelay; /* dword 0*/ 412 u8 epidx[11]; /* dword 0*/ 413 u8 rsvd1; /* dword 0*/ 414 u8 count[2]; /* dword 0*/ 415 u8 valid; /* dword 0*/ 416 u8 solevent; /* dword 0*/ 417 u8 eventable; /* dword 0*/ 418 u8 pidx[11]; /* dword 1*/ 419 u8 rsvd2; /* dword 1*/ 420 u8 pd[10]; /* dword 1*/ 421 u8 eqid[8]; /* dword 1*/ 422 u8 stalled; /* dword 1*/ 423 u8 armed; /* dword 1*/ 424 u8 rsvd3[4]; /* dword 2*/ 425 u8 func[8]; /* dword 2*/ 426 u8 rsvd4[20]; /* dword 2*/ 427 u8 rsvd5[32]; /* dword 3*/ 428 } __packed; 429 430 struct amap_cq_context_v2 { 431 u8 rsvd0[12]; /* dword 0*/ 432 u8 coalescwm[2]; /* dword 0*/ 433 u8 nodelay; /* dword 0*/ 434 u8 rsvd1[12]; /* dword 0*/ 435 u8 count[2]; /* dword 0*/ 436 u8 valid; /* dword 0*/ 437 u8 rsvd2; /* dword 0*/ 438 u8 eventable; /* dword 0*/ 439 u8 eqid[16]; /* dword 1*/ 440 u8 rsvd3[15]; /* dword 1*/ 441 u8 armed; /* dword 1*/ 442 u8 rsvd4[32]; /* dword 2*/ 443 u8 rsvd5[32]; /* dword 3*/ 444 } __packed; 445 446 struct be_cmd_req_cq_create { 447 struct be_cmd_req_hdr hdr; 448 u16 num_pages; 449 u8 page_size; 450 u8 rsvd0; 451 u8 context[sizeof(struct amap_cq_context_be) / 8]; 452 struct phys_addr pages[8]; 453 } __packed; 454 455 456 struct be_cmd_resp_cq_create { 457 struct be_cmd_resp_hdr hdr; 458 u16 cq_id; 459 u16 rsvd0; 460 } __packed; 461 462 struct be_cmd_req_get_fat { 463 struct be_cmd_req_hdr hdr; 464 u32 fat_operation; 465 u32 read_log_offset; 466 u32 read_log_length; 467 u32 data_buffer_size; 468 u32 data_buffer[1]; 469 } __packed; 470 471 struct be_cmd_resp_get_fat { 472 struct be_cmd_resp_hdr hdr; 473 u32 log_size; 474 u32 read_log_length; 475 u32 rsvd[2]; 476 u32 data_buffer[1]; 477 } __packed; 478 479 480 /******************** Create MCCQ ***************************/ 481 /* Pseudo amap definition in which each bit of the actual structure is defined 482 * as a byte: used to calculate offset/shift/mask of each field */ 483 struct amap_mcc_context_be { 484 u8 con_index[14]; 485 u8 rsvd0[2]; 486 u8 ring_size[4]; 487 u8 fetch_wrb; 488 u8 fetch_r2t; 489 u8 cq_id[10]; 490 u8 prod_index[14]; 491 u8 fid[8]; 492 u8 pdid[9]; 493 u8 valid; 494 u8 rsvd1[32]; 495 u8 rsvd2[32]; 496 } __packed; 497 498 struct amap_mcc_context_v1 { 499 u8 async_cq_id[16]; 500 u8 ring_size[4]; 501 u8 rsvd0[12]; 502 u8 rsvd1[31]; 503 u8 valid; 504 u8 async_cq_valid[1]; 505 u8 rsvd2[31]; 506 u8 rsvd3[32]; 507 } __packed; 508 509 struct be_cmd_req_mcc_create { 510 struct be_cmd_req_hdr hdr; 511 u16 num_pages; 512 u16 cq_id; 513 u8 context[sizeof(struct amap_mcc_context_be) / 8]; 514 struct phys_addr pages[8]; 515 } __packed; 516 517 struct be_cmd_req_mcc_ext_create { 518 struct be_cmd_req_hdr hdr; 519 u16 num_pages; 520 u16 cq_id; 521 u32 async_event_bitmap[1]; 522 u8 context[sizeof(struct amap_mcc_context_v1) / 8]; 523 struct phys_addr pages[8]; 524 } __packed; 525 526 struct be_cmd_resp_mcc_create { 527 struct be_cmd_resp_hdr hdr; 528 u16 id; 529 u16 rsvd0; 530 } __packed; 531 532 /******************** Create TxQ ***************************/ 533 #define BE_ETH_TX_RING_TYPE_STANDARD 2 534 #define BE_ULP1_NUM 1 535 536 struct be_cmd_req_eth_tx_create { 537 struct be_cmd_req_hdr hdr; 538 u8 num_pages; 539 u8 ulp_num; 540 u16 type; 541 u16 if_id; 542 u8 queue_size; 543 u8 rsvd0; 544 u32 rsvd1; 545 u16 cq_id; 546 u16 rsvd2; 547 u32 rsvd3[13]; 548 struct phys_addr pages[8]; 549 } __packed; 550 551 struct be_cmd_resp_eth_tx_create { 552 struct be_cmd_resp_hdr hdr; 553 u16 cid; 554 u16 rid; 555 u32 db_offset; 556 u32 rsvd0[4]; 557 } __packed; 558 559 /******************** Create RxQ ***************************/ 560 struct be_cmd_req_eth_rx_create { 561 struct be_cmd_req_hdr hdr; 562 u16 cq_id; 563 u8 frag_size; 564 u8 num_pages; 565 struct phys_addr pages[2]; 566 u32 interface_id; 567 u16 max_frame_size; 568 u16 rsvd0; 569 u32 rss_queue; 570 } __packed; 571 572 struct be_cmd_resp_eth_rx_create { 573 struct be_cmd_resp_hdr hdr; 574 u16 id; 575 u8 rss_id; 576 u8 rsvd0; 577 } __packed; 578 579 /******************** Q Destroy ***************************/ 580 /* Type of Queue to be destroyed */ 581 enum { 582 QTYPE_EQ = 1, 583 QTYPE_CQ, 584 QTYPE_TXQ, 585 QTYPE_RXQ, 586 QTYPE_MCCQ 587 }; 588 589 struct be_cmd_req_q_destroy { 590 struct be_cmd_req_hdr hdr; 591 u16 id; 592 u16 bypass_flush; /* valid only for rx q destroy */ 593 } __packed; 594 595 /************ I/f Create (it's actually I/f Config Create)**********/ 596 597 /* Capability flags for the i/f */ 598 enum be_if_flags { 599 BE_IF_FLAGS_RSS = 0x4, 600 BE_IF_FLAGS_PROMISCUOUS = 0x8, 601 BE_IF_FLAGS_BROADCAST = 0x10, 602 BE_IF_FLAGS_UNTAGGED = 0x20, 603 BE_IF_FLAGS_ULP = 0x40, 604 BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80, 605 BE_IF_FLAGS_VLAN = 0x100, 606 BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200, 607 BE_IF_FLAGS_PASS_L2_ERRORS = 0x400, 608 BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800, 609 BE_IF_FLAGS_MULTICAST = 0x1000, 610 BE_IF_FLAGS_DEFQ_RSS = 0x1000000 611 }; 612 613 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\ 614 BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\ 615 BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\ 616 BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\ 617 BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_DEFQ_RSS) 618 619 #define BE_IF_FLAGS_ALL_PROMISCUOUS (BE_IF_FLAGS_PROMISCUOUS | \ 620 BE_IF_FLAGS_VLAN_PROMISCUOUS |\ 621 BE_IF_FLAGS_MCAST_PROMISCUOUS) 622 623 #define BE_IF_EN_FLAGS (BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |\ 624 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_UNTAGGED) 625 626 #define BE_IF_ALL_FILT_FLAGS (BE_IF_EN_FLAGS | BE_IF_FLAGS_ALL_PROMISCUOUS) 627 628 /* An RX interface is an object with one or more MAC addresses and 629 * filtering capabilities. */ 630 struct be_cmd_req_if_create { 631 struct be_cmd_req_hdr hdr; 632 u32 version; /* ignore currently */ 633 u32 capability_flags; 634 u32 enable_flags; 635 u8 mac_addr[ETH_ALEN]; 636 u8 rsvd0; 637 u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */ 638 u32 vlan_tag; /* not used currently */ 639 } __packed; 640 641 struct be_cmd_resp_if_create { 642 struct be_cmd_resp_hdr hdr; 643 u32 interface_id; 644 u32 pmac_id; 645 }; 646 647 /****** I/f Destroy(it's actually I/f Config Destroy )**********/ 648 struct be_cmd_req_if_destroy { 649 struct be_cmd_req_hdr hdr; 650 u32 interface_id; 651 }; 652 653 /*************** HW Stats Get **********************************/ 654 struct be_port_rxf_stats_v0 { 655 u32 rx_bytes_lsd; /* dword 0*/ 656 u32 rx_bytes_msd; /* dword 1*/ 657 u32 rx_total_frames; /* dword 2*/ 658 u32 rx_unicast_frames; /* dword 3*/ 659 u32 rx_multicast_frames; /* dword 4*/ 660 u32 rx_broadcast_frames; /* dword 5*/ 661 u32 rx_crc_errors; /* dword 6*/ 662 u32 rx_alignment_symbol_errors; /* dword 7*/ 663 u32 rx_pause_frames; /* dword 8*/ 664 u32 rx_control_frames; /* dword 9*/ 665 u32 rx_in_range_errors; /* dword 10*/ 666 u32 rx_out_range_errors; /* dword 11*/ 667 u32 rx_frame_too_long; /* dword 12*/ 668 u32 rx_address_filtered; /* dword 13*/ 669 u32 rx_vlan_filtered; /* dword 14*/ 670 u32 rx_dropped_too_small; /* dword 15*/ 671 u32 rx_dropped_too_short; /* dword 16*/ 672 u32 rx_dropped_header_too_small; /* dword 17*/ 673 u32 rx_dropped_tcp_length; /* dword 18*/ 674 u32 rx_dropped_runt; /* dword 19*/ 675 u32 rx_64_byte_packets; /* dword 20*/ 676 u32 rx_65_127_byte_packets; /* dword 21*/ 677 u32 rx_128_256_byte_packets; /* dword 22*/ 678 u32 rx_256_511_byte_packets; /* dword 23*/ 679 u32 rx_512_1023_byte_packets; /* dword 24*/ 680 u32 rx_1024_1518_byte_packets; /* dword 25*/ 681 u32 rx_1519_2047_byte_packets; /* dword 26*/ 682 u32 rx_2048_4095_byte_packets; /* dword 27*/ 683 u32 rx_4096_8191_byte_packets; /* dword 28*/ 684 u32 rx_8192_9216_byte_packets; /* dword 29*/ 685 u32 rx_ip_checksum_errs; /* dword 30*/ 686 u32 rx_tcp_checksum_errs; /* dword 31*/ 687 u32 rx_udp_checksum_errs; /* dword 32*/ 688 u32 rx_non_rss_packets; /* dword 33*/ 689 u32 rx_ipv4_packets; /* dword 34*/ 690 u32 rx_ipv6_packets; /* dword 35*/ 691 u32 rx_ipv4_bytes_lsd; /* dword 36*/ 692 u32 rx_ipv4_bytes_msd; /* dword 37*/ 693 u32 rx_ipv6_bytes_lsd; /* dword 38*/ 694 u32 rx_ipv6_bytes_msd; /* dword 39*/ 695 u32 rx_chute1_packets; /* dword 40*/ 696 u32 rx_chute2_packets; /* dword 41*/ 697 u32 rx_chute3_packets; /* dword 42*/ 698 u32 rx_management_packets; /* dword 43*/ 699 u32 rx_switched_unicast_packets; /* dword 44*/ 700 u32 rx_switched_multicast_packets; /* dword 45*/ 701 u32 rx_switched_broadcast_packets; /* dword 46*/ 702 u32 tx_bytes_lsd; /* dword 47*/ 703 u32 tx_bytes_msd; /* dword 48*/ 704 u32 tx_unicastframes; /* dword 49*/ 705 u32 tx_multicastframes; /* dword 50*/ 706 u32 tx_broadcastframes; /* dword 51*/ 707 u32 tx_pauseframes; /* dword 52*/ 708 u32 tx_controlframes; /* dword 53*/ 709 u32 tx_64_byte_packets; /* dword 54*/ 710 u32 tx_65_127_byte_packets; /* dword 55*/ 711 u32 tx_128_256_byte_packets; /* dword 56*/ 712 u32 tx_256_511_byte_packets; /* dword 57*/ 713 u32 tx_512_1023_byte_packets; /* dword 58*/ 714 u32 tx_1024_1518_byte_packets; /* dword 59*/ 715 u32 tx_1519_2047_byte_packets; /* dword 60*/ 716 u32 tx_2048_4095_byte_packets; /* dword 61*/ 717 u32 tx_4096_8191_byte_packets; /* dword 62*/ 718 u32 tx_8192_9216_byte_packets; /* dword 63*/ 719 u32 rx_fifo_overflow; /* dword 64*/ 720 u32 rx_input_fifo_overflow; /* dword 65*/ 721 }; 722 723 struct be_rxf_stats_v0 { 724 struct be_port_rxf_stats_v0 port[2]; 725 u32 rx_drops_no_pbuf; /* dword 132*/ 726 u32 rx_drops_no_txpb; /* dword 133*/ 727 u32 rx_drops_no_erx_descr; /* dword 134*/ 728 u32 rx_drops_no_tpre_descr; /* dword 135*/ 729 u32 management_rx_port_packets; /* dword 136*/ 730 u32 management_rx_port_bytes; /* dword 137*/ 731 u32 management_rx_port_pause_frames; /* dword 138*/ 732 u32 management_rx_port_errors; /* dword 139*/ 733 u32 management_tx_port_packets; /* dword 140*/ 734 u32 management_tx_port_bytes; /* dword 141*/ 735 u32 management_tx_port_pause; /* dword 142*/ 736 u32 management_rx_port_rxfifo_overflow; /* dword 143*/ 737 u32 rx_drops_too_many_frags; /* dword 144*/ 738 u32 rx_drops_invalid_ring; /* dword 145*/ 739 u32 forwarded_packets; /* dword 146*/ 740 u32 rx_drops_mtu; /* dword 147*/ 741 u32 rsvd0[7]; 742 u32 port0_jabber_events; 743 u32 port1_jabber_events; 744 u32 rsvd1[6]; 745 }; 746 747 struct be_erx_stats_v0 { 748 u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/ 749 u32 rsvd[4]; 750 }; 751 752 struct be_pmem_stats { 753 u32 eth_red_drops; 754 u32 rsvd[5]; 755 }; 756 757 struct be_hw_stats_v0 { 758 struct be_rxf_stats_v0 rxf; 759 u32 rsvd[48]; 760 struct be_erx_stats_v0 erx; 761 struct be_pmem_stats pmem; 762 }; 763 764 struct be_cmd_req_get_stats_v0 { 765 struct be_cmd_req_hdr hdr; 766 u8 rsvd[sizeof(struct be_hw_stats_v0)]; 767 }; 768 769 struct be_cmd_resp_get_stats_v0 { 770 struct be_cmd_resp_hdr hdr; 771 struct be_hw_stats_v0 hw_stats; 772 }; 773 774 struct lancer_pport_stats { 775 u32 tx_packets_lo; 776 u32 tx_packets_hi; 777 u32 tx_unicast_packets_lo; 778 u32 tx_unicast_packets_hi; 779 u32 tx_multicast_packets_lo; 780 u32 tx_multicast_packets_hi; 781 u32 tx_broadcast_packets_lo; 782 u32 tx_broadcast_packets_hi; 783 u32 tx_bytes_lo; 784 u32 tx_bytes_hi; 785 u32 tx_unicast_bytes_lo; 786 u32 tx_unicast_bytes_hi; 787 u32 tx_multicast_bytes_lo; 788 u32 tx_multicast_bytes_hi; 789 u32 tx_broadcast_bytes_lo; 790 u32 tx_broadcast_bytes_hi; 791 u32 tx_discards_lo; 792 u32 tx_discards_hi; 793 u32 tx_errors_lo; 794 u32 tx_errors_hi; 795 u32 tx_pause_frames_lo; 796 u32 tx_pause_frames_hi; 797 u32 tx_pause_on_frames_lo; 798 u32 tx_pause_on_frames_hi; 799 u32 tx_pause_off_frames_lo; 800 u32 tx_pause_off_frames_hi; 801 u32 tx_internal_mac_errors_lo; 802 u32 tx_internal_mac_errors_hi; 803 u32 tx_control_frames_lo; 804 u32 tx_control_frames_hi; 805 u32 tx_packets_64_bytes_lo; 806 u32 tx_packets_64_bytes_hi; 807 u32 tx_packets_65_to_127_bytes_lo; 808 u32 tx_packets_65_to_127_bytes_hi; 809 u32 tx_packets_128_to_255_bytes_lo; 810 u32 tx_packets_128_to_255_bytes_hi; 811 u32 tx_packets_256_to_511_bytes_lo; 812 u32 tx_packets_256_to_511_bytes_hi; 813 u32 tx_packets_512_to_1023_bytes_lo; 814 u32 tx_packets_512_to_1023_bytes_hi; 815 u32 tx_packets_1024_to_1518_bytes_lo; 816 u32 tx_packets_1024_to_1518_bytes_hi; 817 u32 tx_packets_1519_to_2047_bytes_lo; 818 u32 tx_packets_1519_to_2047_bytes_hi; 819 u32 tx_packets_2048_to_4095_bytes_lo; 820 u32 tx_packets_2048_to_4095_bytes_hi; 821 u32 tx_packets_4096_to_8191_bytes_lo; 822 u32 tx_packets_4096_to_8191_bytes_hi; 823 u32 tx_packets_8192_to_9216_bytes_lo; 824 u32 tx_packets_8192_to_9216_bytes_hi; 825 u32 tx_lso_packets_lo; 826 u32 tx_lso_packets_hi; 827 u32 rx_packets_lo; 828 u32 rx_packets_hi; 829 u32 rx_unicast_packets_lo; 830 u32 rx_unicast_packets_hi; 831 u32 rx_multicast_packets_lo; 832 u32 rx_multicast_packets_hi; 833 u32 rx_broadcast_packets_lo; 834 u32 rx_broadcast_packets_hi; 835 u32 rx_bytes_lo; 836 u32 rx_bytes_hi; 837 u32 rx_unicast_bytes_lo; 838 u32 rx_unicast_bytes_hi; 839 u32 rx_multicast_bytes_lo; 840 u32 rx_multicast_bytes_hi; 841 u32 rx_broadcast_bytes_lo; 842 u32 rx_broadcast_bytes_hi; 843 u32 rx_unknown_protos; 844 u32 rsvd_69; /* Word 69 is reserved */ 845 u32 rx_discards_lo; 846 u32 rx_discards_hi; 847 u32 rx_errors_lo; 848 u32 rx_errors_hi; 849 u32 rx_crc_errors_lo; 850 u32 rx_crc_errors_hi; 851 u32 rx_alignment_errors_lo; 852 u32 rx_alignment_errors_hi; 853 u32 rx_symbol_errors_lo; 854 u32 rx_symbol_errors_hi; 855 u32 rx_pause_frames_lo; 856 u32 rx_pause_frames_hi; 857 u32 rx_pause_on_frames_lo; 858 u32 rx_pause_on_frames_hi; 859 u32 rx_pause_off_frames_lo; 860 u32 rx_pause_off_frames_hi; 861 u32 rx_frames_too_long_lo; 862 u32 rx_frames_too_long_hi; 863 u32 rx_internal_mac_errors_lo; 864 u32 rx_internal_mac_errors_hi; 865 u32 rx_undersize_packets; 866 u32 rx_oversize_packets; 867 u32 rx_fragment_packets; 868 u32 rx_jabbers; 869 u32 rx_control_frames_lo; 870 u32 rx_control_frames_hi; 871 u32 rx_control_frames_unknown_opcode_lo; 872 u32 rx_control_frames_unknown_opcode_hi; 873 u32 rx_in_range_errors; 874 u32 rx_out_of_range_errors; 875 u32 rx_address_filtered; 876 u32 rx_vlan_filtered; 877 u32 rx_dropped_too_small; 878 u32 rx_dropped_too_short; 879 u32 rx_dropped_header_too_small; 880 u32 rx_dropped_invalid_tcp_length; 881 u32 rx_dropped_runt; 882 u32 rx_ip_checksum_errors; 883 u32 rx_tcp_checksum_errors; 884 u32 rx_udp_checksum_errors; 885 u32 rx_non_rss_packets; 886 u32 rsvd_111; 887 u32 rx_ipv4_packets_lo; 888 u32 rx_ipv4_packets_hi; 889 u32 rx_ipv6_packets_lo; 890 u32 rx_ipv6_packets_hi; 891 u32 rx_ipv4_bytes_lo; 892 u32 rx_ipv4_bytes_hi; 893 u32 rx_ipv6_bytes_lo; 894 u32 rx_ipv6_bytes_hi; 895 u32 rx_nic_packets_lo; 896 u32 rx_nic_packets_hi; 897 u32 rx_tcp_packets_lo; 898 u32 rx_tcp_packets_hi; 899 u32 rx_iscsi_packets_lo; 900 u32 rx_iscsi_packets_hi; 901 u32 rx_management_packets_lo; 902 u32 rx_management_packets_hi; 903 u32 rx_switched_unicast_packets_lo; 904 u32 rx_switched_unicast_packets_hi; 905 u32 rx_switched_multicast_packets_lo; 906 u32 rx_switched_multicast_packets_hi; 907 u32 rx_switched_broadcast_packets_lo; 908 u32 rx_switched_broadcast_packets_hi; 909 u32 num_forwards_lo; 910 u32 num_forwards_hi; 911 u32 rx_fifo_overflow; 912 u32 rx_input_fifo_overflow; 913 u32 rx_drops_too_many_frags_lo; 914 u32 rx_drops_too_many_frags_hi; 915 u32 rx_drops_invalid_queue; 916 u32 rsvd_141; 917 u32 rx_drops_mtu_lo; 918 u32 rx_drops_mtu_hi; 919 u32 rx_packets_64_bytes_lo; 920 u32 rx_packets_64_bytes_hi; 921 u32 rx_packets_65_to_127_bytes_lo; 922 u32 rx_packets_65_to_127_bytes_hi; 923 u32 rx_packets_128_to_255_bytes_lo; 924 u32 rx_packets_128_to_255_bytes_hi; 925 u32 rx_packets_256_to_511_bytes_lo; 926 u32 rx_packets_256_to_511_bytes_hi; 927 u32 rx_packets_512_to_1023_bytes_lo; 928 u32 rx_packets_512_to_1023_bytes_hi; 929 u32 rx_packets_1024_to_1518_bytes_lo; 930 u32 rx_packets_1024_to_1518_bytes_hi; 931 u32 rx_packets_1519_to_2047_bytes_lo; 932 u32 rx_packets_1519_to_2047_bytes_hi; 933 u32 rx_packets_2048_to_4095_bytes_lo; 934 u32 rx_packets_2048_to_4095_bytes_hi; 935 u32 rx_packets_4096_to_8191_bytes_lo; 936 u32 rx_packets_4096_to_8191_bytes_hi; 937 u32 rx_packets_8192_to_9216_bytes_lo; 938 u32 rx_packets_8192_to_9216_bytes_hi; 939 }; 940 941 struct pport_stats_params { 942 u16 pport_num; 943 u8 rsvd; 944 u8 reset_stats; 945 }; 946 947 struct lancer_cmd_req_pport_stats { 948 struct be_cmd_req_hdr hdr; 949 union { 950 struct pport_stats_params params; 951 u8 rsvd[sizeof(struct lancer_pport_stats)]; 952 } cmd_params; 953 }; 954 955 struct lancer_cmd_resp_pport_stats { 956 struct be_cmd_resp_hdr hdr; 957 struct lancer_pport_stats pport_stats; 958 }; 959 960 static inline struct lancer_pport_stats* 961 pport_stats_from_cmd(struct be_adapter *adapter) 962 { 963 struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va; 964 return &cmd->pport_stats; 965 } 966 967 struct be_cmd_req_get_cntl_addnl_attribs { 968 struct be_cmd_req_hdr hdr; 969 u8 rsvd[8]; 970 }; 971 972 struct be_cmd_resp_get_cntl_addnl_attribs { 973 struct be_cmd_resp_hdr hdr; 974 u16 ipl_file_number; 975 u8 ipl_file_version; 976 u8 rsvd0; 977 u8 on_die_temperature; /* in degrees centigrade*/ 978 u8 rsvd1[3]; 979 }; 980 981 struct be_cmd_req_vlan_config { 982 struct be_cmd_req_hdr hdr; 983 u8 interface_id; 984 u8 promiscuous; 985 u8 untagged; 986 u8 num_vlan; 987 u16 normal_vlan[64]; 988 } __packed; 989 990 /******************* RX FILTER ******************************/ 991 #define BE_MAX_MC 64 /* set mcast promisc if > 64 */ 992 struct macaddr { 993 u8 byte[ETH_ALEN]; 994 }; 995 996 struct be_cmd_req_rx_filter { 997 struct be_cmd_req_hdr hdr; 998 u32 global_flags_mask; 999 u32 global_flags; 1000 u32 if_flags_mask; 1001 u32 if_flags; 1002 u32 if_id; 1003 u32 mcast_num; 1004 struct macaddr mcast_mac[BE_MAX_MC]; 1005 }; 1006 1007 /******************** Link Status Query *******************/ 1008 struct be_cmd_req_link_status { 1009 struct be_cmd_req_hdr hdr; 1010 u32 rsvd; 1011 }; 1012 1013 enum { 1014 PHY_LINK_DUPLEX_NONE = 0x0, 1015 PHY_LINK_DUPLEX_HALF = 0x1, 1016 PHY_LINK_DUPLEX_FULL = 0x2 1017 }; 1018 1019 enum { 1020 PHY_LINK_SPEED_ZERO = 0x0, /* => No link */ 1021 PHY_LINK_SPEED_10MBPS = 0x1, 1022 PHY_LINK_SPEED_100MBPS = 0x2, 1023 PHY_LINK_SPEED_1GBPS = 0x3, 1024 PHY_LINK_SPEED_10GBPS = 0x4, 1025 PHY_LINK_SPEED_20GBPS = 0x5, 1026 PHY_LINK_SPEED_25GBPS = 0x6, 1027 PHY_LINK_SPEED_40GBPS = 0x7 1028 }; 1029 1030 struct be_cmd_resp_link_status { 1031 struct be_cmd_resp_hdr hdr; 1032 u8 physical_port; 1033 u8 mac_duplex; 1034 u8 mac_speed; 1035 u8 mac_fault; 1036 u8 mgmt_mac_duplex; 1037 u8 mgmt_mac_speed; 1038 u16 link_speed; 1039 u8 logical_link_status; 1040 u8 rsvd1[3]; 1041 } __packed; 1042 1043 /******************** Port Identification ***************************/ 1044 /* Identifies the type of port attached to NIC */ 1045 struct be_cmd_req_port_type { 1046 struct be_cmd_req_hdr hdr; 1047 __le32 page_num; 1048 __le32 port; 1049 }; 1050 1051 enum { 1052 TR_PAGE_A0 = 0xa0, 1053 TR_PAGE_A2 = 0xa2 1054 }; 1055 1056 /* From SFF-8436 QSFP+ spec */ 1057 #define QSFP_PLUS_CABLE_TYPE_OFFSET 0x83 1058 #define QSFP_PLUS_CR4_CABLE 0x8 1059 #define QSFP_PLUS_SR4_CABLE 0x4 1060 #define QSFP_PLUS_LR4_CABLE 0x2 1061 1062 /* From SFF-8472 spec */ 1063 #define SFP_PLUS_SFF_8472_COMP 0x5E 1064 #define SFP_PLUS_CABLE_TYPE_OFFSET 0x8 1065 #define SFP_PLUS_COPPER_CABLE 0x4 1066 #define SFP_VENDOR_NAME_OFFSET 0x14 1067 #define SFP_VENDOR_PN_OFFSET 0x28 1068 1069 #define PAGE_DATA_LEN 256 1070 struct be_cmd_resp_port_type { 1071 struct be_cmd_resp_hdr hdr; 1072 u32 page_num; 1073 u32 port; 1074 u8 page_data[PAGE_DATA_LEN]; 1075 }; 1076 1077 /******************** Get FW Version *******************/ 1078 struct be_cmd_req_get_fw_version { 1079 struct be_cmd_req_hdr hdr; 1080 u8 rsvd0[FW_VER_LEN]; 1081 u8 rsvd1[FW_VER_LEN]; 1082 } __packed; 1083 1084 struct be_cmd_resp_get_fw_version { 1085 struct be_cmd_resp_hdr hdr; 1086 u8 firmware_version_string[FW_VER_LEN]; 1087 u8 fw_on_flash_version_string[FW_VER_LEN]; 1088 } __packed; 1089 1090 /******************** Set Flow Contrl *******************/ 1091 struct be_cmd_req_set_flow_control { 1092 struct be_cmd_req_hdr hdr; 1093 u16 tx_flow_control; 1094 u16 rx_flow_control; 1095 } __packed; 1096 1097 /******************** Get Flow Contrl *******************/ 1098 struct be_cmd_req_get_flow_control { 1099 struct be_cmd_req_hdr hdr; 1100 u32 rsvd; 1101 }; 1102 1103 struct be_cmd_resp_get_flow_control { 1104 struct be_cmd_resp_hdr hdr; 1105 u16 tx_flow_control; 1106 u16 rx_flow_control; 1107 } __packed; 1108 1109 /******************** Modify EQ Delay *******************/ 1110 struct be_set_eqd { 1111 u32 eq_id; 1112 u32 phase; 1113 u32 delay_multiplier; 1114 }; 1115 1116 struct be_cmd_req_modify_eq_delay { 1117 struct be_cmd_req_hdr hdr; 1118 u32 num_eq; 1119 struct be_set_eqd set_eqd[MAX_EVT_QS]; 1120 } __packed; 1121 1122 /******************** Get FW Config *******************/ 1123 /* The HW can come up in either of the following multi-channel modes 1124 * based on the skew/IPL. 1125 */ 1126 #define RDMA_ENABLED 0x4 1127 #define QNQ_MODE 0x400 1128 #define VNIC_MODE 0x20000 1129 #define UMC_ENABLED 0x1000000 1130 struct be_cmd_req_query_fw_cfg { 1131 struct be_cmd_req_hdr hdr; 1132 u32 rsvd[31]; 1133 }; 1134 1135 struct be_cmd_resp_query_fw_cfg { 1136 struct be_cmd_resp_hdr hdr; 1137 u32 be_config_number; 1138 u32 asic_revision; 1139 u32 phys_port; 1140 u32 function_mode; 1141 u32 rsvd[26]; 1142 u32 function_caps; 1143 }; 1144 1145 /******************** RSS Config ****************************************/ 1146 /* RSS type Input parameters used to compute RX hash 1147 * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4 1148 * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT 1149 * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6 1150 * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT 1151 * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT 1152 * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT 1153 * 1154 * When multiple RSS types are enabled, HW picks the best hash policy 1155 * based on the type of the received packet. 1156 */ 1157 #define RSS_ENABLE_NONE 0x0 1158 #define RSS_ENABLE_IPV4 0x1 1159 #define RSS_ENABLE_TCP_IPV4 0x2 1160 #define RSS_ENABLE_IPV6 0x4 1161 #define RSS_ENABLE_TCP_IPV6 0x8 1162 #define RSS_ENABLE_UDP_IPV4 0x10 1163 #define RSS_ENABLE_UDP_IPV6 0x20 1164 1165 #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC) 1166 #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3) 1167 1168 struct be_cmd_req_rss_config { 1169 struct be_cmd_req_hdr hdr; 1170 u32 if_id; 1171 u16 enable_rss; 1172 u16 cpu_table_size_log2; 1173 u32 hash[10]; 1174 u8 cpu_table[128]; 1175 u8 flush; 1176 u8 rsvd0[3]; 1177 }; 1178 1179 /******************** Port Beacon ***************************/ 1180 1181 #define BEACON_STATE_ENABLED 0x1 1182 #define BEACON_STATE_DISABLED 0x0 1183 1184 struct be_cmd_req_enable_disable_beacon { 1185 struct be_cmd_req_hdr hdr; 1186 u8 port_num; 1187 u8 beacon_state; 1188 u8 beacon_duration; 1189 u8 status_duration; 1190 } __packed; 1191 1192 struct be_cmd_req_get_beacon_state { 1193 struct be_cmd_req_hdr hdr; 1194 u8 port_num; 1195 u8 rsvd0; 1196 u16 rsvd1; 1197 } __packed; 1198 1199 struct be_cmd_resp_get_beacon_state { 1200 struct be_cmd_resp_hdr resp_hdr; 1201 u8 beacon_state; 1202 u8 rsvd0[3]; 1203 } __packed; 1204 1205 /* Flashrom related descriptors */ 1206 #define MAX_FLASH_COMP 32 1207 1208 #define OPTYPE_ISCSI_ACTIVE 0 1209 #define OPTYPE_REDBOOT 1 1210 #define OPTYPE_BIOS 2 1211 #define OPTYPE_PXE_BIOS 3 1212 #define OPTYPE_OFFSET_SPECIFIED 7 1213 #define OPTYPE_FCOE_BIOS 8 1214 #define OPTYPE_ISCSI_BACKUP 9 1215 #define OPTYPE_FCOE_FW_ACTIVE 10 1216 #define OPTYPE_FCOE_FW_BACKUP 11 1217 #define OPTYPE_NCSI_FW 13 1218 #define OPTYPE_REDBOOT_DIR 18 1219 #define OPTYPE_REDBOOT_CONFIG 19 1220 #define OPTYPE_SH_PHY_FW 21 1221 #define OPTYPE_FLASHISM_JUMPVECTOR 22 1222 #define OPTYPE_UFI_DIR 23 1223 #define OPTYPE_PHY_FW 99 1224 1225 #define FLASH_BIOS_IMAGE_MAX_SIZE_g2 262144 /* Max OPTION ROM image sz */ 1226 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 262144 /* Max Redboot image sz */ 1227 #define FLASH_IMAGE_MAX_SIZE_g2 1310720 /* Max firmware image size */ 1228 1229 #define FLASH_NCSI_IMAGE_MAX_SIZE_g3 262144 1230 #define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144 1231 #define FLASH_BIOS_IMAGE_MAX_SIZE_g3 524288 /* Max OPTION ROM image sz */ 1232 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 1048576 /* Max Redboot image sz */ 1233 #define FLASH_IMAGE_MAX_SIZE_g3 2097152 /* Max firmware image size */ 1234 1235 /* Offsets for components on Flash. */ 1236 #define FLASH_REDBOOT_START_g2 0 1237 #define FLASH_FCoE_BIOS_START_g2 524288 1238 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 1048576 1239 #define FLASH_iSCSI_BACKUP_IMAGE_START_g2 2359296 1240 #define FLASH_FCoE_PRIMARY_IMAGE_START_g2 3670016 1241 #define FLASH_FCoE_BACKUP_IMAGE_START_g2 4980736 1242 #define FLASH_iSCSI_BIOS_START_g2 7340032 1243 #define FLASH_PXE_BIOS_START_g2 7864320 1244 1245 #define FLASH_REDBOOT_START_g3 262144 1246 #define FLASH_PHY_FW_START_g3 1310720 1247 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 2097152 1248 #define FLASH_iSCSI_BACKUP_IMAGE_START_g3 4194304 1249 #define FLASH_FCoE_PRIMARY_IMAGE_START_g3 6291456 1250 #define FLASH_FCoE_BACKUP_IMAGE_START_g3 8388608 1251 #define FLASH_iSCSI_BIOS_START_g3 12582912 1252 #define FLASH_PXE_BIOS_START_g3 13107200 1253 #define FLASH_FCoE_BIOS_START_g3 13631488 1254 #define FLASH_NCSI_START_g3 15990784 1255 1256 #define IMAGE_NCSI 16 1257 #define IMAGE_OPTION_ROM_PXE 32 1258 #define IMAGE_OPTION_ROM_FCoE 33 1259 #define IMAGE_OPTION_ROM_ISCSI 34 1260 #define IMAGE_FLASHISM_JUMPVECTOR 48 1261 #define IMAGE_FIRMWARE_iSCSI 160 1262 #define IMAGE_FIRMWARE_FCoE 162 1263 #define IMAGE_FIRMWARE_BACKUP_iSCSI 176 1264 #define IMAGE_FIRMWARE_BACKUP_FCoE 178 1265 #define IMAGE_FIRMWARE_PHY 192 1266 #define IMAGE_REDBOOT_DIR 208 1267 #define IMAGE_REDBOOT_CONFIG 209 1268 #define IMAGE_UFI_DIR 210 1269 #define IMAGE_BOOT_CODE 224 1270 1271 struct controller_id { 1272 u32 vendor; 1273 u32 device; 1274 u32 subvendor; 1275 u32 subdevice; 1276 }; 1277 1278 struct flash_comp { 1279 unsigned long offset; 1280 int optype; 1281 int size; 1282 int img_type; 1283 }; 1284 1285 struct image_hdr { 1286 u32 imageid; 1287 u32 imageoffset; 1288 u32 imagelength; 1289 u32 image_checksum; 1290 u8 image_version[32]; 1291 }; 1292 1293 struct flash_file_hdr_g2 { 1294 u8 sign[32]; 1295 u32 cksum; 1296 u32 antidote; 1297 struct controller_id cont_id; 1298 u32 file_len; 1299 u32 chunk_num; 1300 u32 total_chunks; 1301 u32 num_imgs; 1302 u8 build[24]; 1303 }; 1304 1305 /* First letter of the build version of the image */ 1306 #define BLD_STR_UFI_TYPE_BE2 '2' 1307 #define BLD_STR_UFI_TYPE_BE3 '3' 1308 #define BLD_STR_UFI_TYPE_SH '4' 1309 1310 struct flash_file_hdr_g3 { 1311 u8 sign[52]; 1312 u8 ufi_version[4]; 1313 u32 file_len; 1314 u32 cksum; 1315 u32 antidote; 1316 u32 num_imgs; 1317 u8 build[24]; 1318 u8 asic_type_rev; 1319 u8 rsvd[31]; 1320 }; 1321 1322 struct flash_section_hdr { 1323 u32 format_rev; 1324 u32 cksum; 1325 u32 antidote; 1326 u32 num_images; 1327 u8 id_string[128]; 1328 u32 rsvd[4]; 1329 } __packed; 1330 1331 struct flash_section_hdr_g2 { 1332 u32 format_rev; 1333 u32 cksum; 1334 u32 antidote; 1335 u32 build_num; 1336 u8 id_string[128]; 1337 u32 rsvd[8]; 1338 } __packed; 1339 1340 struct flash_section_entry { 1341 u32 type; 1342 u32 offset; 1343 u32 pad_size; 1344 u32 image_size; 1345 u32 cksum; 1346 u32 entry_point; 1347 u16 optype; 1348 u16 rsvd0; 1349 u32 rsvd1; 1350 u8 ver_data[32]; 1351 } __packed; 1352 1353 struct flash_section_info { 1354 u8 cookie[32]; 1355 struct flash_section_hdr fsec_hdr; 1356 struct flash_section_entry fsec_entry[32]; 1357 } __packed; 1358 1359 struct flash_section_info_g2 { 1360 u8 cookie[32]; 1361 struct flash_section_hdr_g2 fsec_hdr; 1362 struct flash_section_entry fsec_entry[32]; 1363 } __packed; 1364 1365 /****************** Firmware Flash ******************/ 1366 #define FLASHROM_OPER_FLASH 1 1367 #define FLASHROM_OPER_SAVE 2 1368 #define FLASHROM_OPER_REPORT 4 1369 #define FLASHROM_OPER_PHY_FLASH 9 1370 #define FLASHROM_OPER_PHY_SAVE 10 1371 1372 struct flashrom_params { 1373 u32 op_code; 1374 u32 op_type; 1375 u32 data_buf_size; 1376 u32 offset; 1377 }; 1378 1379 struct be_cmd_write_flashrom { 1380 struct be_cmd_req_hdr hdr; 1381 struct flashrom_params params; 1382 u8 data_buf[32768]; 1383 u8 rsvd[4]; 1384 } __packed; 1385 1386 /* cmd to read flash crc */ 1387 struct be_cmd_read_flash_crc { 1388 struct be_cmd_req_hdr hdr; 1389 struct flashrom_params params; 1390 u8 crc[4]; 1391 u8 rsvd[4]; 1392 } __packed; 1393 1394 /**************** Lancer Firmware Flash ************/ 1395 struct amap_lancer_write_obj_context { 1396 u8 write_length[24]; 1397 u8 reserved1[7]; 1398 u8 eof; 1399 } __packed; 1400 1401 struct lancer_cmd_req_write_object { 1402 struct be_cmd_req_hdr hdr; 1403 u8 context[sizeof(struct amap_lancer_write_obj_context) / 8]; 1404 u32 write_offset; 1405 u8 object_name[104]; 1406 u32 descriptor_count; 1407 u32 buf_len; 1408 u32 addr_low; 1409 u32 addr_high; 1410 }; 1411 1412 #define LANCER_NO_RESET_NEEDED 0x00 1413 #define LANCER_FW_RESET_NEEDED 0x02 1414 struct lancer_cmd_resp_write_object { 1415 u8 opcode; 1416 u8 subsystem; 1417 u8 rsvd1[2]; 1418 u8 status; 1419 u8 additional_status; 1420 u8 rsvd2[2]; 1421 u32 resp_len; 1422 u32 actual_resp_len; 1423 u32 actual_write_len; 1424 u8 change_status; 1425 u8 rsvd3[3]; 1426 }; 1427 1428 /************************ Lancer Read FW info **************/ 1429 #define LANCER_READ_FILE_CHUNK (32*1024) 1430 #define LANCER_READ_FILE_EOF_MASK 0x80000000 1431 1432 #define LANCER_FW_DUMP_FILE "/dbg/dump.bin" 1433 #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd" 1434 #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd" 1435 1436 struct lancer_cmd_req_read_object { 1437 struct be_cmd_req_hdr hdr; 1438 u32 desired_read_len; 1439 u32 read_offset; 1440 u8 object_name[104]; 1441 u32 descriptor_count; 1442 u32 buf_len; 1443 u32 addr_low; 1444 u32 addr_high; 1445 }; 1446 1447 struct lancer_cmd_resp_read_object { 1448 u8 opcode; 1449 u8 subsystem; 1450 u8 rsvd1[2]; 1451 u8 status; 1452 u8 additional_status; 1453 u8 rsvd2[2]; 1454 u32 resp_len; 1455 u32 actual_resp_len; 1456 u32 actual_read_len; 1457 u32 eof; 1458 }; 1459 1460 struct lancer_cmd_req_delete_object { 1461 struct be_cmd_req_hdr hdr; 1462 u32 rsvd1; 1463 u32 rsvd2; 1464 u8 object_name[104]; 1465 }; 1466 1467 /************************ WOL *******************************/ 1468 struct be_cmd_req_acpi_wol_magic_config{ 1469 struct be_cmd_req_hdr hdr; 1470 u32 rsvd0[145]; 1471 u8 magic_mac[6]; 1472 u8 rsvd2[2]; 1473 } __packed; 1474 1475 struct be_cmd_req_acpi_wol_magic_config_v1 { 1476 struct be_cmd_req_hdr hdr; 1477 u8 rsvd0[2]; 1478 u8 query_options; 1479 u8 rsvd1[5]; 1480 u32 rsvd2[288]; 1481 u8 magic_mac[6]; 1482 u8 rsvd3[22]; 1483 } __packed; 1484 1485 struct be_cmd_resp_acpi_wol_magic_config_v1 { 1486 struct be_cmd_resp_hdr hdr; 1487 u8 rsvd0[2]; 1488 u8 wol_settings; 1489 u8 rsvd1[5]; 1490 u32 rsvd2[295]; 1491 } __packed; 1492 1493 #define BE_GET_WOL_CAP 2 1494 1495 #define BE_WOL_CAP 0x1 1496 #define BE_PME_D0_CAP 0x8 1497 #define BE_PME_D1_CAP 0x10 1498 #define BE_PME_D2_CAP 0x20 1499 #define BE_PME_D3HOT_CAP 0x40 1500 #define BE_PME_D3COLD_CAP 0x80 1501 1502 /********************** LoopBack test *********************/ 1503 #define SET_LB_MODE_TIMEOUT 12000 1504 1505 struct be_cmd_req_loopback_test { 1506 struct be_cmd_req_hdr hdr; 1507 u32 loopback_type; 1508 u32 num_pkts; 1509 u64 pattern; 1510 u32 src_port; 1511 u32 dest_port; 1512 u32 pkt_size; 1513 }; 1514 1515 struct be_cmd_resp_loopback_test { 1516 struct be_cmd_resp_hdr resp_hdr; 1517 u32 status; 1518 u32 num_txfer; 1519 u32 num_rx; 1520 u32 miscomp_off; 1521 u32 ticks_compl; 1522 }; 1523 1524 struct be_cmd_req_set_lmode { 1525 struct be_cmd_req_hdr hdr; 1526 u8 src_port; 1527 u8 dest_port; 1528 u8 loopback_type; 1529 u8 loopback_state; 1530 }; 1531 1532 /********************** DDR DMA test *********************/ 1533 struct be_cmd_req_ddrdma_test { 1534 struct be_cmd_req_hdr hdr; 1535 u64 pattern; 1536 u32 byte_count; 1537 u32 rsvd0; 1538 u8 snd_buff[4096]; 1539 u8 rsvd1[4096]; 1540 }; 1541 1542 struct be_cmd_resp_ddrdma_test { 1543 struct be_cmd_resp_hdr hdr; 1544 u64 pattern; 1545 u32 byte_cnt; 1546 u32 snd_err; 1547 u8 rsvd0[4096]; 1548 u8 rcv_buff[4096]; 1549 }; 1550 1551 /*********************** SEEPROM Read ***********************/ 1552 1553 #define BE_READ_SEEPROM_LEN 1024 1554 struct be_cmd_req_seeprom_read { 1555 struct be_cmd_req_hdr hdr; 1556 u8 rsvd0[BE_READ_SEEPROM_LEN]; 1557 }; 1558 1559 struct be_cmd_resp_seeprom_read { 1560 struct be_cmd_req_hdr hdr; 1561 u8 seeprom_data[BE_READ_SEEPROM_LEN]; 1562 }; 1563 1564 enum { 1565 PHY_TYPE_CX4_10GB = 0, 1566 PHY_TYPE_XFP_10GB, 1567 PHY_TYPE_SFP_1GB, 1568 PHY_TYPE_SFP_PLUS_10GB, 1569 PHY_TYPE_KR_10GB, 1570 PHY_TYPE_KX4_10GB, 1571 PHY_TYPE_BASET_10GB, 1572 PHY_TYPE_BASET_1GB, 1573 PHY_TYPE_BASEX_1GB, 1574 PHY_TYPE_SGMII, 1575 PHY_TYPE_QSFP, 1576 PHY_TYPE_KR4_40GB, 1577 PHY_TYPE_KR2_20GB, 1578 PHY_TYPE_TN_8022, 1579 PHY_TYPE_DISABLED = 255 1580 }; 1581 1582 #define BE_SUPPORTED_SPEED_NONE 0 1583 #define BE_SUPPORTED_SPEED_10MBPS 1 1584 #define BE_SUPPORTED_SPEED_100MBPS 2 1585 #define BE_SUPPORTED_SPEED_1GBPS 4 1586 #define BE_SUPPORTED_SPEED_10GBPS 8 1587 #define BE_SUPPORTED_SPEED_20GBPS 0x10 1588 #define BE_SUPPORTED_SPEED_40GBPS 0x20 1589 1590 #define BE_AN_EN 0x2 1591 #define BE_PAUSE_SYM_EN 0x80 1592 1593 /* MAC speed valid values */ 1594 #define SPEED_DEFAULT 0x0 1595 #define SPEED_FORCED_10GB 0x1 1596 #define SPEED_FORCED_1GB 0x2 1597 #define SPEED_AUTONEG_10GB 0x3 1598 #define SPEED_AUTONEG_1GB 0x4 1599 #define SPEED_AUTONEG_100MB 0x5 1600 #define SPEED_AUTONEG_10GB_1GB 0x6 1601 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7 1602 #define SPEED_AUTONEG_1GB_100MB 0x8 1603 #define SPEED_AUTONEG_10MB 0x9 1604 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa 1605 #define SPEED_AUTONEG_100MB_10MB 0xb 1606 #define SPEED_FORCED_100MB 0xc 1607 #define SPEED_FORCED_10MB 0xd 1608 1609 struct be_cmd_req_get_phy_info { 1610 struct be_cmd_req_hdr hdr; 1611 u8 rsvd0[24]; 1612 }; 1613 1614 struct be_phy_info { 1615 u16 phy_type; 1616 u16 interface_type; 1617 u32 misc_params; 1618 u16 ext_phy_details; 1619 u16 rsvd; 1620 u16 auto_speeds_supported; 1621 u16 fixed_speeds_supported; 1622 u32 future_use[2]; 1623 }; 1624 1625 struct be_cmd_resp_get_phy_info { 1626 struct be_cmd_req_hdr hdr; 1627 struct be_phy_info phy_info; 1628 }; 1629 1630 /*********************** Set QOS ***********************/ 1631 1632 #define BE_QOS_BITS_NIC 1 1633 1634 struct be_cmd_req_set_qos { 1635 struct be_cmd_req_hdr hdr; 1636 u32 valid_bits; 1637 u32 max_bps_nic; 1638 u32 rsvd[7]; 1639 }; 1640 1641 /*********************** Controller Attributes ***********************/ 1642 struct mgmt_hba_attribs { 1643 u32 rsvd0[24]; 1644 u8 controller_model_number[32]; 1645 u32 rsvd1[16]; 1646 u32 controller_serial_number[8]; 1647 u32 rsvd2[55]; 1648 u8 rsvd3[3]; 1649 u8 phy_port; 1650 u32 rsvd4[13]; 1651 } __packed; 1652 1653 struct mgmt_controller_attrib { 1654 struct mgmt_hba_attribs hba_attribs; 1655 u32 rsvd0[10]; 1656 } __packed; 1657 1658 struct be_cmd_req_cntl_attribs { 1659 struct be_cmd_req_hdr hdr; 1660 }; 1661 1662 struct be_cmd_resp_cntl_attribs { 1663 struct be_cmd_resp_hdr hdr; 1664 struct mgmt_controller_attrib attribs; 1665 }; 1666 1667 /*********************** Set driver function ***********************/ 1668 #define CAPABILITY_SW_TIMESTAMPS 2 1669 #define CAPABILITY_BE3_NATIVE_ERX_API 4 1670 1671 struct be_cmd_req_set_func_cap { 1672 struct be_cmd_req_hdr hdr; 1673 u32 valid_cap_flags; 1674 u32 cap_flags; 1675 u8 rsvd[212]; 1676 }; 1677 1678 struct be_cmd_resp_set_func_cap { 1679 struct be_cmd_resp_hdr hdr; 1680 u32 valid_cap_flags; 1681 u32 cap_flags; 1682 u8 rsvd[212]; 1683 }; 1684 1685 /*********************** Function Privileges ***********************/ 1686 enum { 1687 BE_PRIV_DEFAULT = 0x1, 1688 BE_PRIV_LNKQUERY = 0x2, 1689 BE_PRIV_LNKSTATS = 0x4, 1690 BE_PRIV_LNKMGMT = 0x8, 1691 BE_PRIV_LNKDIAG = 0x10, 1692 BE_PRIV_UTILQUERY = 0x20, 1693 BE_PRIV_FILTMGMT = 0x40, 1694 BE_PRIV_IFACEMGMT = 0x80, 1695 BE_PRIV_VHADM = 0x100, 1696 BE_PRIV_DEVCFG = 0x200, 1697 BE_PRIV_DEVSEC = 0x400 1698 }; 1699 #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \ 1700 BE_PRIV_DEVSEC) 1701 #define MIN_PRIVILEGES BE_PRIV_DEFAULT 1702 1703 struct be_cmd_priv_map { 1704 u8 opcode; 1705 u8 subsystem; 1706 u32 priv_mask; 1707 }; 1708 1709 struct be_cmd_req_get_fn_privileges { 1710 struct be_cmd_req_hdr hdr; 1711 u32 rsvd; 1712 }; 1713 1714 struct be_cmd_resp_get_fn_privileges { 1715 struct be_cmd_resp_hdr hdr; 1716 u32 privilege_mask; 1717 }; 1718 1719 struct be_cmd_req_set_fn_privileges { 1720 struct be_cmd_req_hdr hdr; 1721 u32 privileges; /* Used by BE3, SH-R */ 1722 u32 privileges_lancer; /* Used by Lancer */ 1723 }; 1724 1725 /******************** GET/SET_MACLIST **************************/ 1726 #define BE_MAX_MAC 64 1727 struct be_cmd_req_get_mac_list { 1728 struct be_cmd_req_hdr hdr; 1729 u8 mac_type; 1730 u8 perm_override; 1731 u16 iface_id; 1732 u32 mac_id; 1733 u32 rsvd[3]; 1734 } __packed; 1735 1736 struct get_list_macaddr { 1737 u16 mac_addr_size; 1738 union { 1739 u8 macaddr[6]; 1740 struct { 1741 u8 rsvd[2]; 1742 u32 mac_id; 1743 } __packed s_mac_id; 1744 } __packed mac_addr_id; 1745 } __packed; 1746 1747 struct be_cmd_resp_get_mac_list { 1748 struct be_cmd_resp_hdr hdr; 1749 struct get_list_macaddr fd_macaddr; /* Factory default mac */ 1750 struct get_list_macaddr macid_macaddr; /* soft mac */ 1751 u8 true_mac_count; 1752 u8 pseudo_mac_count; 1753 u8 mac_list_size; 1754 u8 rsvd; 1755 /* perm override mac */ 1756 struct get_list_macaddr macaddr_list[BE_MAX_MAC]; 1757 } __packed; 1758 1759 struct be_cmd_req_set_mac_list { 1760 struct be_cmd_req_hdr hdr; 1761 u8 mac_count; 1762 u8 rsvd1; 1763 u16 rsvd2; 1764 struct macaddr mac[BE_MAX_MAC]; 1765 } __packed; 1766 1767 /*********************** HSW Config ***********************/ 1768 #define PORT_FWD_TYPE_VEPA 0x3 1769 #define PORT_FWD_TYPE_VEB 0x2 1770 #define PORT_FWD_TYPE_PASSTHRU 0x1 1771 1772 #define ENABLE_MAC_SPOOFCHK 0x2 1773 #define DISABLE_MAC_SPOOFCHK 0x3 1774 1775 struct amap_set_hsw_context { 1776 u8 interface_id[16]; 1777 u8 rsvd0[8]; 1778 u8 mac_spoofchk[2]; 1779 u8 rsvd1[4]; 1780 u8 pvid_valid; 1781 u8 pport; 1782 u8 rsvd2[6]; 1783 u8 port_fwd_type[3]; 1784 u8 rsvd3[5]; 1785 u8 vlan_spoofchk[2]; 1786 u8 pvid[16]; 1787 u8 rsvd4[32]; 1788 u8 rsvd5[32]; 1789 u8 rsvd6[32]; 1790 } __packed; 1791 1792 struct be_cmd_req_set_hsw_config { 1793 struct be_cmd_req_hdr hdr; 1794 u8 context[sizeof(struct amap_set_hsw_context) / 8]; 1795 } __packed; 1796 1797 struct amap_get_hsw_req_context { 1798 u8 interface_id[16]; 1799 u8 rsvd0[14]; 1800 u8 pvid_valid; 1801 u8 pport; 1802 } __packed; 1803 1804 struct amap_get_hsw_resp_context { 1805 u8 rsvd0[6]; 1806 u8 port_fwd_type[3]; 1807 u8 rsvd1[5]; 1808 u8 spoofchk; 1809 u8 rsvd2; 1810 u8 pvid[16]; 1811 u8 rsvd3[32]; 1812 u8 rsvd4[32]; 1813 u8 rsvd5[32]; 1814 } __packed; 1815 1816 struct be_cmd_req_get_hsw_config { 1817 struct be_cmd_req_hdr hdr; 1818 u8 context[sizeof(struct amap_get_hsw_req_context) / 8]; 1819 } __packed; 1820 1821 struct be_cmd_resp_get_hsw_config { 1822 struct be_cmd_resp_hdr hdr; 1823 u8 context[sizeof(struct amap_get_hsw_resp_context) / 8]; 1824 u32 rsvd; 1825 }; 1826 1827 /******************* get port names ***************/ 1828 struct be_cmd_req_get_port_name { 1829 struct be_cmd_req_hdr hdr; 1830 u32 rsvd0; 1831 }; 1832 1833 struct be_cmd_resp_get_port_name { 1834 struct be_cmd_req_hdr hdr; 1835 u8 port_name[4]; 1836 }; 1837 1838 /*************** HW Stats Get v1 **********************************/ 1839 #define BE_TXP_SW_SZ 48 1840 struct be_port_rxf_stats_v1 { 1841 u32 rsvd0[12]; 1842 u32 rx_crc_errors; 1843 u32 rx_alignment_symbol_errors; 1844 u32 rx_pause_frames; 1845 u32 rx_priority_pause_frames; 1846 u32 rx_control_frames; 1847 u32 rx_in_range_errors; 1848 u32 rx_out_range_errors; 1849 u32 rx_frame_too_long; 1850 u32 rx_address_filtered; 1851 u32 rx_dropped_too_small; 1852 u32 rx_dropped_too_short; 1853 u32 rx_dropped_header_too_small; 1854 u32 rx_dropped_tcp_length; 1855 u32 rx_dropped_runt; 1856 u32 rsvd1[10]; 1857 u32 rx_ip_checksum_errs; 1858 u32 rx_tcp_checksum_errs; 1859 u32 rx_udp_checksum_errs; 1860 u32 rsvd2[7]; 1861 u32 rx_switched_unicast_packets; 1862 u32 rx_switched_multicast_packets; 1863 u32 rx_switched_broadcast_packets; 1864 u32 rsvd3[3]; 1865 u32 tx_pauseframes; 1866 u32 tx_priority_pauseframes; 1867 u32 tx_controlframes; 1868 u32 rsvd4[10]; 1869 u32 rxpp_fifo_overflow_drop; 1870 u32 rx_input_fifo_overflow_drop; 1871 u32 pmem_fifo_overflow_drop; 1872 u32 jabber_events; 1873 u32 rsvd5[3]; 1874 }; 1875 1876 1877 struct be_rxf_stats_v1 { 1878 struct be_port_rxf_stats_v1 port[4]; 1879 u32 rsvd0[2]; 1880 u32 rx_drops_no_pbuf; 1881 u32 rx_drops_no_txpb; 1882 u32 rx_drops_no_erx_descr; 1883 u32 rx_drops_no_tpre_descr; 1884 u32 rsvd1[6]; 1885 u32 rx_drops_too_many_frags; 1886 u32 rx_drops_invalid_ring; 1887 u32 forwarded_packets; 1888 u32 rx_drops_mtu; 1889 u32 rsvd2[14]; 1890 }; 1891 1892 struct be_erx_stats_v1 { 1893 u32 rx_drops_no_fragments[68]; /* dwordS 0 to 67*/ 1894 u32 rsvd[4]; 1895 }; 1896 1897 struct be_port_rxf_stats_v2 { 1898 u32 rsvd0[10]; 1899 u32 roce_bytes_received_lsd; 1900 u32 roce_bytes_received_msd; 1901 u32 rsvd1[5]; 1902 u32 roce_frames_received; 1903 u32 rx_crc_errors; 1904 u32 rx_alignment_symbol_errors; 1905 u32 rx_pause_frames; 1906 u32 rx_priority_pause_frames; 1907 u32 rx_control_frames; 1908 u32 rx_in_range_errors; 1909 u32 rx_out_range_errors; 1910 u32 rx_frame_too_long; 1911 u32 rx_address_filtered; 1912 u32 rx_dropped_too_small; 1913 u32 rx_dropped_too_short; 1914 u32 rx_dropped_header_too_small; 1915 u32 rx_dropped_tcp_length; 1916 u32 rx_dropped_runt; 1917 u32 rsvd2[10]; 1918 u32 rx_ip_checksum_errs; 1919 u32 rx_tcp_checksum_errs; 1920 u32 rx_udp_checksum_errs; 1921 u32 rsvd3[7]; 1922 u32 rx_switched_unicast_packets; 1923 u32 rx_switched_multicast_packets; 1924 u32 rx_switched_broadcast_packets; 1925 u32 rsvd4[3]; 1926 u32 tx_pauseframes; 1927 u32 tx_priority_pauseframes; 1928 u32 tx_controlframes; 1929 u32 rsvd5[10]; 1930 u32 rxpp_fifo_overflow_drop; 1931 u32 rx_input_fifo_overflow_drop; 1932 u32 pmem_fifo_overflow_drop; 1933 u32 jabber_events; 1934 u32 rsvd6[3]; 1935 u32 rx_drops_payload_size; 1936 u32 rx_drops_clipped_header; 1937 u32 rx_drops_crc; 1938 u32 roce_drops_payload_len; 1939 u32 roce_drops_crc; 1940 u32 rsvd7[19]; 1941 }; 1942 1943 struct be_rxf_stats_v2 { 1944 struct be_port_rxf_stats_v2 port[4]; 1945 u32 rsvd0[2]; 1946 u32 rx_drops_no_pbuf; 1947 u32 rx_drops_no_txpb; 1948 u32 rx_drops_no_erx_descr; 1949 u32 rx_drops_no_tpre_descr; 1950 u32 rsvd1[6]; 1951 u32 rx_drops_too_many_frags; 1952 u32 rx_drops_invalid_ring; 1953 u32 forwarded_packets; 1954 u32 rx_drops_mtu; 1955 u32 rsvd2[35]; 1956 }; 1957 1958 struct be_hw_stats_v1 { 1959 struct be_rxf_stats_v1 rxf; 1960 u32 rsvd0[BE_TXP_SW_SZ]; 1961 struct be_erx_stats_v1 erx; 1962 struct be_pmem_stats pmem; 1963 u32 rsvd1[18]; 1964 }; 1965 1966 struct be_cmd_req_get_stats_v1 { 1967 struct be_cmd_req_hdr hdr; 1968 u8 rsvd[sizeof(struct be_hw_stats_v1)]; 1969 }; 1970 1971 struct be_cmd_resp_get_stats_v1 { 1972 struct be_cmd_resp_hdr hdr; 1973 struct be_hw_stats_v1 hw_stats; 1974 }; 1975 1976 struct be_erx_stats_v2 { 1977 u32 rx_drops_no_fragments[136]; /* dwordS 0 to 135*/ 1978 u32 rsvd[3]; 1979 }; 1980 1981 struct be_hw_stats_v2 { 1982 struct be_rxf_stats_v2 rxf; 1983 u32 rsvd0[BE_TXP_SW_SZ]; 1984 struct be_erx_stats_v2 erx; 1985 struct be_pmem_stats pmem; 1986 u32 rsvd1[18]; 1987 }; 1988 1989 struct be_cmd_req_get_stats_v2 { 1990 struct be_cmd_req_hdr hdr; 1991 u8 rsvd[sizeof(struct be_hw_stats_v2)]; 1992 }; 1993 1994 struct be_cmd_resp_get_stats_v2 { 1995 struct be_cmd_resp_hdr hdr; 1996 struct be_hw_stats_v2 hw_stats; 1997 }; 1998 1999 /************** get fat capabilites *******************/ 2000 #define MAX_MODULES 27 2001 #define MAX_MODES 4 2002 #define MODE_UART 0 2003 #define FW_LOG_LEVEL_DEFAULT 48 2004 #define FW_LOG_LEVEL_FATAL 64 2005 2006 struct ext_fat_mode { 2007 u8 mode; 2008 u8 rsvd0; 2009 u16 port_mask; 2010 u32 dbg_lvl; 2011 u64 fun_mask; 2012 } __packed; 2013 2014 struct ext_fat_modules { 2015 u8 modules_str[32]; 2016 u32 modules_id; 2017 u32 num_modes; 2018 struct ext_fat_mode trace_lvl[MAX_MODES]; 2019 } __packed; 2020 2021 struct be_fat_conf_params { 2022 u32 max_log_entries; 2023 u32 log_entry_size; 2024 u8 log_type; 2025 u8 max_log_funs; 2026 u8 max_log_ports; 2027 u8 rsvd0; 2028 u32 supp_modes; 2029 u32 num_modules; 2030 struct ext_fat_modules module[MAX_MODULES]; 2031 } __packed; 2032 2033 struct be_cmd_req_get_ext_fat_caps { 2034 struct be_cmd_req_hdr hdr; 2035 u32 parameter_type; 2036 }; 2037 2038 struct be_cmd_resp_get_ext_fat_caps { 2039 struct be_cmd_resp_hdr hdr; 2040 struct be_fat_conf_params get_params; 2041 }; 2042 2043 struct be_cmd_req_set_ext_fat_caps { 2044 struct be_cmd_req_hdr hdr; 2045 struct be_fat_conf_params set_params; 2046 }; 2047 2048 #define RESOURCE_DESC_SIZE_V0 72 2049 #define RESOURCE_DESC_SIZE_V1 88 2050 #define PCIE_RESOURCE_DESC_TYPE_V0 0x40 2051 #define NIC_RESOURCE_DESC_TYPE_V0 0x41 2052 #define PCIE_RESOURCE_DESC_TYPE_V1 0x50 2053 #define NIC_RESOURCE_DESC_TYPE_V1 0x51 2054 #define PORT_RESOURCE_DESC_TYPE_V1 0x55 2055 #define MAX_RESOURCE_DESC 264 2056 2057 #define IF_CAPS_FLAGS_VALID_SHIFT 0 /* IF caps valid */ 2058 #define VFT_SHIFT 3 /* VF template */ 2059 #define IMM_SHIFT 6 /* Immediate */ 2060 #define NOSV_SHIFT 7 /* No save */ 2061 2062 struct be_res_desc_hdr { 2063 u8 desc_type; 2064 u8 desc_len; 2065 } __packed; 2066 2067 struct be_port_res_desc { 2068 struct be_res_desc_hdr hdr; 2069 u8 rsvd0; 2070 u8 flags; 2071 u8 link_num; 2072 u8 mc_type; 2073 u16 rsvd1; 2074 2075 #define NV_TYPE_MASK 0x3 /* bits 0-1 */ 2076 #define NV_TYPE_DISABLED 1 2077 #define NV_TYPE_VXLAN 3 2078 #define SOCVID_SHIFT 2 /* Strip outer vlan */ 2079 #define RCVID_SHIFT 4 /* Report vlan */ 2080 u8 nv_flags; 2081 u8 rsvd2; 2082 __le16 nv_port; /* vxlan/gre port */ 2083 u32 rsvd3[19]; 2084 } __packed; 2085 2086 struct be_pcie_res_desc { 2087 struct be_res_desc_hdr hdr; 2088 u8 rsvd0; 2089 u8 flags; 2090 u16 rsvd1; 2091 u8 pf_num; 2092 u8 rsvd2; 2093 u32 rsvd3; 2094 u8 sriov_state; 2095 u8 pf_state; 2096 u8 pf_type; 2097 u8 rsvd4; 2098 u16 num_vfs; 2099 u16 rsvd5; 2100 u32 rsvd6[17]; 2101 } __packed; 2102 2103 struct be_nic_res_desc { 2104 struct be_res_desc_hdr hdr; 2105 u8 rsvd1; 2106 2107 #define QUN_SHIFT 4 /* QoS is in absolute units */ 2108 u8 flags; 2109 u8 vf_num; 2110 u8 rsvd2; 2111 u8 pf_num; 2112 u8 rsvd3; 2113 u16 unicast_mac_count; 2114 u8 rsvd4[6]; 2115 u16 mcc_count; 2116 u16 vlan_count; 2117 u16 mcast_mac_count; 2118 u16 txq_count; 2119 u16 rq_count; 2120 u16 rssq_count; 2121 u16 lro_count; 2122 u16 cq_count; 2123 u16 toe_conn_count; 2124 u16 eq_count; 2125 u16 vlan_id; 2126 u16 iface_count; 2127 u32 cap_flags; 2128 u8 link_param; 2129 u8 rsvd6; 2130 u16 channel_id_param; 2131 u32 bw_min; 2132 u32 bw_max; 2133 u8 acpi_params; 2134 u8 wol_param; 2135 u16 rsvd7; 2136 u16 tunnel_iface_count; 2137 u16 direct_tenant_iface_count; 2138 u32 rsvd8[6]; 2139 } __packed; 2140 2141 /************ Multi-Channel type ***********/ 2142 enum mc_type { 2143 MC_NONE = 0x01, 2144 UMC = 0x02, 2145 FLEX10 = 0x03, 2146 vNIC1 = 0x04, 2147 nPAR = 0x05, 2148 UFP = 0x06, 2149 vNIC2 = 0x07 2150 }; 2151 2152 /* Is BE in a multi-channel mode */ 2153 static inline bool be_is_mc(struct be_adapter *adapter) 2154 { 2155 return adapter->mc_type > MC_NONE; 2156 } 2157 2158 struct be_cmd_req_get_func_config { 2159 struct be_cmd_req_hdr hdr; 2160 }; 2161 2162 struct be_cmd_resp_get_func_config { 2163 struct be_cmd_resp_hdr hdr; 2164 u32 desc_count; 2165 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1]; 2166 }; 2167 2168 enum { 2169 RESOURCE_LIMITS, 2170 RESOURCE_MODIFIABLE 2171 }; 2172 2173 struct be_cmd_req_get_profile_config { 2174 struct be_cmd_req_hdr hdr; 2175 u8 rsvd; 2176 #define ACTIVE_PROFILE_TYPE 0x2 2177 #define QUERY_MODIFIABLE_FIELDS_TYPE BIT(3) 2178 u8 type; 2179 u16 rsvd1; 2180 }; 2181 2182 struct be_cmd_resp_get_profile_config { 2183 struct be_cmd_resp_hdr hdr; 2184 __le16 desc_count; 2185 u16 rsvd; 2186 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1]; 2187 }; 2188 2189 #define FIELD_MODIFIABLE 0xFFFF 2190 struct be_cmd_req_set_profile_config { 2191 struct be_cmd_req_hdr hdr; 2192 u32 rsvd; 2193 u32 desc_count; 2194 u8 desc[2 * RESOURCE_DESC_SIZE_V1]; 2195 } __packed; 2196 2197 struct be_cmd_req_get_active_profile { 2198 struct be_cmd_req_hdr hdr; 2199 u32 rsvd; 2200 } __packed; 2201 2202 struct be_cmd_resp_get_active_profile { 2203 struct be_cmd_resp_hdr hdr; 2204 u16 active_profile_id; 2205 u16 next_profile_id; 2206 } __packed; 2207 2208 struct be_cmd_enable_disable_vf { 2209 struct be_cmd_req_hdr hdr; 2210 u8 enable; 2211 u8 rsvd[3]; 2212 }; 2213 2214 struct be_cmd_req_intr_set { 2215 struct be_cmd_req_hdr hdr; 2216 u8 intr_enabled; 2217 u8 rsvd[3]; 2218 }; 2219 2220 static inline bool check_privilege(struct be_adapter *adapter, u32 flags) 2221 { 2222 return flags & adapter->cmd_privileges ? true : false; 2223 } 2224 2225 /************** Get IFACE LIST *******************/ 2226 struct be_if_desc { 2227 u32 if_id; 2228 u32 cap_flags; 2229 u32 en_flags; 2230 }; 2231 2232 struct be_cmd_req_get_iface_list { 2233 struct be_cmd_req_hdr hdr; 2234 }; 2235 2236 struct be_cmd_resp_get_iface_list { 2237 struct be_cmd_req_hdr hdr; 2238 u32 if_cnt; 2239 struct be_if_desc if_desc; 2240 }; 2241 2242 /*************** Set logical link ********************/ 2243 #define PLINK_TRACK_SHIFT 8 2244 struct be_cmd_req_set_ll_link { 2245 struct be_cmd_req_hdr hdr; 2246 u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */ 2247 }; 2248 2249 /************** Manage IFACE Filters *******************/ 2250 #define OP_CONVERT_NORMAL_TO_TUNNEL 0 2251 #define OP_CONVERT_TUNNEL_TO_NORMAL 1 2252 2253 struct be_cmd_req_manage_iface_filters { 2254 struct be_cmd_req_hdr hdr; 2255 u8 op; 2256 u8 rsvd0; 2257 u8 flags; 2258 u8 rsvd1; 2259 u32 tunnel_iface_id; 2260 u32 target_iface_id; 2261 u8 mac[6]; 2262 u16 vlan_tag; 2263 u32 tenant_id; 2264 u32 filter_id; 2265 u32 cap_flags; 2266 u32 cap_control_flags; 2267 } __packed; 2268 2269 int be_pci_fnum_get(struct be_adapter *adapter); 2270 int be_fw_wait_ready(struct be_adapter *adapter); 2271 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 2272 bool permanent, u32 if_handle, u32 pmac_id); 2273 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id, 2274 u32 *pmac_id, u32 domain); 2275 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, 2276 u32 domain); 2277 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 2278 u32 *if_handle, u32 domain); 2279 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain); 2280 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo); 2281 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 2282 struct be_queue_info *eq, bool no_delay, 2283 int num_cqe_dma_coalesce); 2284 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq, 2285 struct be_queue_info *cq); 2286 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo); 2287 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq, 2288 u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id); 2289 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 2290 int type); 2291 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q); 2292 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 2293 u8 *link_status, u32 dom); 2294 int be_cmd_reset(struct be_adapter *adapter); 2295 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd); 2296 int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 2297 struct be_dma_mem *nonemb_cmd); 2298 int be_cmd_get_fw_ver(struct be_adapter *adapter); 2299 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num); 2300 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 2301 u32 num, u32 domain); 2302 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status); 2303 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc); 2304 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc); 2305 int be_cmd_query_fw_cfg(struct be_adapter *adapter); 2306 int be_cmd_reset_function(struct be_adapter *adapter); 2307 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2308 u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey); 2309 int be_process_mcc(struct be_adapter *adapter); 2310 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon, 2311 u8 status, u8 state); 2312 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, 2313 u32 *state); 2314 int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2315 u8 page_num, u8 *data); 2316 int be_cmd_query_cable_type(struct be_adapter *adapter); 2317 int be_cmd_query_sfp_info(struct be_adapter *adapter); 2318 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 2319 u32 flash_oper, u32 flash_opcode, u32 img_offset, 2320 u32 buf_size); 2321 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2322 u32 data_size, u32 data_offset, 2323 const char *obj_name, u32 *data_written, 2324 u8 *change_status, u8 *addn_status); 2325 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2326 u32 data_size, u32 data_offset, const char *obj_name, 2327 u32 *data_read, u32 *eof, u8 *addn_status); 2328 int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name); 2329 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 2330 u16 img_optype, u32 img_offset, u32 crc_offset); 2331 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 2332 struct be_dma_mem *nonemb_cmd); 2333 int be_cmd_fw_init(struct be_adapter *adapter); 2334 int be_cmd_fw_clean(struct be_adapter *adapter); 2335 void be_async_mcc_enable(struct be_adapter *adapter); 2336 void be_async_mcc_disable(struct be_adapter *adapter); 2337 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 2338 u32 loopback_type, u32 pkt_size, u32 num_pkts, 2339 u64 pattern); 2340 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt, 2341 struct be_dma_mem *cmd); 2342 int be_cmd_get_seeprom_data(struct be_adapter *adapter, 2343 struct be_dma_mem *nonemb_cmd); 2344 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 2345 u8 loopback_type, u8 enable); 2346 int be_cmd_get_phy_info(struct be_adapter *adapter); 2347 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, 2348 u16 link_speed, u8 domain); 2349 void be_detect_error(struct be_adapter *adapter); 2350 int be_cmd_get_die_temperature(struct be_adapter *adapter); 2351 int be_cmd_get_cntl_attributes(struct be_adapter *adapter); 2352 int be_cmd_req_native_mode(struct be_adapter *adapter); 2353 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size); 2354 int be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf); 2355 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2356 u32 domain); 2357 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 2358 u32 vf_num); 2359 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 2360 bool *pmac_id_active, u32 *pmac_id, 2361 u32 if_handle, u8 domain); 2362 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac, 2363 u32 if_handle, bool active, u32 domain); 2364 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac); 2365 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count, 2366 u32 domain); 2367 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom); 2368 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain, 2369 u16 intf_id, u16 hsw_mode, u8 spoofchk); 2370 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain, 2371 u16 intf_id, u8 *mode, bool *spoofchk); 2372 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter); 2373 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level); 2374 int be_cmd_get_fw_log_level(struct be_adapter *adapter); 2375 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 2376 struct be_dma_mem *cmd); 2377 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 2378 struct be_dma_mem *cmd, 2379 struct be_fat_conf_params *cfgs); 2380 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask); 2381 int lancer_initiate_dump(struct be_adapter *adapter); 2382 int lancer_delete_dump(struct be_adapter *adapter); 2383 bool dump_present(struct be_adapter *adapter); 2384 int lancer_test_and_set_rdy_state(struct be_adapter *adapter); 2385 int be_cmd_query_port_name(struct be_adapter *adapter); 2386 int be_cmd_get_func_config(struct be_adapter *adapter, 2387 struct be_resources *res); 2388 int be_cmd_get_profile_config(struct be_adapter *adapter, 2389 struct be_resources *res, u8 query, u8 domain); 2390 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile); 2391 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 2392 int vf_num); 2393 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain); 2394 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable); 2395 int be_cmd_set_logical_link_config(struct be_adapter *adapter, 2396 int link_state, u8 domain); 2397 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port); 2398 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op); 2399 int be_cmd_set_sriov_config(struct be_adapter *adapter, 2400 struct be_resources res, u16 num_vfs, 2401 u16 num_vf_qs); 2402