19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 189aebddd1SJeff Kirsher /* 199aebddd1SJeff Kirsher * The driver sends configuration and managements command requests to the 209aebddd1SJeff Kirsher * firmware in the BE. These requests are communicated to the processor 219aebddd1SJeff Kirsher * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one 229aebddd1SJeff Kirsher * WRB inside a MAILBOX. 239aebddd1SJeff Kirsher * The commands are serviced by the ARM processor in the BladeEngine's MPU. 249aebddd1SJeff Kirsher */ 259aebddd1SJeff Kirsher 269aebddd1SJeff Kirsher struct be_sge { 279aebddd1SJeff Kirsher u32 pa_lo; 289aebddd1SJeff Kirsher u32 pa_hi; 299aebddd1SJeff Kirsher u32 len; 309aebddd1SJeff Kirsher }; 319aebddd1SJeff Kirsher 329aebddd1SJeff Kirsher #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/ 339aebddd1SJeff Kirsher #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */ 349aebddd1SJeff Kirsher #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */ 359aebddd1SJeff Kirsher struct be_mcc_wrb { 369aebddd1SJeff Kirsher u32 embedded; /* dword 0 */ 379aebddd1SJeff Kirsher u32 payload_length; /* dword 1 */ 389aebddd1SJeff Kirsher u32 tag0; /* dword 2 */ 399aebddd1SJeff Kirsher u32 tag1; /* dword 3 */ 409aebddd1SJeff Kirsher u32 rsvd; /* dword 4 */ 419aebddd1SJeff Kirsher union { 429aebddd1SJeff Kirsher u8 embedded_payload[236]; /* used by embedded cmds */ 439aebddd1SJeff Kirsher struct be_sge sgl[19]; /* used by non-embedded cmds */ 449aebddd1SJeff Kirsher } payload; 459aebddd1SJeff Kirsher }; 469aebddd1SJeff Kirsher 479aebddd1SJeff Kirsher #define CQE_FLAGS_VALID_MASK (1 << 31) 489aebddd1SJeff Kirsher #define CQE_FLAGS_ASYNC_MASK (1 << 30) 499aebddd1SJeff Kirsher #define CQE_FLAGS_COMPLETED_MASK (1 << 28) 509aebddd1SJeff Kirsher #define CQE_FLAGS_CONSUMED_MASK (1 << 27) 519aebddd1SJeff Kirsher 529aebddd1SJeff Kirsher /* Completion Status */ 539aebddd1SJeff Kirsher enum { 549aebddd1SJeff Kirsher MCC_STATUS_SUCCESS = 0, 559aebddd1SJeff Kirsher MCC_STATUS_FAILED = 1, 569aebddd1SJeff Kirsher MCC_STATUS_ILLEGAL_REQUEST = 2, 579aebddd1SJeff Kirsher MCC_STATUS_ILLEGAL_FIELD = 3, 589aebddd1SJeff Kirsher MCC_STATUS_INSUFFICIENT_BUFFER = 4, 599aebddd1SJeff Kirsher MCC_STATUS_UNAUTHORIZED_REQUEST = 5, 609aebddd1SJeff Kirsher MCC_STATUS_NOT_SUPPORTED = 66 619aebddd1SJeff Kirsher }; 629aebddd1SJeff Kirsher 63d9d604f8SAjit Khaparde #define MCC_ADDL_STS_INSUFFICIENT_RESOURCES 0x16 64d9d604f8SAjit Khaparde 659aebddd1SJeff Kirsher #define CQE_STATUS_COMPL_MASK 0xFFFF 669aebddd1SJeff Kirsher #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ 679aebddd1SJeff Kirsher #define CQE_STATUS_EXTD_MASK 0xFFFF 689aebddd1SJeff Kirsher #define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */ 699aebddd1SJeff Kirsher 709aebddd1SJeff Kirsher struct be_mcc_compl { 719aebddd1SJeff Kirsher u32 status; /* dword 0 */ 729aebddd1SJeff Kirsher u32 tag0; /* dword 1 */ 739aebddd1SJeff Kirsher u32 tag1; /* dword 2 */ 749aebddd1SJeff Kirsher u32 flags; /* dword 3 */ 759aebddd1SJeff Kirsher }; 769aebddd1SJeff Kirsher 779aebddd1SJeff Kirsher /* When the async bit of mcc_compl is set, the last 4 bytes of 789aebddd1SJeff Kirsher * mcc_compl is interpreted as follows: 799aebddd1SJeff Kirsher */ 809aebddd1SJeff Kirsher #define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */ 819aebddd1SJeff Kirsher #define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF 829aebddd1SJeff Kirsher #define ASYNC_TRAILER_EVENT_TYPE_SHIFT 16 839aebddd1SJeff Kirsher #define ASYNC_TRAILER_EVENT_TYPE_MASK 0xFF 849aebddd1SJeff Kirsher #define ASYNC_EVENT_CODE_LINK_STATE 0x1 859aebddd1SJeff Kirsher #define ASYNC_EVENT_CODE_GRP_5 0x5 869aebddd1SJeff Kirsher #define ASYNC_EVENT_QOS_SPEED 0x1 879aebddd1SJeff Kirsher #define ASYNC_EVENT_COS_PRIORITY 0x2 889aebddd1SJeff Kirsher #define ASYNC_EVENT_PVID_STATE 0x3 89bc0c3405SAjit Khaparde #define ASYNC_EVENT_CODE_QNQ 0x6 90bc0c3405SAjit Khaparde #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1 91bc0c3405SAjit Khaparde 929aebddd1SJeff Kirsher struct be_async_event_trailer { 939aebddd1SJeff Kirsher u32 code; 949aebddd1SJeff Kirsher }; 959aebddd1SJeff Kirsher 969aebddd1SJeff Kirsher enum { 979aebddd1SJeff Kirsher LINK_DOWN = 0x0, 989aebddd1SJeff Kirsher LINK_UP = 0x1 999aebddd1SJeff Kirsher }; 1009aebddd1SJeff Kirsher #define LINK_STATUS_MASK 0x1 1012e177a5cSPadmanabh Ratnakar #define LOGICAL_LINK_STATUS_MASK 0x2 1029aebddd1SJeff Kirsher 1039aebddd1SJeff Kirsher /* When the event code of an async trailer is link-state, the mcc_compl 1049aebddd1SJeff Kirsher * must be interpreted as follows 1059aebddd1SJeff Kirsher */ 1069aebddd1SJeff Kirsher struct be_async_event_link_state { 1079aebddd1SJeff Kirsher u8 physical_port; 1089aebddd1SJeff Kirsher u8 port_link_status; 1099aebddd1SJeff Kirsher u8 port_duplex; 1109aebddd1SJeff Kirsher u8 port_speed; 1119aebddd1SJeff Kirsher u8 port_fault; 1129aebddd1SJeff Kirsher u8 rsvd0[7]; 1139aebddd1SJeff Kirsher struct be_async_event_trailer trailer; 1149aebddd1SJeff Kirsher } __packed; 1159aebddd1SJeff Kirsher 1169aebddd1SJeff Kirsher /* When the event code of an async trailer is GRP-5 and event_type is QOS_SPEED 1179aebddd1SJeff Kirsher * the mcc_compl must be interpreted as follows 1189aebddd1SJeff Kirsher */ 1199aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed { 1209aebddd1SJeff Kirsher u8 physical_port; 1219aebddd1SJeff Kirsher u8 rsvd[5]; 1229aebddd1SJeff Kirsher u16 qos_link_speed; 1239aebddd1SJeff Kirsher u32 event_tag; 1249aebddd1SJeff Kirsher struct be_async_event_trailer trailer; 1259aebddd1SJeff Kirsher } __packed; 1269aebddd1SJeff Kirsher 1279aebddd1SJeff Kirsher /* When the event code of an async trailer is GRP5 and event type is 1289aebddd1SJeff Kirsher * CoS-Priority, the mcc_compl must be interpreted as follows 1299aebddd1SJeff Kirsher */ 1309aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority { 1319aebddd1SJeff Kirsher u8 physical_port; 1329aebddd1SJeff Kirsher u8 available_priority_bmap; 1339aebddd1SJeff Kirsher u8 reco_default_priority; 1349aebddd1SJeff Kirsher u8 valid; 1359aebddd1SJeff Kirsher u8 rsvd0; 1369aebddd1SJeff Kirsher u8 event_tag; 1379aebddd1SJeff Kirsher struct be_async_event_trailer trailer; 1389aebddd1SJeff Kirsher } __packed; 1399aebddd1SJeff Kirsher 1409aebddd1SJeff Kirsher /* When the event code of an async trailer is GRP5 and event type is 1419aebddd1SJeff Kirsher * PVID state, the mcc_compl must be interpreted as follows 1429aebddd1SJeff Kirsher */ 1439aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state { 1449aebddd1SJeff Kirsher u8 enabled; 1459aebddd1SJeff Kirsher u8 rsvd0; 1469aebddd1SJeff Kirsher u16 tag; 1479aebddd1SJeff Kirsher u32 event_tag; 1489aebddd1SJeff Kirsher u32 rsvd1; 1499aebddd1SJeff Kirsher struct be_async_event_trailer trailer; 1509aebddd1SJeff Kirsher } __packed; 1519aebddd1SJeff Kirsher 152bc0c3405SAjit Khaparde /* async event indicating outer VLAN tag in QnQ */ 153bc0c3405SAjit Khaparde struct be_async_event_qnq { 154bc0c3405SAjit Khaparde u8 valid; /* Indicates if outer VLAN is valid */ 155bc0c3405SAjit Khaparde u8 rsvd0; 156bc0c3405SAjit Khaparde u16 vlan_tag; 157bc0c3405SAjit Khaparde u32 event_tag; 158bc0c3405SAjit Khaparde u8 rsvd1[4]; 159bc0c3405SAjit Khaparde struct be_async_event_trailer trailer; 160bc0c3405SAjit Khaparde } __packed; 161bc0c3405SAjit Khaparde 1629aebddd1SJeff Kirsher struct be_mcc_mailbox { 1639aebddd1SJeff Kirsher struct be_mcc_wrb wrb; 1649aebddd1SJeff Kirsher struct be_mcc_compl compl; 1659aebddd1SJeff Kirsher }; 1669aebddd1SJeff Kirsher 1679aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_COMMON 0x1 1689aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_ETH 0x3 1699aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_LOWLEVEL 0xb 1709aebddd1SJeff Kirsher 1719aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MAC_QUERY 1 1729aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MAC_SET 2 1739aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MULTICAST_SET 3 1749aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4 1759aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5 1769aebddd1SJeff Kirsher #define OPCODE_COMMON_READ_FLASHROM 6 1779aebddd1SJeff Kirsher #define OPCODE_COMMON_WRITE_FLASHROM 7 1789aebddd1SJeff Kirsher #define OPCODE_COMMON_CQ_CREATE 12 1799aebddd1SJeff Kirsher #define OPCODE_COMMON_EQ_CREATE 13 1809aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_CREATE 21 1819aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_QOS 28 1829aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_CREATE_EXT 90 1839aebddd1SJeff Kirsher #define OPCODE_COMMON_SEEPROM_READ 30 1849aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32 1859aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_RX_FILTER 34 1869aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_FW_VERSION 35 1879aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_FLOW_CONTROL 36 1889aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_FLOW_CONTROL 37 1899aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_FRAME_SIZE 39 1909aebddd1SJeff Kirsher #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 1919aebddd1SJeff Kirsher #define OPCODE_COMMON_FIRMWARE_CONFIG 42 1929aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50 1939aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51 1949aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_DESTROY 53 1959aebddd1SJeff Kirsher #define OPCODE_COMMON_CQ_DESTROY 54 1969aebddd1SJeff Kirsher #define OPCODE_COMMON_EQ_DESTROY 55 1979aebddd1SJeff Kirsher #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58 1989aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_PMAC_ADD 59 1999aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_PMAC_DEL 60 2009aebddd1SJeff Kirsher #define OPCODE_COMMON_FUNCTION_RESET 61 2019aebddd1SJeff Kirsher #define OPCODE_COMMON_MANAGE_FAT 68 2029aebddd1SJeff Kirsher #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69 2039aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_BEACON_STATE 70 2049aebddd1SJeff Kirsher #define OPCODE_COMMON_READ_TRANSRECV_DATA 73 205b4e32a71SPadmanabh Ratnakar #define OPCODE_COMMON_GET_PORT_NAME 77 20668c45a2dSSomnath Kotur #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89 20704a06028SSathya Perla #define OPCODE_COMMON_SET_FN_PRIVILEGES 100 2089aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_PHY_DETAILS 102 2099aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103 2109aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121 211941a77d5SSomnath Kotur #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES 125 212941a77d5SSomnath Kotur #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES 126 213590c391dSPadmanabh Ratnakar #define OPCODE_COMMON_GET_MAC_LIST 147 214590c391dSPadmanabh Ratnakar #define OPCODE_COMMON_SET_MAC_LIST 148 215f1f3ee1bSAjit Khaparde #define OPCODE_COMMON_GET_HSW_CONFIG 152 216abb93951SPadmanabh Ratnakar #define OPCODE_COMMON_GET_FUNC_CONFIG 160 217abb93951SPadmanabh Ratnakar #define OPCODE_COMMON_GET_PROFILE_CONFIG 164 218d5c18473SPadmanabh Ratnakar #define OPCODE_COMMON_SET_PROFILE_CONFIG 165 219f1f3ee1bSAjit Khaparde #define OPCODE_COMMON_SET_HSW_CONFIG 153 220f25b119cSPadmanabh Ratnakar #define OPCODE_COMMON_GET_FN_PRIVILEGES 170 221de49bd5aSPadmanabh Ratnakar #define OPCODE_COMMON_READ_OBJECT 171 2229aebddd1SJeff Kirsher #define OPCODE_COMMON_WRITE_OBJECT 172 2234c876616SSathya Perla #define OPCODE_COMMON_GET_IFACE_LIST 194 224dcf7ebbaSPadmanabh Ratnakar #define OPCODE_COMMON_ENABLE_DISABLE_VF 196 2259aebddd1SJeff Kirsher 2269aebddd1SJeff Kirsher #define OPCODE_ETH_RSS_CONFIG 1 2279aebddd1SJeff Kirsher #define OPCODE_ETH_ACPI_CONFIG 2 2289aebddd1SJeff Kirsher #define OPCODE_ETH_PROMISCUOUS 3 2299aebddd1SJeff Kirsher #define OPCODE_ETH_GET_STATISTICS 4 2309aebddd1SJeff Kirsher #define OPCODE_ETH_TX_CREATE 7 2319aebddd1SJeff Kirsher #define OPCODE_ETH_RX_CREATE 8 2329aebddd1SJeff Kirsher #define OPCODE_ETH_TX_DESTROY 9 2339aebddd1SJeff Kirsher #define OPCODE_ETH_RX_DESTROY 10 2349aebddd1SJeff Kirsher #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12 2359aebddd1SJeff Kirsher #define OPCODE_ETH_GET_PPORT_STATS 18 2369aebddd1SJeff Kirsher 2379aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17 2389aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18 2399aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19 2409aebddd1SJeff Kirsher 2419aebddd1SJeff Kirsher struct be_cmd_req_hdr { 2429aebddd1SJeff Kirsher u8 opcode; /* dword 0 */ 2439aebddd1SJeff Kirsher u8 subsystem; /* dword 0 */ 2449aebddd1SJeff Kirsher u8 port_number; /* dword 0 */ 2459aebddd1SJeff Kirsher u8 domain; /* dword 0 */ 2469aebddd1SJeff Kirsher u32 timeout; /* dword 1 */ 2479aebddd1SJeff Kirsher u32 request_length; /* dword 2 */ 2489aebddd1SJeff Kirsher u8 version; /* dword 3 */ 2499aebddd1SJeff Kirsher u8 rsvd[3]; /* dword 3 */ 2509aebddd1SJeff Kirsher }; 2519aebddd1SJeff Kirsher 2529aebddd1SJeff Kirsher #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */ 2539aebddd1SJeff Kirsher #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */ 2549aebddd1SJeff Kirsher struct be_cmd_resp_hdr { 255652bf646SPadmanabh Ratnakar u8 opcode; /* dword 0 */ 256652bf646SPadmanabh Ratnakar u8 subsystem; /* dword 0 */ 257652bf646SPadmanabh Ratnakar u8 rsvd[2]; /* dword 0 */ 258652bf646SPadmanabh Ratnakar u8 status; /* dword 1 */ 259652bf646SPadmanabh Ratnakar u8 add_status; /* dword 1 */ 260652bf646SPadmanabh Ratnakar u8 rsvd1[2]; /* dword 1 */ 2619aebddd1SJeff Kirsher u32 response_length; /* dword 2 */ 2629aebddd1SJeff Kirsher u32 actual_resp_len; /* dword 3 */ 2639aebddd1SJeff Kirsher }; 2649aebddd1SJeff Kirsher 2659aebddd1SJeff Kirsher struct phys_addr { 2669aebddd1SJeff Kirsher u32 lo; 2679aebddd1SJeff Kirsher u32 hi; 2689aebddd1SJeff Kirsher }; 2699aebddd1SJeff Kirsher 2709aebddd1SJeff Kirsher /************************** 2719aebddd1SJeff Kirsher * BE Command definitions * 2729aebddd1SJeff Kirsher **************************/ 2739aebddd1SJeff Kirsher 2749aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined 2759aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */ 2769aebddd1SJeff Kirsher struct amap_eq_context { 2779aebddd1SJeff Kirsher u8 cidx[13]; /* dword 0*/ 2789aebddd1SJeff Kirsher u8 rsvd0[3]; /* dword 0*/ 2799aebddd1SJeff Kirsher u8 epidx[13]; /* dword 0*/ 2809aebddd1SJeff Kirsher u8 valid; /* dword 0*/ 2819aebddd1SJeff Kirsher u8 rsvd1; /* dword 0*/ 2829aebddd1SJeff Kirsher u8 size; /* dword 0*/ 2839aebddd1SJeff Kirsher u8 pidx[13]; /* dword 1*/ 2849aebddd1SJeff Kirsher u8 rsvd2[3]; /* dword 1*/ 2859aebddd1SJeff Kirsher u8 pd[10]; /* dword 1*/ 2869aebddd1SJeff Kirsher u8 count[3]; /* dword 1*/ 2879aebddd1SJeff Kirsher u8 solevent; /* dword 1*/ 2889aebddd1SJeff Kirsher u8 stalled; /* dword 1*/ 2899aebddd1SJeff Kirsher u8 armed; /* dword 1*/ 2909aebddd1SJeff Kirsher u8 rsvd3[4]; /* dword 2*/ 2919aebddd1SJeff Kirsher u8 func[8]; /* dword 2*/ 2929aebddd1SJeff Kirsher u8 rsvd4; /* dword 2*/ 2939aebddd1SJeff Kirsher u8 delaymult[10]; /* dword 2*/ 2949aebddd1SJeff Kirsher u8 rsvd5[2]; /* dword 2*/ 2959aebddd1SJeff Kirsher u8 phase[2]; /* dword 2*/ 2969aebddd1SJeff Kirsher u8 nodelay; /* dword 2*/ 2979aebddd1SJeff Kirsher u8 rsvd6[4]; /* dword 2*/ 2989aebddd1SJeff Kirsher u8 rsvd7[32]; /* dword 3*/ 2999aebddd1SJeff Kirsher } __packed; 3009aebddd1SJeff Kirsher 3019aebddd1SJeff Kirsher struct be_cmd_req_eq_create { 3029aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 3039aebddd1SJeff Kirsher u16 num_pages; /* sword */ 3049aebddd1SJeff Kirsher u16 rsvd0; /* sword */ 3059aebddd1SJeff Kirsher u8 context[sizeof(struct amap_eq_context) / 8]; 3069aebddd1SJeff Kirsher struct phys_addr pages[8]; 3079aebddd1SJeff Kirsher } __packed; 3089aebddd1SJeff Kirsher 3099aebddd1SJeff Kirsher struct be_cmd_resp_eq_create { 3109aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr; 3119aebddd1SJeff Kirsher u16 eq_id; /* sword */ 312f2f781a7SSathya Perla u16 msix_idx; /* available only in v2 */ 3139aebddd1SJeff Kirsher } __packed; 3149aebddd1SJeff Kirsher 3159aebddd1SJeff Kirsher /******************** Mac query ***************************/ 3169aebddd1SJeff Kirsher enum { 3179aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_STORAGE = 0x0, 3189aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_NETWORK = 0x1, 3199aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_PD = 0x2, 3209aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_MANAGEMENT = 0x3 3219aebddd1SJeff Kirsher }; 3229aebddd1SJeff Kirsher 3239aebddd1SJeff Kirsher struct mac_addr { 3249aebddd1SJeff Kirsher u16 size_of_struct; 3259aebddd1SJeff Kirsher u8 addr[ETH_ALEN]; 3269aebddd1SJeff Kirsher } __packed; 3279aebddd1SJeff Kirsher 3289aebddd1SJeff Kirsher struct be_cmd_req_mac_query { 3299aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 3309aebddd1SJeff Kirsher u8 type; 3319aebddd1SJeff Kirsher u8 permanent; 3329aebddd1SJeff Kirsher u16 if_id; 333590c391dSPadmanabh Ratnakar u32 pmac_id; 3349aebddd1SJeff Kirsher } __packed; 3359aebddd1SJeff Kirsher 3369aebddd1SJeff Kirsher struct be_cmd_resp_mac_query { 3379aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 3389aebddd1SJeff Kirsher struct mac_addr mac; 3399aebddd1SJeff Kirsher }; 3409aebddd1SJeff Kirsher 3419aebddd1SJeff Kirsher /******************** PMac Add ***************************/ 3429aebddd1SJeff Kirsher struct be_cmd_req_pmac_add { 3439aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 3449aebddd1SJeff Kirsher u32 if_id; 3459aebddd1SJeff Kirsher u8 mac_address[ETH_ALEN]; 3469aebddd1SJeff Kirsher u8 rsvd0[2]; 3479aebddd1SJeff Kirsher } __packed; 3489aebddd1SJeff Kirsher 3499aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add { 3509aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 3519aebddd1SJeff Kirsher u32 pmac_id; 3529aebddd1SJeff Kirsher }; 3539aebddd1SJeff Kirsher 3549aebddd1SJeff Kirsher /******************** PMac Del ***************************/ 3559aebddd1SJeff Kirsher struct be_cmd_req_pmac_del { 3569aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 3579aebddd1SJeff Kirsher u32 if_id; 3589aebddd1SJeff Kirsher u32 pmac_id; 3599aebddd1SJeff Kirsher }; 3609aebddd1SJeff Kirsher 3619aebddd1SJeff Kirsher /******************** Create CQ ***************************/ 3629aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined 3639aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */ 3649aebddd1SJeff Kirsher struct amap_cq_context_be { 3659aebddd1SJeff Kirsher u8 cidx[11]; /* dword 0*/ 3669aebddd1SJeff Kirsher u8 rsvd0; /* dword 0*/ 3679aebddd1SJeff Kirsher u8 coalescwm[2]; /* dword 0*/ 3689aebddd1SJeff Kirsher u8 nodelay; /* dword 0*/ 3699aebddd1SJeff Kirsher u8 epidx[11]; /* dword 0*/ 3709aebddd1SJeff Kirsher u8 rsvd1; /* dword 0*/ 3719aebddd1SJeff Kirsher u8 count[2]; /* dword 0*/ 3729aebddd1SJeff Kirsher u8 valid; /* dword 0*/ 3739aebddd1SJeff Kirsher u8 solevent; /* dword 0*/ 3749aebddd1SJeff Kirsher u8 eventable; /* dword 0*/ 3759aebddd1SJeff Kirsher u8 pidx[11]; /* dword 1*/ 3769aebddd1SJeff Kirsher u8 rsvd2; /* dword 1*/ 3779aebddd1SJeff Kirsher u8 pd[10]; /* dword 1*/ 3789aebddd1SJeff Kirsher u8 eqid[8]; /* dword 1*/ 3799aebddd1SJeff Kirsher u8 stalled; /* dword 1*/ 3809aebddd1SJeff Kirsher u8 armed; /* dword 1*/ 3819aebddd1SJeff Kirsher u8 rsvd3[4]; /* dword 2*/ 3829aebddd1SJeff Kirsher u8 func[8]; /* dword 2*/ 3839aebddd1SJeff Kirsher u8 rsvd4[20]; /* dword 2*/ 3849aebddd1SJeff Kirsher u8 rsvd5[32]; /* dword 3*/ 3859aebddd1SJeff Kirsher } __packed; 3869aebddd1SJeff Kirsher 387bbdc42f8SAjit Khaparde struct amap_cq_context_v2 { 3889aebddd1SJeff Kirsher u8 rsvd0[12]; /* dword 0*/ 3899aebddd1SJeff Kirsher u8 coalescwm[2]; /* dword 0*/ 3909aebddd1SJeff Kirsher u8 nodelay; /* dword 0*/ 3919aebddd1SJeff Kirsher u8 rsvd1[12]; /* dword 0*/ 3929aebddd1SJeff Kirsher u8 count[2]; /* dword 0*/ 3939aebddd1SJeff Kirsher u8 valid; /* dword 0*/ 3949aebddd1SJeff Kirsher u8 rsvd2; /* dword 0*/ 3959aebddd1SJeff Kirsher u8 eventable; /* dword 0*/ 3969aebddd1SJeff Kirsher u8 eqid[16]; /* dword 1*/ 3979aebddd1SJeff Kirsher u8 rsvd3[15]; /* dword 1*/ 3989aebddd1SJeff Kirsher u8 armed; /* dword 1*/ 3999aebddd1SJeff Kirsher u8 rsvd4[32]; /* dword 2*/ 4009aebddd1SJeff Kirsher u8 rsvd5[32]; /* dword 3*/ 4019aebddd1SJeff Kirsher } __packed; 4029aebddd1SJeff Kirsher 4039aebddd1SJeff Kirsher struct be_cmd_req_cq_create { 4049aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 4059aebddd1SJeff Kirsher u16 num_pages; 4069aebddd1SJeff Kirsher u8 page_size; 4079aebddd1SJeff Kirsher u8 rsvd0; 4089aebddd1SJeff Kirsher u8 context[sizeof(struct amap_cq_context_be) / 8]; 4099aebddd1SJeff Kirsher struct phys_addr pages[8]; 4109aebddd1SJeff Kirsher } __packed; 4119aebddd1SJeff Kirsher 4129aebddd1SJeff Kirsher 4139aebddd1SJeff Kirsher struct be_cmd_resp_cq_create { 4149aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 4159aebddd1SJeff Kirsher u16 cq_id; 4169aebddd1SJeff Kirsher u16 rsvd0; 4179aebddd1SJeff Kirsher } __packed; 4189aebddd1SJeff Kirsher 4199aebddd1SJeff Kirsher struct be_cmd_req_get_fat { 4209aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 4219aebddd1SJeff Kirsher u32 fat_operation; 4229aebddd1SJeff Kirsher u32 read_log_offset; 4239aebddd1SJeff Kirsher u32 read_log_length; 4249aebddd1SJeff Kirsher u32 data_buffer_size; 4259aebddd1SJeff Kirsher u32 data_buffer[1]; 4269aebddd1SJeff Kirsher } __packed; 4279aebddd1SJeff Kirsher 4289aebddd1SJeff Kirsher struct be_cmd_resp_get_fat { 4299aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 4309aebddd1SJeff Kirsher u32 log_size; 4319aebddd1SJeff Kirsher u32 read_log_length; 4329aebddd1SJeff Kirsher u32 rsvd[2]; 4339aebddd1SJeff Kirsher u32 data_buffer[1]; 4349aebddd1SJeff Kirsher } __packed; 4359aebddd1SJeff Kirsher 4369aebddd1SJeff Kirsher 4379aebddd1SJeff Kirsher /******************** Create MCCQ ***************************/ 4389aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined 4399aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */ 4409aebddd1SJeff Kirsher struct amap_mcc_context_be { 4419aebddd1SJeff Kirsher u8 con_index[14]; 4429aebddd1SJeff Kirsher u8 rsvd0[2]; 4439aebddd1SJeff Kirsher u8 ring_size[4]; 4449aebddd1SJeff Kirsher u8 fetch_wrb; 4459aebddd1SJeff Kirsher u8 fetch_r2t; 4469aebddd1SJeff Kirsher u8 cq_id[10]; 4479aebddd1SJeff Kirsher u8 prod_index[14]; 4489aebddd1SJeff Kirsher u8 fid[8]; 4499aebddd1SJeff Kirsher u8 pdid[9]; 4509aebddd1SJeff Kirsher u8 valid; 4519aebddd1SJeff Kirsher u8 rsvd1[32]; 4529aebddd1SJeff Kirsher u8 rsvd2[32]; 4539aebddd1SJeff Kirsher } __packed; 4549aebddd1SJeff Kirsher 4559aebddd1SJeff Kirsher struct amap_mcc_context_lancer { 4569aebddd1SJeff Kirsher u8 async_cq_id[16]; 4579aebddd1SJeff Kirsher u8 ring_size[4]; 4589aebddd1SJeff Kirsher u8 rsvd0[12]; 4599aebddd1SJeff Kirsher u8 rsvd1[31]; 4609aebddd1SJeff Kirsher u8 valid; 4619aebddd1SJeff Kirsher u8 async_cq_valid[1]; 4629aebddd1SJeff Kirsher u8 rsvd2[31]; 4639aebddd1SJeff Kirsher u8 rsvd3[32]; 4649aebddd1SJeff Kirsher } __packed; 4659aebddd1SJeff Kirsher 4669aebddd1SJeff Kirsher struct be_cmd_req_mcc_create { 4679aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 4689aebddd1SJeff Kirsher u16 num_pages; 4699aebddd1SJeff Kirsher u16 cq_id; 4709aebddd1SJeff Kirsher u8 context[sizeof(struct amap_mcc_context_be) / 8]; 4719aebddd1SJeff Kirsher struct phys_addr pages[8]; 4729aebddd1SJeff Kirsher } __packed; 4739aebddd1SJeff Kirsher 4749aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create { 4759aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 4769aebddd1SJeff Kirsher u16 num_pages; 4779aebddd1SJeff Kirsher u16 cq_id; 4789aebddd1SJeff Kirsher u32 async_event_bitmap[1]; 4799aebddd1SJeff Kirsher u8 context[sizeof(struct amap_mcc_context_be) / 8]; 4809aebddd1SJeff Kirsher struct phys_addr pages[8]; 4819aebddd1SJeff Kirsher } __packed; 4829aebddd1SJeff Kirsher 4839aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create { 4849aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 4859aebddd1SJeff Kirsher u16 id; 4869aebddd1SJeff Kirsher u16 rsvd0; 4879aebddd1SJeff Kirsher } __packed; 4889aebddd1SJeff Kirsher 4899aebddd1SJeff Kirsher /******************** Create TxQ ***************************/ 4909aebddd1SJeff Kirsher #define BE_ETH_TX_RING_TYPE_STANDARD 2 4919aebddd1SJeff Kirsher #define BE_ULP1_NUM 1 4929aebddd1SJeff Kirsher 4939aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create { 4949aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 4959aebddd1SJeff Kirsher u8 num_pages; 4969aebddd1SJeff Kirsher u8 ulp_num; 49794d73aaaSVasundhara Volam u16 type; 49894d73aaaSVasundhara Volam u16 if_id; 49994d73aaaSVasundhara Volam u8 queue_size; 50094d73aaaSVasundhara Volam u8 rsvd0; 50194d73aaaSVasundhara Volam u32 rsvd1; 50294d73aaaSVasundhara Volam u16 cq_id; 50394d73aaaSVasundhara Volam u16 rsvd2; 50494d73aaaSVasundhara Volam u32 rsvd3[13]; 5059aebddd1SJeff Kirsher struct phys_addr pages[8]; 5069aebddd1SJeff Kirsher } __packed; 5079aebddd1SJeff Kirsher 5089aebddd1SJeff Kirsher struct be_cmd_resp_eth_tx_create { 5099aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 5109aebddd1SJeff Kirsher u16 cid; 51194d73aaaSVasundhara Volam u16 rid; 51294d73aaaSVasundhara Volam u32 db_offset; 51394d73aaaSVasundhara Volam u32 rsvd0[4]; 5149aebddd1SJeff Kirsher } __packed; 5159aebddd1SJeff Kirsher 5169aebddd1SJeff Kirsher /******************** Create RxQ ***************************/ 5179aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create { 5189aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 5199aebddd1SJeff Kirsher u16 cq_id; 5209aebddd1SJeff Kirsher u8 frag_size; 5219aebddd1SJeff Kirsher u8 num_pages; 5229aebddd1SJeff Kirsher struct phys_addr pages[2]; 5239aebddd1SJeff Kirsher u32 interface_id; 5249aebddd1SJeff Kirsher u16 max_frame_size; 5259aebddd1SJeff Kirsher u16 rsvd0; 5269aebddd1SJeff Kirsher u32 rss_queue; 5279aebddd1SJeff Kirsher } __packed; 5289aebddd1SJeff Kirsher 5299aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create { 5309aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 5319aebddd1SJeff Kirsher u16 id; 5329aebddd1SJeff Kirsher u8 rss_id; 5339aebddd1SJeff Kirsher u8 rsvd0; 5349aebddd1SJeff Kirsher } __packed; 5359aebddd1SJeff Kirsher 5369aebddd1SJeff Kirsher /******************** Q Destroy ***************************/ 5379aebddd1SJeff Kirsher /* Type of Queue to be destroyed */ 5389aebddd1SJeff Kirsher enum { 5399aebddd1SJeff Kirsher QTYPE_EQ = 1, 5409aebddd1SJeff Kirsher QTYPE_CQ, 5419aebddd1SJeff Kirsher QTYPE_TXQ, 5429aebddd1SJeff Kirsher QTYPE_RXQ, 5439aebddd1SJeff Kirsher QTYPE_MCCQ 5449aebddd1SJeff Kirsher }; 5459aebddd1SJeff Kirsher 5469aebddd1SJeff Kirsher struct be_cmd_req_q_destroy { 5479aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 5489aebddd1SJeff Kirsher u16 id; 5499aebddd1SJeff Kirsher u16 bypass_flush; /* valid only for rx q destroy */ 5509aebddd1SJeff Kirsher } __packed; 5519aebddd1SJeff Kirsher 5529aebddd1SJeff Kirsher /************ I/f Create (it's actually I/f Config Create)**********/ 5539aebddd1SJeff Kirsher 5549aebddd1SJeff Kirsher /* Capability flags for the i/f */ 5559aebddd1SJeff Kirsher enum be_if_flags { 5569aebddd1SJeff Kirsher BE_IF_FLAGS_RSS = 0x4, 5579aebddd1SJeff Kirsher BE_IF_FLAGS_PROMISCUOUS = 0x8, 5589aebddd1SJeff Kirsher BE_IF_FLAGS_BROADCAST = 0x10, 5599aebddd1SJeff Kirsher BE_IF_FLAGS_UNTAGGED = 0x20, 5609aebddd1SJeff Kirsher BE_IF_FLAGS_ULP = 0x40, 5619aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80, 5629aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN = 0x100, 5639aebddd1SJeff Kirsher BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200, 5649aebddd1SJeff Kirsher BE_IF_FLAGS_PASS_L2_ERRORS = 0x400, 5659aebddd1SJeff Kirsher BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800, 5669aebddd1SJeff Kirsher BE_IF_FLAGS_MULTICAST = 0x1000 5679aebddd1SJeff Kirsher }; 5689aebddd1SJeff Kirsher 5693da988c9SSarveshwar Bandi #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\ 5703da988c9SSarveshwar Bandi BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\ 5713da988c9SSarveshwar Bandi BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\ 5723da988c9SSarveshwar Bandi BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\ 5733da988c9SSarveshwar Bandi BE_IF_FLAGS_UNTAGGED) 5743da988c9SSarveshwar Bandi 5759aebddd1SJeff Kirsher /* An RX interface is an object with one or more MAC addresses and 5769aebddd1SJeff Kirsher * filtering capabilities. */ 5779aebddd1SJeff Kirsher struct be_cmd_req_if_create { 5789aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 5799aebddd1SJeff Kirsher u32 version; /* ignore currently */ 5809aebddd1SJeff Kirsher u32 capability_flags; 5819aebddd1SJeff Kirsher u32 enable_flags; 5829aebddd1SJeff Kirsher u8 mac_addr[ETH_ALEN]; 5839aebddd1SJeff Kirsher u8 rsvd0; 5849aebddd1SJeff Kirsher u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */ 5859aebddd1SJeff Kirsher u32 vlan_tag; /* not used currently */ 5869aebddd1SJeff Kirsher } __packed; 5879aebddd1SJeff Kirsher 5889aebddd1SJeff Kirsher struct be_cmd_resp_if_create { 5899aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 5909aebddd1SJeff Kirsher u32 interface_id; 5919aebddd1SJeff Kirsher u32 pmac_id; 5929aebddd1SJeff Kirsher }; 5939aebddd1SJeff Kirsher 5949aebddd1SJeff Kirsher /****** I/f Destroy(it's actually I/f Config Destroy )**********/ 5959aebddd1SJeff Kirsher struct be_cmd_req_if_destroy { 5969aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 5979aebddd1SJeff Kirsher u32 interface_id; 5989aebddd1SJeff Kirsher }; 5999aebddd1SJeff Kirsher 6009aebddd1SJeff Kirsher /*************** HW Stats Get **********************************/ 6019aebddd1SJeff Kirsher struct be_port_rxf_stats_v0 { 6029aebddd1SJeff Kirsher u32 rx_bytes_lsd; /* dword 0*/ 6039aebddd1SJeff Kirsher u32 rx_bytes_msd; /* dword 1*/ 6049aebddd1SJeff Kirsher u32 rx_total_frames; /* dword 2*/ 6059aebddd1SJeff Kirsher u32 rx_unicast_frames; /* dword 3*/ 6069aebddd1SJeff Kirsher u32 rx_multicast_frames; /* dword 4*/ 6079aebddd1SJeff Kirsher u32 rx_broadcast_frames; /* dword 5*/ 6089aebddd1SJeff Kirsher u32 rx_crc_errors; /* dword 6*/ 6099aebddd1SJeff Kirsher u32 rx_alignment_symbol_errors; /* dword 7*/ 6109aebddd1SJeff Kirsher u32 rx_pause_frames; /* dword 8*/ 6119aebddd1SJeff Kirsher u32 rx_control_frames; /* dword 9*/ 6129aebddd1SJeff Kirsher u32 rx_in_range_errors; /* dword 10*/ 6139aebddd1SJeff Kirsher u32 rx_out_range_errors; /* dword 11*/ 6149aebddd1SJeff Kirsher u32 rx_frame_too_long; /* dword 12*/ 61518fb06a1SSuresh Reddy u32 rx_address_filtered; /* dword 13*/ 61618fb06a1SSuresh Reddy u32 rx_vlan_filtered; /* dword 14*/ 6179aebddd1SJeff Kirsher u32 rx_dropped_too_small; /* dword 15*/ 6189aebddd1SJeff Kirsher u32 rx_dropped_too_short; /* dword 16*/ 6199aebddd1SJeff Kirsher u32 rx_dropped_header_too_small; /* dword 17*/ 6209aebddd1SJeff Kirsher u32 rx_dropped_tcp_length; /* dword 18*/ 6219aebddd1SJeff Kirsher u32 rx_dropped_runt; /* dword 19*/ 6229aebddd1SJeff Kirsher u32 rx_64_byte_packets; /* dword 20*/ 6239aebddd1SJeff Kirsher u32 rx_65_127_byte_packets; /* dword 21*/ 6249aebddd1SJeff Kirsher u32 rx_128_256_byte_packets; /* dword 22*/ 6259aebddd1SJeff Kirsher u32 rx_256_511_byte_packets; /* dword 23*/ 6269aebddd1SJeff Kirsher u32 rx_512_1023_byte_packets; /* dword 24*/ 6279aebddd1SJeff Kirsher u32 rx_1024_1518_byte_packets; /* dword 25*/ 6289aebddd1SJeff Kirsher u32 rx_1519_2047_byte_packets; /* dword 26*/ 6299aebddd1SJeff Kirsher u32 rx_2048_4095_byte_packets; /* dword 27*/ 6309aebddd1SJeff Kirsher u32 rx_4096_8191_byte_packets; /* dword 28*/ 6319aebddd1SJeff Kirsher u32 rx_8192_9216_byte_packets; /* dword 29*/ 6329aebddd1SJeff Kirsher u32 rx_ip_checksum_errs; /* dword 30*/ 6339aebddd1SJeff Kirsher u32 rx_tcp_checksum_errs; /* dword 31*/ 6349aebddd1SJeff Kirsher u32 rx_udp_checksum_errs; /* dword 32*/ 6359aebddd1SJeff Kirsher u32 rx_non_rss_packets; /* dword 33*/ 6369aebddd1SJeff Kirsher u32 rx_ipv4_packets; /* dword 34*/ 6379aebddd1SJeff Kirsher u32 rx_ipv6_packets; /* dword 35*/ 6389aebddd1SJeff Kirsher u32 rx_ipv4_bytes_lsd; /* dword 36*/ 6399aebddd1SJeff Kirsher u32 rx_ipv4_bytes_msd; /* dword 37*/ 6409aebddd1SJeff Kirsher u32 rx_ipv6_bytes_lsd; /* dword 38*/ 6419aebddd1SJeff Kirsher u32 rx_ipv6_bytes_msd; /* dword 39*/ 6429aebddd1SJeff Kirsher u32 rx_chute1_packets; /* dword 40*/ 6439aebddd1SJeff Kirsher u32 rx_chute2_packets; /* dword 41*/ 6449aebddd1SJeff Kirsher u32 rx_chute3_packets; /* dword 42*/ 6459aebddd1SJeff Kirsher u32 rx_management_packets; /* dword 43*/ 6469aebddd1SJeff Kirsher u32 rx_switched_unicast_packets; /* dword 44*/ 6479aebddd1SJeff Kirsher u32 rx_switched_multicast_packets; /* dword 45*/ 6489aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets; /* dword 46*/ 6499aebddd1SJeff Kirsher u32 tx_bytes_lsd; /* dword 47*/ 6509aebddd1SJeff Kirsher u32 tx_bytes_msd; /* dword 48*/ 6519aebddd1SJeff Kirsher u32 tx_unicastframes; /* dword 49*/ 6529aebddd1SJeff Kirsher u32 tx_multicastframes; /* dword 50*/ 6539aebddd1SJeff Kirsher u32 tx_broadcastframes; /* dword 51*/ 6549aebddd1SJeff Kirsher u32 tx_pauseframes; /* dword 52*/ 6559aebddd1SJeff Kirsher u32 tx_controlframes; /* dword 53*/ 6569aebddd1SJeff Kirsher u32 tx_64_byte_packets; /* dword 54*/ 6579aebddd1SJeff Kirsher u32 tx_65_127_byte_packets; /* dword 55*/ 6589aebddd1SJeff Kirsher u32 tx_128_256_byte_packets; /* dword 56*/ 6599aebddd1SJeff Kirsher u32 tx_256_511_byte_packets; /* dword 57*/ 6609aebddd1SJeff Kirsher u32 tx_512_1023_byte_packets; /* dword 58*/ 6619aebddd1SJeff Kirsher u32 tx_1024_1518_byte_packets; /* dword 59*/ 6629aebddd1SJeff Kirsher u32 tx_1519_2047_byte_packets; /* dword 60*/ 6639aebddd1SJeff Kirsher u32 tx_2048_4095_byte_packets; /* dword 61*/ 6649aebddd1SJeff Kirsher u32 tx_4096_8191_byte_packets; /* dword 62*/ 6659aebddd1SJeff Kirsher u32 tx_8192_9216_byte_packets; /* dword 63*/ 6669aebddd1SJeff Kirsher u32 rx_fifo_overflow; /* dword 64*/ 6679aebddd1SJeff Kirsher u32 rx_input_fifo_overflow; /* dword 65*/ 6689aebddd1SJeff Kirsher }; 6699aebddd1SJeff Kirsher 6709aebddd1SJeff Kirsher struct be_rxf_stats_v0 { 6719aebddd1SJeff Kirsher struct be_port_rxf_stats_v0 port[2]; 6729aebddd1SJeff Kirsher u32 rx_drops_no_pbuf; /* dword 132*/ 6739aebddd1SJeff Kirsher u32 rx_drops_no_txpb; /* dword 133*/ 6749aebddd1SJeff Kirsher u32 rx_drops_no_erx_descr; /* dword 134*/ 6759aebddd1SJeff Kirsher u32 rx_drops_no_tpre_descr; /* dword 135*/ 6769aebddd1SJeff Kirsher u32 management_rx_port_packets; /* dword 136*/ 6779aebddd1SJeff Kirsher u32 management_rx_port_bytes; /* dword 137*/ 6789aebddd1SJeff Kirsher u32 management_rx_port_pause_frames; /* dword 138*/ 6799aebddd1SJeff Kirsher u32 management_rx_port_errors; /* dword 139*/ 6809aebddd1SJeff Kirsher u32 management_tx_port_packets; /* dword 140*/ 6819aebddd1SJeff Kirsher u32 management_tx_port_bytes; /* dword 141*/ 6829aebddd1SJeff Kirsher u32 management_tx_port_pause; /* dword 142*/ 6839aebddd1SJeff Kirsher u32 management_rx_port_rxfifo_overflow; /* dword 143*/ 6849aebddd1SJeff Kirsher u32 rx_drops_too_many_frags; /* dword 144*/ 6859aebddd1SJeff Kirsher u32 rx_drops_invalid_ring; /* dword 145*/ 6869aebddd1SJeff Kirsher u32 forwarded_packets; /* dword 146*/ 6879aebddd1SJeff Kirsher u32 rx_drops_mtu; /* dword 147*/ 6889aebddd1SJeff Kirsher u32 rsvd0[7]; 6899aebddd1SJeff Kirsher u32 port0_jabber_events; 6909aebddd1SJeff Kirsher u32 port1_jabber_events; 6919aebddd1SJeff Kirsher u32 rsvd1[6]; 6929aebddd1SJeff Kirsher }; 6939aebddd1SJeff Kirsher 6949aebddd1SJeff Kirsher struct be_erx_stats_v0 { 6959aebddd1SJeff Kirsher u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/ 6969aebddd1SJeff Kirsher u32 rsvd[4]; 6979aebddd1SJeff Kirsher }; 6989aebddd1SJeff Kirsher 6999aebddd1SJeff Kirsher struct be_pmem_stats { 7009aebddd1SJeff Kirsher u32 eth_red_drops; 7019aebddd1SJeff Kirsher u32 rsvd[5]; 7029aebddd1SJeff Kirsher }; 7039aebddd1SJeff Kirsher 7049aebddd1SJeff Kirsher struct be_hw_stats_v0 { 7059aebddd1SJeff Kirsher struct be_rxf_stats_v0 rxf; 7069aebddd1SJeff Kirsher u32 rsvd[48]; 7079aebddd1SJeff Kirsher struct be_erx_stats_v0 erx; 7089aebddd1SJeff Kirsher struct be_pmem_stats pmem; 7099aebddd1SJeff Kirsher }; 7109aebddd1SJeff Kirsher 7119aebddd1SJeff Kirsher struct be_cmd_req_get_stats_v0 { 7129aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 7139aebddd1SJeff Kirsher u8 rsvd[sizeof(struct be_hw_stats_v0)]; 7149aebddd1SJeff Kirsher }; 7159aebddd1SJeff Kirsher 7169aebddd1SJeff Kirsher struct be_cmd_resp_get_stats_v0 { 7179aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 7189aebddd1SJeff Kirsher struct be_hw_stats_v0 hw_stats; 7199aebddd1SJeff Kirsher }; 7209aebddd1SJeff Kirsher 7219aebddd1SJeff Kirsher struct lancer_pport_stats { 7229aebddd1SJeff Kirsher u32 tx_packets_lo; 7239aebddd1SJeff Kirsher u32 tx_packets_hi; 7249aebddd1SJeff Kirsher u32 tx_unicast_packets_lo; 7259aebddd1SJeff Kirsher u32 tx_unicast_packets_hi; 7269aebddd1SJeff Kirsher u32 tx_multicast_packets_lo; 7279aebddd1SJeff Kirsher u32 tx_multicast_packets_hi; 7289aebddd1SJeff Kirsher u32 tx_broadcast_packets_lo; 7299aebddd1SJeff Kirsher u32 tx_broadcast_packets_hi; 7309aebddd1SJeff Kirsher u32 tx_bytes_lo; 7319aebddd1SJeff Kirsher u32 tx_bytes_hi; 7329aebddd1SJeff Kirsher u32 tx_unicast_bytes_lo; 7339aebddd1SJeff Kirsher u32 tx_unicast_bytes_hi; 7349aebddd1SJeff Kirsher u32 tx_multicast_bytes_lo; 7359aebddd1SJeff Kirsher u32 tx_multicast_bytes_hi; 7369aebddd1SJeff Kirsher u32 tx_broadcast_bytes_lo; 7379aebddd1SJeff Kirsher u32 tx_broadcast_bytes_hi; 7389aebddd1SJeff Kirsher u32 tx_discards_lo; 7399aebddd1SJeff Kirsher u32 tx_discards_hi; 7409aebddd1SJeff Kirsher u32 tx_errors_lo; 7419aebddd1SJeff Kirsher u32 tx_errors_hi; 7429aebddd1SJeff Kirsher u32 tx_pause_frames_lo; 7439aebddd1SJeff Kirsher u32 tx_pause_frames_hi; 7449aebddd1SJeff Kirsher u32 tx_pause_on_frames_lo; 7459aebddd1SJeff Kirsher u32 tx_pause_on_frames_hi; 7469aebddd1SJeff Kirsher u32 tx_pause_off_frames_lo; 7479aebddd1SJeff Kirsher u32 tx_pause_off_frames_hi; 7489aebddd1SJeff Kirsher u32 tx_internal_mac_errors_lo; 7499aebddd1SJeff Kirsher u32 tx_internal_mac_errors_hi; 7509aebddd1SJeff Kirsher u32 tx_control_frames_lo; 7519aebddd1SJeff Kirsher u32 tx_control_frames_hi; 7529aebddd1SJeff Kirsher u32 tx_packets_64_bytes_lo; 7539aebddd1SJeff Kirsher u32 tx_packets_64_bytes_hi; 7549aebddd1SJeff Kirsher u32 tx_packets_65_to_127_bytes_lo; 7559aebddd1SJeff Kirsher u32 tx_packets_65_to_127_bytes_hi; 7569aebddd1SJeff Kirsher u32 tx_packets_128_to_255_bytes_lo; 7579aebddd1SJeff Kirsher u32 tx_packets_128_to_255_bytes_hi; 7589aebddd1SJeff Kirsher u32 tx_packets_256_to_511_bytes_lo; 7599aebddd1SJeff Kirsher u32 tx_packets_256_to_511_bytes_hi; 7609aebddd1SJeff Kirsher u32 tx_packets_512_to_1023_bytes_lo; 7619aebddd1SJeff Kirsher u32 tx_packets_512_to_1023_bytes_hi; 7629aebddd1SJeff Kirsher u32 tx_packets_1024_to_1518_bytes_lo; 7639aebddd1SJeff Kirsher u32 tx_packets_1024_to_1518_bytes_hi; 7649aebddd1SJeff Kirsher u32 tx_packets_1519_to_2047_bytes_lo; 7659aebddd1SJeff Kirsher u32 tx_packets_1519_to_2047_bytes_hi; 7669aebddd1SJeff Kirsher u32 tx_packets_2048_to_4095_bytes_lo; 7679aebddd1SJeff Kirsher u32 tx_packets_2048_to_4095_bytes_hi; 7689aebddd1SJeff Kirsher u32 tx_packets_4096_to_8191_bytes_lo; 7699aebddd1SJeff Kirsher u32 tx_packets_4096_to_8191_bytes_hi; 7709aebddd1SJeff Kirsher u32 tx_packets_8192_to_9216_bytes_lo; 7719aebddd1SJeff Kirsher u32 tx_packets_8192_to_9216_bytes_hi; 7729aebddd1SJeff Kirsher u32 tx_lso_packets_lo; 7739aebddd1SJeff Kirsher u32 tx_lso_packets_hi; 7749aebddd1SJeff Kirsher u32 rx_packets_lo; 7759aebddd1SJeff Kirsher u32 rx_packets_hi; 7769aebddd1SJeff Kirsher u32 rx_unicast_packets_lo; 7779aebddd1SJeff Kirsher u32 rx_unicast_packets_hi; 7789aebddd1SJeff Kirsher u32 rx_multicast_packets_lo; 7799aebddd1SJeff Kirsher u32 rx_multicast_packets_hi; 7809aebddd1SJeff Kirsher u32 rx_broadcast_packets_lo; 7819aebddd1SJeff Kirsher u32 rx_broadcast_packets_hi; 7829aebddd1SJeff Kirsher u32 rx_bytes_lo; 7839aebddd1SJeff Kirsher u32 rx_bytes_hi; 7849aebddd1SJeff Kirsher u32 rx_unicast_bytes_lo; 7859aebddd1SJeff Kirsher u32 rx_unicast_bytes_hi; 7869aebddd1SJeff Kirsher u32 rx_multicast_bytes_lo; 7879aebddd1SJeff Kirsher u32 rx_multicast_bytes_hi; 7889aebddd1SJeff Kirsher u32 rx_broadcast_bytes_lo; 7899aebddd1SJeff Kirsher u32 rx_broadcast_bytes_hi; 7909aebddd1SJeff Kirsher u32 rx_unknown_protos; 7919aebddd1SJeff Kirsher u32 rsvd_69; /* Word 69 is reserved */ 7929aebddd1SJeff Kirsher u32 rx_discards_lo; 7939aebddd1SJeff Kirsher u32 rx_discards_hi; 7949aebddd1SJeff Kirsher u32 rx_errors_lo; 7959aebddd1SJeff Kirsher u32 rx_errors_hi; 7969aebddd1SJeff Kirsher u32 rx_crc_errors_lo; 7979aebddd1SJeff Kirsher u32 rx_crc_errors_hi; 7989aebddd1SJeff Kirsher u32 rx_alignment_errors_lo; 7999aebddd1SJeff Kirsher u32 rx_alignment_errors_hi; 8009aebddd1SJeff Kirsher u32 rx_symbol_errors_lo; 8019aebddd1SJeff Kirsher u32 rx_symbol_errors_hi; 8029aebddd1SJeff Kirsher u32 rx_pause_frames_lo; 8039aebddd1SJeff Kirsher u32 rx_pause_frames_hi; 8049aebddd1SJeff Kirsher u32 rx_pause_on_frames_lo; 8059aebddd1SJeff Kirsher u32 rx_pause_on_frames_hi; 8069aebddd1SJeff Kirsher u32 rx_pause_off_frames_lo; 8079aebddd1SJeff Kirsher u32 rx_pause_off_frames_hi; 8089aebddd1SJeff Kirsher u32 rx_frames_too_long_lo; 8099aebddd1SJeff Kirsher u32 rx_frames_too_long_hi; 8109aebddd1SJeff Kirsher u32 rx_internal_mac_errors_lo; 8119aebddd1SJeff Kirsher u32 rx_internal_mac_errors_hi; 8129aebddd1SJeff Kirsher u32 rx_undersize_packets; 8139aebddd1SJeff Kirsher u32 rx_oversize_packets; 8149aebddd1SJeff Kirsher u32 rx_fragment_packets; 8159aebddd1SJeff Kirsher u32 rx_jabbers; 8169aebddd1SJeff Kirsher u32 rx_control_frames_lo; 8179aebddd1SJeff Kirsher u32 rx_control_frames_hi; 8189aebddd1SJeff Kirsher u32 rx_control_frames_unknown_opcode_lo; 8199aebddd1SJeff Kirsher u32 rx_control_frames_unknown_opcode_hi; 8209aebddd1SJeff Kirsher u32 rx_in_range_errors; 8219aebddd1SJeff Kirsher u32 rx_out_of_range_errors; 82218fb06a1SSuresh Reddy u32 rx_address_filtered; 82318fb06a1SSuresh Reddy u32 rx_vlan_filtered; 8249aebddd1SJeff Kirsher u32 rx_dropped_too_small; 8259aebddd1SJeff Kirsher u32 rx_dropped_too_short; 8269aebddd1SJeff Kirsher u32 rx_dropped_header_too_small; 8279aebddd1SJeff Kirsher u32 rx_dropped_invalid_tcp_length; 8289aebddd1SJeff Kirsher u32 rx_dropped_runt; 8299aebddd1SJeff Kirsher u32 rx_ip_checksum_errors; 8309aebddd1SJeff Kirsher u32 rx_tcp_checksum_errors; 8319aebddd1SJeff Kirsher u32 rx_udp_checksum_errors; 8329aebddd1SJeff Kirsher u32 rx_non_rss_packets; 8339aebddd1SJeff Kirsher u32 rsvd_111; 8349aebddd1SJeff Kirsher u32 rx_ipv4_packets_lo; 8359aebddd1SJeff Kirsher u32 rx_ipv4_packets_hi; 8369aebddd1SJeff Kirsher u32 rx_ipv6_packets_lo; 8379aebddd1SJeff Kirsher u32 rx_ipv6_packets_hi; 8389aebddd1SJeff Kirsher u32 rx_ipv4_bytes_lo; 8399aebddd1SJeff Kirsher u32 rx_ipv4_bytes_hi; 8409aebddd1SJeff Kirsher u32 rx_ipv6_bytes_lo; 8419aebddd1SJeff Kirsher u32 rx_ipv6_bytes_hi; 8429aebddd1SJeff Kirsher u32 rx_nic_packets_lo; 8439aebddd1SJeff Kirsher u32 rx_nic_packets_hi; 8449aebddd1SJeff Kirsher u32 rx_tcp_packets_lo; 8459aebddd1SJeff Kirsher u32 rx_tcp_packets_hi; 8469aebddd1SJeff Kirsher u32 rx_iscsi_packets_lo; 8479aebddd1SJeff Kirsher u32 rx_iscsi_packets_hi; 8489aebddd1SJeff Kirsher u32 rx_management_packets_lo; 8499aebddd1SJeff Kirsher u32 rx_management_packets_hi; 8509aebddd1SJeff Kirsher u32 rx_switched_unicast_packets_lo; 8519aebddd1SJeff Kirsher u32 rx_switched_unicast_packets_hi; 8529aebddd1SJeff Kirsher u32 rx_switched_multicast_packets_lo; 8539aebddd1SJeff Kirsher u32 rx_switched_multicast_packets_hi; 8549aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets_lo; 8559aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets_hi; 8569aebddd1SJeff Kirsher u32 num_forwards_lo; 8579aebddd1SJeff Kirsher u32 num_forwards_hi; 8589aebddd1SJeff Kirsher u32 rx_fifo_overflow; 8599aebddd1SJeff Kirsher u32 rx_input_fifo_overflow; 8609aebddd1SJeff Kirsher u32 rx_drops_too_many_frags_lo; 8619aebddd1SJeff Kirsher u32 rx_drops_too_many_frags_hi; 8629aebddd1SJeff Kirsher u32 rx_drops_invalid_queue; 8639aebddd1SJeff Kirsher u32 rsvd_141; 8649aebddd1SJeff Kirsher u32 rx_drops_mtu_lo; 8659aebddd1SJeff Kirsher u32 rx_drops_mtu_hi; 8669aebddd1SJeff Kirsher u32 rx_packets_64_bytes_lo; 8679aebddd1SJeff Kirsher u32 rx_packets_64_bytes_hi; 8689aebddd1SJeff Kirsher u32 rx_packets_65_to_127_bytes_lo; 8699aebddd1SJeff Kirsher u32 rx_packets_65_to_127_bytes_hi; 8709aebddd1SJeff Kirsher u32 rx_packets_128_to_255_bytes_lo; 8719aebddd1SJeff Kirsher u32 rx_packets_128_to_255_bytes_hi; 8729aebddd1SJeff Kirsher u32 rx_packets_256_to_511_bytes_lo; 8739aebddd1SJeff Kirsher u32 rx_packets_256_to_511_bytes_hi; 8749aebddd1SJeff Kirsher u32 rx_packets_512_to_1023_bytes_lo; 8759aebddd1SJeff Kirsher u32 rx_packets_512_to_1023_bytes_hi; 8769aebddd1SJeff Kirsher u32 rx_packets_1024_to_1518_bytes_lo; 8779aebddd1SJeff Kirsher u32 rx_packets_1024_to_1518_bytes_hi; 8789aebddd1SJeff Kirsher u32 rx_packets_1519_to_2047_bytes_lo; 8799aebddd1SJeff Kirsher u32 rx_packets_1519_to_2047_bytes_hi; 8809aebddd1SJeff Kirsher u32 rx_packets_2048_to_4095_bytes_lo; 8819aebddd1SJeff Kirsher u32 rx_packets_2048_to_4095_bytes_hi; 8829aebddd1SJeff Kirsher u32 rx_packets_4096_to_8191_bytes_lo; 8839aebddd1SJeff Kirsher u32 rx_packets_4096_to_8191_bytes_hi; 8849aebddd1SJeff Kirsher u32 rx_packets_8192_to_9216_bytes_lo; 8859aebddd1SJeff Kirsher u32 rx_packets_8192_to_9216_bytes_hi; 8869aebddd1SJeff Kirsher }; 8879aebddd1SJeff Kirsher 8889aebddd1SJeff Kirsher struct pport_stats_params { 8899aebddd1SJeff Kirsher u16 pport_num; 8909aebddd1SJeff Kirsher u8 rsvd; 8919aebddd1SJeff Kirsher u8 reset_stats; 8929aebddd1SJeff Kirsher }; 8939aebddd1SJeff Kirsher 8949aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats { 8959aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 8969aebddd1SJeff Kirsher union { 8979aebddd1SJeff Kirsher struct pport_stats_params params; 8989aebddd1SJeff Kirsher u8 rsvd[sizeof(struct lancer_pport_stats)]; 8999aebddd1SJeff Kirsher } cmd_params; 9009aebddd1SJeff Kirsher }; 9019aebddd1SJeff Kirsher 9029aebddd1SJeff Kirsher struct lancer_cmd_resp_pport_stats { 9039aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 9049aebddd1SJeff Kirsher struct lancer_pport_stats pport_stats; 9059aebddd1SJeff Kirsher }; 9069aebddd1SJeff Kirsher 9079aebddd1SJeff Kirsher static inline struct lancer_pport_stats* 9089aebddd1SJeff Kirsher pport_stats_from_cmd(struct be_adapter *adapter) 9099aebddd1SJeff Kirsher { 9109aebddd1SJeff Kirsher struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va; 9119aebddd1SJeff Kirsher return &cmd->pport_stats; 9129aebddd1SJeff Kirsher } 9139aebddd1SJeff Kirsher 9149aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs { 9159aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 9169aebddd1SJeff Kirsher u8 rsvd[8]; 9179aebddd1SJeff Kirsher }; 9189aebddd1SJeff Kirsher 9199aebddd1SJeff Kirsher struct be_cmd_resp_get_cntl_addnl_attribs { 9209aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 9219aebddd1SJeff Kirsher u16 ipl_file_number; 9229aebddd1SJeff Kirsher u8 ipl_file_version; 9239aebddd1SJeff Kirsher u8 rsvd0; 9249aebddd1SJeff Kirsher u8 on_die_temperature; /* in degrees centigrade*/ 9259aebddd1SJeff Kirsher u8 rsvd1[3]; 9269aebddd1SJeff Kirsher }; 9279aebddd1SJeff Kirsher 9289aebddd1SJeff Kirsher struct be_cmd_req_vlan_config { 9299aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 9309aebddd1SJeff Kirsher u8 interface_id; 9319aebddd1SJeff Kirsher u8 promiscuous; 9329aebddd1SJeff Kirsher u8 untagged; 9339aebddd1SJeff Kirsher u8 num_vlan; 9349aebddd1SJeff Kirsher u16 normal_vlan[64]; 9359aebddd1SJeff Kirsher } __packed; 9369aebddd1SJeff Kirsher 9379aebddd1SJeff Kirsher /******************* RX FILTER ******************************/ 9389aebddd1SJeff Kirsher #define BE_MAX_MC 64 /* set mcast promisc if > 64 */ 9399aebddd1SJeff Kirsher struct macaddr { 9409aebddd1SJeff Kirsher u8 byte[ETH_ALEN]; 9419aebddd1SJeff Kirsher }; 9429aebddd1SJeff Kirsher 9439aebddd1SJeff Kirsher struct be_cmd_req_rx_filter { 9449aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 9459aebddd1SJeff Kirsher u32 global_flags_mask; 9469aebddd1SJeff Kirsher u32 global_flags; 9479aebddd1SJeff Kirsher u32 if_flags_mask; 9489aebddd1SJeff Kirsher u32 if_flags; 9499aebddd1SJeff Kirsher u32 if_id; 9509aebddd1SJeff Kirsher u32 mcast_num; 9519aebddd1SJeff Kirsher struct macaddr mcast_mac[BE_MAX_MC]; 9529aebddd1SJeff Kirsher }; 9539aebddd1SJeff Kirsher 9549aebddd1SJeff Kirsher /******************** Link Status Query *******************/ 9559aebddd1SJeff Kirsher struct be_cmd_req_link_status { 9569aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 9579aebddd1SJeff Kirsher u32 rsvd; 9589aebddd1SJeff Kirsher }; 9599aebddd1SJeff Kirsher 9609aebddd1SJeff Kirsher enum { 9619aebddd1SJeff Kirsher PHY_LINK_DUPLEX_NONE = 0x0, 9629aebddd1SJeff Kirsher PHY_LINK_DUPLEX_HALF = 0x1, 9639aebddd1SJeff Kirsher PHY_LINK_DUPLEX_FULL = 0x2 9649aebddd1SJeff Kirsher }; 9659aebddd1SJeff Kirsher 9669aebddd1SJeff Kirsher enum { 9679aebddd1SJeff Kirsher PHY_LINK_SPEED_ZERO = 0x0, /* => No link */ 9689aebddd1SJeff Kirsher PHY_LINK_SPEED_10MBPS = 0x1, 9699aebddd1SJeff Kirsher PHY_LINK_SPEED_100MBPS = 0x2, 9709aebddd1SJeff Kirsher PHY_LINK_SPEED_1GBPS = 0x3, 971b971f847SVasundhara Volam PHY_LINK_SPEED_10GBPS = 0x4, 972b971f847SVasundhara Volam PHY_LINK_SPEED_20GBPS = 0x5, 973b971f847SVasundhara Volam PHY_LINK_SPEED_25GBPS = 0x6, 974b971f847SVasundhara Volam PHY_LINK_SPEED_40GBPS = 0x7 9759aebddd1SJeff Kirsher }; 9769aebddd1SJeff Kirsher 9779aebddd1SJeff Kirsher struct be_cmd_resp_link_status { 9789aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 9799aebddd1SJeff Kirsher u8 physical_port; 9809aebddd1SJeff Kirsher u8 mac_duplex; 9819aebddd1SJeff Kirsher u8 mac_speed; 9829aebddd1SJeff Kirsher u8 mac_fault; 9839aebddd1SJeff Kirsher u8 mgmt_mac_duplex; 9849aebddd1SJeff Kirsher u8 mgmt_mac_speed; 9859aebddd1SJeff Kirsher u16 link_speed; 986b236916aSAjit Khaparde u8 logical_link_status; 987b236916aSAjit Khaparde u8 rsvd1[3]; 9889aebddd1SJeff Kirsher } __packed; 9899aebddd1SJeff Kirsher 9909aebddd1SJeff Kirsher /******************** Port Identification ***************************/ 9919aebddd1SJeff Kirsher /* Identifies the type of port attached to NIC */ 9929aebddd1SJeff Kirsher struct be_cmd_req_port_type { 9939aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 9949aebddd1SJeff Kirsher u32 page_num; 9959aebddd1SJeff Kirsher u32 port; 9969aebddd1SJeff Kirsher }; 9979aebddd1SJeff Kirsher 9989aebddd1SJeff Kirsher enum { 9999aebddd1SJeff Kirsher TR_PAGE_A0 = 0xa0, 10009aebddd1SJeff Kirsher TR_PAGE_A2 = 0xa2 10019aebddd1SJeff Kirsher }; 10029aebddd1SJeff Kirsher 10039aebddd1SJeff Kirsher struct be_cmd_resp_port_type { 10049aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 10059aebddd1SJeff Kirsher u32 page_num; 10069aebddd1SJeff Kirsher u32 port; 10079aebddd1SJeff Kirsher struct data { 10089aebddd1SJeff Kirsher u8 identifier; 10099aebddd1SJeff Kirsher u8 identifier_ext; 10109aebddd1SJeff Kirsher u8 connector; 10119aebddd1SJeff Kirsher u8 transceiver[8]; 10129aebddd1SJeff Kirsher u8 rsvd0[3]; 10139aebddd1SJeff Kirsher u8 length_km; 10149aebddd1SJeff Kirsher u8 length_hm; 10159aebddd1SJeff Kirsher u8 length_om1; 10169aebddd1SJeff Kirsher u8 length_om2; 10179aebddd1SJeff Kirsher u8 length_cu; 10189aebddd1SJeff Kirsher u8 length_cu_m; 10199aebddd1SJeff Kirsher u8 vendor_name[16]; 10209aebddd1SJeff Kirsher u8 rsvd; 10219aebddd1SJeff Kirsher u8 vendor_oui[3]; 10229aebddd1SJeff Kirsher u8 vendor_pn[16]; 10239aebddd1SJeff Kirsher u8 vendor_rev[4]; 10249aebddd1SJeff Kirsher } data; 10259aebddd1SJeff Kirsher }; 10269aebddd1SJeff Kirsher 10279aebddd1SJeff Kirsher /******************** Get FW Version *******************/ 10289aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version { 10299aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 10309aebddd1SJeff Kirsher u8 rsvd0[FW_VER_LEN]; 10319aebddd1SJeff Kirsher u8 rsvd1[FW_VER_LEN]; 10329aebddd1SJeff Kirsher } __packed; 10339aebddd1SJeff Kirsher 10349aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version { 10359aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 10369aebddd1SJeff Kirsher u8 firmware_version_string[FW_VER_LEN]; 10379aebddd1SJeff Kirsher u8 fw_on_flash_version_string[FW_VER_LEN]; 10389aebddd1SJeff Kirsher } __packed; 10399aebddd1SJeff Kirsher 10409aebddd1SJeff Kirsher /******************** Set Flow Contrl *******************/ 10419aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control { 10429aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 10439aebddd1SJeff Kirsher u16 tx_flow_control; 10449aebddd1SJeff Kirsher u16 rx_flow_control; 10459aebddd1SJeff Kirsher } __packed; 10469aebddd1SJeff Kirsher 10479aebddd1SJeff Kirsher /******************** Get Flow Contrl *******************/ 10489aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control { 10499aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 10509aebddd1SJeff Kirsher u32 rsvd; 10519aebddd1SJeff Kirsher }; 10529aebddd1SJeff Kirsher 10539aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control { 10549aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 10559aebddd1SJeff Kirsher u16 tx_flow_control; 10569aebddd1SJeff Kirsher u16 rx_flow_control; 10579aebddd1SJeff Kirsher } __packed; 10589aebddd1SJeff Kirsher 10599aebddd1SJeff Kirsher /******************** Modify EQ Delay *******************/ 10602632bafdSSathya Perla struct be_set_eqd { 10619aebddd1SJeff Kirsher u32 eq_id; 10629aebddd1SJeff Kirsher u32 phase; 10639aebddd1SJeff Kirsher u32 delay_multiplier; 10642632bafdSSathya Perla }; 10652632bafdSSathya Perla 10662632bafdSSathya Perla struct be_cmd_req_modify_eq_delay { 10672632bafdSSathya Perla struct be_cmd_req_hdr hdr; 10682632bafdSSathya Perla u32 num_eq; 10692632bafdSSathya Perla struct be_set_eqd set_eqd[MAX_EVT_QS]; 10709aebddd1SJeff Kirsher } __packed; 10719aebddd1SJeff Kirsher 10729aebddd1SJeff Kirsher struct be_cmd_resp_modify_eq_delay { 10739aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 10749aebddd1SJeff Kirsher u32 rsvd0; 10759aebddd1SJeff Kirsher } __packed; 10769aebddd1SJeff Kirsher 10779aebddd1SJeff Kirsher /******************** Get FW Config *******************/ 1078752961a1SSathya Perla /* The HW can come up in either of the following multi-channel modes 1079752961a1SSathya Perla * based on the skew/IPL. 1080752961a1SSathya Perla */ 1081045508a8SParav Pandit #define RDMA_ENABLED 0x4 1082752961a1SSathya Perla #define FLEX10_MODE 0x400 1083752961a1SSathya Perla #define VNIC_MODE 0x20000 1084752961a1SSathya Perla #define UMC_ENABLED 0x1000000 10859aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg { 10869aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 10879aebddd1SJeff Kirsher u32 rsvd[31]; 10889aebddd1SJeff Kirsher }; 10899aebddd1SJeff Kirsher 10909aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg { 10919aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 10929aebddd1SJeff Kirsher u32 be_config_number; 10939aebddd1SJeff Kirsher u32 asic_revision; 10949aebddd1SJeff Kirsher u32 phys_port; 10959aebddd1SJeff Kirsher u32 function_mode; 10969aebddd1SJeff Kirsher u32 rsvd[26]; 10979aebddd1SJeff Kirsher u32 function_caps; 10989aebddd1SJeff Kirsher }; 10999aebddd1SJeff Kirsher 110073dea398SPadmanabh Ratnakar /******************** RSS Config ****************************************/ 110173dea398SPadmanabh Ratnakar /* RSS type Input parameters used to compute RX hash 110273dea398SPadmanabh Ratnakar * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4 110373dea398SPadmanabh Ratnakar * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT 110473dea398SPadmanabh Ratnakar * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6 110573dea398SPadmanabh Ratnakar * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT 110673dea398SPadmanabh Ratnakar * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT 110773dea398SPadmanabh Ratnakar * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT 110873dea398SPadmanabh Ratnakar * 110973dea398SPadmanabh Ratnakar * When multiple RSS types are enabled, HW picks the best hash policy 111073dea398SPadmanabh Ratnakar * based on the type of the received packet. 111173dea398SPadmanabh Ratnakar */ 11129aebddd1SJeff Kirsher #define RSS_ENABLE_NONE 0x0 11139aebddd1SJeff Kirsher #define RSS_ENABLE_IPV4 0x1 11149aebddd1SJeff Kirsher #define RSS_ENABLE_TCP_IPV4 0x2 11159aebddd1SJeff Kirsher #define RSS_ENABLE_IPV6 0x4 11169aebddd1SJeff Kirsher #define RSS_ENABLE_TCP_IPV6 0x8 1117d3bd3a5eSPadmanabh Ratnakar #define RSS_ENABLE_UDP_IPV4 0x10 1118d3bd3a5eSPadmanabh Ratnakar #define RSS_ENABLE_UDP_IPV6 0x20 11199aebddd1SJeff Kirsher 1120594ad54aSSuresh Reddy #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC) 1121594ad54aSSuresh Reddy #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3) 1122594ad54aSSuresh Reddy 11239aebddd1SJeff Kirsher struct be_cmd_req_rss_config { 11249aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 11259aebddd1SJeff Kirsher u32 if_id; 11269aebddd1SJeff Kirsher u16 enable_rss; 11279aebddd1SJeff Kirsher u16 cpu_table_size_log2; 11289aebddd1SJeff Kirsher u32 hash[10]; 11299aebddd1SJeff Kirsher u8 cpu_table[128]; 11309aebddd1SJeff Kirsher u8 flush; 11319aebddd1SJeff Kirsher u8 rsvd0[3]; 11329aebddd1SJeff Kirsher }; 11339aebddd1SJeff Kirsher 11349aebddd1SJeff Kirsher /******************** Port Beacon ***************************/ 11359aebddd1SJeff Kirsher 11369aebddd1SJeff Kirsher #define BEACON_STATE_ENABLED 0x1 11379aebddd1SJeff Kirsher #define BEACON_STATE_DISABLED 0x0 11389aebddd1SJeff Kirsher 11399aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon { 11409aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 11419aebddd1SJeff Kirsher u8 port_num; 11429aebddd1SJeff Kirsher u8 beacon_state; 11439aebddd1SJeff Kirsher u8 beacon_duration; 11449aebddd1SJeff Kirsher u8 status_duration; 11459aebddd1SJeff Kirsher } __packed; 11469aebddd1SJeff Kirsher 11479aebddd1SJeff Kirsher struct be_cmd_resp_enable_disable_beacon { 11489aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr; 11499aebddd1SJeff Kirsher u32 rsvd0; 11509aebddd1SJeff Kirsher } __packed; 11519aebddd1SJeff Kirsher 11529aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state { 11539aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 11549aebddd1SJeff Kirsher u8 port_num; 11559aebddd1SJeff Kirsher u8 rsvd0; 11569aebddd1SJeff Kirsher u16 rsvd1; 11579aebddd1SJeff Kirsher } __packed; 11589aebddd1SJeff Kirsher 11599aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state { 11609aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr; 11619aebddd1SJeff Kirsher u8 beacon_state; 11629aebddd1SJeff Kirsher u8 rsvd0[3]; 11639aebddd1SJeff Kirsher } __packed; 11649aebddd1SJeff Kirsher 11659aebddd1SJeff Kirsher /****************** Firmware Flash ******************/ 11669aebddd1SJeff Kirsher struct flashrom_params { 11679aebddd1SJeff Kirsher u32 op_code; 11689aebddd1SJeff Kirsher u32 op_type; 11699aebddd1SJeff Kirsher u32 data_buf_size; 11709aebddd1SJeff Kirsher u32 offset; 11719aebddd1SJeff Kirsher }; 11729aebddd1SJeff Kirsher 11739aebddd1SJeff Kirsher struct be_cmd_write_flashrom { 11749aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 11759aebddd1SJeff Kirsher struct flashrom_params params; 1176be716446SPadmanabh Ratnakar u8 data_buf[32768]; 1177be716446SPadmanabh Ratnakar u8 rsvd[4]; 1178be716446SPadmanabh Ratnakar } __packed; 11799aebddd1SJeff Kirsher 1180be716446SPadmanabh Ratnakar /* cmd to read flash crc */ 1181be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc { 1182be716446SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1183be716446SPadmanabh Ratnakar struct flashrom_params params; 1184be716446SPadmanabh Ratnakar u8 crc[4]; 1185be716446SPadmanabh Ratnakar u8 rsvd[4]; 1186be716446SPadmanabh Ratnakar }; 11879aebddd1SJeff Kirsher /**************** Lancer Firmware Flash ************/ 11889aebddd1SJeff Kirsher struct amap_lancer_write_obj_context { 11899aebddd1SJeff Kirsher u8 write_length[24]; 11909aebddd1SJeff Kirsher u8 reserved1[7]; 11919aebddd1SJeff Kirsher u8 eof; 11929aebddd1SJeff Kirsher } __packed; 11939aebddd1SJeff Kirsher 11949aebddd1SJeff Kirsher struct lancer_cmd_req_write_object { 11959aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 11969aebddd1SJeff Kirsher u8 context[sizeof(struct amap_lancer_write_obj_context) / 8]; 11979aebddd1SJeff Kirsher u32 write_offset; 11989aebddd1SJeff Kirsher u8 object_name[104]; 11999aebddd1SJeff Kirsher u32 descriptor_count; 12009aebddd1SJeff Kirsher u32 buf_len; 12019aebddd1SJeff Kirsher u32 addr_low; 12029aebddd1SJeff Kirsher u32 addr_high; 12039aebddd1SJeff Kirsher }; 12049aebddd1SJeff Kirsher 1205f67ef7baSPadmanabh Ratnakar #define LANCER_NO_RESET_NEEDED 0x00 1206f67ef7baSPadmanabh Ratnakar #define LANCER_FW_RESET_NEEDED 0x02 12079aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object { 12089aebddd1SJeff Kirsher u8 opcode; 12099aebddd1SJeff Kirsher u8 subsystem; 12109aebddd1SJeff Kirsher u8 rsvd1[2]; 12119aebddd1SJeff Kirsher u8 status; 12129aebddd1SJeff Kirsher u8 additional_status; 12139aebddd1SJeff Kirsher u8 rsvd2[2]; 12149aebddd1SJeff Kirsher u32 resp_len; 12159aebddd1SJeff Kirsher u32 actual_resp_len; 12169aebddd1SJeff Kirsher u32 actual_write_len; 1217f67ef7baSPadmanabh Ratnakar u8 change_status; 1218f67ef7baSPadmanabh Ratnakar u8 rsvd3[3]; 12199aebddd1SJeff Kirsher }; 12209aebddd1SJeff Kirsher 1221de49bd5aSPadmanabh Ratnakar /************************ Lancer Read FW info **************/ 1222de49bd5aSPadmanabh Ratnakar #define LANCER_READ_FILE_CHUNK (32*1024) 1223de49bd5aSPadmanabh Ratnakar #define LANCER_READ_FILE_EOF_MASK 0x80000000 1224de49bd5aSPadmanabh Ratnakar 1225de49bd5aSPadmanabh Ratnakar #define LANCER_FW_DUMP_FILE "/dbg/dump.bin" 1226af5875bdSPadmanabh Ratnakar #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd" 1227af5875bdSPadmanabh Ratnakar #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd" 1228de49bd5aSPadmanabh Ratnakar 1229de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object { 1230de49bd5aSPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1231de49bd5aSPadmanabh Ratnakar u32 desired_read_len; 1232de49bd5aSPadmanabh Ratnakar u32 read_offset; 1233de49bd5aSPadmanabh Ratnakar u8 object_name[104]; 1234de49bd5aSPadmanabh Ratnakar u32 descriptor_count; 1235de49bd5aSPadmanabh Ratnakar u32 buf_len; 1236de49bd5aSPadmanabh Ratnakar u32 addr_low; 1237de49bd5aSPadmanabh Ratnakar u32 addr_high; 1238de49bd5aSPadmanabh Ratnakar }; 1239de49bd5aSPadmanabh Ratnakar 1240de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object { 1241de49bd5aSPadmanabh Ratnakar u8 opcode; 1242de49bd5aSPadmanabh Ratnakar u8 subsystem; 1243de49bd5aSPadmanabh Ratnakar u8 rsvd1[2]; 1244de49bd5aSPadmanabh Ratnakar u8 status; 1245de49bd5aSPadmanabh Ratnakar u8 additional_status; 1246de49bd5aSPadmanabh Ratnakar u8 rsvd2[2]; 1247de49bd5aSPadmanabh Ratnakar u32 resp_len; 1248de49bd5aSPadmanabh Ratnakar u32 actual_resp_len; 1249de49bd5aSPadmanabh Ratnakar u32 actual_read_len; 1250de49bd5aSPadmanabh Ratnakar u32 eof; 1251de49bd5aSPadmanabh Ratnakar }; 1252de49bd5aSPadmanabh Ratnakar 12539aebddd1SJeff Kirsher /************************ WOL *******************************/ 12549aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config{ 12559aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 12569aebddd1SJeff Kirsher u32 rsvd0[145]; 12579aebddd1SJeff Kirsher u8 magic_mac[6]; 12589aebddd1SJeff Kirsher u8 rsvd2[2]; 12599aebddd1SJeff Kirsher } __packed; 12609aebddd1SJeff Kirsher 12614762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 { 12624762f6ceSAjit Khaparde struct be_cmd_req_hdr hdr; 12634762f6ceSAjit Khaparde u8 rsvd0[2]; 12644762f6ceSAjit Khaparde u8 query_options; 12654762f6ceSAjit Khaparde u8 rsvd1[5]; 12664762f6ceSAjit Khaparde u32 rsvd2[288]; 12674762f6ceSAjit Khaparde u8 magic_mac[6]; 12684762f6ceSAjit Khaparde u8 rsvd3[22]; 12694762f6ceSAjit Khaparde } __packed; 12704762f6ceSAjit Khaparde 12714762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 { 12724762f6ceSAjit Khaparde struct be_cmd_resp_hdr hdr; 12734762f6ceSAjit Khaparde u8 rsvd0[2]; 12744762f6ceSAjit Khaparde u8 wol_settings; 12754762f6ceSAjit Khaparde u8 rsvd1[5]; 12764762f6ceSAjit Khaparde u32 rsvd2[295]; 12774762f6ceSAjit Khaparde } __packed; 12784762f6ceSAjit Khaparde 12794762f6ceSAjit Khaparde #define BE_GET_WOL_CAP 2 12804762f6ceSAjit Khaparde 12814762f6ceSAjit Khaparde #define BE_WOL_CAP 0x1 12824762f6ceSAjit Khaparde #define BE_PME_D0_CAP 0x8 12834762f6ceSAjit Khaparde #define BE_PME_D1_CAP 0x10 12844762f6ceSAjit Khaparde #define BE_PME_D2_CAP 0x20 12854762f6ceSAjit Khaparde #define BE_PME_D3HOT_CAP 0x40 12864762f6ceSAjit Khaparde #define BE_PME_D3COLD_CAP 0x80 12874762f6ceSAjit Khaparde 12889aebddd1SJeff Kirsher /********************** LoopBack test *********************/ 12899aebddd1SJeff Kirsher struct be_cmd_req_loopback_test { 12909aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 12919aebddd1SJeff Kirsher u32 loopback_type; 12929aebddd1SJeff Kirsher u32 num_pkts; 12939aebddd1SJeff Kirsher u64 pattern; 12949aebddd1SJeff Kirsher u32 src_port; 12959aebddd1SJeff Kirsher u32 dest_port; 12969aebddd1SJeff Kirsher u32 pkt_size; 12979aebddd1SJeff Kirsher }; 12989aebddd1SJeff Kirsher 12999aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test { 13009aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr; 13019aebddd1SJeff Kirsher u32 status; 13029aebddd1SJeff Kirsher u32 num_txfer; 13039aebddd1SJeff Kirsher u32 num_rx; 13049aebddd1SJeff Kirsher u32 miscomp_off; 13059aebddd1SJeff Kirsher u32 ticks_compl; 13069aebddd1SJeff Kirsher }; 13079aebddd1SJeff Kirsher 13089aebddd1SJeff Kirsher struct be_cmd_req_set_lmode { 13099aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 13109aebddd1SJeff Kirsher u8 src_port; 13119aebddd1SJeff Kirsher u8 dest_port; 13129aebddd1SJeff Kirsher u8 loopback_type; 13139aebddd1SJeff Kirsher u8 loopback_state; 13149aebddd1SJeff Kirsher }; 13159aebddd1SJeff Kirsher 13169aebddd1SJeff Kirsher struct be_cmd_resp_set_lmode { 13179aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr; 13189aebddd1SJeff Kirsher u8 rsvd0[4]; 13199aebddd1SJeff Kirsher }; 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher /********************** DDR DMA test *********************/ 13229aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test { 13239aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 13249aebddd1SJeff Kirsher u64 pattern; 13259aebddd1SJeff Kirsher u32 byte_count; 13269aebddd1SJeff Kirsher u32 rsvd0; 13279aebddd1SJeff Kirsher u8 snd_buff[4096]; 13289aebddd1SJeff Kirsher u8 rsvd1[4096]; 13299aebddd1SJeff Kirsher }; 13309aebddd1SJeff Kirsher 13319aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test { 13329aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 13339aebddd1SJeff Kirsher u64 pattern; 13349aebddd1SJeff Kirsher u32 byte_cnt; 13359aebddd1SJeff Kirsher u32 snd_err; 13369aebddd1SJeff Kirsher u8 rsvd0[4096]; 13379aebddd1SJeff Kirsher u8 rcv_buff[4096]; 13389aebddd1SJeff Kirsher }; 13399aebddd1SJeff Kirsher 13409aebddd1SJeff Kirsher /*********************** SEEPROM Read ***********************/ 13419aebddd1SJeff Kirsher 13429aebddd1SJeff Kirsher #define BE_READ_SEEPROM_LEN 1024 13439aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read { 13449aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 13459aebddd1SJeff Kirsher u8 rsvd0[BE_READ_SEEPROM_LEN]; 13469aebddd1SJeff Kirsher }; 13479aebddd1SJeff Kirsher 13489aebddd1SJeff Kirsher struct be_cmd_resp_seeprom_read { 13499aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 13509aebddd1SJeff Kirsher u8 seeprom_data[BE_READ_SEEPROM_LEN]; 13519aebddd1SJeff Kirsher }; 13529aebddd1SJeff Kirsher 13539aebddd1SJeff Kirsher enum { 13549aebddd1SJeff Kirsher PHY_TYPE_CX4_10GB = 0, 13559aebddd1SJeff Kirsher PHY_TYPE_XFP_10GB, 13569aebddd1SJeff Kirsher PHY_TYPE_SFP_1GB, 13579aebddd1SJeff Kirsher PHY_TYPE_SFP_PLUS_10GB, 13589aebddd1SJeff Kirsher PHY_TYPE_KR_10GB, 13599aebddd1SJeff Kirsher PHY_TYPE_KX4_10GB, 13609aebddd1SJeff Kirsher PHY_TYPE_BASET_10GB, 13619aebddd1SJeff Kirsher PHY_TYPE_BASET_1GB, 136242f11cf2SAjit Khaparde PHY_TYPE_BASEX_1GB, 136342f11cf2SAjit Khaparde PHY_TYPE_SGMII, 13649aebddd1SJeff Kirsher PHY_TYPE_DISABLED = 255 13659aebddd1SJeff Kirsher }; 13669aebddd1SJeff Kirsher 136742f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_NONE 0 136842f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_10MBPS 1 136942f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_100MBPS 2 137042f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_1GBPS 4 137142f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_10GBPS 8 137242f11cf2SAjit Khaparde 137342f11cf2SAjit Khaparde #define BE_AN_EN 0x2 137442f11cf2SAjit Khaparde #define BE_PAUSE_SYM_EN 0x80 137542f11cf2SAjit Khaparde 137642f11cf2SAjit Khaparde /* MAC speed valid values */ 137742f11cf2SAjit Khaparde #define SPEED_DEFAULT 0x0 137842f11cf2SAjit Khaparde #define SPEED_FORCED_10GB 0x1 137942f11cf2SAjit Khaparde #define SPEED_FORCED_1GB 0x2 138042f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB 0x3 138142f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB 0x4 138242f11cf2SAjit Khaparde #define SPEED_AUTONEG_100MB 0x5 138342f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB_1GB 0x6 138442f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB_1GB_100MB 0x7 138542f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB_100MB 0x8 138642f11cf2SAjit Khaparde #define SPEED_AUTONEG_10MB 0x9 138742f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB_100MB_10MB 0xa 138842f11cf2SAjit Khaparde #define SPEED_AUTONEG_100MB_10MB 0xb 138942f11cf2SAjit Khaparde #define SPEED_FORCED_100MB 0xc 139042f11cf2SAjit Khaparde #define SPEED_FORCED_10MB 0xd 139142f11cf2SAjit Khaparde 13929aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info { 13939aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 13949aebddd1SJeff Kirsher u8 rsvd0[24]; 13959aebddd1SJeff Kirsher }; 13969aebddd1SJeff Kirsher 13979aebddd1SJeff Kirsher struct be_phy_info { 13989aebddd1SJeff Kirsher u16 phy_type; 13999aebddd1SJeff Kirsher u16 interface_type; 14009aebddd1SJeff Kirsher u32 misc_params; 140142f11cf2SAjit Khaparde u16 ext_phy_details; 140242f11cf2SAjit Khaparde u16 rsvd; 140342f11cf2SAjit Khaparde u16 auto_speeds_supported; 140442f11cf2SAjit Khaparde u16 fixed_speeds_supported; 140542f11cf2SAjit Khaparde u32 future_use[2]; 14069aebddd1SJeff Kirsher }; 14079aebddd1SJeff Kirsher 14089aebddd1SJeff Kirsher struct be_cmd_resp_get_phy_info { 14099aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 14109aebddd1SJeff Kirsher struct be_phy_info phy_info; 14119aebddd1SJeff Kirsher }; 14129aebddd1SJeff Kirsher 14139aebddd1SJeff Kirsher /*********************** Set QOS ***********************/ 14149aebddd1SJeff Kirsher 14159aebddd1SJeff Kirsher #define BE_QOS_BITS_NIC 1 14169aebddd1SJeff Kirsher 14179aebddd1SJeff Kirsher struct be_cmd_req_set_qos { 14189aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 14199aebddd1SJeff Kirsher u32 valid_bits; 14209aebddd1SJeff Kirsher u32 max_bps_nic; 14219aebddd1SJeff Kirsher u32 rsvd[7]; 14229aebddd1SJeff Kirsher }; 14239aebddd1SJeff Kirsher 14249aebddd1SJeff Kirsher struct be_cmd_resp_set_qos { 14259aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 14269aebddd1SJeff Kirsher u32 rsvd; 14279aebddd1SJeff Kirsher }; 14289aebddd1SJeff Kirsher 14299aebddd1SJeff Kirsher /*********************** Controller Attributes ***********************/ 14309aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs { 14319aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 14329aebddd1SJeff Kirsher }; 14339aebddd1SJeff Kirsher 14349aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs { 14359aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 14369aebddd1SJeff Kirsher struct mgmt_controller_attrib attribs; 14379aebddd1SJeff Kirsher }; 14389aebddd1SJeff Kirsher 14399aebddd1SJeff Kirsher /*********************** Set driver function ***********************/ 14409aebddd1SJeff Kirsher #define CAPABILITY_SW_TIMESTAMPS 2 14419aebddd1SJeff Kirsher #define CAPABILITY_BE3_NATIVE_ERX_API 4 14429aebddd1SJeff Kirsher 14439aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap { 14449aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 14459aebddd1SJeff Kirsher u32 valid_cap_flags; 14469aebddd1SJeff Kirsher u32 cap_flags; 14479aebddd1SJeff Kirsher u8 rsvd[212]; 14489aebddd1SJeff Kirsher }; 14499aebddd1SJeff Kirsher 14509aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap { 14519aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 14529aebddd1SJeff Kirsher u32 valid_cap_flags; 14539aebddd1SJeff Kirsher u32 cap_flags; 14549aebddd1SJeff Kirsher u8 rsvd[212]; 14559aebddd1SJeff Kirsher }; 14569aebddd1SJeff Kirsher 1457f25b119cSPadmanabh Ratnakar /*********************** Function Privileges ***********************/ 1458f25b119cSPadmanabh Ratnakar enum { 1459f25b119cSPadmanabh Ratnakar BE_PRIV_DEFAULT = 0x1, 1460f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY = 0x2, 1461f25b119cSPadmanabh Ratnakar BE_PRIV_LNKSTATS = 0x4, 1462f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT = 0x8, 1463f25b119cSPadmanabh Ratnakar BE_PRIV_LNKDIAG = 0x10, 1464f25b119cSPadmanabh Ratnakar BE_PRIV_UTILQUERY = 0x20, 1465f25b119cSPadmanabh Ratnakar BE_PRIV_FILTMGMT = 0x40, 1466f25b119cSPadmanabh Ratnakar BE_PRIV_IFACEMGMT = 0x80, 1467f25b119cSPadmanabh Ratnakar BE_PRIV_VHADM = 0x100, 1468f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG = 0x200, 1469f25b119cSPadmanabh Ratnakar BE_PRIV_DEVSEC = 0x400 1470f25b119cSPadmanabh Ratnakar }; 1471f25b119cSPadmanabh Ratnakar #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \ 1472f25b119cSPadmanabh Ratnakar BE_PRIV_DEVSEC) 1473f25b119cSPadmanabh Ratnakar #define MIN_PRIVILEGES BE_PRIV_DEFAULT 1474f25b119cSPadmanabh Ratnakar 1475f25b119cSPadmanabh Ratnakar struct be_cmd_priv_map { 1476f25b119cSPadmanabh Ratnakar u8 opcode; 1477f25b119cSPadmanabh Ratnakar u8 subsystem; 1478f25b119cSPadmanabh Ratnakar u32 priv_mask; 1479f25b119cSPadmanabh Ratnakar }; 1480f25b119cSPadmanabh Ratnakar 1481f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges { 1482f25b119cSPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1483f25b119cSPadmanabh Ratnakar u32 rsvd; 1484f25b119cSPadmanabh Ratnakar }; 1485f25b119cSPadmanabh Ratnakar 1486f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges { 1487f25b119cSPadmanabh Ratnakar struct be_cmd_resp_hdr hdr; 1488f25b119cSPadmanabh Ratnakar u32 privilege_mask; 1489f25b119cSPadmanabh Ratnakar }; 1490f25b119cSPadmanabh Ratnakar 149104a06028SSathya Perla struct be_cmd_req_set_fn_privileges { 149204a06028SSathya Perla struct be_cmd_req_hdr hdr; 149304a06028SSathya Perla u32 privileges; /* Used by BE3, SH-R */ 149404a06028SSathya Perla u32 privileges_lancer; /* Used by Lancer */ 149504a06028SSathya Perla }; 1496f25b119cSPadmanabh Ratnakar 1497590c391dSPadmanabh Ratnakar /******************** GET/SET_MACLIST **************************/ 1498590c391dSPadmanabh Ratnakar #define BE_MAX_MAC 64 1499590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list { 1500590c391dSPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1501e5e1ee89SPadmanabh Ratnakar u8 mac_type; 1502e5e1ee89SPadmanabh Ratnakar u8 perm_override; 1503e5e1ee89SPadmanabh Ratnakar u16 iface_id; 1504e5e1ee89SPadmanabh Ratnakar u32 mac_id; 1505e5e1ee89SPadmanabh Ratnakar u32 rsvd[3]; 1506e5e1ee89SPadmanabh Ratnakar } __packed; 1507e5e1ee89SPadmanabh Ratnakar 1508e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr { 1509e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 1510e5e1ee89SPadmanabh Ratnakar union { 1511e5e1ee89SPadmanabh Ratnakar u8 macaddr[6]; 1512e5e1ee89SPadmanabh Ratnakar struct { 1513e5e1ee89SPadmanabh Ratnakar u8 rsvd[2]; 1514e5e1ee89SPadmanabh Ratnakar u32 mac_id; 1515e5e1ee89SPadmanabh Ratnakar } __packed s_mac_id; 1516e5e1ee89SPadmanabh Ratnakar } __packed mac_addr_id; 1517590c391dSPadmanabh Ratnakar } __packed; 1518590c391dSPadmanabh Ratnakar 1519590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list { 1520590c391dSPadmanabh Ratnakar struct be_cmd_resp_hdr hdr; 1521e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr fd_macaddr; /* Factory default mac */ 1522e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr macid_macaddr; /* soft mac */ 1523e5e1ee89SPadmanabh Ratnakar u8 true_mac_count; 1524e5e1ee89SPadmanabh Ratnakar u8 pseudo_mac_count; 1525e5e1ee89SPadmanabh Ratnakar u8 mac_list_size; 1526e5e1ee89SPadmanabh Ratnakar u8 rsvd; 1527e5e1ee89SPadmanabh Ratnakar /* perm override mac */ 1528e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr macaddr_list[BE_MAX_MAC]; 1529590c391dSPadmanabh Ratnakar } __packed; 1530590c391dSPadmanabh Ratnakar 1531590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list { 1532590c391dSPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1533590c391dSPadmanabh Ratnakar u8 mac_count; 1534590c391dSPadmanabh Ratnakar u8 rsvd1; 1535590c391dSPadmanabh Ratnakar u16 rsvd2; 1536590c391dSPadmanabh Ratnakar struct macaddr mac[BE_MAX_MAC]; 1537590c391dSPadmanabh Ratnakar } __packed; 1538590c391dSPadmanabh Ratnakar 1539f1f3ee1bSAjit Khaparde /*********************** HSW Config ***********************/ 1540a77dcb8cSAjit Khaparde #define PORT_FWD_TYPE_VEPA 0x3 1541a77dcb8cSAjit Khaparde #define PORT_FWD_TYPE_VEB 0x2 1542a77dcb8cSAjit Khaparde 1543f1f3ee1bSAjit Khaparde struct amap_set_hsw_context { 1544f1f3ee1bSAjit Khaparde u8 interface_id[16]; 1545f1f3ee1bSAjit Khaparde u8 rsvd0[14]; 1546f1f3ee1bSAjit Khaparde u8 pvid_valid; 1547a77dcb8cSAjit Khaparde u8 pport; 1548a77dcb8cSAjit Khaparde u8 rsvd1[6]; 1549a77dcb8cSAjit Khaparde u8 port_fwd_type[3]; 1550a77dcb8cSAjit Khaparde u8 rsvd2[7]; 1551f1f3ee1bSAjit Khaparde u8 pvid[16]; 1552f1f3ee1bSAjit Khaparde u8 rsvd3[32]; 1553f1f3ee1bSAjit Khaparde u8 rsvd4[32]; 1554f1f3ee1bSAjit Khaparde u8 rsvd5[32]; 1555f1f3ee1bSAjit Khaparde } __packed; 1556f1f3ee1bSAjit Khaparde 1557f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config { 1558f1f3ee1bSAjit Khaparde struct be_cmd_req_hdr hdr; 1559f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_set_hsw_context) / 8]; 1560f1f3ee1bSAjit Khaparde } __packed; 1561f1f3ee1bSAjit Khaparde 1562f1f3ee1bSAjit Khaparde struct be_cmd_resp_set_hsw_config { 1563f1f3ee1bSAjit Khaparde struct be_cmd_resp_hdr hdr; 1564f1f3ee1bSAjit Khaparde u32 rsvd; 1565f1f3ee1bSAjit Khaparde }; 1566f1f3ee1bSAjit Khaparde 1567f1f3ee1bSAjit Khaparde struct amap_get_hsw_req_context { 1568f1f3ee1bSAjit Khaparde u8 interface_id[16]; 1569f1f3ee1bSAjit Khaparde u8 rsvd0[14]; 1570f1f3ee1bSAjit Khaparde u8 pvid_valid; 1571f1f3ee1bSAjit Khaparde u8 pport; 1572f1f3ee1bSAjit Khaparde } __packed; 1573f1f3ee1bSAjit Khaparde 1574f1f3ee1bSAjit Khaparde struct amap_get_hsw_resp_context { 1575a77dcb8cSAjit Khaparde u8 rsvd0[6]; 1576a77dcb8cSAjit Khaparde u8 port_fwd_type[3]; 1577a77dcb8cSAjit Khaparde u8 rsvd1[7]; 1578f1f3ee1bSAjit Khaparde u8 pvid[16]; 1579f1f3ee1bSAjit Khaparde u8 rsvd2[32]; 1580f1f3ee1bSAjit Khaparde u8 rsvd3[32]; 1581f1f3ee1bSAjit Khaparde u8 rsvd4[32]; 1582f1f3ee1bSAjit Khaparde } __packed; 1583f1f3ee1bSAjit Khaparde 1584f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config { 1585f1f3ee1bSAjit Khaparde struct be_cmd_req_hdr hdr; 1586f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_get_hsw_req_context) / 8]; 1587f1f3ee1bSAjit Khaparde } __packed; 1588f1f3ee1bSAjit Khaparde 1589f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config { 1590f1f3ee1bSAjit Khaparde struct be_cmd_resp_hdr hdr; 1591f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_get_hsw_resp_context) / 8]; 1592f1f3ee1bSAjit Khaparde u32 rsvd; 1593f1f3ee1bSAjit Khaparde }; 1594f1f3ee1bSAjit Khaparde 1595b4e32a71SPadmanabh Ratnakar /******************* get port names ***************/ 1596b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name { 1597b4e32a71SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1598b4e32a71SPadmanabh Ratnakar u32 rsvd0; 1599b4e32a71SPadmanabh Ratnakar }; 1600b4e32a71SPadmanabh Ratnakar 1601b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name { 1602b4e32a71SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1603b4e32a71SPadmanabh Ratnakar u8 port_name[4]; 1604b4e32a71SPadmanabh Ratnakar }; 1605b4e32a71SPadmanabh Ratnakar 16069aebddd1SJeff Kirsher /*************** HW Stats Get v1 **********************************/ 16079aebddd1SJeff Kirsher #define BE_TXP_SW_SZ 48 16089aebddd1SJeff Kirsher struct be_port_rxf_stats_v1 { 16099aebddd1SJeff Kirsher u32 rsvd0[12]; 16109aebddd1SJeff Kirsher u32 rx_crc_errors; 16119aebddd1SJeff Kirsher u32 rx_alignment_symbol_errors; 16129aebddd1SJeff Kirsher u32 rx_pause_frames; 16139aebddd1SJeff Kirsher u32 rx_priority_pause_frames; 16149aebddd1SJeff Kirsher u32 rx_control_frames; 16159aebddd1SJeff Kirsher u32 rx_in_range_errors; 16169aebddd1SJeff Kirsher u32 rx_out_range_errors; 16179aebddd1SJeff Kirsher u32 rx_frame_too_long; 161818fb06a1SSuresh Reddy u32 rx_address_filtered; 16199aebddd1SJeff Kirsher u32 rx_dropped_too_small; 16209aebddd1SJeff Kirsher u32 rx_dropped_too_short; 16219aebddd1SJeff Kirsher u32 rx_dropped_header_too_small; 16229aebddd1SJeff Kirsher u32 rx_dropped_tcp_length; 16239aebddd1SJeff Kirsher u32 rx_dropped_runt; 16249aebddd1SJeff Kirsher u32 rsvd1[10]; 16259aebddd1SJeff Kirsher u32 rx_ip_checksum_errs; 16269aebddd1SJeff Kirsher u32 rx_tcp_checksum_errs; 16279aebddd1SJeff Kirsher u32 rx_udp_checksum_errs; 16289aebddd1SJeff Kirsher u32 rsvd2[7]; 16299aebddd1SJeff Kirsher u32 rx_switched_unicast_packets; 16309aebddd1SJeff Kirsher u32 rx_switched_multicast_packets; 16319aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets; 16329aebddd1SJeff Kirsher u32 rsvd3[3]; 16339aebddd1SJeff Kirsher u32 tx_pauseframes; 16349aebddd1SJeff Kirsher u32 tx_priority_pauseframes; 16359aebddd1SJeff Kirsher u32 tx_controlframes; 16369aebddd1SJeff Kirsher u32 rsvd4[10]; 16379aebddd1SJeff Kirsher u32 rxpp_fifo_overflow_drop; 16389aebddd1SJeff Kirsher u32 rx_input_fifo_overflow_drop; 16399aebddd1SJeff Kirsher u32 pmem_fifo_overflow_drop; 16409aebddd1SJeff Kirsher u32 jabber_events; 16419aebddd1SJeff Kirsher u32 rsvd5[3]; 16429aebddd1SJeff Kirsher }; 16439aebddd1SJeff Kirsher 16449aebddd1SJeff Kirsher 16459aebddd1SJeff Kirsher struct be_rxf_stats_v1 { 16469aebddd1SJeff Kirsher struct be_port_rxf_stats_v1 port[4]; 16479aebddd1SJeff Kirsher u32 rsvd0[2]; 16489aebddd1SJeff Kirsher u32 rx_drops_no_pbuf; 16499aebddd1SJeff Kirsher u32 rx_drops_no_txpb; 16509aebddd1SJeff Kirsher u32 rx_drops_no_erx_descr; 16519aebddd1SJeff Kirsher u32 rx_drops_no_tpre_descr; 16529aebddd1SJeff Kirsher u32 rsvd1[6]; 16539aebddd1SJeff Kirsher u32 rx_drops_too_many_frags; 16549aebddd1SJeff Kirsher u32 rx_drops_invalid_ring; 16559aebddd1SJeff Kirsher u32 forwarded_packets; 16569aebddd1SJeff Kirsher u32 rx_drops_mtu; 16579aebddd1SJeff Kirsher u32 rsvd2[14]; 16589aebddd1SJeff Kirsher }; 16599aebddd1SJeff Kirsher 16609aebddd1SJeff Kirsher struct be_erx_stats_v1 { 16619aebddd1SJeff Kirsher u32 rx_drops_no_fragments[68]; /* dwordS 0 to 67*/ 16629aebddd1SJeff Kirsher u32 rsvd[4]; 16639aebddd1SJeff Kirsher }; 16649aebddd1SJeff Kirsher 166561000861SAjit Khaparde struct be_port_rxf_stats_v2 { 166661000861SAjit Khaparde u32 rsvd0[10]; 166761000861SAjit Khaparde u32 roce_bytes_received_lsd; 166861000861SAjit Khaparde u32 roce_bytes_received_msd; 166961000861SAjit Khaparde u32 rsvd1[5]; 167061000861SAjit Khaparde u32 roce_frames_received; 167161000861SAjit Khaparde u32 rx_crc_errors; 167261000861SAjit Khaparde u32 rx_alignment_symbol_errors; 167361000861SAjit Khaparde u32 rx_pause_frames; 167461000861SAjit Khaparde u32 rx_priority_pause_frames; 167561000861SAjit Khaparde u32 rx_control_frames; 167661000861SAjit Khaparde u32 rx_in_range_errors; 167761000861SAjit Khaparde u32 rx_out_range_errors; 167861000861SAjit Khaparde u32 rx_frame_too_long; 167961000861SAjit Khaparde u32 rx_address_filtered; 168061000861SAjit Khaparde u32 rx_dropped_too_small; 168161000861SAjit Khaparde u32 rx_dropped_too_short; 168261000861SAjit Khaparde u32 rx_dropped_header_too_small; 168361000861SAjit Khaparde u32 rx_dropped_tcp_length; 168461000861SAjit Khaparde u32 rx_dropped_runt; 168561000861SAjit Khaparde u32 rsvd2[10]; 168661000861SAjit Khaparde u32 rx_ip_checksum_errs; 168761000861SAjit Khaparde u32 rx_tcp_checksum_errs; 168861000861SAjit Khaparde u32 rx_udp_checksum_errs; 168961000861SAjit Khaparde u32 rsvd3[7]; 169061000861SAjit Khaparde u32 rx_switched_unicast_packets; 169161000861SAjit Khaparde u32 rx_switched_multicast_packets; 169261000861SAjit Khaparde u32 rx_switched_broadcast_packets; 169361000861SAjit Khaparde u32 rsvd4[3]; 169461000861SAjit Khaparde u32 tx_pauseframes; 169561000861SAjit Khaparde u32 tx_priority_pauseframes; 169661000861SAjit Khaparde u32 tx_controlframes; 169761000861SAjit Khaparde u32 rsvd5[10]; 169861000861SAjit Khaparde u32 rxpp_fifo_overflow_drop; 169961000861SAjit Khaparde u32 rx_input_fifo_overflow_drop; 170061000861SAjit Khaparde u32 pmem_fifo_overflow_drop; 170161000861SAjit Khaparde u32 jabber_events; 170261000861SAjit Khaparde u32 rsvd6[3]; 170361000861SAjit Khaparde u32 rx_drops_payload_size; 170461000861SAjit Khaparde u32 rx_drops_clipped_header; 170561000861SAjit Khaparde u32 rx_drops_crc; 170661000861SAjit Khaparde u32 roce_drops_payload_len; 170761000861SAjit Khaparde u32 roce_drops_crc; 170861000861SAjit Khaparde u32 rsvd7[19]; 170961000861SAjit Khaparde }; 171061000861SAjit Khaparde 171161000861SAjit Khaparde struct be_rxf_stats_v2 { 171261000861SAjit Khaparde struct be_port_rxf_stats_v2 port[4]; 171361000861SAjit Khaparde u32 rsvd0[2]; 171461000861SAjit Khaparde u32 rx_drops_no_pbuf; 171561000861SAjit Khaparde u32 rx_drops_no_txpb; 171661000861SAjit Khaparde u32 rx_drops_no_erx_descr; 171761000861SAjit Khaparde u32 rx_drops_no_tpre_descr; 171861000861SAjit Khaparde u32 rsvd1[6]; 171961000861SAjit Khaparde u32 rx_drops_too_many_frags; 172061000861SAjit Khaparde u32 rx_drops_invalid_ring; 172161000861SAjit Khaparde u32 forwarded_packets; 172261000861SAjit Khaparde u32 rx_drops_mtu; 172361000861SAjit Khaparde u32 rsvd2[35]; 172461000861SAjit Khaparde }; 172561000861SAjit Khaparde 17269aebddd1SJeff Kirsher struct be_hw_stats_v1 { 17279aebddd1SJeff Kirsher struct be_rxf_stats_v1 rxf; 17289aebddd1SJeff Kirsher u32 rsvd0[BE_TXP_SW_SZ]; 17299aebddd1SJeff Kirsher struct be_erx_stats_v1 erx; 17309aebddd1SJeff Kirsher struct be_pmem_stats pmem; 17310b3f0e7aSVasundhara Volam u32 rsvd1[18]; 17329aebddd1SJeff Kirsher }; 17339aebddd1SJeff Kirsher 17349aebddd1SJeff Kirsher struct be_cmd_req_get_stats_v1 { 17359aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr; 17369aebddd1SJeff Kirsher u8 rsvd[sizeof(struct be_hw_stats_v1)]; 17379aebddd1SJeff Kirsher }; 17389aebddd1SJeff Kirsher 17399aebddd1SJeff Kirsher struct be_cmd_resp_get_stats_v1 { 17409aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr; 17419aebddd1SJeff Kirsher struct be_hw_stats_v1 hw_stats; 17429aebddd1SJeff Kirsher }; 17439aebddd1SJeff Kirsher 174461000861SAjit Khaparde struct be_erx_stats_v2 { 174561000861SAjit Khaparde u32 rx_drops_no_fragments[136]; /* dwordS 0 to 135*/ 174661000861SAjit Khaparde u32 rsvd[3]; 174761000861SAjit Khaparde }; 174861000861SAjit Khaparde 174961000861SAjit Khaparde struct be_hw_stats_v2 { 175061000861SAjit Khaparde struct be_rxf_stats_v2 rxf; 175161000861SAjit Khaparde u32 rsvd0[BE_TXP_SW_SZ]; 175261000861SAjit Khaparde struct be_erx_stats_v2 erx; 175361000861SAjit Khaparde struct be_pmem_stats pmem; 175461000861SAjit Khaparde u32 rsvd1[18]; 175561000861SAjit Khaparde }; 175661000861SAjit Khaparde 175761000861SAjit Khaparde struct be_cmd_req_get_stats_v2 { 175861000861SAjit Khaparde struct be_cmd_req_hdr hdr; 175961000861SAjit Khaparde u8 rsvd[sizeof(struct be_hw_stats_v2)]; 176061000861SAjit Khaparde }; 176161000861SAjit Khaparde 176261000861SAjit Khaparde struct be_cmd_resp_get_stats_v2 { 176361000861SAjit Khaparde struct be_cmd_resp_hdr hdr; 176461000861SAjit Khaparde struct be_hw_stats_v2 hw_stats; 176561000861SAjit Khaparde }; 176661000861SAjit Khaparde 1767941a77d5SSomnath Kotur /************** get fat capabilites *******************/ 1768941a77d5SSomnath Kotur #define MAX_MODULES 27 1769941a77d5SSomnath Kotur #define MAX_MODES 4 1770941a77d5SSomnath Kotur #define MODE_UART 0 1771941a77d5SSomnath Kotur #define FW_LOG_LEVEL_DEFAULT 48 1772941a77d5SSomnath Kotur #define FW_LOG_LEVEL_FATAL 64 1773941a77d5SSomnath Kotur 1774941a77d5SSomnath Kotur struct ext_fat_mode { 1775941a77d5SSomnath Kotur u8 mode; 1776941a77d5SSomnath Kotur u8 rsvd0; 1777941a77d5SSomnath Kotur u16 port_mask; 1778941a77d5SSomnath Kotur u32 dbg_lvl; 1779941a77d5SSomnath Kotur u64 fun_mask; 1780941a77d5SSomnath Kotur } __packed; 1781941a77d5SSomnath Kotur 1782941a77d5SSomnath Kotur struct ext_fat_modules { 1783941a77d5SSomnath Kotur u8 modules_str[32]; 1784941a77d5SSomnath Kotur u32 modules_id; 1785941a77d5SSomnath Kotur u32 num_modes; 1786941a77d5SSomnath Kotur struct ext_fat_mode trace_lvl[MAX_MODES]; 1787941a77d5SSomnath Kotur } __packed; 1788941a77d5SSomnath Kotur 1789941a77d5SSomnath Kotur struct be_fat_conf_params { 1790941a77d5SSomnath Kotur u32 max_log_entries; 1791941a77d5SSomnath Kotur u32 log_entry_size; 1792941a77d5SSomnath Kotur u8 log_type; 1793941a77d5SSomnath Kotur u8 max_log_funs; 1794941a77d5SSomnath Kotur u8 max_log_ports; 1795941a77d5SSomnath Kotur u8 rsvd0; 1796941a77d5SSomnath Kotur u32 supp_modes; 1797941a77d5SSomnath Kotur u32 num_modules; 1798941a77d5SSomnath Kotur struct ext_fat_modules module[MAX_MODULES]; 1799941a77d5SSomnath Kotur } __packed; 1800941a77d5SSomnath Kotur 1801941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps { 1802941a77d5SSomnath Kotur struct be_cmd_req_hdr hdr; 1803941a77d5SSomnath Kotur u32 parameter_type; 1804941a77d5SSomnath Kotur }; 1805941a77d5SSomnath Kotur 1806941a77d5SSomnath Kotur struct be_cmd_resp_get_ext_fat_caps { 1807941a77d5SSomnath Kotur struct be_cmd_resp_hdr hdr; 1808941a77d5SSomnath Kotur struct be_fat_conf_params get_params; 1809941a77d5SSomnath Kotur }; 1810941a77d5SSomnath Kotur 1811941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps { 1812941a77d5SSomnath Kotur struct be_cmd_req_hdr hdr; 1813941a77d5SSomnath Kotur struct be_fat_conf_params set_params; 1814941a77d5SSomnath Kotur }; 1815941a77d5SSomnath Kotur 1816150d58c7SVasundhara Volam #define RESOURCE_DESC_SIZE_V0 72 1817150d58c7SVasundhara Volam #define RESOURCE_DESC_SIZE_V1 88 1818150d58c7SVasundhara Volam #define PCIE_RESOURCE_DESC_TYPE_V0 0x40 1819a05f99dbSVasundhara Volam #define NIC_RESOURCE_DESC_TYPE_V0 0x41 1820150d58c7SVasundhara Volam #define PCIE_RESOURCE_DESC_TYPE_V1 0x50 1821a05f99dbSVasundhara Volam #define NIC_RESOURCE_DESC_TYPE_V1 0x51 1822150d58c7SVasundhara Volam #define MAX_RESOURCE_DESC 264 1823d5c18473SPadmanabh Ratnakar 1824d5c18473SPadmanabh Ratnakar /* QOS unit number */ 1825d5c18473SPadmanabh Ratnakar #define QUN 4 1826d5c18473SPadmanabh Ratnakar /* Immediate */ 1827d5c18473SPadmanabh Ratnakar #define IMM 6 1828d5c18473SPadmanabh Ratnakar /* No save */ 1829d5c18473SPadmanabh Ratnakar #define NOSV 7 1830d5c18473SPadmanabh Ratnakar 1831150d58c7SVasundhara Volam struct be_res_desc_hdr { 1832abb93951SPadmanabh Ratnakar u8 desc_type; 1833abb93951SPadmanabh Ratnakar u8 desc_len; 1834150d58c7SVasundhara Volam } __packed; 1835150d58c7SVasundhara Volam 1836150d58c7SVasundhara Volam struct be_pcie_res_desc { 1837150d58c7SVasundhara Volam struct be_res_desc_hdr hdr; 1838150d58c7SVasundhara Volam u8 rsvd0; 1839150d58c7SVasundhara Volam u8 flags; 1840150d58c7SVasundhara Volam u16 rsvd1; 1841150d58c7SVasundhara Volam u8 pf_num; 1842150d58c7SVasundhara Volam u8 rsvd2; 1843150d58c7SVasundhara Volam u32 rsvd3; 1844150d58c7SVasundhara Volam u8 sriov_state; 1845150d58c7SVasundhara Volam u8 pf_state; 1846150d58c7SVasundhara Volam u8 pf_type; 1847150d58c7SVasundhara Volam u8 rsvd4; 1848150d58c7SVasundhara Volam u16 num_vfs; 1849150d58c7SVasundhara Volam u16 rsvd5; 1850150d58c7SVasundhara Volam u32 rsvd6[17]; 1851150d58c7SVasundhara Volam } __packed; 1852150d58c7SVasundhara Volam 1853150d58c7SVasundhara Volam struct be_nic_res_desc { 1854150d58c7SVasundhara Volam struct be_res_desc_hdr hdr; 1855abb93951SPadmanabh Ratnakar u8 rsvd1; 1856abb93951SPadmanabh Ratnakar u8 flags; 1857abb93951SPadmanabh Ratnakar u8 vf_num; 1858abb93951SPadmanabh Ratnakar u8 rsvd2; 1859abb93951SPadmanabh Ratnakar u8 pf_num; 1860abb93951SPadmanabh Ratnakar u8 rsvd3; 1861abb93951SPadmanabh Ratnakar u16 unicast_mac_count; 1862abb93951SPadmanabh Ratnakar u8 rsvd4[6]; 1863abb93951SPadmanabh Ratnakar u16 mcc_count; 1864abb93951SPadmanabh Ratnakar u16 vlan_count; 1865abb93951SPadmanabh Ratnakar u16 mcast_mac_count; 1866abb93951SPadmanabh Ratnakar u16 txq_count; 1867abb93951SPadmanabh Ratnakar u16 rq_count; 1868abb93951SPadmanabh Ratnakar u16 rssq_count; 1869abb93951SPadmanabh Ratnakar u16 lro_count; 1870abb93951SPadmanabh Ratnakar u16 cq_count; 1871abb93951SPadmanabh Ratnakar u16 toe_conn_count; 1872abb93951SPadmanabh Ratnakar u16 eq_count; 1873abb93951SPadmanabh Ratnakar u32 rsvd5; 1874abb93951SPadmanabh Ratnakar u32 cap_flags; 1875abb93951SPadmanabh Ratnakar u8 link_param; 1876abb93951SPadmanabh Ratnakar u8 rsvd6[3]; 1877abb93951SPadmanabh Ratnakar u32 bw_min; 1878abb93951SPadmanabh Ratnakar u32 bw_max; 1879abb93951SPadmanabh Ratnakar u8 acpi_params; 1880abb93951SPadmanabh Ratnakar u8 wol_param; 1881abb93951SPadmanabh Ratnakar u16 rsvd7; 1882d44517fdSAjit Khaparde u32 rsvd8[7]; 1883150d58c7SVasundhara Volam } __packed; 1884abb93951SPadmanabh Ratnakar 1885abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config { 1886abb93951SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1887abb93951SPadmanabh Ratnakar }; 1888abb93951SPadmanabh Ratnakar 1889abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config { 189028710c55SKalesh AP struct be_cmd_resp_hdr hdr; 1891abb93951SPadmanabh Ratnakar u32 desc_count; 1892150d58c7SVasundhara Volam u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1]; 1893abb93951SPadmanabh Ratnakar }; 1894abb93951SPadmanabh Ratnakar 1895abb93951SPadmanabh Ratnakar #define ACTIVE_PROFILE_TYPE 0x2 1896abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config { 1897abb93951SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1898abb93951SPadmanabh Ratnakar u8 rsvd; 1899abb93951SPadmanabh Ratnakar u8 type; 1900abb93951SPadmanabh Ratnakar u16 rsvd1; 1901abb93951SPadmanabh Ratnakar }; 1902abb93951SPadmanabh Ratnakar 1903abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_profile_config { 1904150d58c7SVasundhara Volam struct be_cmd_resp_hdr hdr; 1905abb93951SPadmanabh Ratnakar u32 desc_count; 1906150d58c7SVasundhara Volam u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1]; 1907a05f99dbSVasundhara Volam }; 1908a05f99dbSVasundhara Volam 1909d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config { 1910d5c18473SPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1911d5c18473SPadmanabh Ratnakar u32 rsvd; 1912d5c18473SPadmanabh Ratnakar u32 desc_count; 1913150d58c7SVasundhara Volam struct be_nic_res_desc nic_desc; 1914d5c18473SPadmanabh Ratnakar }; 1915d5c18473SPadmanabh Ratnakar 1916d5c18473SPadmanabh Ratnakar struct be_cmd_resp_set_profile_config { 1917150d58c7SVasundhara Volam struct be_cmd_resp_hdr hdr; 1918d5c18473SPadmanabh Ratnakar }; 1919d5c18473SPadmanabh Ratnakar 1920dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf { 1921dcf7ebbaSPadmanabh Ratnakar struct be_cmd_req_hdr hdr; 1922dcf7ebbaSPadmanabh Ratnakar u8 enable; 1923dcf7ebbaSPadmanabh Ratnakar u8 rsvd[3]; 1924dcf7ebbaSPadmanabh Ratnakar }; 1925dcf7ebbaSPadmanabh Ratnakar 192668c45a2dSSomnath Kotur struct be_cmd_req_intr_set { 192768c45a2dSSomnath Kotur struct be_cmd_req_hdr hdr; 192868c45a2dSSomnath Kotur u8 intr_enabled; 192968c45a2dSSomnath Kotur u8 rsvd[3]; 193068c45a2dSSomnath Kotur }; 193168c45a2dSSomnath Kotur 1932f25b119cSPadmanabh Ratnakar static inline bool check_privilege(struct be_adapter *adapter, u32 flags) 1933f25b119cSPadmanabh Ratnakar { 1934f25b119cSPadmanabh Ratnakar return flags & adapter->cmd_privileges ? true : false; 1935f25b119cSPadmanabh Ratnakar } 1936f25b119cSPadmanabh Ratnakar 19374c876616SSathya Perla /************** Get IFACE LIST *******************/ 19384c876616SSathya Perla struct be_if_desc { 19394c876616SSathya Perla u32 if_id; 19404c876616SSathya Perla u32 cap_flags; 19414c876616SSathya Perla u32 en_flags; 19424c876616SSathya Perla }; 19434c876616SSathya Perla 19444c876616SSathya Perla struct be_cmd_req_get_iface_list { 19454c876616SSathya Perla struct be_cmd_req_hdr hdr; 19464c876616SSathya Perla }; 19474c876616SSathya Perla 19484c876616SSathya Perla struct be_cmd_resp_get_iface_list { 19494c876616SSathya Perla struct be_cmd_req_hdr hdr; 19504c876616SSathya Perla u32 if_cnt; 19514c876616SSathya Perla struct be_if_desc if_desc; 19524c876616SSathya Perla }; 19534c876616SSathya Perla 195431886e87SJoe Perches int be_pci_fnum_get(struct be_adapter *adapter); 195531886e87SJoe Perches int be_fw_wait_ready(struct be_adapter *adapter); 195631886e87SJoe Perches int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 19575ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id); 195831886e87SJoe Perches int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id, 195931886e87SJoe Perches u32 *pmac_id, u32 domain); 196031886e87SJoe Perches int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, 19619aebddd1SJeff Kirsher u32 domain); 196231886e87SJoe Perches int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 196331886e87SJoe Perches u32 *if_handle, u32 domain); 196431886e87SJoe Perches int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain); 196531886e87SJoe Perches int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo); 196631886e87SJoe Perches int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 196731886e87SJoe Perches struct be_queue_info *eq, bool no_delay, 196831886e87SJoe Perches int num_cqe_dma_coalesce); 196931886e87SJoe Perches int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq, 19709aebddd1SJeff Kirsher struct be_queue_info *cq); 197131886e87SJoe Perches int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo); 197231886e87SJoe Perches int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq, 197331886e87SJoe Perches u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id); 197431886e87SJoe Perches int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 19759aebddd1SJeff Kirsher int type); 197631886e87SJoe Perches int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q); 197731886e87SJoe Perches int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1978323ff71eSSathya Perla u8 *link_status, u32 dom); 197931886e87SJoe Perches int be_cmd_reset(struct be_adapter *adapter); 198031886e87SJoe Perches int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd); 198131886e87SJoe Perches int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 19829aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd); 198331886e87SJoe Perches int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 198404b71175SSathya Perla char *fw_on_flash); 19852632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num); 198631886e87SJoe Perches int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1987012bd387SAjit Khaparde u32 num, bool promiscuous); 198831886e87SJoe Perches int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status); 198931886e87SJoe Perches int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc); 199031886e87SJoe Perches int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc); 199131886e87SJoe Perches int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19920ad3157eSVasundhara Volam u32 *function_mode, u32 *function_caps, u16 *asic_rev); 199331886e87SJoe Perches int be_cmd_reset_function(struct be_adapter *adapter); 199431886e87SJoe Perches int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 1995594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size); 199631886e87SJoe Perches int be_process_mcc(struct be_adapter *adapter); 199731886e87SJoe Perches int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon, 199831886e87SJoe Perches u8 status, u8 state); 199931886e87SJoe Perches int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, 200031886e87SJoe Perches u32 *state); 200131886e87SJoe Perches int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 200231886e87SJoe Perches u32 flash_oper, u32 flash_opcode, u32 buf_size); 200331886e87SJoe Perches int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 20049aebddd1SJeff Kirsher u32 data_size, u32 data_offset, 200531886e87SJoe Perches const char *obj_name, u32 *data_written, 200631886e87SJoe Perches u8 *change_status, u8 *addn_status); 2007de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2008de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2009de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status); 20109aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 20119aebddd1SJeff Kirsher int offset); 201231886e87SJoe Perches int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 20139aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd); 201431886e87SJoe Perches int be_cmd_fw_init(struct be_adapter *adapter); 201531886e87SJoe Perches int be_cmd_fw_clean(struct be_adapter *adapter); 201631886e87SJoe Perches void be_async_mcc_enable(struct be_adapter *adapter); 201731886e87SJoe Perches void be_async_mcc_disable(struct be_adapter *adapter); 201831886e87SJoe Perches int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 201931886e87SJoe Perches u32 loopback_type, u32 pkt_size, u32 num_pkts, 202031886e87SJoe Perches u64 pattern); 202131886e87SJoe Perches int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt, 2022941a77d5SSomnath Kotur struct be_dma_mem *cmd); 202331886e87SJoe Perches int be_cmd_get_seeprom_data(struct be_adapter *adapter, 202431886e87SJoe Perches struct be_dma_mem *nonemb_cmd); 202531886e87SJoe Perches int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 202631886e87SJoe Perches u8 loopback_type, u8 enable); 202731886e87SJoe Perches int be_cmd_get_phy_info(struct be_adapter *adapter); 202831886e87SJoe Perches int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain); 202931886e87SJoe Perches void be_detect_error(struct be_adapter *adapter); 203031886e87SJoe Perches int be_cmd_get_die_temperature(struct be_adapter *adapter); 203131886e87SJoe Perches int be_cmd_get_cntl_attributes(struct be_adapter *adapter); 203231886e87SJoe Perches int be_cmd_req_native_mode(struct be_adapter *adapter); 203331886e87SJoe Perches int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size); 203431886e87SJoe Perches void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf); 203531886e87SJoe Perches int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 203631886e87SJoe Perches u32 domain); 203731886e87SJoe Perches int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 203831886e87SJoe Perches u32 vf_num); 203931886e87SJoe Perches int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 204031886e87SJoe Perches bool *pmac_id_active, u32 *pmac_id, u8 domain); 204131886e87SJoe Perches int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac); 204231886e87SJoe Perches int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac); 204331886e87SJoe Perches int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count, 204431886e87SJoe Perches u32 domain); 204531886e87SJoe Perches int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom); 204631886e87SJoe Perches int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain, 204731886e87SJoe Perches u16 intf_id, u16 hsw_mode); 204831886e87SJoe Perches int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain, 204931886e87SJoe Perches u16 intf_id, u8 *mode); 205031886e87SJoe Perches int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter); 205131886e87SJoe Perches int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 205231886e87SJoe Perches struct be_dma_mem *cmd); 205331886e87SJoe Perches int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 2054941a77d5SSomnath Kotur struct be_dma_mem *cmd, 2055941a77d5SSomnath Kotur struct be_fat_conf_params *cfgs); 205631886e87SJoe Perches int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask); 205731886e87SJoe Perches int lancer_initiate_dump(struct be_adapter *adapter); 205831886e87SJoe Perches bool dump_present(struct be_adapter *adapter); 205931886e87SJoe Perches int lancer_test_and_set_rdy_state(struct be_adapter *adapter); 206031886e87SJoe Perches int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name); 206192bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, 206292bf14abSSathya Perla struct be_resources *res); 206392bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 206492bf14abSSathya Perla struct be_resources *res, u8 domain); 206531886e87SJoe Perches int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, u8 domain); 206631886e87SJoe Perches int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 206731886e87SJoe Perches int vf_num); 206831886e87SJoe Perches int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain); 206931886e87SJoe Perches int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable); 2070