16e9ef509SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
29aebddd1SJeff Kirsher /*
37dfbe7d7SSomnath Kotur * Copyright (C) 2005 - 2016 Broadcom
49aebddd1SJeff Kirsher * All rights reserved.
59aebddd1SJeff Kirsher *
69aebddd1SJeff Kirsher * Contact Information:
79aebddd1SJeff Kirsher * linux-drivers@emulex.com
89aebddd1SJeff Kirsher *
99aebddd1SJeff Kirsher * Emulex
109aebddd1SJeff Kirsher * 3333 Susan Street
119aebddd1SJeff Kirsher * Costa Mesa, CA 92626
129aebddd1SJeff Kirsher */
139aebddd1SJeff Kirsher
149aebddd1SJeff Kirsher /*
159aebddd1SJeff Kirsher * The driver sends configuration and managements command requests to the
169aebddd1SJeff Kirsher * firmware in the BE. These requests are communicated to the processor
179aebddd1SJeff Kirsher * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
189aebddd1SJeff Kirsher * WRB inside a MAILBOX.
199aebddd1SJeff Kirsher * The commands are serviced by the ARM processor in the BladeEngine's MPU.
209aebddd1SJeff Kirsher */
219aebddd1SJeff Kirsher
229aebddd1SJeff Kirsher struct be_sge {
239aebddd1SJeff Kirsher u32 pa_lo;
249aebddd1SJeff Kirsher u32 pa_hi;
259aebddd1SJeff Kirsher u32 len;
269aebddd1SJeff Kirsher };
279aebddd1SJeff Kirsher
289aebddd1SJeff Kirsher #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
299aebddd1SJeff Kirsher #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
309aebddd1SJeff Kirsher #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
319aebddd1SJeff Kirsher struct be_mcc_wrb {
329aebddd1SJeff Kirsher u32 embedded; /* dword 0 */
339aebddd1SJeff Kirsher u32 payload_length; /* dword 1 */
349aebddd1SJeff Kirsher u32 tag0; /* dword 2 */
359aebddd1SJeff Kirsher u32 tag1; /* dword 3 */
369aebddd1SJeff Kirsher u32 rsvd; /* dword 4 */
379aebddd1SJeff Kirsher union {
389aebddd1SJeff Kirsher u8 embedded_payload[236]; /* used by embedded cmds */
399aebddd1SJeff Kirsher struct be_sge sgl[19]; /* used by non-embedded cmds */
409aebddd1SJeff Kirsher } payload;
419aebddd1SJeff Kirsher };
429aebddd1SJeff Kirsher
4383b06116SVasundhara Volam #define CQE_FLAGS_VALID_MASK BIT(31)
4483b06116SVasundhara Volam #define CQE_FLAGS_ASYNC_MASK BIT(30)
4583b06116SVasundhara Volam #define CQE_FLAGS_COMPLETED_MASK BIT(28)
4683b06116SVasundhara Volam #define CQE_FLAGS_CONSUMED_MASK BIT(27)
479aebddd1SJeff Kirsher
489aebddd1SJeff Kirsher /* Completion Status */
494c60005fSKalesh AP enum mcc_base_status {
509aebddd1SJeff Kirsher MCC_STATUS_SUCCESS = 0,
519aebddd1SJeff Kirsher MCC_STATUS_FAILED = 1,
529aebddd1SJeff Kirsher MCC_STATUS_ILLEGAL_REQUEST = 2,
539aebddd1SJeff Kirsher MCC_STATUS_ILLEGAL_FIELD = 3,
549aebddd1SJeff Kirsher MCC_STATUS_INSUFFICIENT_BUFFER = 4,
559aebddd1SJeff Kirsher MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
56b29812c1SSuresh Reddy MCC_STATUS_NOT_SUPPORTED = 66,
57710f3e59SSriharsha Basavapatna MCC_STATUS_FEATURE_NOT_SUPPORTED = 68,
58710f3e59SSriharsha Basavapatna MCC_STATUS_INVALID_LENGTH = 116
599aebddd1SJeff Kirsher };
609aebddd1SJeff Kirsher
614c60005fSKalesh AP /* Additional status */
624c60005fSKalesh AP enum mcc_addl_status {
634c60005fSKalesh AP MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
644c60005fSKalesh AP MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
6577be8c1cSKalesh AP MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a,
666b525782SSuresh Reddy MCC_ADDL_STATUS_INSUFFICIENT_VLANS = 0xab,
676b525782SSuresh Reddy MCC_ADDL_STATUS_INVALID_SIGNATURE = 0x56,
68fa5c867dSSuresh Reddy MCC_ADDL_STATUS_MISSING_SIGNATURE = 0x57,
69fa5c867dSSuresh Reddy MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES = 0x60
704c60005fSKalesh AP };
71d9d604f8SAjit Khaparde
724c60005fSKalesh AP #define CQE_BASE_STATUS_MASK 0xFFFF
734c60005fSKalesh AP #define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */
744c60005fSKalesh AP #define CQE_ADDL_STATUS_MASK 0xFF
754c60005fSKalesh AP #define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */
764c60005fSKalesh AP
774c60005fSKalesh AP #define base_status(status) \
784c60005fSKalesh AP ((enum mcc_base_status) \
794c60005fSKalesh AP (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
804c60005fSKalesh AP #define addl_status(status) \
814c60005fSKalesh AP ((enum mcc_addl_status) \
824c60005fSKalesh AP (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
834c60005fSKalesh AP CQE_ADDL_STATUS_MASK : 0))
849aebddd1SJeff Kirsher
859aebddd1SJeff Kirsher struct be_mcc_compl {
869aebddd1SJeff Kirsher u32 status; /* dword 0 */
879aebddd1SJeff Kirsher u32 tag0; /* dword 1 */
889aebddd1SJeff Kirsher u32 tag1; /* dword 2 */
899aebddd1SJeff Kirsher u32 flags; /* dword 3 */
909aebddd1SJeff Kirsher };
919aebddd1SJeff Kirsher
923acf19d9SSathya Perla /* When the async bit of mcc_compl flags is set, flags
933acf19d9SSathya Perla * is interpreted as follows:
949aebddd1SJeff Kirsher */
953acf19d9SSathya Perla #define ASYNC_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
963acf19d9SSathya Perla #define ASYNC_EVENT_CODE_MASK 0xFF
973acf19d9SSathya Perla #define ASYNC_EVENT_TYPE_SHIFT 16
983acf19d9SSathya Perla #define ASYNC_EVENT_TYPE_MASK 0xFF
999aebddd1SJeff Kirsher #define ASYNC_EVENT_CODE_LINK_STATE 0x1
1009aebddd1SJeff Kirsher #define ASYNC_EVENT_CODE_GRP_5 0x5
1019aebddd1SJeff Kirsher #define ASYNC_EVENT_QOS_SPEED 0x1
1029aebddd1SJeff Kirsher #define ASYNC_EVENT_COS_PRIORITY 0x2
1039aebddd1SJeff Kirsher #define ASYNC_EVENT_PVID_STATE 0x3
104bc0c3405SAjit Khaparde #define ASYNC_EVENT_CODE_QNQ 0x6
105bc0c3405SAjit Khaparde #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1
10621252377SVasundhara Volam #define ASYNC_EVENT_CODE_SLIPORT 0x11
10721252377SVasundhara Volam #define ASYNC_EVENT_PORT_MISCONFIG 0x9
108760c295eSVenkata Duvvuru #define ASYNC_EVENT_FW_CONTROL 0x5
109bc0c3405SAjit Khaparde
1109aebddd1SJeff Kirsher enum {
1119aebddd1SJeff Kirsher LINK_DOWN = 0x0,
1129aebddd1SJeff Kirsher LINK_UP = 0x1
1139aebddd1SJeff Kirsher };
1149aebddd1SJeff Kirsher #define LINK_STATUS_MASK 0x1
1152e177a5cSPadmanabh Ratnakar #define LOGICAL_LINK_STATUS_MASK 0x2
1169aebddd1SJeff Kirsher
1173acf19d9SSathya Perla /* When the event code of compl->flags is link-state, the mcc_compl
1189aebddd1SJeff Kirsher * must be interpreted as follows
1199aebddd1SJeff Kirsher */
1209aebddd1SJeff Kirsher struct be_async_event_link_state {
1219aebddd1SJeff Kirsher u8 physical_port;
1229aebddd1SJeff Kirsher u8 port_link_status;
1239aebddd1SJeff Kirsher u8 port_duplex;
1249aebddd1SJeff Kirsher u8 port_speed;
1259aebddd1SJeff Kirsher u8 port_fault;
1269aebddd1SJeff Kirsher u8 rsvd0[7];
1273acf19d9SSathya Perla u32 flags;
1289aebddd1SJeff Kirsher } __packed;
1299aebddd1SJeff Kirsher
1303acf19d9SSathya Perla /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
1319aebddd1SJeff Kirsher * the mcc_compl must be interpreted as follows
1329aebddd1SJeff Kirsher */
1339aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed {
1349aebddd1SJeff Kirsher u8 physical_port;
1359aebddd1SJeff Kirsher u8 rsvd[5];
1369aebddd1SJeff Kirsher u16 qos_link_speed;
1379aebddd1SJeff Kirsher u32 event_tag;
1383acf19d9SSathya Perla u32 flags;
1399aebddd1SJeff Kirsher } __packed;
1409aebddd1SJeff Kirsher
1413acf19d9SSathya Perla /* When the event code of compl->flags is GRP5 and event type is
1429aebddd1SJeff Kirsher * CoS-Priority, the mcc_compl must be interpreted as follows
1439aebddd1SJeff Kirsher */
1449aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority {
1459aebddd1SJeff Kirsher u8 physical_port;
1469aebddd1SJeff Kirsher u8 available_priority_bmap;
1479aebddd1SJeff Kirsher u8 reco_default_priority;
1489aebddd1SJeff Kirsher u8 valid;
1499aebddd1SJeff Kirsher u8 rsvd0;
1509aebddd1SJeff Kirsher u8 event_tag;
1513acf19d9SSathya Perla u32 flags;
1529aebddd1SJeff Kirsher } __packed;
1539aebddd1SJeff Kirsher
1543acf19d9SSathya Perla /* When the event code of compl->flags is GRP5 and event type is
1559aebddd1SJeff Kirsher * PVID state, the mcc_compl must be interpreted as follows
1569aebddd1SJeff Kirsher */
1579aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state {
1589aebddd1SJeff Kirsher u8 enabled;
1599aebddd1SJeff Kirsher u8 rsvd0;
1609aebddd1SJeff Kirsher u16 tag;
1619aebddd1SJeff Kirsher u32 event_tag;
1629aebddd1SJeff Kirsher u32 rsvd1;
1633acf19d9SSathya Perla u32 flags;
1649aebddd1SJeff Kirsher } __packed;
1659aebddd1SJeff Kirsher
166bc0c3405SAjit Khaparde /* async event indicating outer VLAN tag in QnQ */
167bc0c3405SAjit Khaparde struct be_async_event_qnq {
168bc0c3405SAjit Khaparde u8 valid; /* Indicates if outer VLAN is valid */
169bc0c3405SAjit Khaparde u8 rsvd0;
170bc0c3405SAjit Khaparde u16 vlan_tag;
171bc0c3405SAjit Khaparde u32 event_tag;
172bc0c3405SAjit Khaparde u8 rsvd1[4];
1733acf19d9SSathya Perla u32 flags;
174bc0c3405SAjit Khaparde } __packed;
175bc0c3405SAjit Khaparde
17651d1f98aSAjit Khaparde enum {
17751d1f98aSAjit Khaparde BE_PHY_FUNCTIONAL = 0,
17851d1f98aSAjit Khaparde BE_PHY_NOT_PRESENT = 1,
17951d1f98aSAjit Khaparde BE_PHY_DIFF_MEDIA = 2,
18051d1f98aSAjit Khaparde BE_PHY_INCOMPATIBLE = 3,
18151d1f98aSAjit Khaparde BE_PHY_UNQUALIFIED = 4,
18251d1f98aSAjit Khaparde BE_PHY_UNCERTIFIED = 5
18351d1f98aSAjit Khaparde };
18451d1f98aSAjit Khaparde
18551d1f98aSAjit Khaparde #define PHY_STATE_MSG_SEVERITY 0x6
18651d1f98aSAjit Khaparde #define PHY_STATE_OPER 0x1
18751d1f98aSAjit Khaparde #define PHY_STATE_INFO_VALID 0x80
18851d1f98aSAjit Khaparde #define PHY_STATE_OPER_MSG_NONE 0x2
18951d1f98aSAjit Khaparde #define DEFAULT_MSG_SEVERITY 0x1
19051d1f98aSAjit Khaparde
19151d1f98aSAjit Khaparde #define be_phy_state_unknown(phy_state) (phy_state > BE_PHY_UNCERTIFIED)
19251d1f98aSAjit Khaparde #define be_phy_unqualified(phy_state) \
19351d1f98aSAjit Khaparde (phy_state == BE_PHY_UNQUALIFIED || \
19451d1f98aSAjit Khaparde phy_state == BE_PHY_UNCERTIFIED)
19551d1f98aSAjit Khaparde #define be_phy_misconfigured(phy_state) \
19651d1f98aSAjit Khaparde (phy_state == BE_PHY_INCOMPATIBLE || \
19751d1f98aSAjit Khaparde phy_state == BE_PHY_UNQUALIFIED || \
19851d1f98aSAjit Khaparde phy_state == BE_PHY_UNCERTIFIED)
19951d1f98aSAjit Khaparde
200262c9740SHernán Gonzalez extern const char * const be_misconfig_evt_port_state[];
20151d1f98aSAjit Khaparde
20221252377SVasundhara Volam /* async event indicating misconfigured port */
20321252377SVasundhara Volam struct be_async_event_misconfig_port {
20451d1f98aSAjit Khaparde /* DATA_WORD1:
20551d1f98aSAjit Khaparde * phy state of port 0: bits 7 - 0
20651d1f98aSAjit Khaparde * phy state of port 1: bits 15 - 8
20751d1f98aSAjit Khaparde * phy state of port 2: bits 23 - 16
20851d1f98aSAjit Khaparde * phy state of port 3: bits 31 - 24
20951d1f98aSAjit Khaparde */
21021252377SVasundhara Volam u32 event_data_word1;
21151d1f98aSAjit Khaparde /* DATA_WORD2:
21251d1f98aSAjit Khaparde * phy state info of port 0: bits 7 - 0
21351d1f98aSAjit Khaparde * phy state info of port 1: bits 15 - 8
21451d1f98aSAjit Khaparde * phy state info of port 2: bits 23 - 16
21551d1f98aSAjit Khaparde * phy state info of port 3: bits 31 - 24
21651d1f98aSAjit Khaparde *
21751d1f98aSAjit Khaparde * PHY STATE INFO:
21851d1f98aSAjit Khaparde * Link operability :bit 0
21951d1f98aSAjit Khaparde * Message severity :bit 2 - 1
22051d1f98aSAjit Khaparde * Rsvd :bits 6 - 3
22151d1f98aSAjit Khaparde * phy state info valid :bit 7
22251d1f98aSAjit Khaparde */
22321252377SVasundhara Volam u32 event_data_word2;
22421252377SVasundhara Volam u32 rsvd0;
22521252377SVasundhara Volam u32 flags;
22621252377SVasundhara Volam } __packed;
22721252377SVasundhara Volam
228760c295eSVenkata Duvvuru #define BMC_FILT_BROADCAST_ARP BIT(0)
229760c295eSVenkata Duvvuru #define BMC_FILT_BROADCAST_DHCP_CLIENT BIT(1)
230760c295eSVenkata Duvvuru #define BMC_FILT_BROADCAST_DHCP_SERVER BIT(2)
231760c295eSVenkata Duvvuru #define BMC_FILT_BROADCAST_NET_BIOS BIT(3)
232760c295eSVenkata Duvvuru #define BMC_FILT_BROADCAST BIT(7)
233760c295eSVenkata Duvvuru #define BMC_FILT_MULTICAST_IPV6_NEIGH_ADVER BIT(8)
234760c295eSVenkata Duvvuru #define BMC_FILT_MULTICAST_IPV6_RA BIT(9)
235760c295eSVenkata Duvvuru #define BMC_FILT_MULTICAST_IPV6_RAS BIT(10)
236760c295eSVenkata Duvvuru #define BMC_FILT_MULTICAST BIT(15)
237760c295eSVenkata Duvvuru struct be_async_fw_control {
238760c295eSVenkata Duvvuru u32 event_data_word1;
239760c295eSVenkata Duvvuru u32 event_data_word2;
240760c295eSVenkata Duvvuru u32 evt_tag;
241760c295eSVenkata Duvvuru u32 event_data_word4;
242760c295eSVenkata Duvvuru } __packed;
243760c295eSVenkata Duvvuru
2449aebddd1SJeff Kirsher struct be_mcc_mailbox {
2459aebddd1SJeff Kirsher struct be_mcc_wrb wrb;
2469aebddd1SJeff Kirsher struct be_mcc_compl compl;
2479aebddd1SJeff Kirsher };
2489aebddd1SJeff Kirsher
2499aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_COMMON 0x1
2509aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_ETH 0x3
2519aebddd1SJeff Kirsher #define CMD_SUBSYSTEM_LOWLEVEL 0xb
2529aebddd1SJeff Kirsher
2539aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MAC_QUERY 1
2549aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MAC_SET 2
2559aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_MULTICAST_SET 3
2569aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
2579aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
2589aebddd1SJeff Kirsher #define OPCODE_COMMON_READ_FLASHROM 6
2599aebddd1SJeff Kirsher #define OPCODE_COMMON_WRITE_FLASHROM 7
2609aebddd1SJeff Kirsher #define OPCODE_COMMON_CQ_CREATE 12
2619aebddd1SJeff Kirsher #define OPCODE_COMMON_EQ_CREATE 13
2629aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_CREATE 21
2639aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_QOS 28
2649aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_CREATE_EXT 90
2659aebddd1SJeff Kirsher #define OPCODE_COMMON_SEEPROM_READ 30
2669aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
2679aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_RX_FILTER 34
2689aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_FW_VERSION 35
2699aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_FLOW_CONTROL 36
2709aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_FLOW_CONTROL 37
2719aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_FRAME_SIZE 39
2729aebddd1SJeff Kirsher #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
2739aebddd1SJeff Kirsher #define OPCODE_COMMON_FIRMWARE_CONFIG 42
2749aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
2759aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
2769aebddd1SJeff Kirsher #define OPCODE_COMMON_MCC_DESTROY 53
2779aebddd1SJeff Kirsher #define OPCODE_COMMON_CQ_DESTROY 54
2789aebddd1SJeff Kirsher #define OPCODE_COMMON_EQ_DESTROY 55
2799aebddd1SJeff Kirsher #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
2809aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_PMAC_ADD 59
2819aebddd1SJeff Kirsher #define OPCODE_COMMON_NTWK_PMAC_DEL 60
2829aebddd1SJeff Kirsher #define OPCODE_COMMON_FUNCTION_RESET 61
2839aebddd1SJeff Kirsher #define OPCODE_COMMON_MANAGE_FAT 68
2849aebddd1SJeff Kirsher #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69
2859aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_BEACON_STATE 70
2869aebddd1SJeff Kirsher #define OPCODE_COMMON_READ_TRANSRECV_DATA 73
287b4e32a71SPadmanabh Ratnakar #define OPCODE_COMMON_GET_PORT_NAME 77
288bdce2ad7SSuresh Reddy #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG 80
28968c45a2dSSomnath Kotur #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89
29004a06028SSathya Perla #define OPCODE_COMMON_SET_FN_PRIVILEGES 100
2919aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_PHY_DETAILS 102
2929aebddd1SJeff Kirsher #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103
2939aebddd1SJeff Kirsher #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121
29462259ac4SSomnath Kotur #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES 125
29562259ac4SSomnath Kotur #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITIES 126
296590c391dSPadmanabh Ratnakar #define OPCODE_COMMON_GET_MAC_LIST 147
297590c391dSPadmanabh Ratnakar #define OPCODE_COMMON_SET_MAC_LIST 148
298f1f3ee1bSAjit Khaparde #define OPCODE_COMMON_GET_HSW_CONFIG 152
299abb93951SPadmanabh Ratnakar #define OPCODE_COMMON_GET_FUNC_CONFIG 160
300abb93951SPadmanabh Ratnakar #define OPCODE_COMMON_GET_PROFILE_CONFIG 164
301d5c18473SPadmanabh Ratnakar #define OPCODE_COMMON_SET_PROFILE_CONFIG 165
302542963b7SVasundhara Volam #define OPCODE_COMMON_GET_ACTIVE_PROFILE 167
303f1f3ee1bSAjit Khaparde #define OPCODE_COMMON_SET_HSW_CONFIG 153
304f25b119cSPadmanabh Ratnakar #define OPCODE_COMMON_GET_FN_PRIVILEGES 170
305de49bd5aSPadmanabh Ratnakar #define OPCODE_COMMON_READ_OBJECT 171
3069aebddd1SJeff Kirsher #define OPCODE_COMMON_WRITE_OBJECT 172
307f0613380SKalesh AP #define OPCODE_COMMON_DELETE_OBJECT 174
308710f3e59SSriharsha Basavapatna #define OPCODE_COMMON_SET_FEATURES 191
309a401801cSSathya Perla #define OPCODE_COMMON_MANAGE_IFACE_FILTERS 193
3104c876616SSathya Perla #define OPCODE_COMMON_GET_IFACE_LIST 194
311dcf7ebbaSPadmanabh Ratnakar #define OPCODE_COMMON_ENABLE_DISABLE_VF 196
3129aebddd1SJeff Kirsher
3139aebddd1SJeff Kirsher #define OPCODE_ETH_RSS_CONFIG 1
3149aebddd1SJeff Kirsher #define OPCODE_ETH_ACPI_CONFIG 2
3159aebddd1SJeff Kirsher #define OPCODE_ETH_PROMISCUOUS 3
3169aebddd1SJeff Kirsher #define OPCODE_ETH_GET_STATISTICS 4
3179aebddd1SJeff Kirsher #define OPCODE_ETH_TX_CREATE 7
3189aebddd1SJeff Kirsher #define OPCODE_ETH_RX_CREATE 8
3199aebddd1SJeff Kirsher #define OPCODE_ETH_TX_DESTROY 9
3209aebddd1SJeff Kirsher #define OPCODE_ETH_RX_DESTROY 10
3219aebddd1SJeff Kirsher #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12
3229aebddd1SJeff Kirsher #define OPCODE_ETH_GET_PPORT_STATS 18
3239aebddd1SJeff Kirsher
3249aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17
3259aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18
3269aebddd1SJeff Kirsher #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19
3279aebddd1SJeff Kirsher
3289aebddd1SJeff Kirsher struct be_cmd_req_hdr {
3299aebddd1SJeff Kirsher u8 opcode; /* dword 0 */
3309aebddd1SJeff Kirsher u8 subsystem; /* dword 0 */
3319aebddd1SJeff Kirsher u8 port_number; /* dword 0 */
3329aebddd1SJeff Kirsher u8 domain; /* dword 0 */
3339aebddd1SJeff Kirsher u32 timeout; /* dword 1 */
3349aebddd1SJeff Kirsher u32 request_length; /* dword 2 */
3359aebddd1SJeff Kirsher u8 version; /* dword 3 */
336980df249SSuresh Reddy u8 rsvd[3]; /* dword 3 */
3379aebddd1SJeff Kirsher };
3389aebddd1SJeff Kirsher
3399aebddd1SJeff Kirsher #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
3409aebddd1SJeff Kirsher #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
3419aebddd1SJeff Kirsher struct be_cmd_resp_hdr {
342652bf646SPadmanabh Ratnakar u8 opcode; /* dword 0 */
343652bf646SPadmanabh Ratnakar u8 subsystem; /* dword 0 */
344652bf646SPadmanabh Ratnakar u8 rsvd[2]; /* dword 0 */
3454c60005fSKalesh AP u8 base_status; /* dword 1 */
3464c60005fSKalesh AP u8 addl_status; /* dword 1 */
347652bf646SPadmanabh Ratnakar u8 rsvd1[2]; /* dword 1 */
3489aebddd1SJeff Kirsher u32 response_length; /* dword 2 */
3499aebddd1SJeff Kirsher u32 actual_resp_len; /* dword 3 */
3509aebddd1SJeff Kirsher };
3519aebddd1SJeff Kirsher
3529aebddd1SJeff Kirsher struct phys_addr {
3539aebddd1SJeff Kirsher u32 lo;
3549aebddd1SJeff Kirsher u32 hi;
3559aebddd1SJeff Kirsher };
3569aebddd1SJeff Kirsher
3579aebddd1SJeff Kirsher /**************************
3589aebddd1SJeff Kirsher * BE Command definitions *
3599aebddd1SJeff Kirsher **************************/
3609aebddd1SJeff Kirsher
3619aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined
3629aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */
3639aebddd1SJeff Kirsher struct amap_eq_context {
3649aebddd1SJeff Kirsher u8 cidx[13]; /* dword 0*/
3659aebddd1SJeff Kirsher u8 rsvd0[3]; /* dword 0*/
3669aebddd1SJeff Kirsher u8 epidx[13]; /* dword 0*/
3679aebddd1SJeff Kirsher u8 valid; /* dword 0*/
3689aebddd1SJeff Kirsher u8 rsvd1; /* dword 0*/
3699aebddd1SJeff Kirsher u8 size; /* dword 0*/
3709aebddd1SJeff Kirsher u8 pidx[13]; /* dword 1*/
3719aebddd1SJeff Kirsher u8 rsvd2[3]; /* dword 1*/
3729aebddd1SJeff Kirsher u8 pd[10]; /* dword 1*/
3739aebddd1SJeff Kirsher u8 count[3]; /* dword 1*/
3749aebddd1SJeff Kirsher u8 solevent; /* dword 1*/
3759aebddd1SJeff Kirsher u8 stalled; /* dword 1*/
3769aebddd1SJeff Kirsher u8 armed; /* dword 1*/
3779aebddd1SJeff Kirsher u8 rsvd3[4]; /* dword 2*/
3789aebddd1SJeff Kirsher u8 func[8]; /* dword 2*/
3799aebddd1SJeff Kirsher u8 rsvd4; /* dword 2*/
3809aebddd1SJeff Kirsher u8 delaymult[10]; /* dword 2*/
3819aebddd1SJeff Kirsher u8 rsvd5[2]; /* dword 2*/
3829aebddd1SJeff Kirsher u8 phase[2]; /* dword 2*/
3839aebddd1SJeff Kirsher u8 nodelay; /* dword 2*/
3849aebddd1SJeff Kirsher u8 rsvd6[4]; /* dword 2*/
3859aebddd1SJeff Kirsher u8 rsvd7[32]; /* dword 3*/
3869aebddd1SJeff Kirsher } __packed;
3879aebddd1SJeff Kirsher
3889aebddd1SJeff Kirsher struct be_cmd_req_eq_create {
3899aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
3909aebddd1SJeff Kirsher u16 num_pages; /* sword */
3919aebddd1SJeff Kirsher u16 rsvd0; /* sword */
3929aebddd1SJeff Kirsher u8 context[sizeof(struct amap_eq_context) / 8];
3939aebddd1SJeff Kirsher struct phys_addr pages[8];
3949aebddd1SJeff Kirsher } __packed;
3959aebddd1SJeff Kirsher
3969aebddd1SJeff Kirsher struct be_cmd_resp_eq_create {
3979aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr;
3989aebddd1SJeff Kirsher u16 eq_id; /* sword */
399f2f781a7SSathya Perla u16 msix_idx; /* available only in v2 */
4009aebddd1SJeff Kirsher } __packed;
4019aebddd1SJeff Kirsher
4029aebddd1SJeff Kirsher /******************** Mac query ***************************/
4039aebddd1SJeff Kirsher enum {
4049aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_STORAGE = 0x0,
4059aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_NETWORK = 0x1,
4069aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_PD = 0x2,
4079aebddd1SJeff Kirsher MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
4089aebddd1SJeff Kirsher };
4099aebddd1SJeff Kirsher
4109aebddd1SJeff Kirsher struct mac_addr {
4119aebddd1SJeff Kirsher u16 size_of_struct;
4129aebddd1SJeff Kirsher u8 addr[ETH_ALEN];
4139aebddd1SJeff Kirsher } __packed;
4149aebddd1SJeff Kirsher
4159aebddd1SJeff Kirsher struct be_cmd_req_mac_query {
4169aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
4179aebddd1SJeff Kirsher u8 type;
4189aebddd1SJeff Kirsher u8 permanent;
4199aebddd1SJeff Kirsher u16 if_id;
420590c391dSPadmanabh Ratnakar u32 pmac_id;
4219aebddd1SJeff Kirsher } __packed;
4229aebddd1SJeff Kirsher
4239aebddd1SJeff Kirsher struct be_cmd_resp_mac_query {
4249aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
4259aebddd1SJeff Kirsher struct mac_addr mac;
4269aebddd1SJeff Kirsher };
4279aebddd1SJeff Kirsher
4289aebddd1SJeff Kirsher /******************** PMac Add ***************************/
4299aebddd1SJeff Kirsher struct be_cmd_req_pmac_add {
4309aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
4319aebddd1SJeff Kirsher u32 if_id;
4329aebddd1SJeff Kirsher u8 mac_address[ETH_ALEN];
4339aebddd1SJeff Kirsher u8 rsvd0[2];
4349aebddd1SJeff Kirsher } __packed;
4359aebddd1SJeff Kirsher
4369aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add {
4379aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
4389aebddd1SJeff Kirsher u32 pmac_id;
4399aebddd1SJeff Kirsher };
4409aebddd1SJeff Kirsher
4419aebddd1SJeff Kirsher /******************** PMac Del ***************************/
4429aebddd1SJeff Kirsher struct be_cmd_req_pmac_del {
4439aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
4449aebddd1SJeff Kirsher u32 if_id;
4459aebddd1SJeff Kirsher u32 pmac_id;
4469aebddd1SJeff Kirsher };
4479aebddd1SJeff Kirsher
4489aebddd1SJeff Kirsher /******************** Create CQ ***************************/
4499aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined
4509aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */
4519aebddd1SJeff Kirsher struct amap_cq_context_be {
4529aebddd1SJeff Kirsher u8 cidx[11]; /* dword 0*/
4539aebddd1SJeff Kirsher u8 rsvd0; /* dword 0*/
4549aebddd1SJeff Kirsher u8 coalescwm[2]; /* dword 0*/
4559aebddd1SJeff Kirsher u8 nodelay; /* dword 0*/
4569aebddd1SJeff Kirsher u8 epidx[11]; /* dword 0*/
4579aebddd1SJeff Kirsher u8 rsvd1; /* dword 0*/
4589aebddd1SJeff Kirsher u8 count[2]; /* dword 0*/
4599aebddd1SJeff Kirsher u8 valid; /* dword 0*/
4609aebddd1SJeff Kirsher u8 solevent; /* dword 0*/
4619aebddd1SJeff Kirsher u8 eventable; /* dword 0*/
4629aebddd1SJeff Kirsher u8 pidx[11]; /* dword 1*/
4639aebddd1SJeff Kirsher u8 rsvd2; /* dword 1*/
4649aebddd1SJeff Kirsher u8 pd[10]; /* dword 1*/
4659aebddd1SJeff Kirsher u8 eqid[8]; /* dword 1*/
4669aebddd1SJeff Kirsher u8 stalled; /* dword 1*/
4679aebddd1SJeff Kirsher u8 armed; /* dword 1*/
4689aebddd1SJeff Kirsher u8 rsvd3[4]; /* dword 2*/
4699aebddd1SJeff Kirsher u8 func[8]; /* dword 2*/
4709aebddd1SJeff Kirsher u8 rsvd4[20]; /* dword 2*/
4719aebddd1SJeff Kirsher u8 rsvd5[32]; /* dword 3*/
4729aebddd1SJeff Kirsher } __packed;
4739aebddd1SJeff Kirsher
474bbdc42f8SAjit Khaparde struct amap_cq_context_v2 {
4759aebddd1SJeff Kirsher u8 rsvd0[12]; /* dword 0*/
4769aebddd1SJeff Kirsher u8 coalescwm[2]; /* dword 0*/
4779aebddd1SJeff Kirsher u8 nodelay; /* dword 0*/
4789aebddd1SJeff Kirsher u8 rsvd1[12]; /* dword 0*/
4799aebddd1SJeff Kirsher u8 count[2]; /* dword 0*/
4809aebddd1SJeff Kirsher u8 valid; /* dword 0*/
4819aebddd1SJeff Kirsher u8 rsvd2; /* dword 0*/
4829aebddd1SJeff Kirsher u8 eventable; /* dword 0*/
4839aebddd1SJeff Kirsher u8 eqid[16]; /* dword 1*/
4849aebddd1SJeff Kirsher u8 rsvd3[15]; /* dword 1*/
4859aebddd1SJeff Kirsher u8 armed; /* dword 1*/
4869aebddd1SJeff Kirsher u8 rsvd4[32]; /* dword 2*/
4879aebddd1SJeff Kirsher u8 rsvd5[32]; /* dword 3*/
4889aebddd1SJeff Kirsher } __packed;
4899aebddd1SJeff Kirsher
4909aebddd1SJeff Kirsher struct be_cmd_req_cq_create {
4919aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
4929aebddd1SJeff Kirsher u16 num_pages;
4939aebddd1SJeff Kirsher u8 page_size;
4949aebddd1SJeff Kirsher u8 rsvd0;
4959aebddd1SJeff Kirsher u8 context[sizeof(struct amap_cq_context_be) / 8];
4969aebddd1SJeff Kirsher struct phys_addr pages[8];
4979aebddd1SJeff Kirsher } __packed;
4989aebddd1SJeff Kirsher
4999aebddd1SJeff Kirsher
5009aebddd1SJeff Kirsher struct be_cmd_resp_cq_create {
5019aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
5029aebddd1SJeff Kirsher u16 cq_id;
5039aebddd1SJeff Kirsher u16 rsvd0;
5049aebddd1SJeff Kirsher } __packed;
5059aebddd1SJeff Kirsher
5069aebddd1SJeff Kirsher struct be_cmd_req_get_fat {
5079aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
5089aebddd1SJeff Kirsher u32 fat_operation;
5099aebddd1SJeff Kirsher u32 read_log_offset;
5109aebddd1SJeff Kirsher u32 read_log_length;
5119aebddd1SJeff Kirsher u32 data_buffer_size;
5129aebddd1SJeff Kirsher u32 data_buffer[1];
5139aebddd1SJeff Kirsher } __packed;
5149aebddd1SJeff Kirsher
5159aebddd1SJeff Kirsher struct be_cmd_resp_get_fat {
5169aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
5179aebddd1SJeff Kirsher u32 log_size;
5189aebddd1SJeff Kirsher u32 read_log_length;
5199aebddd1SJeff Kirsher u32 rsvd[2];
5209aebddd1SJeff Kirsher u32 data_buffer[1];
5219aebddd1SJeff Kirsher } __packed;
5229aebddd1SJeff Kirsher
5239aebddd1SJeff Kirsher
5249aebddd1SJeff Kirsher /******************** Create MCCQ ***************************/
5259aebddd1SJeff Kirsher /* Pseudo amap definition in which each bit of the actual structure is defined
5269aebddd1SJeff Kirsher * as a byte: used to calculate offset/shift/mask of each field */
5279aebddd1SJeff Kirsher struct amap_mcc_context_be {
5289aebddd1SJeff Kirsher u8 con_index[14];
5299aebddd1SJeff Kirsher u8 rsvd0[2];
5309aebddd1SJeff Kirsher u8 ring_size[4];
5319aebddd1SJeff Kirsher u8 fetch_wrb;
5329aebddd1SJeff Kirsher u8 fetch_r2t;
5339aebddd1SJeff Kirsher u8 cq_id[10];
5349aebddd1SJeff Kirsher u8 prod_index[14];
5359aebddd1SJeff Kirsher u8 fid[8];
5369aebddd1SJeff Kirsher u8 pdid[9];
5379aebddd1SJeff Kirsher u8 valid;
5389aebddd1SJeff Kirsher u8 rsvd1[32];
5399aebddd1SJeff Kirsher u8 rsvd2[32];
5409aebddd1SJeff Kirsher } __packed;
5419aebddd1SJeff Kirsher
542666d39c7SVasundhara Volam struct amap_mcc_context_v1 {
5439aebddd1SJeff Kirsher u8 async_cq_id[16];
5449aebddd1SJeff Kirsher u8 ring_size[4];
5459aebddd1SJeff Kirsher u8 rsvd0[12];
5469aebddd1SJeff Kirsher u8 rsvd1[31];
5479aebddd1SJeff Kirsher u8 valid;
5489aebddd1SJeff Kirsher u8 async_cq_valid[1];
5499aebddd1SJeff Kirsher u8 rsvd2[31];
5509aebddd1SJeff Kirsher u8 rsvd3[32];
5519aebddd1SJeff Kirsher } __packed;
5529aebddd1SJeff Kirsher
5539aebddd1SJeff Kirsher struct be_cmd_req_mcc_create {
5549aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
5559aebddd1SJeff Kirsher u16 num_pages;
5569aebddd1SJeff Kirsher u16 cq_id;
5579aebddd1SJeff Kirsher u8 context[sizeof(struct amap_mcc_context_be) / 8];
5589aebddd1SJeff Kirsher struct phys_addr pages[8];
5599aebddd1SJeff Kirsher } __packed;
5609aebddd1SJeff Kirsher
5619aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create {
5629aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
5639aebddd1SJeff Kirsher u16 num_pages;
5649aebddd1SJeff Kirsher u16 cq_id;
5659aebddd1SJeff Kirsher u32 async_event_bitmap[1];
566666d39c7SVasundhara Volam u8 context[sizeof(struct amap_mcc_context_v1) / 8];
5679aebddd1SJeff Kirsher struct phys_addr pages[8];
5689aebddd1SJeff Kirsher } __packed;
5699aebddd1SJeff Kirsher
5709aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create {
5719aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
5729aebddd1SJeff Kirsher u16 id;
5739aebddd1SJeff Kirsher u16 rsvd0;
5749aebddd1SJeff Kirsher } __packed;
5759aebddd1SJeff Kirsher
5769aebddd1SJeff Kirsher /******************** Create TxQ ***************************/
5779aebddd1SJeff Kirsher #define BE_ETH_TX_RING_TYPE_STANDARD 2
5789aebddd1SJeff Kirsher #define BE_ULP1_NUM 1
5799aebddd1SJeff Kirsher
5809aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create {
5819aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
5829aebddd1SJeff Kirsher u8 num_pages;
5839aebddd1SJeff Kirsher u8 ulp_num;
58494d73aaaSVasundhara Volam u16 type;
58594d73aaaSVasundhara Volam u16 if_id;
58694d73aaaSVasundhara Volam u8 queue_size;
58794d73aaaSVasundhara Volam u8 rsvd0;
58894d73aaaSVasundhara Volam u32 rsvd1;
58994d73aaaSVasundhara Volam u16 cq_id;
59094d73aaaSVasundhara Volam u16 rsvd2;
59194d73aaaSVasundhara Volam u32 rsvd3[13];
5929aebddd1SJeff Kirsher struct phys_addr pages[8];
5939aebddd1SJeff Kirsher } __packed;
5949aebddd1SJeff Kirsher
5959aebddd1SJeff Kirsher struct be_cmd_resp_eth_tx_create {
5969aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
5979aebddd1SJeff Kirsher u16 cid;
59894d73aaaSVasundhara Volam u16 rid;
59994d73aaaSVasundhara Volam u32 db_offset;
60094d73aaaSVasundhara Volam u32 rsvd0[4];
6019aebddd1SJeff Kirsher } __packed;
6029aebddd1SJeff Kirsher
6039aebddd1SJeff Kirsher /******************** Create RxQ ***************************/
6049aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create {
6059aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
6069aebddd1SJeff Kirsher u16 cq_id;
6079aebddd1SJeff Kirsher u8 frag_size;
6089aebddd1SJeff Kirsher u8 num_pages;
6099aebddd1SJeff Kirsher struct phys_addr pages[2];
6109aebddd1SJeff Kirsher u32 interface_id;
6119aebddd1SJeff Kirsher u16 max_frame_size;
6129aebddd1SJeff Kirsher u16 rsvd0;
6139aebddd1SJeff Kirsher u32 rss_queue;
6149aebddd1SJeff Kirsher } __packed;
6159aebddd1SJeff Kirsher
6169aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create {
6179aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
6189aebddd1SJeff Kirsher u16 id;
6199aebddd1SJeff Kirsher u8 rss_id;
6209aebddd1SJeff Kirsher u8 rsvd0;
6219aebddd1SJeff Kirsher } __packed;
6229aebddd1SJeff Kirsher
6239aebddd1SJeff Kirsher /******************** Q Destroy ***************************/
6249aebddd1SJeff Kirsher /* Type of Queue to be destroyed */
6259aebddd1SJeff Kirsher enum {
6269aebddd1SJeff Kirsher QTYPE_EQ = 1,
6279aebddd1SJeff Kirsher QTYPE_CQ,
6289aebddd1SJeff Kirsher QTYPE_TXQ,
6299aebddd1SJeff Kirsher QTYPE_RXQ,
6309aebddd1SJeff Kirsher QTYPE_MCCQ
6319aebddd1SJeff Kirsher };
6329aebddd1SJeff Kirsher
6339aebddd1SJeff Kirsher struct be_cmd_req_q_destroy {
6349aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
6359aebddd1SJeff Kirsher u16 id;
6369aebddd1SJeff Kirsher u16 bypass_flush; /* valid only for rx q destroy */
6379aebddd1SJeff Kirsher } __packed;
6389aebddd1SJeff Kirsher
6399aebddd1SJeff Kirsher /************ I/f Create (it's actually I/f Config Create)**********/
6409aebddd1SJeff Kirsher
6419aebddd1SJeff Kirsher /* Capability flags for the i/f */
6429aebddd1SJeff Kirsher enum be_if_flags {
6439aebddd1SJeff Kirsher BE_IF_FLAGS_RSS = 0x4,
6449aebddd1SJeff Kirsher BE_IF_FLAGS_PROMISCUOUS = 0x8,
6459aebddd1SJeff Kirsher BE_IF_FLAGS_BROADCAST = 0x10,
6469aebddd1SJeff Kirsher BE_IF_FLAGS_UNTAGGED = 0x20,
6479aebddd1SJeff Kirsher BE_IF_FLAGS_ULP = 0x40,
6489aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
6499aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN = 0x100,
6509aebddd1SJeff Kirsher BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
6519aebddd1SJeff Kirsher BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
6529aebddd1SJeff Kirsher BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
65371bb8bd0SVasundhara Volam BE_IF_FLAGS_MULTICAST = 0x1000,
65471bb8bd0SVasundhara Volam BE_IF_FLAGS_DEFQ_RSS = 0x1000000
6559aebddd1SJeff Kirsher };
6569aebddd1SJeff Kirsher
6573da988c9SSarveshwar Bandi #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
6583da988c9SSarveshwar Bandi BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
6593da988c9SSarveshwar Bandi BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
6603da988c9SSarveshwar Bandi BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
66171bb8bd0SVasundhara Volam BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_DEFQ_RSS)
6623da988c9SSarveshwar Bandi
663ac34b743SSathya Perla #define BE_IF_FLAGS_ALL_PROMISCUOUS (BE_IF_FLAGS_PROMISCUOUS | \
664ac34b743SSathya Perla BE_IF_FLAGS_VLAN_PROMISCUOUS |\
665ac34b743SSathya Perla BE_IF_FLAGS_MCAST_PROMISCUOUS)
666ac34b743SSathya Perla
667c1bb0a55SVenkat Duvvuru #define BE_IF_FILT_FLAGS_BASIC (BE_IF_FLAGS_BROADCAST | \
668c1bb0a55SVenkat Duvvuru BE_IF_FLAGS_PASS_L3L4_ERRORS | \
669c1bb0a55SVenkat Duvvuru BE_IF_FLAGS_UNTAGGED)
670bcc84140SKalesh AP
671c1bb0a55SVenkat Duvvuru #define BE_IF_ALL_FILT_FLAGS (BE_IF_FILT_FLAGS_BASIC | \
672c1bb0a55SVenkat Duvvuru BE_IF_FLAGS_MULTICAST | \
673c1bb0a55SVenkat Duvvuru BE_IF_FLAGS_ALL_PROMISCUOUS)
674bcc84140SKalesh AP
6759aebddd1SJeff Kirsher /* An RX interface is an object with one or more MAC addresses and
6769aebddd1SJeff Kirsher * filtering capabilities. */
6779aebddd1SJeff Kirsher struct be_cmd_req_if_create {
6789aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
6799aebddd1SJeff Kirsher u32 version; /* ignore currently */
6809aebddd1SJeff Kirsher u32 capability_flags;
6819aebddd1SJeff Kirsher u32 enable_flags;
6829aebddd1SJeff Kirsher u8 mac_addr[ETH_ALEN];
6839aebddd1SJeff Kirsher u8 rsvd0;
6849aebddd1SJeff Kirsher u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
6859aebddd1SJeff Kirsher u32 vlan_tag; /* not used currently */
6869aebddd1SJeff Kirsher } __packed;
6879aebddd1SJeff Kirsher
6889aebddd1SJeff Kirsher struct be_cmd_resp_if_create {
6899aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
6909aebddd1SJeff Kirsher u32 interface_id;
6919aebddd1SJeff Kirsher u32 pmac_id;
6929aebddd1SJeff Kirsher };
6939aebddd1SJeff Kirsher
6949aebddd1SJeff Kirsher /****** I/f Destroy(it's actually I/f Config Destroy )**********/
6959aebddd1SJeff Kirsher struct be_cmd_req_if_destroy {
6969aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
6979aebddd1SJeff Kirsher u32 interface_id;
6989aebddd1SJeff Kirsher };
6999aebddd1SJeff Kirsher
7009aebddd1SJeff Kirsher /*************** HW Stats Get **********************************/
7019aebddd1SJeff Kirsher struct be_port_rxf_stats_v0 {
7029aebddd1SJeff Kirsher u32 rx_bytes_lsd; /* dword 0*/
7039aebddd1SJeff Kirsher u32 rx_bytes_msd; /* dword 1*/
7049aebddd1SJeff Kirsher u32 rx_total_frames; /* dword 2*/
7059aebddd1SJeff Kirsher u32 rx_unicast_frames; /* dword 3*/
7069aebddd1SJeff Kirsher u32 rx_multicast_frames; /* dword 4*/
7079aebddd1SJeff Kirsher u32 rx_broadcast_frames; /* dword 5*/
7089aebddd1SJeff Kirsher u32 rx_crc_errors; /* dword 6*/
7099aebddd1SJeff Kirsher u32 rx_alignment_symbol_errors; /* dword 7*/
7109aebddd1SJeff Kirsher u32 rx_pause_frames; /* dword 8*/
7119aebddd1SJeff Kirsher u32 rx_control_frames; /* dword 9*/
7129aebddd1SJeff Kirsher u32 rx_in_range_errors; /* dword 10*/
7139aebddd1SJeff Kirsher u32 rx_out_range_errors; /* dword 11*/
7149aebddd1SJeff Kirsher u32 rx_frame_too_long; /* dword 12*/
71518fb06a1SSuresh Reddy u32 rx_address_filtered; /* dword 13*/
71618fb06a1SSuresh Reddy u32 rx_vlan_filtered; /* dword 14*/
7179aebddd1SJeff Kirsher u32 rx_dropped_too_small; /* dword 15*/
7189aebddd1SJeff Kirsher u32 rx_dropped_too_short; /* dword 16*/
7199aebddd1SJeff Kirsher u32 rx_dropped_header_too_small; /* dword 17*/
7209aebddd1SJeff Kirsher u32 rx_dropped_tcp_length; /* dword 18*/
7219aebddd1SJeff Kirsher u32 rx_dropped_runt; /* dword 19*/
7229aebddd1SJeff Kirsher u32 rx_64_byte_packets; /* dword 20*/
7239aebddd1SJeff Kirsher u32 rx_65_127_byte_packets; /* dword 21*/
7249aebddd1SJeff Kirsher u32 rx_128_256_byte_packets; /* dword 22*/
7259aebddd1SJeff Kirsher u32 rx_256_511_byte_packets; /* dword 23*/
7269aebddd1SJeff Kirsher u32 rx_512_1023_byte_packets; /* dword 24*/
7279aebddd1SJeff Kirsher u32 rx_1024_1518_byte_packets; /* dword 25*/
7289aebddd1SJeff Kirsher u32 rx_1519_2047_byte_packets; /* dword 26*/
7299aebddd1SJeff Kirsher u32 rx_2048_4095_byte_packets; /* dword 27*/
7309aebddd1SJeff Kirsher u32 rx_4096_8191_byte_packets; /* dword 28*/
7319aebddd1SJeff Kirsher u32 rx_8192_9216_byte_packets; /* dword 29*/
7329aebddd1SJeff Kirsher u32 rx_ip_checksum_errs; /* dword 30*/
7339aebddd1SJeff Kirsher u32 rx_tcp_checksum_errs; /* dword 31*/
7349aebddd1SJeff Kirsher u32 rx_udp_checksum_errs; /* dword 32*/
7359aebddd1SJeff Kirsher u32 rx_non_rss_packets; /* dword 33*/
7369aebddd1SJeff Kirsher u32 rx_ipv4_packets; /* dword 34*/
7379aebddd1SJeff Kirsher u32 rx_ipv6_packets; /* dword 35*/
7389aebddd1SJeff Kirsher u32 rx_ipv4_bytes_lsd; /* dword 36*/
7399aebddd1SJeff Kirsher u32 rx_ipv4_bytes_msd; /* dword 37*/
7409aebddd1SJeff Kirsher u32 rx_ipv6_bytes_lsd; /* dword 38*/
7419aebddd1SJeff Kirsher u32 rx_ipv6_bytes_msd; /* dword 39*/
7429aebddd1SJeff Kirsher u32 rx_chute1_packets; /* dword 40*/
7439aebddd1SJeff Kirsher u32 rx_chute2_packets; /* dword 41*/
7449aebddd1SJeff Kirsher u32 rx_chute3_packets; /* dword 42*/
7459aebddd1SJeff Kirsher u32 rx_management_packets; /* dword 43*/
7469aebddd1SJeff Kirsher u32 rx_switched_unicast_packets; /* dword 44*/
7479aebddd1SJeff Kirsher u32 rx_switched_multicast_packets; /* dword 45*/
7489aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets; /* dword 46*/
7499aebddd1SJeff Kirsher u32 tx_bytes_lsd; /* dword 47*/
7509aebddd1SJeff Kirsher u32 tx_bytes_msd; /* dword 48*/
7519aebddd1SJeff Kirsher u32 tx_unicastframes; /* dword 49*/
7529aebddd1SJeff Kirsher u32 tx_multicastframes; /* dword 50*/
7539aebddd1SJeff Kirsher u32 tx_broadcastframes; /* dword 51*/
7549aebddd1SJeff Kirsher u32 tx_pauseframes; /* dword 52*/
7559aebddd1SJeff Kirsher u32 tx_controlframes; /* dword 53*/
7569aebddd1SJeff Kirsher u32 tx_64_byte_packets; /* dword 54*/
7579aebddd1SJeff Kirsher u32 tx_65_127_byte_packets; /* dword 55*/
7589aebddd1SJeff Kirsher u32 tx_128_256_byte_packets; /* dword 56*/
7599aebddd1SJeff Kirsher u32 tx_256_511_byte_packets; /* dword 57*/
7609aebddd1SJeff Kirsher u32 tx_512_1023_byte_packets; /* dword 58*/
7619aebddd1SJeff Kirsher u32 tx_1024_1518_byte_packets; /* dword 59*/
7629aebddd1SJeff Kirsher u32 tx_1519_2047_byte_packets; /* dword 60*/
7639aebddd1SJeff Kirsher u32 tx_2048_4095_byte_packets; /* dword 61*/
7649aebddd1SJeff Kirsher u32 tx_4096_8191_byte_packets; /* dword 62*/
7659aebddd1SJeff Kirsher u32 tx_8192_9216_byte_packets; /* dword 63*/
7669aebddd1SJeff Kirsher u32 rx_fifo_overflow; /* dword 64*/
7679aebddd1SJeff Kirsher u32 rx_input_fifo_overflow; /* dword 65*/
7689aebddd1SJeff Kirsher };
7699aebddd1SJeff Kirsher
7709aebddd1SJeff Kirsher struct be_rxf_stats_v0 {
7719aebddd1SJeff Kirsher struct be_port_rxf_stats_v0 port[2];
7729aebddd1SJeff Kirsher u32 rx_drops_no_pbuf; /* dword 132*/
7739aebddd1SJeff Kirsher u32 rx_drops_no_txpb; /* dword 133*/
7749aebddd1SJeff Kirsher u32 rx_drops_no_erx_descr; /* dword 134*/
7759aebddd1SJeff Kirsher u32 rx_drops_no_tpre_descr; /* dword 135*/
7769aebddd1SJeff Kirsher u32 management_rx_port_packets; /* dword 136*/
7779aebddd1SJeff Kirsher u32 management_rx_port_bytes; /* dword 137*/
7789aebddd1SJeff Kirsher u32 management_rx_port_pause_frames; /* dword 138*/
7799aebddd1SJeff Kirsher u32 management_rx_port_errors; /* dword 139*/
7809aebddd1SJeff Kirsher u32 management_tx_port_packets; /* dword 140*/
7819aebddd1SJeff Kirsher u32 management_tx_port_bytes; /* dword 141*/
7829aebddd1SJeff Kirsher u32 management_tx_port_pause; /* dword 142*/
7839aebddd1SJeff Kirsher u32 management_rx_port_rxfifo_overflow; /* dword 143*/
7849aebddd1SJeff Kirsher u32 rx_drops_too_many_frags; /* dword 144*/
7859aebddd1SJeff Kirsher u32 rx_drops_invalid_ring; /* dword 145*/
7869aebddd1SJeff Kirsher u32 forwarded_packets; /* dword 146*/
7879aebddd1SJeff Kirsher u32 rx_drops_mtu; /* dword 147*/
7889aebddd1SJeff Kirsher u32 rsvd0[7];
7899aebddd1SJeff Kirsher u32 port0_jabber_events;
7909aebddd1SJeff Kirsher u32 port1_jabber_events;
7919aebddd1SJeff Kirsher u32 rsvd1[6];
7929aebddd1SJeff Kirsher };
7939aebddd1SJeff Kirsher
7949aebddd1SJeff Kirsher struct be_erx_stats_v0 {
7959aebddd1SJeff Kirsher u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
7969aebddd1SJeff Kirsher u32 rsvd[4];
7979aebddd1SJeff Kirsher };
7989aebddd1SJeff Kirsher
7999aebddd1SJeff Kirsher struct be_pmem_stats {
8009aebddd1SJeff Kirsher u32 eth_red_drops;
8019aebddd1SJeff Kirsher u32 rsvd[5];
8029aebddd1SJeff Kirsher };
8039aebddd1SJeff Kirsher
8049aebddd1SJeff Kirsher struct be_hw_stats_v0 {
8059aebddd1SJeff Kirsher struct be_rxf_stats_v0 rxf;
8069aebddd1SJeff Kirsher u32 rsvd[48];
8079aebddd1SJeff Kirsher struct be_erx_stats_v0 erx;
8089aebddd1SJeff Kirsher struct be_pmem_stats pmem;
8099aebddd1SJeff Kirsher };
8109aebddd1SJeff Kirsher
8119aebddd1SJeff Kirsher struct be_cmd_req_get_stats_v0 {
8129aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
8139aebddd1SJeff Kirsher u8 rsvd[sizeof(struct be_hw_stats_v0)];
8149aebddd1SJeff Kirsher };
8159aebddd1SJeff Kirsher
8169aebddd1SJeff Kirsher struct be_cmd_resp_get_stats_v0 {
8179aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
8189aebddd1SJeff Kirsher struct be_hw_stats_v0 hw_stats;
8199aebddd1SJeff Kirsher };
8209aebddd1SJeff Kirsher
8219aebddd1SJeff Kirsher struct lancer_pport_stats {
8229aebddd1SJeff Kirsher u32 tx_packets_lo;
8239aebddd1SJeff Kirsher u32 tx_packets_hi;
8249aebddd1SJeff Kirsher u32 tx_unicast_packets_lo;
8259aebddd1SJeff Kirsher u32 tx_unicast_packets_hi;
8269aebddd1SJeff Kirsher u32 tx_multicast_packets_lo;
8279aebddd1SJeff Kirsher u32 tx_multicast_packets_hi;
8289aebddd1SJeff Kirsher u32 tx_broadcast_packets_lo;
8299aebddd1SJeff Kirsher u32 tx_broadcast_packets_hi;
8309aebddd1SJeff Kirsher u32 tx_bytes_lo;
8319aebddd1SJeff Kirsher u32 tx_bytes_hi;
8329aebddd1SJeff Kirsher u32 tx_unicast_bytes_lo;
8339aebddd1SJeff Kirsher u32 tx_unicast_bytes_hi;
8349aebddd1SJeff Kirsher u32 tx_multicast_bytes_lo;
8359aebddd1SJeff Kirsher u32 tx_multicast_bytes_hi;
8369aebddd1SJeff Kirsher u32 tx_broadcast_bytes_lo;
8379aebddd1SJeff Kirsher u32 tx_broadcast_bytes_hi;
8389aebddd1SJeff Kirsher u32 tx_discards_lo;
8399aebddd1SJeff Kirsher u32 tx_discards_hi;
8409aebddd1SJeff Kirsher u32 tx_errors_lo;
8419aebddd1SJeff Kirsher u32 tx_errors_hi;
8429aebddd1SJeff Kirsher u32 tx_pause_frames_lo;
8439aebddd1SJeff Kirsher u32 tx_pause_frames_hi;
8449aebddd1SJeff Kirsher u32 tx_pause_on_frames_lo;
8459aebddd1SJeff Kirsher u32 tx_pause_on_frames_hi;
8469aebddd1SJeff Kirsher u32 tx_pause_off_frames_lo;
8479aebddd1SJeff Kirsher u32 tx_pause_off_frames_hi;
8489aebddd1SJeff Kirsher u32 tx_internal_mac_errors_lo;
8499aebddd1SJeff Kirsher u32 tx_internal_mac_errors_hi;
8509aebddd1SJeff Kirsher u32 tx_control_frames_lo;
8519aebddd1SJeff Kirsher u32 tx_control_frames_hi;
8529aebddd1SJeff Kirsher u32 tx_packets_64_bytes_lo;
8539aebddd1SJeff Kirsher u32 tx_packets_64_bytes_hi;
8549aebddd1SJeff Kirsher u32 tx_packets_65_to_127_bytes_lo;
8559aebddd1SJeff Kirsher u32 tx_packets_65_to_127_bytes_hi;
8569aebddd1SJeff Kirsher u32 tx_packets_128_to_255_bytes_lo;
8579aebddd1SJeff Kirsher u32 tx_packets_128_to_255_bytes_hi;
8589aebddd1SJeff Kirsher u32 tx_packets_256_to_511_bytes_lo;
8599aebddd1SJeff Kirsher u32 tx_packets_256_to_511_bytes_hi;
8609aebddd1SJeff Kirsher u32 tx_packets_512_to_1023_bytes_lo;
8619aebddd1SJeff Kirsher u32 tx_packets_512_to_1023_bytes_hi;
8629aebddd1SJeff Kirsher u32 tx_packets_1024_to_1518_bytes_lo;
8639aebddd1SJeff Kirsher u32 tx_packets_1024_to_1518_bytes_hi;
8649aebddd1SJeff Kirsher u32 tx_packets_1519_to_2047_bytes_lo;
8659aebddd1SJeff Kirsher u32 tx_packets_1519_to_2047_bytes_hi;
8669aebddd1SJeff Kirsher u32 tx_packets_2048_to_4095_bytes_lo;
8679aebddd1SJeff Kirsher u32 tx_packets_2048_to_4095_bytes_hi;
8689aebddd1SJeff Kirsher u32 tx_packets_4096_to_8191_bytes_lo;
8699aebddd1SJeff Kirsher u32 tx_packets_4096_to_8191_bytes_hi;
8709aebddd1SJeff Kirsher u32 tx_packets_8192_to_9216_bytes_lo;
8719aebddd1SJeff Kirsher u32 tx_packets_8192_to_9216_bytes_hi;
8729aebddd1SJeff Kirsher u32 tx_lso_packets_lo;
8739aebddd1SJeff Kirsher u32 tx_lso_packets_hi;
8749aebddd1SJeff Kirsher u32 rx_packets_lo;
8759aebddd1SJeff Kirsher u32 rx_packets_hi;
8769aebddd1SJeff Kirsher u32 rx_unicast_packets_lo;
8779aebddd1SJeff Kirsher u32 rx_unicast_packets_hi;
8789aebddd1SJeff Kirsher u32 rx_multicast_packets_lo;
8799aebddd1SJeff Kirsher u32 rx_multicast_packets_hi;
8809aebddd1SJeff Kirsher u32 rx_broadcast_packets_lo;
8819aebddd1SJeff Kirsher u32 rx_broadcast_packets_hi;
8829aebddd1SJeff Kirsher u32 rx_bytes_lo;
8839aebddd1SJeff Kirsher u32 rx_bytes_hi;
8849aebddd1SJeff Kirsher u32 rx_unicast_bytes_lo;
8859aebddd1SJeff Kirsher u32 rx_unicast_bytes_hi;
8869aebddd1SJeff Kirsher u32 rx_multicast_bytes_lo;
8879aebddd1SJeff Kirsher u32 rx_multicast_bytes_hi;
8889aebddd1SJeff Kirsher u32 rx_broadcast_bytes_lo;
8899aebddd1SJeff Kirsher u32 rx_broadcast_bytes_hi;
8909aebddd1SJeff Kirsher u32 rx_unknown_protos;
8919aebddd1SJeff Kirsher u32 rsvd_69; /* Word 69 is reserved */
8929aebddd1SJeff Kirsher u32 rx_discards_lo;
8939aebddd1SJeff Kirsher u32 rx_discards_hi;
8949aebddd1SJeff Kirsher u32 rx_errors_lo;
8959aebddd1SJeff Kirsher u32 rx_errors_hi;
8969aebddd1SJeff Kirsher u32 rx_crc_errors_lo;
8979aebddd1SJeff Kirsher u32 rx_crc_errors_hi;
8989aebddd1SJeff Kirsher u32 rx_alignment_errors_lo;
8999aebddd1SJeff Kirsher u32 rx_alignment_errors_hi;
9009aebddd1SJeff Kirsher u32 rx_symbol_errors_lo;
9019aebddd1SJeff Kirsher u32 rx_symbol_errors_hi;
9029aebddd1SJeff Kirsher u32 rx_pause_frames_lo;
9039aebddd1SJeff Kirsher u32 rx_pause_frames_hi;
9049aebddd1SJeff Kirsher u32 rx_pause_on_frames_lo;
9059aebddd1SJeff Kirsher u32 rx_pause_on_frames_hi;
9069aebddd1SJeff Kirsher u32 rx_pause_off_frames_lo;
9079aebddd1SJeff Kirsher u32 rx_pause_off_frames_hi;
9089aebddd1SJeff Kirsher u32 rx_frames_too_long_lo;
9099aebddd1SJeff Kirsher u32 rx_frames_too_long_hi;
9109aebddd1SJeff Kirsher u32 rx_internal_mac_errors_lo;
9119aebddd1SJeff Kirsher u32 rx_internal_mac_errors_hi;
9129aebddd1SJeff Kirsher u32 rx_undersize_packets;
9139aebddd1SJeff Kirsher u32 rx_oversize_packets;
9149aebddd1SJeff Kirsher u32 rx_fragment_packets;
9159aebddd1SJeff Kirsher u32 rx_jabbers;
9169aebddd1SJeff Kirsher u32 rx_control_frames_lo;
9179aebddd1SJeff Kirsher u32 rx_control_frames_hi;
9189aebddd1SJeff Kirsher u32 rx_control_frames_unknown_opcode_lo;
9199aebddd1SJeff Kirsher u32 rx_control_frames_unknown_opcode_hi;
9209aebddd1SJeff Kirsher u32 rx_in_range_errors;
9219aebddd1SJeff Kirsher u32 rx_out_of_range_errors;
92218fb06a1SSuresh Reddy u32 rx_address_filtered;
92318fb06a1SSuresh Reddy u32 rx_vlan_filtered;
9249aebddd1SJeff Kirsher u32 rx_dropped_too_small;
9259aebddd1SJeff Kirsher u32 rx_dropped_too_short;
9269aebddd1SJeff Kirsher u32 rx_dropped_header_too_small;
9279aebddd1SJeff Kirsher u32 rx_dropped_invalid_tcp_length;
9289aebddd1SJeff Kirsher u32 rx_dropped_runt;
9299aebddd1SJeff Kirsher u32 rx_ip_checksum_errors;
9309aebddd1SJeff Kirsher u32 rx_tcp_checksum_errors;
9319aebddd1SJeff Kirsher u32 rx_udp_checksum_errors;
9329aebddd1SJeff Kirsher u32 rx_non_rss_packets;
9339aebddd1SJeff Kirsher u32 rsvd_111;
9349aebddd1SJeff Kirsher u32 rx_ipv4_packets_lo;
9359aebddd1SJeff Kirsher u32 rx_ipv4_packets_hi;
9369aebddd1SJeff Kirsher u32 rx_ipv6_packets_lo;
9379aebddd1SJeff Kirsher u32 rx_ipv6_packets_hi;
9389aebddd1SJeff Kirsher u32 rx_ipv4_bytes_lo;
9399aebddd1SJeff Kirsher u32 rx_ipv4_bytes_hi;
9409aebddd1SJeff Kirsher u32 rx_ipv6_bytes_lo;
9419aebddd1SJeff Kirsher u32 rx_ipv6_bytes_hi;
9429aebddd1SJeff Kirsher u32 rx_nic_packets_lo;
9439aebddd1SJeff Kirsher u32 rx_nic_packets_hi;
9449aebddd1SJeff Kirsher u32 rx_tcp_packets_lo;
9459aebddd1SJeff Kirsher u32 rx_tcp_packets_hi;
9469aebddd1SJeff Kirsher u32 rx_iscsi_packets_lo;
9479aebddd1SJeff Kirsher u32 rx_iscsi_packets_hi;
9489aebddd1SJeff Kirsher u32 rx_management_packets_lo;
9499aebddd1SJeff Kirsher u32 rx_management_packets_hi;
9509aebddd1SJeff Kirsher u32 rx_switched_unicast_packets_lo;
9519aebddd1SJeff Kirsher u32 rx_switched_unicast_packets_hi;
9529aebddd1SJeff Kirsher u32 rx_switched_multicast_packets_lo;
9539aebddd1SJeff Kirsher u32 rx_switched_multicast_packets_hi;
9549aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets_lo;
9559aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets_hi;
9569aebddd1SJeff Kirsher u32 num_forwards_lo;
9579aebddd1SJeff Kirsher u32 num_forwards_hi;
9589aebddd1SJeff Kirsher u32 rx_fifo_overflow;
9599aebddd1SJeff Kirsher u32 rx_input_fifo_overflow;
9609aebddd1SJeff Kirsher u32 rx_drops_too_many_frags_lo;
9619aebddd1SJeff Kirsher u32 rx_drops_too_many_frags_hi;
9629aebddd1SJeff Kirsher u32 rx_drops_invalid_queue;
9639aebddd1SJeff Kirsher u32 rsvd_141;
9649aebddd1SJeff Kirsher u32 rx_drops_mtu_lo;
9659aebddd1SJeff Kirsher u32 rx_drops_mtu_hi;
9669aebddd1SJeff Kirsher u32 rx_packets_64_bytes_lo;
9679aebddd1SJeff Kirsher u32 rx_packets_64_bytes_hi;
9689aebddd1SJeff Kirsher u32 rx_packets_65_to_127_bytes_lo;
9699aebddd1SJeff Kirsher u32 rx_packets_65_to_127_bytes_hi;
9709aebddd1SJeff Kirsher u32 rx_packets_128_to_255_bytes_lo;
9719aebddd1SJeff Kirsher u32 rx_packets_128_to_255_bytes_hi;
9729aebddd1SJeff Kirsher u32 rx_packets_256_to_511_bytes_lo;
9739aebddd1SJeff Kirsher u32 rx_packets_256_to_511_bytes_hi;
9749aebddd1SJeff Kirsher u32 rx_packets_512_to_1023_bytes_lo;
9759aebddd1SJeff Kirsher u32 rx_packets_512_to_1023_bytes_hi;
9769aebddd1SJeff Kirsher u32 rx_packets_1024_to_1518_bytes_lo;
9779aebddd1SJeff Kirsher u32 rx_packets_1024_to_1518_bytes_hi;
9789aebddd1SJeff Kirsher u32 rx_packets_1519_to_2047_bytes_lo;
9799aebddd1SJeff Kirsher u32 rx_packets_1519_to_2047_bytes_hi;
9809aebddd1SJeff Kirsher u32 rx_packets_2048_to_4095_bytes_lo;
9819aebddd1SJeff Kirsher u32 rx_packets_2048_to_4095_bytes_hi;
9829aebddd1SJeff Kirsher u32 rx_packets_4096_to_8191_bytes_lo;
9839aebddd1SJeff Kirsher u32 rx_packets_4096_to_8191_bytes_hi;
9849aebddd1SJeff Kirsher u32 rx_packets_8192_to_9216_bytes_lo;
9859aebddd1SJeff Kirsher u32 rx_packets_8192_to_9216_bytes_hi;
9869aebddd1SJeff Kirsher };
9879aebddd1SJeff Kirsher
9889aebddd1SJeff Kirsher struct pport_stats_params {
9899aebddd1SJeff Kirsher u16 pport_num;
9909aebddd1SJeff Kirsher u8 rsvd;
9919aebddd1SJeff Kirsher u8 reset_stats;
9929aebddd1SJeff Kirsher };
9939aebddd1SJeff Kirsher
9949aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats {
9959aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
9969aebddd1SJeff Kirsher union {
9979aebddd1SJeff Kirsher struct pport_stats_params params;
9989aebddd1SJeff Kirsher u8 rsvd[sizeof(struct lancer_pport_stats)];
9999aebddd1SJeff Kirsher } cmd_params;
10009aebddd1SJeff Kirsher };
10019aebddd1SJeff Kirsher
10029aebddd1SJeff Kirsher struct lancer_cmd_resp_pport_stats {
10039aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
10049aebddd1SJeff Kirsher struct lancer_pport_stats pport_stats;
10059aebddd1SJeff Kirsher };
10069aebddd1SJeff Kirsher
10079aebddd1SJeff Kirsher static inline struct lancer_pport_stats*
pport_stats_from_cmd(struct be_adapter * adapter)10089aebddd1SJeff Kirsher pport_stats_from_cmd(struct be_adapter *adapter)
10099aebddd1SJeff Kirsher {
10109aebddd1SJeff Kirsher struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
10119aebddd1SJeff Kirsher return &cmd->pport_stats;
10129aebddd1SJeff Kirsher }
10139aebddd1SJeff Kirsher
10149aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs {
10159aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
10169aebddd1SJeff Kirsher u8 rsvd[8];
10179aebddd1SJeff Kirsher };
10189aebddd1SJeff Kirsher
10199aebddd1SJeff Kirsher struct be_cmd_resp_get_cntl_addnl_attribs {
10209aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
10219aebddd1SJeff Kirsher u16 ipl_file_number;
10229aebddd1SJeff Kirsher u8 ipl_file_version;
10239aebddd1SJeff Kirsher u8 rsvd0;
10249aebddd1SJeff Kirsher u8 on_die_temperature; /* in degrees centigrade*/
10259aebddd1SJeff Kirsher u8 rsvd1[3];
10269aebddd1SJeff Kirsher };
10279aebddd1SJeff Kirsher
10289aebddd1SJeff Kirsher struct be_cmd_req_vlan_config {
10299aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
10309aebddd1SJeff Kirsher u8 interface_id;
10319aebddd1SJeff Kirsher u8 promiscuous;
10329aebddd1SJeff Kirsher u8 untagged;
10339aebddd1SJeff Kirsher u8 num_vlan;
10349aebddd1SJeff Kirsher u16 normal_vlan[64];
10359aebddd1SJeff Kirsher } __packed;
10369aebddd1SJeff Kirsher
10379aebddd1SJeff Kirsher /******************* RX FILTER ******************************/
10389aebddd1SJeff Kirsher #define BE_MAX_MC 64 /* set mcast promisc if > 64 */
10399aebddd1SJeff Kirsher struct macaddr {
10409aebddd1SJeff Kirsher u8 byte[ETH_ALEN];
10419aebddd1SJeff Kirsher };
10429aebddd1SJeff Kirsher
10439aebddd1SJeff Kirsher struct be_cmd_req_rx_filter {
10449aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
10459aebddd1SJeff Kirsher u32 global_flags_mask;
10469aebddd1SJeff Kirsher u32 global_flags;
10479aebddd1SJeff Kirsher u32 if_flags_mask;
10489aebddd1SJeff Kirsher u32 if_flags;
10499aebddd1SJeff Kirsher u32 if_id;
10509aebddd1SJeff Kirsher u32 mcast_num;
10519aebddd1SJeff Kirsher struct macaddr mcast_mac[BE_MAX_MC];
10529aebddd1SJeff Kirsher };
10539aebddd1SJeff Kirsher
10549aebddd1SJeff Kirsher /******************** Link Status Query *******************/
10559aebddd1SJeff Kirsher struct be_cmd_req_link_status {
10569aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
10579aebddd1SJeff Kirsher u32 rsvd;
10589aebddd1SJeff Kirsher };
10599aebddd1SJeff Kirsher
10609aebddd1SJeff Kirsher enum {
10619aebddd1SJeff Kirsher PHY_LINK_DUPLEX_NONE = 0x0,
10629aebddd1SJeff Kirsher PHY_LINK_DUPLEX_HALF = 0x1,
10639aebddd1SJeff Kirsher PHY_LINK_DUPLEX_FULL = 0x2
10649aebddd1SJeff Kirsher };
10659aebddd1SJeff Kirsher
10669aebddd1SJeff Kirsher enum {
10679aebddd1SJeff Kirsher PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
10689aebddd1SJeff Kirsher PHY_LINK_SPEED_10MBPS = 0x1,
10699aebddd1SJeff Kirsher PHY_LINK_SPEED_100MBPS = 0x2,
10709aebddd1SJeff Kirsher PHY_LINK_SPEED_1GBPS = 0x3,
1071b971f847SVasundhara Volam PHY_LINK_SPEED_10GBPS = 0x4,
1072b971f847SVasundhara Volam PHY_LINK_SPEED_20GBPS = 0x5,
1073b971f847SVasundhara Volam PHY_LINK_SPEED_25GBPS = 0x6,
1074b971f847SVasundhara Volam PHY_LINK_SPEED_40GBPS = 0x7
10759aebddd1SJeff Kirsher };
10769aebddd1SJeff Kirsher
10779aebddd1SJeff Kirsher struct be_cmd_resp_link_status {
10789aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
10799aebddd1SJeff Kirsher u8 physical_port;
10809aebddd1SJeff Kirsher u8 mac_duplex;
10819aebddd1SJeff Kirsher u8 mac_speed;
10829aebddd1SJeff Kirsher u8 mac_fault;
10839aebddd1SJeff Kirsher u8 mgmt_mac_duplex;
10849aebddd1SJeff Kirsher u8 mgmt_mac_speed;
10859aebddd1SJeff Kirsher u16 link_speed;
1086b236916aSAjit Khaparde u8 logical_link_status;
1087b236916aSAjit Khaparde u8 rsvd1[3];
10889aebddd1SJeff Kirsher } __packed;
10899aebddd1SJeff Kirsher
10909aebddd1SJeff Kirsher /******************** Port Identification ***************************/
10919aebddd1SJeff Kirsher /* Identifies the type of port attached to NIC */
10929aebddd1SJeff Kirsher struct be_cmd_req_port_type {
10939aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
109472d7e2bfSSuresh Reddy __le32 page_num;
109572d7e2bfSSuresh Reddy __le32 port;
10969aebddd1SJeff Kirsher };
10979aebddd1SJeff Kirsher
10989aebddd1SJeff Kirsher enum {
10999aebddd1SJeff Kirsher TR_PAGE_A0 = 0xa0,
11009aebddd1SJeff Kirsher TR_PAGE_A2 = 0xa2
11019aebddd1SJeff Kirsher };
11029aebddd1SJeff Kirsher
11036809cee0SRavikumar Nelavelli /* From SFF-8436 QSFP+ spec */
11046809cee0SRavikumar Nelavelli #define QSFP_PLUS_CABLE_TYPE_OFFSET 0x83
11056809cee0SRavikumar Nelavelli #define QSFP_PLUS_CR4_CABLE 0x8
11066809cee0SRavikumar Nelavelli #define QSFP_PLUS_SR4_CABLE 0x4
11076809cee0SRavikumar Nelavelli #define QSFP_PLUS_LR4_CABLE 0x2
11086809cee0SRavikumar Nelavelli
1109e36edd9dSMark Leonard /* From SFF-8472 spec */
1110e36edd9dSMark Leonard #define SFP_PLUS_SFF_8472_COMP 0x5E
11116809cee0SRavikumar Nelavelli #define SFP_PLUS_CABLE_TYPE_OFFSET 0x8
11126809cee0SRavikumar Nelavelli #define SFP_PLUS_COPPER_CABLE 0x4
111321252377SVasundhara Volam #define SFP_VENDOR_NAME_OFFSET 0x14
111421252377SVasundhara Volam #define SFP_VENDOR_PN_OFFSET 0x28
1115e36edd9dSMark Leonard
1116e36edd9dSMark Leonard #define PAGE_DATA_LEN 256
11179aebddd1SJeff Kirsher struct be_cmd_resp_port_type {
11189aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
11199aebddd1SJeff Kirsher u32 page_num;
11209aebddd1SJeff Kirsher u32 port;
1121e36edd9dSMark Leonard u8 page_data[PAGE_DATA_LEN];
11229aebddd1SJeff Kirsher };
11239aebddd1SJeff Kirsher
11249aebddd1SJeff Kirsher /******************** Get FW Version *******************/
11259aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version {
11269aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
11279aebddd1SJeff Kirsher u8 rsvd0[FW_VER_LEN];
11289aebddd1SJeff Kirsher u8 rsvd1[FW_VER_LEN];
11299aebddd1SJeff Kirsher } __packed;
11309aebddd1SJeff Kirsher
11319aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version {
11329aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
11339aebddd1SJeff Kirsher u8 firmware_version_string[FW_VER_LEN];
11349aebddd1SJeff Kirsher u8 fw_on_flash_version_string[FW_VER_LEN];
11359aebddd1SJeff Kirsher } __packed;
11369aebddd1SJeff Kirsher
11379aebddd1SJeff Kirsher /******************** Set Flow Contrl *******************/
11389aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control {
11399aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
11409aebddd1SJeff Kirsher u16 tx_flow_control;
11419aebddd1SJeff Kirsher u16 rx_flow_control;
11429aebddd1SJeff Kirsher } __packed;
11439aebddd1SJeff Kirsher
11449aebddd1SJeff Kirsher /******************** Get Flow Contrl *******************/
11459aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control {
11469aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
11479aebddd1SJeff Kirsher u32 rsvd;
11489aebddd1SJeff Kirsher };
11499aebddd1SJeff Kirsher
11509aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control {
11519aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
11529aebddd1SJeff Kirsher u16 tx_flow_control;
11539aebddd1SJeff Kirsher u16 rx_flow_control;
11549aebddd1SJeff Kirsher } __packed;
11559aebddd1SJeff Kirsher
11569aebddd1SJeff Kirsher /******************** Modify EQ Delay *******************/
11572632bafdSSathya Perla struct be_set_eqd {
11589aebddd1SJeff Kirsher u32 eq_id;
11599aebddd1SJeff Kirsher u32 phase;
11609aebddd1SJeff Kirsher u32 delay_multiplier;
11612632bafdSSathya Perla };
11622632bafdSSathya Perla
11632632bafdSSathya Perla struct be_cmd_req_modify_eq_delay {
11642632bafdSSathya Perla struct be_cmd_req_hdr hdr;
11652632bafdSSathya Perla u32 num_eq;
11662632bafdSSathya Perla struct be_set_eqd set_eqd[MAX_EVT_QS];
11679aebddd1SJeff Kirsher } __packed;
11689aebddd1SJeff Kirsher
11699aebddd1SJeff Kirsher /******************** Get FW Config *******************/
1170752961a1SSathya Perla /* The HW can come up in either of the following multi-channel modes
1171752961a1SSathya Perla * based on the skew/IPL.
1172752961a1SSathya Perla */
1173045508a8SParav Pandit #define RDMA_ENABLED 0x4
117466064dbcSSuresh Reddy #define QNQ_MODE 0x400
1175752961a1SSathya Perla #define VNIC_MODE 0x20000
1176752961a1SSathya Perla #define UMC_ENABLED 0x1000000
11779aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg {
11789aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
11799aebddd1SJeff Kirsher u32 rsvd[31];
11809aebddd1SJeff Kirsher };
11819aebddd1SJeff Kirsher
11829aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg {
11839aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
11849aebddd1SJeff Kirsher u32 be_config_number;
11859aebddd1SJeff Kirsher u32 asic_revision;
11869aebddd1SJeff Kirsher u32 phys_port;
11879aebddd1SJeff Kirsher u32 function_mode;
11889aebddd1SJeff Kirsher u32 rsvd[26];
11899aebddd1SJeff Kirsher u32 function_caps;
11909aebddd1SJeff Kirsher };
11919aebddd1SJeff Kirsher
119273dea398SPadmanabh Ratnakar /******************** RSS Config ****************************************/
119373dea398SPadmanabh Ratnakar /* RSS type Input parameters used to compute RX hash
119473dea398SPadmanabh Ratnakar * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4
119573dea398SPadmanabh Ratnakar * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
119673dea398SPadmanabh Ratnakar * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6
119773dea398SPadmanabh Ratnakar * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
119873dea398SPadmanabh Ratnakar * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
119973dea398SPadmanabh Ratnakar * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
120073dea398SPadmanabh Ratnakar *
120173dea398SPadmanabh Ratnakar * When multiple RSS types are enabled, HW picks the best hash policy
120273dea398SPadmanabh Ratnakar * based on the type of the received packet.
120373dea398SPadmanabh Ratnakar */
12049aebddd1SJeff Kirsher #define RSS_ENABLE_NONE 0x0
12059aebddd1SJeff Kirsher #define RSS_ENABLE_IPV4 0x1
12069aebddd1SJeff Kirsher #define RSS_ENABLE_TCP_IPV4 0x2
12079aebddd1SJeff Kirsher #define RSS_ENABLE_IPV6 0x4
12089aebddd1SJeff Kirsher #define RSS_ENABLE_TCP_IPV6 0x8
1209d3bd3a5eSPadmanabh Ratnakar #define RSS_ENABLE_UDP_IPV4 0x10
1210d3bd3a5eSPadmanabh Ratnakar #define RSS_ENABLE_UDP_IPV6 0x20
12119aebddd1SJeff Kirsher
1212594ad54aSSuresh Reddy #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC)
1213594ad54aSSuresh Reddy #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1214594ad54aSSuresh Reddy
12159aebddd1SJeff Kirsher struct be_cmd_req_rss_config {
12169aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
12179aebddd1SJeff Kirsher u32 if_id;
12189aebddd1SJeff Kirsher u16 enable_rss;
12199aebddd1SJeff Kirsher u16 cpu_table_size_log2;
12209aebddd1SJeff Kirsher u32 hash[10];
12219aebddd1SJeff Kirsher u8 cpu_table[128];
12229aebddd1SJeff Kirsher u8 flush;
12239aebddd1SJeff Kirsher u8 rsvd0[3];
12249aebddd1SJeff Kirsher };
12259aebddd1SJeff Kirsher
12269aebddd1SJeff Kirsher /******************** Port Beacon ***************************/
12279aebddd1SJeff Kirsher
12289aebddd1SJeff Kirsher #define BEACON_STATE_ENABLED 0x1
12299aebddd1SJeff Kirsher #define BEACON_STATE_DISABLED 0x0
12309aebddd1SJeff Kirsher
12319aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon {
12329aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
12339aebddd1SJeff Kirsher u8 port_num;
12349aebddd1SJeff Kirsher u8 beacon_state;
12359aebddd1SJeff Kirsher u8 beacon_duration;
12369aebddd1SJeff Kirsher u8 status_duration;
12379aebddd1SJeff Kirsher } __packed;
12389aebddd1SJeff Kirsher
12399aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state {
12409aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
12419aebddd1SJeff Kirsher u8 port_num;
12429aebddd1SJeff Kirsher u8 rsvd0;
12439aebddd1SJeff Kirsher u16 rsvd1;
12449aebddd1SJeff Kirsher } __packed;
12459aebddd1SJeff Kirsher
12469aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state {
12479aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr;
12489aebddd1SJeff Kirsher u8 beacon_state;
12499aebddd1SJeff Kirsher u8 rsvd0[3];
12509aebddd1SJeff Kirsher } __packed;
12519aebddd1SJeff Kirsher
1252e02cfd96SVasundhara Volam /* Flashrom related descriptors */
1253e02cfd96SVasundhara Volam #define MAX_FLASH_COMP 32
1254e02cfd96SVasundhara Volam
12558836ff48SSuresh Reddy /* Optypes of each component in the UFI */
12568836ff48SSuresh Reddy enum {
12578836ff48SSuresh Reddy OPTYPE_ISCSI_ACTIVE = 0,
12588836ff48SSuresh Reddy OPTYPE_REDBOOT = 1,
12598836ff48SSuresh Reddy OPTYPE_BIOS = 2,
12608836ff48SSuresh Reddy OPTYPE_PXE_BIOS = 3,
12618836ff48SSuresh Reddy OPTYPE_OFFSET_SPECIFIED = 7,
12628836ff48SSuresh Reddy OPTYPE_FCOE_BIOS = 8,
12638836ff48SSuresh Reddy OPTYPE_ISCSI_BACKUP = 9,
12648836ff48SSuresh Reddy OPTYPE_FCOE_FW_ACTIVE = 10,
12658836ff48SSuresh Reddy OPTYPE_FCOE_FW_BACKUP = 11,
12668836ff48SSuresh Reddy OPTYPE_NCSI_FW = 13,
12678836ff48SSuresh Reddy OPTYPE_REDBOOT_DIR = 18,
12688836ff48SSuresh Reddy OPTYPE_REDBOOT_CONFIG = 19,
12698836ff48SSuresh Reddy OPTYPE_SH_PHY_FW = 21,
12708836ff48SSuresh Reddy OPTYPE_FLASHISM_JUMPVECTOR = 22,
12718836ff48SSuresh Reddy OPTYPE_UFI_DIR = 23,
12728836ff48SSuresh Reddy OPTYPE_PHY_FW = 99
12738836ff48SSuresh Reddy };
1274e02cfd96SVasundhara Volam
12758836ff48SSuresh Reddy /* Maximum sizes of components in BE2 FW UFI */
12768836ff48SSuresh Reddy enum {
12778836ff48SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE = 0x40000,
12788836ff48SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE = 0x40000,
12798836ff48SSuresh Reddy BE2_COMP_MAX_SIZE = 0x140000
12808836ff48SSuresh Reddy };
1281e02cfd96SVasundhara Volam
12828836ff48SSuresh Reddy /* Maximum sizes of components in BE3 FW UFI */
12838836ff48SSuresh Reddy enum {
12848836ff48SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE = 0x40000,
12858836ff48SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE = 0x40000,
12868836ff48SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE = 0x80000,
12878836ff48SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE = 0x100000,
12888836ff48SSuresh Reddy BE3_COMP_MAX_SIZE = 0x200000
12898836ff48SSuresh Reddy };
1290e02cfd96SVasundhara Volam
12918836ff48SSuresh Reddy /* Offsets for components in BE2 FW UFI */
12928836ff48SSuresh Reddy enum {
12938836ff48SSuresh Reddy BE2_REDBOOT_START = 0x8000,
12948836ff48SSuresh Reddy BE2_FCOE_BIOS_START = 0x80000,
12958836ff48SSuresh Reddy BE2_ISCSI_PRIMARY_IMAGE_START = 0x100000,
12968836ff48SSuresh Reddy BE2_ISCSI_BACKUP_IMAGE_START = 0x240000,
12978836ff48SSuresh Reddy BE2_FCOE_PRIMARY_IMAGE_START = 0x380000,
12988836ff48SSuresh Reddy BE2_FCOE_BACKUP_IMAGE_START = 0x4c0000,
12998836ff48SSuresh Reddy BE2_ISCSI_BIOS_START = 0x700000,
13008836ff48SSuresh Reddy BE2_PXE_BIOS_START = 0x780000
13018836ff48SSuresh Reddy };
1302e02cfd96SVasundhara Volam
13038836ff48SSuresh Reddy /* Offsets for components in BE3 FW UFI */
13048836ff48SSuresh Reddy enum {
13058836ff48SSuresh Reddy BE3_REDBOOT_START = 0x40000,
13068836ff48SSuresh Reddy BE3_PHY_FW_START = 0x140000,
13078836ff48SSuresh Reddy BE3_ISCSI_PRIMARY_IMAGE_START = 0x200000,
13088836ff48SSuresh Reddy BE3_ISCSI_BACKUP_IMAGE_START = 0x400000,
13098836ff48SSuresh Reddy BE3_FCOE_PRIMARY_IMAGE_START = 0x600000,
13108836ff48SSuresh Reddy BE3_FCOE_BACKUP_IMAGE_START = 0x800000,
13118836ff48SSuresh Reddy BE3_ISCSI_BIOS_START = 0xc00000,
13128836ff48SSuresh Reddy BE3_PXE_BIOS_START = 0xc80000,
13138836ff48SSuresh Reddy BE3_FCOE_BIOS_START = 0xd00000,
13148836ff48SSuresh Reddy BE3_NCSI_START = 0xf40000
13158836ff48SSuresh Reddy };
1316e02cfd96SVasundhara Volam
13178836ff48SSuresh Reddy /* Component entry types */
13188836ff48SSuresh Reddy enum {
13198836ff48SSuresh Reddy IMAGE_NCSI = 0x10,
13208836ff48SSuresh Reddy IMAGE_OPTION_ROM_PXE = 0x20,
13218836ff48SSuresh Reddy IMAGE_OPTION_ROM_FCOE = 0x21,
13228836ff48SSuresh Reddy IMAGE_OPTION_ROM_ISCSI = 0x22,
13238836ff48SSuresh Reddy IMAGE_FLASHISM_JUMPVECTOR = 0x30,
13248836ff48SSuresh Reddy IMAGE_FIRMWARE_ISCSI = 0xa0,
13258836ff48SSuresh Reddy IMAGE_FIRMWARE_FCOE = 0xa2,
13268836ff48SSuresh Reddy IMAGE_FIRMWARE_BACKUP_ISCSI = 0xb0,
13278836ff48SSuresh Reddy IMAGE_FIRMWARE_BACKUP_FCOE = 0xb2,
13288836ff48SSuresh Reddy IMAGE_FIRMWARE_PHY = 0xc0,
13298836ff48SSuresh Reddy IMAGE_REDBOOT_DIR = 0xd0,
13308836ff48SSuresh Reddy IMAGE_REDBOOT_CONFIG = 0xd1,
13318836ff48SSuresh Reddy IMAGE_UFI_DIR = 0xd2,
13328836ff48SSuresh Reddy IMAGE_BOOT_CODE = 0xe2
13338836ff48SSuresh Reddy };
1334e02cfd96SVasundhara Volam
1335e02cfd96SVasundhara Volam struct controller_id {
1336e02cfd96SVasundhara Volam u32 vendor;
1337e02cfd96SVasundhara Volam u32 device;
1338e02cfd96SVasundhara Volam u32 subvendor;
1339e02cfd96SVasundhara Volam u32 subdevice;
1340e02cfd96SVasundhara Volam };
1341e02cfd96SVasundhara Volam
1342e02cfd96SVasundhara Volam struct flash_comp {
1343e02cfd96SVasundhara Volam unsigned long offset;
1344e02cfd96SVasundhara Volam int optype;
1345e02cfd96SVasundhara Volam int size;
1346e02cfd96SVasundhara Volam int img_type;
1347e02cfd96SVasundhara Volam };
1348e02cfd96SVasundhara Volam
1349e02cfd96SVasundhara Volam struct image_hdr {
1350e02cfd96SVasundhara Volam u32 imageid;
1351e02cfd96SVasundhara Volam u32 imageoffset;
1352e02cfd96SVasundhara Volam u32 imagelength;
1353e02cfd96SVasundhara Volam u32 image_checksum;
1354e02cfd96SVasundhara Volam u8 image_version[32];
1355e02cfd96SVasundhara Volam };
1356e02cfd96SVasundhara Volam
1357e02cfd96SVasundhara Volam struct flash_file_hdr_g2 {
1358e02cfd96SVasundhara Volam u8 sign[32];
1359e02cfd96SVasundhara Volam u32 cksum;
1360e02cfd96SVasundhara Volam u32 antidote;
1361e02cfd96SVasundhara Volam struct controller_id cont_id;
1362e02cfd96SVasundhara Volam u32 file_len;
1363e02cfd96SVasundhara Volam u32 chunk_num;
1364e02cfd96SVasundhara Volam u32 total_chunks;
1365e02cfd96SVasundhara Volam u32 num_imgs;
1366e02cfd96SVasundhara Volam u8 build[24];
1367e02cfd96SVasundhara Volam };
1368e02cfd96SVasundhara Volam
13695d3acd0dSVasundhara Volam /* First letter of the build version of the image */
13705d3acd0dSVasundhara Volam #define BLD_STR_UFI_TYPE_BE2 '2'
13715d3acd0dSVasundhara Volam #define BLD_STR_UFI_TYPE_BE3 '3'
13725d3acd0dSVasundhara Volam #define BLD_STR_UFI_TYPE_SH '4'
13735d3acd0dSVasundhara Volam
1374e02cfd96SVasundhara Volam struct flash_file_hdr_g3 {
1375e02cfd96SVasundhara Volam u8 sign[52];
1376e02cfd96SVasundhara Volam u8 ufi_version[4];
1377e02cfd96SVasundhara Volam u32 file_len;
1378e02cfd96SVasundhara Volam u32 cksum;
1379e02cfd96SVasundhara Volam u32 antidote;
1380e02cfd96SVasundhara Volam u32 num_imgs;
1381e02cfd96SVasundhara Volam u8 build[24];
1382e02cfd96SVasundhara Volam u8 asic_type_rev;
1383e02cfd96SVasundhara Volam u8 rsvd[31];
1384e02cfd96SVasundhara Volam };
1385e02cfd96SVasundhara Volam
1386e02cfd96SVasundhara Volam struct flash_section_hdr {
1387e02cfd96SVasundhara Volam u32 format_rev;
1388e02cfd96SVasundhara Volam u32 cksum;
1389e02cfd96SVasundhara Volam u32 antidote;
1390e02cfd96SVasundhara Volam u32 num_images;
1391e02cfd96SVasundhara Volam u8 id_string[128];
1392e02cfd96SVasundhara Volam u32 rsvd[4];
1393e02cfd96SVasundhara Volam } __packed;
1394e02cfd96SVasundhara Volam
1395e02cfd96SVasundhara Volam struct flash_section_hdr_g2 {
1396e02cfd96SVasundhara Volam u32 format_rev;
1397e02cfd96SVasundhara Volam u32 cksum;
1398e02cfd96SVasundhara Volam u32 antidote;
1399e02cfd96SVasundhara Volam u32 build_num;
1400e02cfd96SVasundhara Volam u8 id_string[128];
1401e02cfd96SVasundhara Volam u32 rsvd[8];
1402e02cfd96SVasundhara Volam } __packed;
1403e02cfd96SVasundhara Volam
1404e02cfd96SVasundhara Volam struct flash_section_entry {
1405e02cfd96SVasundhara Volam u32 type;
1406e02cfd96SVasundhara Volam u32 offset;
1407e02cfd96SVasundhara Volam u32 pad_size;
1408e02cfd96SVasundhara Volam u32 image_size;
1409e02cfd96SVasundhara Volam u32 cksum;
1410e02cfd96SVasundhara Volam u32 entry_point;
1411e02cfd96SVasundhara Volam u16 optype;
1412e02cfd96SVasundhara Volam u16 rsvd0;
1413e02cfd96SVasundhara Volam u32 rsvd1;
1414e02cfd96SVasundhara Volam u8 ver_data[32];
1415e02cfd96SVasundhara Volam } __packed;
1416e02cfd96SVasundhara Volam
1417e02cfd96SVasundhara Volam struct flash_section_info {
1418e02cfd96SVasundhara Volam u8 cookie[32];
1419e02cfd96SVasundhara Volam struct flash_section_hdr fsec_hdr;
1420e02cfd96SVasundhara Volam struct flash_section_entry fsec_entry[32];
1421e02cfd96SVasundhara Volam } __packed;
1422e02cfd96SVasundhara Volam
1423e02cfd96SVasundhara Volam struct flash_section_info_g2 {
1424e02cfd96SVasundhara Volam u8 cookie[32];
1425e02cfd96SVasundhara Volam struct flash_section_hdr_g2 fsec_hdr;
1426e02cfd96SVasundhara Volam struct flash_section_entry fsec_entry[32];
1427e02cfd96SVasundhara Volam } __packed;
1428e02cfd96SVasundhara Volam
14299aebddd1SJeff Kirsher /****************** Firmware Flash ******************/
1430e02cfd96SVasundhara Volam #define FLASHROM_OPER_FLASH 1
1431e02cfd96SVasundhara Volam #define FLASHROM_OPER_SAVE 2
1432e02cfd96SVasundhara Volam #define FLASHROM_OPER_REPORT 4
1433e02cfd96SVasundhara Volam #define FLASHROM_OPER_PHY_FLASH 9
1434e02cfd96SVasundhara Volam #define FLASHROM_OPER_PHY_SAVE 10
1435e02cfd96SVasundhara Volam
14369aebddd1SJeff Kirsher struct flashrom_params {
14379aebddd1SJeff Kirsher u32 op_code;
14389aebddd1SJeff Kirsher u32 op_type;
14399aebddd1SJeff Kirsher u32 data_buf_size;
14409aebddd1SJeff Kirsher u32 offset;
14419aebddd1SJeff Kirsher };
14429aebddd1SJeff Kirsher
14439aebddd1SJeff Kirsher struct be_cmd_write_flashrom {
14449aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
14459aebddd1SJeff Kirsher struct flashrom_params params;
1446be716446SPadmanabh Ratnakar u8 data_buf[32768];
1447be716446SPadmanabh Ratnakar u8 rsvd[4];
1448be716446SPadmanabh Ratnakar } __packed;
14499aebddd1SJeff Kirsher
1450be716446SPadmanabh Ratnakar /* cmd to read flash crc */
1451be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc {
1452be716446SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1453be716446SPadmanabh Ratnakar struct flashrom_params params;
1454be716446SPadmanabh Ratnakar u8 crc[4];
1455be716446SPadmanabh Ratnakar u8 rsvd[4];
145696c9b2e4SVasundhara Volam } __packed;
145796c9b2e4SVasundhara Volam
14589aebddd1SJeff Kirsher /**************** Lancer Firmware Flash ************/
1459a23113b5SSuresh Reddy #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
1460a23113b5SSuresh Reddy #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
1461a23113b5SSuresh Reddy
14629aebddd1SJeff Kirsher struct amap_lancer_write_obj_context {
14639aebddd1SJeff Kirsher u8 write_length[24];
14649aebddd1SJeff Kirsher u8 reserved1[7];
14659aebddd1SJeff Kirsher u8 eof;
14669aebddd1SJeff Kirsher } __packed;
14679aebddd1SJeff Kirsher
14689aebddd1SJeff Kirsher struct lancer_cmd_req_write_object {
14699aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
14709aebddd1SJeff Kirsher u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
14719aebddd1SJeff Kirsher u32 write_offset;
14729aebddd1SJeff Kirsher u8 object_name[104];
14739aebddd1SJeff Kirsher u32 descriptor_count;
14749aebddd1SJeff Kirsher u32 buf_len;
14759aebddd1SJeff Kirsher u32 addr_low;
14769aebddd1SJeff Kirsher u32 addr_high;
14779aebddd1SJeff Kirsher };
14789aebddd1SJeff Kirsher
1479f67ef7baSPadmanabh Ratnakar #define LANCER_NO_RESET_NEEDED 0x00
1480f67ef7baSPadmanabh Ratnakar #define LANCER_FW_RESET_NEEDED 0x02
14819aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object {
14829aebddd1SJeff Kirsher u8 opcode;
14839aebddd1SJeff Kirsher u8 subsystem;
14849aebddd1SJeff Kirsher u8 rsvd1[2];
14859aebddd1SJeff Kirsher u8 status;
14869aebddd1SJeff Kirsher u8 additional_status;
14879aebddd1SJeff Kirsher u8 rsvd2[2];
14889aebddd1SJeff Kirsher u32 resp_len;
14899aebddd1SJeff Kirsher u32 actual_resp_len;
14909aebddd1SJeff Kirsher u32 actual_write_len;
1491f67ef7baSPadmanabh Ratnakar u8 change_status;
1492f67ef7baSPadmanabh Ratnakar u8 rsvd3[3];
14939aebddd1SJeff Kirsher };
14949aebddd1SJeff Kirsher
1495de49bd5aSPadmanabh Ratnakar /************************ Lancer Read FW info **************/
1496de49bd5aSPadmanabh Ratnakar #define LANCER_READ_FILE_CHUNK (32*1024)
1497de49bd5aSPadmanabh Ratnakar #define LANCER_READ_FILE_EOF_MASK 0x80000000
1498de49bd5aSPadmanabh Ratnakar
1499de49bd5aSPadmanabh Ratnakar #define LANCER_FW_DUMP_FILE "/dbg/dump.bin"
1500af5875bdSPadmanabh Ratnakar #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd"
1501af5875bdSPadmanabh Ratnakar #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd"
1502de49bd5aSPadmanabh Ratnakar
1503de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object {
1504de49bd5aSPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1505de49bd5aSPadmanabh Ratnakar u32 desired_read_len;
1506de49bd5aSPadmanabh Ratnakar u32 read_offset;
1507de49bd5aSPadmanabh Ratnakar u8 object_name[104];
1508de49bd5aSPadmanabh Ratnakar u32 descriptor_count;
1509de49bd5aSPadmanabh Ratnakar u32 buf_len;
1510de49bd5aSPadmanabh Ratnakar u32 addr_low;
1511de49bd5aSPadmanabh Ratnakar u32 addr_high;
1512de49bd5aSPadmanabh Ratnakar };
1513de49bd5aSPadmanabh Ratnakar
1514de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object {
1515de49bd5aSPadmanabh Ratnakar u8 opcode;
1516de49bd5aSPadmanabh Ratnakar u8 subsystem;
1517de49bd5aSPadmanabh Ratnakar u8 rsvd1[2];
1518de49bd5aSPadmanabh Ratnakar u8 status;
1519de49bd5aSPadmanabh Ratnakar u8 additional_status;
1520de49bd5aSPadmanabh Ratnakar u8 rsvd2[2];
1521de49bd5aSPadmanabh Ratnakar u32 resp_len;
1522de49bd5aSPadmanabh Ratnakar u32 actual_resp_len;
1523de49bd5aSPadmanabh Ratnakar u32 actual_read_len;
1524de49bd5aSPadmanabh Ratnakar u32 eof;
1525de49bd5aSPadmanabh Ratnakar };
1526de49bd5aSPadmanabh Ratnakar
1527f0613380SKalesh AP struct lancer_cmd_req_delete_object {
1528f0613380SKalesh AP struct be_cmd_req_hdr hdr;
1529f0613380SKalesh AP u32 rsvd1;
1530f0613380SKalesh AP u32 rsvd2;
1531f0613380SKalesh AP u8 object_name[104];
1532f0613380SKalesh AP };
1533f0613380SKalesh AP
15349aebddd1SJeff Kirsher /************************ WOL *******************************/
15359aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config{
15369aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
15379aebddd1SJeff Kirsher u32 rsvd0[145];
15389aebddd1SJeff Kirsher u8 magic_mac[6];
15399aebddd1SJeff Kirsher u8 rsvd2[2];
15409aebddd1SJeff Kirsher } __packed;
15419aebddd1SJeff Kirsher
15424762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 {
15434762f6ceSAjit Khaparde struct be_cmd_req_hdr hdr;
15444762f6ceSAjit Khaparde u8 rsvd0[2];
15454762f6ceSAjit Khaparde u8 query_options;
15464762f6ceSAjit Khaparde u8 rsvd1[5];
15474762f6ceSAjit Khaparde u32 rsvd2[288];
15484762f6ceSAjit Khaparde u8 magic_mac[6];
15494762f6ceSAjit Khaparde u8 rsvd3[22];
15504762f6ceSAjit Khaparde } __packed;
15514762f6ceSAjit Khaparde
15524762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 {
15534762f6ceSAjit Khaparde struct be_cmd_resp_hdr hdr;
15544762f6ceSAjit Khaparde u8 rsvd0[2];
15554762f6ceSAjit Khaparde u8 wol_settings;
15564762f6ceSAjit Khaparde u8 rsvd1[5];
155745f13df7SSriharsha Basavapatna u32 rsvd2[288];
155845f13df7SSriharsha Basavapatna u8 magic_mac[6];
155945f13df7SSriharsha Basavapatna u8 rsvd3[22];
15604762f6ceSAjit Khaparde } __packed;
15614762f6ceSAjit Khaparde
15624762f6ceSAjit Khaparde #define BE_GET_WOL_CAP 2
15634762f6ceSAjit Khaparde
15644762f6ceSAjit Khaparde #define BE_WOL_CAP 0x1
15654762f6ceSAjit Khaparde #define BE_PME_D0_CAP 0x8
15664762f6ceSAjit Khaparde #define BE_PME_D1_CAP 0x10
15674762f6ceSAjit Khaparde #define BE_PME_D2_CAP 0x20
15684762f6ceSAjit Khaparde #define BE_PME_D3HOT_CAP 0x40
15694762f6ceSAjit Khaparde #define BE_PME_D3COLD_CAP 0x80
15704762f6ceSAjit Khaparde
15719aebddd1SJeff Kirsher /********************** LoopBack test *********************/
15729c855975SSuresh Reddy #define SET_LB_MODE_TIMEOUT 12000
15739c855975SSuresh Reddy
15749aebddd1SJeff Kirsher struct be_cmd_req_loopback_test {
15759aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
15769aebddd1SJeff Kirsher u32 loopback_type;
15779aebddd1SJeff Kirsher u32 num_pkts;
15789aebddd1SJeff Kirsher u64 pattern;
15799aebddd1SJeff Kirsher u32 src_port;
15809aebddd1SJeff Kirsher u32 dest_port;
15819aebddd1SJeff Kirsher u32 pkt_size;
15829aebddd1SJeff Kirsher };
15839aebddd1SJeff Kirsher
15849aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test {
15859aebddd1SJeff Kirsher struct be_cmd_resp_hdr resp_hdr;
15869aebddd1SJeff Kirsher u32 status;
15879aebddd1SJeff Kirsher u32 num_txfer;
15889aebddd1SJeff Kirsher u32 num_rx;
15899aebddd1SJeff Kirsher u32 miscomp_off;
15909aebddd1SJeff Kirsher u32 ticks_compl;
15919aebddd1SJeff Kirsher };
15929aebddd1SJeff Kirsher
15939aebddd1SJeff Kirsher struct be_cmd_req_set_lmode {
15949aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
15959aebddd1SJeff Kirsher u8 src_port;
15969aebddd1SJeff Kirsher u8 dest_port;
15979aebddd1SJeff Kirsher u8 loopback_type;
15989aebddd1SJeff Kirsher u8 loopback_state;
15999aebddd1SJeff Kirsher };
16009aebddd1SJeff Kirsher
16019aebddd1SJeff Kirsher /********************** DDR DMA test *********************/
16029aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test {
16039aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
16049aebddd1SJeff Kirsher u64 pattern;
16059aebddd1SJeff Kirsher u32 byte_count;
16069aebddd1SJeff Kirsher u32 rsvd0;
16079aebddd1SJeff Kirsher u8 snd_buff[4096];
16089aebddd1SJeff Kirsher u8 rsvd1[4096];
16099aebddd1SJeff Kirsher };
16109aebddd1SJeff Kirsher
16119aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test {
16129aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
16139aebddd1SJeff Kirsher u64 pattern;
16149aebddd1SJeff Kirsher u32 byte_cnt;
16159aebddd1SJeff Kirsher u32 snd_err;
16169aebddd1SJeff Kirsher u8 rsvd0[4096];
16179aebddd1SJeff Kirsher u8 rcv_buff[4096];
16189aebddd1SJeff Kirsher };
16199aebddd1SJeff Kirsher
16209aebddd1SJeff Kirsher /*********************** SEEPROM Read ***********************/
16219aebddd1SJeff Kirsher
16229aebddd1SJeff Kirsher #define BE_READ_SEEPROM_LEN 1024
16239aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read {
16249aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
16259aebddd1SJeff Kirsher u8 rsvd0[BE_READ_SEEPROM_LEN];
16269aebddd1SJeff Kirsher };
16279aebddd1SJeff Kirsher
16289aebddd1SJeff Kirsher struct be_cmd_resp_seeprom_read {
16299aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
16309aebddd1SJeff Kirsher u8 seeprom_data[BE_READ_SEEPROM_LEN];
16319aebddd1SJeff Kirsher };
16329aebddd1SJeff Kirsher
16339aebddd1SJeff Kirsher enum {
16349aebddd1SJeff Kirsher PHY_TYPE_CX4_10GB = 0,
16359aebddd1SJeff Kirsher PHY_TYPE_XFP_10GB,
16369aebddd1SJeff Kirsher PHY_TYPE_SFP_1GB,
16379aebddd1SJeff Kirsher PHY_TYPE_SFP_PLUS_10GB,
16389aebddd1SJeff Kirsher PHY_TYPE_KR_10GB,
16399aebddd1SJeff Kirsher PHY_TYPE_KX4_10GB,
16409aebddd1SJeff Kirsher PHY_TYPE_BASET_10GB,
16419aebddd1SJeff Kirsher PHY_TYPE_BASET_1GB,
164242f11cf2SAjit Khaparde PHY_TYPE_BASEX_1GB,
164342f11cf2SAjit Khaparde PHY_TYPE_SGMII,
16446809cee0SRavikumar Nelavelli PHY_TYPE_QSFP,
16456809cee0SRavikumar Nelavelli PHY_TYPE_KR4_40GB,
16466809cee0SRavikumar Nelavelli PHY_TYPE_KR2_20GB,
1647e02cfd96SVasundhara Volam PHY_TYPE_TN_8022,
16489aebddd1SJeff Kirsher PHY_TYPE_DISABLED = 255
16499aebddd1SJeff Kirsher };
16509aebddd1SJeff Kirsher
165142f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_NONE 0
165242f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_10MBPS 1
165342f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_100MBPS 2
165442f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_1GBPS 4
165542f11cf2SAjit Khaparde #define BE_SUPPORTED_SPEED_10GBPS 8
1656d6b7a9b7SVasundhara Volam #define BE_SUPPORTED_SPEED_20GBPS 0x10
16576809cee0SRavikumar Nelavelli #define BE_SUPPORTED_SPEED_40GBPS 0x20
165842f11cf2SAjit Khaparde
165942f11cf2SAjit Khaparde #define BE_AN_EN 0x2
166042f11cf2SAjit Khaparde #define BE_PAUSE_SYM_EN 0x80
166142f11cf2SAjit Khaparde
166242f11cf2SAjit Khaparde /* MAC speed valid values */
166342f11cf2SAjit Khaparde #define SPEED_DEFAULT 0x0
166442f11cf2SAjit Khaparde #define SPEED_FORCED_10GB 0x1
166542f11cf2SAjit Khaparde #define SPEED_FORCED_1GB 0x2
166642f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB 0x3
166742f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB 0x4
166842f11cf2SAjit Khaparde #define SPEED_AUTONEG_100MB 0x5
166942f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB_1GB 0x6
167042f11cf2SAjit Khaparde #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
167142f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB_100MB 0x8
167242f11cf2SAjit Khaparde #define SPEED_AUTONEG_10MB 0x9
167342f11cf2SAjit Khaparde #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
167442f11cf2SAjit Khaparde #define SPEED_AUTONEG_100MB_10MB 0xb
167542f11cf2SAjit Khaparde #define SPEED_FORCED_100MB 0xc
167642f11cf2SAjit Khaparde #define SPEED_FORCED_10MB 0xd
167742f11cf2SAjit Khaparde
16789aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info {
16799aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
16809aebddd1SJeff Kirsher u8 rsvd0[24];
16819aebddd1SJeff Kirsher };
16829aebddd1SJeff Kirsher
16839aebddd1SJeff Kirsher struct be_phy_info {
16849aebddd1SJeff Kirsher u16 phy_type;
16859aebddd1SJeff Kirsher u16 interface_type;
16869aebddd1SJeff Kirsher u32 misc_params;
168742f11cf2SAjit Khaparde u16 ext_phy_details;
168842f11cf2SAjit Khaparde u16 rsvd;
168942f11cf2SAjit Khaparde u16 auto_speeds_supported;
169042f11cf2SAjit Khaparde u16 fixed_speeds_supported;
169142f11cf2SAjit Khaparde u32 future_use[2];
16929aebddd1SJeff Kirsher };
16939aebddd1SJeff Kirsher
16949aebddd1SJeff Kirsher struct be_cmd_resp_get_phy_info {
16959aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
16969aebddd1SJeff Kirsher struct be_phy_info phy_info;
16979aebddd1SJeff Kirsher };
16989aebddd1SJeff Kirsher
16999aebddd1SJeff Kirsher /*********************** Set QOS ***********************/
17009aebddd1SJeff Kirsher
17019aebddd1SJeff Kirsher #define BE_QOS_BITS_NIC 1
17029aebddd1SJeff Kirsher
17039aebddd1SJeff Kirsher struct be_cmd_req_set_qos {
17049aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
17059aebddd1SJeff Kirsher u32 valid_bits;
17069aebddd1SJeff Kirsher u32 max_bps_nic;
17079aebddd1SJeff Kirsher u32 rsvd[7];
17089aebddd1SJeff Kirsher };
17099aebddd1SJeff Kirsher
17109aebddd1SJeff Kirsher /*********************** Controller Attributes ***********************/
1711e02cfd96SVasundhara Volam struct mgmt_hba_attribs {
1712e02cfd96SVasundhara Volam u32 rsvd0[24];
1713e02cfd96SVasundhara Volam u8 controller_model_number[32];
1714a155a5dbSSriharsha Basavapatna u32 rsvd1[16];
1715a155a5dbSSriharsha Basavapatna u32 controller_serial_number[8];
1716a155a5dbSSriharsha Basavapatna u32 rsvd2[55];
1717a155a5dbSSriharsha Basavapatna u8 rsvd3[3];
1718e02cfd96SVasundhara Volam u8 phy_port;
17196ee080bbSSriharsha Basavapatna u32 rsvd4[15];
17206ee080bbSSriharsha Basavapatna u8 rsvd5[2];
17216ee080bbSSriharsha Basavapatna u8 pci_funcnum;
17226ee080bbSSriharsha Basavapatna u8 rsvd6;
17236ee080bbSSriharsha Basavapatna u32 rsvd7[6];
1724e02cfd96SVasundhara Volam } __packed;
1725e02cfd96SVasundhara Volam
1726e02cfd96SVasundhara Volam struct mgmt_controller_attrib {
1727e02cfd96SVasundhara Volam struct mgmt_hba_attribs hba_attribs;
1728980df249SSuresh Reddy u32 rsvd0[10];
1729e02cfd96SVasundhara Volam } __packed;
1730e02cfd96SVasundhara Volam
17319aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs {
17329aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
17339aebddd1SJeff Kirsher };
17349aebddd1SJeff Kirsher
17359aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs {
17369aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
17379aebddd1SJeff Kirsher struct mgmt_controller_attrib attribs;
17389aebddd1SJeff Kirsher };
17399aebddd1SJeff Kirsher
17409aebddd1SJeff Kirsher /*********************** Set driver function ***********************/
17419aebddd1SJeff Kirsher #define CAPABILITY_SW_TIMESTAMPS 2
17429aebddd1SJeff Kirsher #define CAPABILITY_BE3_NATIVE_ERX_API 4
17439aebddd1SJeff Kirsher
17449aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap {
17459aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
17469aebddd1SJeff Kirsher u32 valid_cap_flags;
17479aebddd1SJeff Kirsher u32 cap_flags;
17489aebddd1SJeff Kirsher u8 rsvd[212];
17499aebddd1SJeff Kirsher };
17509aebddd1SJeff Kirsher
17519aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap {
17529aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
17539aebddd1SJeff Kirsher u32 valid_cap_flags;
17549aebddd1SJeff Kirsher u32 cap_flags;
17559aebddd1SJeff Kirsher u8 rsvd[212];
17569aebddd1SJeff Kirsher };
17579aebddd1SJeff Kirsher
1758f25b119cSPadmanabh Ratnakar /*********************** Function Privileges ***********************/
1759f25b119cSPadmanabh Ratnakar enum {
1760f25b119cSPadmanabh Ratnakar BE_PRIV_DEFAULT = 0x1,
1761f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY = 0x2,
1762f25b119cSPadmanabh Ratnakar BE_PRIV_LNKSTATS = 0x4,
1763f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT = 0x8,
1764f25b119cSPadmanabh Ratnakar BE_PRIV_LNKDIAG = 0x10,
1765f25b119cSPadmanabh Ratnakar BE_PRIV_UTILQUERY = 0x20,
1766f25b119cSPadmanabh Ratnakar BE_PRIV_FILTMGMT = 0x40,
1767f25b119cSPadmanabh Ratnakar BE_PRIV_IFACEMGMT = 0x80,
1768f25b119cSPadmanabh Ratnakar BE_PRIV_VHADM = 0x100,
1769f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG = 0x200,
1770f25b119cSPadmanabh Ratnakar BE_PRIV_DEVSEC = 0x400
1771f25b119cSPadmanabh Ratnakar };
1772f25b119cSPadmanabh Ratnakar #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1773f25b119cSPadmanabh Ratnakar BE_PRIV_DEVSEC)
1774f25b119cSPadmanabh Ratnakar #define MIN_PRIVILEGES BE_PRIV_DEFAULT
1775f25b119cSPadmanabh Ratnakar
1776f25b119cSPadmanabh Ratnakar struct be_cmd_priv_map {
1777f25b119cSPadmanabh Ratnakar u8 opcode;
1778f25b119cSPadmanabh Ratnakar u8 subsystem;
1779f25b119cSPadmanabh Ratnakar u32 priv_mask;
1780f25b119cSPadmanabh Ratnakar };
1781f25b119cSPadmanabh Ratnakar
1782f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges {
1783f25b119cSPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1784f25b119cSPadmanabh Ratnakar u32 rsvd;
1785f25b119cSPadmanabh Ratnakar };
1786f25b119cSPadmanabh Ratnakar
1787f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges {
1788f25b119cSPadmanabh Ratnakar struct be_cmd_resp_hdr hdr;
1789f25b119cSPadmanabh Ratnakar u32 privilege_mask;
1790f25b119cSPadmanabh Ratnakar };
1791f25b119cSPadmanabh Ratnakar
179204a06028SSathya Perla struct be_cmd_req_set_fn_privileges {
179304a06028SSathya Perla struct be_cmd_req_hdr hdr;
179404a06028SSathya Perla u32 privileges; /* Used by BE3, SH-R */
179504a06028SSathya Perla u32 privileges_lancer; /* Used by Lancer */
179604a06028SSathya Perla };
1797f25b119cSPadmanabh Ratnakar
1798590c391dSPadmanabh Ratnakar /******************** GET/SET_MACLIST **************************/
1799590c391dSPadmanabh Ratnakar #define BE_MAX_MAC 64
1800590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list {
1801590c391dSPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1802e5e1ee89SPadmanabh Ratnakar u8 mac_type;
1803e5e1ee89SPadmanabh Ratnakar u8 perm_override;
1804e5e1ee89SPadmanabh Ratnakar u16 iface_id;
1805e5e1ee89SPadmanabh Ratnakar u32 mac_id;
1806e5e1ee89SPadmanabh Ratnakar u32 rsvd[3];
1807e5e1ee89SPadmanabh Ratnakar } __packed;
1808e5e1ee89SPadmanabh Ratnakar
1809e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr {
1810e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size;
1811e5e1ee89SPadmanabh Ratnakar union {
1812e5e1ee89SPadmanabh Ratnakar u8 macaddr[6];
1813e5e1ee89SPadmanabh Ratnakar struct {
1814e5e1ee89SPadmanabh Ratnakar u8 rsvd[2];
1815e5e1ee89SPadmanabh Ratnakar u32 mac_id;
1816e5e1ee89SPadmanabh Ratnakar } __packed s_mac_id;
1817e5e1ee89SPadmanabh Ratnakar } __packed mac_addr_id;
1818590c391dSPadmanabh Ratnakar } __packed;
1819590c391dSPadmanabh Ratnakar
1820590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list {
1821590c391dSPadmanabh Ratnakar struct be_cmd_resp_hdr hdr;
1822e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr fd_macaddr; /* Factory default mac */
1823e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr macid_macaddr; /* soft mac */
1824e5e1ee89SPadmanabh Ratnakar u8 true_mac_count;
1825e5e1ee89SPadmanabh Ratnakar u8 pseudo_mac_count;
1826e5e1ee89SPadmanabh Ratnakar u8 mac_list_size;
1827e5e1ee89SPadmanabh Ratnakar u8 rsvd;
1828e5e1ee89SPadmanabh Ratnakar /* perm override mac */
1829e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1830590c391dSPadmanabh Ratnakar } __packed;
1831590c391dSPadmanabh Ratnakar
1832590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list {
1833590c391dSPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1834590c391dSPadmanabh Ratnakar u8 mac_count;
1835590c391dSPadmanabh Ratnakar u8 rsvd1;
1836590c391dSPadmanabh Ratnakar u16 rsvd2;
1837590c391dSPadmanabh Ratnakar struct macaddr mac[BE_MAX_MAC];
1838590c391dSPadmanabh Ratnakar } __packed;
1839590c391dSPadmanabh Ratnakar
1840f1f3ee1bSAjit Khaparde /*********************** HSW Config ***********************/
1841a77dcb8cSAjit Khaparde #define PORT_FWD_TYPE_VEPA 0x3
1842a77dcb8cSAjit Khaparde #define PORT_FWD_TYPE_VEB 0x2
1843ff9ed19dSKalesh Purayil #define PORT_FWD_TYPE_PASSTHRU 0x1
1844a77dcb8cSAjit Khaparde
1845e7bcbd7bSKalesh AP #define ENABLE_MAC_SPOOFCHK 0x2
1846e7bcbd7bSKalesh AP #define DISABLE_MAC_SPOOFCHK 0x3
1847e7bcbd7bSKalesh AP
1848f1f3ee1bSAjit Khaparde struct amap_set_hsw_context {
1849f1f3ee1bSAjit Khaparde u8 interface_id[16];
1850e7bcbd7bSKalesh AP u8 rsvd0[8];
1851e7bcbd7bSKalesh AP u8 mac_spoofchk[2];
1852e7bcbd7bSKalesh AP u8 rsvd1[4];
1853f1f3ee1bSAjit Khaparde u8 pvid_valid;
1854a77dcb8cSAjit Khaparde u8 pport;
1855e7bcbd7bSKalesh AP u8 rsvd2[6];
1856a77dcb8cSAjit Khaparde u8 port_fwd_type[3];
1857e7bcbd7bSKalesh AP u8 rsvd3[5];
1858e7bcbd7bSKalesh AP u8 vlan_spoofchk[2];
1859f1f3ee1bSAjit Khaparde u8 pvid[16];
1860f1f3ee1bSAjit Khaparde u8 rsvd4[32];
1861f1f3ee1bSAjit Khaparde u8 rsvd5[32];
1862e7bcbd7bSKalesh AP u8 rsvd6[32];
1863f1f3ee1bSAjit Khaparde } __packed;
1864f1f3ee1bSAjit Khaparde
1865f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config {
1866f1f3ee1bSAjit Khaparde struct be_cmd_req_hdr hdr;
1867f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_set_hsw_context) / 8];
1868f1f3ee1bSAjit Khaparde } __packed;
1869f1f3ee1bSAjit Khaparde
1870f1f3ee1bSAjit Khaparde struct amap_get_hsw_req_context {
1871f1f3ee1bSAjit Khaparde u8 interface_id[16];
1872f1f3ee1bSAjit Khaparde u8 rsvd0[14];
1873f1f3ee1bSAjit Khaparde u8 pvid_valid;
1874f1f3ee1bSAjit Khaparde u8 pport;
1875f1f3ee1bSAjit Khaparde } __packed;
1876f1f3ee1bSAjit Khaparde
1877f1f3ee1bSAjit Khaparde struct amap_get_hsw_resp_context {
1878a77dcb8cSAjit Khaparde u8 rsvd0[6];
1879a77dcb8cSAjit Khaparde u8 port_fwd_type[3];
1880e7bcbd7bSKalesh AP u8 rsvd1[5];
1881e7bcbd7bSKalesh AP u8 spoofchk;
1882e7bcbd7bSKalesh AP u8 rsvd2;
1883f1f3ee1bSAjit Khaparde u8 pvid[16];
1884f1f3ee1bSAjit Khaparde u8 rsvd3[32];
1885f1f3ee1bSAjit Khaparde u8 rsvd4[32];
1886e7bcbd7bSKalesh AP u8 rsvd5[32];
1887f1f3ee1bSAjit Khaparde } __packed;
1888f1f3ee1bSAjit Khaparde
1889f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config {
1890f1f3ee1bSAjit Khaparde struct be_cmd_req_hdr hdr;
1891f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1892f1f3ee1bSAjit Khaparde } __packed;
1893f1f3ee1bSAjit Khaparde
1894f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config {
1895f1f3ee1bSAjit Khaparde struct be_cmd_resp_hdr hdr;
1896f1f3ee1bSAjit Khaparde u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1897f1f3ee1bSAjit Khaparde u32 rsvd;
1898f1f3ee1bSAjit Khaparde };
1899f1f3ee1bSAjit Khaparde
1900b4e32a71SPadmanabh Ratnakar /******************* get port names ***************/
1901b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name {
1902b4e32a71SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1903b4e32a71SPadmanabh Ratnakar u32 rsvd0;
1904b4e32a71SPadmanabh Ratnakar };
1905b4e32a71SPadmanabh Ratnakar
1906b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name {
1907b4e32a71SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
1908b4e32a71SPadmanabh Ratnakar u8 port_name[4];
1909b4e32a71SPadmanabh Ratnakar };
1910b4e32a71SPadmanabh Ratnakar
19119aebddd1SJeff Kirsher /*************** HW Stats Get v1 **********************************/
19129aebddd1SJeff Kirsher #define BE_TXP_SW_SZ 48
19139aebddd1SJeff Kirsher struct be_port_rxf_stats_v1 {
19149aebddd1SJeff Kirsher u32 rsvd0[12];
19159aebddd1SJeff Kirsher u32 rx_crc_errors;
19169aebddd1SJeff Kirsher u32 rx_alignment_symbol_errors;
19179aebddd1SJeff Kirsher u32 rx_pause_frames;
19189aebddd1SJeff Kirsher u32 rx_priority_pause_frames;
19199aebddd1SJeff Kirsher u32 rx_control_frames;
19209aebddd1SJeff Kirsher u32 rx_in_range_errors;
19219aebddd1SJeff Kirsher u32 rx_out_range_errors;
19229aebddd1SJeff Kirsher u32 rx_frame_too_long;
192318fb06a1SSuresh Reddy u32 rx_address_filtered;
19249aebddd1SJeff Kirsher u32 rx_dropped_too_small;
19259aebddd1SJeff Kirsher u32 rx_dropped_too_short;
19269aebddd1SJeff Kirsher u32 rx_dropped_header_too_small;
19279aebddd1SJeff Kirsher u32 rx_dropped_tcp_length;
19289aebddd1SJeff Kirsher u32 rx_dropped_runt;
19299aebddd1SJeff Kirsher u32 rsvd1[10];
19309aebddd1SJeff Kirsher u32 rx_ip_checksum_errs;
19319aebddd1SJeff Kirsher u32 rx_tcp_checksum_errs;
19329aebddd1SJeff Kirsher u32 rx_udp_checksum_errs;
19339aebddd1SJeff Kirsher u32 rsvd2[7];
19349aebddd1SJeff Kirsher u32 rx_switched_unicast_packets;
19359aebddd1SJeff Kirsher u32 rx_switched_multicast_packets;
19369aebddd1SJeff Kirsher u32 rx_switched_broadcast_packets;
19379aebddd1SJeff Kirsher u32 rsvd3[3];
19389aebddd1SJeff Kirsher u32 tx_pauseframes;
19399aebddd1SJeff Kirsher u32 tx_priority_pauseframes;
19409aebddd1SJeff Kirsher u32 tx_controlframes;
19419aebddd1SJeff Kirsher u32 rsvd4[10];
19429aebddd1SJeff Kirsher u32 rxpp_fifo_overflow_drop;
19439aebddd1SJeff Kirsher u32 rx_input_fifo_overflow_drop;
19449aebddd1SJeff Kirsher u32 pmem_fifo_overflow_drop;
19459aebddd1SJeff Kirsher u32 jabber_events;
19469aebddd1SJeff Kirsher u32 rsvd5[3];
19479aebddd1SJeff Kirsher };
19489aebddd1SJeff Kirsher
19499aebddd1SJeff Kirsher
19509aebddd1SJeff Kirsher struct be_rxf_stats_v1 {
19519aebddd1SJeff Kirsher struct be_port_rxf_stats_v1 port[4];
19529aebddd1SJeff Kirsher u32 rsvd0[2];
19539aebddd1SJeff Kirsher u32 rx_drops_no_pbuf;
19549aebddd1SJeff Kirsher u32 rx_drops_no_txpb;
19559aebddd1SJeff Kirsher u32 rx_drops_no_erx_descr;
19569aebddd1SJeff Kirsher u32 rx_drops_no_tpre_descr;
19579aebddd1SJeff Kirsher u32 rsvd1[6];
19589aebddd1SJeff Kirsher u32 rx_drops_too_many_frags;
19599aebddd1SJeff Kirsher u32 rx_drops_invalid_ring;
19609aebddd1SJeff Kirsher u32 forwarded_packets;
19619aebddd1SJeff Kirsher u32 rx_drops_mtu;
19629aebddd1SJeff Kirsher u32 rsvd2[14];
19639aebddd1SJeff Kirsher };
19649aebddd1SJeff Kirsher
19659aebddd1SJeff Kirsher struct be_erx_stats_v1 {
19669aebddd1SJeff Kirsher u32 rx_drops_no_fragments[68]; /* dwordS 0 to 67*/
19679aebddd1SJeff Kirsher u32 rsvd[4];
19689aebddd1SJeff Kirsher };
19699aebddd1SJeff Kirsher
197061000861SAjit Khaparde struct be_port_rxf_stats_v2 {
197161000861SAjit Khaparde u32 rsvd0[10];
197261000861SAjit Khaparde u32 roce_bytes_received_lsd;
197361000861SAjit Khaparde u32 roce_bytes_received_msd;
197461000861SAjit Khaparde u32 rsvd1[5];
197561000861SAjit Khaparde u32 roce_frames_received;
197661000861SAjit Khaparde u32 rx_crc_errors;
197761000861SAjit Khaparde u32 rx_alignment_symbol_errors;
197861000861SAjit Khaparde u32 rx_pause_frames;
197961000861SAjit Khaparde u32 rx_priority_pause_frames;
198061000861SAjit Khaparde u32 rx_control_frames;
198161000861SAjit Khaparde u32 rx_in_range_errors;
198261000861SAjit Khaparde u32 rx_out_range_errors;
198361000861SAjit Khaparde u32 rx_frame_too_long;
198461000861SAjit Khaparde u32 rx_address_filtered;
198561000861SAjit Khaparde u32 rx_dropped_too_small;
198661000861SAjit Khaparde u32 rx_dropped_too_short;
198761000861SAjit Khaparde u32 rx_dropped_header_too_small;
198861000861SAjit Khaparde u32 rx_dropped_tcp_length;
198961000861SAjit Khaparde u32 rx_dropped_runt;
199061000861SAjit Khaparde u32 rsvd2[10];
199161000861SAjit Khaparde u32 rx_ip_checksum_errs;
199261000861SAjit Khaparde u32 rx_tcp_checksum_errs;
199361000861SAjit Khaparde u32 rx_udp_checksum_errs;
199461000861SAjit Khaparde u32 rsvd3[7];
199561000861SAjit Khaparde u32 rx_switched_unicast_packets;
199661000861SAjit Khaparde u32 rx_switched_multicast_packets;
199761000861SAjit Khaparde u32 rx_switched_broadcast_packets;
199861000861SAjit Khaparde u32 rsvd4[3];
199961000861SAjit Khaparde u32 tx_pauseframes;
200061000861SAjit Khaparde u32 tx_priority_pauseframes;
200161000861SAjit Khaparde u32 tx_controlframes;
200261000861SAjit Khaparde u32 rsvd5[10];
200361000861SAjit Khaparde u32 rxpp_fifo_overflow_drop;
200461000861SAjit Khaparde u32 rx_input_fifo_overflow_drop;
200561000861SAjit Khaparde u32 pmem_fifo_overflow_drop;
200661000861SAjit Khaparde u32 jabber_events;
200761000861SAjit Khaparde u32 rsvd6[3];
200861000861SAjit Khaparde u32 rx_drops_payload_size;
200961000861SAjit Khaparde u32 rx_drops_clipped_header;
201061000861SAjit Khaparde u32 rx_drops_crc;
201161000861SAjit Khaparde u32 roce_drops_payload_len;
201261000861SAjit Khaparde u32 roce_drops_crc;
201361000861SAjit Khaparde u32 rsvd7[19];
201461000861SAjit Khaparde };
201561000861SAjit Khaparde
201661000861SAjit Khaparde struct be_rxf_stats_v2 {
201761000861SAjit Khaparde struct be_port_rxf_stats_v2 port[4];
201861000861SAjit Khaparde u32 rsvd0[2];
201961000861SAjit Khaparde u32 rx_drops_no_pbuf;
202061000861SAjit Khaparde u32 rx_drops_no_txpb;
202161000861SAjit Khaparde u32 rx_drops_no_erx_descr;
202261000861SAjit Khaparde u32 rx_drops_no_tpre_descr;
202361000861SAjit Khaparde u32 rsvd1[6];
202461000861SAjit Khaparde u32 rx_drops_too_many_frags;
202561000861SAjit Khaparde u32 rx_drops_invalid_ring;
202661000861SAjit Khaparde u32 forwarded_packets;
202761000861SAjit Khaparde u32 rx_drops_mtu;
202861000861SAjit Khaparde u32 rsvd2[35];
202961000861SAjit Khaparde };
203061000861SAjit Khaparde
20319aebddd1SJeff Kirsher struct be_hw_stats_v1 {
20329aebddd1SJeff Kirsher struct be_rxf_stats_v1 rxf;
20339aebddd1SJeff Kirsher u32 rsvd0[BE_TXP_SW_SZ];
20349aebddd1SJeff Kirsher struct be_erx_stats_v1 erx;
20359aebddd1SJeff Kirsher struct be_pmem_stats pmem;
20360b3f0e7aSVasundhara Volam u32 rsvd1[18];
20379aebddd1SJeff Kirsher };
20389aebddd1SJeff Kirsher
20399aebddd1SJeff Kirsher struct be_cmd_req_get_stats_v1 {
20409aebddd1SJeff Kirsher struct be_cmd_req_hdr hdr;
20419aebddd1SJeff Kirsher u8 rsvd[sizeof(struct be_hw_stats_v1)];
20429aebddd1SJeff Kirsher };
20439aebddd1SJeff Kirsher
20449aebddd1SJeff Kirsher struct be_cmd_resp_get_stats_v1 {
20459aebddd1SJeff Kirsher struct be_cmd_resp_hdr hdr;
20469aebddd1SJeff Kirsher struct be_hw_stats_v1 hw_stats;
20479aebddd1SJeff Kirsher };
20489aebddd1SJeff Kirsher
204961000861SAjit Khaparde struct be_erx_stats_v2 {
205061000861SAjit Khaparde u32 rx_drops_no_fragments[136]; /* dwordS 0 to 135*/
205161000861SAjit Khaparde u32 rsvd[3];
205261000861SAjit Khaparde };
205361000861SAjit Khaparde
205461000861SAjit Khaparde struct be_hw_stats_v2 {
205561000861SAjit Khaparde struct be_rxf_stats_v2 rxf;
205661000861SAjit Khaparde u32 rsvd0[BE_TXP_SW_SZ];
205761000861SAjit Khaparde struct be_erx_stats_v2 erx;
205861000861SAjit Khaparde struct be_pmem_stats pmem;
205961000861SAjit Khaparde u32 rsvd1[18];
206061000861SAjit Khaparde };
206161000861SAjit Khaparde
206261000861SAjit Khaparde struct be_cmd_req_get_stats_v2 {
206361000861SAjit Khaparde struct be_cmd_req_hdr hdr;
206461000861SAjit Khaparde u8 rsvd[sizeof(struct be_hw_stats_v2)];
206561000861SAjit Khaparde };
206661000861SAjit Khaparde
206761000861SAjit Khaparde struct be_cmd_resp_get_stats_v2 {
206861000861SAjit Khaparde struct be_cmd_resp_hdr hdr;
206961000861SAjit Khaparde struct be_hw_stats_v2 hw_stats;
207061000861SAjit Khaparde };
207161000861SAjit Khaparde
2072941a77d5SSomnath Kotur /************** get fat capabilites *******************/
2073941a77d5SSomnath Kotur #define MAX_MODULES 27
2074941a77d5SSomnath Kotur #define MAX_MODES 4
2075941a77d5SSomnath Kotur #define MODE_UART 0
2076941a77d5SSomnath Kotur #define FW_LOG_LEVEL_DEFAULT 48
2077941a77d5SSomnath Kotur #define FW_LOG_LEVEL_FATAL 64
2078941a77d5SSomnath Kotur
2079941a77d5SSomnath Kotur struct ext_fat_mode {
2080941a77d5SSomnath Kotur u8 mode;
2081941a77d5SSomnath Kotur u8 rsvd0;
2082941a77d5SSomnath Kotur u16 port_mask;
2083941a77d5SSomnath Kotur u32 dbg_lvl;
2084941a77d5SSomnath Kotur u64 fun_mask;
2085941a77d5SSomnath Kotur } __packed;
2086941a77d5SSomnath Kotur
2087941a77d5SSomnath Kotur struct ext_fat_modules {
2088941a77d5SSomnath Kotur u8 modules_str[32];
2089941a77d5SSomnath Kotur u32 modules_id;
2090941a77d5SSomnath Kotur u32 num_modes;
2091941a77d5SSomnath Kotur struct ext_fat_mode trace_lvl[MAX_MODES];
2092941a77d5SSomnath Kotur } __packed;
2093941a77d5SSomnath Kotur
2094941a77d5SSomnath Kotur struct be_fat_conf_params {
2095941a77d5SSomnath Kotur u32 max_log_entries;
2096941a77d5SSomnath Kotur u32 log_entry_size;
2097941a77d5SSomnath Kotur u8 log_type;
2098941a77d5SSomnath Kotur u8 max_log_funs;
2099941a77d5SSomnath Kotur u8 max_log_ports;
2100941a77d5SSomnath Kotur u8 rsvd0;
2101941a77d5SSomnath Kotur u32 supp_modes;
2102941a77d5SSomnath Kotur u32 num_modules;
2103941a77d5SSomnath Kotur struct ext_fat_modules module[MAX_MODULES];
2104941a77d5SSomnath Kotur } __packed;
2105941a77d5SSomnath Kotur
2106941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps {
2107941a77d5SSomnath Kotur struct be_cmd_req_hdr hdr;
2108941a77d5SSomnath Kotur u32 parameter_type;
2109941a77d5SSomnath Kotur };
2110941a77d5SSomnath Kotur
2111941a77d5SSomnath Kotur struct be_cmd_resp_get_ext_fat_caps {
2112941a77d5SSomnath Kotur struct be_cmd_resp_hdr hdr;
2113941a77d5SSomnath Kotur struct be_fat_conf_params get_params;
2114941a77d5SSomnath Kotur };
2115941a77d5SSomnath Kotur
2116941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps {
2117941a77d5SSomnath Kotur struct be_cmd_req_hdr hdr;
2118941a77d5SSomnath Kotur struct be_fat_conf_params set_params;
2119941a77d5SSomnath Kotur };
2120941a77d5SSomnath Kotur
2121150d58c7SVasundhara Volam #define RESOURCE_DESC_SIZE_V0 72
2122150d58c7SVasundhara Volam #define RESOURCE_DESC_SIZE_V1 88
2123150d58c7SVasundhara Volam #define PCIE_RESOURCE_DESC_TYPE_V0 0x40
2124a05f99dbSVasundhara Volam #define NIC_RESOURCE_DESC_TYPE_V0 0x41
2125150d58c7SVasundhara Volam #define PCIE_RESOURCE_DESC_TYPE_V1 0x50
2126a05f99dbSVasundhara Volam #define NIC_RESOURCE_DESC_TYPE_V1 0x51
2127f93f160bSVasundhara Volam #define PORT_RESOURCE_DESC_TYPE_V1 0x55
2128150d58c7SVasundhara Volam #define MAX_RESOURCE_DESC 264
2129d5c18473SPadmanabh Ratnakar
2130f2858738SVasundhara Volam #define IF_CAPS_FLAGS_VALID_SHIFT 0 /* IF caps valid */
213110cccf60SVasundhara Volam #define VFT_SHIFT 3 /* VF template */
2132a401801cSSathya Perla #define IMM_SHIFT 6 /* Immediate */
2133a401801cSSathya Perla #define NOSV_SHIFT 7 /* No save */
2134d5c18473SPadmanabh Ratnakar
2135de2b1e03SSomnath Kotur #define MISSION_NIC 1
2136de2b1e03SSomnath Kotur #define MISSION_RDMA 8
2137de2b1e03SSomnath Kotur
2138150d58c7SVasundhara Volam struct be_res_desc_hdr {
2139abb93951SPadmanabh Ratnakar u8 desc_type;
2140abb93951SPadmanabh Ratnakar u8 desc_len;
2141150d58c7SVasundhara Volam } __packed;
2142150d58c7SVasundhara Volam
2143a401801cSSathya Perla struct be_port_res_desc {
2144a401801cSSathya Perla struct be_res_desc_hdr hdr;
2145a401801cSSathya Perla u8 rsvd0;
2146a401801cSSathya Perla u8 flags;
2147a401801cSSathya Perla u8 link_num;
2148a401801cSSathya Perla u8 mc_type;
2149a401801cSSathya Perla u16 rsvd1;
2150a401801cSSathya Perla
2151a401801cSSathya Perla #define NV_TYPE_MASK 0x3 /* bits 0-1 */
2152a401801cSSathya Perla #define NV_TYPE_DISABLED 1
2153a401801cSSathya Perla #define NV_TYPE_VXLAN 3
2154a401801cSSathya Perla #define SOCVID_SHIFT 2 /* Strip outer vlan */
2155a401801cSSathya Perla #define RCVID_SHIFT 4 /* Report vlan */
2156980df249SSuresh Reddy #define PF_NUM_IGNORE 255
2157a401801cSSathya Perla u8 nv_flags;
2158a401801cSSathya Perla u8 rsvd2;
2159a401801cSSathya Perla __le16 nv_port; /* vxlan/gre port */
2160a401801cSSathya Perla u32 rsvd3[19];
2161a401801cSSathya Perla } __packed;
2162a401801cSSathya Perla
2163150d58c7SVasundhara Volam struct be_pcie_res_desc {
2164150d58c7SVasundhara Volam struct be_res_desc_hdr hdr;
2165150d58c7SVasundhara Volam u8 rsvd0;
2166150d58c7SVasundhara Volam u8 flags;
2167150d58c7SVasundhara Volam u16 rsvd1;
2168150d58c7SVasundhara Volam u8 pf_num;
2169150d58c7SVasundhara Volam u8 rsvd2;
2170150d58c7SVasundhara Volam u32 rsvd3;
2171150d58c7SVasundhara Volam u8 sriov_state;
2172150d58c7SVasundhara Volam u8 pf_state;
2173150d58c7SVasundhara Volam u8 pf_type;
2174150d58c7SVasundhara Volam u8 rsvd4;
2175150d58c7SVasundhara Volam u16 num_vfs;
2176150d58c7SVasundhara Volam u16 rsvd5;
2177150d58c7SVasundhara Volam u32 rsvd6[17];
2178150d58c7SVasundhara Volam } __packed;
2179150d58c7SVasundhara Volam
2180150d58c7SVasundhara Volam struct be_nic_res_desc {
2181150d58c7SVasundhara Volam struct be_res_desc_hdr hdr;
2182abb93951SPadmanabh Ratnakar u8 rsvd1;
2183a401801cSSathya Perla
2184a401801cSSathya Perla #define QUN_SHIFT 4 /* QoS is in absolute units */
2185abb93951SPadmanabh Ratnakar u8 flags;
2186abb93951SPadmanabh Ratnakar u8 vf_num;
2187abb93951SPadmanabh Ratnakar u8 rsvd2;
2188abb93951SPadmanabh Ratnakar u8 pf_num;
2189abb93951SPadmanabh Ratnakar u8 rsvd3;
2190abb93951SPadmanabh Ratnakar u16 unicast_mac_count;
2191abb93951SPadmanabh Ratnakar u8 rsvd4[6];
2192abb93951SPadmanabh Ratnakar u16 mcc_count;
2193abb93951SPadmanabh Ratnakar u16 vlan_count;
2194abb93951SPadmanabh Ratnakar u16 mcast_mac_count;
2195abb93951SPadmanabh Ratnakar u16 txq_count;
2196abb93951SPadmanabh Ratnakar u16 rq_count;
2197abb93951SPadmanabh Ratnakar u16 rssq_count;
2198abb93951SPadmanabh Ratnakar u16 lro_count;
2199abb93951SPadmanabh Ratnakar u16 cq_count;
2200abb93951SPadmanabh Ratnakar u16 toe_conn_count;
2201abb93951SPadmanabh Ratnakar u16 eq_count;
22020f77ba73SRavikumar Nelavelli u16 vlan_id;
22030f77ba73SRavikumar Nelavelli u16 iface_count;
2204abb93951SPadmanabh Ratnakar u32 cap_flags;
2205abb93951SPadmanabh Ratnakar u8 link_param;
22060f77ba73SRavikumar Nelavelli u8 rsvd6;
22070f77ba73SRavikumar Nelavelli u16 channel_id_param;
2208abb93951SPadmanabh Ratnakar u32 bw_min;
2209abb93951SPadmanabh Ratnakar u32 bw_max;
2210abb93951SPadmanabh Ratnakar u8 acpi_params;
2211abb93951SPadmanabh Ratnakar u8 wol_param;
2212abb93951SPadmanabh Ratnakar u16 rsvd7;
22130f77ba73SRavikumar Nelavelli u16 tunnel_iface_count;
22140f77ba73SRavikumar Nelavelli u16 direct_tenant_iface_count;
22150f77ba73SRavikumar Nelavelli u32 rsvd8[6];
2216150d58c7SVasundhara Volam } __packed;
2217abb93951SPadmanabh Ratnakar
2218f93f160bSVasundhara Volam /************ Multi-Channel type ***********/
2219f93f160bSVasundhara Volam enum mc_type {
2220f93f160bSVasundhara Volam MC_NONE = 0x01,
2221f93f160bSVasundhara Volam UMC = 0x02,
2222f93f160bSVasundhara Volam FLEX10 = 0x03,
2223f93f160bSVasundhara Volam vNIC1 = 0x04,
2224f93f160bSVasundhara Volam nPAR = 0x05,
2225f93f160bSVasundhara Volam UFP = 0x06,
2226f93f160bSVasundhara Volam vNIC2 = 0x07
2227f93f160bSVasundhara Volam };
2228f93f160bSVasundhara Volam
2229f93f160bSVasundhara Volam /* Is BE in a multi-channel mode */
be_is_mc(struct be_adapter * adapter)2230f93f160bSVasundhara Volam static inline bool be_is_mc(struct be_adapter *adapter)
2231f93f160bSVasundhara Volam {
2232f93f160bSVasundhara Volam return adapter->mc_type > MC_NONE;
2233f93f160bSVasundhara Volam }
2234f93f160bSVasundhara Volam
2235abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config {
2236abb93951SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
2237abb93951SPadmanabh Ratnakar };
2238abb93951SPadmanabh Ratnakar
2239abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config {
224028710c55SKalesh AP struct be_cmd_resp_hdr hdr;
2241abb93951SPadmanabh Ratnakar u32 desc_count;
2242150d58c7SVasundhara Volam u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2243abb93951SPadmanabh Ratnakar };
2244abb93951SPadmanabh Ratnakar
2245f2858738SVasundhara Volam enum {
2246f2858738SVasundhara Volam RESOURCE_LIMITS,
2247f2858738SVasundhara Volam RESOURCE_MODIFIABLE
2248f2858738SVasundhara Volam };
2249f2858738SVasundhara Volam
2250abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config {
2251abb93951SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
2252abb93951SPadmanabh Ratnakar u8 rsvd;
2253f2858738SVasundhara Volam #define ACTIVE_PROFILE_TYPE 0x2
2254de2b1e03SSomnath Kotur #define SAVED_PROFILE_TYPE 0x0
2255f2858738SVasundhara Volam #define QUERY_MODIFIABLE_FIELDS_TYPE BIT(3)
2256abb93951SPadmanabh Ratnakar u8 type;
2257abb93951SPadmanabh Ratnakar u16 rsvd1;
2258abb93951SPadmanabh Ratnakar };
2259abb93951SPadmanabh Ratnakar
2260abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_profile_config {
2261150d58c7SVasundhara Volam struct be_cmd_resp_hdr hdr;
2262f2858738SVasundhara Volam __le16 desc_count;
2263f2858738SVasundhara Volam u16 rsvd;
2264150d58c7SVasundhara Volam u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2265a05f99dbSVasundhara Volam };
2266a05f99dbSVasundhara Volam
2267f2858738SVasundhara Volam #define FIELD_MODIFIABLE 0xFFFF
2268d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config {
2269d5c18473SPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
2270d5c18473SPadmanabh Ratnakar u32 rsvd;
2271d5c18473SPadmanabh Ratnakar u32 desc_count;
2272bec84e6bSVasundhara Volam u8 desc[2 * RESOURCE_DESC_SIZE_V1];
2273bec84e6bSVasundhara Volam } __packed;
2274d5c18473SPadmanabh Ratnakar
2275542963b7SVasundhara Volam struct be_cmd_req_get_active_profile {
2276542963b7SVasundhara Volam struct be_cmd_req_hdr hdr;
2277542963b7SVasundhara Volam u32 rsvd;
2278542963b7SVasundhara Volam } __packed;
2279542963b7SVasundhara Volam
2280542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile {
2281542963b7SVasundhara Volam struct be_cmd_resp_hdr hdr;
2282542963b7SVasundhara Volam u16 active_profile_id;
2283542963b7SVasundhara Volam u16 next_profile_id;
2284542963b7SVasundhara Volam } __packed;
2285542963b7SVasundhara Volam
2286dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf {
2287dcf7ebbaSPadmanabh Ratnakar struct be_cmd_req_hdr hdr;
2288dcf7ebbaSPadmanabh Ratnakar u8 enable;
2289dcf7ebbaSPadmanabh Ratnakar u8 rsvd[3];
2290dcf7ebbaSPadmanabh Ratnakar };
2291dcf7ebbaSPadmanabh Ratnakar
229268c45a2dSSomnath Kotur struct be_cmd_req_intr_set {
229368c45a2dSSomnath Kotur struct be_cmd_req_hdr hdr;
229468c45a2dSSomnath Kotur u8 intr_enabled;
229568c45a2dSSomnath Kotur u8 rsvd[3];
229668c45a2dSSomnath Kotur };
229768c45a2dSSomnath Kotur
check_privilege(struct be_adapter * adapter,u32 flags)2298f25b119cSPadmanabh Ratnakar static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
2299f25b119cSPadmanabh Ratnakar {
2300f25b119cSPadmanabh Ratnakar return flags & adapter->cmd_privileges ? true : false;
2301f25b119cSPadmanabh Ratnakar }
2302f25b119cSPadmanabh Ratnakar
23034c876616SSathya Perla /************** Get IFACE LIST *******************/
23044c876616SSathya Perla struct be_if_desc {
23054c876616SSathya Perla u32 if_id;
23064c876616SSathya Perla u32 cap_flags;
23074c876616SSathya Perla u32 en_flags;
23084c876616SSathya Perla };
23094c876616SSathya Perla
23104c876616SSathya Perla struct be_cmd_req_get_iface_list {
23114c876616SSathya Perla struct be_cmd_req_hdr hdr;
23124c876616SSathya Perla };
23134c876616SSathya Perla
23144c876616SSathya Perla struct be_cmd_resp_get_iface_list {
23154c876616SSathya Perla struct be_cmd_req_hdr hdr;
23164c876616SSathya Perla u32 if_cnt;
23174c876616SSathya Perla struct be_if_desc if_desc;
23184c876616SSathya Perla };
23194c876616SSathya Perla
2320710f3e59SSriharsha Basavapatna /************** Set Features *******************/
2321710f3e59SSriharsha Basavapatna #define BE_FEATURE_UE_RECOVERY 0x10
2322710f3e59SSriharsha Basavapatna #define BE_UE_RECOVERY_UER_MASK 0x1
2323710f3e59SSriharsha Basavapatna
2324710f3e59SSriharsha Basavapatna struct be_req_ue_recovery {
2325710f3e59SSriharsha Basavapatna u32 uer;
2326710f3e59SSriharsha Basavapatna u32 rsvd;
2327710f3e59SSriharsha Basavapatna };
2328710f3e59SSriharsha Basavapatna
2329710f3e59SSriharsha Basavapatna struct be_cmd_req_set_features {
2330710f3e59SSriharsha Basavapatna struct be_cmd_req_hdr hdr;
2331710f3e59SSriharsha Basavapatna u32 features;
2332710f3e59SSriharsha Basavapatna u32 parameter_len;
2333710f3e59SSriharsha Basavapatna union {
2334710f3e59SSriharsha Basavapatna struct be_req_ue_recovery req;
2335710f3e59SSriharsha Basavapatna u32 rsvd[2];
2336710f3e59SSriharsha Basavapatna } parameter;
2337710f3e59SSriharsha Basavapatna };
2338710f3e59SSriharsha Basavapatna
2339710f3e59SSriharsha Basavapatna struct be_resp_ue_recovery {
2340710f3e59SSriharsha Basavapatna u32 uer;
2341710f3e59SSriharsha Basavapatna u16 ue2rp;
2342710f3e59SSriharsha Basavapatna u16 ue2sr;
2343710f3e59SSriharsha Basavapatna };
2344710f3e59SSriharsha Basavapatna
2345710f3e59SSriharsha Basavapatna struct be_cmd_resp_set_features {
2346710f3e59SSriharsha Basavapatna struct be_cmd_resp_hdr hdr;
2347710f3e59SSriharsha Basavapatna u32 features;
2348710f3e59SSriharsha Basavapatna u32 parameter_len;
2349710f3e59SSriharsha Basavapatna union {
2350710f3e59SSriharsha Basavapatna struct be_resp_ue_recovery resp;
2351710f3e59SSriharsha Basavapatna u32 rsvd[2];
2352710f3e59SSriharsha Basavapatna } parameter;
2353710f3e59SSriharsha Basavapatna };
2354710f3e59SSriharsha Basavapatna
2355bdce2ad7SSuresh Reddy /*************** Set logical link ********************/
2356d9d426afSSuresh Reddy #define PLINK_ENABLE BIT(0)
2357d9d426afSSuresh Reddy #define PLINK_TRACK BIT(8)
2358bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link {
2359bdce2ad7SSuresh Reddy struct be_cmd_req_hdr hdr;
2360bdce2ad7SSuresh Reddy u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2361bdce2ad7SSuresh Reddy };
2362bdce2ad7SSuresh Reddy
2363a401801cSSathya Perla /************** Manage IFACE Filters *******************/
2364a401801cSSathya Perla #define OP_CONVERT_NORMAL_TO_TUNNEL 0
2365a401801cSSathya Perla #define OP_CONVERT_TUNNEL_TO_NORMAL 1
2366a401801cSSathya Perla
2367a401801cSSathya Perla struct be_cmd_req_manage_iface_filters {
2368a401801cSSathya Perla struct be_cmd_req_hdr hdr;
2369a401801cSSathya Perla u8 op;
2370a401801cSSathya Perla u8 rsvd0;
2371a401801cSSathya Perla u8 flags;
2372a401801cSSathya Perla u8 rsvd1;
2373a401801cSSathya Perla u32 tunnel_iface_id;
2374a401801cSSathya Perla u32 target_iface_id;
2375a401801cSSathya Perla u8 mac[6];
2376a401801cSSathya Perla u16 vlan_tag;
2377a401801cSSathya Perla u32 tenant_id;
2378a401801cSSathya Perla u32 filter_id;
2379a401801cSSathya Perla u32 cap_flags;
2380a401801cSSathya Perla u32 cap_control_flags;
2381a401801cSSathya Perla } __packed;
2382a401801cSSathya Perla
2383710f3e59SSriharsha Basavapatna u16 be_POST_stage_get(struct be_adapter *adapter);
238431886e87SJoe Perches int be_pci_fnum_get(struct be_adapter *adapter);
238531886e87SJoe Perches int be_fw_wait_ready(struct be_adapter *adapter);
238631886e87SJoe Perches int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
23875ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id);
238876660757SJakub Kicinski int be_cmd_pmac_add(struct be_adapter *adapter, const u8 *mac_addr, u32 if_id,
238931886e87SJoe Perches u32 *pmac_id, u32 domain);
239031886e87SJoe Perches int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
23919aebddd1SJeff Kirsher u32 domain);
239231886e87SJoe Perches int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
239331886e87SJoe Perches u32 *if_handle, u32 domain);
239431886e87SJoe Perches int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
239531886e87SJoe Perches int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
239631886e87SJoe Perches int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
239731886e87SJoe Perches struct be_queue_info *eq, bool no_delay,
239831886e87SJoe Perches int num_cqe_dma_coalesce);
239931886e87SJoe Perches int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
24009aebddd1SJeff Kirsher struct be_queue_info *cq);
240131886e87SJoe Perches int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
240231886e87SJoe Perches int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
240331886e87SJoe Perches u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
240431886e87SJoe Perches int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
24059aebddd1SJeff Kirsher int type);
240631886e87SJoe Perches int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
240731886e87SJoe Perches int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2408323ff71eSSathya Perla u8 *link_status, u32 dom);
240931886e87SJoe Perches int be_cmd_reset(struct be_adapter *adapter);
241031886e87SJoe Perches int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
241131886e87SJoe Perches int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
24129aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd);
2413e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter);
24142632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
241531886e87SJoe Perches int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2416435452aaSVasundhara Volam u32 num, u32 domain);
241731886e87SJoe Perches int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
241831886e87SJoe Perches int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
241931886e87SJoe Perches int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2420e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter);
242131886e87SJoe Perches int be_cmd_reset_function(struct be_adapter *adapter);
242231886e87SJoe Perches int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
242333cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
242431886e87SJoe Perches int be_process_mcc(struct be_adapter *adapter);
242531886e87SJoe Perches int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
242631886e87SJoe Perches u8 status, u8 state);
242731886e87SJoe Perches int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
242831886e87SJoe Perches u32 *state);
2429e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,
2430*d7241f67SHristo Venev u8 page_num, u32 off, u32 len, u8 *data);
24316809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter);
243221252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter);
2433de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2434de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name,
2435de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status);
2436a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, const struct firmware *fw);
2437a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw);
243831886e87SJoe Perches int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
24399aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd);
244031886e87SJoe Perches int be_cmd_fw_init(struct be_adapter *adapter);
244131886e87SJoe Perches int be_cmd_fw_clean(struct be_adapter *adapter);
244231886e87SJoe Perches void be_async_mcc_enable(struct be_adapter *adapter);
244331886e87SJoe Perches void be_async_mcc_disable(struct be_adapter *adapter);
244431886e87SJoe Perches int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
244531886e87SJoe Perches u32 loopback_type, u32 pkt_size, u32 num_pkts,
244631886e87SJoe Perches u64 pattern);
244731886e87SJoe Perches int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2448941a77d5SSomnath Kotur struct be_dma_mem *cmd);
244931886e87SJoe Perches int be_cmd_get_seeprom_data(struct be_adapter *adapter,
245031886e87SJoe Perches struct be_dma_mem *nonemb_cmd);
245131886e87SJoe Perches int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
245231886e87SJoe Perches u8 loopback_type, u8 enable);
245331886e87SJoe Perches int be_cmd_get_phy_info(struct be_adapter *adapter);
24540f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
24550f77ba73SRavikumar Nelavelli u16 link_speed, u8 domain);
245631886e87SJoe Perches void be_detect_error(struct be_adapter *adapter);
245731886e87SJoe Perches int be_cmd_get_die_temperature(struct be_adapter *adapter);
245831886e87SJoe Perches int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2459fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size);
2460fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf);
246131886e87SJoe Perches int be_cmd_req_native_mode(struct be_adapter *adapter);
246231886e87SJoe Perches int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
246331886e87SJoe Perches u32 domain);
246431886e87SJoe Perches int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
246531886e87SJoe Perches u32 vf_num);
246631886e87SJoe Perches int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2467b188f090SSuresh Reddy bool *pmac_id_active, u32 *pmac_id,
2468b188f090SSuresh Reddy u32 if_handle, u8 domain);
2469b188f090SSuresh Reddy int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2470b188f090SSuresh Reddy u32 if_handle, bool active, u32 domain);
247131886e87SJoe Perches int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
247231886e87SJoe Perches int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
247331886e87SJoe Perches u32 domain);
247431886e87SJoe Perches int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
247531886e87SJoe Perches int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2476e7bcbd7bSKalesh AP u16 intf_id, u16 hsw_mode, u8 spoofchk);
247731886e87SJoe Perches int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2478e7bcbd7bSKalesh AP u16 intf_id, u8 *mode, bool *spoofchk);
247931886e87SJoe Perches int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2480baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2481baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter);
248231886e87SJoe Perches int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
248331886e87SJoe Perches struct be_dma_mem *cmd);
248431886e87SJoe Perches int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2485941a77d5SSomnath Kotur struct be_dma_mem *cmd,
2486941a77d5SSomnath Kotur struct be_fat_conf_params *cfgs);
248731886e87SJoe Perches int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
248831886e87SJoe Perches int lancer_initiate_dump(struct be_adapter *adapter);
2489f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter);
249031886e87SJoe Perches bool dump_present(struct be_adapter *adapter);
249131886e87SJoe Perches int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
249221252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter);
249392bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter,
249492bf14abSSathya Perla struct be_resources *res);
249592bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter,
2496de2b1e03SSomnath Kotur struct be_resources *res,
2497de2b1e03SSomnath Kotur struct be_port_resources *port_res,
2498de2b1e03SSomnath Kotur u8 profile_type, u8 query, u8 domain);
2499542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
250031886e87SJoe Perches int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
250131886e87SJoe Perches int vf_num);
250231886e87SJoe Perches int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
250331886e87SJoe Perches int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2504bdce2ad7SSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2505bdce2ad7SSuresh Reddy int link_state, u8 domain);
2506a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2507a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);
2508bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter,
2509f2858738SVasundhara Volam struct be_resources res, u16 num_vfs,
2510b9263cbfSSuresh Reddy struct be_resources *vft_res);
2511710f3e59SSriharsha Basavapatna int be_cmd_set_features(struct be_adapter *adapter);
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