16e9ef509SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 29aebddd1SJeff Kirsher /* 37dfbe7d7SSomnath Kotur * Copyright (C) 2005 - 2016 Broadcom 49aebddd1SJeff Kirsher * All rights reserved. 59aebddd1SJeff Kirsher * 69aebddd1SJeff Kirsher * Contact Information: 79aebddd1SJeff Kirsher * linux-drivers@emulex.com 89aebddd1SJeff Kirsher * 99aebddd1SJeff Kirsher * Emulex 109aebddd1SJeff Kirsher * 3333 Susan Street 119aebddd1SJeff Kirsher * Costa Mesa, CA 92626 129aebddd1SJeff Kirsher */ 139aebddd1SJeff Kirsher 146a4ab669SParav Pandit #include <linux/module.h> 159aebddd1SJeff Kirsher #include "be.h" 169aebddd1SJeff Kirsher #include "be_cmds.h" 179aebddd1SJeff Kirsher 18262c9740SHernán Gonzalez const char * const be_misconfig_evt_port_state[] = { 1951d1f98aSAjit Khaparde "Physical Link is functional", 2051d1f98aSAjit Khaparde "Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replace.", 2151d1f98aSAjit Khaparde "Optics of two types installed – Remove one optic or install matching pair of optics.", 2251d1f98aSAjit Khaparde "Incompatible optics – Replace with compatible optics for card to function.", 2351d1f98aSAjit Khaparde "Unqualified optics – Replace with Avago optics for Warranty and Technical Support.", 2451d1f98aSAjit Khaparde "Uncertified optics – Replace with Avago-certified optics to enable link operation." 2521252377SVasundhara Volam }; 2621252377SVasundhara Volam 2751d1f98aSAjit Khaparde static char *be_port_misconfig_evt_severity[] = { 2851d1f98aSAjit Khaparde "KERN_WARN", 2951d1f98aSAjit Khaparde "KERN_INFO", 3051d1f98aSAjit Khaparde "KERN_ERR", 3151d1f98aSAjit Khaparde "KERN_WARN" 3251d1f98aSAjit Khaparde }; 3351d1f98aSAjit Khaparde 3451d1f98aSAjit Khaparde static char *phy_state_oper_desc[] = { 3551d1f98aSAjit Khaparde "Link is non-operational", 3651d1f98aSAjit Khaparde "Link is operational", 3721252377SVasundhara Volam "" 3821252377SVasundhara Volam }; 3921252377SVasundhara Volam 40f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar }, 53f25b119cSPadmanabh Ratnakar { 54f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 55f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 56f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 57f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 58f25b119cSPadmanabh Ratnakar }, 59f25b119cSPadmanabh Ratnakar { 60f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 61f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 62f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 63f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 64f25b119cSPadmanabh Ratnakar }, 65f25b119cSPadmanabh Ratnakar { 66f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 67f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 68f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 69f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 702e365b1bSSomnath Kotur }, 712e365b1bSSomnath Kotur { 722e365b1bSSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, 732e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 742e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 752e365b1bSSomnath Kotur }, 762e365b1bSSomnath Kotur { 772e365b1bSSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, 782e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 792e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 802e365b1bSSomnath Kotur }, 812e365b1bSSomnath Kotur { 822e365b1bSSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 832e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 842e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 852e365b1bSSomnath Kotur }, 86884476beSSomnath Kotur { 87884476beSSomnath Kotur OPCODE_COMMON_SET_HSW_CONFIG, 88884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON, 89d14584d9SVenkat Duvvuru BE_PRIV_DEVCFG | BE_PRIV_VHADM | 90d14584d9SVenkat Duvvuru BE_PRIV_DEVSEC 91884476beSSomnath Kotur }, 9262259ac4SSomnath Kotur { 9362259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 9462259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON, 9562259ac4SSomnath Kotur BE_PRIV_DEVCFG 9662259ac4SSomnath Kotur } 97f25b119cSPadmanabh Ratnakar }; 98f25b119cSPadmanabh Ratnakar 99a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 100f25b119cSPadmanabh Ratnakar { 101f25b119cSPadmanabh Ratnakar int i; 1022b1eaa66SColin Ian King int num_entries = ARRAY_SIZE(cmd_priv_map); 103f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 104f25b119cSPadmanabh Ratnakar 105f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 106f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 107f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 108f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 109f25b119cSPadmanabh Ratnakar return false; 110f25b119cSPadmanabh Ratnakar 111f25b119cSPadmanabh Ratnakar return true; 112f25b119cSPadmanabh Ratnakar } 113f25b119cSPadmanabh Ratnakar 1143de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 1153de09455SSomnath Kotur { 1163de09455SSomnath Kotur return wrb->payload.embedded_payload; 1173de09455SSomnath Kotur } 1189aebddd1SJeff Kirsher 119efaa408eSSuresh Reddy static int be_mcc_notify(struct be_adapter *adapter) 1209aebddd1SJeff Kirsher { 1219aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 1229aebddd1SJeff Kirsher u32 val = 0; 1239aebddd1SJeff Kirsher 124954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 125efaa408eSSuresh Reddy return -EIO; 1269aebddd1SJeff Kirsher 1279aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 1289aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher wmb(); 1319aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 132efaa408eSSuresh Reddy 133efaa408eSSuresh Reddy return 0; 1349aebddd1SJeff Kirsher } 1359aebddd1SJeff Kirsher 1369aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 1379aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 1389aebddd1SJeff Kirsher * little endian) */ 1399aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 1409aebddd1SJeff Kirsher { 1419e9ff4b7SSathya Perla u32 flags; 1429e9ff4b7SSathya Perla 1439aebddd1SJeff Kirsher if (compl->flags != 0) { 1449e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1459e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1469e9ff4b7SSathya Perla compl->flags = flags; 1479aebddd1SJeff Kirsher return true; 1489aebddd1SJeff Kirsher } 1499aebddd1SJeff Kirsher } 1509e9ff4b7SSathya Perla return false; 1519e9ff4b7SSathya Perla } 1529aebddd1SJeff Kirsher 1539aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1549aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1559aebddd1SJeff Kirsher { 1569aebddd1SJeff Kirsher compl->flags = 0; 1579aebddd1SJeff Kirsher } 1589aebddd1SJeff Kirsher 159652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 160652bf646SPadmanabh Ratnakar { 161652bf646SPadmanabh Ratnakar unsigned long addr; 162652bf646SPadmanabh Ratnakar 163652bf646SPadmanabh Ratnakar addr = tag1; 164652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 165652bf646SPadmanabh Ratnakar return (void *)addr; 166652bf646SPadmanabh Ratnakar } 167652bf646SPadmanabh Ratnakar 1684c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1694c60005fSKalesh AP { 1704c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1714c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1724c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 17377be8c1cSKalesh AP addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS || 1744c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1754c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1764c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1774c60005fSKalesh AP return true; 1784c60005fSKalesh AP else 1794c60005fSKalesh AP return false; 1804c60005fSKalesh AP } 1814c60005fSKalesh AP 182559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 183559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 184559b633fSSathya Perla */ 185559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 186559b633fSSathya Perla struct be_mcc_compl *compl, 187559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 188559b633fSSathya Perla { 189559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 190559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 191559b633fSSathya Perla 192559b633fSSathya Perla if (resp_hdr) { 193559b633fSSathya Perla opcode = resp_hdr->opcode; 194559b633fSSathya Perla subsystem = resp_hdr->subsystem; 195559b633fSSathya Perla } 196559b633fSSathya Perla 197559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 198559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 199559b633fSSathya Perla complete(&adapter->et_cmd_compl); 200559b633fSSathya Perla return; 201559b633fSSathya Perla } 202559b633fSSathya Perla 2039c855975SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE && 2049c855975SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 2059c855975SSuresh Reddy complete(&adapter->et_cmd_compl); 2069c855975SSuresh Reddy return; 2079c855975SSuresh Reddy } 2089c855975SSuresh Reddy 209559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 210559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 211559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 212559b633fSSathya Perla adapter->flash_status = compl->status; 213559b633fSSathya Perla complete(&adapter->et_cmd_compl); 214559b633fSSathya Perla return; 215559b633fSSathya Perla } 216559b633fSSathya Perla 217559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 218559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 219559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 220559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 221559b633fSSathya Perla be_parse_stats(adapter); 222559b633fSSathya Perla adapter->stats_cmd_sent = false; 223559b633fSSathya Perla return; 224559b633fSSathya Perla } 225559b633fSSathya Perla 226559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 227559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 228559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 229559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 230559b633fSSathya Perla (void *)resp_hdr; 23129e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 232559b633fSSathya Perla resp->on_die_temperature; 233559b633fSSathya Perla } else { 234559b633fSSathya Perla adapter->be_get_temp_freq = 0; 23529e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 23629e9122bSVenkata Duvvuru BE_INVALID_DIE_TEMP; 237559b633fSSathya Perla } 238559b633fSSathya Perla return; 239559b633fSSathya Perla } 240559b633fSSathya Perla } 241559b633fSSathya Perla 2429aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 2439aebddd1SJeff Kirsher struct be_mcc_compl *compl) 2449aebddd1SJeff Kirsher { 2454c60005fSKalesh AP enum mcc_base_status base_status; 2464c60005fSKalesh AP enum mcc_addl_status addl_status; 247652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 248652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 2499aebddd1SJeff Kirsher 2509aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 2519aebddd1SJeff Kirsher * from mcc_wrb */ 2529aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 2539aebddd1SJeff Kirsher 2544c60005fSKalesh AP base_status = base_status(compl->status); 2554c60005fSKalesh AP addl_status = addl_status(compl->status); 25696c9b2e4SVasundhara Volam 257652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 258652bf646SPadmanabh Ratnakar if (resp_hdr) { 259652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 260652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 261652bf646SPadmanabh Ratnakar } 262652bf646SPadmanabh Ratnakar 263559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2645eeff635SSuresh Reddy 265559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 266559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 267fa5c867dSSuresh Reddy if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST || 268fa5c867dSSuresh Reddy addl_status == MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES) { 26997f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 270522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 27197f1d8cdSVasundhara Volam opcode, subsystem); 2729aebddd1SJeff Kirsher } else { 27397f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 27497f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2754c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2769aebddd1SJeff Kirsher } 2779aebddd1SJeff Kirsher } 2784c60005fSKalesh AP return compl->status; 2799aebddd1SJeff Kirsher } 2809aebddd1SJeff Kirsher 2819aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2829aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2833acf19d9SSathya Perla struct be_mcc_compl *compl) 2849aebddd1SJeff Kirsher { 2853acf19d9SSathya Perla struct be_async_event_link_state *evt = 2863acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2873acf19d9SSathya Perla 288b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 28942f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 290b236916aSAjit Khaparde 291bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 292bdce2ad7SSuresh Reddy * notification for physical and logical link. 293bdce2ad7SSuresh Reddy * On other chips just process the logical link 294bdce2ad7SSuresh Reddy * status notification 295bdce2ad7SSuresh Reddy */ 296bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2972e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2982e177a5cSPadmanabh Ratnakar return; 2992e177a5cSPadmanabh Ratnakar 300b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 301b236916aSAjit Khaparde * it may not be received in some cases. 302b236916aSAjit Khaparde */ 303b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 304bdce2ad7SSuresh Reddy be_link_status_update(adapter, 305bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 3069aebddd1SJeff Kirsher } 3079aebddd1SJeff Kirsher 30821252377SVasundhara Volam static void be_async_port_misconfig_event_process(struct be_adapter *adapter, 30921252377SVasundhara Volam struct be_mcc_compl *compl) 31021252377SVasundhara Volam { 31121252377SVasundhara Volam struct be_async_event_misconfig_port *evt = 31221252377SVasundhara Volam (struct be_async_event_misconfig_port *)compl; 31351d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word1 = le32_to_cpu(evt->event_data_word1); 31451d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word2 = le32_to_cpu(evt->event_data_word2); 31551d1f98aSAjit Khaparde u8 phy_oper_state = PHY_STATE_OPER_MSG_NONE; 31621252377SVasundhara Volam struct device *dev = &adapter->pdev->dev; 31751d1f98aSAjit Khaparde u8 msg_severity = DEFAULT_MSG_SEVERITY; 31851d1f98aSAjit Khaparde u8 phy_state_info; 31951d1f98aSAjit Khaparde u8 new_phy_state; 32021252377SVasundhara Volam 32151d1f98aSAjit Khaparde new_phy_state = 32251d1f98aSAjit Khaparde (sfp_misconfig_evt_word1 >> (adapter->hba_port_num * 8)) & 0xff; 32321252377SVasundhara Volam 32451d1f98aSAjit Khaparde if (new_phy_state == adapter->phy_state) 32551d1f98aSAjit Khaparde return; 32651d1f98aSAjit Khaparde 32751d1f98aSAjit Khaparde adapter->phy_state = new_phy_state; 32851d1f98aSAjit Khaparde 32951d1f98aSAjit Khaparde /* for older fw that doesn't populate link effect data */ 33051d1f98aSAjit Khaparde if (!sfp_misconfig_evt_word2) 33151d1f98aSAjit Khaparde goto log_message; 33251d1f98aSAjit Khaparde 33351d1f98aSAjit Khaparde phy_state_info = 33451d1f98aSAjit Khaparde (sfp_misconfig_evt_word2 >> (adapter->hba_port_num * 8)) & 0xff; 33551d1f98aSAjit Khaparde 33651d1f98aSAjit Khaparde if (phy_state_info & PHY_STATE_INFO_VALID) { 33751d1f98aSAjit Khaparde msg_severity = (phy_state_info & PHY_STATE_MSG_SEVERITY) >> 1; 33851d1f98aSAjit Khaparde 33951d1f98aSAjit Khaparde if (be_phy_unqualified(new_phy_state)) 34051d1f98aSAjit Khaparde phy_oper_state = (phy_state_info & PHY_STATE_OPER); 34151d1f98aSAjit Khaparde } 34251d1f98aSAjit Khaparde 34351d1f98aSAjit Khaparde log_message: 34421252377SVasundhara Volam /* Log an error message that would allow a user to determine 34521252377SVasundhara Volam * whether the SFPs have an issue 34621252377SVasundhara Volam */ 34751d1f98aSAjit Khaparde if (be_phy_state_unknown(new_phy_state)) 34851d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 34951d1f98aSAjit Khaparde "Port %c: Unrecognized Optics state: 0x%x. %s", 35051d1f98aSAjit Khaparde adapter->port_name, 35151d1f98aSAjit Khaparde new_phy_state, 35251d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35351d1f98aSAjit Khaparde else 35451d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35551d1f98aSAjit Khaparde "Port %c: %s %s", 35651d1f98aSAjit Khaparde adapter->port_name, 35751d1f98aSAjit Khaparde be_misconfig_evt_port_state[new_phy_state], 35851d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35921252377SVasundhara Volam 36051d1f98aSAjit Khaparde /* Log Vendor name and part no. if a misconfigured SFP is detected */ 36151d1f98aSAjit Khaparde if (be_phy_misconfigured(new_phy_state)) 36251d1f98aSAjit Khaparde adapter->flags |= BE_FLAGS_PHY_MISCONFIGURED; 36321252377SVasundhara Volam } 36421252377SVasundhara Volam 3659aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 3669aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 3673acf19d9SSathya Perla struct be_mcc_compl *compl) 3689aebddd1SJeff Kirsher { 3693acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 3703acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 3713acf19d9SSathya Perla 3729aebddd1SJeff Kirsher if (evt->valid) { 3739aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 374fdf81bfbSSathya Perla adapter->recommended_prio_bits = 3759aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 3769aebddd1SJeff Kirsher } 3779aebddd1SJeff Kirsher } 3789aebddd1SJeff Kirsher 379323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 3809aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 3813acf19d9SSathya Perla struct be_mcc_compl *compl) 3829aebddd1SJeff Kirsher { 3833acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 3843acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 3853acf19d9SSathya Perla 386323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 387323ff71eSSathya Perla evt->physical_port == adapter->port_num) 388323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 3899aebddd1SJeff Kirsher } 3909aebddd1SJeff Kirsher 3919aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 3929aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 3933acf19d9SSathya Perla struct be_mcc_compl *compl) 3949aebddd1SJeff Kirsher { 3953acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 3963acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 3973acf19d9SSathya Perla 398bdac85b5SRavikumar Nelavelli if (evt->enabled) { 399939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 400bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 401bdac85b5SRavikumar Nelavelli } else { 4029aebddd1SJeff Kirsher adapter->pvid = 0; 4039aebddd1SJeff Kirsher } 404bdac85b5SRavikumar Nelavelli } 4059aebddd1SJeff Kirsher 406760c295eSVenkata Duvvuru #define MGMT_ENABLE_MASK 0x4 407760c295eSVenkata Duvvuru static void be_async_grp5_fw_control_process(struct be_adapter *adapter, 408760c295eSVenkata Duvvuru struct be_mcc_compl *compl) 409760c295eSVenkata Duvvuru { 410760c295eSVenkata Duvvuru struct be_async_fw_control *evt = (struct be_async_fw_control *)compl; 411760c295eSVenkata Duvvuru u32 evt_dw1 = le32_to_cpu(evt->event_data_word1); 412760c295eSVenkata Duvvuru 413760c295eSVenkata Duvvuru if (evt_dw1 & MGMT_ENABLE_MASK) { 414760c295eSVenkata Duvvuru adapter->flags |= BE_FLAGS_OS2BMC; 415760c295eSVenkata Duvvuru adapter->bmc_filt_mask = le32_to_cpu(evt->event_data_word2); 416760c295eSVenkata Duvvuru } else { 417760c295eSVenkata Duvvuru adapter->flags &= ~BE_FLAGS_OS2BMC; 418760c295eSVenkata Duvvuru } 419760c295eSVenkata Duvvuru } 420760c295eSVenkata Duvvuru 4219aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 4223acf19d9SSathya Perla struct be_mcc_compl *compl) 4239aebddd1SJeff Kirsher { 4243acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4253acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 4269aebddd1SJeff Kirsher 4279aebddd1SJeff Kirsher switch (event_type) { 4289aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 4293acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 4309aebddd1SJeff Kirsher break; 4319aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 4323acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 4339aebddd1SJeff Kirsher break; 4349aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 4353acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 4369aebddd1SJeff Kirsher break; 437760c295eSVenkata Duvvuru /* Async event to disable/enable os2bmc and/or mac-learning */ 438760c295eSVenkata Duvvuru case ASYNC_EVENT_FW_CONTROL: 439760c295eSVenkata Duvvuru be_async_grp5_fw_control_process(adapter, compl); 440760c295eSVenkata Duvvuru break; 4419aebddd1SJeff Kirsher default: 4429aebddd1SJeff Kirsher break; 4439aebddd1SJeff Kirsher } 4449aebddd1SJeff Kirsher } 4459aebddd1SJeff Kirsher 446bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 4473acf19d9SSathya Perla struct be_mcc_compl *cmp) 448bc0c3405SAjit Khaparde { 449bc0c3405SAjit Khaparde u8 event_type = 0; 450bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 451bc0c3405SAjit Khaparde 4523acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4533acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 454bc0c3405SAjit Khaparde 455bc0c3405SAjit Khaparde switch (event_type) { 456bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 457bc0c3405SAjit Khaparde if (evt->valid) 458bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 459bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 460bc0c3405SAjit Khaparde break; 461bc0c3405SAjit Khaparde default: 46205ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 46305ccaa2bSVasundhara Volam event_type); 464bc0c3405SAjit Khaparde break; 465bc0c3405SAjit Khaparde } 466bc0c3405SAjit Khaparde } 467bc0c3405SAjit Khaparde 46821252377SVasundhara Volam static void be_async_sliport_evt_process(struct be_adapter *adapter, 46921252377SVasundhara Volam struct be_mcc_compl *cmp) 47021252377SVasundhara Volam { 47121252377SVasundhara Volam u8 event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 47221252377SVasundhara Volam ASYNC_EVENT_TYPE_MASK; 47321252377SVasundhara Volam 47421252377SVasundhara Volam if (event_type == ASYNC_EVENT_PORT_MISCONFIG) 47521252377SVasundhara Volam be_async_port_misconfig_event_process(adapter, cmp); 47621252377SVasundhara Volam } 47721252377SVasundhara Volam 4783acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 4799aebddd1SJeff Kirsher { 4803acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4819aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 4829aebddd1SJeff Kirsher } 4839aebddd1SJeff Kirsher 4843acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 4859aebddd1SJeff Kirsher { 4863acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4873acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 4889aebddd1SJeff Kirsher } 4899aebddd1SJeff Kirsher 4903acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 491bc0c3405SAjit Khaparde { 4923acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4933acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 4943acf19d9SSathya Perla } 4953acf19d9SSathya Perla 49621252377SVasundhara Volam static inline bool is_sliport_evt(u32 flags) 49721252377SVasundhara Volam { 49821252377SVasundhara Volam return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 49921252377SVasundhara Volam ASYNC_EVENT_CODE_SLIPORT; 50021252377SVasundhara Volam } 50121252377SVasundhara Volam 5023acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 5033acf19d9SSathya Perla struct be_mcc_compl *compl) 5043acf19d9SSathya Perla { 5053acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 5063acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 5073acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 5083acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 5093acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 5103acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 51121252377SVasundhara Volam else if (is_sliport_evt(compl->flags)) 51221252377SVasundhara Volam be_async_sliport_evt_process(adapter, compl); 513bc0c3405SAjit Khaparde } 514bc0c3405SAjit Khaparde 5159aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 5169aebddd1SJeff Kirsher { 5179aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 5189aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 5199aebddd1SJeff Kirsher 5209aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5219aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 5229aebddd1SJeff Kirsher return compl; 5239aebddd1SJeff Kirsher } 5249aebddd1SJeff Kirsher return NULL; 5259aebddd1SJeff Kirsher } 5269aebddd1SJeff Kirsher 5279aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 5289aebddd1SJeff Kirsher { 5299aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 5309aebddd1SJeff Kirsher 5319aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 5329aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 5339aebddd1SJeff Kirsher 5349aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 5359aebddd1SJeff Kirsher } 5369aebddd1SJeff Kirsher 5379aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 5389aebddd1SJeff Kirsher { 539a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 540a323d9bfSSathya Perla 5419aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 542a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 543a323d9bfSSathya Perla 544a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 5459aebddd1SJeff Kirsher } 5469aebddd1SJeff Kirsher 54710ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 5489aebddd1SJeff Kirsher { 5499aebddd1SJeff Kirsher struct be_mcc_compl *compl; 55010ef9ab4SSathya Perla int num = 0, status = 0; 5519aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5529aebddd1SJeff Kirsher 553*d6765985SPetr Oros spin_lock(&adapter->mcc_cq_lock); 5543acf19d9SSathya Perla 5559aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 5569aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 5573acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 5589aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 55910ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 5609aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 5619aebddd1SJeff Kirsher } 5629aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5639aebddd1SJeff Kirsher num++; 5649aebddd1SJeff Kirsher } 5659aebddd1SJeff Kirsher 56610ef9ab4SSathya Perla if (num) 56710ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 56810ef9ab4SSathya Perla 569*d6765985SPetr Oros spin_unlock(&adapter->mcc_cq_lock); 57010ef9ab4SSathya Perla return status; 5719aebddd1SJeff Kirsher } 5729aebddd1SJeff Kirsher 5739aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 5749aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 5759aebddd1SJeff Kirsher { 576b7172414SSathya Perla #define mcc_timeout 12000 /* 12s timeout */ 57710ef9ab4SSathya Perla int i, status = 0; 5789aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5799aebddd1SJeff Kirsher 5806589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 581954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 5829aebddd1SJeff Kirsher return -EIO; 5839aebddd1SJeff Kirsher 584*d6765985SPetr Oros local_bh_disable(); 58510ef9ab4SSathya Perla status = be_process_mcc(adapter); 586*d6765985SPetr Oros local_bh_enable(); 5879aebddd1SJeff Kirsher 5889aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 5899aebddd1SJeff Kirsher break; 590b7172414SSathya Perla usleep_range(500, 1000); 5919aebddd1SJeff Kirsher } 5929aebddd1SJeff Kirsher if (i == mcc_timeout) { 5936589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 594954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 595652bf646SPadmanabh Ratnakar return -EIO; 5969aebddd1SJeff Kirsher } 5979aebddd1SJeff Kirsher return status; 5989aebddd1SJeff Kirsher } 5999aebddd1SJeff Kirsher 6009aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 6019aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 6029aebddd1SJeff Kirsher { 603652bf646SPadmanabh Ratnakar int status; 604652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 605652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 606b0fd2eb2Sajit.khaparde@broadcom.com u32 index = mcc_obj->q.head; 607652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 608652bf646SPadmanabh Ratnakar 609652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 610652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 611652bf646SPadmanabh Ratnakar 612652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 613652bf646SPadmanabh Ratnakar 614efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 615efaa408eSSuresh Reddy if (status) 616efaa408eSSuresh Reddy goto out; 617652bf646SPadmanabh Ratnakar 618652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 619652bf646SPadmanabh Ratnakar if (status == -EIO) 620652bf646SPadmanabh Ratnakar goto out; 621652bf646SPadmanabh Ratnakar 6224c60005fSKalesh AP status = (resp->base_status | 6234c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 6244c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 625652bf646SPadmanabh Ratnakar out: 626652bf646SPadmanabh Ratnakar return status; 6279aebddd1SJeff Kirsher } 6289aebddd1SJeff Kirsher 6299aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 6309aebddd1SJeff Kirsher { 6319aebddd1SJeff Kirsher int msecs = 0; 6329aebddd1SJeff Kirsher u32 ready; 6339aebddd1SJeff Kirsher 6346589ade0SSathya Perla do { 635954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 6369aebddd1SJeff Kirsher return -EIO; 6379aebddd1SJeff Kirsher 6389aebddd1SJeff Kirsher ready = ioread32(db); 639434b3648SSathya Perla if (ready == 0xffffffff) 6409aebddd1SJeff Kirsher return -1; 6419aebddd1SJeff Kirsher 6429aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 6439aebddd1SJeff Kirsher if (ready) 6449aebddd1SJeff Kirsher break; 6459aebddd1SJeff Kirsher 6469aebddd1SJeff Kirsher if (msecs > 4000) { 6476589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 648954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 649f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 6509aebddd1SJeff Kirsher return -1; 6519aebddd1SJeff Kirsher } 6529aebddd1SJeff Kirsher 6539aebddd1SJeff Kirsher msleep(1); 6549aebddd1SJeff Kirsher msecs++; 6559aebddd1SJeff Kirsher } while (true); 6569aebddd1SJeff Kirsher 6579aebddd1SJeff Kirsher return 0; 6589aebddd1SJeff Kirsher } 6599aebddd1SJeff Kirsher 6609aebddd1SJeff Kirsher /* 6619aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 6629aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 6639aebddd1SJeff Kirsher */ 6649aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 6659aebddd1SJeff Kirsher { 6669aebddd1SJeff Kirsher int status; 6679aebddd1SJeff Kirsher u32 val = 0; 6689aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 6699aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6709aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 6719aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 6729aebddd1SJeff Kirsher 6739aebddd1SJeff Kirsher /* wait for ready to be set */ 6749aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6759aebddd1SJeff Kirsher if (status != 0) 6769aebddd1SJeff Kirsher return status; 6779aebddd1SJeff Kirsher 6789aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 6799aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 6809aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 6819aebddd1SJeff Kirsher iowrite32(val, db); 6829aebddd1SJeff Kirsher 6839aebddd1SJeff Kirsher /* wait for ready to be set */ 6849aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6859aebddd1SJeff Kirsher if (status != 0) 6869aebddd1SJeff Kirsher return status; 6879aebddd1SJeff Kirsher 6889aebddd1SJeff Kirsher val = 0; 6899aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 6909aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 6919aebddd1SJeff Kirsher iowrite32(val, db); 6929aebddd1SJeff Kirsher 6939aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6949aebddd1SJeff Kirsher if (status != 0) 6959aebddd1SJeff Kirsher return status; 6969aebddd1SJeff Kirsher 6979aebddd1SJeff Kirsher /* A cq entry has been made now */ 6989aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 6999aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 7009aebddd1SJeff Kirsher be_mcc_compl_use(compl); 7019aebddd1SJeff Kirsher if (status) 7029aebddd1SJeff Kirsher return status; 7039aebddd1SJeff Kirsher } else { 7049aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 7059aebddd1SJeff Kirsher return -1; 7069aebddd1SJeff Kirsher } 7079aebddd1SJeff Kirsher return 0; 7089aebddd1SJeff Kirsher } 7099aebddd1SJeff Kirsher 710710f3e59SSriharsha Basavapatna u16 be_POST_stage_get(struct be_adapter *adapter) 7119aebddd1SJeff Kirsher { 7129aebddd1SJeff Kirsher u32 sem; 7139aebddd1SJeff Kirsher 714c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 715c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 7169aebddd1SJeff Kirsher else 717c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 718c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 719c5b3ad4cSSathya Perla 720c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 7219aebddd1SJeff Kirsher } 7229aebddd1SJeff Kirsher 72387f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 724bf99e50dSPadmanabh Ratnakar { 725bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 726bf99e50dSPadmanabh Ratnakar u32 sliport_status; 727e673244aSKalesh AP int i; 728bf99e50dSPadmanabh Ratnakar 729bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 730bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 731bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 7329fa465c0SSathya Perla return 0; 7339fa465c0SSathya Perla 7349fa465c0SSathya Perla if (sliport_status & SLIPORT_STATUS_ERR_MASK && 7359fa465c0SSathya Perla !(sliport_status & SLIPORT_STATUS_RN_MASK)) 7369fa465c0SSathya Perla return -EIO; 737bf99e50dSPadmanabh Ratnakar 738bf99e50dSPadmanabh Ratnakar msleep(1000); 739bf99e50dSPadmanabh Ratnakar } 740bf99e50dSPadmanabh Ratnakar 741e673244aSKalesh AP return sliport_status ? : -1; 742bf99e50dSPadmanabh Ratnakar } 743bf99e50dSPadmanabh Ratnakar 744bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 7459aebddd1SJeff Kirsher { 7469aebddd1SJeff Kirsher u16 stage; 7479aebddd1SJeff Kirsher int status, timeout = 0; 7489aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 7499aebddd1SJeff Kirsher 750bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 751bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 752e673244aSKalesh AP if (status) { 753e673244aSKalesh AP stage = status; 754e673244aSKalesh AP goto err; 755e673244aSKalesh AP } 756e673244aSKalesh AP return 0; 757bf99e50dSPadmanabh Ratnakar } 758bf99e50dSPadmanabh Ratnakar 7599aebddd1SJeff Kirsher do { 760ca3de6b2SSathya Perla /* There's no means to poll POST state on BE2/3 VFs */ 761ca3de6b2SSathya Perla if (BEx_chip(adapter) && be_virtfn(adapter)) 762ca3de6b2SSathya Perla return 0; 763ca3de6b2SSathya Perla 764c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 76566d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 76666d29cbcSGavin Shan return 0; 76766d29cbcSGavin Shan 768a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 7699aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 7709aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 7719aebddd1SJeff Kirsher return -EINTR; 7729aebddd1SJeff Kirsher } 7739aebddd1SJeff Kirsher timeout += 2; 7743ab81b5fSSomnath Kotur } while (timeout < 60); 7759aebddd1SJeff Kirsher 776e673244aSKalesh AP err: 777e673244aSKalesh AP dev_err(dev, "POST timeout; stage=%#x\n", stage); 7789fa465c0SSathya Perla return -ETIMEDOUT; 7799aebddd1SJeff Kirsher } 7809aebddd1SJeff Kirsher 7819aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 7829aebddd1SJeff Kirsher { 7839aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 7849aebddd1SJeff Kirsher } 7859aebddd1SJeff Kirsher 786a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 787bea50988SSathya Perla { 788bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 789bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 790bea50988SSathya Perla } 7919aebddd1SJeff Kirsher 7929aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 793106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 794106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 795106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 796a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 797a2cc4e0bSSathya Perla struct be_dma_mem *mem) 7989aebddd1SJeff Kirsher { 799106df1e3SSomnath Kotur struct be_sge *sge; 800106df1e3SSomnath Kotur 8019aebddd1SJeff Kirsher req_hdr->opcode = opcode; 8029aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 8039aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 8049aebddd1SJeff Kirsher req_hdr->version = 0; 805bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 806106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 807106df1e3SSomnath Kotur if (mem) { 808106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 809106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 810106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 811106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 812106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 813106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 814106df1e3SSomnath Kotur } else 815106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 816106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 8179aebddd1SJeff Kirsher } 8189aebddd1SJeff Kirsher 8199aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 8209aebddd1SJeff Kirsher struct be_dma_mem *mem) 8219aebddd1SJeff Kirsher { 8229aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 8239aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 8249aebddd1SJeff Kirsher 8259aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 8269aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 8279aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 8289aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 8299aebddd1SJeff Kirsher } 8309aebddd1SJeff Kirsher } 8319aebddd1SJeff Kirsher 8329aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 8339aebddd1SJeff Kirsher { 8349aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 8359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 8369aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 8379aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8389aebddd1SJeff Kirsher return wrb; 8399aebddd1SJeff Kirsher } 8409aebddd1SJeff Kirsher 8419aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 8429aebddd1SJeff Kirsher { 8439aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 8449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8459aebddd1SJeff Kirsher 846aa790db9SPadmanabh Ratnakar if (!mccq->created) 847aa790db9SPadmanabh Ratnakar return NULL; 848aa790db9SPadmanabh Ratnakar 8494d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 8509aebddd1SJeff Kirsher return NULL; 8519aebddd1SJeff Kirsher 8529aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 8539aebddd1SJeff Kirsher queue_head_inc(mccq); 8549aebddd1SJeff Kirsher atomic_inc(&mccq->used); 8559aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8569aebddd1SJeff Kirsher return wrb; 8579aebddd1SJeff Kirsher } 8589aebddd1SJeff Kirsher 859bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 860bea50988SSathya Perla { 861bea50988SSathya Perla return adapter->mcc_obj.q.created; 862bea50988SSathya Perla } 863bea50988SSathya Perla 864bea50988SSathya Perla /* Must be used only in process context */ 865bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 866bea50988SSathya Perla { 867bea50988SSathya Perla if (use_mcc(adapter)) { 868b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 869bea50988SSathya Perla return 0; 870bea50988SSathya Perla } else { 871bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 872bea50988SSathya Perla } 873bea50988SSathya Perla } 874bea50988SSathya Perla 875bea50988SSathya Perla /* Must be used only in process context */ 876bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 877bea50988SSathya Perla { 878bea50988SSathya Perla if (use_mcc(adapter)) 879b7172414SSathya Perla return mutex_unlock(&adapter->mcc_lock); 880bea50988SSathya Perla else 881bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 882bea50988SSathya Perla } 883bea50988SSathya Perla 884bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 885bea50988SSathya Perla struct be_mcc_wrb *wrb) 886bea50988SSathya Perla { 887bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 888bea50988SSathya Perla 889bea50988SSathya Perla if (use_mcc(adapter)) { 890bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 891bea50988SSathya Perla if (!dest_wrb) 892bea50988SSathya Perla return NULL; 893bea50988SSathya Perla } else { 894bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 895bea50988SSathya Perla } 896bea50988SSathya Perla 897bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 898bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 899bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 900bea50988SSathya Perla 901bea50988SSathya Perla return dest_wrb; 902bea50988SSathya Perla } 903bea50988SSathya Perla 904bea50988SSathya Perla /* Must be used only in process context */ 905bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 906bea50988SSathya Perla struct be_mcc_wrb *wrb) 907bea50988SSathya Perla { 908bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 909bea50988SSathya Perla int status; 910bea50988SSathya Perla 911bea50988SSathya Perla status = be_cmd_lock(adapter); 912bea50988SSathya Perla if (status) 913bea50988SSathya Perla return status; 914bea50988SSathya Perla 915bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 9160c884567SSuresh Reddy if (!dest_wrb) { 9170c884567SSuresh Reddy status = -EBUSY; 9180c884567SSuresh Reddy goto unlock; 9190c884567SSuresh Reddy } 920bea50988SSathya Perla 921bea50988SSathya Perla if (use_mcc(adapter)) 922bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 923bea50988SSathya Perla else 924bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 925bea50988SSathya Perla 926bea50988SSathya Perla if (!status) 927bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 928bea50988SSathya Perla 9290c884567SSuresh Reddy unlock: 930bea50988SSathya Perla be_cmd_unlock(adapter); 931bea50988SSathya Perla return status; 932bea50988SSathya Perla } 933bea50988SSathya Perla 9349aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 9359aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9369aebddd1SJeff Kirsher */ 9379aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 9389aebddd1SJeff Kirsher { 9399aebddd1SJeff Kirsher u8 *wrb; 9409aebddd1SJeff Kirsher int status; 9419aebddd1SJeff Kirsher 942bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 943bf99e50dSPadmanabh Ratnakar return 0; 944bf99e50dSPadmanabh Ratnakar 9459aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9469aebddd1SJeff Kirsher return -1; 9479aebddd1SJeff Kirsher 9489aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9499aebddd1SJeff Kirsher *wrb++ = 0xFF; 9509aebddd1SJeff Kirsher *wrb++ = 0x12; 9519aebddd1SJeff Kirsher *wrb++ = 0x34; 9529aebddd1SJeff Kirsher *wrb++ = 0xFF; 9539aebddd1SJeff Kirsher *wrb++ = 0xFF; 9549aebddd1SJeff Kirsher *wrb++ = 0x56; 9559aebddd1SJeff Kirsher *wrb++ = 0x78; 9569aebddd1SJeff Kirsher *wrb = 0xFF; 9579aebddd1SJeff Kirsher 9589aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9599aebddd1SJeff Kirsher 9609aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9619aebddd1SJeff Kirsher return status; 9629aebddd1SJeff Kirsher } 9639aebddd1SJeff Kirsher 9649aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 9659aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9669aebddd1SJeff Kirsher */ 9679aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 9689aebddd1SJeff Kirsher { 9699aebddd1SJeff Kirsher u8 *wrb; 9709aebddd1SJeff Kirsher int status; 9719aebddd1SJeff Kirsher 972bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 973bf99e50dSPadmanabh Ratnakar return 0; 974bf99e50dSPadmanabh Ratnakar 9759aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9769aebddd1SJeff Kirsher return -1; 9779aebddd1SJeff Kirsher 9789aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9799aebddd1SJeff Kirsher *wrb++ = 0xFF; 9809aebddd1SJeff Kirsher *wrb++ = 0xAA; 9819aebddd1SJeff Kirsher *wrb++ = 0xBB; 9829aebddd1SJeff Kirsher *wrb++ = 0xFF; 9839aebddd1SJeff Kirsher *wrb++ = 0xFF; 9849aebddd1SJeff Kirsher *wrb++ = 0xCC; 9859aebddd1SJeff Kirsher *wrb++ = 0xDD; 9869aebddd1SJeff Kirsher *wrb = 0xFF; 9879aebddd1SJeff Kirsher 9889aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9899aebddd1SJeff Kirsher 9909aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9919aebddd1SJeff Kirsher return status; 9929aebddd1SJeff Kirsher } 993bf99e50dSPadmanabh Ratnakar 994f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 9959aebddd1SJeff Kirsher { 9969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9979aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 998f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 999f2f781a7SSathya Perla int status, ver = 0; 10009aebddd1SJeff Kirsher 10019aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10029aebddd1SJeff Kirsher return -1; 10039aebddd1SJeff Kirsher 10049aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10059aebddd1SJeff Kirsher req = embedded_payload(wrb); 10069aebddd1SJeff Kirsher 1007106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1008a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 1009a2cc4e0bSSathya Perla NULL); 10109aebddd1SJeff Kirsher 1011f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 1012f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 1013f2f781a7SSathya Perla ver = 2; 1014f2f781a7SSathya Perla 1015f2f781a7SSathya Perla req->hdr.version = ver; 10169aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10179aebddd1SJeff Kirsher 10189aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 10199aebddd1SJeff Kirsher /* 4byte eqe*/ 10209aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 10219aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 1022f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 10239aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 10249aebddd1SJeff Kirsher 10259aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10269aebddd1SJeff Kirsher 10279aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10289aebddd1SJeff Kirsher if (!status) { 10299aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 103003d28ffeSKalesh AP 1031f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 1032f2f781a7SSathya Perla eqo->msix_idx = 1033f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 1034f2f781a7SSathya Perla eqo->q.created = true; 10359aebddd1SJeff Kirsher } 10369aebddd1SJeff Kirsher 10379aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10389aebddd1SJeff Kirsher return status; 10399aebddd1SJeff Kirsher } 10409aebddd1SJeff Kirsher 1041f9449ab7SSathya Perla /* Use MCC */ 10429aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 10435ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 10449aebddd1SJeff Kirsher { 10459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10469aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 10479aebddd1SJeff Kirsher int status; 10489aebddd1SJeff Kirsher 1049b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10509aebddd1SJeff Kirsher 1051f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1052f9449ab7SSathya Perla if (!wrb) { 1053f9449ab7SSathya Perla status = -EBUSY; 1054f9449ab7SSathya Perla goto err; 1055f9449ab7SSathya Perla } 10569aebddd1SJeff Kirsher req = embedded_payload(wrb); 10579aebddd1SJeff Kirsher 1058106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1059a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 1060a2cc4e0bSSathya Perla NULL); 10615ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 10629aebddd1SJeff Kirsher if (permanent) { 10639aebddd1SJeff Kirsher req->permanent = 1; 10649aebddd1SJeff Kirsher } else { 10659aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 1066590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 10679aebddd1SJeff Kirsher req->permanent = 0; 10689aebddd1SJeff Kirsher } 10699aebddd1SJeff Kirsher 1070f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 10719aebddd1SJeff Kirsher if (!status) { 10729aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 107303d28ffeSKalesh AP 10749aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 10759aebddd1SJeff Kirsher } 10769aebddd1SJeff Kirsher 1077f9449ab7SSathya Perla err: 1078b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 10799aebddd1SJeff Kirsher return status; 10809aebddd1SJeff Kirsher } 10819aebddd1SJeff Kirsher 10829aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 10839aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 10849aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 10859aebddd1SJeff Kirsher { 10869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10879aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 10889aebddd1SJeff Kirsher int status; 10899aebddd1SJeff Kirsher 1090b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10919aebddd1SJeff Kirsher 10929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10939aebddd1SJeff Kirsher if (!wrb) { 10949aebddd1SJeff Kirsher status = -EBUSY; 10959aebddd1SJeff Kirsher goto err; 10969aebddd1SJeff Kirsher } 10979aebddd1SJeff Kirsher req = embedded_payload(wrb); 10989aebddd1SJeff Kirsher 1099106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1100a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 1101a2cc4e0bSSathya Perla NULL); 11029aebddd1SJeff Kirsher 11039aebddd1SJeff Kirsher req->hdr.domain = domain; 11049aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11059aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 11069aebddd1SJeff Kirsher 11079aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11089aebddd1SJeff Kirsher if (!status) { 11099aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 111003d28ffeSKalesh AP 11119aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11129aebddd1SJeff Kirsher } 11139aebddd1SJeff Kirsher 11149aebddd1SJeff Kirsher err: 1115b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1116e3a7ae2cSSomnath Kotur 1117fe68d8bfSIvan Vecera if (base_status(status) == MCC_STATUS_UNAUTHORIZED_REQUEST) 1118e3a7ae2cSSomnath Kotur status = -EPERM; 1119e3a7ae2cSSomnath Kotur 11209aebddd1SJeff Kirsher return status; 11219aebddd1SJeff Kirsher } 11229aebddd1SJeff Kirsher 11239aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 112430128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 11259aebddd1SJeff Kirsher { 11269aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11279aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 11289aebddd1SJeff Kirsher int status; 11299aebddd1SJeff Kirsher 113030128031SSathya Perla if (pmac_id == -1) 113130128031SSathya Perla return 0; 113230128031SSathya Perla 1133b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 11349aebddd1SJeff Kirsher 11359aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11369aebddd1SJeff Kirsher if (!wrb) { 11379aebddd1SJeff Kirsher status = -EBUSY; 11389aebddd1SJeff Kirsher goto err; 11399aebddd1SJeff Kirsher } 11409aebddd1SJeff Kirsher req = embedded_payload(wrb); 11419aebddd1SJeff Kirsher 1142106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1143cd3307aaSKalesh AP OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), 1144cd3307aaSKalesh AP wrb, NULL); 11459aebddd1SJeff Kirsher 11469aebddd1SJeff Kirsher req->hdr.domain = dom; 11479aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11489aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11519aebddd1SJeff Kirsher 11529aebddd1SJeff Kirsher err: 1153b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 11549aebddd1SJeff Kirsher return status; 11559aebddd1SJeff Kirsher } 11569aebddd1SJeff Kirsher 11579aebddd1SJeff Kirsher /* Uses Mbox */ 115810ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 115910ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 11609aebddd1SJeff Kirsher { 11619aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11629aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 11639aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 11649aebddd1SJeff Kirsher void *ctxt; 11659aebddd1SJeff Kirsher int status; 11669aebddd1SJeff Kirsher 11679aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11689aebddd1SJeff Kirsher return -1; 11699aebddd1SJeff Kirsher 11709aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11719aebddd1SJeff Kirsher req = embedded_payload(wrb); 11729aebddd1SJeff Kirsher ctxt = &req->context; 11739aebddd1SJeff Kirsher 1174106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1175a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1176a2cc4e0bSSathya Perla NULL); 11779aebddd1SJeff Kirsher 11789aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1179bbdc42f8SAjit Khaparde 1180bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 11819aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 11829aebddd1SJeff Kirsher coalesce_wm); 11839aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 11849aebddd1SJeff Kirsher ctxt, no_delay); 11859aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 11869aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 11879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 11889aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 11899aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1190bbdc42f8SAjit Khaparde } else { 1191bbdc42f8SAjit Khaparde req->hdr.version = 2; 1192bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 119309e83a9dSAjit Khaparde 119409e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 119509e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 119609e83a9dSAjit Khaparde */ 119709e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 119809e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 119909e83a9dSAjit Khaparde ctxt, coalesce_wm); 1200bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1201bbdc42f8SAjit Khaparde no_delay); 1202bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1203bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1204bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1205a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1206a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 12079aebddd1SJeff Kirsher } 12089aebddd1SJeff Kirsher 12099aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12129aebddd1SJeff Kirsher 12139aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12149aebddd1SJeff Kirsher if (!status) { 12159aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 121603d28ffeSKalesh AP 12179aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 12189aebddd1SJeff Kirsher cq->created = true; 12199aebddd1SJeff Kirsher } 12209aebddd1SJeff Kirsher 12219aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12229aebddd1SJeff Kirsher 12239aebddd1SJeff Kirsher return status; 12249aebddd1SJeff Kirsher } 12259aebddd1SJeff Kirsher 12269aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 12279aebddd1SJeff Kirsher { 12289aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 122903d28ffeSKalesh AP 12309aebddd1SJeff Kirsher if (len_encoded == 16) 12319aebddd1SJeff Kirsher len_encoded = 0; 12329aebddd1SJeff Kirsher return len_encoded; 12339aebddd1SJeff Kirsher } 12349aebddd1SJeff Kirsher 12354188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 12369aebddd1SJeff Kirsher struct be_queue_info *mccq, 12379aebddd1SJeff Kirsher struct be_queue_info *cq) 12389aebddd1SJeff Kirsher { 12399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12409aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 12419aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 12429aebddd1SJeff Kirsher void *ctxt; 12439aebddd1SJeff Kirsher int status; 12449aebddd1SJeff Kirsher 12459aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12469aebddd1SJeff Kirsher return -1; 12479aebddd1SJeff Kirsher 12489aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12499aebddd1SJeff Kirsher req = embedded_payload(wrb); 12509aebddd1SJeff Kirsher ctxt = &req->context; 12519aebddd1SJeff Kirsher 1252106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1253a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1254a2cc4e0bSSathya Perla NULL); 12559aebddd1SJeff Kirsher 12569aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1257666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 12589aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12599aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12609aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12619aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1262666d39c7SVasundhara Volam } else { 1263666d39c7SVasundhara Volam req->hdr.version = 1; 1264666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1265666d39c7SVasundhara Volam 1266666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1267666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1268666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1269666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1270666d39c7SVasundhara Volam ctxt, cq->id); 1271666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1272666d39c7SVasundhara Volam ctxt, 1); 12739aebddd1SJeff Kirsher } 12749aebddd1SJeff Kirsher 127521252377SVasundhara Volam /* Subscribe to Link State, Sliport Event and Group 5 Events 127621252377SVasundhara Volam * (bits 1, 5 and 17 set) 127721252377SVasundhara Volam */ 127821252377SVasundhara Volam req->async_event_bitmap[0] = 127921252377SVasundhara Volam cpu_to_le32(BIT(ASYNC_EVENT_CODE_LINK_STATE) | 128021252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_GRP_5) | 128121252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_QNQ) | 128221252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_SLIPORT)); 128321252377SVasundhara Volam 12849aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12859aebddd1SJeff Kirsher 12869aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12879aebddd1SJeff Kirsher 12889aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12899aebddd1SJeff Kirsher if (!status) { 12909aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 129103d28ffeSKalesh AP 12929aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12939aebddd1SJeff Kirsher mccq->created = true; 12949aebddd1SJeff Kirsher } 12959aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12969aebddd1SJeff Kirsher 12979aebddd1SJeff Kirsher return status; 12989aebddd1SJeff Kirsher } 12999aebddd1SJeff Kirsher 13004188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 13019aebddd1SJeff Kirsher struct be_queue_info *mccq, 13029aebddd1SJeff Kirsher struct be_queue_info *cq) 13039aebddd1SJeff Kirsher { 13049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13059aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 13069aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 13079aebddd1SJeff Kirsher void *ctxt; 13089aebddd1SJeff Kirsher int status; 13099aebddd1SJeff Kirsher 13109aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13119aebddd1SJeff Kirsher return -1; 13129aebddd1SJeff Kirsher 13139aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13149aebddd1SJeff Kirsher req = embedded_payload(wrb); 13159aebddd1SJeff Kirsher ctxt = &req->context; 13169aebddd1SJeff Kirsher 1317106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1318a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1319a2cc4e0bSSathya Perla NULL); 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 13229aebddd1SJeff Kirsher 13239aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 13249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 13259aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 13269aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 13279aebddd1SJeff Kirsher 13289aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 13299aebddd1SJeff Kirsher 13309aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13319aebddd1SJeff Kirsher 13329aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13339aebddd1SJeff Kirsher if (!status) { 13349aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 133503d28ffeSKalesh AP 13369aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 13379aebddd1SJeff Kirsher mccq->created = true; 13389aebddd1SJeff Kirsher } 13399aebddd1SJeff Kirsher 13409aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13419aebddd1SJeff Kirsher return status; 13429aebddd1SJeff Kirsher } 13439aebddd1SJeff Kirsher 13449aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1345a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 13469aebddd1SJeff Kirsher { 13479aebddd1SJeff Kirsher int status; 13489aebddd1SJeff Kirsher 13499aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1350666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 13519aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 13529aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 13539aebddd1SJeff Kirsher "and FCoE traffic"); 13549aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 13559aebddd1SJeff Kirsher } 13569aebddd1SJeff Kirsher return status; 13579aebddd1SJeff Kirsher } 13589aebddd1SJeff Kirsher 135994d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 13609aebddd1SJeff Kirsher { 13617707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 13629aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 136394d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 136494d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 13659aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 136694d73aaaSVasundhara Volam int status, ver = 0; 13679aebddd1SJeff Kirsher 13687707133cSSathya Perla req = embedded_payload(&wrb); 1369106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 13707707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 13719aebddd1SJeff Kirsher 13729aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 13739aebddd1SJeff Kirsher req->hdr.version = 1; 137494d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 137594d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 137694d73aaaSVasundhara Volam req->hdr.version = 2; 137794d73aaaSVasundhara Volam } else { /* For SH */ 137894d73aaaSVasundhara Volam req->hdr.version = 2; 13799aebddd1SJeff Kirsher } 13809aebddd1SJeff Kirsher 138181b02655SVasundhara Volam if (req->hdr.version > 0) 138281b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 13839aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 13849aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 13859aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 138694d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 138794d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 13889aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 138994d73aaaSVasundhara Volam ver = req->hdr.version; 139094d73aaaSVasundhara Volam 13917707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13929aebddd1SJeff Kirsher if (!status) { 13937707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 139403d28ffeSKalesh AP 13959aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 139694d73aaaSVasundhara Volam if (ver == 2) 139794d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 139894d73aaaSVasundhara Volam else 139994d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 14009aebddd1SJeff Kirsher txq->created = true; 14019aebddd1SJeff Kirsher } 14029aebddd1SJeff Kirsher 14039aebddd1SJeff Kirsher return status; 14049aebddd1SJeff Kirsher } 14059aebddd1SJeff Kirsher 14069aebddd1SJeff Kirsher /* Uses MCC */ 14079aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 14089aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 140910ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 14109aebddd1SJeff Kirsher { 14119aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14129aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 14139aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 14149aebddd1SJeff Kirsher int status; 14159aebddd1SJeff Kirsher 1416b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 14179aebddd1SJeff Kirsher 14189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14199aebddd1SJeff Kirsher if (!wrb) { 14209aebddd1SJeff Kirsher status = -EBUSY; 14219aebddd1SJeff Kirsher goto err; 14229aebddd1SJeff Kirsher } 14239aebddd1SJeff Kirsher req = embedded_payload(wrb); 14249aebddd1SJeff Kirsher 1425106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1426106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 14279aebddd1SJeff Kirsher 14289aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 14299aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 14309aebddd1SJeff Kirsher req->num_pages = 2; 14319aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 14329aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 143310ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 14349aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 14359aebddd1SJeff Kirsher 14369aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14379aebddd1SJeff Kirsher if (!status) { 14389aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 143903d28ffeSKalesh AP 14409aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 14419aebddd1SJeff Kirsher rxq->created = true; 14429aebddd1SJeff Kirsher *rss_id = resp->rss_id; 14439aebddd1SJeff Kirsher } 14449aebddd1SJeff Kirsher 14459aebddd1SJeff Kirsher err: 1446b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 14479aebddd1SJeff Kirsher return status; 14489aebddd1SJeff Kirsher } 14499aebddd1SJeff Kirsher 14509aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 14519aebddd1SJeff Kirsher * Uses Mbox 14529aebddd1SJeff Kirsher */ 14539aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 14549aebddd1SJeff Kirsher int queue_type) 14559aebddd1SJeff Kirsher { 14569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14579aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 14589aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 14599aebddd1SJeff Kirsher int status; 14609aebddd1SJeff Kirsher 14619aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 14629aebddd1SJeff Kirsher return -1; 14639aebddd1SJeff Kirsher 14649aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 14659aebddd1SJeff Kirsher req = embedded_payload(wrb); 14669aebddd1SJeff Kirsher 14679aebddd1SJeff Kirsher switch (queue_type) { 14689aebddd1SJeff Kirsher case QTYPE_EQ: 14699aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14709aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 14719aebddd1SJeff Kirsher break; 14729aebddd1SJeff Kirsher case QTYPE_CQ: 14739aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14749aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 14759aebddd1SJeff Kirsher break; 14769aebddd1SJeff Kirsher case QTYPE_TXQ: 14779aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14789aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 14799aebddd1SJeff Kirsher break; 14809aebddd1SJeff Kirsher case QTYPE_RXQ: 14819aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14829aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 14839aebddd1SJeff Kirsher break; 14849aebddd1SJeff Kirsher case QTYPE_MCCQ: 14859aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14869aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 14879aebddd1SJeff Kirsher break; 14889aebddd1SJeff Kirsher default: 14899aebddd1SJeff Kirsher BUG(); 14909aebddd1SJeff Kirsher } 14919aebddd1SJeff Kirsher 1492106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1493106df1e3SSomnath Kotur NULL); 14949aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14959aebddd1SJeff Kirsher 14969aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 14979aebddd1SJeff Kirsher q->created = false; 14989aebddd1SJeff Kirsher 14999aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 15009aebddd1SJeff Kirsher return status; 15019aebddd1SJeff Kirsher } 15029aebddd1SJeff Kirsher 15039aebddd1SJeff Kirsher /* Uses MCC */ 15049aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 15059aebddd1SJeff Kirsher { 15069aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15079aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 15089aebddd1SJeff Kirsher int status; 15099aebddd1SJeff Kirsher 1510b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15119aebddd1SJeff Kirsher 15129aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15139aebddd1SJeff Kirsher if (!wrb) { 15149aebddd1SJeff Kirsher status = -EBUSY; 15159aebddd1SJeff Kirsher goto err; 15169aebddd1SJeff Kirsher } 15179aebddd1SJeff Kirsher req = embedded_payload(wrb); 15189aebddd1SJeff Kirsher 1519106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1520106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 15219aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 15229aebddd1SJeff Kirsher 15239aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15249aebddd1SJeff Kirsher q->created = false; 15259aebddd1SJeff Kirsher 15269aebddd1SJeff Kirsher err: 1527b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 15289aebddd1SJeff Kirsher return status; 15299aebddd1SJeff Kirsher } 15309aebddd1SJeff Kirsher 15319aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1532bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 15339aebddd1SJeff Kirsher */ 15349aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 15351578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 15369aebddd1SJeff Kirsher { 1537bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 15389aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 15399aebddd1SJeff Kirsher int status; 15409aebddd1SJeff Kirsher 1541bea50988SSathya Perla req = embedded_payload(&wrb); 1542106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1543a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1544a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 15459aebddd1SJeff Kirsher req->hdr.domain = domain; 15469aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 15479aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1548f9449ab7SSathya Perla req->pmac_invalid = true; 15499aebddd1SJeff Kirsher 1550bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 15519aebddd1SJeff Kirsher if (!status) { 1552bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 155303d28ffeSKalesh AP 15549aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1555b5bb9776SSathya Perla 1556b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 155718c57c74SKalesh AP if (BE3_chip(adapter) && be_virtfn(adapter)) 1558b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 15599aebddd1SJeff Kirsher } 15609aebddd1SJeff Kirsher return status; 15619aebddd1SJeff Kirsher } 15629aebddd1SJeff Kirsher 156362219066SAjit Khaparde /* Uses MCCQ if available else MBOX */ 156430128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 15659aebddd1SJeff Kirsher { 156662219066SAjit Khaparde struct be_mcc_wrb wrb = {0}; 15679aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 15689aebddd1SJeff Kirsher int status; 15699aebddd1SJeff Kirsher 157030128031SSathya Perla if (interface_id == -1) 1571f9449ab7SSathya Perla return 0; 15729aebddd1SJeff Kirsher 157362219066SAjit Khaparde req = embedded_payload(&wrb); 15749aebddd1SJeff Kirsher 1575106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1576a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 157762219066SAjit Khaparde sizeof(*req), &wrb, NULL); 15789aebddd1SJeff Kirsher req->hdr.domain = domain; 15799aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 15809aebddd1SJeff Kirsher 158162219066SAjit Khaparde status = be_cmd_notify_wait(adapter, &wrb); 15829aebddd1SJeff Kirsher return status; 15839aebddd1SJeff Kirsher } 15849aebddd1SJeff Kirsher 15859aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 15869aebddd1SJeff Kirsher * WRB but is a separate dma memory block 15879aebddd1SJeff Kirsher * Uses asynchronous MCC 15889aebddd1SJeff Kirsher */ 15899aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 15909aebddd1SJeff Kirsher { 15919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15929aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 15939aebddd1SJeff Kirsher int status = 0; 15949aebddd1SJeff Kirsher 1595b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15969aebddd1SJeff Kirsher 15979aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15989aebddd1SJeff Kirsher if (!wrb) { 15999aebddd1SJeff Kirsher status = -EBUSY; 16009aebddd1SJeff Kirsher goto err; 16019aebddd1SJeff Kirsher } 16029aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 16039aebddd1SJeff Kirsher 1604106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1605a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1606a2cc4e0bSSathya Perla nonemb_cmd); 16079aebddd1SJeff Kirsher 1608ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 160961000861SAjit Khaparde if (BE2_chip(adapter)) 161061000861SAjit Khaparde hdr->version = 0; 161161000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 16129aebddd1SJeff Kirsher hdr->version = 1; 161361000861SAjit Khaparde else 161461000861SAjit Khaparde hdr->version = 2; 16159aebddd1SJeff Kirsher 1616efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1617efaa408eSSuresh Reddy if (status) 1618efaa408eSSuresh Reddy goto err; 1619efaa408eSSuresh Reddy 16209aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16219aebddd1SJeff Kirsher 16229aebddd1SJeff Kirsher err: 1623b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16249aebddd1SJeff Kirsher return status; 16259aebddd1SJeff Kirsher } 16269aebddd1SJeff Kirsher 16279aebddd1SJeff Kirsher /* Lancer Stats */ 16289aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 16299aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 16309aebddd1SJeff Kirsher { 16319aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16329aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 16339aebddd1SJeff Kirsher int status = 0; 16349aebddd1SJeff Kirsher 1635f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1636f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1637f25b119cSPadmanabh Ratnakar return -EPERM; 1638f25b119cSPadmanabh Ratnakar 1639b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16409aebddd1SJeff Kirsher 16419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16429aebddd1SJeff Kirsher if (!wrb) { 16439aebddd1SJeff Kirsher status = -EBUSY; 16449aebddd1SJeff Kirsher goto err; 16459aebddd1SJeff Kirsher } 16469aebddd1SJeff Kirsher req = nonemb_cmd->va; 16479aebddd1SJeff Kirsher 1648106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1649a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1650a2cc4e0bSSathya Perla wrb, nonemb_cmd); 16519aebddd1SJeff Kirsher 1652d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 16539aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 16549aebddd1SJeff Kirsher 1655efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1656efaa408eSSuresh Reddy if (status) 1657efaa408eSSuresh Reddy goto err; 1658efaa408eSSuresh Reddy 16599aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16609aebddd1SJeff Kirsher 16619aebddd1SJeff Kirsher err: 1662b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16639aebddd1SJeff Kirsher return status; 16649aebddd1SJeff Kirsher } 16659aebddd1SJeff Kirsher 1666323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1667323ff71eSSathya Perla { 1668323ff71eSSathya Perla switch (mac_speed) { 1669323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1670323ff71eSSathya Perla return 0; 1671323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1672323ff71eSSathya Perla return 10; 1673323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1674323ff71eSSathya Perla return 100; 1675323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1676323ff71eSSathya Perla return 1000; 1677323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1678323ff71eSSathya Perla return 10000; 1679b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1680b971f847SVasundhara Volam return 20000; 1681b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1682b971f847SVasundhara Volam return 25000; 1683b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1684b971f847SVasundhara Volam return 40000; 1685323ff71eSSathya Perla } 1686323ff71eSSathya Perla return 0; 1687323ff71eSSathya Perla } 1688323ff71eSSathya Perla 1689323ff71eSSathya Perla /* Uses synchronous mcc 1690323ff71eSSathya Perla * Returns link_speed in Mbps 1691323ff71eSSathya Perla */ 1692323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1693323ff71eSSathya Perla u8 *link_status, u32 dom) 16949aebddd1SJeff Kirsher { 16959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16969aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 16979aebddd1SJeff Kirsher int status; 16989aebddd1SJeff Kirsher 1699b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17009aebddd1SJeff Kirsher 1701b236916aSAjit Khaparde if (link_status) 1702b236916aSAjit Khaparde *link_status = LINK_DOWN; 1703b236916aSAjit Khaparde 17049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17059aebddd1SJeff Kirsher if (!wrb) { 17069aebddd1SJeff Kirsher status = -EBUSY; 17079aebddd1SJeff Kirsher goto err; 17089aebddd1SJeff Kirsher } 17099aebddd1SJeff Kirsher req = embedded_payload(wrb); 17109aebddd1SJeff Kirsher 171157cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1712a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1713a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 171457cd80d4SPadmanabh Ratnakar 1715ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1716ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1717daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1718daad6167SPadmanabh Ratnakar 171957cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 17209aebddd1SJeff Kirsher 17219aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17229aebddd1SJeff Kirsher if (!status) { 17239aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 172403d28ffeSKalesh AP 1725323ff71eSSathya Perla if (link_speed) { 1726323ff71eSSathya Perla *link_speed = resp->link_speed ? 1727323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1728323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1729323ff71eSSathya Perla 1730323ff71eSSathya Perla if (!resp->logical_link_status) 1731323ff71eSSathya Perla *link_speed = 0; 17329aebddd1SJeff Kirsher } 1733b236916aSAjit Khaparde if (link_status) 1734b236916aSAjit Khaparde *link_status = resp->logical_link_status; 17359aebddd1SJeff Kirsher } 17369aebddd1SJeff Kirsher 17379aebddd1SJeff Kirsher err: 1738b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17399aebddd1SJeff Kirsher return status; 17409aebddd1SJeff Kirsher } 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher /* Uses synchronous mcc */ 17439aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 17449aebddd1SJeff Kirsher { 17459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17469aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1747117affe3SVasundhara Volam int status = 0; 17489aebddd1SJeff Kirsher 1749b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17509aebddd1SJeff Kirsher 17519aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17529aebddd1SJeff Kirsher if (!wrb) { 17539aebddd1SJeff Kirsher status = -EBUSY; 17549aebddd1SJeff Kirsher goto err; 17559aebddd1SJeff Kirsher } 17569aebddd1SJeff Kirsher req = embedded_payload(wrb); 17579aebddd1SJeff Kirsher 1758106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1759a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1760a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 17619aebddd1SJeff Kirsher 1762efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 17639aebddd1SJeff Kirsher err: 1764b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17659aebddd1SJeff Kirsher return status; 17669aebddd1SJeff Kirsher } 17679aebddd1SJeff Kirsher 17689aebddd1SJeff Kirsher /* Uses synchronous mcc */ 1769fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size) 17709aebddd1SJeff Kirsher { 1771fd7ff6f0SVenkat Duvvuru struct be_mcc_wrb wrb = {0}; 17729aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17739aebddd1SJeff Kirsher int status; 17749aebddd1SJeff Kirsher 1775fd7ff6f0SVenkat Duvvuru req = embedded_payload(&wrb); 17769aebddd1SJeff Kirsher 1777106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1778fd7ff6f0SVenkat Duvvuru OPCODE_COMMON_MANAGE_FAT, sizeof(*req), 1779fd7ff6f0SVenkat Duvvuru &wrb, NULL); 17809aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 1781fd7ff6f0SVenkat Duvvuru status = be_cmd_notify_wait(adapter, &wrb); 17829aebddd1SJeff Kirsher if (!status) { 1783fd7ff6f0SVenkat Duvvuru struct be_cmd_resp_get_fat *resp = embedded_payload(&wrb); 178403d28ffeSKalesh AP 1785fd7ff6f0SVenkat Duvvuru if (dump_size && resp->log_size) 1786fd7ff6f0SVenkat Duvvuru *dump_size = le32_to_cpu(resp->log_size) - 17879aebddd1SJeff Kirsher sizeof(u32); 17889aebddd1SJeff Kirsher } 17899aebddd1SJeff Kirsher return status; 17909aebddd1SJeff Kirsher } 17919aebddd1SJeff Kirsher 1792fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf) 17939aebddd1SJeff Kirsher { 17949aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 17959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17969aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17979aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 17989aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1799fd7ff6f0SVenkat Duvvuru int status; 18009aebddd1SJeff Kirsher 18019aebddd1SJeff Kirsher if (buf_len == 0) 1802fd7ff6f0SVenkat Duvvuru return 0; 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher total_size = buf_len; 18059aebddd1SJeff Kirsher 18069aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1807750afb08SLuis Chamberlain get_fat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 18089aebddd1SJeff Kirsher get_fat_cmd.size, 1809e51000dbSSriharsha Basavapatna &get_fat_cmd.dma, GFP_ATOMIC); 1810fd7ff6f0SVenkat Duvvuru if (!get_fat_cmd.va) 1811c5f156deSVasundhara Volam return -ENOMEM; 18129aebddd1SJeff Kirsher 1813b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18149aebddd1SJeff Kirsher 18159aebddd1SJeff Kirsher while (total_size) { 18169aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 18179aebddd1SJeff Kirsher total_size -= buf_size; 18189aebddd1SJeff Kirsher 18199aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18209aebddd1SJeff Kirsher if (!wrb) { 18219aebddd1SJeff Kirsher status = -EBUSY; 18229aebddd1SJeff Kirsher goto err; 18239aebddd1SJeff Kirsher } 18249aebddd1SJeff Kirsher req = get_fat_cmd.va; 18259aebddd1SJeff Kirsher 18269aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1827106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1828a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1829a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 18309aebddd1SJeff Kirsher 18319aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 18329aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 18339aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 18349aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 18359aebddd1SJeff Kirsher 18369aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18379aebddd1SJeff Kirsher if (!status) { 18389aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 183903d28ffeSKalesh AP 18409aebddd1SJeff Kirsher memcpy(buf + offset, 18419aebddd1SJeff Kirsher resp->data_buffer, 184292aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 18439aebddd1SJeff Kirsher } else { 18449aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 18459aebddd1SJeff Kirsher goto err; 18469aebddd1SJeff Kirsher } 18479aebddd1SJeff Kirsher offset += buf_size; 18489aebddd1SJeff Kirsher log_offset += buf_size; 18499aebddd1SJeff Kirsher } 18509aebddd1SJeff Kirsher err: 1851e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_fat_cmd.size, 1852a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 1853b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1854c5f156deSVasundhara Volam return status; 18559aebddd1SJeff Kirsher } 18569aebddd1SJeff Kirsher 185704b71175SSathya Perla /* Uses synchronous mcc */ 1858e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 18599aebddd1SJeff Kirsher { 18609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18619aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 18629aebddd1SJeff Kirsher int status; 18639aebddd1SJeff Kirsher 1864b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18659aebddd1SJeff Kirsher 186604b71175SSathya Perla wrb = wrb_from_mccq(adapter); 186704b71175SSathya Perla if (!wrb) { 186804b71175SSathya Perla status = -EBUSY; 186904b71175SSathya Perla goto err; 187004b71175SSathya Perla } 187104b71175SSathya Perla 18729aebddd1SJeff Kirsher req = embedded_payload(wrb); 18739aebddd1SJeff Kirsher 1874106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1875a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1876a2cc4e0bSSathya Perla NULL); 187704b71175SSathya Perla status = be_mcc_notify_wait(adapter); 18789aebddd1SJeff Kirsher if (!status) { 18799aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1880acbafeb1SSathya Perla 1881242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1882242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1883242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1884242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 18859aebddd1SJeff Kirsher } 188604b71175SSathya Perla err: 1887b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 18889aebddd1SJeff Kirsher return status; 18899aebddd1SJeff Kirsher } 18909aebddd1SJeff Kirsher 18919aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 18929aebddd1SJeff Kirsher * Uses async mcc 18939aebddd1SJeff Kirsher */ 1894b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1895b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 18969aebddd1SJeff Kirsher { 18979aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18989aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 18992632bafdSSathya Perla int status = 0, i; 19009aebddd1SJeff Kirsher 1901b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19029aebddd1SJeff Kirsher 19039aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19049aebddd1SJeff Kirsher if (!wrb) { 19059aebddd1SJeff Kirsher status = -EBUSY; 19069aebddd1SJeff Kirsher goto err; 19079aebddd1SJeff Kirsher } 19089aebddd1SJeff Kirsher req = embedded_payload(wrb); 19099aebddd1SJeff Kirsher 1910106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1911a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1912a2cc4e0bSSathya Perla NULL); 19139aebddd1SJeff Kirsher 19142632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 19152632bafdSSathya Perla for (i = 0; i < num; i++) { 19162632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 19172632bafdSSathya Perla req->set_eqd[i].phase = 0; 19182632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 19192632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 19202632bafdSSathya Perla } 19219aebddd1SJeff Kirsher 1922efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 19239aebddd1SJeff Kirsher err: 1924b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19259aebddd1SJeff Kirsher return status; 19269aebddd1SJeff Kirsher } 19279aebddd1SJeff Kirsher 192893676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 192993676703SKalesh AP int num) 193093676703SKalesh AP { 193193676703SKalesh AP int num_eqs, i = 0; 193293676703SKalesh AP 193393676703SKalesh AP while (num) { 193493676703SKalesh AP num_eqs = min(num, 8); 193593676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 193693676703SKalesh AP i += num_eqs; 193793676703SKalesh AP num -= num_eqs; 193893676703SKalesh AP } 193993676703SKalesh AP 194093676703SKalesh AP return 0; 194193676703SKalesh AP } 194293676703SKalesh AP 19439aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 19449aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1945435452aaSVasundhara Volam u32 num, u32 domain) 19469aebddd1SJeff Kirsher { 19479aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19489aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 19499aebddd1SJeff Kirsher int status; 19509aebddd1SJeff Kirsher 1951b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19529aebddd1SJeff Kirsher 19539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19549aebddd1SJeff Kirsher if (!wrb) { 19559aebddd1SJeff Kirsher status = -EBUSY; 19569aebddd1SJeff Kirsher goto err; 19579aebddd1SJeff Kirsher } 19589aebddd1SJeff Kirsher req = embedded_payload(wrb); 19599aebddd1SJeff Kirsher 1960106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1961a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1962a2cc4e0bSSathya Perla wrb, NULL); 1963435452aaSVasundhara Volam req->hdr.domain = domain; 19649aebddd1SJeff Kirsher 19659aebddd1SJeff Kirsher req->interface_id = if_id; 1966012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 19679aebddd1SJeff Kirsher req->num_vlan = num; 19689aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 19699aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 19709aebddd1SJeff Kirsher 19719aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19729aebddd1SJeff Kirsher err: 1973b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19749aebddd1SJeff Kirsher return status; 19759aebddd1SJeff Kirsher } 19769aebddd1SJeff Kirsher 1977ac34b743SSathya Perla static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 19789aebddd1SJeff Kirsher { 19799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19809aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 19819aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 19829aebddd1SJeff Kirsher int status; 19839aebddd1SJeff Kirsher 1984b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19859aebddd1SJeff Kirsher 19869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19879aebddd1SJeff Kirsher if (!wrb) { 19889aebddd1SJeff Kirsher status = -EBUSY; 19899aebddd1SJeff Kirsher goto err; 19909aebddd1SJeff Kirsher } 19919aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1992106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1993106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1994106df1e3SSomnath Kotur wrb, mem); 19959aebddd1SJeff Kirsher 19969aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1997ac34b743SSathya Perla req->if_flags_mask = cpu_to_le32(flags); 1998ac34b743SSathya Perla req->if_flags = (value == ON) ? req->if_flags_mask : 0; 1999d9d604f8SAjit Khaparde 2000ac34b743SSathya Perla if (flags & BE_IF_FLAGS_MULTICAST) { 2001b7172414SSathya Perla int i; 20029aebddd1SJeff Kirsher 20031610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 20041610c79fSPadmanabh Ratnakar * and not setting flags field 20051610c79fSPadmanabh Ratnakar */ 20061610c79fSPadmanabh Ratnakar req->if_flags_mask |= 2007abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 200892bf14abSSathya Perla be_if_cap_flags(adapter)); 2009b7172414SSathya Perla req->mcast_num = cpu_to_le32(adapter->mc_count); 2010b7172414SSathya Perla for (i = 0; i < adapter->mc_count; i++) 2011b7172414SSathya Perla ether_addr_copy(req->mcast_mac[i].byte, 2012b7172414SSathya Perla adapter->mc_list[i].mac); 20139aebddd1SJeff Kirsher } 20149aebddd1SJeff Kirsher 2015b6588879SSathya Perla status = be_mcc_notify_wait(adapter); 20169aebddd1SJeff Kirsher err: 2017b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 20189aebddd1SJeff Kirsher return status; 20199aebddd1SJeff Kirsher } 20209aebddd1SJeff Kirsher 2021ac34b743SSathya Perla int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 2022ac34b743SSathya Perla { 2023ac34b743SSathya Perla struct device *dev = &adapter->pdev->dev; 2024ac34b743SSathya Perla 2025ac34b743SSathya Perla if ((flags & be_if_cap_flags(adapter)) != flags) { 2026ac34b743SSathya Perla dev_warn(dev, "Cannot set rx filter flags 0x%x\n", flags); 2027ac34b743SSathya Perla dev_warn(dev, "Interface is capable of 0x%x flags only\n", 2028ac34b743SSathya Perla be_if_cap_flags(adapter)); 2029ac34b743SSathya Perla } 2030ac34b743SSathya Perla flags &= be_if_cap_flags(adapter); 2031196e3735SKalesh AP if (!flags) 2032196e3735SKalesh AP return -ENOTSUPP; 2033ac34b743SSathya Perla 2034ac34b743SSathya Perla return __be_cmd_rx_filter(adapter, flags, value); 2035ac34b743SSathya Perla } 2036ac34b743SSathya Perla 20379aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 20389aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 20399aebddd1SJeff Kirsher { 20409aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20419aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 20429aebddd1SJeff Kirsher int status; 20439aebddd1SJeff Kirsher 2044f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 2045f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2046f25b119cSPadmanabh Ratnakar return -EPERM; 2047f25b119cSPadmanabh Ratnakar 2048b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20499aebddd1SJeff Kirsher 20509aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20519aebddd1SJeff Kirsher if (!wrb) { 20529aebddd1SJeff Kirsher status = -EBUSY; 20539aebddd1SJeff Kirsher goto err; 20549aebddd1SJeff Kirsher } 20559aebddd1SJeff Kirsher req = embedded_payload(wrb); 20569aebddd1SJeff Kirsher 2057106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2058a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 2059a2cc4e0bSSathya Perla wrb, NULL); 20609aebddd1SJeff Kirsher 2061b29812c1SSuresh Reddy req->hdr.version = 1; 20629aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 20639aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 20649aebddd1SJeff Kirsher 20659aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20669aebddd1SJeff Kirsher 20679aebddd1SJeff Kirsher err: 2068b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2069b29812c1SSuresh Reddy 2070b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 2071b29812c1SSuresh Reddy return -EOPNOTSUPP; 2072b29812c1SSuresh Reddy 20739aebddd1SJeff Kirsher return status; 20749aebddd1SJeff Kirsher } 20759aebddd1SJeff Kirsher 20769aebddd1SJeff Kirsher /* Uses sycn mcc */ 20779aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 20789aebddd1SJeff Kirsher { 20799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20809aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20819aebddd1SJeff Kirsher int status; 20829aebddd1SJeff Kirsher 2083f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2084f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2085f25b119cSPadmanabh Ratnakar return -EPERM; 2086f25b119cSPadmanabh Ratnakar 2087b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20889aebddd1SJeff Kirsher 20899aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20909aebddd1SJeff Kirsher if (!wrb) { 20919aebddd1SJeff Kirsher status = -EBUSY; 20929aebddd1SJeff Kirsher goto err; 20939aebddd1SJeff Kirsher } 20949aebddd1SJeff Kirsher req = embedded_payload(wrb); 20959aebddd1SJeff Kirsher 2096106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2097a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2098a2cc4e0bSSathya Perla wrb, NULL); 20999aebddd1SJeff Kirsher 21009aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21019aebddd1SJeff Kirsher if (!status) { 21029aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 21039aebddd1SJeff Kirsher embedded_payload(wrb); 210403d28ffeSKalesh AP 21059aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 21069aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 21079aebddd1SJeff Kirsher } 21089aebddd1SJeff Kirsher 21099aebddd1SJeff Kirsher err: 2110b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 21119aebddd1SJeff Kirsher return status; 21129aebddd1SJeff Kirsher } 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher /* Uses mbox */ 2115e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 21169aebddd1SJeff Kirsher { 21179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21189aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 21199aebddd1SJeff Kirsher int status; 21209aebddd1SJeff Kirsher 21219aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21229aebddd1SJeff Kirsher return -1; 21239aebddd1SJeff Kirsher 21249aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21259aebddd1SJeff Kirsher req = embedded_payload(wrb); 21269aebddd1SJeff Kirsher 2127106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2128a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2129a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21309aebddd1SJeff Kirsher 21319aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21329aebddd1SJeff Kirsher if (!status) { 21339aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 213403d28ffeSKalesh AP 2135e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2136e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2137e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2138e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2139acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2140acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2141acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 21429aebddd1SJeff Kirsher } 21439aebddd1SJeff Kirsher 21449aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21459aebddd1SJeff Kirsher return status; 21469aebddd1SJeff Kirsher } 21479aebddd1SJeff Kirsher 21489aebddd1SJeff Kirsher /* Uses mbox */ 21499aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 21509aebddd1SJeff Kirsher { 21519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21529aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 21539aebddd1SJeff Kirsher int status; 21549aebddd1SJeff Kirsher 2155bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2156bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2157bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 21589fa465c0SSathya Perla status = lancer_wait_ready(adapter); 21599fa465c0SSathya Perla if (status) 2160bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2161bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2162bf99e50dSPadmanabh Ratnakar return status; 2163bf99e50dSPadmanabh Ratnakar } 2164bf99e50dSPadmanabh Ratnakar 21659aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21669aebddd1SJeff Kirsher return -1; 21679aebddd1SJeff Kirsher 21689aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21699aebddd1SJeff Kirsher req = embedded_payload(wrb); 21709aebddd1SJeff Kirsher 2171106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2172a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2173a2cc4e0bSSathya Perla NULL); 21749aebddd1SJeff Kirsher 21759aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21769aebddd1SJeff Kirsher 21779aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21789aebddd1SJeff Kirsher return status; 21799aebddd1SJeff Kirsher } 21809aebddd1SJeff Kirsher 2181594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 218233cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21839aebddd1SJeff Kirsher { 21849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21859aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21869aebddd1SJeff Kirsher int status; 21879aebddd1SJeff Kirsher 2188da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2189da1388d6SVasundhara Volam return 0; 2190da1388d6SVasundhara Volam 2191b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 21929aebddd1SJeff Kirsher 2193b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2194b51aa367SKalesh AP if (!wrb) { 2195b51aa367SKalesh AP status = -EBUSY; 2196b51aa367SKalesh AP goto err; 2197b51aa367SKalesh AP } 21989aebddd1SJeff Kirsher req = embedded_payload(wrb); 21999aebddd1SJeff Kirsher 2200106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2201106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 22029aebddd1SJeff Kirsher 22039aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2204594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 22059aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2206594ad54aSSuresh Reddy 2207b51aa367SKalesh AP if (!BEx_chip(adapter)) 2208594ad54aSSuresh Reddy req->hdr.version = 1; 2209594ad54aSSuresh Reddy 22109aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2211e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 22129aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 22139aebddd1SJeff Kirsher 2214b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2215b51aa367SKalesh AP err: 2216b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22179aebddd1SJeff Kirsher return status; 22189aebddd1SJeff Kirsher } 22199aebddd1SJeff Kirsher 22209aebddd1SJeff Kirsher /* Uses sync mcc */ 22219aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 22229aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 22239aebddd1SJeff Kirsher { 22249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22259aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 22269aebddd1SJeff Kirsher int status; 22279aebddd1SJeff Kirsher 2228b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22299aebddd1SJeff Kirsher 22309aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22319aebddd1SJeff Kirsher if (!wrb) { 22329aebddd1SJeff Kirsher status = -EBUSY; 22339aebddd1SJeff Kirsher goto err; 22349aebddd1SJeff Kirsher } 22359aebddd1SJeff Kirsher req = embedded_payload(wrb); 22369aebddd1SJeff Kirsher 2237106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2238a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2239a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 22409aebddd1SJeff Kirsher 22419aebddd1SJeff Kirsher req->port_num = port_num; 22429aebddd1SJeff Kirsher req->beacon_state = state; 22439aebddd1SJeff Kirsher req->beacon_duration = bcn; 22449aebddd1SJeff Kirsher req->status_duration = sts; 22459aebddd1SJeff Kirsher 22469aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22479aebddd1SJeff Kirsher 22489aebddd1SJeff Kirsher err: 2249b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22509aebddd1SJeff Kirsher return status; 22519aebddd1SJeff Kirsher } 22529aebddd1SJeff Kirsher 22539aebddd1SJeff Kirsher /* Uses sync mcc */ 22549aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 22559aebddd1SJeff Kirsher { 22569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22579aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 22589aebddd1SJeff Kirsher int status; 22599aebddd1SJeff Kirsher 2260b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22619aebddd1SJeff Kirsher 22629aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22639aebddd1SJeff Kirsher if (!wrb) { 22649aebddd1SJeff Kirsher status = -EBUSY; 22659aebddd1SJeff Kirsher goto err; 22669aebddd1SJeff Kirsher } 22679aebddd1SJeff Kirsher req = embedded_payload(wrb); 22689aebddd1SJeff Kirsher 2269106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2270a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2271a2cc4e0bSSathya Perla wrb, NULL); 22729aebddd1SJeff Kirsher 22739aebddd1SJeff Kirsher req->port_num = port_num; 22749aebddd1SJeff Kirsher 22759aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22769aebddd1SJeff Kirsher if (!status) { 22779aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22789aebddd1SJeff Kirsher embedded_payload(wrb); 227903d28ffeSKalesh AP 22809aebddd1SJeff Kirsher *state = resp->beacon_state; 22819aebddd1SJeff Kirsher } 22829aebddd1SJeff Kirsher 22839aebddd1SJeff Kirsher err: 2284b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22859aebddd1SJeff Kirsher return status; 22869aebddd1SJeff Kirsher } 22879aebddd1SJeff Kirsher 2288e36edd9dSMark Leonard /* Uses sync mcc */ 2289e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2290e36edd9dSMark Leonard u8 page_num, u8 *data) 2291e36edd9dSMark Leonard { 2292e36edd9dSMark Leonard struct be_dma_mem cmd; 2293e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2294e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2295e36edd9dSMark Leonard int status; 2296e36edd9dSMark Leonard 2297e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2298e36edd9dSMark Leonard return -EINVAL; 2299e36edd9dSMark Leonard 2300e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2301750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 2302e51000dbSSriharsha Basavapatna GFP_ATOMIC); 2303e36edd9dSMark Leonard if (!cmd.va) { 2304e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2305e36edd9dSMark Leonard return -ENOMEM; 2306e36edd9dSMark Leonard } 2307e36edd9dSMark Leonard 2308b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2309e36edd9dSMark Leonard 2310e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2311e36edd9dSMark Leonard if (!wrb) { 2312e36edd9dSMark Leonard status = -EBUSY; 2313e36edd9dSMark Leonard goto err; 2314e36edd9dSMark Leonard } 2315e36edd9dSMark Leonard req = cmd.va; 2316e36edd9dSMark Leonard 2317e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2318e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2319e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2320e36edd9dSMark Leonard 2321e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2322e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2323e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2324e36edd9dSMark Leonard if (!status) { 2325e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2326e36edd9dSMark Leonard 2327e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2328e36edd9dSMark Leonard } 2329e36edd9dSMark Leonard err: 2330b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2331e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2332e36edd9dSMark Leonard return status; 2333e36edd9dSMark Leonard } 2334e36edd9dSMark Leonard 2335a23113b5SSuresh Reddy static int lancer_cmd_write_object(struct be_adapter *adapter, 2336a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 data_size, 2337a23113b5SSuresh Reddy u32 data_offset, const char *obj_name, 2338a23113b5SSuresh Reddy u32 *data_written, u8 *change_status, 2339a23113b5SSuresh Reddy u8 *addn_status) 23409aebddd1SJeff Kirsher { 23419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23429aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 23439aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 23449aebddd1SJeff Kirsher void *ctxt = NULL; 23459aebddd1SJeff Kirsher int status; 23469aebddd1SJeff Kirsher 2347b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 23489aebddd1SJeff Kirsher adapter->flash_status = 0; 23499aebddd1SJeff Kirsher 23509aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23519aebddd1SJeff Kirsher if (!wrb) { 23529aebddd1SJeff Kirsher status = -EBUSY; 23539aebddd1SJeff Kirsher goto err_unlock; 23549aebddd1SJeff Kirsher } 23559aebddd1SJeff Kirsher 23569aebddd1SJeff Kirsher req = embedded_payload(wrb); 23579aebddd1SJeff Kirsher 2358106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 23599aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2360106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2361106df1e3SSomnath Kotur NULL); 23629aebddd1SJeff Kirsher 23639aebddd1SJeff Kirsher ctxt = &req->context; 23649aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23659aebddd1SJeff Kirsher write_length, ctxt, data_size); 23669aebddd1SJeff Kirsher 23679aebddd1SJeff Kirsher if (data_size == 0) 23689aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23699aebddd1SJeff Kirsher eof, ctxt, 1); 23709aebddd1SJeff Kirsher else 23719aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23729aebddd1SJeff Kirsher eof, ctxt, 0); 23739aebddd1SJeff Kirsher 23749aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 23759aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2376242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23779aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23789aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23799aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23809aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23819aebddd1SJeff Kirsher & 0xFFFFFFFF); 23829aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23839aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23849aebddd1SJeff Kirsher 2385efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2386efaa408eSSuresh Reddy if (status) 2387efaa408eSSuresh Reddy goto err_unlock; 2388efaa408eSSuresh Reddy 2389b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 23909aebddd1SJeff Kirsher 23915eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2392701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2393fd45160cSKalesh AP status = -ETIMEDOUT; 23949aebddd1SJeff Kirsher else 23959aebddd1SJeff Kirsher status = adapter->flash_status; 23969aebddd1SJeff Kirsher 23979aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2398f67ef7baSPadmanabh Ratnakar if (!status) { 23999aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2400f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2401f67ef7baSPadmanabh Ratnakar } else { 24029aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2403f67ef7baSPadmanabh Ratnakar } 24049aebddd1SJeff Kirsher 24059aebddd1SJeff Kirsher return status; 24069aebddd1SJeff Kirsher 24079aebddd1SJeff Kirsher err_unlock: 2408b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 24099aebddd1SJeff Kirsher return status; 24109aebddd1SJeff Kirsher } 24119aebddd1SJeff Kirsher 24126809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 24136809cee0SRavikumar Nelavelli { 24146809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 24156809cee0SRavikumar Nelavelli int status; 24166809cee0SRavikumar Nelavelli 24176809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 24186809cee0SRavikumar Nelavelli page_data); 24196809cee0SRavikumar Nelavelli if (!status) { 24206809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 24216809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 24226809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24236809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 24246809cee0SRavikumar Nelavelli break; 24256809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 24266809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24276809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 24286809cee0SRavikumar Nelavelli break; 24296809cee0SRavikumar Nelavelli default: 24306809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 24316809cee0SRavikumar Nelavelli break; 24326809cee0SRavikumar Nelavelli } 24336809cee0SRavikumar Nelavelli } 24346809cee0SRavikumar Nelavelli return status; 24356809cee0SRavikumar Nelavelli } 24366809cee0SRavikumar Nelavelli 243721252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter) 243821252377SVasundhara Volam { 243921252377SVasundhara Volam u8 page_data[PAGE_DATA_LEN]; 244021252377SVasundhara Volam int status; 244121252377SVasundhara Volam 244221252377SVasundhara Volam status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 244321252377SVasundhara Volam page_data); 244421252377SVasundhara Volam if (!status) { 244521252377SVasundhara Volam strlcpy(adapter->phy.vendor_name, page_data + 244621252377SVasundhara Volam SFP_VENDOR_NAME_OFFSET, SFP_VENDOR_NAME_LEN - 1); 244721252377SVasundhara Volam strlcpy(adapter->phy.vendor_pn, 244821252377SVasundhara Volam page_data + SFP_VENDOR_PN_OFFSET, 244921252377SVasundhara Volam SFP_VENDOR_NAME_LEN - 1); 245021252377SVasundhara Volam } 245121252377SVasundhara Volam 245221252377SVasundhara Volam return status; 245321252377SVasundhara Volam } 245421252377SVasundhara Volam 2455a23113b5SSuresh Reddy static int lancer_cmd_delete_object(struct be_adapter *adapter, 2456a23113b5SSuresh Reddy const char *obj_name) 2457f0613380SKalesh AP { 2458f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2459f0613380SKalesh AP struct be_mcc_wrb *wrb; 2460f0613380SKalesh AP int status; 2461f0613380SKalesh AP 2462b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2463f0613380SKalesh AP 2464f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2465f0613380SKalesh AP if (!wrb) { 2466f0613380SKalesh AP status = -EBUSY; 2467f0613380SKalesh AP goto err; 2468f0613380SKalesh AP } 2469f0613380SKalesh AP 2470f0613380SKalesh AP req = embedded_payload(wrb); 2471f0613380SKalesh AP 2472f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2473f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2474f0613380SKalesh AP sizeof(*req), wrb, NULL); 2475f0613380SKalesh AP 2476242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2477f0613380SKalesh AP 2478f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2479f0613380SKalesh AP err: 2480b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2481f0613380SKalesh AP return status; 2482f0613380SKalesh AP } 2483f0613380SKalesh AP 2484de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2485de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2486de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2487de49bd5aSPadmanabh Ratnakar { 2488de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2489de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2490de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2491de49bd5aSPadmanabh Ratnakar int status; 2492de49bd5aSPadmanabh Ratnakar 2493b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2494de49bd5aSPadmanabh Ratnakar 2495de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2496de49bd5aSPadmanabh Ratnakar if (!wrb) { 2497de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2498de49bd5aSPadmanabh Ratnakar goto err_unlock; 2499de49bd5aSPadmanabh Ratnakar } 2500de49bd5aSPadmanabh Ratnakar 2501de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2502de49bd5aSPadmanabh Ratnakar 2503de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2504de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2505de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2506de49bd5aSPadmanabh Ratnakar NULL); 2507de49bd5aSPadmanabh Ratnakar 2508de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2509de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2510de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2511de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2512de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2513de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2514de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2515de49bd5aSPadmanabh Ratnakar 2516de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2517de49bd5aSPadmanabh Ratnakar 2518de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2519de49bd5aSPadmanabh Ratnakar if (!status) { 2520de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2521de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2522de49bd5aSPadmanabh Ratnakar } else { 2523de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2524de49bd5aSPadmanabh Ratnakar } 2525de49bd5aSPadmanabh Ratnakar 2526de49bd5aSPadmanabh Ratnakar err_unlock: 2527b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2528de49bd5aSPadmanabh Ratnakar return status; 2529de49bd5aSPadmanabh Ratnakar } 2530de49bd5aSPadmanabh Ratnakar 2531a23113b5SSuresh Reddy static int be_cmd_write_flashrom(struct be_adapter *adapter, 2532a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 flash_type, 2533a23113b5SSuresh Reddy u32 flash_opcode, u32 img_offset, u32 buf_size) 25349aebddd1SJeff Kirsher { 25359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25369aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 25379aebddd1SJeff Kirsher int status; 25389aebddd1SJeff Kirsher 2539b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25409aebddd1SJeff Kirsher adapter->flash_status = 0; 25419aebddd1SJeff Kirsher 25429aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25439aebddd1SJeff Kirsher if (!wrb) { 25449aebddd1SJeff Kirsher status = -EBUSY; 25459aebddd1SJeff Kirsher goto err_unlock; 25469aebddd1SJeff Kirsher } 25479aebddd1SJeff Kirsher req = cmd->va; 25489aebddd1SJeff Kirsher 2549106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2550a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2551a2cc4e0bSSathya Perla cmd); 25529aebddd1SJeff Kirsher 25539aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 255470a7b525SVasundhara Volam if (flash_type == OPTYPE_OFFSET_SPECIFIED) 255570a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset); 255670a7b525SVasundhara Volam 25579aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 25589aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 25599aebddd1SJeff Kirsher 2560efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2561efaa408eSSuresh Reddy if (status) 2562efaa408eSSuresh Reddy goto err_unlock; 2563efaa408eSSuresh Reddy 2564b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25659aebddd1SJeff Kirsher 25665eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2567e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2568fd45160cSKalesh AP status = -ETIMEDOUT; 25699aebddd1SJeff Kirsher else 25709aebddd1SJeff Kirsher status = adapter->flash_status; 25719aebddd1SJeff Kirsher 25729aebddd1SJeff Kirsher return status; 25739aebddd1SJeff Kirsher 25749aebddd1SJeff Kirsher err_unlock: 2575b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25769aebddd1SJeff Kirsher return status; 25779aebddd1SJeff Kirsher } 25789aebddd1SJeff Kirsher 2579a23113b5SSuresh Reddy static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 258070a7b525SVasundhara Volam u16 img_optype, u32 img_offset, u32 crc_offset) 25819aebddd1SJeff Kirsher { 2582be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 258370a7b525SVasundhara Volam struct be_mcc_wrb *wrb; 25849aebddd1SJeff Kirsher int status; 25859aebddd1SJeff Kirsher 2586b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25879aebddd1SJeff Kirsher 25889aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25899aebddd1SJeff Kirsher if (!wrb) { 25909aebddd1SJeff Kirsher status = -EBUSY; 25919aebddd1SJeff Kirsher goto err; 25929aebddd1SJeff Kirsher } 25939aebddd1SJeff Kirsher req = embedded_payload(wrb); 25949aebddd1SJeff Kirsher 2595106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2596be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2597be716446SPadmanabh Ratnakar wrb, NULL); 25989aebddd1SJeff Kirsher 259970a7b525SVasundhara Volam req->params.op_type = cpu_to_le32(img_optype); 260070a7b525SVasundhara Volam if (img_optype == OPTYPE_OFFSET_SPECIFIED) 260170a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset + crc_offset); 260270a7b525SVasundhara Volam else 260370a7b525SVasundhara Volam req->params.offset = cpu_to_le32(crc_offset); 260470a7b525SVasundhara Volam 26059aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 26069aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 26079aebddd1SJeff Kirsher 26089aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26099aebddd1SJeff Kirsher if (!status) 2610be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 26119aebddd1SJeff Kirsher 26129aebddd1SJeff Kirsher err: 2613b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 26149aebddd1SJeff Kirsher return status; 26159aebddd1SJeff Kirsher } 26169aebddd1SJeff Kirsher 2617a23113b5SSuresh Reddy static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; 2618a23113b5SSuresh Reddy 2619a23113b5SSuresh Reddy static bool phy_flashing_required(struct be_adapter *adapter) 2620a23113b5SSuresh Reddy { 2621a23113b5SSuresh Reddy return (adapter->phy.phy_type == PHY_TYPE_TN_8022 && 2622a23113b5SSuresh Reddy adapter->phy.interface_type == PHY_TYPE_BASET_10GB); 2623a23113b5SSuresh Reddy } 2624a23113b5SSuresh Reddy 2625a23113b5SSuresh Reddy static bool is_comp_in_ufi(struct be_adapter *adapter, 2626a23113b5SSuresh Reddy struct flash_section_info *fsec, int type) 2627a23113b5SSuresh Reddy { 2628a23113b5SSuresh Reddy int i = 0, img_type = 0; 2629a23113b5SSuresh Reddy struct flash_section_info_g2 *fsec_g2 = NULL; 2630a23113b5SSuresh Reddy 2631a23113b5SSuresh Reddy if (BE2_chip(adapter)) 2632a23113b5SSuresh Reddy fsec_g2 = (struct flash_section_info_g2 *)fsec; 2633a23113b5SSuresh Reddy 2634a23113b5SSuresh Reddy for (i = 0; i < MAX_FLASH_COMP; i++) { 2635a23113b5SSuresh Reddy if (fsec_g2) 2636a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); 2637a23113b5SSuresh Reddy else 2638a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2639a23113b5SSuresh Reddy 2640a23113b5SSuresh Reddy if (img_type == type) 2641a23113b5SSuresh Reddy return true; 2642a23113b5SSuresh Reddy } 2643a23113b5SSuresh Reddy return false; 2644a23113b5SSuresh Reddy } 2645a23113b5SSuresh Reddy 2646a23113b5SSuresh Reddy static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, 2647a23113b5SSuresh Reddy int header_size, 2648a23113b5SSuresh Reddy const struct firmware *fw) 2649a23113b5SSuresh Reddy { 2650a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2651a23113b5SSuresh Reddy const u8 *p = fw->data; 2652a23113b5SSuresh Reddy 2653a23113b5SSuresh Reddy p += header_size; 2654a23113b5SSuresh Reddy while (p < (fw->data + fw->size)) { 2655a23113b5SSuresh Reddy fsec = (struct flash_section_info *)p; 2656a23113b5SSuresh Reddy if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) 2657a23113b5SSuresh Reddy return fsec; 2658a23113b5SSuresh Reddy p += 32; 2659a23113b5SSuresh Reddy } 2660a23113b5SSuresh Reddy return NULL; 2661a23113b5SSuresh Reddy } 2662a23113b5SSuresh Reddy 2663a23113b5SSuresh Reddy static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p, 2664a23113b5SSuresh Reddy u32 img_offset, u32 img_size, int hdr_size, 2665a23113b5SSuresh Reddy u16 img_optype, bool *crc_match) 2666a23113b5SSuresh Reddy { 2667a23113b5SSuresh Reddy u32 crc_offset; 2668a23113b5SSuresh Reddy int status; 2669a23113b5SSuresh Reddy u8 crc[4]; 2670a23113b5SSuresh Reddy 2671a23113b5SSuresh Reddy status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset, 2672a23113b5SSuresh Reddy img_size - 4); 2673a23113b5SSuresh Reddy if (status) 2674a23113b5SSuresh Reddy return status; 2675a23113b5SSuresh Reddy 2676a23113b5SSuresh Reddy crc_offset = hdr_size + img_offset + img_size - 4; 2677a23113b5SSuresh Reddy 2678a23113b5SSuresh Reddy /* Skip flashing, if crc of flashed region matches */ 2679a23113b5SSuresh Reddy if (!memcmp(crc, p + crc_offset, 4)) 2680a23113b5SSuresh Reddy *crc_match = true; 2681a23113b5SSuresh Reddy else 2682a23113b5SSuresh Reddy *crc_match = false; 2683a23113b5SSuresh Reddy 2684a23113b5SSuresh Reddy return status; 2685a23113b5SSuresh Reddy } 2686a23113b5SSuresh Reddy 2687a23113b5SSuresh Reddy static int be_flash(struct be_adapter *adapter, const u8 *img, 2688a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int optype, int img_size, 2689a23113b5SSuresh Reddy u32 img_offset) 2690a23113b5SSuresh Reddy { 2691a23113b5SSuresh Reddy u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0; 2692a23113b5SSuresh Reddy struct be_cmd_write_flashrom *req = flash_cmd->va; 2693a23113b5SSuresh Reddy int status; 2694a23113b5SSuresh Reddy 2695a23113b5SSuresh Reddy while (total_bytes) { 2696a23113b5SSuresh Reddy num_bytes = min_t(u32, 32 * 1024, total_bytes); 2697a23113b5SSuresh Reddy 2698a23113b5SSuresh Reddy total_bytes -= num_bytes; 2699a23113b5SSuresh Reddy 2700a23113b5SSuresh Reddy if (!total_bytes) { 2701a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2702a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_FLASH; 2703a23113b5SSuresh Reddy else 2704a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_FLASH; 2705a23113b5SSuresh Reddy } else { 2706a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2707a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_SAVE; 2708a23113b5SSuresh Reddy else 2709a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_SAVE; 2710a23113b5SSuresh Reddy } 2711a23113b5SSuresh Reddy 2712a23113b5SSuresh Reddy memcpy(req->data_buf, img, num_bytes); 2713a23113b5SSuresh Reddy img += num_bytes; 2714a23113b5SSuresh Reddy status = be_cmd_write_flashrom(adapter, flash_cmd, optype, 2715a23113b5SSuresh Reddy flash_op, img_offset + 2716a23113b5SSuresh Reddy bytes_sent, num_bytes); 2717a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST && 2718a23113b5SSuresh Reddy optype == OPTYPE_PHY_FW) 2719a23113b5SSuresh Reddy break; 2720a23113b5SSuresh Reddy else if (status) 2721a23113b5SSuresh Reddy return status; 2722a23113b5SSuresh Reddy 2723a23113b5SSuresh Reddy bytes_sent += num_bytes; 2724a23113b5SSuresh Reddy } 2725a23113b5SSuresh Reddy return 0; 2726a23113b5SSuresh Reddy } 2727a23113b5SSuresh Reddy 2728f5ef017eSSriharsha Basavapatna #define NCSI_UPDATE_LOG "NCSI section update is not supported in FW ver %s\n" 2729f5ef017eSSriharsha Basavapatna static bool be_fw_ncsi_supported(char *ver) 2730f5ef017eSSriharsha Basavapatna { 2731f5ef017eSSriharsha Basavapatna int v1[4] = {3, 102, 148, 0}; /* Min ver that supports NCSI FW */ 2732f5ef017eSSriharsha Basavapatna int v2[4]; 2733f5ef017eSSriharsha Basavapatna int i; 2734f5ef017eSSriharsha Basavapatna 2735f5ef017eSSriharsha Basavapatna if (sscanf(ver, "%d.%d.%d.%d", &v2[0], &v2[1], &v2[2], &v2[3]) != 4) 2736f5ef017eSSriharsha Basavapatna return false; 2737f5ef017eSSriharsha Basavapatna 2738f5ef017eSSriharsha Basavapatna for (i = 0; i < 4; i++) { 2739f5ef017eSSriharsha Basavapatna if (v1[i] < v2[i]) 2740f5ef017eSSriharsha Basavapatna return true; 2741f5ef017eSSriharsha Basavapatna else if (v1[i] > v2[i]) 2742f5ef017eSSriharsha Basavapatna return false; 2743f5ef017eSSriharsha Basavapatna } 2744f5ef017eSSriharsha Basavapatna 2745f5ef017eSSriharsha Basavapatna return true; 2746f5ef017eSSriharsha Basavapatna } 2747f5ef017eSSriharsha Basavapatna 2748a23113b5SSuresh Reddy /* For BE2, BE3 and BE3-R */ 2749a23113b5SSuresh Reddy static int be_flash_BEx(struct be_adapter *adapter, 2750a23113b5SSuresh Reddy const struct firmware *fw, 2751a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2752a23113b5SSuresh Reddy { 2753a23113b5SSuresh Reddy int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); 2754a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2755a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2756a23113b5SSuresh Reddy int status, i, filehdr_size, num_comp; 2757a23113b5SSuresh Reddy const struct flash_comp *pflashcomp; 2758a23113b5SSuresh Reddy bool crc_match; 2759a23113b5SSuresh Reddy const u8 *p; 2760a23113b5SSuresh Reddy 2761f4ee1476SColin Ian King static const struct flash_comp gen3_flash_types[] = { 2762a23113b5SSuresh Reddy { BE3_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2763a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2764a23113b5SSuresh Reddy { BE3_REDBOOT_START, OPTYPE_REDBOOT, 2765a23113b5SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2766a23113b5SSuresh Reddy { BE3_ISCSI_BIOS_START, OPTYPE_BIOS, 2767a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2768a23113b5SSuresh Reddy { BE3_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2769a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2770a23113b5SSuresh Reddy { BE3_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2771a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2772a23113b5SSuresh Reddy { BE3_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2773a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2774a23113b5SSuresh Reddy { BE3_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2775a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2776a23113b5SSuresh Reddy { BE3_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2777a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE}, 2778a23113b5SSuresh Reddy { BE3_NCSI_START, OPTYPE_NCSI_FW, 2779a23113b5SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE, IMAGE_NCSI}, 2780a23113b5SSuresh Reddy { BE3_PHY_FW_START, OPTYPE_PHY_FW, 2781a23113b5SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE, IMAGE_FIRMWARE_PHY} 2782a23113b5SSuresh Reddy }; 2783a23113b5SSuresh Reddy 2784f4ee1476SColin Ian King static const struct flash_comp gen2_flash_types[] = { 2785a23113b5SSuresh Reddy { BE2_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2786a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2787a23113b5SSuresh Reddy { BE2_REDBOOT_START, OPTYPE_REDBOOT, 2788a23113b5SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2789a23113b5SSuresh Reddy { BE2_ISCSI_BIOS_START, OPTYPE_BIOS, 2790a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2791a23113b5SSuresh Reddy { BE2_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2792a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2793a23113b5SSuresh Reddy { BE2_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2794a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2795a23113b5SSuresh Reddy { BE2_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2796a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2797a23113b5SSuresh Reddy { BE2_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2798a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2799a23113b5SSuresh Reddy { BE2_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2800a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE} 2801a23113b5SSuresh Reddy }; 2802a23113b5SSuresh Reddy 2803a23113b5SSuresh Reddy if (BE3_chip(adapter)) { 2804a23113b5SSuresh Reddy pflashcomp = gen3_flash_types; 2805a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2806a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen3_flash_types); 2807a23113b5SSuresh Reddy } else { 2808a23113b5SSuresh Reddy pflashcomp = gen2_flash_types; 2809a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g2); 2810a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen2_flash_types); 2811a23113b5SSuresh Reddy img_hdrs_size = 0; 2812a23113b5SSuresh Reddy } 2813a23113b5SSuresh Reddy 2814a23113b5SSuresh Reddy /* Get flash section info*/ 2815a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2816a23113b5SSuresh Reddy if (!fsec) { 2817a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2818a23113b5SSuresh Reddy return -1; 2819a23113b5SSuresh Reddy } 2820a23113b5SSuresh Reddy for (i = 0; i < num_comp; i++) { 2821a23113b5SSuresh Reddy if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) 2822a23113b5SSuresh Reddy continue; 2823a23113b5SSuresh Reddy 2824a23113b5SSuresh Reddy if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && 2825f5ef017eSSriharsha Basavapatna !be_fw_ncsi_supported(adapter->fw_ver)) { 2826f5ef017eSSriharsha Basavapatna dev_info(dev, NCSI_UPDATE_LOG, adapter->fw_ver); 2827a23113b5SSuresh Reddy continue; 2828f5ef017eSSriharsha Basavapatna } 2829a23113b5SSuresh Reddy 2830a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_PHY_FW && 2831a23113b5SSuresh Reddy !phy_flashing_required(adapter)) 2832a23113b5SSuresh Reddy continue; 2833a23113b5SSuresh Reddy 2834a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_REDBOOT) { 2835a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, 2836a23113b5SSuresh Reddy pflashcomp[i].offset, 2837a23113b5SSuresh Reddy pflashcomp[i].size, 2838a23113b5SSuresh Reddy filehdr_size + 2839a23113b5SSuresh Reddy img_hdrs_size, 2840a23113b5SSuresh Reddy OPTYPE_REDBOOT, &crc_match); 2841a23113b5SSuresh Reddy if (status) { 2842a23113b5SSuresh Reddy dev_err(dev, 2843a23113b5SSuresh Reddy "Could not get CRC for 0x%x region\n", 2844a23113b5SSuresh Reddy pflashcomp[i].optype); 2845a23113b5SSuresh Reddy continue; 2846a23113b5SSuresh Reddy } 2847a23113b5SSuresh Reddy 2848a23113b5SSuresh Reddy if (crc_match) 2849a23113b5SSuresh Reddy continue; 2850a23113b5SSuresh Reddy } 2851a23113b5SSuresh Reddy 2852a23113b5SSuresh Reddy p = fw->data + filehdr_size + pflashcomp[i].offset + 2853a23113b5SSuresh Reddy img_hdrs_size; 2854a23113b5SSuresh Reddy if (p + pflashcomp[i].size > fw->data + fw->size) 2855a23113b5SSuresh Reddy return -1; 2856a23113b5SSuresh Reddy 2857a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, 2858a23113b5SSuresh Reddy pflashcomp[i].size, 0); 2859a23113b5SSuresh Reddy if (status) { 2860a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2861a23113b5SSuresh Reddy pflashcomp[i].img_type); 2862a23113b5SSuresh Reddy return status; 2863a23113b5SSuresh Reddy } 2864a23113b5SSuresh Reddy } 2865a23113b5SSuresh Reddy return 0; 2866a23113b5SSuresh Reddy } 2867a23113b5SSuresh Reddy 2868a23113b5SSuresh Reddy static u16 be_get_img_optype(struct flash_section_entry fsec_entry) 2869a23113b5SSuresh Reddy { 2870a23113b5SSuresh Reddy u32 img_type = le32_to_cpu(fsec_entry.type); 2871a23113b5SSuresh Reddy u16 img_optype = le16_to_cpu(fsec_entry.optype); 2872a23113b5SSuresh Reddy 2873a23113b5SSuresh Reddy if (img_optype != 0xFFFF) 2874a23113b5SSuresh Reddy return img_optype; 2875a23113b5SSuresh Reddy 2876a23113b5SSuresh Reddy switch (img_type) { 2877a23113b5SSuresh Reddy case IMAGE_FIRMWARE_ISCSI: 2878a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_ACTIVE; 2879a23113b5SSuresh Reddy break; 2880a23113b5SSuresh Reddy case IMAGE_BOOT_CODE: 2881a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT; 2882a23113b5SSuresh Reddy break; 2883a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_ISCSI: 2884a23113b5SSuresh Reddy img_optype = OPTYPE_BIOS; 2885a23113b5SSuresh Reddy break; 2886a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_PXE: 2887a23113b5SSuresh Reddy img_optype = OPTYPE_PXE_BIOS; 2888a23113b5SSuresh Reddy break; 2889a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_FCOE: 2890a23113b5SSuresh Reddy img_optype = OPTYPE_FCOE_BIOS; 2891a23113b5SSuresh Reddy break; 2892a23113b5SSuresh Reddy case IMAGE_FIRMWARE_BACKUP_ISCSI: 2893a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_BACKUP; 2894a23113b5SSuresh Reddy break; 2895a23113b5SSuresh Reddy case IMAGE_NCSI: 2896a23113b5SSuresh Reddy img_optype = OPTYPE_NCSI_FW; 2897a23113b5SSuresh Reddy break; 2898a23113b5SSuresh Reddy case IMAGE_FLASHISM_JUMPVECTOR: 2899a23113b5SSuresh Reddy img_optype = OPTYPE_FLASHISM_JUMPVECTOR; 2900a23113b5SSuresh Reddy break; 2901a23113b5SSuresh Reddy case IMAGE_FIRMWARE_PHY: 2902a23113b5SSuresh Reddy img_optype = OPTYPE_SH_PHY_FW; 2903a23113b5SSuresh Reddy break; 2904a23113b5SSuresh Reddy case IMAGE_REDBOOT_DIR: 2905a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_DIR; 2906a23113b5SSuresh Reddy break; 2907a23113b5SSuresh Reddy case IMAGE_REDBOOT_CONFIG: 2908a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_CONFIG; 2909a23113b5SSuresh Reddy break; 2910a23113b5SSuresh Reddy case IMAGE_UFI_DIR: 2911a23113b5SSuresh Reddy img_optype = OPTYPE_UFI_DIR; 2912a23113b5SSuresh Reddy break; 2913a23113b5SSuresh Reddy default: 2914a23113b5SSuresh Reddy break; 2915a23113b5SSuresh Reddy } 2916a23113b5SSuresh Reddy 2917a23113b5SSuresh Reddy return img_optype; 2918a23113b5SSuresh Reddy } 2919a23113b5SSuresh Reddy 2920a23113b5SSuresh Reddy static int be_flash_skyhawk(struct be_adapter *adapter, 2921a23113b5SSuresh Reddy const struct firmware *fw, 2922a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2923a23113b5SSuresh Reddy { 2924a23113b5SSuresh Reddy int img_hdrs_size = num_of_images * sizeof(struct image_hdr); 2925a23113b5SSuresh Reddy bool crc_match, old_fw_img, flash_offset_support = true; 2926a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2927a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2928a23113b5SSuresh Reddy u32 img_offset, img_size, img_type; 2929a23113b5SSuresh Reddy u16 img_optype, flash_optype; 2930a23113b5SSuresh Reddy int status, i, filehdr_size; 2931a23113b5SSuresh Reddy const u8 *p; 2932a23113b5SSuresh Reddy 2933a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2934a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2935a23113b5SSuresh Reddy if (!fsec) { 2936a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2937a23113b5SSuresh Reddy return -EINVAL; 2938a23113b5SSuresh Reddy } 2939a23113b5SSuresh Reddy 2940a23113b5SSuresh Reddy retry_flash: 2941a23113b5SSuresh Reddy for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { 2942a23113b5SSuresh Reddy img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); 2943a23113b5SSuresh Reddy img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); 2944a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2945a23113b5SSuresh Reddy img_optype = be_get_img_optype(fsec->fsec_entry[i]); 2946a23113b5SSuresh Reddy old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF; 2947a23113b5SSuresh Reddy 2948a23113b5SSuresh Reddy if (img_optype == 0xFFFF) 2949a23113b5SSuresh Reddy continue; 2950a23113b5SSuresh Reddy 2951a23113b5SSuresh Reddy if (flash_offset_support) 2952a23113b5SSuresh Reddy flash_optype = OPTYPE_OFFSET_SPECIFIED; 2953a23113b5SSuresh Reddy else 2954a23113b5SSuresh Reddy flash_optype = img_optype; 2955a23113b5SSuresh Reddy 2956a23113b5SSuresh Reddy /* Don't bother verifying CRC if an old FW image is being 2957a23113b5SSuresh Reddy * flashed 2958a23113b5SSuresh Reddy */ 2959a23113b5SSuresh Reddy if (old_fw_img) 2960a23113b5SSuresh Reddy goto flash; 2961a23113b5SSuresh Reddy 2962a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, img_offset, 2963a23113b5SSuresh Reddy img_size, filehdr_size + 2964a23113b5SSuresh Reddy img_hdrs_size, flash_optype, 2965a23113b5SSuresh Reddy &crc_match); 2966a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 2967a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_ILLEGAL_FIELD) { 2968a23113b5SSuresh Reddy /* The current FW image on the card does not support 2969a23113b5SSuresh Reddy * OFFSET based flashing. Retry using older mechanism 2970a23113b5SSuresh Reddy * of OPTYPE based flashing 2971a23113b5SSuresh Reddy */ 2972a23113b5SSuresh Reddy if (flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2973a23113b5SSuresh Reddy flash_offset_support = false; 2974a23113b5SSuresh Reddy goto retry_flash; 2975a23113b5SSuresh Reddy } 2976a23113b5SSuresh Reddy 2977a23113b5SSuresh Reddy /* The current FW image on the card does not recognize 2978a23113b5SSuresh Reddy * the new FLASH op_type. The FW download is partially 2979a23113b5SSuresh Reddy * complete. Reboot the server now to enable FW image 2980a23113b5SSuresh Reddy * to recognize the new FLASH op_type. To complete the 2981a23113b5SSuresh Reddy * remaining process, download the same FW again after 2982a23113b5SSuresh Reddy * the reboot. 2983a23113b5SSuresh Reddy */ 2984a23113b5SSuresh Reddy dev_err(dev, "Flash incomplete. Reset the server\n"); 2985a23113b5SSuresh Reddy dev_err(dev, "Download FW image again after reset\n"); 2986a23113b5SSuresh Reddy return -EAGAIN; 2987a23113b5SSuresh Reddy } else if (status) { 2988a23113b5SSuresh Reddy dev_err(dev, "Could not get CRC for 0x%x region\n", 2989a23113b5SSuresh Reddy img_optype); 2990a23113b5SSuresh Reddy return -EFAULT; 2991a23113b5SSuresh Reddy } 2992a23113b5SSuresh Reddy 2993a23113b5SSuresh Reddy if (crc_match) 2994a23113b5SSuresh Reddy continue; 2995a23113b5SSuresh Reddy 2996a23113b5SSuresh Reddy flash: 2997a23113b5SSuresh Reddy p = fw->data + filehdr_size + img_offset + img_hdrs_size; 2998a23113b5SSuresh Reddy if (p + img_size > fw->data + fw->size) 2999a23113b5SSuresh Reddy return -1; 3000a23113b5SSuresh Reddy 3001a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, flash_optype, img_size, 3002a23113b5SSuresh Reddy img_offset); 3003a23113b5SSuresh Reddy 3004a23113b5SSuresh Reddy /* The current FW image on the card does not support OFFSET 3005a23113b5SSuresh Reddy * based flashing. Retry using older mechanism of OPTYPE based 3006a23113b5SSuresh Reddy * flashing 3007a23113b5SSuresh Reddy */ 3008a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD && 3009a23113b5SSuresh Reddy flash_optype == OPTYPE_OFFSET_SPECIFIED) { 3010a23113b5SSuresh Reddy flash_offset_support = false; 3011a23113b5SSuresh Reddy goto retry_flash; 3012a23113b5SSuresh Reddy } 3013a23113b5SSuresh Reddy 3014a23113b5SSuresh Reddy /* For old FW images ignore ILLEGAL_FIELD error or errors on 3015a23113b5SSuresh Reddy * UFI_DIR region 3016a23113b5SSuresh Reddy */ 3017a23113b5SSuresh Reddy if (old_fw_img && 3018a23113b5SSuresh Reddy (base_status(status) == MCC_STATUS_ILLEGAL_FIELD || 3019a23113b5SSuresh Reddy (img_optype == OPTYPE_UFI_DIR && 3020a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_FAILED))) { 3021a23113b5SSuresh Reddy continue; 3022a23113b5SSuresh Reddy } else if (status) { 3023a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 3024a23113b5SSuresh Reddy img_type); 30256b525782SSuresh Reddy 30266b525782SSuresh Reddy switch (addl_status(status)) { 30276b525782SSuresh Reddy case MCC_ADDL_STATUS_MISSING_SIGNATURE: 30286b525782SSuresh Reddy dev_err(dev, 30296b525782SSuresh Reddy "Digital signature missing in FW\n"); 30306b525782SSuresh Reddy return -EINVAL; 30316b525782SSuresh Reddy case MCC_ADDL_STATUS_INVALID_SIGNATURE: 30326b525782SSuresh Reddy dev_err(dev, 30336b525782SSuresh Reddy "Invalid digital signature in FW\n"); 30346b525782SSuresh Reddy return -EINVAL; 30356b525782SSuresh Reddy default: 3036a23113b5SSuresh Reddy return -EFAULT; 3037a23113b5SSuresh Reddy } 3038a23113b5SSuresh Reddy } 30396b525782SSuresh Reddy } 3040a23113b5SSuresh Reddy return 0; 3041a23113b5SSuresh Reddy } 3042a23113b5SSuresh Reddy 3043a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, 3044a23113b5SSuresh Reddy const struct firmware *fw) 3045a23113b5SSuresh Reddy { 3046a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3047a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3048a23113b5SSuresh Reddy const u8 *data_ptr = NULL; 3049a23113b5SSuresh Reddy u8 *dest_image_ptr = NULL; 3050a23113b5SSuresh Reddy size_t image_size = 0; 3051a23113b5SSuresh Reddy u32 chunk_size = 0; 3052a23113b5SSuresh Reddy u32 data_written = 0; 3053a23113b5SSuresh Reddy u32 offset = 0; 3054a23113b5SSuresh Reddy int status = 0; 3055a23113b5SSuresh Reddy u8 add_status = 0; 3056a23113b5SSuresh Reddy u8 change_status; 3057a23113b5SSuresh Reddy 3058a23113b5SSuresh Reddy if (!IS_ALIGNED(fw->size, sizeof(u32))) { 3059a23113b5SSuresh Reddy dev_err(dev, "FW image size should be multiple of 4\n"); 3060a23113b5SSuresh Reddy return -EINVAL; 3061a23113b5SSuresh Reddy } 3062a23113b5SSuresh Reddy 3063a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) 3064a23113b5SSuresh Reddy + LANCER_FW_DOWNLOAD_CHUNK; 3065750afb08SLuis Chamberlain flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3066750afb08SLuis Chamberlain GFP_KERNEL); 3067a23113b5SSuresh Reddy if (!flash_cmd.va) 3068a23113b5SSuresh Reddy return -ENOMEM; 3069a23113b5SSuresh Reddy 3070a23113b5SSuresh Reddy dest_image_ptr = flash_cmd.va + 3071a23113b5SSuresh Reddy sizeof(struct lancer_cmd_req_write_object); 3072a23113b5SSuresh Reddy image_size = fw->size; 3073a23113b5SSuresh Reddy data_ptr = fw->data; 3074a23113b5SSuresh Reddy 3075a23113b5SSuresh Reddy while (image_size) { 3076a23113b5SSuresh Reddy chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); 3077a23113b5SSuresh Reddy 3078a23113b5SSuresh Reddy /* Copy the image chunk content. */ 3079a23113b5SSuresh Reddy memcpy(dest_image_ptr, data_ptr, chunk_size); 3080a23113b5SSuresh Reddy 3081a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3082a23113b5SSuresh Reddy chunk_size, offset, 3083a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3084a23113b5SSuresh Reddy &data_written, &change_status, 3085a23113b5SSuresh Reddy &add_status); 3086a23113b5SSuresh Reddy if (status) 3087a23113b5SSuresh Reddy break; 3088a23113b5SSuresh Reddy 3089a23113b5SSuresh Reddy offset += data_written; 3090a23113b5SSuresh Reddy data_ptr += data_written; 3091a23113b5SSuresh Reddy image_size -= data_written; 3092a23113b5SSuresh Reddy } 3093a23113b5SSuresh Reddy 3094a23113b5SSuresh Reddy if (!status) { 3095a23113b5SSuresh Reddy /* Commit the FW written */ 3096a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3097a23113b5SSuresh Reddy 0, offset, 3098a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3099a23113b5SSuresh Reddy &data_written, &change_status, 3100a23113b5SSuresh Reddy &add_status); 3101a23113b5SSuresh Reddy } 3102a23113b5SSuresh Reddy 3103a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3104a23113b5SSuresh Reddy if (status) { 3105a23113b5SSuresh Reddy dev_err(dev, "Firmware load error\n"); 3106a23113b5SSuresh Reddy return be_cmd_status(status); 3107a23113b5SSuresh Reddy } 3108a23113b5SSuresh Reddy 3109a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3110a23113b5SSuresh Reddy 3111a23113b5SSuresh Reddy if (change_status == LANCER_FW_RESET_NEEDED) { 3112a23113b5SSuresh Reddy dev_info(dev, "Resetting adapter to activate new FW\n"); 3113a23113b5SSuresh Reddy status = lancer_physdev_ctrl(adapter, 3114a23113b5SSuresh Reddy PHYSDEV_CONTROL_FW_RESET_MASK); 3115a23113b5SSuresh Reddy if (status) { 3116a23113b5SSuresh Reddy dev_err(dev, "Adapter busy, could not reset FW\n"); 3117a23113b5SSuresh Reddy dev_err(dev, "Reboot server to activate new FW\n"); 3118a23113b5SSuresh Reddy } 3119a23113b5SSuresh Reddy } else if (change_status != LANCER_NO_RESET_NEEDED) { 3120a23113b5SSuresh Reddy dev_info(dev, "Reboot server to activate new FW\n"); 3121a23113b5SSuresh Reddy } 3122a23113b5SSuresh Reddy 3123a23113b5SSuresh Reddy return 0; 3124a23113b5SSuresh Reddy } 3125a23113b5SSuresh Reddy 3126a23113b5SSuresh Reddy /* Check if the flash image file is compatible with the adapter that 3127a23113b5SSuresh Reddy * is being flashed. 3128a23113b5SSuresh Reddy */ 3129a23113b5SSuresh Reddy static bool be_check_ufi_compatibility(struct be_adapter *adapter, 3130a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr) 3131a23113b5SSuresh Reddy { 3132a23113b5SSuresh Reddy if (!fhdr) { 3133a23113b5SSuresh Reddy dev_err(&adapter->pdev->dev, "Invalid FW UFI file"); 3134a23113b5SSuresh Reddy return false; 3135a23113b5SSuresh Reddy } 3136a23113b5SSuresh Reddy 3137a23113b5SSuresh Reddy /* First letter of the build version is used to identify 3138a23113b5SSuresh Reddy * which chip this image file is meant for. 3139a23113b5SSuresh Reddy */ 3140a23113b5SSuresh Reddy switch (fhdr->build[0]) { 3141a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_SH: 3142a23113b5SSuresh Reddy if (!skyhawk_chip(adapter)) 3143a23113b5SSuresh Reddy return false; 3144a23113b5SSuresh Reddy break; 3145a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE3: 3146a23113b5SSuresh Reddy if (!BE3_chip(adapter)) 3147a23113b5SSuresh Reddy return false; 3148a23113b5SSuresh Reddy break; 3149a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE2: 3150a23113b5SSuresh Reddy if (!BE2_chip(adapter)) 3151a23113b5SSuresh Reddy return false; 3152a23113b5SSuresh Reddy break; 3153a23113b5SSuresh Reddy default: 3154a23113b5SSuresh Reddy return false; 3155a23113b5SSuresh Reddy } 3156a23113b5SSuresh Reddy 3157a23113b5SSuresh Reddy /* In BE3 FW images the "asic_type_rev" field doesn't track the 3158a23113b5SSuresh Reddy * asic_rev of the chips it is compatible with. 3159a23113b5SSuresh Reddy * When asic_type_rev is 0 the image is compatible only with 3160a23113b5SSuresh Reddy * pre-BE3-R chips (asic_rev < 0x10) 3161a23113b5SSuresh Reddy */ 3162a23113b5SSuresh Reddy if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) 3163a23113b5SSuresh Reddy return adapter->asic_rev < 0x10; 3164a23113b5SSuresh Reddy else 3165a23113b5SSuresh Reddy return (fhdr->asic_type_rev >= adapter->asic_rev); 3166a23113b5SSuresh Reddy } 3167a23113b5SSuresh Reddy 3168a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw) 3169a23113b5SSuresh Reddy { 3170a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3171a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr3; 3172a23113b5SSuresh Reddy struct image_hdr *img_hdr_ptr; 3173a23113b5SSuresh Reddy int status = 0, i, num_imgs; 3174a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3175a23113b5SSuresh Reddy 3176a23113b5SSuresh Reddy fhdr3 = (struct flash_file_hdr_g3 *)fw->data; 3177a23113b5SSuresh Reddy if (!be_check_ufi_compatibility(adapter, fhdr3)) { 3178a23113b5SSuresh Reddy dev_err(dev, "Flash image is not compatible with adapter\n"); 3179a23113b5SSuresh Reddy return -EINVAL; 3180a23113b5SSuresh Reddy } 3181a23113b5SSuresh Reddy 3182a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct be_cmd_write_flashrom); 3183750afb08SLuis Chamberlain flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3184a23113b5SSuresh Reddy GFP_KERNEL); 3185a23113b5SSuresh Reddy if (!flash_cmd.va) 3186a23113b5SSuresh Reddy return -ENOMEM; 3187a23113b5SSuresh Reddy 3188a23113b5SSuresh Reddy num_imgs = le32_to_cpu(fhdr3->num_imgs); 3189a23113b5SSuresh Reddy for (i = 0; i < num_imgs; i++) { 3190a23113b5SSuresh Reddy img_hdr_ptr = (struct image_hdr *)(fw->data + 3191a23113b5SSuresh Reddy (sizeof(struct flash_file_hdr_g3) + 3192a23113b5SSuresh Reddy i * sizeof(struct image_hdr))); 3193a23113b5SSuresh Reddy if (!BE2_chip(adapter) && 3194a23113b5SSuresh Reddy le32_to_cpu(img_hdr_ptr->imageid) != 1) 3195a23113b5SSuresh Reddy continue; 3196a23113b5SSuresh Reddy 3197a23113b5SSuresh Reddy if (skyhawk_chip(adapter)) 3198a23113b5SSuresh Reddy status = be_flash_skyhawk(adapter, fw, &flash_cmd, 3199a23113b5SSuresh Reddy num_imgs); 3200a23113b5SSuresh Reddy else 3201a23113b5SSuresh Reddy status = be_flash_BEx(adapter, fw, &flash_cmd, 3202a23113b5SSuresh Reddy num_imgs); 3203a23113b5SSuresh Reddy } 3204a23113b5SSuresh Reddy 3205a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3206a23113b5SSuresh Reddy if (!status) 3207a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3208a23113b5SSuresh Reddy 3209a23113b5SSuresh Reddy return status; 3210a23113b5SSuresh Reddy } 3211a23113b5SSuresh Reddy 32129aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 32139aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 32149aebddd1SJeff Kirsher { 32159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32169aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 32179aebddd1SJeff Kirsher int status; 32189aebddd1SJeff Kirsher 3219b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32209aebddd1SJeff Kirsher 32219aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32229aebddd1SJeff Kirsher if (!wrb) { 32239aebddd1SJeff Kirsher status = -EBUSY; 32249aebddd1SJeff Kirsher goto err; 32259aebddd1SJeff Kirsher } 32269aebddd1SJeff Kirsher req = nonemb_cmd->va; 32279aebddd1SJeff Kirsher 3228106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 3229a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 3230a2cc4e0bSSathya Perla wrb, nonemb_cmd); 32319aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 32329aebddd1SJeff Kirsher 32339aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 32349aebddd1SJeff Kirsher 32359aebddd1SJeff Kirsher err: 3236b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32379aebddd1SJeff Kirsher return status; 32389aebddd1SJeff Kirsher } 32399aebddd1SJeff Kirsher 32409aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 32419aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 32429aebddd1SJeff Kirsher { 32439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32449aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 32459aebddd1SJeff Kirsher int status; 32469aebddd1SJeff Kirsher 32472e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 32482e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32492e365b1bSSomnath Kotur return -EPERM; 32502e365b1bSSomnath Kotur 3251b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32529aebddd1SJeff Kirsher 32539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32549aebddd1SJeff Kirsher if (!wrb) { 32559aebddd1SJeff Kirsher status = -EBUSY; 32569c855975SSuresh Reddy goto err_unlock; 32579aebddd1SJeff Kirsher } 32589aebddd1SJeff Kirsher 32599aebddd1SJeff Kirsher req = embedded_payload(wrb); 32609aebddd1SJeff Kirsher 3261106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3262a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 3263a2cc4e0bSSathya Perla wrb, NULL); 32649aebddd1SJeff Kirsher 32659aebddd1SJeff Kirsher req->src_port = port_num; 32669aebddd1SJeff Kirsher req->dest_port = port_num; 32679aebddd1SJeff Kirsher req->loopback_type = loopback_type; 32689aebddd1SJeff Kirsher req->loopback_state = enable; 32699aebddd1SJeff Kirsher 32709c855975SSuresh Reddy status = be_mcc_notify(adapter); 32719c855975SSuresh Reddy if (status) 32729c855975SSuresh Reddy goto err_unlock; 32739c855975SSuresh Reddy 3274b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32759c855975SSuresh Reddy 32769c855975SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 32779c855975SSuresh Reddy msecs_to_jiffies(SET_LB_MODE_TIMEOUT))) 32789c855975SSuresh Reddy status = -ETIMEDOUT; 32799c855975SSuresh Reddy 32809c855975SSuresh Reddy return status; 32819c855975SSuresh Reddy 32829c855975SSuresh Reddy err_unlock: 3283b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32849aebddd1SJeff Kirsher return status; 32859aebddd1SJeff Kirsher } 32869aebddd1SJeff Kirsher 32879aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 3288a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 3289a2cc4e0bSSathya Perla u64 pattern) 32909aebddd1SJeff Kirsher { 32919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32929aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 32935eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 32949aebddd1SJeff Kirsher int status; 32959aebddd1SJeff Kirsher 32962e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_LOOPBACK_TEST, 32972e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32982e365b1bSSomnath Kotur return -EPERM; 32992e365b1bSSomnath Kotur 3300b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33019aebddd1SJeff Kirsher 33029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33039aebddd1SJeff Kirsher if (!wrb) { 33049aebddd1SJeff Kirsher status = -EBUSY; 33059aebddd1SJeff Kirsher goto err; 33069aebddd1SJeff Kirsher } 33079aebddd1SJeff Kirsher 33089aebddd1SJeff Kirsher req = embedded_payload(wrb); 33099aebddd1SJeff Kirsher 3310106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3311a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 3312a2cc4e0bSSathya Perla NULL); 33139aebddd1SJeff Kirsher 33145eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 33159aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33169aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 33179aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 33189aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 33199aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 33209aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 33219aebddd1SJeff Kirsher 3322efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 3323efaa408eSSuresh Reddy if (status) 3324efaa408eSSuresh Reddy goto err; 33259aebddd1SJeff Kirsher 3326b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33275eeff635SSuresh Reddy 33285eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 33295eeff635SSuresh Reddy resp = embedded_payload(wrb); 33305eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 33315eeff635SSuresh Reddy 33325eeff635SSuresh Reddy return status; 33339aebddd1SJeff Kirsher err: 3334b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33359aebddd1SJeff Kirsher return status; 33369aebddd1SJeff Kirsher } 33379aebddd1SJeff Kirsher 33389aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 33399aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 33409aebddd1SJeff Kirsher { 33419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33429aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 33439aebddd1SJeff Kirsher int status; 33449aebddd1SJeff Kirsher int i, j = 0; 33459aebddd1SJeff Kirsher 33462e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_HOST_DDR_DMA, 33472e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33482e365b1bSSomnath Kotur return -EPERM; 33492e365b1bSSomnath Kotur 3350b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33519aebddd1SJeff Kirsher 33529aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33539aebddd1SJeff Kirsher if (!wrb) { 33549aebddd1SJeff Kirsher status = -EBUSY; 33559aebddd1SJeff Kirsher goto err; 33569aebddd1SJeff Kirsher } 33579aebddd1SJeff Kirsher req = cmd->va; 3358106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3359a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 3360a2cc4e0bSSathya Perla cmd); 33619aebddd1SJeff Kirsher 33629aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33639aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 33649aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 33659aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 33669aebddd1SJeff Kirsher j++; 33679aebddd1SJeff Kirsher if (j > 7) 33689aebddd1SJeff Kirsher j = 0; 33699aebddd1SJeff Kirsher } 33709aebddd1SJeff Kirsher 33719aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33729aebddd1SJeff Kirsher 33739aebddd1SJeff Kirsher if (!status) { 33749aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 337503d28ffeSKalesh AP 33769aebddd1SJeff Kirsher resp = cmd->va; 33779aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 33789aebddd1SJeff Kirsher resp->snd_err) { 33799aebddd1SJeff Kirsher status = -1; 33809aebddd1SJeff Kirsher } 33819aebddd1SJeff Kirsher } 33829aebddd1SJeff Kirsher 33839aebddd1SJeff Kirsher err: 3384b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33859aebddd1SJeff Kirsher return status; 33869aebddd1SJeff Kirsher } 33879aebddd1SJeff Kirsher 33889aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 33899aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 33909aebddd1SJeff Kirsher { 33919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33929aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 33939aebddd1SJeff Kirsher int status; 33949aebddd1SJeff Kirsher 3395b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33969aebddd1SJeff Kirsher 33979aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33989aebddd1SJeff Kirsher if (!wrb) { 33999aebddd1SJeff Kirsher status = -EBUSY; 34009aebddd1SJeff Kirsher goto err; 34019aebddd1SJeff Kirsher } 34029aebddd1SJeff Kirsher req = nonemb_cmd->va; 34039aebddd1SJeff Kirsher 3404106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3405106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 3406106df1e3SSomnath Kotur nonemb_cmd); 34079aebddd1SJeff Kirsher 34089aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34099aebddd1SJeff Kirsher 34109aebddd1SJeff Kirsher err: 3411b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34129aebddd1SJeff Kirsher return status; 34139aebddd1SJeff Kirsher } 34149aebddd1SJeff Kirsher 341542f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 34169aebddd1SJeff Kirsher { 34179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34189aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 34199aebddd1SJeff Kirsher struct be_dma_mem cmd; 34209aebddd1SJeff Kirsher int status; 34219aebddd1SJeff Kirsher 3422f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 3423f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 3424f25b119cSPadmanabh Ratnakar return -EPERM; 3425f25b119cSPadmanabh Ratnakar 3426b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34279aebddd1SJeff Kirsher 34289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34299aebddd1SJeff Kirsher if (!wrb) { 34309aebddd1SJeff Kirsher status = -EBUSY; 34319aebddd1SJeff Kirsher goto err; 34329aebddd1SJeff Kirsher } 34339aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 3434750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3435e51000dbSSriharsha Basavapatna GFP_ATOMIC); 34369aebddd1SJeff Kirsher if (!cmd.va) { 34379aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 34389aebddd1SJeff Kirsher status = -ENOMEM; 34399aebddd1SJeff Kirsher goto err; 34409aebddd1SJeff Kirsher } 34419aebddd1SJeff Kirsher 34429aebddd1SJeff Kirsher req = cmd.va; 34439aebddd1SJeff Kirsher 3444106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3445106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 3446106df1e3SSomnath Kotur wrb, &cmd); 34479aebddd1SJeff Kirsher 34489aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34499aebddd1SJeff Kirsher if (!status) { 34509aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 34519aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 345203d28ffeSKalesh AP 345342f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 345442f11cf2SAjit Khaparde adapter->phy.interface_type = 34559aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 345642f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 345742f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 345842f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 345942f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 346042f11cf2SAjit Khaparde adapter->phy.misc_params = 346142f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 346268cb7e47SVasundhara Volam 346368cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 346468cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 346568cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 346668cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 346768cb7e47SVasundhara Volam } 34689aebddd1SJeff Kirsher } 3469e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 34709aebddd1SJeff Kirsher err: 3471b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34729aebddd1SJeff Kirsher return status; 34739aebddd1SJeff Kirsher } 34749aebddd1SJeff Kirsher 3475bc0ee163SLad, Prabhakar static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 34769aebddd1SJeff Kirsher { 34779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34789aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 34799aebddd1SJeff Kirsher int status; 34809aebddd1SJeff Kirsher 3481b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34829aebddd1SJeff Kirsher 34839aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34849aebddd1SJeff Kirsher if (!wrb) { 34859aebddd1SJeff Kirsher status = -EBUSY; 34869aebddd1SJeff Kirsher goto err; 34879aebddd1SJeff Kirsher } 34889aebddd1SJeff Kirsher 34899aebddd1SJeff Kirsher req = embedded_payload(wrb); 34909aebddd1SJeff Kirsher 3491106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3492106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 34939aebddd1SJeff Kirsher 34949aebddd1SJeff Kirsher req->hdr.domain = domain; 34959aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 34969aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 34979aebddd1SJeff Kirsher 34989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34999aebddd1SJeff Kirsher 35009aebddd1SJeff Kirsher err: 3501b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 35029aebddd1SJeff Kirsher return status; 35039aebddd1SJeff Kirsher } 35049aebddd1SJeff Kirsher 35059aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 35069aebddd1SJeff Kirsher { 35079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35089aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 35099aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 3510a155a5dbSSriharsha Basavapatna int status, i; 35119aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 35129aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 35139aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 3514a155a5dbSSriharsha Basavapatna u32 *serial_num; 35159aebddd1SJeff Kirsher 3516d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3517d98ef50fSSuresh Reddy return -1; 3518d98ef50fSSuresh Reddy 35199aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 35209aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 3521750afb08SLuis Chamberlain attribs_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 3522e51000dbSSriharsha Basavapatna attribs_cmd.size, 3523e51000dbSSriharsha Basavapatna &attribs_cmd.dma, GFP_ATOMIC); 35249aebddd1SJeff Kirsher if (!attribs_cmd.va) { 3525a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3526d98ef50fSSuresh Reddy status = -ENOMEM; 3527d98ef50fSSuresh Reddy goto err; 35289aebddd1SJeff Kirsher } 35299aebddd1SJeff Kirsher 35309aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35319aebddd1SJeff Kirsher if (!wrb) { 35329aebddd1SJeff Kirsher status = -EBUSY; 35339aebddd1SJeff Kirsher goto err; 35349aebddd1SJeff Kirsher } 35359aebddd1SJeff Kirsher req = attribs_cmd.va; 35369aebddd1SJeff Kirsher 3537106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3538a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 3539a2cc4e0bSSathya Perla wrb, &attribs_cmd); 35409aebddd1SJeff Kirsher 35419aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35429aebddd1SJeff Kirsher if (!status) { 35439aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 35449aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 3545a155a5dbSSriharsha Basavapatna serial_num = attribs->hba_attribs.controller_serial_number; 3546a155a5dbSSriharsha Basavapatna for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) 3547a155a5dbSSriharsha Basavapatna adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & 3548a155a5dbSSriharsha Basavapatna (BIT_MASK(16) - 1); 35496ee080bbSSriharsha Basavapatna /* For BEx, since GET_FUNC_CONFIG command is not 35506ee080bbSSriharsha Basavapatna * supported, we read funcnum here as a workaround. 35516ee080bbSSriharsha Basavapatna */ 35526ee080bbSSriharsha Basavapatna if (BEx_chip(adapter)) 35536ee080bbSSriharsha Basavapatna adapter->pf_num = attribs->hba_attribs.pci_funcnum; 35549aebddd1SJeff Kirsher } 35559aebddd1SJeff Kirsher 35569aebddd1SJeff Kirsher err: 35579aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 3558d98ef50fSSuresh Reddy if (attribs_cmd.va) 3559e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, attribs_cmd.size, 3560d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 35619aebddd1SJeff Kirsher return status; 35629aebddd1SJeff Kirsher } 35639aebddd1SJeff Kirsher 35649aebddd1SJeff Kirsher /* Uses mbox */ 35659aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 35669aebddd1SJeff Kirsher { 35679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35689aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 35699aebddd1SJeff Kirsher int status; 35709aebddd1SJeff Kirsher 35719aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 35729aebddd1SJeff Kirsher return -1; 35739aebddd1SJeff Kirsher 35749aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35759aebddd1SJeff Kirsher if (!wrb) { 35769aebddd1SJeff Kirsher status = -EBUSY; 35779aebddd1SJeff Kirsher goto err; 35789aebddd1SJeff Kirsher } 35799aebddd1SJeff Kirsher 35809aebddd1SJeff Kirsher req = embedded_payload(wrb); 35819aebddd1SJeff Kirsher 3582106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3583a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 3584a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 35859aebddd1SJeff Kirsher 35869aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 35879aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 35889aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 35899aebddd1SJeff Kirsher 35909aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35919aebddd1SJeff Kirsher if (!status) { 35929aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 359303d28ffeSKalesh AP 35949aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 35959aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 3596d379142bSSathya Perla if (!adapter->be3_native) 3597d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 3598d379142bSSathya Perla "adapter not in advanced mode\n"); 35999aebddd1SJeff Kirsher } 36009aebddd1SJeff Kirsher err: 36019aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 36029aebddd1SJeff Kirsher return status; 36039aebddd1SJeff Kirsher } 3604590c391dSPadmanabh Ratnakar 3605f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 3606f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 3607f25b119cSPadmanabh Ratnakar u32 domain) 3608f25b119cSPadmanabh Ratnakar { 3609f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3610f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 3611f25b119cSPadmanabh Ratnakar int status; 3612f25b119cSPadmanabh Ratnakar 3613b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3614f25b119cSPadmanabh Ratnakar 3615f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3616f25b119cSPadmanabh Ratnakar if (!wrb) { 3617f25b119cSPadmanabh Ratnakar status = -EBUSY; 3618f25b119cSPadmanabh Ratnakar goto err; 3619f25b119cSPadmanabh Ratnakar } 3620f25b119cSPadmanabh Ratnakar 3621f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 3622f25b119cSPadmanabh Ratnakar 3623f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3624f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 3625f25b119cSPadmanabh Ratnakar wrb, NULL); 3626f25b119cSPadmanabh Ratnakar 3627f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 3628f25b119cSPadmanabh Ratnakar 3629f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3630f25b119cSPadmanabh Ratnakar if (!status) { 3631f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 3632f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 363303d28ffeSKalesh AP 3634f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 363502308d74SSuresh Reddy 363602308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 363702308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 363802308d74SSuresh Reddy */ 363902308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 364002308d74SSuresh Reddy be_physfn(adapter)) 364102308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 3642f25b119cSPadmanabh Ratnakar } 3643f25b119cSPadmanabh Ratnakar 3644f25b119cSPadmanabh Ratnakar err: 3645b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3646f25b119cSPadmanabh Ratnakar return status; 3647f25b119cSPadmanabh Ratnakar } 3648f25b119cSPadmanabh Ratnakar 364904a06028SSathya Perla /* Set privilege(s) for a function */ 365004a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 365104a06028SSathya Perla u32 domain) 365204a06028SSathya Perla { 365304a06028SSathya Perla struct be_mcc_wrb *wrb; 365404a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 365504a06028SSathya Perla int status; 365604a06028SSathya Perla 3657b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 365804a06028SSathya Perla 365904a06028SSathya Perla wrb = wrb_from_mccq(adapter); 366004a06028SSathya Perla if (!wrb) { 366104a06028SSathya Perla status = -EBUSY; 366204a06028SSathya Perla goto err; 366304a06028SSathya Perla } 366404a06028SSathya Perla 366504a06028SSathya Perla req = embedded_payload(wrb); 366604a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 366704a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 366804a06028SSathya Perla wrb, NULL); 366904a06028SSathya Perla req->hdr.domain = domain; 367004a06028SSathya Perla if (lancer_chip(adapter)) 367104a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 367204a06028SSathya Perla else 367304a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 367404a06028SSathya Perla 367504a06028SSathya Perla status = be_mcc_notify_wait(adapter); 367604a06028SSathya Perla err: 3677b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 367804a06028SSathya Perla return status; 367904a06028SSathya Perla } 368004a06028SSathya Perla 36815a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 36825a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 36835a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 36845a712c13SSathya Perla */ 36851578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 3686b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 3687b188f090SSuresh Reddy u8 domain) 3688590c391dSPadmanabh Ratnakar { 3689590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3690590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 3691590c391dSPadmanabh Ratnakar int status; 3692590c391dSPadmanabh Ratnakar int mac_count; 3693e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 3694e5e1ee89SPadmanabh Ratnakar int i; 3695e5e1ee89SPadmanabh Ratnakar 3696e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 3697e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 3698750afb08SLuis Chamberlain get_mac_list_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 3699e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 3700e51000dbSSriharsha Basavapatna &get_mac_list_cmd.dma, 3701e51000dbSSriharsha Basavapatna GFP_ATOMIC); 3702e5e1ee89SPadmanabh Ratnakar 3703e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 3704e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 3705e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 3706e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 3707e5e1ee89SPadmanabh Ratnakar } 3708590c391dSPadmanabh Ratnakar 3709b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3710590c391dSPadmanabh Ratnakar 3711590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3712590c391dSPadmanabh Ratnakar if (!wrb) { 3713590c391dSPadmanabh Ratnakar status = -EBUSY; 3714e5e1ee89SPadmanabh Ratnakar goto out; 3715590c391dSPadmanabh Ratnakar } 3716e5e1ee89SPadmanabh Ratnakar 3717e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 3718590c391dSPadmanabh Ratnakar 3719590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3720bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 3721bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 3722590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3723e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 37245a712c13SSathya Perla if (*pmac_id_valid) { 37255a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 3726b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 37275a712c13SSathya Perla req->perm_override = 0; 37285a712c13SSathya Perla } else { 3729e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 37305a712c13SSathya Perla } 3731590c391dSPadmanabh Ratnakar 3732590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3733590c391dSPadmanabh Ratnakar if (!status) { 3734590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 3735e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 37365a712c13SSathya Perla 37375a712c13SSathya Perla if (*pmac_id_valid) { 37385a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 37395a712c13SSathya Perla ETH_ALEN); 37405a712c13SSathya Perla goto out; 37415a712c13SSathya Perla } 37425a712c13SSathya Perla 3743e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3744e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 3745dbedd44eSJoe Perches * or one or more true or pseudo permanent mac addresses. 37461578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 37471578e777SPadmanabh Ratnakar * found. 3748e5e1ee89SPadmanabh Ratnakar */ 3749590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3750e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3751e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3752e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3753e5e1ee89SPadmanabh Ratnakar 3754e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3755e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3756e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3757e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3758e5e1ee89SPadmanabh Ratnakar */ 3759e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 37605a712c13SSathya Perla *pmac_id_valid = true; 3761e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3762e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3763e5e1ee89SPadmanabh Ratnakar goto out; 3764590c391dSPadmanabh Ratnakar } 3765590c391dSPadmanabh Ratnakar } 37661578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 37675a712c13SSathya Perla *pmac_id_valid = false; 3768e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3769e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3770590c391dSPadmanabh Ratnakar } 3771590c391dSPadmanabh Ratnakar 3772e5e1ee89SPadmanabh Ratnakar out: 3773b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3774e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_mac_list_cmd.size, 3775e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3776590c391dSPadmanabh Ratnakar return status; 3777590c391dSPadmanabh Ratnakar } 3778590c391dSPadmanabh Ratnakar 3779a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3780a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 37815a712c13SSathya Perla { 3782b188f090SSuresh Reddy if (!active) 3783b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3784b188f090SSuresh Reddy if_handle, domain); 37853175d8c2SSathya Perla if (BEx_chip(adapter)) 37865a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3787b188f090SSuresh Reddy if_handle, curr_pmac_id); 37883175d8c2SSathya Perla else 37893175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 37903175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3791b188f090SSuresh Reddy &curr_pmac_id, 3792b188f090SSuresh Reddy if_handle, domain); 37935a712c13SSathya Perla } 37945a712c13SSathya Perla 379595046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 379695046b92SSathya Perla { 379795046b92SSathya Perla int status; 379895046b92SSathya Perla bool pmac_valid = false; 379995046b92SSathya Perla 3800c7bf7169SJoe Perches eth_zero_addr(mac); 380195046b92SSathya Perla 38023175d8c2SSathya Perla if (BEx_chip(adapter)) { 38033175d8c2SSathya Perla if (be_physfn(adapter)) 38043175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 38053175d8c2SSathya Perla 0); 380695046b92SSathya Perla else 380795046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 380895046b92SSathya Perla adapter->if_handle, 0); 38093175d8c2SSathya Perla } else { 38103175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3811b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 38123175d8c2SSathya Perla } 38133175d8c2SSathya Perla 381495046b92SSathya Perla return status; 381595046b92SSathya Perla } 381695046b92SSathya Perla 3817590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3818590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3819590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3820590c391dSPadmanabh Ratnakar { 3821590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3822590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3823590c391dSPadmanabh Ratnakar int status; 3824590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3825590c391dSPadmanabh Ratnakar 3826590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3827590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3828750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3829e51000dbSSriharsha Basavapatna GFP_KERNEL); 3830d0320f75SJoe Perches if (!cmd.va) 3831590c391dSPadmanabh Ratnakar return -ENOMEM; 3832590c391dSPadmanabh Ratnakar 3833b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3834590c391dSPadmanabh Ratnakar 3835590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3836590c391dSPadmanabh Ratnakar if (!wrb) { 3837590c391dSPadmanabh Ratnakar status = -EBUSY; 3838590c391dSPadmanabh Ratnakar goto err; 3839590c391dSPadmanabh Ratnakar } 3840590c391dSPadmanabh Ratnakar 3841590c391dSPadmanabh Ratnakar req = cmd.va; 3842590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3843590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3844590c391dSPadmanabh Ratnakar wrb, &cmd); 3845590c391dSPadmanabh Ratnakar 3846590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3847590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3848590c391dSPadmanabh Ratnakar if (mac_count) 3849590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3850590c391dSPadmanabh Ratnakar 3851590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3852590c391dSPadmanabh Ratnakar 3853590c391dSPadmanabh Ratnakar err: 3854a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3855b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3856590c391dSPadmanabh Ratnakar return status; 3857590c391dSPadmanabh Ratnakar } 38584762f6ceSAjit Khaparde 38593175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 38603175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 38613175d8c2SSathya Perla * current list are active. 38623175d8c2SSathya Perla */ 38633175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 38643175d8c2SSathya Perla { 38653175d8c2SSathya Perla bool active_mac = false; 38663175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 38673175d8c2SSathya Perla u32 pmac_id; 38683175d8c2SSathya Perla int status; 38693175d8c2SSathya Perla 38703175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3871b188f090SSuresh Reddy &pmac_id, if_id, dom); 3872b188f090SSuresh Reddy 38733175d8c2SSathya Perla if (!status && active_mac) 38743175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 38753175d8c2SSathya Perla 38763175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 38773175d8c2SSathya Perla } 38783175d8c2SSathya Perla 3879f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3880e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u16 hsw_mode, u8 spoofchk) 3881f1f3ee1bSAjit Khaparde { 3882f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3883f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3884f1f3ee1bSAjit Khaparde void *ctxt; 3885f1f3ee1bSAjit Khaparde int status; 3886f1f3ee1bSAjit Khaparde 3887884476beSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_HSW_CONFIG, 3888884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON)) 3889884476beSSomnath Kotur return -EPERM; 3890884476beSSomnath Kotur 3891b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3892f1f3ee1bSAjit Khaparde 3893f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3894f1f3ee1bSAjit Khaparde if (!wrb) { 3895f1f3ee1bSAjit Khaparde status = -EBUSY; 3896f1f3ee1bSAjit Khaparde goto err; 3897f1f3ee1bSAjit Khaparde } 3898f1f3ee1bSAjit Khaparde 3899f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3900f1f3ee1bSAjit Khaparde ctxt = &req->context; 3901f1f3ee1bSAjit Khaparde 3902f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3903a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3904a2cc4e0bSSathya Perla NULL); 3905f1f3ee1bSAjit Khaparde 3906f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3907f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3908f1f3ee1bSAjit Khaparde if (pvid) { 3909f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3910f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3911f1f3ee1bSAjit Khaparde } 3912884476beSSomnath Kotur if (hsw_mode) { 3913a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3914a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3915a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3916a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3917a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3918a77dcb8cSAjit Khaparde } 3919f1f3ee1bSAjit Khaparde 3920e7bcbd7bSKalesh AP /* Enable/disable both mac and vlan spoof checking */ 3921e7bcbd7bSKalesh AP if (!BEx_chip(adapter) && spoofchk) { 3922e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, mac_spoofchk, 3923e7bcbd7bSKalesh AP ctxt, spoofchk); 3924e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, vlan_spoofchk, 3925e7bcbd7bSKalesh AP ctxt, spoofchk); 3926e7bcbd7bSKalesh AP } 3927e7bcbd7bSKalesh AP 3928f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3929f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3930f1f3ee1bSAjit Khaparde 3931f1f3ee1bSAjit Khaparde err: 3932b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3933f1f3ee1bSAjit Khaparde return status; 3934f1f3ee1bSAjit Khaparde } 3935f1f3ee1bSAjit Khaparde 3936f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3937f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3938e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u8 *mode, bool *spoofchk) 3939f1f3ee1bSAjit Khaparde { 3940f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3941f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3942f1f3ee1bSAjit Khaparde void *ctxt; 3943f1f3ee1bSAjit Khaparde int status; 3944f1f3ee1bSAjit Khaparde u16 vid; 3945f1f3ee1bSAjit Khaparde 3946b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3947f1f3ee1bSAjit Khaparde 3948f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3949f1f3ee1bSAjit Khaparde if (!wrb) { 3950f1f3ee1bSAjit Khaparde status = -EBUSY; 3951f1f3ee1bSAjit Khaparde goto err; 3952f1f3ee1bSAjit Khaparde } 3953f1f3ee1bSAjit Khaparde 3954f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3955f1f3ee1bSAjit Khaparde ctxt = &req->context; 3956f1f3ee1bSAjit Khaparde 3957f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3958a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3959a2cc4e0bSSathya Perla NULL); 3960f1f3ee1bSAjit Khaparde 3961f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3962a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3963a77dcb8cSAjit Khaparde ctxt, intf_id); 3964f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3965a77dcb8cSAjit Khaparde 39662c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3967a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3968a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3969a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3970a77dcb8cSAjit Khaparde } 3971f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3972f1f3ee1bSAjit Khaparde 3973f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3974f1f3ee1bSAjit Khaparde if (!status) { 3975f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3976f1f3ee1bSAjit Khaparde embedded_payload(wrb); 397703d28ffeSKalesh AP 3978a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3979f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3980f1f3ee1bSAjit Khaparde pvid, &resp->context); 3981a77dcb8cSAjit Khaparde if (pvid) 3982f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3983a77dcb8cSAjit Khaparde if (mode) 3984a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3985a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3986e7bcbd7bSKalesh AP if (spoofchk) 3987e7bcbd7bSKalesh AP *spoofchk = 3988e7bcbd7bSKalesh AP AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3989e7bcbd7bSKalesh AP spoofchk, &resp->context); 3990f1f3ee1bSAjit Khaparde } 3991f1f3ee1bSAjit Khaparde 3992f1f3ee1bSAjit Khaparde err: 3993b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3994f1f3ee1bSAjit Khaparde return status; 3995f1f3ee1bSAjit Khaparde } 3996f1f3ee1bSAjit Khaparde 3997f7062ee5SSathya Perla static bool be_is_wol_excluded(struct be_adapter *adapter) 3998f7062ee5SSathya Perla { 3999f7062ee5SSathya Perla struct pci_dev *pdev = adapter->pdev; 4000f7062ee5SSathya Perla 400118c57c74SKalesh AP if (be_virtfn(adapter)) 4002f7062ee5SSathya Perla return true; 4003f7062ee5SSathya Perla 4004f7062ee5SSathya Perla switch (pdev->subsystem_device) { 4005f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID1: 4006f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID2: 4007f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID3: 4008f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID4: 4009f7062ee5SSathya Perla return true; 4010f7062ee5SSathya Perla default: 4011f7062ee5SSathya Perla return false; 4012f7062ee5SSathya Perla } 4013f7062ee5SSathya Perla } 4014f7062ee5SSathya Perla 40154762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 40164762f6ceSAjit Khaparde { 40174762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 40184762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 401976a9e08eSSuresh Reddy int status = 0; 40204762f6ceSAjit Khaparde struct be_dma_mem cmd; 40214762f6ceSAjit Khaparde 4022f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 4023f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 4024f25b119cSPadmanabh Ratnakar return -EPERM; 4025f25b119cSPadmanabh Ratnakar 402676a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 402776a9e08eSSuresh Reddy return status; 402876a9e08eSSuresh Reddy 4029d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4030d98ef50fSSuresh Reddy return -1; 4031d98ef50fSSuresh Reddy 40324762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 40334762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 4034750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4035e51000dbSSriharsha Basavapatna GFP_ATOMIC); 40364762f6ceSAjit Khaparde if (!cmd.va) { 4037a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 4038d98ef50fSSuresh Reddy status = -ENOMEM; 4039d98ef50fSSuresh Reddy goto err; 40404762f6ceSAjit Khaparde } 40414762f6ceSAjit Khaparde 40424762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 40434762f6ceSAjit Khaparde if (!wrb) { 40444762f6ceSAjit Khaparde status = -EBUSY; 40454762f6ceSAjit Khaparde goto err; 40464762f6ceSAjit Khaparde } 40474762f6ceSAjit Khaparde 40484762f6ceSAjit Khaparde req = cmd.va; 40494762f6ceSAjit Khaparde 40504762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 40514762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 405276a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 40534762f6ceSAjit Khaparde 40544762f6ceSAjit Khaparde req->hdr.version = 1; 40554762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 40564762f6ceSAjit Khaparde 40574762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 40584762f6ceSAjit Khaparde if (!status) { 40594762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 406003d28ffeSKalesh AP 40614762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 40624762f6ceSAjit Khaparde 40634762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 406445f13df7SSriharsha Basavapatna 406545f13df7SSriharsha Basavapatna /* Non-zero macaddr indicates WOL is enabled */ 406645f13df7SSriharsha Basavapatna if (adapter->wol_cap & BE_WOL_CAP && 406745f13df7SSriharsha Basavapatna !is_zero_ether_addr(resp->magic_mac)) 406876a9e08eSSuresh Reddy adapter->wol_en = true; 40694762f6ceSAjit Khaparde } 40704762f6ceSAjit Khaparde err: 40714762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 4072d98ef50fSSuresh Reddy if (cmd.va) 4073e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4074e51000dbSSriharsha Basavapatna cmd.dma); 40754762f6ceSAjit Khaparde return status; 4076941a77d5SSomnath Kotur 4077941a77d5SSomnath Kotur } 4078baaa08d1SVasundhara Volam 4079baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 4080baaa08d1SVasundhara Volam { 4081baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4082baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4083baaa08d1SVasundhara Volam int status; 4084baaa08d1SVasundhara Volam int i, j; 4085baaa08d1SVasundhara Volam 4086baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4087baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4088750afb08SLuis Chamberlain extfat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 4089e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4090e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4091baaa08d1SVasundhara Volam if (!extfat_cmd.va) 4092baaa08d1SVasundhara Volam return -ENOMEM; 4093baaa08d1SVasundhara Volam 4094baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4095baaa08d1SVasundhara Volam if (status) 4096baaa08d1SVasundhara Volam goto err; 4097baaa08d1SVasundhara Volam 4098baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 4099baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 4100baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 4101baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 410203d28ffeSKalesh AP 4103baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 4104baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 4105baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 4106baaa08d1SVasundhara Volam cpu_to_le32(level); 4107baaa08d1SVasundhara Volam } 4108baaa08d1SVasundhara Volam } 4109baaa08d1SVasundhara Volam 4110baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 4111baaa08d1SVasundhara Volam err: 4112e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4113baaa08d1SVasundhara Volam extfat_cmd.dma); 4114baaa08d1SVasundhara Volam return status; 4115baaa08d1SVasundhara Volam } 4116baaa08d1SVasundhara Volam 4117baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 4118baaa08d1SVasundhara Volam { 4119baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4120baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4121baaa08d1SVasundhara Volam int status, j; 4122baaa08d1SVasundhara Volam int level = 0; 4123baaa08d1SVasundhara Volam 4124baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4125baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4126750afb08SLuis Chamberlain extfat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 4127e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4128e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4129baaa08d1SVasundhara Volam 4130baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 4131baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 4132baaa08d1SVasundhara Volam __func__); 4133baaa08d1SVasundhara Volam goto err; 4134baaa08d1SVasundhara Volam } 4135baaa08d1SVasundhara Volam 4136baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4137baaa08d1SVasundhara Volam if (!status) { 4138baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 4139baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 414003d28ffeSKalesh AP 4141baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 4142baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 4143baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 4144baaa08d1SVasundhara Volam } 4145baaa08d1SVasundhara Volam } 4146e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4147baaa08d1SVasundhara Volam extfat_cmd.dma); 4148baaa08d1SVasundhara Volam err: 4149baaa08d1SVasundhara Volam return level; 4150baaa08d1SVasundhara Volam } 4151baaa08d1SVasundhara Volam 4152941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 4153941a77d5SSomnath Kotur struct be_dma_mem *cmd) 4154941a77d5SSomnath Kotur { 4155941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4156941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 4157941a77d5SSomnath Kotur int status; 4158941a77d5SSomnath Kotur 415962259ac4SSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 416062259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON)) 416162259ac4SSomnath Kotur return -EPERM; 416262259ac4SSomnath Kotur 4163941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 4164941a77d5SSomnath Kotur return -1; 4165941a77d5SSomnath Kotur 4166941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 4167941a77d5SSomnath Kotur if (!wrb) { 4168941a77d5SSomnath Kotur status = -EBUSY; 4169941a77d5SSomnath Kotur goto err; 4170941a77d5SSomnath Kotur } 4171941a77d5SSomnath Kotur 4172941a77d5SSomnath Kotur req = cmd->va; 4173941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 417462259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 4175941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4176941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 4177941a77d5SSomnath Kotur 4178941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 4179941a77d5SSomnath Kotur err: 4180941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 4181941a77d5SSomnath Kotur return status; 4182941a77d5SSomnath Kotur } 4183941a77d5SSomnath Kotur 4184941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 4185941a77d5SSomnath Kotur struct be_dma_mem *cmd, 4186941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 4187941a77d5SSomnath Kotur { 4188941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4189941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 4190941a77d5SSomnath Kotur int status; 4191941a77d5SSomnath Kotur 4192b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4193941a77d5SSomnath Kotur 4194941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 4195941a77d5SSomnath Kotur if (!wrb) { 4196941a77d5SSomnath Kotur status = -EBUSY; 4197941a77d5SSomnath Kotur goto err; 4198941a77d5SSomnath Kotur } 4199941a77d5SSomnath Kotur 4200941a77d5SSomnath Kotur req = cmd->va; 4201941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 4202941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 420362259ac4SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITIES, 4204941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4205941a77d5SSomnath Kotur 4206941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 4207941a77d5SSomnath Kotur err: 4208b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4209941a77d5SSomnath Kotur return status; 42104762f6ceSAjit Khaparde } 42116a4ab669SParav Pandit 421221252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter) 4213b4e32a71SPadmanabh Ratnakar { 4214b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 421521252377SVasundhara Volam struct be_mcc_wrb *wrb; 4216b4e32a71SPadmanabh Ratnakar int status; 4217b4e32a71SPadmanabh Ratnakar 421821252377SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 421921252377SVasundhara Volam return -1; 4220b4e32a71SPadmanabh Ratnakar 422121252377SVasundhara Volam wrb = wrb_from_mbox(adapter); 4222b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 4223b4e32a71SPadmanabh Ratnakar 4224b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4225b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 4226b4e32a71SPadmanabh Ratnakar NULL); 422721252377SVasundhara Volam if (!BEx_chip(adapter)) 4228b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 4229b4e32a71SPadmanabh Ratnakar 423021252377SVasundhara Volam status = be_mbox_notify_wait(adapter); 4231b4e32a71SPadmanabh Ratnakar if (!status) { 4232b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 423303d28ffeSKalesh AP 423421252377SVasundhara Volam adapter->port_name = resp->port_name[adapter->hba_port_num]; 4235b4e32a71SPadmanabh Ratnakar } else { 423621252377SVasundhara Volam adapter->port_name = adapter->hba_port_num + '0'; 4237b4e32a71SPadmanabh Ratnakar } 423821252377SVasundhara Volam 423921252377SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4240b4e32a71SPadmanabh Ratnakar return status; 4241b4e32a71SPadmanabh Ratnakar } 4242b4e32a71SPadmanabh Ratnakar 4243980df249SSuresh Reddy /* When more than 1 NIC descriptor is present in the descriptor list, 4244980df249SSuresh Reddy * the caller must specify the pf_num to obtain the NIC descriptor 4245980df249SSuresh Reddy * corresponding to its pci function. 4246980df249SSuresh Reddy * get_vft must be true when the caller wants the VF-template desc of the 4247980df249SSuresh Reddy * PF-pool. 4248980df249SSuresh Reddy * The pf_num should be set to PF_NUM_IGNORE when the caller knows 4249980df249SSuresh Reddy * that only it's NIC descriptor is present in the descriptor list. 4250980df249SSuresh Reddy */ 425110cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 4252980df249SSuresh Reddy bool get_vft, u8 pf_num) 4253abb93951SPadmanabh Ratnakar { 4254150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 425510cccf60SVasundhara Volam struct be_nic_res_desc *nic; 4256abb93951SPadmanabh Ratnakar int i; 4257abb93951SPadmanabh Ratnakar 4258abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 4259150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 426010cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 426110cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 4262980df249SSuresh Reddy 4263980df249SSuresh Reddy if ((pf_num == PF_NUM_IGNORE || 4264980df249SSuresh Reddy nic->pf_num == pf_num) && 4265980df249SSuresh Reddy (!get_vft || nic->flags & BIT(VFT_SHIFT))) 426610cccf60SVasundhara Volam return nic; 426710cccf60SVasundhara Volam } 4268150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4269150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4270150d58c7SVasundhara Volam } 4271950e2958SWei Yang return NULL; 4272abb93951SPadmanabh Ratnakar } 4273abb93951SPadmanabh Ratnakar 4274980df249SSuresh Reddy static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count, 4275980df249SSuresh Reddy u8 pf_num) 427610cccf60SVasundhara Volam { 4277980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, true, pf_num); 427810cccf60SVasundhara Volam } 427910cccf60SVasundhara Volam 4280980df249SSuresh Reddy static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count, 4281980df249SSuresh Reddy u8 pf_num) 428210cccf60SVasundhara Volam { 4283980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, false, pf_num); 428410cccf60SVasundhara Volam } 428510cccf60SVasundhara Volam 4286980df249SSuresh Reddy static struct be_pcie_res_desc *be_get_pcie_desc(u8 *buf, u32 desc_count, 4287980df249SSuresh Reddy u8 pf_num) 4288150d58c7SVasundhara Volam { 4289150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4290150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4291150d58c7SVasundhara Volam int i; 4292150d58c7SVasundhara Volam 4293150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 4294980df249SSuresh Reddy if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4295980df249SSuresh Reddy hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4296150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 4297980df249SSuresh Reddy if (pcie->pf_num == pf_num) 4298150d58c7SVasundhara Volam return pcie; 4299150d58c7SVasundhara Volam } 4300150d58c7SVasundhara Volam 4301150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4302150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4303150d58c7SVasundhara Volam } 4304abb93951SPadmanabh Ratnakar return NULL; 4305abb93951SPadmanabh Ratnakar } 4306abb93951SPadmanabh Ratnakar 4307f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 4308f93f160bSVasundhara Volam { 4309f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4310f93f160bSVasundhara Volam int i; 4311f93f160bSVasundhara Volam 4312f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 4313f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 4314f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 4315f93f160bSVasundhara Volam 4316f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4317f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4318f93f160bSVasundhara Volam } 4319f93f160bSVasundhara Volam return NULL; 4320f93f160bSVasundhara Volam } 4321f93f160bSVasundhara Volam 432292bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 432392bf14abSSathya Perla struct be_nic_res_desc *desc) 432492bf14abSSathya Perla { 432592bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 432692bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 432792bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 432892bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 432992bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 433092bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 433192bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 4332f2858738SVasundhara Volam res->max_cq_count = le16_to_cpu(desc->cq_count); 4333f2858738SVasundhara Volam res->max_iface_count = le16_to_cpu(desc->iface_count); 4334f2858738SVasundhara Volam res->max_mcc_count = le16_to_cpu(desc->mcc_count); 433592bf14abSSathya Perla /* Clear flags that driver is not interested in */ 433692bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 433792bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 433892bf14abSSathya Perla } 433992bf14abSSathya Perla 4340abb93951SPadmanabh Ratnakar /* Uses Mbox */ 434192bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 4342abb93951SPadmanabh Ratnakar { 4343abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4344abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 4345abb93951SPadmanabh Ratnakar int status; 4346abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 4347abb93951SPadmanabh Ratnakar 4348d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4349d98ef50fSSuresh Reddy return -1; 4350d98ef50fSSuresh Reddy 4351abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 4352abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 4353750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4354e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4355abb93951SPadmanabh Ratnakar if (!cmd.va) { 4356abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 4357d98ef50fSSuresh Reddy status = -ENOMEM; 4358d98ef50fSSuresh Reddy goto err; 4359abb93951SPadmanabh Ratnakar } 4360abb93951SPadmanabh Ratnakar 4361abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 4362abb93951SPadmanabh Ratnakar if (!wrb) { 4363abb93951SPadmanabh Ratnakar status = -EBUSY; 4364abb93951SPadmanabh Ratnakar goto err; 4365abb93951SPadmanabh Ratnakar } 4366abb93951SPadmanabh Ratnakar 4367abb93951SPadmanabh Ratnakar req = cmd.va; 4368abb93951SPadmanabh Ratnakar 4369abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4370abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 4371abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 4372abb93951SPadmanabh Ratnakar 437328710c55SKalesh AP if (skyhawk_chip(adapter)) 437428710c55SKalesh AP req->hdr.version = 1; 437528710c55SKalesh AP 4376abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 4377abb93951SPadmanabh Ratnakar if (!status) { 4378abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 4379abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 4380150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 4381abb93951SPadmanabh Ratnakar 4382980df249SSuresh Reddy /* GET_FUNC_CONFIG returns resource descriptors of the 4383980df249SSuresh Reddy * current function only. So, pf_num should be set to 4384980df249SSuresh Reddy * PF_NUM_IGNORE. 4385980df249SSuresh Reddy */ 4386980df249SSuresh Reddy desc = be_get_func_nic_desc(resp->func_param, desc_count, 4387980df249SSuresh Reddy PF_NUM_IGNORE); 4388abb93951SPadmanabh Ratnakar if (!desc) { 4389abb93951SPadmanabh Ratnakar status = -EINVAL; 4390abb93951SPadmanabh Ratnakar goto err; 4391abb93951SPadmanabh Ratnakar } 4392980df249SSuresh Reddy 4393980df249SSuresh Reddy /* Store pf_num & vf_num for later use in GET_PROFILE_CONFIG */ 4394980df249SSuresh Reddy adapter->pf_num = desc->pf_num; 4395980df249SSuresh Reddy adapter->vf_num = desc->vf_num; 4396980df249SSuresh Reddy 4397980df249SSuresh Reddy if (res) 439892bf14abSSathya Perla be_copy_nic_desc(res, desc); 4399abb93951SPadmanabh Ratnakar } 4400abb93951SPadmanabh Ratnakar err: 4401abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 4402d98ef50fSSuresh Reddy if (cmd.va) 4403e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4404e51000dbSSriharsha Basavapatna cmd.dma); 4405abb93951SPadmanabh Ratnakar return status; 4406abb93951SPadmanabh Ratnakar } 4407abb93951SPadmanabh Ratnakar 4408de2b1e03SSomnath Kotur /* This routine returns a list of all the NIC PF_nums in the adapter */ 4409d766e7e6SBaoyou Xie static u16 be_get_nic_pf_num_list(u8 *buf, u32 desc_count, u16 *nic_pf_nums) 4410de2b1e03SSomnath Kotur { 4411de2b1e03SSomnath Kotur struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4412de2b1e03SSomnath Kotur struct be_pcie_res_desc *pcie = NULL; 4413de2b1e03SSomnath Kotur int i; 4414de2b1e03SSomnath Kotur u16 nic_pf_count = 0; 4415de2b1e03SSomnath Kotur 4416de2b1e03SSomnath Kotur for (i = 0; i < desc_count; i++) { 4417de2b1e03SSomnath Kotur if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4418de2b1e03SSomnath Kotur hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4419de2b1e03SSomnath Kotur pcie = (struct be_pcie_res_desc *)hdr; 4420de2b1e03SSomnath Kotur if (pcie->pf_state && (pcie->pf_type == MISSION_NIC || 4421de2b1e03SSomnath Kotur pcie->pf_type == MISSION_RDMA)) { 4422de2b1e03SSomnath Kotur nic_pf_nums[nic_pf_count++] = pcie->pf_num; 4423de2b1e03SSomnath Kotur } 4424de2b1e03SSomnath Kotur } 4425de2b1e03SSomnath Kotur 4426de2b1e03SSomnath Kotur hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4427de2b1e03SSomnath Kotur hdr = (void *)hdr + hdr->desc_len; 4428de2b1e03SSomnath Kotur } 4429de2b1e03SSomnath Kotur return nic_pf_count; 4430de2b1e03SSomnath Kotur } 4431de2b1e03SSomnath Kotur 4432980df249SSuresh Reddy /* Will use MBOX only if MCCQ has not been created */ 443392bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 4434de2b1e03SSomnath Kotur struct be_resources *res, 4435de2b1e03SSomnath Kotur struct be_port_resources *port_res, 4436de2b1e03SSomnath Kotur u8 profile_type, u8 query, u8 domain) 4437a05f99dbSVasundhara Volam { 4438150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 4439ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 444010cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 4441150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4442f93f160bSVasundhara Volam struct be_port_res_desc *port; 4443150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 4444ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 4445a05f99dbSVasundhara Volam struct be_dma_mem cmd; 4446f2858738SVasundhara Volam u16 desc_count; 4447a05f99dbSVasundhara Volam int status; 4448a05f99dbSVasundhara Volam 4449a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4450a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 4451750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4452e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4453150d58c7SVasundhara Volam if (!cmd.va) 4454a05f99dbSVasundhara Volam return -ENOMEM; 4455a05f99dbSVasundhara Volam 4456ba48c0c9SVasundhara Volam req = cmd.va; 4457ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4458ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 4459ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 4460ba48c0c9SVasundhara Volam 4461ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 4462ba48c0c9SVasundhara Volam req->hdr.version = 1; 4463de2b1e03SSomnath Kotur req->type = profile_type; 446472ef3a88SSomnath Kotur req->hdr.domain = domain; 4465ba48c0c9SVasundhara Volam 4466f2858738SVasundhara Volam /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the 4467f2858738SVasundhara Volam * descriptors with all bits set to "1" for the fields which can be 4468f2858738SVasundhara Volam * modified using SET_PROFILE_CONFIG cmd. 4469f2858738SVasundhara Volam */ 4470f2858738SVasundhara Volam if (query == RESOURCE_MODIFIABLE) 4471f2858738SVasundhara Volam req->type |= QUERY_MODIFIABLE_FIELDS_TYPE; 4472f2858738SVasundhara Volam 4473ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4474150d58c7SVasundhara Volam if (status) 4475abb93951SPadmanabh Ratnakar goto err; 4476150d58c7SVasundhara Volam 4477150d58c7SVasundhara Volam resp = cmd.va; 4478f2858738SVasundhara Volam desc_count = le16_to_cpu(resp->desc_count); 4479150d58c7SVasundhara Volam 4480de2b1e03SSomnath Kotur if (port_res) { 4481de2b1e03SSomnath Kotur u16 nic_pf_cnt = 0, i; 4482de2b1e03SSomnath Kotur u16 nic_pf_num_list[MAX_NIC_FUNCS]; 4483de2b1e03SSomnath Kotur 4484de2b1e03SSomnath Kotur nic_pf_cnt = be_get_nic_pf_num_list(resp->func_param, 4485de2b1e03SSomnath Kotur desc_count, 4486de2b1e03SSomnath Kotur nic_pf_num_list); 4487de2b1e03SSomnath Kotur 4488de2b1e03SSomnath Kotur for (i = 0; i < nic_pf_cnt; i++) { 4489de2b1e03SSomnath Kotur nic = be_get_func_nic_desc(resp->func_param, desc_count, 4490de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4491de2b1e03SSomnath Kotur if (nic->link_param == adapter->port_num) { 4492de2b1e03SSomnath Kotur port_res->nic_pfs++; 4493de2b1e03SSomnath Kotur pcie = be_get_pcie_desc(resp->func_param, 4494de2b1e03SSomnath Kotur desc_count, 4495de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4496de2b1e03SSomnath Kotur port_res->max_vfs += le16_to_cpu(pcie->num_vfs); 4497de2b1e03SSomnath Kotur } 4498de2b1e03SSomnath Kotur } 44999d7f19dcSPetr Oros goto err; 4500de2b1e03SSomnath Kotur } 4501de2b1e03SSomnath Kotur 4502980df249SSuresh Reddy pcie = be_get_pcie_desc(resp->func_param, desc_count, 4503980df249SSuresh Reddy adapter->pf_num); 4504150d58c7SVasundhara Volam if (pcie) 450592bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 4506150d58c7SVasundhara Volam 4507f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 4508f93f160bSVasundhara Volam if (port) 4509f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 4510f93f160bSVasundhara Volam 4511980df249SSuresh Reddy nic = be_get_func_nic_desc(resp->func_param, desc_count, 4512980df249SSuresh Reddy adapter->pf_num); 451392bf14abSSathya Perla if (nic) 451492bf14abSSathya Perla be_copy_nic_desc(res, nic); 451592bf14abSSathya Perla 4516980df249SSuresh Reddy vf_res = be_get_vft_desc(resp->func_param, desc_count, 4517980df249SSuresh Reddy adapter->pf_num); 451810cccf60SVasundhara Volam if (vf_res) 451910cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 4520abb93951SPadmanabh Ratnakar err: 4521a05f99dbSVasundhara Volam if (cmd.va) 4522e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4523e51000dbSSriharsha Basavapatna cmd.dma); 4524abb93951SPadmanabh Ratnakar return status; 4525abb93951SPadmanabh Ratnakar } 4526abb93951SPadmanabh Ratnakar 4527bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 4528bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 4529bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 4530d5c18473SPadmanabh Ratnakar { 4531d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 4532bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 4533bec84e6bSVasundhara Volam struct be_dma_mem cmd; 4534d5c18473SPadmanabh Ratnakar int status; 4535d5c18473SPadmanabh Ratnakar 4536bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4537bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 4538750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4539e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4540bec84e6bSVasundhara Volam if (!cmd.va) 4541bec84e6bSVasundhara Volam return -ENOMEM; 4542d5c18473SPadmanabh Ratnakar 4543bec84e6bSVasundhara Volam req = cmd.va; 4544d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4545bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 4546bec84e6bSVasundhara Volam &wrb, &cmd); 4547a401801cSSathya Perla req->hdr.version = version; 4548d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 4549bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 4550a401801cSSathya Perla memcpy(req->desc, desc, size); 4551d5c18473SPadmanabh Ratnakar 4552bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4553bec84e6bSVasundhara Volam 4554bec84e6bSVasundhara Volam if (cmd.va) 4555e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4556e51000dbSSriharsha Basavapatna cmd.dma); 4557d5c18473SPadmanabh Ratnakar return status; 4558d5c18473SPadmanabh Ratnakar } 4559d5c18473SPadmanabh Ratnakar 4560a401801cSSathya Perla /* Mark all fields invalid */ 4561d766e7e6SBaoyou Xie static void be_reset_nic_desc(struct be_nic_res_desc *nic) 4562a401801cSSathya Perla { 4563a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 4564a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 4565a401801cSSathya Perla nic->mcc_count = 0xFFFF; 4566a401801cSSathya Perla nic->vlan_count = 0xFFFF; 4567a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 4568a401801cSSathya Perla nic->txq_count = 0xFFFF; 4569a401801cSSathya Perla nic->rq_count = 0xFFFF; 4570a401801cSSathya Perla nic->rssq_count = 0xFFFF; 4571a401801cSSathya Perla nic->lro_count = 0xFFFF; 4572a401801cSSathya Perla nic->cq_count = 0xFFFF; 4573a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 4574a401801cSSathya Perla nic->eq_count = 0xFFFF; 45750f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 4576a401801cSSathya Perla nic->link_param = 0xFF; 45770f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 4578a401801cSSathya Perla nic->acpi_params = 0xFF; 4579a401801cSSathya Perla nic->wol_param = 0x0F; 45800f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 45810f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 4582bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 4583a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 4584a401801cSSathya Perla } 4585a401801cSSathya Perla 4586bec84e6bSVasundhara Volam /* Mark all fields invalid */ 4587bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 4588bec84e6bSVasundhara Volam { 4589bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 4590bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 4591bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 4592bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 4593bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 4594bec84e6bSVasundhara Volam } 4595bec84e6bSVasundhara Volam 45960f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 45970f77ba73SRavikumar Nelavelli u8 domain) 4598a401801cSSathya Perla { 4599a401801cSSathya Perla struct be_nic_res_desc nic_desc; 46000f77ba73SRavikumar Nelavelli u32 bw_percent; 46010f77ba73SRavikumar Nelavelli u16 version = 0; 46020f77ba73SRavikumar Nelavelli 46030f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 46040f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 4605a401801cSSathya Perla 4606a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 4607980df249SSuresh Reddy nic_desc.pf_num = adapter->pf_num; 46080f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 460958bdeaa6SKalesh AP nic_desc.bw_min = 0; 46100f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 4611a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 4612a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 4613a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 4614a401801cSSathya Perla (1 << NOSV_SHIFT); 46150f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 46160f77ba73SRavikumar Nelavelli } else { 46170f77ba73SRavikumar Nelavelli version = 1; 46180f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 46190f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 46200f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 46210f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 46220f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 46230f77ba73SRavikumar Nelavelli } 4624a401801cSSathya Perla 4625a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 46260f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 4627bec84e6bSVasundhara Volam 1, version, domain); 4628bec84e6bSVasundhara Volam } 4629bec84e6bSVasundhara Volam 4630bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 4631f2858738SVasundhara Volam struct be_resources pool_res, u16 num_vfs, 4632b9263cbfSSuresh Reddy struct be_resources *vft_res) 4633bec84e6bSVasundhara Volam { 4634bec84e6bSVasundhara Volam struct { 4635bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 4636bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 4637bec84e6bSVasundhara Volam } __packed desc; 4638bec84e6bSVasundhara Volam 4639bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 4640bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 4641bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 4642bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4643f2858738SVasundhara Volam desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4644bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 4645bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 4646bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 4647bec84e6bSVasundhara Volam 4648bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 4649bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 4650bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 4651bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4652b9263cbfSSuresh Reddy desc.nic_vft.flags = vft_res->flags | BIT(VFT_SHIFT) | 4653b9263cbfSSuresh Reddy BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4654bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 4655bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 4656b9263cbfSSuresh Reddy desc.nic_vft.cap_flags = cpu_to_le32(vft_res->vf_if_cap_flags); 4657b9263cbfSSuresh Reddy desc.nic_vft.rq_count = cpu_to_le16(vft_res->max_rx_qs); 4658b9263cbfSSuresh Reddy desc.nic_vft.txq_count = cpu_to_le16(vft_res->max_tx_qs); 4659b9263cbfSSuresh Reddy desc.nic_vft.rssq_count = cpu_to_le16(vft_res->max_rss_qs); 4660b9263cbfSSuresh Reddy desc.nic_vft.cq_count = cpu_to_le16(vft_res->max_cq_count); 4661bec84e6bSVasundhara Volam 4662b9263cbfSSuresh Reddy if (vft_res->max_uc_mac) 4663b9263cbfSSuresh Reddy desc.nic_vft.unicast_mac_count = 4664b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_uc_mac); 4665b9263cbfSSuresh Reddy if (vft_res->max_vlans) 4666b9263cbfSSuresh Reddy desc.nic_vft.vlan_count = cpu_to_le16(vft_res->max_vlans); 4667b9263cbfSSuresh Reddy if (vft_res->max_iface_count) 4668b9263cbfSSuresh Reddy desc.nic_vft.iface_count = 4669b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_iface_count); 4670b9263cbfSSuresh Reddy if (vft_res->max_mcc_count) 4671b9263cbfSSuresh Reddy desc.nic_vft.mcc_count = cpu_to_le16(vft_res->max_mcc_count); 4672bec84e6bSVasundhara Volam 4673bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 4674bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 4675a401801cSSathya Perla } 4676a401801cSSathya Perla 4677a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 4678a401801cSSathya Perla { 4679a401801cSSathya Perla struct be_mcc_wrb *wrb; 4680a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 4681a401801cSSathya Perla int status; 4682a401801cSSathya Perla 4683a401801cSSathya Perla if (iface == 0xFFFFFFFF) 4684a401801cSSathya Perla return -1; 4685a401801cSSathya Perla 4686b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4687a401801cSSathya Perla 4688a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 4689a401801cSSathya Perla if (!wrb) { 4690a401801cSSathya Perla status = -EBUSY; 4691a401801cSSathya Perla goto err; 4692a401801cSSathya Perla } 4693a401801cSSathya Perla req = embedded_payload(wrb); 4694a401801cSSathya Perla 4695a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4696a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 4697a401801cSSathya Perla wrb, NULL); 4698a401801cSSathya Perla req->op = op; 4699a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 4700a401801cSSathya Perla 4701a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 4702a401801cSSathya Perla err: 4703b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4704a401801cSSathya Perla return status; 4705a401801cSSathya Perla } 4706a401801cSSathya Perla 4707a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 4708a401801cSSathya Perla { 4709a401801cSSathya Perla struct be_port_res_desc port_desc; 4710a401801cSSathya Perla 4711a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 4712a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 4713a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4714a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 4715a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 4716a401801cSSathya Perla if (port) { 4717a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 4718a401801cSSathya Perla (1 << RCVID_SHIFT); 4719a401801cSSathya Perla port_desc.nv_port = swab16(port); 4720a401801cSSathya Perla } else { 4721a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 4722a401801cSSathya Perla port_desc.nv_port = 0; 4723a401801cSSathya Perla } 4724a401801cSSathya Perla 4725a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 4726bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 4727a401801cSSathya Perla } 4728a401801cSSathya Perla 47294c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 47304c876616SSathya Perla int vf_num) 47314c876616SSathya Perla { 47324c876616SSathya Perla struct be_mcc_wrb *wrb; 47334c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 47344c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 47354c876616SSathya Perla int status; 47364c876616SSathya Perla 4737b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 47384c876616SSathya Perla 47394c876616SSathya Perla wrb = wrb_from_mccq(adapter); 47404c876616SSathya Perla if (!wrb) { 47414c876616SSathya Perla status = -EBUSY; 47424c876616SSathya Perla goto err; 47434c876616SSathya Perla } 47444c876616SSathya Perla req = embedded_payload(wrb); 47454c876616SSathya Perla 47464c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 47474c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 47484c876616SSathya Perla wrb, NULL); 47494c876616SSathya Perla req->hdr.domain = vf_num + 1; 47504c876616SSathya Perla 47514c876616SSathya Perla status = be_mcc_notify_wait(adapter); 47524c876616SSathya Perla if (!status) { 47534c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 47544c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 47554c876616SSathya Perla } 47564c876616SSathya Perla 47574c876616SSathya Perla err: 4758b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 47594c876616SSathya Perla return status; 47604c876616SSathya Perla } 47614c876616SSathya Perla 47625c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 47635c510811SSomnath Kotur { 47645c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 47655c510811SSomnath Kotur u32 reg_val; 47665c510811SSomnath Kotur int status = 0, i; 47675c510811SSomnath Kotur 47685c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 47695c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 47705c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 47715c510811SSomnath Kotur break; 47725c510811SSomnath Kotur 47735c510811SSomnath Kotur ssleep(1); 47745c510811SSomnath Kotur } 47755c510811SSomnath Kotur 47765c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 47775c510811SSomnath Kotur status = -1; 47785c510811SSomnath Kotur 47795c510811SSomnath Kotur return status; 47805c510811SSomnath Kotur } 47815c510811SSomnath Kotur 47825c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 47835c510811SSomnath Kotur { 47845c510811SSomnath Kotur int status = 0; 47855c510811SSomnath Kotur 47865c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47875c510811SSomnath Kotur if (status) 47885c510811SSomnath Kotur return status; 47895c510811SSomnath Kotur 47905c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 47915c510811SSomnath Kotur 47925c510811SSomnath Kotur return status; 47935c510811SSomnath Kotur } 47945c510811SSomnath Kotur 47955c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 47965c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 47975c510811SSomnath Kotur { 47985c510811SSomnath Kotur u32 sliport_status = 0; 47995c510811SSomnath Kotur 48005c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 48015c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 48025c510811SSomnath Kotur } 48035c510811SSomnath Kotur 48045c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 48055c510811SSomnath Kotur { 4806f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 48075c510811SSomnath Kotur int status; 48085c510811SSomnath Kotur 4809f0613380SKalesh AP if (dump_present(adapter)) { 4810f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 4811f0613380SKalesh AP return -EEXIST; 4812f0613380SKalesh AP } 4813f0613380SKalesh AP 48145c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 48155c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 48165c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 48175c510811SSomnath Kotur if (status < 0) { 4818f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 48195c510811SSomnath Kotur return status; 48205c510811SSomnath Kotur } 48215c510811SSomnath Kotur 48225c510811SSomnath Kotur status = lancer_wait_idle(adapter); 48235c510811SSomnath Kotur if (status) 48245c510811SSomnath Kotur return status; 48255c510811SSomnath Kotur 48265c510811SSomnath Kotur if (!dump_present(adapter)) { 4827f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 4828f0613380SKalesh AP return -EIO; 48295c510811SSomnath Kotur } 48305c510811SSomnath Kotur 48315c510811SSomnath Kotur return 0; 48325c510811SSomnath Kotur } 48335c510811SSomnath Kotur 4834f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 4835f0613380SKalesh AP { 4836f0613380SKalesh AP int status; 4837f0613380SKalesh AP 4838f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 4839f0613380SKalesh AP return be_cmd_status(status); 4840f0613380SKalesh AP } 4841f0613380SKalesh AP 4842dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 4843dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 4844dcf7ebbaSPadmanabh Ratnakar { 4845dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4846dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 4847dcf7ebbaSPadmanabh Ratnakar int status; 4848dcf7ebbaSPadmanabh Ratnakar 48490599863dSVasundhara Volam if (BEx_chip(adapter)) 4850dcf7ebbaSPadmanabh Ratnakar return 0; 4851dcf7ebbaSPadmanabh Ratnakar 4852b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4853dcf7ebbaSPadmanabh Ratnakar 4854dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4855dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4856dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4857dcf7ebbaSPadmanabh Ratnakar goto err; 4858dcf7ebbaSPadmanabh Ratnakar } 4859dcf7ebbaSPadmanabh Ratnakar 4860dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4861dcf7ebbaSPadmanabh Ratnakar 4862dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4863dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4864dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4865dcf7ebbaSPadmanabh Ratnakar 4866dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4867dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4868dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4869dcf7ebbaSPadmanabh Ratnakar err: 4870b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4871dcf7ebbaSPadmanabh Ratnakar return status; 4872dcf7ebbaSPadmanabh Ratnakar } 4873dcf7ebbaSPadmanabh Ratnakar 487468c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 487568c45a2dSSomnath Kotur { 487668c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 487768c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 487868c45a2dSSomnath Kotur int status; 487968c45a2dSSomnath Kotur 488068c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 488168c45a2dSSomnath Kotur return -1; 488268c45a2dSSomnath Kotur 488368c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 488468c45a2dSSomnath Kotur 488568c45a2dSSomnath Kotur req = embedded_payload(wrb); 488668c45a2dSSomnath Kotur 488768c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 488868c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 488968c45a2dSSomnath Kotur wrb, NULL); 489068c45a2dSSomnath Kotur 489168c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 489268c45a2dSSomnath Kotur 489368c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 489468c45a2dSSomnath Kotur 489568c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 489668c45a2dSSomnath Kotur return status; 489768c45a2dSSomnath Kotur } 489868c45a2dSSomnath Kotur 4899542963b7SVasundhara Volam /* Uses MBOX */ 4900542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4901542963b7SVasundhara Volam { 4902542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4903542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4904542963b7SVasundhara Volam int status; 4905542963b7SVasundhara Volam 4906542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4907542963b7SVasundhara Volam return -1; 4908542963b7SVasundhara Volam 4909542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4910542963b7SVasundhara Volam if (!wrb) { 4911542963b7SVasundhara Volam status = -EBUSY; 4912542963b7SVasundhara Volam goto err; 4913542963b7SVasundhara Volam } 4914542963b7SVasundhara Volam 4915542963b7SVasundhara Volam req = embedded_payload(wrb); 4916542963b7SVasundhara Volam 4917542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4918542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4919542963b7SVasundhara Volam wrb, NULL); 4920542963b7SVasundhara Volam 4921542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4922542963b7SVasundhara Volam if (!status) { 4923542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4924542963b7SVasundhara Volam embedded_payload(wrb); 492503d28ffeSKalesh AP 4926542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4927542963b7SVasundhara Volam } 4928542963b7SVasundhara Volam 4929542963b7SVasundhara Volam err: 4930542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4931542963b7SVasundhara Volam return status; 4932542963b7SVasundhara Volam } 4933542963b7SVasundhara Volam 4934d766e7e6SBaoyou Xie static int 4935d766e7e6SBaoyou Xie __be_cmd_set_logical_link_config(struct be_adapter *adapter, 4936d9d426afSSuresh Reddy int link_state, int version, u8 domain) 4937bdce2ad7SSuresh Reddy { 4938bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 49390b98ca2aSSuresh Reddy struct be_mcc_wrb *wrb; 49400b98ca2aSSuresh Reddy u32 link_config = 0; 4941bdce2ad7SSuresh Reddy int status; 4942bdce2ad7SSuresh Reddy 4943b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4944bdce2ad7SSuresh Reddy 4945bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4946bdce2ad7SSuresh Reddy if (!wrb) { 4947bdce2ad7SSuresh Reddy status = -EBUSY; 4948bdce2ad7SSuresh Reddy goto err; 4949bdce2ad7SSuresh Reddy } 4950bdce2ad7SSuresh Reddy 4951bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4952bdce2ad7SSuresh Reddy 4953bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4954bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4955bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4956bdce2ad7SSuresh Reddy 4957d9d426afSSuresh Reddy req->hdr.version = version; 4958bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4959bdce2ad7SSuresh Reddy 4960d9d426afSSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE || 4961d9d426afSSuresh Reddy link_state == IFLA_VF_LINK_STATE_AUTO) 49620b98ca2aSSuresh Reddy link_config |= PLINK_ENABLE; 4963bdce2ad7SSuresh Reddy 4964bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 49650b98ca2aSSuresh Reddy link_config |= PLINK_TRACK; 49660b98ca2aSSuresh Reddy 49670b98ca2aSSuresh Reddy req->link_config = cpu_to_le32(link_config); 4968bdce2ad7SSuresh Reddy 4969bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4970bdce2ad7SSuresh Reddy err: 4971b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4972bdce2ad7SSuresh Reddy return status; 4973bdce2ad7SSuresh Reddy } 4974bdce2ad7SSuresh Reddy 4975d9d426afSSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4976d9d426afSSuresh Reddy int link_state, u8 domain) 4977d9d426afSSuresh Reddy { 4978d9d426afSSuresh Reddy int status; 4979d9d426afSSuresh Reddy 4980dc6e8511SSuresh Reddy if (BE2_chip(adapter)) 4981d9d426afSSuresh Reddy return -EOPNOTSUPP; 4982d9d426afSSuresh Reddy 4983d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4984d9d426afSSuresh Reddy 2, domain); 4985d9d426afSSuresh Reddy 4986d9d426afSSuresh Reddy /* Version 2 of the command will not be recognized by older FW. 4987d9d426afSSuresh Reddy * On such a failure issue version 1 of the command. 4988d9d426afSSuresh Reddy */ 4989d9d426afSSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST) 4990d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4991d9d426afSSuresh Reddy 1, domain); 4992d9d426afSSuresh Reddy return status; 4993d9d426afSSuresh Reddy } 4994710f3e59SSriharsha Basavapatna 4995710f3e59SSriharsha Basavapatna int be_cmd_set_features(struct be_adapter *adapter) 4996710f3e59SSriharsha Basavapatna { 4997710f3e59SSriharsha Basavapatna struct be_cmd_resp_set_features *resp; 4998710f3e59SSriharsha Basavapatna struct be_cmd_req_set_features *req; 4999710f3e59SSriharsha Basavapatna struct be_mcc_wrb *wrb; 5000710f3e59SSriharsha Basavapatna int status; 5001710f3e59SSriharsha Basavapatna 5002710f3e59SSriharsha Basavapatna if (mutex_lock_interruptible(&adapter->mcc_lock)) 5003710f3e59SSriharsha Basavapatna return -1; 5004710f3e59SSriharsha Basavapatna 5005710f3e59SSriharsha Basavapatna wrb = wrb_from_mccq(adapter); 5006710f3e59SSriharsha Basavapatna if (!wrb) { 5007710f3e59SSriharsha Basavapatna status = -EBUSY; 5008710f3e59SSriharsha Basavapatna goto err; 5009710f3e59SSriharsha Basavapatna } 5010710f3e59SSriharsha Basavapatna 5011710f3e59SSriharsha Basavapatna req = embedded_payload(wrb); 5012710f3e59SSriharsha Basavapatna 5013710f3e59SSriharsha Basavapatna be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 5014710f3e59SSriharsha Basavapatna OPCODE_COMMON_SET_FEATURES, 5015710f3e59SSriharsha Basavapatna sizeof(*req), wrb, NULL); 5016710f3e59SSriharsha Basavapatna 5017710f3e59SSriharsha Basavapatna req->features = cpu_to_le32(BE_FEATURE_UE_RECOVERY); 5018710f3e59SSriharsha Basavapatna req->parameter_len = cpu_to_le32(sizeof(struct be_req_ue_recovery)); 5019710f3e59SSriharsha Basavapatna req->parameter.req.uer = cpu_to_le32(BE_UE_RECOVERY_UER_MASK); 5020710f3e59SSriharsha Basavapatna 5021710f3e59SSriharsha Basavapatna status = be_mcc_notify_wait(adapter); 5022710f3e59SSriharsha Basavapatna if (status) 5023710f3e59SSriharsha Basavapatna goto err; 5024710f3e59SSriharsha Basavapatna 5025710f3e59SSriharsha Basavapatna resp = embedded_payload(wrb); 5026710f3e59SSriharsha Basavapatna 5027710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_poll_time = 5028710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2rp); 5029710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_reset_time = 5030710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2sr); 5031710f3e59SSriharsha Basavapatna adapter->error_recovery.recovery_supported = true; 5032710f3e59SSriharsha Basavapatna err: 5033710f3e59SSriharsha Basavapatna /* Checking "MCC_STATUS_INVALID_LENGTH" for SKH as FW 5034710f3e59SSriharsha Basavapatna * returns this error in older firmware versions 5035710f3e59SSriharsha Basavapatna */ 5036710f3e59SSriharsha Basavapatna if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 5037710f3e59SSriharsha Basavapatna base_status(status) == MCC_STATUS_INVALID_LENGTH) 5038710f3e59SSriharsha Basavapatna dev_info(&adapter->pdev->dev, 5039710f3e59SSriharsha Basavapatna "Adapter does not support HW error recovery\n"); 5040710f3e59SSriharsha Basavapatna 5041710f3e59SSriharsha Basavapatna mutex_unlock(&adapter->mcc_lock); 5042710f3e59SSriharsha Basavapatna return status; 5043710f3e59SSriharsha Basavapatna } 5044710f3e59SSriharsha Basavapatna 50456a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 50466a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 50476a4ab669SParav Pandit { 50486a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 50496a4ab669SParav Pandit struct be_mcc_wrb *wrb; 50506a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 50516a4ab669SParav Pandit struct be_cmd_req_hdr *req; 50526a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 50536a4ab669SParav Pandit int status; 50546a4ab669SParav Pandit 5055b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 50566a4ab669SParav Pandit 50576a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 50586a4ab669SParav Pandit if (!wrb) { 50596a4ab669SParav Pandit status = -EBUSY; 50606a4ab669SParav Pandit goto err; 50616a4ab669SParav Pandit } 50626a4ab669SParav Pandit req = embedded_payload(wrb); 50636a4ab669SParav Pandit resp = embedded_payload(wrb); 50646a4ab669SParav Pandit 50656a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 50666a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 50676a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 50686a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 50696a4ab669SParav Pandit 50706a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 50716a4ab669SParav Pandit if (cmd_status) 50726a4ab669SParav Pandit *cmd_status = (status & 0xffff); 50736a4ab669SParav Pandit if (ext_status) 50746a4ab669SParav Pandit *ext_status = 0; 50756a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 50766a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 50776a4ab669SParav Pandit err: 5078b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 50796a4ab669SParav Pandit return status; 50806a4ab669SParav Pandit } 50816a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 5082