19aebddd1SJeff Kirsher /* 29aebddd1SJeff Kirsher * Copyright (C) 2005 - 2011 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 189aebddd1SJeff Kirsher #include "be.h" 199aebddd1SJeff Kirsher #include "be_cmds.h" 209aebddd1SJeff Kirsher 219aebddd1SJeff Kirsher /* Must be a power of 2 or else MODULO will BUG_ON */ 223de09455SSomnath Kotur static int be_get_temp_freq = 64; 233de09455SSomnath Kotur 243de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 253de09455SSomnath Kotur { 263de09455SSomnath Kotur return wrb->payload.embedded_payload; 273de09455SSomnath Kotur } 289aebddd1SJeff Kirsher 299aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 309aebddd1SJeff Kirsher { 319aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 329aebddd1SJeff Kirsher u32 val = 0; 339aebddd1SJeff Kirsher 346589ade0SSathya Perla if (be_error(adapter)) 359aebddd1SJeff Kirsher return; 369aebddd1SJeff Kirsher 379aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 389aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 399aebddd1SJeff Kirsher 409aebddd1SJeff Kirsher wmb(); 419aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 429aebddd1SJeff Kirsher } 439aebddd1SJeff Kirsher 449aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 459aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 469aebddd1SJeff Kirsher * little endian) */ 479aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 489aebddd1SJeff Kirsher { 499aebddd1SJeff Kirsher if (compl->flags != 0) { 509aebddd1SJeff Kirsher compl->flags = le32_to_cpu(compl->flags); 519aebddd1SJeff Kirsher BUG_ON((compl->flags & CQE_FLAGS_VALID_MASK) == 0); 529aebddd1SJeff Kirsher return true; 539aebddd1SJeff Kirsher } else { 549aebddd1SJeff Kirsher return false; 559aebddd1SJeff Kirsher } 569aebddd1SJeff Kirsher } 579aebddd1SJeff Kirsher 589aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 599aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 609aebddd1SJeff Kirsher { 619aebddd1SJeff Kirsher compl->flags = 0; 629aebddd1SJeff Kirsher } 639aebddd1SJeff Kirsher 649aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 659aebddd1SJeff Kirsher struct be_mcc_compl *compl) 669aebddd1SJeff Kirsher { 679aebddd1SJeff Kirsher u16 compl_status, extd_status; 689aebddd1SJeff Kirsher 699aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 709aebddd1SJeff Kirsher * from mcc_wrb */ 719aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 729aebddd1SJeff Kirsher 739aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 749aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher if (((compl->tag0 == OPCODE_COMMON_WRITE_FLASHROM) || 779aebddd1SJeff Kirsher (compl->tag0 == OPCODE_COMMON_WRITE_OBJECT)) && 789aebddd1SJeff Kirsher (compl->tag1 == CMD_SUBSYSTEM_COMMON)) { 799aebddd1SJeff Kirsher adapter->flash_status = compl_status; 809aebddd1SJeff Kirsher complete(&adapter->flash_compl); 819aebddd1SJeff Kirsher } 829aebddd1SJeff Kirsher 839aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 849aebddd1SJeff Kirsher if (((compl->tag0 == OPCODE_ETH_GET_STATISTICS) || 859aebddd1SJeff Kirsher (compl->tag0 == OPCODE_ETH_GET_PPORT_STATS)) && 869aebddd1SJeff Kirsher (compl->tag1 == CMD_SUBSYSTEM_ETH)) { 879aebddd1SJeff Kirsher be_parse_stats(adapter); 889aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 899aebddd1SJeff Kirsher } 903de09455SSomnath Kotur if (compl->tag0 == 913de09455SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) { 923de09455SSomnath Kotur struct be_mcc_wrb *mcc_wrb = 933de09455SSomnath Kotur queue_index_node(&adapter->mcc_obj.q, 943de09455SSomnath Kotur compl->tag1); 953de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 963de09455SSomnath Kotur embedded_payload(mcc_wrb); 973de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 983de09455SSomnath Kotur resp->on_die_temperature; 993de09455SSomnath Kotur } 1009aebddd1SJeff Kirsher } else { 1013de09455SSomnath Kotur if (compl->tag0 == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1023de09455SSomnath Kotur be_get_temp_freq = 0; 1033de09455SSomnath Kotur 1049aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1059aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1069aebddd1SJeff Kirsher goto done; 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 1099aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "This domain(VM) is not " 1109aebddd1SJeff Kirsher "permitted to execute this cmd (opcode %d)\n", 1119aebddd1SJeff Kirsher compl->tag0); 1129aebddd1SJeff Kirsher } else { 1139aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1149aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 1159aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Cmd (opcode %d) failed:" 1169aebddd1SJeff Kirsher "status %d, extd-status %d\n", 1179aebddd1SJeff Kirsher compl->tag0, compl_status, extd_status); 1189aebddd1SJeff Kirsher } 1199aebddd1SJeff Kirsher } 1209aebddd1SJeff Kirsher done: 1219aebddd1SJeff Kirsher return compl_status; 1229aebddd1SJeff Kirsher } 1239aebddd1SJeff Kirsher 1249aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1259aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 1269aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 1279aebddd1SJeff Kirsher { 128b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 12942f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 130b236916aSAjit Khaparde 131b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 132b236916aSAjit Khaparde * it may not be received in some cases. 133b236916aSAjit Khaparde */ 134b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 1359aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 1369aebddd1SJeff Kirsher } 1379aebddd1SJeff Kirsher 1389aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 1399aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 1409aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 1419aebddd1SJeff Kirsher { 1429aebddd1SJeff Kirsher if (evt->valid) { 1439aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 1449aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 1459aebddd1SJeff Kirsher adapter->recommended_prio = 1469aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 1479aebddd1SJeff Kirsher } 1489aebddd1SJeff Kirsher } 1499aebddd1SJeff Kirsher 1509aebddd1SJeff Kirsher /* Grp5 QOS Speed evt */ 1519aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 1529aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 1539aebddd1SJeff Kirsher { 1549aebddd1SJeff Kirsher if (evt->physical_port == adapter->port_num) { 1559aebddd1SJeff Kirsher /* qos_link_speed is in units of 10 Mbps */ 15642f11cf2SAjit Khaparde adapter->phy.link_speed = evt->qos_link_speed * 10; 1579aebddd1SJeff Kirsher } 1589aebddd1SJeff Kirsher } 1599aebddd1SJeff Kirsher 1609aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 1619aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 1629aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 1639aebddd1SJeff Kirsher { 1649aebddd1SJeff Kirsher if (evt->enabled) 165939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 1669aebddd1SJeff Kirsher else 1679aebddd1SJeff Kirsher adapter->pvid = 0; 1689aebddd1SJeff Kirsher } 1699aebddd1SJeff Kirsher 1709aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 1719aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 1729aebddd1SJeff Kirsher { 1739aebddd1SJeff Kirsher u8 event_type = 0; 1749aebddd1SJeff Kirsher 1759aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 1769aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 1779aebddd1SJeff Kirsher 1789aebddd1SJeff Kirsher switch (event_type) { 1799aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 1809aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 1819aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 1829aebddd1SJeff Kirsher break; 1839aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 1849aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 1859aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 1869aebddd1SJeff Kirsher break; 1879aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 1889aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 1899aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 1909aebddd1SJeff Kirsher break; 1919aebddd1SJeff Kirsher default: 1929aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Unknown grp5 event!\n"); 1939aebddd1SJeff Kirsher break; 1949aebddd1SJeff Kirsher } 1959aebddd1SJeff Kirsher } 1969aebddd1SJeff Kirsher 1979aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 1989aebddd1SJeff Kirsher { 1999aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2009aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2019aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 2029aebddd1SJeff Kirsher } 2039aebddd1SJeff Kirsher 2049aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 2059aebddd1SJeff Kirsher { 2069aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2079aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2089aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 2099aebddd1SJeff Kirsher } 2109aebddd1SJeff Kirsher 2119aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 2129aebddd1SJeff Kirsher { 2139aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 2149aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 2159aebddd1SJeff Kirsher 2169aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 2179aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 2189aebddd1SJeff Kirsher return compl; 2199aebddd1SJeff Kirsher } 2209aebddd1SJeff Kirsher return NULL; 2219aebddd1SJeff Kirsher } 2229aebddd1SJeff Kirsher 2239aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 2249aebddd1SJeff Kirsher { 2259aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 2269aebddd1SJeff Kirsher 2279aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 2289aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 2299aebddd1SJeff Kirsher 2309aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 2319aebddd1SJeff Kirsher } 2329aebddd1SJeff Kirsher 2339aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 2349aebddd1SJeff Kirsher { 2359aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 2369aebddd1SJeff Kirsher } 2379aebddd1SJeff Kirsher 23810ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 2399aebddd1SJeff Kirsher { 2409aebddd1SJeff Kirsher struct be_mcc_compl *compl; 24110ef9ab4SSathya Perla int num = 0, status = 0; 2429aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 2439aebddd1SJeff Kirsher 2449aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 2459aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 2469aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 2479aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 2489aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 2499aebddd1SJeff Kirsher be_async_link_state_process(adapter, 2509aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 2519aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 2529aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 2539aebddd1SJeff Kirsher compl->flags, compl); 2549aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 25510ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 2569aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 2579aebddd1SJeff Kirsher } 2589aebddd1SJeff Kirsher be_mcc_compl_use(compl); 2599aebddd1SJeff Kirsher num++; 2609aebddd1SJeff Kirsher } 2619aebddd1SJeff Kirsher 26210ef9ab4SSathya Perla if (num) 26310ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 26410ef9ab4SSathya Perla 2659aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 26610ef9ab4SSathya Perla return status; 2679aebddd1SJeff Kirsher } 2689aebddd1SJeff Kirsher 2699aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 2709aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 2719aebddd1SJeff Kirsher { 2729aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 27310ef9ab4SSathya Perla int i, status = 0; 2749aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 2759aebddd1SJeff Kirsher 2766589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 2776589ade0SSathya Perla if (be_error(adapter)) 2789aebddd1SJeff Kirsher return -EIO; 2799aebddd1SJeff Kirsher 28010ef9ab4SSathya Perla status = be_process_mcc(adapter); 2819aebddd1SJeff Kirsher 2829aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 2839aebddd1SJeff Kirsher break; 2849aebddd1SJeff Kirsher udelay(100); 2859aebddd1SJeff Kirsher } 2869aebddd1SJeff Kirsher if (i == mcc_timeout) { 2876589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 2886589ade0SSathya Perla adapter->fw_timeout = true; 2899aebddd1SJeff Kirsher return -1; 2909aebddd1SJeff Kirsher } 2919aebddd1SJeff Kirsher return status; 2929aebddd1SJeff Kirsher } 2939aebddd1SJeff Kirsher 2949aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 2959aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 2969aebddd1SJeff Kirsher { 2979aebddd1SJeff Kirsher be_mcc_notify(adapter); 2989aebddd1SJeff Kirsher return be_mcc_wait_compl(adapter); 2999aebddd1SJeff Kirsher } 3009aebddd1SJeff Kirsher 3019aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 3029aebddd1SJeff Kirsher { 3039aebddd1SJeff Kirsher int msecs = 0; 3049aebddd1SJeff Kirsher u32 ready; 3059aebddd1SJeff Kirsher 3066589ade0SSathya Perla do { 3076589ade0SSathya Perla if (be_error(adapter)) 3089aebddd1SJeff Kirsher return -EIO; 3099aebddd1SJeff Kirsher 3109aebddd1SJeff Kirsher ready = ioread32(db); 311434b3648SSathya Perla if (ready == 0xffffffff) 3129aebddd1SJeff Kirsher return -1; 3139aebddd1SJeff Kirsher 3149aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 3159aebddd1SJeff Kirsher if (ready) 3169aebddd1SJeff Kirsher break; 3179aebddd1SJeff Kirsher 3189aebddd1SJeff Kirsher if (msecs > 4000) { 3196589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 3206589ade0SSathya Perla adapter->fw_timeout = true; 3219aebddd1SJeff Kirsher be_detect_dump_ue(adapter); 3229aebddd1SJeff Kirsher return -1; 3239aebddd1SJeff Kirsher } 3249aebddd1SJeff Kirsher 3259aebddd1SJeff Kirsher msleep(1); 3269aebddd1SJeff Kirsher msecs++; 3279aebddd1SJeff Kirsher } while (true); 3289aebddd1SJeff Kirsher 3299aebddd1SJeff Kirsher return 0; 3309aebddd1SJeff Kirsher } 3319aebddd1SJeff Kirsher 3329aebddd1SJeff Kirsher /* 3339aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 3349aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 3359aebddd1SJeff Kirsher */ 3369aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 3379aebddd1SJeff Kirsher { 3389aebddd1SJeff Kirsher int status; 3399aebddd1SJeff Kirsher u32 val = 0; 3409aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 3419aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 3429aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 3439aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 3449aebddd1SJeff Kirsher 3459aebddd1SJeff Kirsher /* wait for ready to be set */ 3469aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 3479aebddd1SJeff Kirsher if (status != 0) 3489aebddd1SJeff Kirsher return status; 3499aebddd1SJeff Kirsher 3509aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 3519aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 3529aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 3539aebddd1SJeff Kirsher iowrite32(val, db); 3549aebddd1SJeff Kirsher 3559aebddd1SJeff Kirsher /* wait for ready to be set */ 3569aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 3579aebddd1SJeff Kirsher if (status != 0) 3589aebddd1SJeff Kirsher return status; 3599aebddd1SJeff Kirsher 3609aebddd1SJeff Kirsher val = 0; 3619aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 3629aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 3639aebddd1SJeff Kirsher iowrite32(val, db); 3649aebddd1SJeff Kirsher 3659aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 3669aebddd1SJeff Kirsher if (status != 0) 3679aebddd1SJeff Kirsher return status; 3689aebddd1SJeff Kirsher 3699aebddd1SJeff Kirsher /* A cq entry has been made now */ 3709aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3719aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 3729aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3739aebddd1SJeff Kirsher if (status) 3749aebddd1SJeff Kirsher return status; 3759aebddd1SJeff Kirsher } else { 3769aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 3779aebddd1SJeff Kirsher return -1; 3789aebddd1SJeff Kirsher } 3799aebddd1SJeff Kirsher return 0; 3809aebddd1SJeff Kirsher } 3819aebddd1SJeff Kirsher 3829aebddd1SJeff Kirsher static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage) 3839aebddd1SJeff Kirsher { 3849aebddd1SJeff Kirsher u32 sem; 3859aebddd1SJeff Kirsher 3869aebddd1SJeff Kirsher if (lancer_chip(adapter)) 3879aebddd1SJeff Kirsher sem = ioread32(adapter->db + MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET); 3889aebddd1SJeff Kirsher else 3899aebddd1SJeff Kirsher sem = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET); 3909aebddd1SJeff Kirsher 3919aebddd1SJeff Kirsher *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK; 3929aebddd1SJeff Kirsher if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK) 3939aebddd1SJeff Kirsher return -1; 3949aebddd1SJeff Kirsher else 3959aebddd1SJeff Kirsher return 0; 3969aebddd1SJeff Kirsher } 3979aebddd1SJeff Kirsher 3989aebddd1SJeff Kirsher int be_cmd_POST(struct be_adapter *adapter) 3999aebddd1SJeff Kirsher { 4009aebddd1SJeff Kirsher u16 stage; 4019aebddd1SJeff Kirsher int status, timeout = 0; 4029aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 4039aebddd1SJeff Kirsher 4049aebddd1SJeff Kirsher do { 4059aebddd1SJeff Kirsher status = be_POST_stage_get(adapter, &stage); 4069aebddd1SJeff Kirsher if (status) { 4079aebddd1SJeff Kirsher dev_err(dev, "POST error; stage=0x%x\n", stage); 4089aebddd1SJeff Kirsher return -1; 4099aebddd1SJeff Kirsher } else if (stage != POST_STAGE_ARMFW_RDY) { 4109aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 4119aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 4129aebddd1SJeff Kirsher return -EINTR; 4139aebddd1SJeff Kirsher } 4149aebddd1SJeff Kirsher timeout += 2; 4159aebddd1SJeff Kirsher } else { 4169aebddd1SJeff Kirsher return 0; 4179aebddd1SJeff Kirsher } 4183ab81b5fSSomnath Kotur } while (timeout < 60); 4199aebddd1SJeff Kirsher 4209aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 4219aebddd1SJeff Kirsher return -1; 4229aebddd1SJeff Kirsher } 4239aebddd1SJeff Kirsher 4249aebddd1SJeff Kirsher 4259aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 4269aebddd1SJeff Kirsher { 4279aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 4289aebddd1SJeff Kirsher } 4299aebddd1SJeff Kirsher 4309aebddd1SJeff Kirsher 4319aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 432106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 433106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 434106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 435106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 4369aebddd1SJeff Kirsher { 437106df1e3SSomnath Kotur struct be_sge *sge; 438106df1e3SSomnath Kotur 4399aebddd1SJeff Kirsher req_hdr->opcode = opcode; 4409aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 4419aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 4429aebddd1SJeff Kirsher req_hdr->version = 0; 443106df1e3SSomnath Kotur 444106df1e3SSomnath Kotur wrb->tag0 = opcode; 445106df1e3SSomnath Kotur wrb->tag1 = subsystem; 446106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 447106df1e3SSomnath Kotur if (mem) { 448106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 449106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 450106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 451106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 452106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 453106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 454106df1e3SSomnath Kotur } else 455106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 456106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 4579aebddd1SJeff Kirsher } 4589aebddd1SJeff Kirsher 4599aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 4609aebddd1SJeff Kirsher struct be_dma_mem *mem) 4619aebddd1SJeff Kirsher { 4629aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 4639aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 4649aebddd1SJeff Kirsher 4659aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 4669aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 4679aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 4689aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 4699aebddd1SJeff Kirsher } 4709aebddd1SJeff Kirsher } 4719aebddd1SJeff Kirsher 4729aebddd1SJeff Kirsher /* Converts interrupt delay in microseconds to multiplier value */ 4739aebddd1SJeff Kirsher static u32 eq_delay_to_mult(u32 usec_delay) 4749aebddd1SJeff Kirsher { 4759aebddd1SJeff Kirsher #define MAX_INTR_RATE 651042 4769aebddd1SJeff Kirsher const u32 round = 10; 4779aebddd1SJeff Kirsher u32 multiplier; 4789aebddd1SJeff Kirsher 4799aebddd1SJeff Kirsher if (usec_delay == 0) 4809aebddd1SJeff Kirsher multiplier = 0; 4819aebddd1SJeff Kirsher else { 4829aebddd1SJeff Kirsher u32 interrupt_rate = 1000000 / usec_delay; 4839aebddd1SJeff Kirsher /* Max delay, corresponding to the lowest interrupt rate */ 4849aebddd1SJeff Kirsher if (interrupt_rate == 0) 4859aebddd1SJeff Kirsher multiplier = 1023; 4869aebddd1SJeff Kirsher else { 4879aebddd1SJeff Kirsher multiplier = (MAX_INTR_RATE - interrupt_rate) * round; 4889aebddd1SJeff Kirsher multiplier /= interrupt_rate; 4899aebddd1SJeff Kirsher /* Round the multiplier to the closest value.*/ 4909aebddd1SJeff Kirsher multiplier = (multiplier + round/2) / round; 4919aebddd1SJeff Kirsher multiplier = min(multiplier, (u32)1023); 4929aebddd1SJeff Kirsher } 4939aebddd1SJeff Kirsher } 4949aebddd1SJeff Kirsher return multiplier; 4959aebddd1SJeff Kirsher } 4969aebddd1SJeff Kirsher 4979aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 4989aebddd1SJeff Kirsher { 4999aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 5009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 5019aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 5029aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 5039aebddd1SJeff Kirsher return wrb; 5049aebddd1SJeff Kirsher } 5059aebddd1SJeff Kirsher 5069aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 5079aebddd1SJeff Kirsher { 5089aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 5099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 5109aebddd1SJeff Kirsher 5119aebddd1SJeff Kirsher if (atomic_read(&mccq->used) >= mccq->len) { 5129aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Out of MCCQ wrbs\n"); 5139aebddd1SJeff Kirsher return NULL; 5149aebddd1SJeff Kirsher } 5159aebddd1SJeff Kirsher 5169aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 5179aebddd1SJeff Kirsher queue_head_inc(mccq); 5189aebddd1SJeff Kirsher atomic_inc(&mccq->used); 5199aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 5209aebddd1SJeff Kirsher return wrb; 5219aebddd1SJeff Kirsher } 5229aebddd1SJeff Kirsher 5239aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 5249aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 5259aebddd1SJeff Kirsher */ 5269aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 5279aebddd1SJeff Kirsher { 5289aebddd1SJeff Kirsher u8 *wrb; 5299aebddd1SJeff Kirsher int status; 5309aebddd1SJeff Kirsher 5319aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 5329aebddd1SJeff Kirsher return -1; 5339aebddd1SJeff Kirsher 5349aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 5359aebddd1SJeff Kirsher *wrb++ = 0xFF; 5369aebddd1SJeff Kirsher *wrb++ = 0x12; 5379aebddd1SJeff Kirsher *wrb++ = 0x34; 5389aebddd1SJeff Kirsher *wrb++ = 0xFF; 5399aebddd1SJeff Kirsher *wrb++ = 0xFF; 5409aebddd1SJeff Kirsher *wrb++ = 0x56; 5419aebddd1SJeff Kirsher *wrb++ = 0x78; 5429aebddd1SJeff Kirsher *wrb = 0xFF; 5439aebddd1SJeff Kirsher 5449aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 5459aebddd1SJeff Kirsher 5469aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 5479aebddd1SJeff Kirsher return status; 5489aebddd1SJeff Kirsher } 5499aebddd1SJeff Kirsher 5509aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 5519aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 5529aebddd1SJeff Kirsher */ 5539aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 5549aebddd1SJeff Kirsher { 5559aebddd1SJeff Kirsher u8 *wrb; 5569aebddd1SJeff Kirsher int status; 5579aebddd1SJeff Kirsher 5589aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 5599aebddd1SJeff Kirsher return -1; 5609aebddd1SJeff Kirsher 5619aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 5629aebddd1SJeff Kirsher *wrb++ = 0xFF; 5639aebddd1SJeff Kirsher *wrb++ = 0xAA; 5649aebddd1SJeff Kirsher *wrb++ = 0xBB; 5659aebddd1SJeff Kirsher *wrb++ = 0xFF; 5669aebddd1SJeff Kirsher *wrb++ = 0xFF; 5679aebddd1SJeff Kirsher *wrb++ = 0xCC; 5689aebddd1SJeff Kirsher *wrb++ = 0xDD; 5699aebddd1SJeff Kirsher *wrb = 0xFF; 5709aebddd1SJeff Kirsher 5719aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 5729aebddd1SJeff Kirsher 5739aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 5749aebddd1SJeff Kirsher return status; 5759aebddd1SJeff Kirsher } 5769aebddd1SJeff Kirsher int be_cmd_eq_create(struct be_adapter *adapter, 5779aebddd1SJeff Kirsher struct be_queue_info *eq, int eq_delay) 5789aebddd1SJeff Kirsher { 5799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 5809aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 5819aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &eq->dma_mem; 5829aebddd1SJeff Kirsher int status; 5839aebddd1SJeff Kirsher 5849aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 5859aebddd1SJeff Kirsher return -1; 5869aebddd1SJeff Kirsher 5879aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 5889aebddd1SJeff Kirsher req = embedded_payload(wrb); 5899aebddd1SJeff Kirsher 590106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 591106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 5929aebddd1SJeff Kirsher 5939aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 5949aebddd1SJeff Kirsher 5959aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 5969aebddd1SJeff Kirsher /* 4byte eqe*/ 5979aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 5989aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 5999aebddd1SJeff Kirsher __ilog2_u32(eq->len/256)); 6009aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context, 6019aebddd1SJeff Kirsher eq_delay_to_mult(eq_delay)); 6029aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 6039aebddd1SJeff Kirsher 6049aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 6059aebddd1SJeff Kirsher 6069aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 6079aebddd1SJeff Kirsher if (!status) { 6089aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 6099aebddd1SJeff Kirsher eq->id = le16_to_cpu(resp->eq_id); 6109aebddd1SJeff Kirsher eq->created = true; 6119aebddd1SJeff Kirsher } 6129aebddd1SJeff Kirsher 6139aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 6149aebddd1SJeff Kirsher return status; 6159aebddd1SJeff Kirsher } 6169aebddd1SJeff Kirsher 617f9449ab7SSathya Perla /* Use MCC */ 6189aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 619590c391dSPadmanabh Ratnakar u8 type, bool permanent, u32 if_handle, u32 pmac_id) 6209aebddd1SJeff Kirsher { 6219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6229aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 6239aebddd1SJeff Kirsher int status; 6249aebddd1SJeff Kirsher 625f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 6269aebddd1SJeff Kirsher 627f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 628f9449ab7SSathya Perla if (!wrb) { 629f9449ab7SSathya Perla status = -EBUSY; 630f9449ab7SSathya Perla goto err; 631f9449ab7SSathya Perla } 6329aebddd1SJeff Kirsher req = embedded_payload(wrb); 6339aebddd1SJeff Kirsher 634106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 635106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 6369aebddd1SJeff Kirsher req->type = type; 6379aebddd1SJeff Kirsher if (permanent) { 6389aebddd1SJeff Kirsher req->permanent = 1; 6399aebddd1SJeff Kirsher } else { 6409aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 641590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 6429aebddd1SJeff Kirsher req->permanent = 0; 6439aebddd1SJeff Kirsher } 6449aebddd1SJeff Kirsher 645f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 6469aebddd1SJeff Kirsher if (!status) { 6479aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 6489aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 6499aebddd1SJeff Kirsher } 6509aebddd1SJeff Kirsher 651f9449ab7SSathya Perla err: 652f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 6539aebddd1SJeff Kirsher return status; 6549aebddd1SJeff Kirsher } 6559aebddd1SJeff Kirsher 6569aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 6579aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 6589aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 6599aebddd1SJeff Kirsher { 6609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6619aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 6629aebddd1SJeff Kirsher int status; 6639aebddd1SJeff Kirsher 6649aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 6659aebddd1SJeff Kirsher 6669aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 6679aebddd1SJeff Kirsher if (!wrb) { 6689aebddd1SJeff Kirsher status = -EBUSY; 6699aebddd1SJeff Kirsher goto err; 6709aebddd1SJeff Kirsher } 6719aebddd1SJeff Kirsher req = embedded_payload(wrb); 6729aebddd1SJeff Kirsher 673106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 674106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 6759aebddd1SJeff Kirsher 6769aebddd1SJeff Kirsher req->hdr.domain = domain; 6779aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 6789aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 6799aebddd1SJeff Kirsher 6809aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 6819aebddd1SJeff Kirsher if (!status) { 6829aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 6839aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 6849aebddd1SJeff Kirsher } 6859aebddd1SJeff Kirsher 6869aebddd1SJeff Kirsher err: 6879aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 688e3a7ae2cSSomnath Kotur 689e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 690e3a7ae2cSSomnath Kotur status = -EPERM; 691e3a7ae2cSSomnath Kotur 6929aebddd1SJeff Kirsher return status; 6939aebddd1SJeff Kirsher } 6949aebddd1SJeff Kirsher 6959aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 69630128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 6979aebddd1SJeff Kirsher { 6989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6999aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 7009aebddd1SJeff Kirsher int status; 7019aebddd1SJeff Kirsher 70230128031SSathya Perla if (pmac_id == -1) 70330128031SSathya Perla return 0; 70430128031SSathya Perla 7059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 7069aebddd1SJeff Kirsher 7079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 7089aebddd1SJeff Kirsher if (!wrb) { 7099aebddd1SJeff Kirsher status = -EBUSY; 7109aebddd1SJeff Kirsher goto err; 7119aebddd1SJeff Kirsher } 7129aebddd1SJeff Kirsher req = embedded_payload(wrb); 7139aebddd1SJeff Kirsher 714106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 715106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 7169aebddd1SJeff Kirsher 7179aebddd1SJeff Kirsher req->hdr.domain = dom; 7189aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 7199aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 7209aebddd1SJeff Kirsher 7219aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 7229aebddd1SJeff Kirsher 7239aebddd1SJeff Kirsher err: 7249aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 7259aebddd1SJeff Kirsher return status; 7269aebddd1SJeff Kirsher } 7279aebddd1SJeff Kirsher 7289aebddd1SJeff Kirsher /* Uses Mbox */ 72910ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 73010ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 7319aebddd1SJeff Kirsher { 7329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7339aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 7349aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 7359aebddd1SJeff Kirsher void *ctxt; 7369aebddd1SJeff Kirsher int status; 7379aebddd1SJeff Kirsher 7389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7399aebddd1SJeff Kirsher return -1; 7409aebddd1SJeff Kirsher 7419aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 7429aebddd1SJeff Kirsher req = embedded_payload(wrb); 7439aebddd1SJeff Kirsher ctxt = &req->context; 7449aebddd1SJeff Kirsher 745106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 746106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 7479aebddd1SJeff Kirsher 7489aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 7499aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 7509aebddd1SJeff Kirsher req->hdr.version = 2; 7519aebddd1SJeff Kirsher req->page_size = 1; /* 1 for 4K */ 7529aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_lancer, nodelay, ctxt, 7539aebddd1SJeff Kirsher no_delay); 7549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_lancer, count, ctxt, 7559aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 7569aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_lancer, valid, ctxt, 1); 7579aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_lancer, eventable, 7589aebddd1SJeff Kirsher ctxt, 1); 7599aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_lancer, eqid, 7609aebddd1SJeff Kirsher ctxt, eq->id); 7619aebddd1SJeff Kirsher } else { 7629aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 7639aebddd1SJeff Kirsher coalesce_wm); 7649aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 7659aebddd1SJeff Kirsher ctxt, no_delay); 7669aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 7679aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 7689aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 7699aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 7709aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 7719aebddd1SJeff Kirsher } 7729aebddd1SJeff Kirsher 7739aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 7749aebddd1SJeff Kirsher 7759aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 7769aebddd1SJeff Kirsher 7779aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 7789aebddd1SJeff Kirsher if (!status) { 7799aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 7809aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 7819aebddd1SJeff Kirsher cq->created = true; 7829aebddd1SJeff Kirsher } 7839aebddd1SJeff Kirsher 7849aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 7859aebddd1SJeff Kirsher 7869aebddd1SJeff Kirsher return status; 7879aebddd1SJeff Kirsher } 7889aebddd1SJeff Kirsher 7899aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 7909aebddd1SJeff Kirsher { 7919aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 7929aebddd1SJeff Kirsher if (len_encoded == 16) 7939aebddd1SJeff Kirsher len_encoded = 0; 7949aebddd1SJeff Kirsher return len_encoded; 7959aebddd1SJeff Kirsher } 7969aebddd1SJeff Kirsher 7979aebddd1SJeff Kirsher int be_cmd_mccq_ext_create(struct be_adapter *adapter, 7989aebddd1SJeff Kirsher struct be_queue_info *mccq, 7999aebddd1SJeff Kirsher struct be_queue_info *cq) 8009aebddd1SJeff Kirsher { 8019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8029aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 8039aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 8049aebddd1SJeff Kirsher void *ctxt; 8059aebddd1SJeff Kirsher int status; 8069aebddd1SJeff Kirsher 8079aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8089aebddd1SJeff Kirsher return -1; 8099aebddd1SJeff Kirsher 8109aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8119aebddd1SJeff Kirsher req = embedded_payload(wrb); 8129aebddd1SJeff Kirsher ctxt = &req->context; 8139aebddd1SJeff Kirsher 814106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 815106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 8169aebddd1SJeff Kirsher 8179aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8189aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 8199aebddd1SJeff Kirsher req->hdr.version = 1; 8209aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq->id); 8219aebddd1SJeff Kirsher 8229aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt, 8239aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 8249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1); 8259aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id, 8269aebddd1SJeff Kirsher ctxt, cq->id); 8279aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid, 8289aebddd1SJeff Kirsher ctxt, 1); 8299aebddd1SJeff Kirsher 8309aebddd1SJeff Kirsher } else { 8319aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 8329aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 8339aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 8349aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 8359aebddd1SJeff Kirsher } 8369aebddd1SJeff Kirsher 8379aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 8389aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 8399aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 8409aebddd1SJeff Kirsher 8419aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8429aebddd1SJeff Kirsher 8439aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8449aebddd1SJeff Kirsher if (!status) { 8459aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 8469aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 8479aebddd1SJeff Kirsher mccq->created = true; 8489aebddd1SJeff Kirsher } 8499aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8509aebddd1SJeff Kirsher 8519aebddd1SJeff Kirsher return status; 8529aebddd1SJeff Kirsher } 8539aebddd1SJeff Kirsher 8549aebddd1SJeff Kirsher int be_cmd_mccq_org_create(struct be_adapter *adapter, 8559aebddd1SJeff Kirsher struct be_queue_info *mccq, 8569aebddd1SJeff Kirsher struct be_queue_info *cq) 8579aebddd1SJeff Kirsher { 8589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8599aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 8609aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 8619aebddd1SJeff Kirsher void *ctxt; 8629aebddd1SJeff Kirsher int status; 8639aebddd1SJeff Kirsher 8649aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8659aebddd1SJeff Kirsher return -1; 8669aebddd1SJeff Kirsher 8679aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8689aebddd1SJeff Kirsher req = embedded_payload(wrb); 8699aebddd1SJeff Kirsher ctxt = &req->context; 8709aebddd1SJeff Kirsher 871106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 872106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 8739aebddd1SJeff Kirsher 8749aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8759aebddd1SJeff Kirsher 8769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 8779aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 8789aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 8799aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 8809aebddd1SJeff Kirsher 8819aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 8829aebddd1SJeff Kirsher 8839aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8849aebddd1SJeff Kirsher 8859aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8869aebddd1SJeff Kirsher if (!status) { 8879aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 8889aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 8899aebddd1SJeff Kirsher mccq->created = true; 8909aebddd1SJeff Kirsher } 8919aebddd1SJeff Kirsher 8929aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8939aebddd1SJeff Kirsher return status; 8949aebddd1SJeff Kirsher } 8959aebddd1SJeff Kirsher 8969aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 8979aebddd1SJeff Kirsher struct be_queue_info *mccq, 8989aebddd1SJeff Kirsher struct be_queue_info *cq) 8999aebddd1SJeff Kirsher { 9009aebddd1SJeff Kirsher int status; 9019aebddd1SJeff Kirsher 9029aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 9039aebddd1SJeff Kirsher if (status && !lancer_chip(adapter)) { 9049aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 9059aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 9069aebddd1SJeff Kirsher "and FCoE traffic"); 9079aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 9089aebddd1SJeff Kirsher } 9099aebddd1SJeff Kirsher return status; 9109aebddd1SJeff Kirsher } 9119aebddd1SJeff Kirsher 9129aebddd1SJeff Kirsher int be_cmd_txq_create(struct be_adapter *adapter, 9139aebddd1SJeff Kirsher struct be_queue_info *txq, 9149aebddd1SJeff Kirsher struct be_queue_info *cq) 9159aebddd1SJeff Kirsher { 9169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9179aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 9189aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 9199aebddd1SJeff Kirsher void *ctxt; 9209aebddd1SJeff Kirsher int status; 9219aebddd1SJeff Kirsher 922293c4a7dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 9239aebddd1SJeff Kirsher 924293c4a7dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 925293c4a7dSPadmanabh Ratnakar if (!wrb) { 926293c4a7dSPadmanabh Ratnakar status = -EBUSY; 927293c4a7dSPadmanabh Ratnakar goto err; 928293c4a7dSPadmanabh Ratnakar } 929293c4a7dSPadmanabh Ratnakar 9309aebddd1SJeff Kirsher req = embedded_payload(wrb); 9319aebddd1SJeff Kirsher ctxt = &req->context; 9329aebddd1SJeff Kirsher 933106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 934106df1e3SSomnath Kotur OPCODE_ETH_TX_CREATE, sizeof(*req), wrb, NULL); 9359aebddd1SJeff Kirsher 9369aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 9379aebddd1SJeff Kirsher req->hdr.version = 1; 9389aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_tx_context, if_id, ctxt, 9399aebddd1SJeff Kirsher adapter->if_handle); 9409aebddd1SJeff Kirsher } 9419aebddd1SJeff Kirsher 9429aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 9439aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 9449aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 9459aebddd1SJeff Kirsher 9469aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, 9479aebddd1SJeff Kirsher be_encoded_q_len(txq->len)); 9489aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); 9499aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id); 9509aebddd1SJeff Kirsher 9519aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 9529aebddd1SJeff Kirsher 9539aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9549aebddd1SJeff Kirsher 955293c4a7dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 9569aebddd1SJeff Kirsher if (!status) { 9579aebddd1SJeff Kirsher struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); 9589aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 9599aebddd1SJeff Kirsher txq->created = true; 9609aebddd1SJeff Kirsher } 9619aebddd1SJeff Kirsher 962293c4a7dSPadmanabh Ratnakar err: 963293c4a7dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 9649aebddd1SJeff Kirsher 9659aebddd1SJeff Kirsher return status; 9669aebddd1SJeff Kirsher } 9679aebddd1SJeff Kirsher 9689aebddd1SJeff Kirsher /* Uses MCC */ 9699aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 9709aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 97110ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 9729aebddd1SJeff Kirsher { 9739aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9749aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 9759aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 9769aebddd1SJeff Kirsher int status; 9779aebddd1SJeff Kirsher 9789aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9799aebddd1SJeff Kirsher 9809aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9819aebddd1SJeff Kirsher if (!wrb) { 9829aebddd1SJeff Kirsher status = -EBUSY; 9839aebddd1SJeff Kirsher goto err; 9849aebddd1SJeff Kirsher } 9859aebddd1SJeff Kirsher req = embedded_payload(wrb); 9869aebddd1SJeff Kirsher 987106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 988106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 9899aebddd1SJeff Kirsher 9909aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 9919aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 9929aebddd1SJeff Kirsher req->num_pages = 2; 9939aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9949aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 99510ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 9969aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 9979aebddd1SJeff Kirsher 9989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9999aebddd1SJeff Kirsher if (!status) { 10009aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 10019aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 10029aebddd1SJeff Kirsher rxq->created = true; 10039aebddd1SJeff Kirsher *rss_id = resp->rss_id; 10049aebddd1SJeff Kirsher } 10059aebddd1SJeff Kirsher 10069aebddd1SJeff Kirsher err: 10079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10089aebddd1SJeff Kirsher return status; 10099aebddd1SJeff Kirsher } 10109aebddd1SJeff Kirsher 10119aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 10129aebddd1SJeff Kirsher * Uses Mbox 10139aebddd1SJeff Kirsher */ 10149aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 10159aebddd1SJeff Kirsher int queue_type) 10169aebddd1SJeff Kirsher { 10179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10189aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 10199aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 10209aebddd1SJeff Kirsher int status; 10219aebddd1SJeff Kirsher 10229aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10239aebddd1SJeff Kirsher return -1; 10249aebddd1SJeff Kirsher 10259aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10269aebddd1SJeff Kirsher req = embedded_payload(wrb); 10279aebddd1SJeff Kirsher 10289aebddd1SJeff Kirsher switch (queue_type) { 10299aebddd1SJeff Kirsher case QTYPE_EQ: 10309aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 10319aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 10329aebddd1SJeff Kirsher break; 10339aebddd1SJeff Kirsher case QTYPE_CQ: 10349aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 10359aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 10369aebddd1SJeff Kirsher break; 10379aebddd1SJeff Kirsher case QTYPE_TXQ: 10389aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 10399aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 10409aebddd1SJeff Kirsher break; 10419aebddd1SJeff Kirsher case QTYPE_RXQ: 10429aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 10439aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 10449aebddd1SJeff Kirsher break; 10459aebddd1SJeff Kirsher case QTYPE_MCCQ: 10469aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 10479aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 10489aebddd1SJeff Kirsher break; 10499aebddd1SJeff Kirsher default: 10509aebddd1SJeff Kirsher BUG(); 10519aebddd1SJeff Kirsher } 10529aebddd1SJeff Kirsher 1053106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1054106df1e3SSomnath Kotur NULL); 10559aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 10569aebddd1SJeff Kirsher 10579aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10589aebddd1SJeff Kirsher if (!status) 10599aebddd1SJeff Kirsher q->created = false; 10609aebddd1SJeff Kirsher 10619aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10629aebddd1SJeff Kirsher return status; 10639aebddd1SJeff Kirsher } 10649aebddd1SJeff Kirsher 10659aebddd1SJeff Kirsher /* Uses MCC */ 10669aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 10679aebddd1SJeff Kirsher { 10689aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10699aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 10709aebddd1SJeff Kirsher int status; 10719aebddd1SJeff Kirsher 10729aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 10739aebddd1SJeff Kirsher 10749aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10759aebddd1SJeff Kirsher if (!wrb) { 10769aebddd1SJeff Kirsher status = -EBUSY; 10779aebddd1SJeff Kirsher goto err; 10789aebddd1SJeff Kirsher } 10799aebddd1SJeff Kirsher req = embedded_payload(wrb); 10809aebddd1SJeff Kirsher 1081106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1082106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 10839aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 10849aebddd1SJeff Kirsher 10859aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10869aebddd1SJeff Kirsher if (!status) 10879aebddd1SJeff Kirsher q->created = false; 10889aebddd1SJeff Kirsher 10899aebddd1SJeff Kirsher err: 10909aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10919aebddd1SJeff Kirsher return status; 10929aebddd1SJeff Kirsher } 10939aebddd1SJeff Kirsher 10949aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1095f9449ab7SSathya Perla * Uses MCCQ 10969aebddd1SJeff Kirsher */ 10979aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 1098f9449ab7SSathya Perla u8 *mac, u32 *if_handle, u32 *pmac_id, u32 domain) 10999aebddd1SJeff Kirsher { 11009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11019aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 11029aebddd1SJeff Kirsher int status; 11039aebddd1SJeff Kirsher 1104f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 11059aebddd1SJeff Kirsher 1106f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1107f9449ab7SSathya Perla if (!wrb) { 1108f9449ab7SSathya Perla status = -EBUSY; 1109f9449ab7SSathya Perla goto err; 1110f9449ab7SSathya Perla } 11119aebddd1SJeff Kirsher req = embedded_payload(wrb); 11129aebddd1SJeff Kirsher 1113106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1114106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), wrb, NULL); 11159aebddd1SJeff Kirsher req->hdr.domain = domain; 11169aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 11179aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1118f9449ab7SSathya Perla if (mac) 11199aebddd1SJeff Kirsher memcpy(req->mac_addr, mac, ETH_ALEN); 1120f9449ab7SSathya Perla else 1121f9449ab7SSathya Perla req->pmac_invalid = true; 11229aebddd1SJeff Kirsher 1123f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 11249aebddd1SJeff Kirsher if (!status) { 11259aebddd1SJeff Kirsher struct be_cmd_resp_if_create *resp = embedded_payload(wrb); 11269aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1127f9449ab7SSathya Perla if (mac) 11289aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11299aebddd1SJeff Kirsher } 11309aebddd1SJeff Kirsher 1131f9449ab7SSathya Perla err: 1132f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 11339aebddd1SJeff Kirsher return status; 11349aebddd1SJeff Kirsher } 11359aebddd1SJeff Kirsher 1136f9449ab7SSathya Perla /* Uses MCCQ */ 113730128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 11389aebddd1SJeff Kirsher { 11399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11409aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 11419aebddd1SJeff Kirsher int status; 11429aebddd1SJeff Kirsher 114330128031SSathya Perla if (interface_id == -1) 1144f9449ab7SSathya Perla return 0; 11459aebddd1SJeff Kirsher 1146f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1147f9449ab7SSathya Perla 1148f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1149f9449ab7SSathya Perla if (!wrb) { 1150f9449ab7SSathya Perla status = -EBUSY; 1151f9449ab7SSathya Perla goto err; 1152f9449ab7SSathya Perla } 11539aebddd1SJeff Kirsher req = embedded_payload(wrb); 11549aebddd1SJeff Kirsher 1155106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1156106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 11579aebddd1SJeff Kirsher req->hdr.domain = domain; 11589aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 11599aebddd1SJeff Kirsher 1160f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1161f9449ab7SSathya Perla err: 1162f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 11639aebddd1SJeff Kirsher return status; 11649aebddd1SJeff Kirsher } 11659aebddd1SJeff Kirsher 11669aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 11679aebddd1SJeff Kirsher * WRB but is a separate dma memory block 11689aebddd1SJeff Kirsher * Uses asynchronous MCC 11699aebddd1SJeff Kirsher */ 11709aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 11719aebddd1SJeff Kirsher { 11729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11739aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 11749aebddd1SJeff Kirsher int status = 0; 11759aebddd1SJeff Kirsher 11769aebddd1SJeff Kirsher if (MODULO(adapter->work_counter, be_get_temp_freq) == 0) 11779aebddd1SJeff Kirsher be_cmd_get_die_temperature(adapter); 11789aebddd1SJeff Kirsher 11799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 11809aebddd1SJeff Kirsher 11819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11829aebddd1SJeff Kirsher if (!wrb) { 11839aebddd1SJeff Kirsher status = -EBUSY; 11849aebddd1SJeff Kirsher goto err; 11859aebddd1SJeff Kirsher } 11869aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 11879aebddd1SJeff Kirsher 1188106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1189106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 11909aebddd1SJeff Kirsher 11919aebddd1SJeff Kirsher if (adapter->generation == BE_GEN3) 11929aebddd1SJeff Kirsher hdr->version = 1; 11939aebddd1SJeff Kirsher 11949aebddd1SJeff Kirsher be_mcc_notify(adapter); 11959aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 11969aebddd1SJeff Kirsher 11979aebddd1SJeff Kirsher err: 11989aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 11999aebddd1SJeff Kirsher return status; 12009aebddd1SJeff Kirsher } 12019aebddd1SJeff Kirsher 12029aebddd1SJeff Kirsher /* Lancer Stats */ 12039aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 12049aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 12059aebddd1SJeff Kirsher { 12069aebddd1SJeff Kirsher 12079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12089aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 12099aebddd1SJeff Kirsher int status = 0; 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12129aebddd1SJeff Kirsher 12139aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12149aebddd1SJeff Kirsher if (!wrb) { 12159aebddd1SJeff Kirsher status = -EBUSY; 12169aebddd1SJeff Kirsher goto err; 12179aebddd1SJeff Kirsher } 12189aebddd1SJeff Kirsher req = nonemb_cmd->va; 12199aebddd1SJeff Kirsher 1220106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1221106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1222106df1e3SSomnath Kotur nonemb_cmd); 12239aebddd1SJeff Kirsher 1224d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 12259aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 12269aebddd1SJeff Kirsher 12279aebddd1SJeff Kirsher be_mcc_notify(adapter); 12289aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 12299aebddd1SJeff Kirsher 12309aebddd1SJeff Kirsher err: 12319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12329aebddd1SJeff Kirsher return status; 12339aebddd1SJeff Kirsher } 12349aebddd1SJeff Kirsher 12359aebddd1SJeff Kirsher /* Uses synchronous mcc */ 12369aebddd1SJeff Kirsher int be_cmd_link_status_query(struct be_adapter *adapter, u8 *mac_speed, 1237b236916aSAjit Khaparde u16 *link_speed, u8 *link_status, u32 dom) 12389aebddd1SJeff Kirsher { 12399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12409aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 12419aebddd1SJeff Kirsher int status; 12429aebddd1SJeff Kirsher 12439aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12449aebddd1SJeff Kirsher 1245b236916aSAjit Khaparde if (link_status) 1246b236916aSAjit Khaparde *link_status = LINK_DOWN; 1247b236916aSAjit Khaparde 12489aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12499aebddd1SJeff Kirsher if (!wrb) { 12509aebddd1SJeff Kirsher status = -EBUSY; 12519aebddd1SJeff Kirsher goto err; 12529aebddd1SJeff Kirsher } 12539aebddd1SJeff Kirsher req = embedded_payload(wrb); 12549aebddd1SJeff Kirsher 125557cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 125657cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 125757cd80d4SPadmanabh Ratnakar 1258b236916aSAjit Khaparde if (adapter->generation == BE_GEN3 || lancer_chip(adapter)) 1259daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1260daad6167SPadmanabh Ratnakar 126157cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 12629aebddd1SJeff Kirsher 12639aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12649aebddd1SJeff Kirsher if (!status) { 12659aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 12669aebddd1SJeff Kirsher if (resp->mac_speed != PHY_LINK_SPEED_ZERO) { 1267b236916aSAjit Khaparde if (link_speed) 12689aebddd1SJeff Kirsher *link_speed = le16_to_cpu(resp->link_speed); 1269f9449ab7SSathya Perla if (mac_speed) 12709aebddd1SJeff Kirsher *mac_speed = resp->mac_speed; 12719aebddd1SJeff Kirsher } 1272b236916aSAjit Khaparde if (link_status) 1273b236916aSAjit Khaparde *link_status = resp->logical_link_status; 12749aebddd1SJeff Kirsher } 12759aebddd1SJeff Kirsher 12769aebddd1SJeff Kirsher err: 12779aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12789aebddd1SJeff Kirsher return status; 12799aebddd1SJeff Kirsher } 12809aebddd1SJeff Kirsher 12819aebddd1SJeff Kirsher /* Uses synchronous mcc */ 12829aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 12839aebddd1SJeff Kirsher { 12849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12859aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 12863de09455SSomnath Kotur u16 mccq_index; 12879aebddd1SJeff Kirsher int status; 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12909aebddd1SJeff Kirsher 12913de09455SSomnath Kotur mccq_index = adapter->mcc_obj.q.head; 12923de09455SSomnath Kotur 12939aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12949aebddd1SJeff Kirsher if (!wrb) { 12959aebddd1SJeff Kirsher status = -EBUSY; 12969aebddd1SJeff Kirsher goto err; 12979aebddd1SJeff Kirsher } 12989aebddd1SJeff Kirsher req = embedded_payload(wrb); 12999aebddd1SJeff Kirsher 1300106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1301106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1302106df1e3SSomnath Kotur wrb, NULL); 13039aebddd1SJeff Kirsher 13043de09455SSomnath Kotur wrb->tag1 = mccq_index; 13053de09455SSomnath Kotur 13063de09455SSomnath Kotur be_mcc_notify(adapter); 13079aebddd1SJeff Kirsher 13089aebddd1SJeff Kirsher err: 13099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13109aebddd1SJeff Kirsher return status; 13119aebddd1SJeff Kirsher } 13129aebddd1SJeff Kirsher 13139aebddd1SJeff Kirsher /* Uses synchronous mcc */ 13149aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 13159aebddd1SJeff Kirsher { 13169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13179aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 13189aebddd1SJeff Kirsher int status; 13199aebddd1SJeff Kirsher 13209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13219aebddd1SJeff Kirsher 13229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13239aebddd1SJeff Kirsher if (!wrb) { 13249aebddd1SJeff Kirsher status = -EBUSY; 13259aebddd1SJeff Kirsher goto err; 13269aebddd1SJeff Kirsher } 13279aebddd1SJeff Kirsher req = embedded_payload(wrb); 13289aebddd1SJeff Kirsher 1329106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1330106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 13319aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 13329aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13339aebddd1SJeff Kirsher if (!status) { 13349aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 13359aebddd1SJeff Kirsher if (log_size && resp->log_size) 13369aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 13379aebddd1SJeff Kirsher sizeof(u32); 13389aebddd1SJeff Kirsher } 13399aebddd1SJeff Kirsher err: 13409aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13419aebddd1SJeff Kirsher return status; 13429aebddd1SJeff Kirsher } 13439aebddd1SJeff Kirsher 13449aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 13459aebddd1SJeff Kirsher { 13469aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 13479aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13489aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 13499aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 13509aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 13519aebddd1SJeff Kirsher int status; 13529aebddd1SJeff Kirsher 13539aebddd1SJeff Kirsher if (buf_len == 0) 13549aebddd1SJeff Kirsher return; 13559aebddd1SJeff Kirsher 13569aebddd1SJeff Kirsher total_size = buf_len; 13579aebddd1SJeff Kirsher 13589aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 13599aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 13609aebddd1SJeff Kirsher get_fat_cmd.size, 13619aebddd1SJeff Kirsher &get_fat_cmd.dma); 13629aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 13639aebddd1SJeff Kirsher status = -ENOMEM; 13649aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 13659aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 13669aebddd1SJeff Kirsher return; 13679aebddd1SJeff Kirsher } 13689aebddd1SJeff Kirsher 13699aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13709aebddd1SJeff Kirsher 13719aebddd1SJeff Kirsher while (total_size) { 13729aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 13739aebddd1SJeff Kirsher total_size -= buf_size; 13749aebddd1SJeff Kirsher 13759aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13769aebddd1SJeff Kirsher if (!wrb) { 13779aebddd1SJeff Kirsher status = -EBUSY; 13789aebddd1SJeff Kirsher goto err; 13799aebddd1SJeff Kirsher } 13809aebddd1SJeff Kirsher req = get_fat_cmd.va; 13819aebddd1SJeff Kirsher 13829aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1383106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1384106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1385106df1e3SSomnath Kotur &get_fat_cmd); 13869aebddd1SJeff Kirsher 13879aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 13889aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 13899aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 13909aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 13919aebddd1SJeff Kirsher 13929aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13939aebddd1SJeff Kirsher if (!status) { 13949aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 13959aebddd1SJeff Kirsher memcpy(buf + offset, 13969aebddd1SJeff Kirsher resp->data_buffer, 139792aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 13989aebddd1SJeff Kirsher } else { 13999aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 14009aebddd1SJeff Kirsher goto err; 14019aebddd1SJeff Kirsher } 14029aebddd1SJeff Kirsher offset += buf_size; 14039aebddd1SJeff Kirsher log_offset += buf_size; 14049aebddd1SJeff Kirsher } 14059aebddd1SJeff Kirsher err: 14069aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 14079aebddd1SJeff Kirsher get_fat_cmd.va, 14089aebddd1SJeff Kirsher get_fat_cmd.dma); 14099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14109aebddd1SJeff Kirsher } 14119aebddd1SJeff Kirsher 141204b71175SSathya Perla /* Uses synchronous mcc */ 141304b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 141404b71175SSathya Perla char *fw_on_flash) 14159aebddd1SJeff Kirsher { 14169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14179aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 14189aebddd1SJeff Kirsher int status; 14199aebddd1SJeff Kirsher 142004b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 14219aebddd1SJeff Kirsher 142204b71175SSathya Perla wrb = wrb_from_mccq(adapter); 142304b71175SSathya Perla if (!wrb) { 142404b71175SSathya Perla status = -EBUSY; 142504b71175SSathya Perla goto err; 142604b71175SSathya Perla } 142704b71175SSathya Perla 14289aebddd1SJeff Kirsher req = embedded_payload(wrb); 14299aebddd1SJeff Kirsher 1430106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1431106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 143204b71175SSathya Perla status = be_mcc_notify_wait(adapter); 14339aebddd1SJeff Kirsher if (!status) { 14349aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 143504b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 143604b71175SSathya Perla if (fw_on_flash) 143704b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 14389aebddd1SJeff Kirsher } 143904b71175SSathya Perla err: 144004b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14419aebddd1SJeff Kirsher return status; 14429aebddd1SJeff Kirsher } 14439aebddd1SJeff Kirsher 14449aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 14459aebddd1SJeff Kirsher * Uses async mcc 14469aebddd1SJeff Kirsher */ 14479aebddd1SJeff Kirsher int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) 14489aebddd1SJeff Kirsher { 14499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14509aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 14519aebddd1SJeff Kirsher int status = 0; 14529aebddd1SJeff Kirsher 14539aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14549aebddd1SJeff Kirsher 14559aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14569aebddd1SJeff Kirsher if (!wrb) { 14579aebddd1SJeff Kirsher status = -EBUSY; 14589aebddd1SJeff Kirsher goto err; 14599aebddd1SJeff Kirsher } 14609aebddd1SJeff Kirsher req = embedded_payload(wrb); 14619aebddd1SJeff Kirsher 1462106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1463106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 14649aebddd1SJeff Kirsher 14659aebddd1SJeff Kirsher req->num_eq = cpu_to_le32(1); 14669aebddd1SJeff Kirsher req->delay[0].eq_id = cpu_to_le32(eq_id); 14679aebddd1SJeff Kirsher req->delay[0].phase = 0; 14689aebddd1SJeff Kirsher req->delay[0].delay_multiplier = cpu_to_le32(eqd); 14699aebddd1SJeff Kirsher 14709aebddd1SJeff Kirsher be_mcc_notify(adapter); 14719aebddd1SJeff Kirsher 14729aebddd1SJeff Kirsher err: 14739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14749aebddd1SJeff Kirsher return status; 14759aebddd1SJeff Kirsher } 14769aebddd1SJeff Kirsher 14779aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 14789aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 14799aebddd1SJeff Kirsher u32 num, bool untagged, bool promiscuous) 14809aebddd1SJeff Kirsher { 14819aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14829aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 14839aebddd1SJeff Kirsher int status; 14849aebddd1SJeff Kirsher 14859aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14869aebddd1SJeff Kirsher 14879aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14889aebddd1SJeff Kirsher if (!wrb) { 14899aebddd1SJeff Kirsher status = -EBUSY; 14909aebddd1SJeff Kirsher goto err; 14919aebddd1SJeff Kirsher } 14929aebddd1SJeff Kirsher req = embedded_payload(wrb); 14939aebddd1SJeff Kirsher 1494106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1495106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 14969aebddd1SJeff Kirsher 14979aebddd1SJeff Kirsher req->interface_id = if_id; 14989aebddd1SJeff Kirsher req->promiscuous = promiscuous; 14999aebddd1SJeff Kirsher req->untagged = untagged; 15009aebddd1SJeff Kirsher req->num_vlan = num; 15019aebddd1SJeff Kirsher if (!promiscuous) { 15029aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 15039aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 15049aebddd1SJeff Kirsher } 15059aebddd1SJeff Kirsher 15069aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15079aebddd1SJeff Kirsher 15089aebddd1SJeff Kirsher err: 15099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15109aebddd1SJeff Kirsher return status; 15119aebddd1SJeff Kirsher } 15129aebddd1SJeff Kirsher 15139aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 15149aebddd1SJeff Kirsher { 15159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15169aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 15179aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 15189aebddd1SJeff Kirsher int status; 15199aebddd1SJeff Kirsher 15209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15219aebddd1SJeff Kirsher 15229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15239aebddd1SJeff Kirsher if (!wrb) { 15249aebddd1SJeff Kirsher status = -EBUSY; 15259aebddd1SJeff Kirsher goto err; 15269aebddd1SJeff Kirsher } 15279aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1528106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1529106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1530106df1e3SSomnath Kotur wrb, mem); 15319aebddd1SJeff Kirsher 15329aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 15339aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 15349aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 15359aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN_PROMISCUOUS); 15369aebddd1SJeff Kirsher if (value == ON) 15379aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 15389aebddd1SJeff Kirsher BE_IF_FLAGS_VLAN_PROMISCUOUS); 15399aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 15409aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 15419aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 15429aebddd1SJeff Kirsher } else { 15439aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 15449aebddd1SJeff Kirsher int i = 0; 15459aebddd1SJeff Kirsher 15468e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 15478e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 15481610c79fSPadmanabh Ratnakar 15491610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 15501610c79fSPadmanabh Ratnakar * and not setting flags field 15511610c79fSPadmanabh Ratnakar */ 15521610c79fSPadmanabh Ratnakar req->if_flags_mask |= 15531610c79fSPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 15541610c79fSPadmanabh Ratnakar 1555016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 15569aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 15579aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 15589aebddd1SJeff Kirsher } 15599aebddd1SJeff Kirsher 15609aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15619aebddd1SJeff Kirsher err: 15629aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15639aebddd1SJeff Kirsher return status; 15649aebddd1SJeff Kirsher } 15659aebddd1SJeff Kirsher 15669aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 15679aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 15689aebddd1SJeff Kirsher { 15699aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15709aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 15719aebddd1SJeff Kirsher int status; 15729aebddd1SJeff Kirsher 15739aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15749aebddd1SJeff Kirsher 15759aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15769aebddd1SJeff Kirsher if (!wrb) { 15779aebddd1SJeff Kirsher status = -EBUSY; 15789aebddd1SJeff Kirsher goto err; 15799aebddd1SJeff Kirsher } 15809aebddd1SJeff Kirsher req = embedded_payload(wrb); 15819aebddd1SJeff Kirsher 1582106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1583106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 15849aebddd1SJeff Kirsher 15859aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 15869aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 15879aebddd1SJeff Kirsher 15889aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15899aebddd1SJeff Kirsher 15909aebddd1SJeff Kirsher err: 15919aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15929aebddd1SJeff Kirsher return status; 15939aebddd1SJeff Kirsher } 15949aebddd1SJeff Kirsher 15959aebddd1SJeff Kirsher /* Uses sycn mcc */ 15969aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 15979aebddd1SJeff Kirsher { 15989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15999aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 16009aebddd1SJeff Kirsher int status; 16019aebddd1SJeff Kirsher 16029aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16039aebddd1SJeff Kirsher 16049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16059aebddd1SJeff Kirsher if (!wrb) { 16069aebddd1SJeff Kirsher status = -EBUSY; 16079aebddd1SJeff Kirsher goto err; 16089aebddd1SJeff Kirsher } 16099aebddd1SJeff Kirsher req = embedded_payload(wrb); 16109aebddd1SJeff Kirsher 1611106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1612106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 16139aebddd1SJeff Kirsher 16149aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16159aebddd1SJeff Kirsher if (!status) { 16169aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 16179aebddd1SJeff Kirsher embedded_payload(wrb); 16189aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 16199aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 16209aebddd1SJeff Kirsher } 16219aebddd1SJeff Kirsher 16229aebddd1SJeff Kirsher err: 16239aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16249aebddd1SJeff Kirsher return status; 16259aebddd1SJeff Kirsher } 16269aebddd1SJeff Kirsher 16279aebddd1SJeff Kirsher /* Uses mbox */ 16289aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 16299aebddd1SJeff Kirsher u32 *mode, u32 *caps) 16309aebddd1SJeff Kirsher { 16319aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16329aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 16339aebddd1SJeff Kirsher int status; 16349aebddd1SJeff Kirsher 16359aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 16369aebddd1SJeff Kirsher return -1; 16379aebddd1SJeff Kirsher 16389aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 16399aebddd1SJeff Kirsher req = embedded_payload(wrb); 16409aebddd1SJeff Kirsher 1641106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1642106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 16439aebddd1SJeff Kirsher 16449aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 16459aebddd1SJeff Kirsher if (!status) { 16469aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 16479aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 16489aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 16499aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 16509aebddd1SJeff Kirsher } 16519aebddd1SJeff Kirsher 16529aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 16539aebddd1SJeff Kirsher return status; 16549aebddd1SJeff Kirsher } 16559aebddd1SJeff Kirsher 16569aebddd1SJeff Kirsher /* Uses mbox */ 16579aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 16589aebddd1SJeff Kirsher { 16599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16609aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 16619aebddd1SJeff Kirsher int status; 16629aebddd1SJeff Kirsher 16639aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 16649aebddd1SJeff Kirsher return -1; 16659aebddd1SJeff Kirsher 16669aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 16679aebddd1SJeff Kirsher req = embedded_payload(wrb); 16689aebddd1SJeff Kirsher 1669106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 1670106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 16719aebddd1SJeff Kirsher 16729aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 16739aebddd1SJeff Kirsher 16749aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 16759aebddd1SJeff Kirsher return status; 16769aebddd1SJeff Kirsher } 16779aebddd1SJeff Kirsher 16789aebddd1SJeff Kirsher int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, u16 table_size) 16799aebddd1SJeff Kirsher { 16809aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16819aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 168265f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 168365f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 168465f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 16859aebddd1SJeff Kirsher int status; 16869aebddd1SJeff Kirsher 16879aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 16889aebddd1SJeff Kirsher return -1; 16899aebddd1SJeff Kirsher 16909aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 16919aebddd1SJeff Kirsher req = embedded_payload(wrb); 16929aebddd1SJeff Kirsher 1693106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1694106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 16959aebddd1SJeff Kirsher 16969aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 16971ca7ba92SSathya Perla req->enable_rss = cpu_to_le16(RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4 | 16981ca7ba92SSathya Perla RSS_ENABLE_TCP_IPV6 | RSS_ENABLE_IPV6); 16999aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 17009aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 17019aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 17029aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 17039aebddd1SJeff Kirsher 17049aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 17059aebddd1SJeff Kirsher 17069aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 17079aebddd1SJeff Kirsher return status; 17089aebddd1SJeff Kirsher } 17099aebddd1SJeff Kirsher 17109aebddd1SJeff Kirsher /* Uses sync mcc */ 17119aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 17129aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 17139aebddd1SJeff Kirsher { 17149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17159aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 17169aebddd1SJeff Kirsher int status; 17179aebddd1SJeff Kirsher 17189aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17199aebddd1SJeff Kirsher 17209aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17219aebddd1SJeff Kirsher if (!wrb) { 17229aebddd1SJeff Kirsher status = -EBUSY; 17239aebddd1SJeff Kirsher goto err; 17249aebddd1SJeff Kirsher } 17259aebddd1SJeff Kirsher req = embedded_payload(wrb); 17269aebddd1SJeff Kirsher 1727106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1728106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 17299aebddd1SJeff Kirsher 17309aebddd1SJeff Kirsher req->port_num = port_num; 17319aebddd1SJeff Kirsher req->beacon_state = state; 17329aebddd1SJeff Kirsher req->beacon_duration = bcn; 17339aebddd1SJeff Kirsher req->status_duration = sts; 17349aebddd1SJeff Kirsher 17359aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17369aebddd1SJeff Kirsher 17379aebddd1SJeff Kirsher err: 17389aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17399aebddd1SJeff Kirsher return status; 17409aebddd1SJeff Kirsher } 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher /* Uses sync mcc */ 17439aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 17449aebddd1SJeff Kirsher { 17459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17469aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 17479aebddd1SJeff Kirsher int status; 17489aebddd1SJeff Kirsher 17499aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17509aebddd1SJeff Kirsher 17519aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17529aebddd1SJeff Kirsher if (!wrb) { 17539aebddd1SJeff Kirsher status = -EBUSY; 17549aebddd1SJeff Kirsher goto err; 17559aebddd1SJeff Kirsher } 17569aebddd1SJeff Kirsher req = embedded_payload(wrb); 17579aebddd1SJeff Kirsher 1758106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1759106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 17609aebddd1SJeff Kirsher 17619aebddd1SJeff Kirsher req->port_num = port_num; 17629aebddd1SJeff Kirsher 17639aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17649aebddd1SJeff Kirsher if (!status) { 17659aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 17669aebddd1SJeff Kirsher embedded_payload(wrb); 17679aebddd1SJeff Kirsher *state = resp->beacon_state; 17689aebddd1SJeff Kirsher } 17699aebddd1SJeff Kirsher 17709aebddd1SJeff Kirsher err: 17719aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17729aebddd1SJeff Kirsher return status; 17739aebddd1SJeff Kirsher } 17749aebddd1SJeff Kirsher 17759aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 17769aebddd1SJeff Kirsher u32 data_size, u32 data_offset, const char *obj_name, 17779aebddd1SJeff Kirsher u32 *data_written, u8 *addn_status) 17789aebddd1SJeff Kirsher { 17799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17809aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 17819aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 17829aebddd1SJeff Kirsher void *ctxt = NULL; 17839aebddd1SJeff Kirsher int status; 17849aebddd1SJeff Kirsher 17859aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17869aebddd1SJeff Kirsher adapter->flash_status = 0; 17879aebddd1SJeff Kirsher 17889aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17899aebddd1SJeff Kirsher if (!wrb) { 17909aebddd1SJeff Kirsher status = -EBUSY; 17919aebddd1SJeff Kirsher goto err_unlock; 17929aebddd1SJeff Kirsher } 17939aebddd1SJeff Kirsher 17949aebddd1SJeff Kirsher req = embedded_payload(wrb); 17959aebddd1SJeff Kirsher 1796106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 17979aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 1798106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 1799106df1e3SSomnath Kotur NULL); 18009aebddd1SJeff Kirsher 18019aebddd1SJeff Kirsher ctxt = &req->context; 18029aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 18039aebddd1SJeff Kirsher write_length, ctxt, data_size); 18049aebddd1SJeff Kirsher 18059aebddd1SJeff Kirsher if (data_size == 0) 18069aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 18079aebddd1SJeff Kirsher eof, ctxt, 1); 18089aebddd1SJeff Kirsher else 18099aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 18109aebddd1SJeff Kirsher eof, ctxt, 0); 18119aebddd1SJeff Kirsher 18129aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 18139aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 18149aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 18159aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 18169aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 18179aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 18189aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 18199aebddd1SJeff Kirsher & 0xFFFFFFFF); 18209aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 18219aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 18229aebddd1SJeff Kirsher 18239aebddd1SJeff Kirsher be_mcc_notify(adapter); 18249aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18259aebddd1SJeff Kirsher 18269aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 1827804c7515SPadmanabh Ratnakar msecs_to_jiffies(30000))) 18289aebddd1SJeff Kirsher status = -1; 18299aebddd1SJeff Kirsher else 18309aebddd1SJeff Kirsher status = adapter->flash_status; 18319aebddd1SJeff Kirsher 18329aebddd1SJeff Kirsher resp = embedded_payload(wrb); 1833804c7515SPadmanabh Ratnakar if (!status) 18349aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 1835804c7515SPadmanabh Ratnakar else 18369aebddd1SJeff Kirsher *addn_status = resp->additional_status; 18379aebddd1SJeff Kirsher 18389aebddd1SJeff Kirsher return status; 18399aebddd1SJeff Kirsher 18409aebddd1SJeff Kirsher err_unlock: 18419aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18429aebddd1SJeff Kirsher return status; 18439aebddd1SJeff Kirsher } 18449aebddd1SJeff Kirsher 1845de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 1846de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 1847de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 1848de49bd5aSPadmanabh Ratnakar { 1849de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 1850de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 1851de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 1852de49bd5aSPadmanabh Ratnakar int status; 1853de49bd5aSPadmanabh Ratnakar 1854de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 1855de49bd5aSPadmanabh Ratnakar 1856de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 1857de49bd5aSPadmanabh Ratnakar if (!wrb) { 1858de49bd5aSPadmanabh Ratnakar status = -EBUSY; 1859de49bd5aSPadmanabh Ratnakar goto err_unlock; 1860de49bd5aSPadmanabh Ratnakar } 1861de49bd5aSPadmanabh Ratnakar 1862de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 1863de49bd5aSPadmanabh Ratnakar 1864de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1865de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 1866de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 1867de49bd5aSPadmanabh Ratnakar NULL); 1868de49bd5aSPadmanabh Ratnakar 1869de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 1870de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 1871de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 1872de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 1873de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 1874de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 1875de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 1876de49bd5aSPadmanabh Ratnakar 1877de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 1878de49bd5aSPadmanabh Ratnakar 1879de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 1880de49bd5aSPadmanabh Ratnakar if (!status) { 1881de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 1882de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 1883de49bd5aSPadmanabh Ratnakar } else { 1884de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 1885de49bd5aSPadmanabh Ratnakar } 1886de49bd5aSPadmanabh Ratnakar 1887de49bd5aSPadmanabh Ratnakar err_unlock: 1888de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 1889de49bd5aSPadmanabh Ratnakar return status; 1890de49bd5aSPadmanabh Ratnakar } 1891de49bd5aSPadmanabh Ratnakar 18929aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 18939aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 18949aebddd1SJeff Kirsher { 18959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18969aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 18979aebddd1SJeff Kirsher int status; 18989aebddd1SJeff Kirsher 18999aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19009aebddd1SJeff Kirsher adapter->flash_status = 0; 19019aebddd1SJeff Kirsher 19029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19039aebddd1SJeff Kirsher if (!wrb) { 19049aebddd1SJeff Kirsher status = -EBUSY; 19059aebddd1SJeff Kirsher goto err_unlock; 19069aebddd1SJeff Kirsher } 19079aebddd1SJeff Kirsher req = cmd->va; 19089aebddd1SJeff Kirsher 1909106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1910106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 19119aebddd1SJeff Kirsher 19129aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 19139aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 19149aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 19159aebddd1SJeff Kirsher 19169aebddd1SJeff Kirsher be_mcc_notify(adapter); 19179aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19189aebddd1SJeff Kirsher 19199aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 1920e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 19219aebddd1SJeff Kirsher status = -1; 19229aebddd1SJeff Kirsher else 19239aebddd1SJeff Kirsher status = adapter->flash_status; 19249aebddd1SJeff Kirsher 19259aebddd1SJeff Kirsher return status; 19269aebddd1SJeff Kirsher 19279aebddd1SJeff Kirsher err_unlock: 19289aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19299aebddd1SJeff Kirsher return status; 19309aebddd1SJeff Kirsher } 19319aebddd1SJeff Kirsher 19329aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 19339aebddd1SJeff Kirsher int offset) 19349aebddd1SJeff Kirsher { 19359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19369aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 19379aebddd1SJeff Kirsher int status; 19389aebddd1SJeff Kirsher 19399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19409aebddd1SJeff Kirsher 19419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19429aebddd1SJeff Kirsher if (!wrb) { 19439aebddd1SJeff Kirsher status = -EBUSY; 19449aebddd1SJeff Kirsher goto err; 19459aebddd1SJeff Kirsher } 19469aebddd1SJeff Kirsher req = embedded_payload(wrb); 19479aebddd1SJeff Kirsher 1948106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1949106df1e3SSomnath Kotur OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4, wrb, NULL); 19509aebddd1SJeff Kirsher 19519aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(IMG_TYPE_REDBOOT); 19529aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 19539aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 19549aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 19559aebddd1SJeff Kirsher 19569aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19579aebddd1SJeff Kirsher if (!status) 19589aebddd1SJeff Kirsher memcpy(flashed_crc, req->params.data_buf, 4); 19599aebddd1SJeff Kirsher 19609aebddd1SJeff Kirsher err: 19619aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19629aebddd1SJeff Kirsher return status; 19639aebddd1SJeff Kirsher } 19649aebddd1SJeff Kirsher 19659aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 19669aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 19679aebddd1SJeff Kirsher { 19689aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19699aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 19709aebddd1SJeff Kirsher int status; 19719aebddd1SJeff Kirsher 19729aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19739aebddd1SJeff Kirsher 19749aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19759aebddd1SJeff Kirsher if (!wrb) { 19769aebddd1SJeff Kirsher status = -EBUSY; 19779aebddd1SJeff Kirsher goto err; 19789aebddd1SJeff Kirsher } 19799aebddd1SJeff Kirsher req = nonemb_cmd->va; 19809aebddd1SJeff Kirsher 1981106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1982106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 1983106df1e3SSomnath Kotur nonemb_cmd); 19849aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 19859aebddd1SJeff Kirsher 19869aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19879aebddd1SJeff Kirsher 19889aebddd1SJeff Kirsher err: 19899aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19909aebddd1SJeff Kirsher return status; 19919aebddd1SJeff Kirsher } 19929aebddd1SJeff Kirsher 19939aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 19949aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 19959aebddd1SJeff Kirsher { 19969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19979aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 19989aebddd1SJeff Kirsher int status; 19999aebddd1SJeff Kirsher 20009aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20019aebddd1SJeff Kirsher 20029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20039aebddd1SJeff Kirsher if (!wrb) { 20049aebddd1SJeff Kirsher status = -EBUSY; 20059aebddd1SJeff Kirsher goto err; 20069aebddd1SJeff Kirsher } 20079aebddd1SJeff Kirsher 20089aebddd1SJeff Kirsher req = embedded_payload(wrb); 20099aebddd1SJeff Kirsher 2010106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2011106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2012106df1e3SSomnath Kotur NULL); 20139aebddd1SJeff Kirsher 20149aebddd1SJeff Kirsher req->src_port = port_num; 20159aebddd1SJeff Kirsher req->dest_port = port_num; 20169aebddd1SJeff Kirsher req->loopback_type = loopback_type; 20179aebddd1SJeff Kirsher req->loopback_state = enable; 20189aebddd1SJeff Kirsher 20199aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20209aebddd1SJeff Kirsher err: 20219aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20229aebddd1SJeff Kirsher return status; 20239aebddd1SJeff Kirsher } 20249aebddd1SJeff Kirsher 20259aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 20269aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 20279aebddd1SJeff Kirsher { 20289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20299aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 20309aebddd1SJeff Kirsher int status; 20319aebddd1SJeff Kirsher 20329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20339aebddd1SJeff Kirsher 20349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20359aebddd1SJeff Kirsher if (!wrb) { 20369aebddd1SJeff Kirsher status = -EBUSY; 20379aebddd1SJeff Kirsher goto err; 20389aebddd1SJeff Kirsher } 20399aebddd1SJeff Kirsher 20409aebddd1SJeff Kirsher req = embedded_payload(wrb); 20419aebddd1SJeff Kirsher 2042106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2043106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 20449aebddd1SJeff Kirsher req->hdr.timeout = cpu_to_le32(4); 20459aebddd1SJeff Kirsher 20469aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 20479aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 20489aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 20499aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 20509aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 20519aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 20529aebddd1SJeff Kirsher 20539aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20549aebddd1SJeff Kirsher if (!status) { 20559aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); 20569aebddd1SJeff Kirsher status = le32_to_cpu(resp->status); 20579aebddd1SJeff Kirsher } 20589aebddd1SJeff Kirsher 20599aebddd1SJeff Kirsher err: 20609aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20619aebddd1SJeff Kirsher return status; 20629aebddd1SJeff Kirsher } 20639aebddd1SJeff Kirsher 20649aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 20659aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 20669aebddd1SJeff Kirsher { 20679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20689aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 20699aebddd1SJeff Kirsher int status; 20709aebddd1SJeff Kirsher int i, j = 0; 20719aebddd1SJeff Kirsher 20729aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20739aebddd1SJeff Kirsher 20749aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20759aebddd1SJeff Kirsher if (!wrb) { 20769aebddd1SJeff Kirsher status = -EBUSY; 20779aebddd1SJeff Kirsher goto err; 20789aebddd1SJeff Kirsher } 20799aebddd1SJeff Kirsher req = cmd->va; 2080106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2081106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 20829aebddd1SJeff Kirsher 20839aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 20849aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 20859aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 20869aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 20879aebddd1SJeff Kirsher j++; 20889aebddd1SJeff Kirsher if (j > 7) 20899aebddd1SJeff Kirsher j = 0; 20909aebddd1SJeff Kirsher } 20919aebddd1SJeff Kirsher 20929aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20939aebddd1SJeff Kirsher 20949aebddd1SJeff Kirsher if (!status) { 20959aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 20969aebddd1SJeff Kirsher resp = cmd->va; 20979aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 20989aebddd1SJeff Kirsher resp->snd_err) { 20999aebddd1SJeff Kirsher status = -1; 21009aebddd1SJeff Kirsher } 21019aebddd1SJeff Kirsher } 21029aebddd1SJeff Kirsher 21039aebddd1SJeff Kirsher err: 21049aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21059aebddd1SJeff Kirsher return status; 21069aebddd1SJeff Kirsher } 21079aebddd1SJeff Kirsher 21089aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 21099aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 21109aebddd1SJeff Kirsher { 21119aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21129aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 21139aebddd1SJeff Kirsher struct be_sge *sge; 21149aebddd1SJeff Kirsher int status; 21159aebddd1SJeff Kirsher 21169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21179aebddd1SJeff Kirsher 21189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21199aebddd1SJeff Kirsher if (!wrb) { 21209aebddd1SJeff Kirsher status = -EBUSY; 21219aebddd1SJeff Kirsher goto err; 21229aebddd1SJeff Kirsher } 21239aebddd1SJeff Kirsher req = nonemb_cmd->va; 21249aebddd1SJeff Kirsher sge = nonembedded_sgl(wrb); 21259aebddd1SJeff Kirsher 2126106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2127106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2128106df1e3SSomnath Kotur nonemb_cmd); 21299aebddd1SJeff Kirsher 21309aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21319aebddd1SJeff Kirsher 21329aebddd1SJeff Kirsher err: 21339aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21349aebddd1SJeff Kirsher return status; 21359aebddd1SJeff Kirsher } 21369aebddd1SJeff Kirsher 213742f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 21389aebddd1SJeff Kirsher { 21399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21409aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 21419aebddd1SJeff Kirsher struct be_dma_mem cmd; 21429aebddd1SJeff Kirsher int status; 21439aebddd1SJeff Kirsher 21449aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21459aebddd1SJeff Kirsher 21469aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21479aebddd1SJeff Kirsher if (!wrb) { 21489aebddd1SJeff Kirsher status = -EBUSY; 21499aebddd1SJeff Kirsher goto err; 21509aebddd1SJeff Kirsher } 21519aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 21529aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 21539aebddd1SJeff Kirsher &cmd.dma); 21549aebddd1SJeff Kirsher if (!cmd.va) { 21559aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 21569aebddd1SJeff Kirsher status = -ENOMEM; 21579aebddd1SJeff Kirsher goto err; 21589aebddd1SJeff Kirsher } 21599aebddd1SJeff Kirsher 21609aebddd1SJeff Kirsher req = cmd.va; 21619aebddd1SJeff Kirsher 2162106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2163106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2164106df1e3SSomnath Kotur wrb, &cmd); 21659aebddd1SJeff Kirsher 21669aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21679aebddd1SJeff Kirsher if (!status) { 21689aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 21699aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 217042f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 217142f11cf2SAjit Khaparde adapter->phy.interface_type = 21729aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 217342f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 217442f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 217542f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 217642f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 217742f11cf2SAjit Khaparde adapter->phy.misc_params = 217842f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 21799aebddd1SJeff Kirsher } 21809aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 21819aebddd1SJeff Kirsher cmd.va, cmd.dma); 21829aebddd1SJeff Kirsher err: 21839aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21849aebddd1SJeff Kirsher return status; 21859aebddd1SJeff Kirsher } 21869aebddd1SJeff Kirsher 21879aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 21889aebddd1SJeff Kirsher { 21899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21909aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 21919aebddd1SJeff Kirsher int status; 21929aebddd1SJeff Kirsher 21939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21949aebddd1SJeff Kirsher 21959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21969aebddd1SJeff Kirsher if (!wrb) { 21979aebddd1SJeff Kirsher status = -EBUSY; 21989aebddd1SJeff Kirsher goto err; 21999aebddd1SJeff Kirsher } 22009aebddd1SJeff Kirsher 22019aebddd1SJeff Kirsher req = embedded_payload(wrb); 22029aebddd1SJeff Kirsher 2203106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2204106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 22059aebddd1SJeff Kirsher 22069aebddd1SJeff Kirsher req->hdr.domain = domain; 22079aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 22089aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 22099aebddd1SJeff Kirsher 22109aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22119aebddd1SJeff Kirsher 22129aebddd1SJeff Kirsher err: 22139aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22149aebddd1SJeff Kirsher return status; 22159aebddd1SJeff Kirsher } 22169aebddd1SJeff Kirsher 22179aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 22189aebddd1SJeff Kirsher { 22199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22209aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 22219aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 22229aebddd1SJeff Kirsher int status; 22239aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 22249aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 22259aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 22269aebddd1SJeff Kirsher 22279aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 22289aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 22299aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 22309aebddd1SJeff Kirsher &attribs_cmd.dma); 22319aebddd1SJeff Kirsher if (!attribs_cmd.va) { 22329aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 22339aebddd1SJeff Kirsher "Memory allocation failure\n"); 22349aebddd1SJeff Kirsher return -ENOMEM; 22359aebddd1SJeff Kirsher } 22369aebddd1SJeff Kirsher 22379aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 22389aebddd1SJeff Kirsher return -1; 22399aebddd1SJeff Kirsher 22409aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 22419aebddd1SJeff Kirsher if (!wrb) { 22429aebddd1SJeff Kirsher status = -EBUSY; 22439aebddd1SJeff Kirsher goto err; 22449aebddd1SJeff Kirsher } 22459aebddd1SJeff Kirsher req = attribs_cmd.va; 22469aebddd1SJeff Kirsher 2247106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2248106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2249106df1e3SSomnath Kotur &attribs_cmd); 22509aebddd1SJeff Kirsher 22519aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 22529aebddd1SJeff Kirsher if (!status) { 22539aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 22549aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 22559aebddd1SJeff Kirsher } 22569aebddd1SJeff Kirsher 22579aebddd1SJeff Kirsher err: 22589aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 22599aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, attribs_cmd.size, attribs_cmd.va, 22609aebddd1SJeff Kirsher attribs_cmd.dma); 22619aebddd1SJeff Kirsher return status; 22629aebddd1SJeff Kirsher } 22639aebddd1SJeff Kirsher 22649aebddd1SJeff Kirsher /* Uses mbox */ 22659aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 22669aebddd1SJeff Kirsher { 22679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22689aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 22699aebddd1SJeff Kirsher int status; 22709aebddd1SJeff Kirsher 22719aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 22729aebddd1SJeff Kirsher return -1; 22739aebddd1SJeff Kirsher 22749aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 22759aebddd1SJeff Kirsher if (!wrb) { 22769aebddd1SJeff Kirsher status = -EBUSY; 22779aebddd1SJeff Kirsher goto err; 22789aebddd1SJeff Kirsher } 22799aebddd1SJeff Kirsher 22809aebddd1SJeff Kirsher req = embedded_payload(wrb); 22819aebddd1SJeff Kirsher 2282106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2283106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 22849aebddd1SJeff Kirsher 22859aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 22869aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 22879aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 22889aebddd1SJeff Kirsher 22899aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 22909aebddd1SJeff Kirsher if (!status) { 22919aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 22929aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 22939aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 22949aebddd1SJeff Kirsher } 22959aebddd1SJeff Kirsher err: 22969aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 22979aebddd1SJeff Kirsher return status; 22989aebddd1SJeff Kirsher } 2299590c391dSPadmanabh Ratnakar 2300590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2301590c391dSPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u32 domain, 2302e5e1ee89SPadmanabh Ratnakar bool *pmac_id_active, u32 *pmac_id, u8 *mac) 2303590c391dSPadmanabh Ratnakar { 2304590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2305590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2306590c391dSPadmanabh Ratnakar int status; 2307590c391dSPadmanabh Ratnakar int mac_count; 2308e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2309e5e1ee89SPadmanabh Ratnakar int i; 2310e5e1ee89SPadmanabh Ratnakar 2311e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2312e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2313e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2314e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2315e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2316e5e1ee89SPadmanabh Ratnakar 2317e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2318e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2319e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2320e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2321e5e1ee89SPadmanabh Ratnakar } 2322590c391dSPadmanabh Ratnakar 2323590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2324590c391dSPadmanabh Ratnakar 2325590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2326590c391dSPadmanabh Ratnakar if (!wrb) { 2327590c391dSPadmanabh Ratnakar status = -EBUSY; 2328e5e1ee89SPadmanabh Ratnakar goto out; 2329590c391dSPadmanabh Ratnakar } 2330e5e1ee89SPadmanabh Ratnakar 2331e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2332590c391dSPadmanabh Ratnakar 2333590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2334590c391dSPadmanabh Ratnakar OPCODE_COMMON_GET_MAC_LIST, sizeof(*req), 2335e5e1ee89SPadmanabh Ratnakar wrb, &get_mac_list_cmd); 2336590c391dSPadmanabh Ratnakar 2337590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2338e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 2339e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 2340590c391dSPadmanabh Ratnakar 2341590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2342590c391dSPadmanabh Ratnakar if (!status) { 2343590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2344e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 2345e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2346e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 2347e5e1ee89SPadmanabh Ratnakar * or one or more pseudo permanant mac addresses. If an active 2348e5e1ee89SPadmanabh Ratnakar * mac_id is present, return first active mac_id found 2349e5e1ee89SPadmanabh Ratnakar */ 2350590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2351e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2352e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2353e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2354e5e1ee89SPadmanabh Ratnakar 2355e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2356e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2357e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2358e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2359e5e1ee89SPadmanabh Ratnakar */ 2360e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 2361e5e1ee89SPadmanabh Ratnakar *pmac_id_active = true; 2362e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2363e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2364e5e1ee89SPadmanabh Ratnakar goto out; 2365590c391dSPadmanabh Ratnakar } 2366590c391dSPadmanabh Ratnakar } 2367e5e1ee89SPadmanabh Ratnakar /* If no active mac_id found, return first pseudo mac addr */ 2368e5e1ee89SPadmanabh Ratnakar *pmac_id_active = false; 2369e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2370e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2371590c391dSPadmanabh Ratnakar } 2372590c391dSPadmanabh Ratnakar 2373e5e1ee89SPadmanabh Ratnakar out: 2374590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2375e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2376e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2377590c391dSPadmanabh Ratnakar return status; 2378590c391dSPadmanabh Ratnakar } 2379590c391dSPadmanabh Ratnakar 2380590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2381590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2382590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2383590c391dSPadmanabh Ratnakar { 2384590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2385590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2386590c391dSPadmanabh Ratnakar int status; 2387590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2388590c391dSPadmanabh Ratnakar 2389590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2390590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2391590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2392590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2393590c391dSPadmanabh Ratnakar if (!cmd.va) { 2394590c391dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 2395590c391dSPadmanabh Ratnakar return -ENOMEM; 2396590c391dSPadmanabh Ratnakar } 2397590c391dSPadmanabh Ratnakar 2398590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2399590c391dSPadmanabh Ratnakar 2400590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2401590c391dSPadmanabh Ratnakar if (!wrb) { 2402590c391dSPadmanabh Ratnakar status = -EBUSY; 2403590c391dSPadmanabh Ratnakar goto err; 2404590c391dSPadmanabh Ratnakar } 2405590c391dSPadmanabh Ratnakar 2406590c391dSPadmanabh Ratnakar req = cmd.va; 2407590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2408590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2409590c391dSPadmanabh Ratnakar wrb, &cmd); 2410590c391dSPadmanabh Ratnakar 2411590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2412590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2413590c391dSPadmanabh Ratnakar if (mac_count) 2414590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2415590c391dSPadmanabh Ratnakar 2416590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2417590c391dSPadmanabh Ratnakar 2418590c391dSPadmanabh Ratnakar err: 2419590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2420590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2421590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2422590c391dSPadmanabh Ratnakar return status; 2423590c391dSPadmanabh Ratnakar } 24244762f6ceSAjit Khaparde 2425f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2426f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2427f1f3ee1bSAjit Khaparde { 2428f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2429f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2430f1f3ee1bSAjit Khaparde void *ctxt; 2431f1f3ee1bSAjit Khaparde int status; 2432f1f3ee1bSAjit Khaparde 2433f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2434f1f3ee1bSAjit Khaparde 2435f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2436f1f3ee1bSAjit Khaparde if (!wrb) { 2437f1f3ee1bSAjit Khaparde status = -EBUSY; 2438f1f3ee1bSAjit Khaparde goto err; 2439f1f3ee1bSAjit Khaparde } 2440f1f3ee1bSAjit Khaparde 2441f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2442f1f3ee1bSAjit Khaparde ctxt = &req->context; 2443f1f3ee1bSAjit Khaparde 2444f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2445f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2446f1f3ee1bSAjit Khaparde 2447f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2448f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2449f1f3ee1bSAjit Khaparde if (pvid) { 2450f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2451f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2452f1f3ee1bSAjit Khaparde } 2453f1f3ee1bSAjit Khaparde 2454f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2455f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2456f1f3ee1bSAjit Khaparde 2457f1f3ee1bSAjit Khaparde err: 2458f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2459f1f3ee1bSAjit Khaparde return status; 2460f1f3ee1bSAjit Khaparde } 2461f1f3ee1bSAjit Khaparde 2462f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2463f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2464f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2465f1f3ee1bSAjit Khaparde { 2466f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2467f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2468f1f3ee1bSAjit Khaparde void *ctxt; 2469f1f3ee1bSAjit Khaparde int status; 2470f1f3ee1bSAjit Khaparde u16 vid; 2471f1f3ee1bSAjit Khaparde 2472f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2473f1f3ee1bSAjit Khaparde 2474f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2475f1f3ee1bSAjit Khaparde if (!wrb) { 2476f1f3ee1bSAjit Khaparde status = -EBUSY; 2477f1f3ee1bSAjit Khaparde goto err; 2478f1f3ee1bSAjit Khaparde } 2479f1f3ee1bSAjit Khaparde 2480f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2481f1f3ee1bSAjit Khaparde ctxt = &req->context; 2482f1f3ee1bSAjit Khaparde 2483f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2484f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2485f1f3ee1bSAjit Khaparde 2486f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2487f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, ctxt, 2488f1f3ee1bSAjit Khaparde intf_id); 2489f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2490f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2491f1f3ee1bSAjit Khaparde 2492f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2493f1f3ee1bSAjit Khaparde if (!status) { 2494f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 2495f1f3ee1bSAjit Khaparde embedded_payload(wrb); 2496f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 2497f1f3ee1bSAjit Khaparde sizeof(resp->context)); 2498f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2499f1f3ee1bSAjit Khaparde pvid, &resp->context); 2500f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 2501f1f3ee1bSAjit Khaparde } 2502f1f3ee1bSAjit Khaparde 2503f1f3ee1bSAjit Khaparde err: 2504f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2505f1f3ee1bSAjit Khaparde return status; 2506f1f3ee1bSAjit Khaparde } 2507f1f3ee1bSAjit Khaparde 25084762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 25094762f6ceSAjit Khaparde { 25104762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 25114762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 25124762f6ceSAjit Khaparde int status; 25134762f6ceSAjit Khaparde int payload_len = sizeof(*req); 25144762f6ceSAjit Khaparde struct be_dma_mem cmd; 25154762f6ceSAjit Khaparde 25164762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 25174762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 25184762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 25194762f6ceSAjit Khaparde &cmd.dma); 25204762f6ceSAjit Khaparde if (!cmd.va) { 25214762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 25224762f6ceSAjit Khaparde "Memory allocation failure\n"); 25234762f6ceSAjit Khaparde return -ENOMEM; 25244762f6ceSAjit Khaparde } 25254762f6ceSAjit Khaparde 25264762f6ceSAjit Khaparde if (mutex_lock_interruptible(&adapter->mbox_lock)) 25274762f6ceSAjit Khaparde return -1; 25284762f6ceSAjit Khaparde 25294762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 25304762f6ceSAjit Khaparde if (!wrb) { 25314762f6ceSAjit Khaparde status = -EBUSY; 25324762f6ceSAjit Khaparde goto err; 25334762f6ceSAjit Khaparde } 25344762f6ceSAjit Khaparde 25354762f6ceSAjit Khaparde req = cmd.va; 25364762f6ceSAjit Khaparde 25374762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 25384762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25394762f6ceSAjit Khaparde payload_len, wrb, &cmd); 25404762f6ceSAjit Khaparde 25414762f6ceSAjit Khaparde req->hdr.version = 1; 25424762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 25434762f6ceSAjit Khaparde 25444762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 25454762f6ceSAjit Khaparde if (!status) { 25464762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 25474762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 25484762f6ceSAjit Khaparde 25494762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 25504762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 25514762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 25524762f6ceSAjit Khaparde status = -1; 25534762f6ceSAjit Khaparde goto err; 25544762f6ceSAjit Khaparde } 25554762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 25564762f6ceSAjit Khaparde } 25574762f6ceSAjit Khaparde err: 25584762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 25594762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 25604762f6ceSAjit Khaparde return status; 25614762f6ceSAjit Khaparde } 2562