19aebddd1SJeff Kirsher /* 27dfbe7d7SSomnath Kotur * Copyright (C) 2005 - 2016 Broadcom 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 2251d1f98aSAjit Khaparde char *be_misconfig_evt_port_state[] = { 2351d1f98aSAjit Khaparde "Physical Link is functional", 2451d1f98aSAjit Khaparde "Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replace.", 2551d1f98aSAjit Khaparde "Optics of two types installed – Remove one optic or install matching pair of optics.", 2651d1f98aSAjit Khaparde "Incompatible optics – Replace with compatible optics for card to function.", 2751d1f98aSAjit Khaparde "Unqualified optics – Replace with Avago optics for Warranty and Technical Support.", 2851d1f98aSAjit Khaparde "Uncertified optics – Replace with Avago-certified optics to enable link operation." 2921252377SVasundhara Volam }; 3021252377SVasundhara Volam 3151d1f98aSAjit Khaparde static char *be_port_misconfig_evt_severity[] = { 3251d1f98aSAjit Khaparde "KERN_WARN", 3351d1f98aSAjit Khaparde "KERN_INFO", 3451d1f98aSAjit Khaparde "KERN_ERR", 3551d1f98aSAjit Khaparde "KERN_WARN" 3651d1f98aSAjit Khaparde }; 3751d1f98aSAjit Khaparde 3851d1f98aSAjit Khaparde static char *phy_state_oper_desc[] = { 3951d1f98aSAjit Khaparde "Link is non-operational", 4051d1f98aSAjit Khaparde "Link is operational", 4121252377SVasundhara Volam "" 4221252377SVasundhara Volam }; 4321252377SVasundhara Volam 44f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 45f25b119cSPadmanabh Ratnakar { 46f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 47f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 48f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 49f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 50f25b119cSPadmanabh Ratnakar }, 51f25b119cSPadmanabh Ratnakar { 52f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 53f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 54f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 55f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 56f25b119cSPadmanabh Ratnakar }, 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 59f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 60f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 61f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 62f25b119cSPadmanabh Ratnakar }, 63f25b119cSPadmanabh Ratnakar { 64f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 65f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 66f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 67f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 68f25b119cSPadmanabh Ratnakar }, 69f25b119cSPadmanabh Ratnakar { 70f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 71f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 72f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 73f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 742e365b1bSSomnath Kotur }, 752e365b1bSSomnath Kotur { 762e365b1bSSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, 772e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 782e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 792e365b1bSSomnath Kotur }, 802e365b1bSSomnath Kotur { 812e365b1bSSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, 822e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 832e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 842e365b1bSSomnath Kotur }, 852e365b1bSSomnath Kotur { 862e365b1bSSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 872e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 882e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 892e365b1bSSomnath Kotur }, 90884476beSSomnath Kotur { 91884476beSSomnath Kotur OPCODE_COMMON_SET_HSW_CONFIG, 92884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON, 93884476beSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_VHADM 94884476beSSomnath Kotur }, 95f25b119cSPadmanabh Ratnakar }; 96f25b119cSPadmanabh Ratnakar 97a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 98f25b119cSPadmanabh Ratnakar { 99f25b119cSPadmanabh Ratnakar int i; 100f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 101f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 102f25b119cSPadmanabh Ratnakar 103f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 104f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 105f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 106f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 107f25b119cSPadmanabh Ratnakar return false; 108f25b119cSPadmanabh Ratnakar 109f25b119cSPadmanabh Ratnakar return true; 110f25b119cSPadmanabh Ratnakar } 111f25b119cSPadmanabh Ratnakar 1123de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 1133de09455SSomnath Kotur { 1143de09455SSomnath Kotur return wrb->payload.embedded_payload; 1153de09455SSomnath Kotur } 1169aebddd1SJeff Kirsher 117efaa408eSSuresh Reddy static int be_mcc_notify(struct be_adapter *adapter) 1189aebddd1SJeff Kirsher { 1199aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 1209aebddd1SJeff Kirsher u32 val = 0; 1219aebddd1SJeff Kirsher 122954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 123efaa408eSSuresh Reddy return -EIO; 1249aebddd1SJeff Kirsher 1259aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 1269aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 1279aebddd1SJeff Kirsher 1289aebddd1SJeff Kirsher wmb(); 1299aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 130efaa408eSSuresh Reddy 131efaa408eSSuresh Reddy return 0; 1329aebddd1SJeff Kirsher } 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 1359aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 1369aebddd1SJeff Kirsher * little endian) */ 1379aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 1389aebddd1SJeff Kirsher { 1399e9ff4b7SSathya Perla u32 flags; 1409e9ff4b7SSathya Perla 1419aebddd1SJeff Kirsher if (compl->flags != 0) { 1429e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1439e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1449e9ff4b7SSathya Perla compl->flags = flags; 1459aebddd1SJeff Kirsher return true; 1469aebddd1SJeff Kirsher } 1479aebddd1SJeff Kirsher } 1489e9ff4b7SSathya Perla return false; 1499e9ff4b7SSathya Perla } 1509aebddd1SJeff Kirsher 1519aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1529aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1539aebddd1SJeff Kirsher { 1549aebddd1SJeff Kirsher compl->flags = 0; 1559aebddd1SJeff Kirsher } 1569aebddd1SJeff Kirsher 157652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 158652bf646SPadmanabh Ratnakar { 159652bf646SPadmanabh Ratnakar unsigned long addr; 160652bf646SPadmanabh Ratnakar 161652bf646SPadmanabh Ratnakar addr = tag1; 162652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 163652bf646SPadmanabh Ratnakar return (void *)addr; 164652bf646SPadmanabh Ratnakar } 165652bf646SPadmanabh Ratnakar 1664c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1674c60005fSKalesh AP { 1684c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1694c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1704c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 17177be8c1cSKalesh AP addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS || 1724c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1734c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1744c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1754c60005fSKalesh AP return true; 1764c60005fSKalesh AP else 1774c60005fSKalesh AP return false; 1784c60005fSKalesh AP } 1794c60005fSKalesh AP 180559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 181559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 182559b633fSSathya Perla */ 183559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 184559b633fSSathya Perla struct be_mcc_compl *compl, 185559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 186559b633fSSathya Perla { 187559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 188559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 189559b633fSSathya Perla 190559b633fSSathya Perla if (resp_hdr) { 191559b633fSSathya Perla opcode = resp_hdr->opcode; 192559b633fSSathya Perla subsystem = resp_hdr->subsystem; 193559b633fSSathya Perla } 194559b633fSSathya Perla 195559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 196559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 197559b633fSSathya Perla complete(&adapter->et_cmd_compl); 198559b633fSSathya Perla return; 199559b633fSSathya Perla } 200559b633fSSathya Perla 2019c855975SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE && 2029c855975SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 2039c855975SSuresh Reddy complete(&adapter->et_cmd_compl); 2049c855975SSuresh Reddy return; 2059c855975SSuresh Reddy } 2069c855975SSuresh Reddy 207559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 208559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 209559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 210559b633fSSathya Perla adapter->flash_status = compl->status; 211559b633fSSathya Perla complete(&adapter->et_cmd_compl); 212559b633fSSathya Perla return; 213559b633fSSathya Perla } 214559b633fSSathya Perla 215559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 216559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 217559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 218559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 219559b633fSSathya Perla be_parse_stats(adapter); 220559b633fSSathya Perla adapter->stats_cmd_sent = false; 221559b633fSSathya Perla return; 222559b633fSSathya Perla } 223559b633fSSathya Perla 224559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 225559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 226559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 227559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 228559b633fSSathya Perla (void *)resp_hdr; 22929e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 230559b633fSSathya Perla resp->on_die_temperature; 231559b633fSSathya Perla } else { 232559b633fSSathya Perla adapter->be_get_temp_freq = 0; 23329e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 23429e9122bSVenkata Duvvuru BE_INVALID_DIE_TEMP; 235559b633fSSathya Perla } 236559b633fSSathya Perla return; 237559b633fSSathya Perla } 238559b633fSSathya Perla } 239559b633fSSathya Perla 2409aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 2419aebddd1SJeff Kirsher struct be_mcc_compl *compl) 2429aebddd1SJeff Kirsher { 2434c60005fSKalesh AP enum mcc_base_status base_status; 2444c60005fSKalesh AP enum mcc_addl_status addl_status; 245652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 246652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 2479aebddd1SJeff Kirsher 2489aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 2499aebddd1SJeff Kirsher * from mcc_wrb */ 2509aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 2519aebddd1SJeff Kirsher 2524c60005fSKalesh AP base_status = base_status(compl->status); 2534c60005fSKalesh AP addl_status = addl_status(compl->status); 25496c9b2e4SVasundhara Volam 255652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 256652bf646SPadmanabh Ratnakar if (resp_hdr) { 257652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 258652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 259652bf646SPadmanabh Ratnakar } 260652bf646SPadmanabh Ratnakar 261559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2625eeff635SSuresh Reddy 263559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 264559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 265fa5c867dSSuresh Reddy if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST || 266fa5c867dSSuresh Reddy addl_status == MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES) { 26797f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 268522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 26997f1d8cdSVasundhara Volam opcode, subsystem); 2709aebddd1SJeff Kirsher } else { 27197f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 27297f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2734c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2749aebddd1SJeff Kirsher } 2759aebddd1SJeff Kirsher } 2764c60005fSKalesh AP return compl->status; 2779aebddd1SJeff Kirsher } 2789aebddd1SJeff Kirsher 2799aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2809aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2813acf19d9SSathya Perla struct be_mcc_compl *compl) 2829aebddd1SJeff Kirsher { 2833acf19d9SSathya Perla struct be_async_event_link_state *evt = 2843acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2853acf19d9SSathya Perla 286b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 28742f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 288b236916aSAjit Khaparde 289bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 290bdce2ad7SSuresh Reddy * notification for physical and logical link. 291bdce2ad7SSuresh Reddy * On other chips just process the logical link 292bdce2ad7SSuresh Reddy * status notification 293bdce2ad7SSuresh Reddy */ 294bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2952e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2962e177a5cSPadmanabh Ratnakar return; 2972e177a5cSPadmanabh Ratnakar 298b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 299b236916aSAjit Khaparde * it may not be received in some cases. 300b236916aSAjit Khaparde */ 301b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 302bdce2ad7SSuresh Reddy be_link_status_update(adapter, 303bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 3049aebddd1SJeff Kirsher } 3059aebddd1SJeff Kirsher 30621252377SVasundhara Volam static void be_async_port_misconfig_event_process(struct be_adapter *adapter, 30721252377SVasundhara Volam struct be_mcc_compl *compl) 30821252377SVasundhara Volam { 30921252377SVasundhara Volam struct be_async_event_misconfig_port *evt = 31021252377SVasundhara Volam (struct be_async_event_misconfig_port *)compl; 31151d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word1 = le32_to_cpu(evt->event_data_word1); 31251d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word2 = le32_to_cpu(evt->event_data_word2); 31351d1f98aSAjit Khaparde u8 phy_oper_state = PHY_STATE_OPER_MSG_NONE; 31421252377SVasundhara Volam struct device *dev = &adapter->pdev->dev; 31551d1f98aSAjit Khaparde u8 msg_severity = DEFAULT_MSG_SEVERITY; 31651d1f98aSAjit Khaparde u8 phy_state_info; 31751d1f98aSAjit Khaparde u8 new_phy_state; 31821252377SVasundhara Volam 31951d1f98aSAjit Khaparde new_phy_state = 32051d1f98aSAjit Khaparde (sfp_misconfig_evt_word1 >> (adapter->hba_port_num * 8)) & 0xff; 32121252377SVasundhara Volam 32251d1f98aSAjit Khaparde if (new_phy_state == adapter->phy_state) 32351d1f98aSAjit Khaparde return; 32451d1f98aSAjit Khaparde 32551d1f98aSAjit Khaparde adapter->phy_state = new_phy_state; 32651d1f98aSAjit Khaparde 32751d1f98aSAjit Khaparde /* for older fw that doesn't populate link effect data */ 32851d1f98aSAjit Khaparde if (!sfp_misconfig_evt_word2) 32951d1f98aSAjit Khaparde goto log_message; 33051d1f98aSAjit Khaparde 33151d1f98aSAjit Khaparde phy_state_info = 33251d1f98aSAjit Khaparde (sfp_misconfig_evt_word2 >> (adapter->hba_port_num * 8)) & 0xff; 33351d1f98aSAjit Khaparde 33451d1f98aSAjit Khaparde if (phy_state_info & PHY_STATE_INFO_VALID) { 33551d1f98aSAjit Khaparde msg_severity = (phy_state_info & PHY_STATE_MSG_SEVERITY) >> 1; 33651d1f98aSAjit Khaparde 33751d1f98aSAjit Khaparde if (be_phy_unqualified(new_phy_state)) 33851d1f98aSAjit Khaparde phy_oper_state = (phy_state_info & PHY_STATE_OPER); 33951d1f98aSAjit Khaparde } 34051d1f98aSAjit Khaparde 34151d1f98aSAjit Khaparde log_message: 34221252377SVasundhara Volam /* Log an error message that would allow a user to determine 34321252377SVasundhara Volam * whether the SFPs have an issue 34421252377SVasundhara Volam */ 34551d1f98aSAjit Khaparde if (be_phy_state_unknown(new_phy_state)) 34651d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 34751d1f98aSAjit Khaparde "Port %c: Unrecognized Optics state: 0x%x. %s", 34851d1f98aSAjit Khaparde adapter->port_name, 34951d1f98aSAjit Khaparde new_phy_state, 35051d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35151d1f98aSAjit Khaparde else 35251d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35351d1f98aSAjit Khaparde "Port %c: %s %s", 35451d1f98aSAjit Khaparde adapter->port_name, 35551d1f98aSAjit Khaparde be_misconfig_evt_port_state[new_phy_state], 35651d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35721252377SVasundhara Volam 35851d1f98aSAjit Khaparde /* Log Vendor name and part no. if a misconfigured SFP is detected */ 35951d1f98aSAjit Khaparde if (be_phy_misconfigured(new_phy_state)) 36051d1f98aSAjit Khaparde adapter->flags |= BE_FLAGS_PHY_MISCONFIGURED; 36121252377SVasundhara Volam } 36221252377SVasundhara Volam 3639aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 3649aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 3653acf19d9SSathya Perla struct be_mcc_compl *compl) 3669aebddd1SJeff Kirsher { 3673acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 3683acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 3693acf19d9SSathya Perla 3709aebddd1SJeff Kirsher if (evt->valid) { 3719aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 372fdf81bfbSSathya Perla adapter->recommended_prio_bits = 3739aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 3749aebddd1SJeff Kirsher } 3759aebddd1SJeff Kirsher } 3769aebddd1SJeff Kirsher 377323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 3789aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 3793acf19d9SSathya Perla struct be_mcc_compl *compl) 3809aebddd1SJeff Kirsher { 3813acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 3823acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 3833acf19d9SSathya Perla 384323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 385323ff71eSSathya Perla evt->physical_port == adapter->port_num) 386323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 3879aebddd1SJeff Kirsher } 3889aebddd1SJeff Kirsher 3899aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 3909aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 3913acf19d9SSathya Perla struct be_mcc_compl *compl) 3929aebddd1SJeff Kirsher { 3933acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 3943acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 3953acf19d9SSathya Perla 396bdac85b5SRavikumar Nelavelli if (evt->enabled) { 397939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 398bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 399bdac85b5SRavikumar Nelavelli } else { 4009aebddd1SJeff Kirsher adapter->pvid = 0; 4019aebddd1SJeff Kirsher } 402bdac85b5SRavikumar Nelavelli } 4039aebddd1SJeff Kirsher 404760c295eSVenkata Duvvuru #define MGMT_ENABLE_MASK 0x4 405760c295eSVenkata Duvvuru static void be_async_grp5_fw_control_process(struct be_adapter *adapter, 406760c295eSVenkata Duvvuru struct be_mcc_compl *compl) 407760c295eSVenkata Duvvuru { 408760c295eSVenkata Duvvuru struct be_async_fw_control *evt = (struct be_async_fw_control *)compl; 409760c295eSVenkata Duvvuru u32 evt_dw1 = le32_to_cpu(evt->event_data_word1); 410760c295eSVenkata Duvvuru 411760c295eSVenkata Duvvuru if (evt_dw1 & MGMT_ENABLE_MASK) { 412760c295eSVenkata Duvvuru adapter->flags |= BE_FLAGS_OS2BMC; 413760c295eSVenkata Duvvuru adapter->bmc_filt_mask = le32_to_cpu(evt->event_data_word2); 414760c295eSVenkata Duvvuru } else { 415760c295eSVenkata Duvvuru adapter->flags &= ~BE_FLAGS_OS2BMC; 416760c295eSVenkata Duvvuru } 417760c295eSVenkata Duvvuru } 418760c295eSVenkata Duvvuru 4199aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 4203acf19d9SSathya Perla struct be_mcc_compl *compl) 4219aebddd1SJeff Kirsher { 4223acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4233acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 4249aebddd1SJeff Kirsher 4259aebddd1SJeff Kirsher switch (event_type) { 4269aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 4273acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 4289aebddd1SJeff Kirsher break; 4299aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 4303acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 4319aebddd1SJeff Kirsher break; 4329aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 4333acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 4349aebddd1SJeff Kirsher break; 435760c295eSVenkata Duvvuru /* Async event to disable/enable os2bmc and/or mac-learning */ 436760c295eSVenkata Duvvuru case ASYNC_EVENT_FW_CONTROL: 437760c295eSVenkata Duvvuru be_async_grp5_fw_control_process(adapter, compl); 438760c295eSVenkata Duvvuru break; 4399aebddd1SJeff Kirsher default: 4409aebddd1SJeff Kirsher break; 4419aebddd1SJeff Kirsher } 4429aebddd1SJeff Kirsher } 4439aebddd1SJeff Kirsher 444bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 4453acf19d9SSathya Perla struct be_mcc_compl *cmp) 446bc0c3405SAjit Khaparde { 447bc0c3405SAjit Khaparde u8 event_type = 0; 448bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 449bc0c3405SAjit Khaparde 4503acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4513acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 452bc0c3405SAjit Khaparde 453bc0c3405SAjit Khaparde switch (event_type) { 454bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 455bc0c3405SAjit Khaparde if (evt->valid) 456bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 457bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 458bc0c3405SAjit Khaparde break; 459bc0c3405SAjit Khaparde default: 46005ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 46105ccaa2bSVasundhara Volam event_type); 462bc0c3405SAjit Khaparde break; 463bc0c3405SAjit Khaparde } 464bc0c3405SAjit Khaparde } 465bc0c3405SAjit Khaparde 46621252377SVasundhara Volam static void be_async_sliport_evt_process(struct be_adapter *adapter, 46721252377SVasundhara Volam struct be_mcc_compl *cmp) 46821252377SVasundhara Volam { 46921252377SVasundhara Volam u8 event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 47021252377SVasundhara Volam ASYNC_EVENT_TYPE_MASK; 47121252377SVasundhara Volam 47221252377SVasundhara Volam if (event_type == ASYNC_EVENT_PORT_MISCONFIG) 47321252377SVasundhara Volam be_async_port_misconfig_event_process(adapter, cmp); 47421252377SVasundhara Volam } 47521252377SVasundhara Volam 4763acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 4779aebddd1SJeff Kirsher { 4783acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4799aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 4809aebddd1SJeff Kirsher } 4819aebddd1SJeff Kirsher 4823acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 4839aebddd1SJeff Kirsher { 4843acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4853acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 4869aebddd1SJeff Kirsher } 4879aebddd1SJeff Kirsher 4883acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 489bc0c3405SAjit Khaparde { 4903acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4913acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 4923acf19d9SSathya Perla } 4933acf19d9SSathya Perla 49421252377SVasundhara Volam static inline bool is_sliport_evt(u32 flags) 49521252377SVasundhara Volam { 49621252377SVasundhara Volam return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 49721252377SVasundhara Volam ASYNC_EVENT_CODE_SLIPORT; 49821252377SVasundhara Volam } 49921252377SVasundhara Volam 5003acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 5013acf19d9SSathya Perla struct be_mcc_compl *compl) 5023acf19d9SSathya Perla { 5033acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 5043acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 5053acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 5063acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 5073acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 5083acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 50921252377SVasundhara Volam else if (is_sliport_evt(compl->flags)) 51021252377SVasundhara Volam be_async_sliport_evt_process(adapter, compl); 511bc0c3405SAjit Khaparde } 512bc0c3405SAjit Khaparde 5139aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 5149aebddd1SJeff Kirsher { 5159aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 5169aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 5179aebddd1SJeff Kirsher 5189aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5199aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 5209aebddd1SJeff Kirsher return compl; 5219aebddd1SJeff Kirsher } 5229aebddd1SJeff Kirsher return NULL; 5239aebddd1SJeff Kirsher } 5249aebddd1SJeff Kirsher 5259aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 5269aebddd1SJeff Kirsher { 5279aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 5289aebddd1SJeff Kirsher 5299aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 5309aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 5319aebddd1SJeff Kirsher 5329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 5339aebddd1SJeff Kirsher } 5349aebddd1SJeff Kirsher 5359aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 5369aebddd1SJeff Kirsher { 537a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 538a323d9bfSSathya Perla 5399aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 540a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 541a323d9bfSSathya Perla 542a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 5439aebddd1SJeff Kirsher } 5449aebddd1SJeff Kirsher 54510ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 5469aebddd1SJeff Kirsher { 5479aebddd1SJeff Kirsher struct be_mcc_compl *compl; 54810ef9ab4SSathya Perla int num = 0, status = 0; 5499aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5509aebddd1SJeff Kirsher 551072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 5523acf19d9SSathya Perla 5539aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 5549aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 5553acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 5569aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 55710ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 5589aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 5599aebddd1SJeff Kirsher } 5609aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5619aebddd1SJeff Kirsher num++; 5629aebddd1SJeff Kirsher } 5639aebddd1SJeff Kirsher 56410ef9ab4SSathya Perla if (num) 56510ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 56610ef9ab4SSathya Perla 567072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 56810ef9ab4SSathya Perla return status; 5699aebddd1SJeff Kirsher } 5709aebddd1SJeff Kirsher 5719aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 5729aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 5739aebddd1SJeff Kirsher { 574b7172414SSathya Perla #define mcc_timeout 12000 /* 12s timeout */ 57510ef9ab4SSathya Perla int i, status = 0; 5769aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5779aebddd1SJeff Kirsher 5786589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 579954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 5809aebddd1SJeff Kirsher return -EIO; 5819aebddd1SJeff Kirsher 582072a9c48SAmerigo Wang local_bh_disable(); 58310ef9ab4SSathya Perla status = be_process_mcc(adapter); 584072a9c48SAmerigo Wang local_bh_enable(); 5859aebddd1SJeff Kirsher 5869aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 5879aebddd1SJeff Kirsher break; 588b7172414SSathya Perla usleep_range(500, 1000); 5899aebddd1SJeff Kirsher } 5909aebddd1SJeff Kirsher if (i == mcc_timeout) { 5916589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 592954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 593652bf646SPadmanabh Ratnakar return -EIO; 5949aebddd1SJeff Kirsher } 5959aebddd1SJeff Kirsher return status; 5969aebddd1SJeff Kirsher } 5979aebddd1SJeff Kirsher 5989aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 5999aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 6009aebddd1SJeff Kirsher { 601652bf646SPadmanabh Ratnakar int status; 602652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 603652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 604b0fd2eb2Sajit.khaparde@broadcom.com u32 index = mcc_obj->q.head; 605652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 606652bf646SPadmanabh Ratnakar 607652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 608652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 609652bf646SPadmanabh Ratnakar 610652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 611652bf646SPadmanabh Ratnakar 612efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 613efaa408eSSuresh Reddy if (status) 614efaa408eSSuresh Reddy goto out; 615652bf646SPadmanabh Ratnakar 616652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 617652bf646SPadmanabh Ratnakar if (status == -EIO) 618652bf646SPadmanabh Ratnakar goto out; 619652bf646SPadmanabh Ratnakar 6204c60005fSKalesh AP status = (resp->base_status | 6214c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 6224c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 623652bf646SPadmanabh Ratnakar out: 624652bf646SPadmanabh Ratnakar return status; 6259aebddd1SJeff Kirsher } 6269aebddd1SJeff Kirsher 6279aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 6289aebddd1SJeff Kirsher { 6299aebddd1SJeff Kirsher int msecs = 0; 6309aebddd1SJeff Kirsher u32 ready; 6319aebddd1SJeff Kirsher 6326589ade0SSathya Perla do { 633954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 6349aebddd1SJeff Kirsher return -EIO; 6359aebddd1SJeff Kirsher 6369aebddd1SJeff Kirsher ready = ioread32(db); 637434b3648SSathya Perla if (ready == 0xffffffff) 6389aebddd1SJeff Kirsher return -1; 6399aebddd1SJeff Kirsher 6409aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 6419aebddd1SJeff Kirsher if (ready) 6429aebddd1SJeff Kirsher break; 6439aebddd1SJeff Kirsher 6449aebddd1SJeff Kirsher if (msecs > 4000) { 6456589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 646954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 647f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 6489aebddd1SJeff Kirsher return -1; 6499aebddd1SJeff Kirsher } 6509aebddd1SJeff Kirsher 6519aebddd1SJeff Kirsher msleep(1); 6529aebddd1SJeff Kirsher msecs++; 6539aebddd1SJeff Kirsher } while (true); 6549aebddd1SJeff Kirsher 6559aebddd1SJeff Kirsher return 0; 6569aebddd1SJeff Kirsher } 6579aebddd1SJeff Kirsher 6589aebddd1SJeff Kirsher /* 6599aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 6609aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 6619aebddd1SJeff Kirsher */ 6629aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 6639aebddd1SJeff Kirsher { 6649aebddd1SJeff Kirsher int status; 6659aebddd1SJeff Kirsher u32 val = 0; 6669aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 6679aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6689aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 6699aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 6709aebddd1SJeff Kirsher 6719aebddd1SJeff Kirsher /* wait for ready to be set */ 6729aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6739aebddd1SJeff Kirsher if (status != 0) 6749aebddd1SJeff Kirsher return status; 6759aebddd1SJeff Kirsher 6769aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 6779aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 6789aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 6799aebddd1SJeff Kirsher iowrite32(val, db); 6809aebddd1SJeff Kirsher 6819aebddd1SJeff Kirsher /* wait for ready to be set */ 6829aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6839aebddd1SJeff Kirsher if (status != 0) 6849aebddd1SJeff Kirsher return status; 6859aebddd1SJeff Kirsher 6869aebddd1SJeff Kirsher val = 0; 6879aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 6889aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 6899aebddd1SJeff Kirsher iowrite32(val, db); 6909aebddd1SJeff Kirsher 6919aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6929aebddd1SJeff Kirsher if (status != 0) 6939aebddd1SJeff Kirsher return status; 6949aebddd1SJeff Kirsher 6959aebddd1SJeff Kirsher /* A cq entry has been made now */ 6969aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 6979aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 6989aebddd1SJeff Kirsher be_mcc_compl_use(compl); 6999aebddd1SJeff Kirsher if (status) 7009aebddd1SJeff Kirsher return status; 7019aebddd1SJeff Kirsher } else { 7029aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 7039aebddd1SJeff Kirsher return -1; 7049aebddd1SJeff Kirsher } 7059aebddd1SJeff Kirsher return 0; 7069aebddd1SJeff Kirsher } 7079aebddd1SJeff Kirsher 708c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 7099aebddd1SJeff Kirsher { 7109aebddd1SJeff Kirsher u32 sem; 7119aebddd1SJeff Kirsher 712c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 713c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 7149aebddd1SJeff Kirsher else 715c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 716c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 717c5b3ad4cSSathya Perla 718c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 7199aebddd1SJeff Kirsher } 7209aebddd1SJeff Kirsher 72187f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 722bf99e50dSPadmanabh Ratnakar { 723bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 724bf99e50dSPadmanabh Ratnakar u32 sliport_status; 725e673244aSKalesh AP int i; 726bf99e50dSPadmanabh Ratnakar 727bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 728bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 729bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 7309fa465c0SSathya Perla return 0; 7319fa465c0SSathya Perla 7329fa465c0SSathya Perla if (sliport_status & SLIPORT_STATUS_ERR_MASK && 7339fa465c0SSathya Perla !(sliport_status & SLIPORT_STATUS_RN_MASK)) 7349fa465c0SSathya Perla return -EIO; 735bf99e50dSPadmanabh Ratnakar 736bf99e50dSPadmanabh Ratnakar msleep(1000); 737bf99e50dSPadmanabh Ratnakar } 738bf99e50dSPadmanabh Ratnakar 739e673244aSKalesh AP return sliport_status ? : -1; 740bf99e50dSPadmanabh Ratnakar } 741bf99e50dSPadmanabh Ratnakar 742bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 7439aebddd1SJeff Kirsher { 7449aebddd1SJeff Kirsher u16 stage; 7459aebddd1SJeff Kirsher int status, timeout = 0; 7469aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 7479aebddd1SJeff Kirsher 748bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 749bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 750e673244aSKalesh AP if (status) { 751e673244aSKalesh AP stage = status; 752e673244aSKalesh AP goto err; 753e673244aSKalesh AP } 754e673244aSKalesh AP return 0; 755bf99e50dSPadmanabh Ratnakar } 756bf99e50dSPadmanabh Ratnakar 7579aebddd1SJeff Kirsher do { 758ca3de6b2SSathya Perla /* There's no means to poll POST state on BE2/3 VFs */ 759ca3de6b2SSathya Perla if (BEx_chip(adapter) && be_virtfn(adapter)) 760ca3de6b2SSathya Perla return 0; 761ca3de6b2SSathya Perla 762c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 76366d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 76466d29cbcSGavin Shan return 0; 76566d29cbcSGavin Shan 766a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 7679aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 7689aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 7699aebddd1SJeff Kirsher return -EINTR; 7709aebddd1SJeff Kirsher } 7719aebddd1SJeff Kirsher timeout += 2; 7723ab81b5fSSomnath Kotur } while (timeout < 60); 7739aebddd1SJeff Kirsher 774e673244aSKalesh AP err: 775e673244aSKalesh AP dev_err(dev, "POST timeout; stage=%#x\n", stage); 7769fa465c0SSathya Perla return -ETIMEDOUT; 7779aebddd1SJeff Kirsher } 7789aebddd1SJeff Kirsher 7799aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 7809aebddd1SJeff Kirsher { 7819aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 7829aebddd1SJeff Kirsher } 7839aebddd1SJeff Kirsher 784a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 785bea50988SSathya Perla { 786bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 787bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 788bea50988SSathya Perla } 7899aebddd1SJeff Kirsher 7909aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 791106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 792106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 793106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 794a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 795a2cc4e0bSSathya Perla struct be_dma_mem *mem) 7969aebddd1SJeff Kirsher { 797106df1e3SSomnath Kotur struct be_sge *sge; 798106df1e3SSomnath Kotur 7999aebddd1SJeff Kirsher req_hdr->opcode = opcode; 8009aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 8019aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 8029aebddd1SJeff Kirsher req_hdr->version = 0; 803bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 804106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 805106df1e3SSomnath Kotur if (mem) { 806106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 807106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 808106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 809106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 810106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 811106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 812106df1e3SSomnath Kotur } else 813106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 814106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 8159aebddd1SJeff Kirsher } 8169aebddd1SJeff Kirsher 8179aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 8189aebddd1SJeff Kirsher struct be_dma_mem *mem) 8199aebddd1SJeff Kirsher { 8209aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 8219aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 8229aebddd1SJeff Kirsher 8239aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 8249aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 8259aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 8269aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 8279aebddd1SJeff Kirsher } 8289aebddd1SJeff Kirsher } 8299aebddd1SJeff Kirsher 8309aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 8319aebddd1SJeff Kirsher { 8329aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 8339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 8349aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 8359aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8369aebddd1SJeff Kirsher return wrb; 8379aebddd1SJeff Kirsher } 8389aebddd1SJeff Kirsher 8399aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 8409aebddd1SJeff Kirsher { 8419aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 8429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8439aebddd1SJeff Kirsher 844aa790db9SPadmanabh Ratnakar if (!mccq->created) 845aa790db9SPadmanabh Ratnakar return NULL; 846aa790db9SPadmanabh Ratnakar 8474d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 8489aebddd1SJeff Kirsher return NULL; 8499aebddd1SJeff Kirsher 8509aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 8519aebddd1SJeff Kirsher queue_head_inc(mccq); 8529aebddd1SJeff Kirsher atomic_inc(&mccq->used); 8539aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8549aebddd1SJeff Kirsher return wrb; 8559aebddd1SJeff Kirsher } 8569aebddd1SJeff Kirsher 857bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 858bea50988SSathya Perla { 859bea50988SSathya Perla return adapter->mcc_obj.q.created; 860bea50988SSathya Perla } 861bea50988SSathya Perla 862bea50988SSathya Perla /* Must be used only in process context */ 863bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 864bea50988SSathya Perla { 865bea50988SSathya Perla if (use_mcc(adapter)) { 866b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 867bea50988SSathya Perla return 0; 868bea50988SSathya Perla } else { 869bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 870bea50988SSathya Perla } 871bea50988SSathya Perla } 872bea50988SSathya Perla 873bea50988SSathya Perla /* Must be used only in process context */ 874bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 875bea50988SSathya Perla { 876bea50988SSathya Perla if (use_mcc(adapter)) 877b7172414SSathya Perla return mutex_unlock(&adapter->mcc_lock); 878bea50988SSathya Perla else 879bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 880bea50988SSathya Perla } 881bea50988SSathya Perla 882bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 883bea50988SSathya Perla struct be_mcc_wrb *wrb) 884bea50988SSathya Perla { 885bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 886bea50988SSathya Perla 887bea50988SSathya Perla if (use_mcc(adapter)) { 888bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 889bea50988SSathya Perla if (!dest_wrb) 890bea50988SSathya Perla return NULL; 891bea50988SSathya Perla } else { 892bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 893bea50988SSathya Perla } 894bea50988SSathya Perla 895bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 896bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 897bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 898bea50988SSathya Perla 899bea50988SSathya Perla return dest_wrb; 900bea50988SSathya Perla } 901bea50988SSathya Perla 902bea50988SSathya Perla /* Must be used only in process context */ 903bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 904bea50988SSathya Perla struct be_mcc_wrb *wrb) 905bea50988SSathya Perla { 906bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 907bea50988SSathya Perla int status; 908bea50988SSathya Perla 909bea50988SSathya Perla status = be_cmd_lock(adapter); 910bea50988SSathya Perla if (status) 911bea50988SSathya Perla return status; 912bea50988SSathya Perla 913bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 9140c884567SSuresh Reddy if (!dest_wrb) { 9150c884567SSuresh Reddy status = -EBUSY; 9160c884567SSuresh Reddy goto unlock; 9170c884567SSuresh Reddy } 918bea50988SSathya Perla 919bea50988SSathya Perla if (use_mcc(adapter)) 920bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 921bea50988SSathya Perla else 922bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 923bea50988SSathya Perla 924bea50988SSathya Perla if (!status) 925bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 926bea50988SSathya Perla 9270c884567SSuresh Reddy unlock: 928bea50988SSathya Perla be_cmd_unlock(adapter); 929bea50988SSathya Perla return status; 930bea50988SSathya Perla } 931bea50988SSathya Perla 9329aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 9339aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9349aebddd1SJeff Kirsher */ 9359aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 9369aebddd1SJeff Kirsher { 9379aebddd1SJeff Kirsher u8 *wrb; 9389aebddd1SJeff Kirsher int status; 9399aebddd1SJeff Kirsher 940bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 941bf99e50dSPadmanabh Ratnakar return 0; 942bf99e50dSPadmanabh Ratnakar 9439aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9449aebddd1SJeff Kirsher return -1; 9459aebddd1SJeff Kirsher 9469aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9479aebddd1SJeff Kirsher *wrb++ = 0xFF; 9489aebddd1SJeff Kirsher *wrb++ = 0x12; 9499aebddd1SJeff Kirsher *wrb++ = 0x34; 9509aebddd1SJeff Kirsher *wrb++ = 0xFF; 9519aebddd1SJeff Kirsher *wrb++ = 0xFF; 9529aebddd1SJeff Kirsher *wrb++ = 0x56; 9539aebddd1SJeff Kirsher *wrb++ = 0x78; 9549aebddd1SJeff Kirsher *wrb = 0xFF; 9559aebddd1SJeff Kirsher 9569aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9579aebddd1SJeff Kirsher 9589aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9599aebddd1SJeff Kirsher return status; 9609aebddd1SJeff Kirsher } 9619aebddd1SJeff Kirsher 9629aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 9639aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9649aebddd1SJeff Kirsher */ 9659aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 9669aebddd1SJeff Kirsher { 9679aebddd1SJeff Kirsher u8 *wrb; 9689aebddd1SJeff Kirsher int status; 9699aebddd1SJeff Kirsher 970bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 971bf99e50dSPadmanabh Ratnakar return 0; 972bf99e50dSPadmanabh Ratnakar 9739aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9749aebddd1SJeff Kirsher return -1; 9759aebddd1SJeff Kirsher 9769aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9779aebddd1SJeff Kirsher *wrb++ = 0xFF; 9789aebddd1SJeff Kirsher *wrb++ = 0xAA; 9799aebddd1SJeff Kirsher *wrb++ = 0xBB; 9809aebddd1SJeff Kirsher *wrb++ = 0xFF; 9819aebddd1SJeff Kirsher *wrb++ = 0xFF; 9829aebddd1SJeff Kirsher *wrb++ = 0xCC; 9839aebddd1SJeff Kirsher *wrb++ = 0xDD; 9849aebddd1SJeff Kirsher *wrb = 0xFF; 9859aebddd1SJeff Kirsher 9869aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9879aebddd1SJeff Kirsher 9889aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9899aebddd1SJeff Kirsher return status; 9909aebddd1SJeff Kirsher } 991bf99e50dSPadmanabh Ratnakar 992f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 9939aebddd1SJeff Kirsher { 9949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9959aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 996f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 997f2f781a7SSathya Perla int status, ver = 0; 9989aebddd1SJeff Kirsher 9999aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10009aebddd1SJeff Kirsher return -1; 10019aebddd1SJeff Kirsher 10029aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10039aebddd1SJeff Kirsher req = embedded_payload(wrb); 10049aebddd1SJeff Kirsher 1005106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1006a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 1007a2cc4e0bSSathya Perla NULL); 10089aebddd1SJeff Kirsher 1009f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 1010f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 1011f2f781a7SSathya Perla ver = 2; 1012f2f781a7SSathya Perla 1013f2f781a7SSathya Perla req->hdr.version = ver; 10149aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10159aebddd1SJeff Kirsher 10169aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 10179aebddd1SJeff Kirsher /* 4byte eqe*/ 10189aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 10199aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 1020f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 10219aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 10229aebddd1SJeff Kirsher 10239aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10249aebddd1SJeff Kirsher 10259aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10269aebddd1SJeff Kirsher if (!status) { 10279aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 102803d28ffeSKalesh AP 1029f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 1030f2f781a7SSathya Perla eqo->msix_idx = 1031f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 1032f2f781a7SSathya Perla eqo->q.created = true; 10339aebddd1SJeff Kirsher } 10349aebddd1SJeff Kirsher 10359aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10369aebddd1SJeff Kirsher return status; 10379aebddd1SJeff Kirsher } 10389aebddd1SJeff Kirsher 1039f9449ab7SSathya Perla /* Use MCC */ 10409aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 10415ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 10429aebddd1SJeff Kirsher { 10439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10449aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 10459aebddd1SJeff Kirsher int status; 10469aebddd1SJeff Kirsher 1047b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10489aebddd1SJeff Kirsher 1049f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1050f9449ab7SSathya Perla if (!wrb) { 1051f9449ab7SSathya Perla status = -EBUSY; 1052f9449ab7SSathya Perla goto err; 1053f9449ab7SSathya Perla } 10549aebddd1SJeff Kirsher req = embedded_payload(wrb); 10559aebddd1SJeff Kirsher 1056106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1057a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 1058a2cc4e0bSSathya Perla NULL); 10595ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 10609aebddd1SJeff Kirsher if (permanent) { 10619aebddd1SJeff Kirsher req->permanent = 1; 10629aebddd1SJeff Kirsher } else { 10639aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 1064590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 10659aebddd1SJeff Kirsher req->permanent = 0; 10669aebddd1SJeff Kirsher } 10679aebddd1SJeff Kirsher 1068f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 10699aebddd1SJeff Kirsher if (!status) { 10709aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 107103d28ffeSKalesh AP 10729aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 10739aebddd1SJeff Kirsher } 10749aebddd1SJeff Kirsher 1075f9449ab7SSathya Perla err: 1076b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 10779aebddd1SJeff Kirsher return status; 10789aebddd1SJeff Kirsher } 10799aebddd1SJeff Kirsher 10809aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 10819aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 10829aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 10839aebddd1SJeff Kirsher { 10849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10859aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 10869aebddd1SJeff Kirsher int status; 10879aebddd1SJeff Kirsher 1088b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10899aebddd1SJeff Kirsher 10909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10919aebddd1SJeff Kirsher if (!wrb) { 10929aebddd1SJeff Kirsher status = -EBUSY; 10939aebddd1SJeff Kirsher goto err; 10949aebddd1SJeff Kirsher } 10959aebddd1SJeff Kirsher req = embedded_payload(wrb); 10969aebddd1SJeff Kirsher 1097106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1098a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 1099a2cc4e0bSSathya Perla NULL); 11009aebddd1SJeff Kirsher 11019aebddd1SJeff Kirsher req->hdr.domain = domain; 11029aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11039aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 11049aebddd1SJeff Kirsher 11059aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11069aebddd1SJeff Kirsher if (!status) { 11079aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 110803d28ffeSKalesh AP 11099aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11109aebddd1SJeff Kirsher } 11119aebddd1SJeff Kirsher 11129aebddd1SJeff Kirsher err: 1113b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1114e3a7ae2cSSomnath Kotur 1115e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 1116e3a7ae2cSSomnath Kotur status = -EPERM; 1117e3a7ae2cSSomnath Kotur 11189aebddd1SJeff Kirsher return status; 11199aebddd1SJeff Kirsher } 11209aebddd1SJeff Kirsher 11219aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 112230128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 11239aebddd1SJeff Kirsher { 11249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11259aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 11269aebddd1SJeff Kirsher int status; 11279aebddd1SJeff Kirsher 112830128031SSathya Perla if (pmac_id == -1) 112930128031SSathya Perla return 0; 113030128031SSathya Perla 1131b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 11329aebddd1SJeff Kirsher 11339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11349aebddd1SJeff Kirsher if (!wrb) { 11359aebddd1SJeff Kirsher status = -EBUSY; 11369aebddd1SJeff Kirsher goto err; 11379aebddd1SJeff Kirsher } 11389aebddd1SJeff Kirsher req = embedded_payload(wrb); 11399aebddd1SJeff Kirsher 1140106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1141cd3307aaSKalesh AP OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), 1142cd3307aaSKalesh AP wrb, NULL); 11439aebddd1SJeff Kirsher 11449aebddd1SJeff Kirsher req->hdr.domain = dom; 11459aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11469aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 11479aebddd1SJeff Kirsher 11489aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher err: 1151b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 11529aebddd1SJeff Kirsher return status; 11539aebddd1SJeff Kirsher } 11549aebddd1SJeff Kirsher 11559aebddd1SJeff Kirsher /* Uses Mbox */ 115610ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 115710ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 11589aebddd1SJeff Kirsher { 11599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11609aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 11619aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 11629aebddd1SJeff Kirsher void *ctxt; 11639aebddd1SJeff Kirsher int status; 11649aebddd1SJeff Kirsher 11659aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11669aebddd1SJeff Kirsher return -1; 11679aebddd1SJeff Kirsher 11689aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11699aebddd1SJeff Kirsher req = embedded_payload(wrb); 11709aebddd1SJeff Kirsher ctxt = &req->context; 11719aebddd1SJeff Kirsher 1172106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1173a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1174a2cc4e0bSSathya Perla NULL); 11759aebddd1SJeff Kirsher 11769aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1177bbdc42f8SAjit Khaparde 1178bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 11799aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 11809aebddd1SJeff Kirsher coalesce_wm); 11819aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 11829aebddd1SJeff Kirsher ctxt, no_delay); 11839aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 11849aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 11859aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 11869aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 11879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1188bbdc42f8SAjit Khaparde } else { 1189bbdc42f8SAjit Khaparde req->hdr.version = 2; 1190bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 119109e83a9dSAjit Khaparde 119209e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 119309e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 119409e83a9dSAjit Khaparde */ 119509e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 119609e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 119709e83a9dSAjit Khaparde ctxt, coalesce_wm); 1198bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1199bbdc42f8SAjit Khaparde no_delay); 1200bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1201bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1202bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1203a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1204a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 12059aebddd1SJeff Kirsher } 12069aebddd1SJeff Kirsher 12079aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12089aebddd1SJeff Kirsher 12099aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12129aebddd1SJeff Kirsher if (!status) { 12139aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 121403d28ffeSKalesh AP 12159aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 12169aebddd1SJeff Kirsher cq->created = true; 12179aebddd1SJeff Kirsher } 12189aebddd1SJeff Kirsher 12199aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12209aebddd1SJeff Kirsher 12219aebddd1SJeff Kirsher return status; 12229aebddd1SJeff Kirsher } 12239aebddd1SJeff Kirsher 12249aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 12259aebddd1SJeff Kirsher { 12269aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 122703d28ffeSKalesh AP 12289aebddd1SJeff Kirsher if (len_encoded == 16) 12299aebddd1SJeff Kirsher len_encoded = 0; 12309aebddd1SJeff Kirsher return len_encoded; 12319aebddd1SJeff Kirsher } 12329aebddd1SJeff Kirsher 12334188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 12349aebddd1SJeff Kirsher struct be_queue_info *mccq, 12359aebddd1SJeff Kirsher struct be_queue_info *cq) 12369aebddd1SJeff Kirsher { 12379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12389aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 12399aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 12409aebddd1SJeff Kirsher void *ctxt; 12419aebddd1SJeff Kirsher int status; 12429aebddd1SJeff Kirsher 12439aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12449aebddd1SJeff Kirsher return -1; 12459aebddd1SJeff Kirsher 12469aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12479aebddd1SJeff Kirsher req = embedded_payload(wrb); 12489aebddd1SJeff Kirsher ctxt = &req->context; 12499aebddd1SJeff Kirsher 1250106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1251a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1252a2cc4e0bSSathya Perla NULL); 12539aebddd1SJeff Kirsher 12549aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1255666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 12569aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12579aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12589aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12599aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1260666d39c7SVasundhara Volam } else { 1261666d39c7SVasundhara Volam req->hdr.version = 1; 1262666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1263666d39c7SVasundhara Volam 1264666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1265666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1266666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1267666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1268666d39c7SVasundhara Volam ctxt, cq->id); 1269666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1270666d39c7SVasundhara Volam ctxt, 1); 12719aebddd1SJeff Kirsher } 12729aebddd1SJeff Kirsher 127321252377SVasundhara Volam /* Subscribe to Link State, Sliport Event and Group 5 Events 127421252377SVasundhara Volam * (bits 1, 5 and 17 set) 127521252377SVasundhara Volam */ 127621252377SVasundhara Volam req->async_event_bitmap[0] = 127721252377SVasundhara Volam cpu_to_le32(BIT(ASYNC_EVENT_CODE_LINK_STATE) | 127821252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_GRP_5) | 127921252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_QNQ) | 128021252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_SLIPORT)); 128121252377SVasundhara Volam 12829aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12839aebddd1SJeff Kirsher 12849aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12859aebddd1SJeff Kirsher 12869aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12879aebddd1SJeff Kirsher if (!status) { 12889aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 128903d28ffeSKalesh AP 12909aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12919aebddd1SJeff Kirsher mccq->created = true; 12929aebddd1SJeff Kirsher } 12939aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12949aebddd1SJeff Kirsher 12959aebddd1SJeff Kirsher return status; 12969aebddd1SJeff Kirsher } 12979aebddd1SJeff Kirsher 12984188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 12999aebddd1SJeff Kirsher struct be_queue_info *mccq, 13009aebddd1SJeff Kirsher struct be_queue_info *cq) 13019aebddd1SJeff Kirsher { 13029aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13039aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 13049aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 13059aebddd1SJeff Kirsher void *ctxt; 13069aebddd1SJeff Kirsher int status; 13079aebddd1SJeff Kirsher 13089aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13099aebddd1SJeff Kirsher return -1; 13109aebddd1SJeff Kirsher 13119aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13129aebddd1SJeff Kirsher req = embedded_payload(wrb); 13139aebddd1SJeff Kirsher ctxt = &req->context; 13149aebddd1SJeff Kirsher 1315106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1316a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1317a2cc4e0bSSathya Perla NULL); 13189aebddd1SJeff Kirsher 13199aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 13229aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 13239aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 13249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 13259aebddd1SJeff Kirsher 13269aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 13279aebddd1SJeff Kirsher 13289aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13299aebddd1SJeff Kirsher 13309aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13319aebddd1SJeff Kirsher if (!status) { 13329aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 133303d28ffeSKalesh AP 13349aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 13359aebddd1SJeff Kirsher mccq->created = true; 13369aebddd1SJeff Kirsher } 13379aebddd1SJeff Kirsher 13389aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13399aebddd1SJeff Kirsher return status; 13409aebddd1SJeff Kirsher } 13419aebddd1SJeff Kirsher 13429aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1343a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 13449aebddd1SJeff Kirsher { 13459aebddd1SJeff Kirsher int status; 13469aebddd1SJeff Kirsher 13479aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1348666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 13499aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 13509aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 13519aebddd1SJeff Kirsher "and FCoE traffic"); 13529aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 13539aebddd1SJeff Kirsher } 13549aebddd1SJeff Kirsher return status; 13559aebddd1SJeff Kirsher } 13569aebddd1SJeff Kirsher 135794d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 13589aebddd1SJeff Kirsher { 13597707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 13609aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 136194d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 136294d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 13639aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 136494d73aaaSVasundhara Volam int status, ver = 0; 13659aebddd1SJeff Kirsher 13667707133cSSathya Perla req = embedded_payload(&wrb); 1367106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 13687707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 13699aebddd1SJeff Kirsher 13709aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 13719aebddd1SJeff Kirsher req->hdr.version = 1; 137294d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 137394d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 137494d73aaaSVasundhara Volam req->hdr.version = 2; 137594d73aaaSVasundhara Volam } else { /* For SH */ 137694d73aaaSVasundhara Volam req->hdr.version = 2; 13779aebddd1SJeff Kirsher } 13789aebddd1SJeff Kirsher 137981b02655SVasundhara Volam if (req->hdr.version > 0) 138081b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 13819aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 13829aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 13839aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 138494d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 138594d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 13869aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 138794d73aaaSVasundhara Volam ver = req->hdr.version; 138894d73aaaSVasundhara Volam 13897707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13909aebddd1SJeff Kirsher if (!status) { 13917707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 139203d28ffeSKalesh AP 13939aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 139494d73aaaSVasundhara Volam if (ver == 2) 139594d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 139694d73aaaSVasundhara Volam else 139794d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 13989aebddd1SJeff Kirsher txq->created = true; 13999aebddd1SJeff Kirsher } 14009aebddd1SJeff Kirsher 14019aebddd1SJeff Kirsher return status; 14029aebddd1SJeff Kirsher } 14039aebddd1SJeff Kirsher 14049aebddd1SJeff Kirsher /* Uses MCC */ 14059aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 14069aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 140710ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 14089aebddd1SJeff Kirsher { 14099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14109aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 14119aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 14129aebddd1SJeff Kirsher int status; 14139aebddd1SJeff Kirsher 1414b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 14159aebddd1SJeff Kirsher 14169aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14179aebddd1SJeff Kirsher if (!wrb) { 14189aebddd1SJeff Kirsher status = -EBUSY; 14199aebddd1SJeff Kirsher goto err; 14209aebddd1SJeff Kirsher } 14219aebddd1SJeff Kirsher req = embedded_payload(wrb); 14229aebddd1SJeff Kirsher 1423106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1424106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 14259aebddd1SJeff Kirsher 14269aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 14279aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 14289aebddd1SJeff Kirsher req->num_pages = 2; 14299aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 14309aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 143110ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 14329aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 14339aebddd1SJeff Kirsher 14349aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14359aebddd1SJeff Kirsher if (!status) { 14369aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 143703d28ffeSKalesh AP 14389aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 14399aebddd1SJeff Kirsher rxq->created = true; 14409aebddd1SJeff Kirsher *rss_id = resp->rss_id; 14419aebddd1SJeff Kirsher } 14429aebddd1SJeff Kirsher 14439aebddd1SJeff Kirsher err: 1444b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 14459aebddd1SJeff Kirsher return status; 14469aebddd1SJeff Kirsher } 14479aebddd1SJeff Kirsher 14489aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 14499aebddd1SJeff Kirsher * Uses Mbox 14509aebddd1SJeff Kirsher */ 14519aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 14529aebddd1SJeff Kirsher int queue_type) 14539aebddd1SJeff Kirsher { 14549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14559aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 14569aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 14579aebddd1SJeff Kirsher int status; 14589aebddd1SJeff Kirsher 14599aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 14609aebddd1SJeff Kirsher return -1; 14619aebddd1SJeff Kirsher 14629aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 14639aebddd1SJeff Kirsher req = embedded_payload(wrb); 14649aebddd1SJeff Kirsher 14659aebddd1SJeff Kirsher switch (queue_type) { 14669aebddd1SJeff Kirsher case QTYPE_EQ: 14679aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14689aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 14699aebddd1SJeff Kirsher break; 14709aebddd1SJeff Kirsher case QTYPE_CQ: 14719aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14729aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 14739aebddd1SJeff Kirsher break; 14749aebddd1SJeff Kirsher case QTYPE_TXQ: 14759aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14769aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 14779aebddd1SJeff Kirsher break; 14789aebddd1SJeff Kirsher case QTYPE_RXQ: 14799aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14809aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 14819aebddd1SJeff Kirsher break; 14829aebddd1SJeff Kirsher case QTYPE_MCCQ: 14839aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14849aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 14859aebddd1SJeff Kirsher break; 14869aebddd1SJeff Kirsher default: 14879aebddd1SJeff Kirsher BUG(); 14889aebddd1SJeff Kirsher } 14899aebddd1SJeff Kirsher 1490106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1491106df1e3SSomnath Kotur NULL); 14929aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14939aebddd1SJeff Kirsher 14949aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 14959aebddd1SJeff Kirsher q->created = false; 14969aebddd1SJeff Kirsher 14979aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 14989aebddd1SJeff Kirsher return status; 14999aebddd1SJeff Kirsher } 15009aebddd1SJeff Kirsher 15019aebddd1SJeff Kirsher /* Uses MCC */ 15029aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 15039aebddd1SJeff Kirsher { 15049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15059aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 15069aebddd1SJeff Kirsher int status; 15079aebddd1SJeff Kirsher 1508b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15099aebddd1SJeff Kirsher 15109aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15119aebddd1SJeff Kirsher if (!wrb) { 15129aebddd1SJeff Kirsher status = -EBUSY; 15139aebddd1SJeff Kirsher goto err; 15149aebddd1SJeff Kirsher } 15159aebddd1SJeff Kirsher req = embedded_payload(wrb); 15169aebddd1SJeff Kirsher 1517106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1518106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 15199aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 15209aebddd1SJeff Kirsher 15219aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15229aebddd1SJeff Kirsher q->created = false; 15239aebddd1SJeff Kirsher 15249aebddd1SJeff Kirsher err: 1525b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 15269aebddd1SJeff Kirsher return status; 15279aebddd1SJeff Kirsher } 15289aebddd1SJeff Kirsher 15299aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1530bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 15319aebddd1SJeff Kirsher */ 15329aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 15331578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 15349aebddd1SJeff Kirsher { 1535bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 15369aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 15379aebddd1SJeff Kirsher int status; 15389aebddd1SJeff Kirsher 1539bea50988SSathya Perla req = embedded_payload(&wrb); 1540106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1541a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1542a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 15439aebddd1SJeff Kirsher req->hdr.domain = domain; 15449aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 15459aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1546f9449ab7SSathya Perla req->pmac_invalid = true; 15479aebddd1SJeff Kirsher 1548bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 15499aebddd1SJeff Kirsher if (!status) { 1550bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 155103d28ffeSKalesh AP 15529aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1553b5bb9776SSathya Perla 1554b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 155518c57c74SKalesh AP if (BE3_chip(adapter) && be_virtfn(adapter)) 1556b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 15579aebddd1SJeff Kirsher } 15589aebddd1SJeff Kirsher return status; 15599aebddd1SJeff Kirsher } 15609aebddd1SJeff Kirsher 156162219066SAjit Khaparde /* Uses MCCQ if available else MBOX */ 156230128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 15639aebddd1SJeff Kirsher { 156462219066SAjit Khaparde struct be_mcc_wrb wrb = {0}; 15659aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 15669aebddd1SJeff Kirsher int status; 15679aebddd1SJeff Kirsher 156830128031SSathya Perla if (interface_id == -1) 1569f9449ab7SSathya Perla return 0; 15709aebddd1SJeff Kirsher 157162219066SAjit Khaparde req = embedded_payload(&wrb); 15729aebddd1SJeff Kirsher 1573106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1574a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 157562219066SAjit Khaparde sizeof(*req), &wrb, NULL); 15769aebddd1SJeff Kirsher req->hdr.domain = domain; 15779aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 15789aebddd1SJeff Kirsher 157962219066SAjit Khaparde status = be_cmd_notify_wait(adapter, &wrb); 15809aebddd1SJeff Kirsher return status; 15819aebddd1SJeff Kirsher } 15829aebddd1SJeff Kirsher 15839aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 15849aebddd1SJeff Kirsher * WRB but is a separate dma memory block 15859aebddd1SJeff Kirsher * Uses asynchronous MCC 15869aebddd1SJeff Kirsher */ 15879aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 15889aebddd1SJeff Kirsher { 15899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15909aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 15919aebddd1SJeff Kirsher int status = 0; 15929aebddd1SJeff Kirsher 1593b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15949aebddd1SJeff Kirsher 15959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15969aebddd1SJeff Kirsher if (!wrb) { 15979aebddd1SJeff Kirsher status = -EBUSY; 15989aebddd1SJeff Kirsher goto err; 15999aebddd1SJeff Kirsher } 16009aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 16019aebddd1SJeff Kirsher 1602106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1603a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1604a2cc4e0bSSathya Perla nonemb_cmd); 16059aebddd1SJeff Kirsher 1606ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 160761000861SAjit Khaparde if (BE2_chip(adapter)) 160861000861SAjit Khaparde hdr->version = 0; 160961000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 16109aebddd1SJeff Kirsher hdr->version = 1; 161161000861SAjit Khaparde else 161261000861SAjit Khaparde hdr->version = 2; 16139aebddd1SJeff Kirsher 1614efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1615efaa408eSSuresh Reddy if (status) 1616efaa408eSSuresh Reddy goto err; 1617efaa408eSSuresh Reddy 16189aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16199aebddd1SJeff Kirsher 16209aebddd1SJeff Kirsher err: 1621b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16229aebddd1SJeff Kirsher return status; 16239aebddd1SJeff Kirsher } 16249aebddd1SJeff Kirsher 16259aebddd1SJeff Kirsher /* Lancer Stats */ 16269aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 16279aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 16289aebddd1SJeff Kirsher { 16299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16309aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 16319aebddd1SJeff Kirsher int status = 0; 16329aebddd1SJeff Kirsher 1633f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1634f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1635f25b119cSPadmanabh Ratnakar return -EPERM; 1636f25b119cSPadmanabh Ratnakar 1637b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16389aebddd1SJeff Kirsher 16399aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16409aebddd1SJeff Kirsher if (!wrb) { 16419aebddd1SJeff Kirsher status = -EBUSY; 16429aebddd1SJeff Kirsher goto err; 16439aebddd1SJeff Kirsher } 16449aebddd1SJeff Kirsher req = nonemb_cmd->va; 16459aebddd1SJeff Kirsher 1646106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1647a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1648a2cc4e0bSSathya Perla wrb, nonemb_cmd); 16499aebddd1SJeff Kirsher 1650d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 16519aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 16529aebddd1SJeff Kirsher 1653efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1654efaa408eSSuresh Reddy if (status) 1655efaa408eSSuresh Reddy goto err; 1656efaa408eSSuresh Reddy 16579aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16589aebddd1SJeff Kirsher 16599aebddd1SJeff Kirsher err: 1660b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16619aebddd1SJeff Kirsher return status; 16629aebddd1SJeff Kirsher } 16639aebddd1SJeff Kirsher 1664323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1665323ff71eSSathya Perla { 1666323ff71eSSathya Perla switch (mac_speed) { 1667323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1668323ff71eSSathya Perla return 0; 1669323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1670323ff71eSSathya Perla return 10; 1671323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1672323ff71eSSathya Perla return 100; 1673323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1674323ff71eSSathya Perla return 1000; 1675323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1676323ff71eSSathya Perla return 10000; 1677b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1678b971f847SVasundhara Volam return 20000; 1679b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1680b971f847SVasundhara Volam return 25000; 1681b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1682b971f847SVasundhara Volam return 40000; 1683323ff71eSSathya Perla } 1684323ff71eSSathya Perla return 0; 1685323ff71eSSathya Perla } 1686323ff71eSSathya Perla 1687323ff71eSSathya Perla /* Uses synchronous mcc 1688323ff71eSSathya Perla * Returns link_speed in Mbps 1689323ff71eSSathya Perla */ 1690323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1691323ff71eSSathya Perla u8 *link_status, u32 dom) 16929aebddd1SJeff Kirsher { 16939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16949aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 16959aebddd1SJeff Kirsher int status; 16969aebddd1SJeff Kirsher 1697b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16989aebddd1SJeff Kirsher 1699b236916aSAjit Khaparde if (link_status) 1700b236916aSAjit Khaparde *link_status = LINK_DOWN; 1701b236916aSAjit Khaparde 17029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17039aebddd1SJeff Kirsher if (!wrb) { 17049aebddd1SJeff Kirsher status = -EBUSY; 17059aebddd1SJeff Kirsher goto err; 17069aebddd1SJeff Kirsher } 17079aebddd1SJeff Kirsher req = embedded_payload(wrb); 17089aebddd1SJeff Kirsher 170957cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1710a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1711a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 171257cd80d4SPadmanabh Ratnakar 1713ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1714ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1715daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1716daad6167SPadmanabh Ratnakar 171757cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 17189aebddd1SJeff Kirsher 17199aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17209aebddd1SJeff Kirsher if (!status) { 17219aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 172203d28ffeSKalesh AP 1723323ff71eSSathya Perla if (link_speed) { 1724323ff71eSSathya Perla *link_speed = resp->link_speed ? 1725323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1726323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1727323ff71eSSathya Perla 1728323ff71eSSathya Perla if (!resp->logical_link_status) 1729323ff71eSSathya Perla *link_speed = 0; 17309aebddd1SJeff Kirsher } 1731b236916aSAjit Khaparde if (link_status) 1732b236916aSAjit Khaparde *link_status = resp->logical_link_status; 17339aebddd1SJeff Kirsher } 17349aebddd1SJeff Kirsher 17359aebddd1SJeff Kirsher err: 1736b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17379aebddd1SJeff Kirsher return status; 17389aebddd1SJeff Kirsher } 17399aebddd1SJeff Kirsher 17409aebddd1SJeff Kirsher /* Uses synchronous mcc */ 17419aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 17429aebddd1SJeff Kirsher { 17439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17449aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1745117affe3SVasundhara Volam int status = 0; 17469aebddd1SJeff Kirsher 1747b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17489aebddd1SJeff Kirsher 17499aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17509aebddd1SJeff Kirsher if (!wrb) { 17519aebddd1SJeff Kirsher status = -EBUSY; 17529aebddd1SJeff Kirsher goto err; 17539aebddd1SJeff Kirsher } 17549aebddd1SJeff Kirsher req = embedded_payload(wrb); 17559aebddd1SJeff Kirsher 1756106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1757a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1758a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 17599aebddd1SJeff Kirsher 1760efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 17619aebddd1SJeff Kirsher err: 1762b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17639aebddd1SJeff Kirsher return status; 17649aebddd1SJeff Kirsher } 17659aebddd1SJeff Kirsher 17669aebddd1SJeff Kirsher /* Uses synchronous mcc */ 1767fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size) 17689aebddd1SJeff Kirsher { 1769fd7ff6f0SVenkat Duvvuru struct be_mcc_wrb wrb = {0}; 17709aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17719aebddd1SJeff Kirsher int status; 17729aebddd1SJeff Kirsher 1773fd7ff6f0SVenkat Duvvuru req = embedded_payload(&wrb); 17749aebddd1SJeff Kirsher 1775106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1776fd7ff6f0SVenkat Duvvuru OPCODE_COMMON_MANAGE_FAT, sizeof(*req), 1777fd7ff6f0SVenkat Duvvuru &wrb, NULL); 17789aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 1779fd7ff6f0SVenkat Duvvuru status = be_cmd_notify_wait(adapter, &wrb); 17809aebddd1SJeff Kirsher if (!status) { 1781fd7ff6f0SVenkat Duvvuru struct be_cmd_resp_get_fat *resp = embedded_payload(&wrb); 178203d28ffeSKalesh AP 1783fd7ff6f0SVenkat Duvvuru if (dump_size && resp->log_size) 1784fd7ff6f0SVenkat Duvvuru *dump_size = le32_to_cpu(resp->log_size) - 17859aebddd1SJeff Kirsher sizeof(u32); 17869aebddd1SJeff Kirsher } 17879aebddd1SJeff Kirsher return status; 17889aebddd1SJeff Kirsher } 17899aebddd1SJeff Kirsher 1790fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf) 17919aebddd1SJeff Kirsher { 17929aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 17939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17949aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17959aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 17969aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1797fd7ff6f0SVenkat Duvvuru int status; 17989aebddd1SJeff Kirsher 17999aebddd1SJeff Kirsher if (buf_len == 0) 1800fd7ff6f0SVenkat Duvvuru return 0; 18019aebddd1SJeff Kirsher 18029aebddd1SJeff Kirsher total_size = buf_len; 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1805e51000dbSSriharsha Basavapatna get_fat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 18069aebddd1SJeff Kirsher get_fat_cmd.size, 1807e51000dbSSriharsha Basavapatna &get_fat_cmd.dma, GFP_ATOMIC); 1808fd7ff6f0SVenkat Duvvuru if (!get_fat_cmd.va) 1809c5f156deSVasundhara Volam return -ENOMEM; 18109aebddd1SJeff Kirsher 1811b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18129aebddd1SJeff Kirsher 18139aebddd1SJeff Kirsher while (total_size) { 18149aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 18159aebddd1SJeff Kirsher total_size -= buf_size; 18169aebddd1SJeff Kirsher 18179aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18189aebddd1SJeff Kirsher if (!wrb) { 18199aebddd1SJeff Kirsher status = -EBUSY; 18209aebddd1SJeff Kirsher goto err; 18219aebddd1SJeff Kirsher } 18229aebddd1SJeff Kirsher req = get_fat_cmd.va; 18239aebddd1SJeff Kirsher 18249aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1825106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1826a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1827a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 18289aebddd1SJeff Kirsher 18299aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 18309aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 18319aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 18329aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 18339aebddd1SJeff Kirsher 18349aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18359aebddd1SJeff Kirsher if (!status) { 18369aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 183703d28ffeSKalesh AP 18389aebddd1SJeff Kirsher memcpy(buf + offset, 18399aebddd1SJeff Kirsher resp->data_buffer, 184092aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 18419aebddd1SJeff Kirsher } else { 18429aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 18439aebddd1SJeff Kirsher goto err; 18449aebddd1SJeff Kirsher } 18459aebddd1SJeff Kirsher offset += buf_size; 18469aebddd1SJeff Kirsher log_offset += buf_size; 18479aebddd1SJeff Kirsher } 18489aebddd1SJeff Kirsher err: 1849e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_fat_cmd.size, 1850a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 1851b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1852c5f156deSVasundhara Volam return status; 18539aebddd1SJeff Kirsher } 18549aebddd1SJeff Kirsher 185504b71175SSathya Perla /* Uses synchronous mcc */ 1856e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 18579aebddd1SJeff Kirsher { 18589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18599aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 18609aebddd1SJeff Kirsher int status; 18619aebddd1SJeff Kirsher 1862b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18639aebddd1SJeff Kirsher 186404b71175SSathya Perla wrb = wrb_from_mccq(adapter); 186504b71175SSathya Perla if (!wrb) { 186604b71175SSathya Perla status = -EBUSY; 186704b71175SSathya Perla goto err; 186804b71175SSathya Perla } 186904b71175SSathya Perla 18709aebddd1SJeff Kirsher req = embedded_payload(wrb); 18719aebddd1SJeff Kirsher 1872106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1873a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1874a2cc4e0bSSathya Perla NULL); 187504b71175SSathya Perla status = be_mcc_notify_wait(adapter); 18769aebddd1SJeff Kirsher if (!status) { 18779aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1878acbafeb1SSathya Perla 1879242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1880242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1881242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1882242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 18839aebddd1SJeff Kirsher } 188404b71175SSathya Perla err: 1885b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 18869aebddd1SJeff Kirsher return status; 18879aebddd1SJeff Kirsher } 18889aebddd1SJeff Kirsher 18899aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 18909aebddd1SJeff Kirsher * Uses async mcc 18919aebddd1SJeff Kirsher */ 1892b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1893b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 18949aebddd1SJeff Kirsher { 18959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18969aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 18972632bafdSSathya Perla int status = 0, i; 18989aebddd1SJeff Kirsher 1899b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19009aebddd1SJeff Kirsher 19019aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19029aebddd1SJeff Kirsher if (!wrb) { 19039aebddd1SJeff Kirsher status = -EBUSY; 19049aebddd1SJeff Kirsher goto err; 19059aebddd1SJeff Kirsher } 19069aebddd1SJeff Kirsher req = embedded_payload(wrb); 19079aebddd1SJeff Kirsher 1908106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1909a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1910a2cc4e0bSSathya Perla NULL); 19119aebddd1SJeff Kirsher 19122632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 19132632bafdSSathya Perla for (i = 0; i < num; i++) { 19142632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 19152632bafdSSathya Perla req->set_eqd[i].phase = 0; 19162632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 19172632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 19182632bafdSSathya Perla } 19199aebddd1SJeff Kirsher 1920efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 19219aebddd1SJeff Kirsher err: 1922b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19239aebddd1SJeff Kirsher return status; 19249aebddd1SJeff Kirsher } 19259aebddd1SJeff Kirsher 192693676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 192793676703SKalesh AP int num) 192893676703SKalesh AP { 192993676703SKalesh AP int num_eqs, i = 0; 193093676703SKalesh AP 193193676703SKalesh AP while (num) { 193293676703SKalesh AP num_eqs = min(num, 8); 193393676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 193493676703SKalesh AP i += num_eqs; 193593676703SKalesh AP num -= num_eqs; 193693676703SKalesh AP } 193793676703SKalesh AP 193893676703SKalesh AP return 0; 193993676703SKalesh AP } 194093676703SKalesh AP 19419aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 19429aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1943435452aaSVasundhara Volam u32 num, u32 domain) 19449aebddd1SJeff Kirsher { 19459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19469aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 19479aebddd1SJeff Kirsher int status; 19489aebddd1SJeff Kirsher 1949b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19509aebddd1SJeff Kirsher 19519aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19529aebddd1SJeff Kirsher if (!wrb) { 19539aebddd1SJeff Kirsher status = -EBUSY; 19549aebddd1SJeff Kirsher goto err; 19559aebddd1SJeff Kirsher } 19569aebddd1SJeff Kirsher req = embedded_payload(wrb); 19579aebddd1SJeff Kirsher 1958106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1959a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1960a2cc4e0bSSathya Perla wrb, NULL); 1961435452aaSVasundhara Volam req->hdr.domain = domain; 19629aebddd1SJeff Kirsher 19639aebddd1SJeff Kirsher req->interface_id = if_id; 1964012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 19659aebddd1SJeff Kirsher req->num_vlan = num; 19669aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 19679aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 19689aebddd1SJeff Kirsher 19699aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19709aebddd1SJeff Kirsher err: 1971b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19729aebddd1SJeff Kirsher return status; 19739aebddd1SJeff Kirsher } 19749aebddd1SJeff Kirsher 1975ac34b743SSathya Perla static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 19769aebddd1SJeff Kirsher { 19779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19789aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 19799aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 19809aebddd1SJeff Kirsher int status; 19819aebddd1SJeff Kirsher 1982b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19839aebddd1SJeff Kirsher 19849aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19859aebddd1SJeff Kirsher if (!wrb) { 19869aebddd1SJeff Kirsher status = -EBUSY; 19879aebddd1SJeff Kirsher goto err; 19889aebddd1SJeff Kirsher } 19899aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1990106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1991106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1992106df1e3SSomnath Kotur wrb, mem); 19939aebddd1SJeff Kirsher 19949aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1995ac34b743SSathya Perla req->if_flags_mask = cpu_to_le32(flags); 1996ac34b743SSathya Perla req->if_flags = (value == ON) ? req->if_flags_mask : 0; 1997d9d604f8SAjit Khaparde 1998ac34b743SSathya Perla if (flags & BE_IF_FLAGS_MULTICAST) { 1999b7172414SSathya Perla int i; 20009aebddd1SJeff Kirsher 20011610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 20021610c79fSPadmanabh Ratnakar * and not setting flags field 20031610c79fSPadmanabh Ratnakar */ 20041610c79fSPadmanabh Ratnakar req->if_flags_mask |= 2005abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 200692bf14abSSathya Perla be_if_cap_flags(adapter)); 2007b7172414SSathya Perla req->mcast_num = cpu_to_le32(adapter->mc_count); 2008b7172414SSathya Perla for (i = 0; i < adapter->mc_count; i++) 2009b7172414SSathya Perla ether_addr_copy(req->mcast_mac[i].byte, 2010b7172414SSathya Perla adapter->mc_list[i].mac); 20119aebddd1SJeff Kirsher } 20129aebddd1SJeff Kirsher 2013b6588879SSathya Perla status = be_mcc_notify_wait(adapter); 20149aebddd1SJeff Kirsher err: 2015b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 20169aebddd1SJeff Kirsher return status; 20179aebddd1SJeff Kirsher } 20189aebddd1SJeff Kirsher 2019ac34b743SSathya Perla int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 2020ac34b743SSathya Perla { 2021ac34b743SSathya Perla struct device *dev = &adapter->pdev->dev; 2022ac34b743SSathya Perla 2023ac34b743SSathya Perla if ((flags & be_if_cap_flags(adapter)) != flags) { 2024ac34b743SSathya Perla dev_warn(dev, "Cannot set rx filter flags 0x%x\n", flags); 2025ac34b743SSathya Perla dev_warn(dev, "Interface is capable of 0x%x flags only\n", 2026ac34b743SSathya Perla be_if_cap_flags(adapter)); 2027ac34b743SSathya Perla } 2028ac34b743SSathya Perla flags &= be_if_cap_flags(adapter); 2029196e3735SKalesh AP if (!flags) 2030196e3735SKalesh AP return -ENOTSUPP; 2031ac34b743SSathya Perla 2032ac34b743SSathya Perla return __be_cmd_rx_filter(adapter, flags, value); 2033ac34b743SSathya Perla } 2034ac34b743SSathya Perla 20359aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 20369aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 20379aebddd1SJeff Kirsher { 20389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20399aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 20409aebddd1SJeff Kirsher int status; 20419aebddd1SJeff Kirsher 2042f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 2043f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2044f25b119cSPadmanabh Ratnakar return -EPERM; 2045f25b119cSPadmanabh Ratnakar 2046b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20479aebddd1SJeff Kirsher 20489aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20499aebddd1SJeff Kirsher if (!wrb) { 20509aebddd1SJeff Kirsher status = -EBUSY; 20519aebddd1SJeff Kirsher goto err; 20529aebddd1SJeff Kirsher } 20539aebddd1SJeff Kirsher req = embedded_payload(wrb); 20549aebddd1SJeff Kirsher 2055106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2056a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 2057a2cc4e0bSSathya Perla wrb, NULL); 20589aebddd1SJeff Kirsher 2059b29812c1SSuresh Reddy req->hdr.version = 1; 20609aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 20619aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 20629aebddd1SJeff Kirsher 20639aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20649aebddd1SJeff Kirsher 20659aebddd1SJeff Kirsher err: 2066b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2067b29812c1SSuresh Reddy 2068b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 2069b29812c1SSuresh Reddy return -EOPNOTSUPP; 2070b29812c1SSuresh Reddy 20719aebddd1SJeff Kirsher return status; 20729aebddd1SJeff Kirsher } 20739aebddd1SJeff Kirsher 20749aebddd1SJeff Kirsher /* Uses sycn mcc */ 20759aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 20769aebddd1SJeff Kirsher { 20779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20789aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20799aebddd1SJeff Kirsher int status; 20809aebddd1SJeff Kirsher 2081f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2082f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2083f25b119cSPadmanabh Ratnakar return -EPERM; 2084f25b119cSPadmanabh Ratnakar 2085b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20869aebddd1SJeff Kirsher 20879aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20889aebddd1SJeff Kirsher if (!wrb) { 20899aebddd1SJeff Kirsher status = -EBUSY; 20909aebddd1SJeff Kirsher goto err; 20919aebddd1SJeff Kirsher } 20929aebddd1SJeff Kirsher req = embedded_payload(wrb); 20939aebddd1SJeff Kirsher 2094106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2095a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2096a2cc4e0bSSathya Perla wrb, NULL); 20979aebddd1SJeff Kirsher 20989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20999aebddd1SJeff Kirsher if (!status) { 21009aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 21019aebddd1SJeff Kirsher embedded_payload(wrb); 210203d28ffeSKalesh AP 21039aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 21049aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 21059aebddd1SJeff Kirsher } 21069aebddd1SJeff Kirsher 21079aebddd1SJeff Kirsher err: 2108b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 21099aebddd1SJeff Kirsher return status; 21109aebddd1SJeff Kirsher } 21119aebddd1SJeff Kirsher 21129aebddd1SJeff Kirsher /* Uses mbox */ 2113e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 21149aebddd1SJeff Kirsher { 21159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21169aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 21179aebddd1SJeff Kirsher int status; 21189aebddd1SJeff Kirsher 21199aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21209aebddd1SJeff Kirsher return -1; 21219aebddd1SJeff Kirsher 21229aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21239aebddd1SJeff Kirsher req = embedded_payload(wrb); 21249aebddd1SJeff Kirsher 2125106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2126a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2127a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21289aebddd1SJeff Kirsher 21299aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21309aebddd1SJeff Kirsher if (!status) { 21319aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 213203d28ffeSKalesh AP 2133e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2134e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2135e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2136e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2137acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2138acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2139acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 21409aebddd1SJeff Kirsher } 21419aebddd1SJeff Kirsher 21429aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21439aebddd1SJeff Kirsher return status; 21449aebddd1SJeff Kirsher } 21459aebddd1SJeff Kirsher 21469aebddd1SJeff Kirsher /* Uses mbox */ 21479aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 21489aebddd1SJeff Kirsher { 21499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21509aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 21519aebddd1SJeff Kirsher int status; 21529aebddd1SJeff Kirsher 2153bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2154bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2155bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 21569fa465c0SSathya Perla status = lancer_wait_ready(adapter); 21579fa465c0SSathya Perla if (status) 2158bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2159bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2160bf99e50dSPadmanabh Ratnakar return status; 2161bf99e50dSPadmanabh Ratnakar } 2162bf99e50dSPadmanabh Ratnakar 21639aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21649aebddd1SJeff Kirsher return -1; 21659aebddd1SJeff Kirsher 21669aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21679aebddd1SJeff Kirsher req = embedded_payload(wrb); 21689aebddd1SJeff Kirsher 2169106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2170a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2171a2cc4e0bSSathya Perla NULL); 21729aebddd1SJeff Kirsher 21739aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21749aebddd1SJeff Kirsher 21759aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21769aebddd1SJeff Kirsher return status; 21779aebddd1SJeff Kirsher } 21789aebddd1SJeff Kirsher 2179594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 218033cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21819aebddd1SJeff Kirsher { 21829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21839aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21849aebddd1SJeff Kirsher int status; 21859aebddd1SJeff Kirsher 2186da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2187da1388d6SVasundhara Volam return 0; 2188da1388d6SVasundhara Volam 2189b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 21909aebddd1SJeff Kirsher 2191b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2192b51aa367SKalesh AP if (!wrb) { 2193b51aa367SKalesh AP status = -EBUSY; 2194b51aa367SKalesh AP goto err; 2195b51aa367SKalesh AP } 21969aebddd1SJeff Kirsher req = embedded_payload(wrb); 21979aebddd1SJeff Kirsher 2198106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2199106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 22009aebddd1SJeff Kirsher 22019aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2202594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 22039aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2204594ad54aSSuresh Reddy 2205b51aa367SKalesh AP if (!BEx_chip(adapter)) 2206594ad54aSSuresh Reddy req->hdr.version = 1; 2207594ad54aSSuresh Reddy 22089aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2209e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 22109aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 22119aebddd1SJeff Kirsher 2212b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2213b51aa367SKalesh AP err: 2214b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22159aebddd1SJeff Kirsher return status; 22169aebddd1SJeff Kirsher } 22179aebddd1SJeff Kirsher 22189aebddd1SJeff Kirsher /* Uses sync mcc */ 22199aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 22209aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 22219aebddd1SJeff Kirsher { 22229aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22239aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 22249aebddd1SJeff Kirsher int status; 22259aebddd1SJeff Kirsher 2226b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22279aebddd1SJeff Kirsher 22289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22299aebddd1SJeff Kirsher if (!wrb) { 22309aebddd1SJeff Kirsher status = -EBUSY; 22319aebddd1SJeff Kirsher goto err; 22329aebddd1SJeff Kirsher } 22339aebddd1SJeff Kirsher req = embedded_payload(wrb); 22349aebddd1SJeff Kirsher 2235106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2236a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2237a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 22389aebddd1SJeff Kirsher 22399aebddd1SJeff Kirsher req->port_num = port_num; 22409aebddd1SJeff Kirsher req->beacon_state = state; 22419aebddd1SJeff Kirsher req->beacon_duration = bcn; 22429aebddd1SJeff Kirsher req->status_duration = sts; 22439aebddd1SJeff Kirsher 22449aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22459aebddd1SJeff Kirsher 22469aebddd1SJeff Kirsher err: 2247b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22489aebddd1SJeff Kirsher return status; 22499aebddd1SJeff Kirsher } 22509aebddd1SJeff Kirsher 22519aebddd1SJeff Kirsher /* Uses sync mcc */ 22529aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 22539aebddd1SJeff Kirsher { 22549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22559aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 22569aebddd1SJeff Kirsher int status; 22579aebddd1SJeff Kirsher 2258b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22599aebddd1SJeff Kirsher 22609aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22619aebddd1SJeff Kirsher if (!wrb) { 22629aebddd1SJeff Kirsher status = -EBUSY; 22639aebddd1SJeff Kirsher goto err; 22649aebddd1SJeff Kirsher } 22659aebddd1SJeff Kirsher req = embedded_payload(wrb); 22669aebddd1SJeff Kirsher 2267106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2268a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2269a2cc4e0bSSathya Perla wrb, NULL); 22709aebddd1SJeff Kirsher 22719aebddd1SJeff Kirsher req->port_num = port_num; 22729aebddd1SJeff Kirsher 22739aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22749aebddd1SJeff Kirsher if (!status) { 22759aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22769aebddd1SJeff Kirsher embedded_payload(wrb); 227703d28ffeSKalesh AP 22789aebddd1SJeff Kirsher *state = resp->beacon_state; 22799aebddd1SJeff Kirsher } 22809aebddd1SJeff Kirsher 22819aebddd1SJeff Kirsher err: 2282b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22839aebddd1SJeff Kirsher return status; 22849aebddd1SJeff Kirsher } 22859aebddd1SJeff Kirsher 2286e36edd9dSMark Leonard /* Uses sync mcc */ 2287e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2288e36edd9dSMark Leonard u8 page_num, u8 *data) 2289e36edd9dSMark Leonard { 2290e36edd9dSMark Leonard struct be_dma_mem cmd; 2291e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2292e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2293e36edd9dSMark Leonard int status; 2294e36edd9dSMark Leonard 2295e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2296e36edd9dSMark Leonard return -EINVAL; 2297e36edd9dSMark Leonard 2298e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2299e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 2300e51000dbSSriharsha Basavapatna GFP_ATOMIC); 2301e36edd9dSMark Leonard if (!cmd.va) { 2302e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2303e36edd9dSMark Leonard return -ENOMEM; 2304e36edd9dSMark Leonard } 2305e36edd9dSMark Leonard 2306b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2307e36edd9dSMark Leonard 2308e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2309e36edd9dSMark Leonard if (!wrb) { 2310e36edd9dSMark Leonard status = -EBUSY; 2311e36edd9dSMark Leonard goto err; 2312e36edd9dSMark Leonard } 2313e36edd9dSMark Leonard req = cmd.va; 2314e36edd9dSMark Leonard 2315e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2316e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2317e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2318e36edd9dSMark Leonard 2319e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2320e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2321e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2322e36edd9dSMark Leonard if (!status) { 2323e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2324e36edd9dSMark Leonard 2325e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2326e36edd9dSMark Leonard } 2327e36edd9dSMark Leonard err: 2328b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2329e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2330e36edd9dSMark Leonard return status; 2331e36edd9dSMark Leonard } 2332e36edd9dSMark Leonard 2333a23113b5SSuresh Reddy static int lancer_cmd_write_object(struct be_adapter *adapter, 2334a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 data_size, 2335a23113b5SSuresh Reddy u32 data_offset, const char *obj_name, 2336a23113b5SSuresh Reddy u32 *data_written, u8 *change_status, 2337a23113b5SSuresh Reddy u8 *addn_status) 23389aebddd1SJeff Kirsher { 23399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23409aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 23419aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 23429aebddd1SJeff Kirsher void *ctxt = NULL; 23439aebddd1SJeff Kirsher int status; 23449aebddd1SJeff Kirsher 2345b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 23469aebddd1SJeff Kirsher adapter->flash_status = 0; 23479aebddd1SJeff Kirsher 23489aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23499aebddd1SJeff Kirsher if (!wrb) { 23509aebddd1SJeff Kirsher status = -EBUSY; 23519aebddd1SJeff Kirsher goto err_unlock; 23529aebddd1SJeff Kirsher } 23539aebddd1SJeff Kirsher 23549aebddd1SJeff Kirsher req = embedded_payload(wrb); 23559aebddd1SJeff Kirsher 2356106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 23579aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2358106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2359106df1e3SSomnath Kotur NULL); 23609aebddd1SJeff Kirsher 23619aebddd1SJeff Kirsher ctxt = &req->context; 23629aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23639aebddd1SJeff Kirsher write_length, ctxt, data_size); 23649aebddd1SJeff Kirsher 23659aebddd1SJeff Kirsher if (data_size == 0) 23669aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23679aebddd1SJeff Kirsher eof, ctxt, 1); 23689aebddd1SJeff Kirsher else 23699aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23709aebddd1SJeff Kirsher eof, ctxt, 0); 23719aebddd1SJeff Kirsher 23729aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 23739aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2374242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23759aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23769aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23779aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23789aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23799aebddd1SJeff Kirsher & 0xFFFFFFFF); 23809aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23819aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23829aebddd1SJeff Kirsher 2383efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2384efaa408eSSuresh Reddy if (status) 2385efaa408eSSuresh Reddy goto err_unlock; 2386efaa408eSSuresh Reddy 2387b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 23889aebddd1SJeff Kirsher 23895eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2390701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2391fd45160cSKalesh AP status = -ETIMEDOUT; 23929aebddd1SJeff Kirsher else 23939aebddd1SJeff Kirsher status = adapter->flash_status; 23949aebddd1SJeff Kirsher 23959aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2396f67ef7baSPadmanabh Ratnakar if (!status) { 23979aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2398f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2399f67ef7baSPadmanabh Ratnakar } else { 24009aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2401f67ef7baSPadmanabh Ratnakar } 24029aebddd1SJeff Kirsher 24039aebddd1SJeff Kirsher return status; 24049aebddd1SJeff Kirsher 24059aebddd1SJeff Kirsher err_unlock: 2406b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 24079aebddd1SJeff Kirsher return status; 24089aebddd1SJeff Kirsher } 24099aebddd1SJeff Kirsher 24106809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 24116809cee0SRavikumar Nelavelli { 24126809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 24136809cee0SRavikumar Nelavelli int status; 24146809cee0SRavikumar Nelavelli 24156809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 24166809cee0SRavikumar Nelavelli page_data); 24176809cee0SRavikumar Nelavelli if (!status) { 24186809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 24196809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 24206809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24216809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 24226809cee0SRavikumar Nelavelli break; 24236809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 24246809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24256809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 24266809cee0SRavikumar Nelavelli break; 24276809cee0SRavikumar Nelavelli default: 24286809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 24296809cee0SRavikumar Nelavelli break; 24306809cee0SRavikumar Nelavelli } 24316809cee0SRavikumar Nelavelli } 24326809cee0SRavikumar Nelavelli return status; 24336809cee0SRavikumar Nelavelli } 24346809cee0SRavikumar Nelavelli 243521252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter) 243621252377SVasundhara Volam { 243721252377SVasundhara Volam u8 page_data[PAGE_DATA_LEN]; 243821252377SVasundhara Volam int status; 243921252377SVasundhara Volam 244021252377SVasundhara Volam status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 244121252377SVasundhara Volam page_data); 244221252377SVasundhara Volam if (!status) { 244321252377SVasundhara Volam strlcpy(adapter->phy.vendor_name, page_data + 244421252377SVasundhara Volam SFP_VENDOR_NAME_OFFSET, SFP_VENDOR_NAME_LEN - 1); 244521252377SVasundhara Volam strlcpy(adapter->phy.vendor_pn, 244621252377SVasundhara Volam page_data + SFP_VENDOR_PN_OFFSET, 244721252377SVasundhara Volam SFP_VENDOR_NAME_LEN - 1); 244821252377SVasundhara Volam } 244921252377SVasundhara Volam 245021252377SVasundhara Volam return status; 245121252377SVasundhara Volam } 245221252377SVasundhara Volam 2453a23113b5SSuresh Reddy static int lancer_cmd_delete_object(struct be_adapter *adapter, 2454a23113b5SSuresh Reddy const char *obj_name) 2455f0613380SKalesh AP { 2456f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2457f0613380SKalesh AP struct be_mcc_wrb *wrb; 2458f0613380SKalesh AP int status; 2459f0613380SKalesh AP 2460b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2461f0613380SKalesh AP 2462f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2463f0613380SKalesh AP if (!wrb) { 2464f0613380SKalesh AP status = -EBUSY; 2465f0613380SKalesh AP goto err; 2466f0613380SKalesh AP } 2467f0613380SKalesh AP 2468f0613380SKalesh AP req = embedded_payload(wrb); 2469f0613380SKalesh AP 2470f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2471f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2472f0613380SKalesh AP sizeof(*req), wrb, NULL); 2473f0613380SKalesh AP 2474242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2475f0613380SKalesh AP 2476f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2477f0613380SKalesh AP err: 2478b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2479f0613380SKalesh AP return status; 2480f0613380SKalesh AP } 2481f0613380SKalesh AP 2482de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2483de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2484de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2485de49bd5aSPadmanabh Ratnakar { 2486de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2487de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2488de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2489de49bd5aSPadmanabh Ratnakar int status; 2490de49bd5aSPadmanabh Ratnakar 2491b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2492de49bd5aSPadmanabh Ratnakar 2493de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2494de49bd5aSPadmanabh Ratnakar if (!wrb) { 2495de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2496de49bd5aSPadmanabh Ratnakar goto err_unlock; 2497de49bd5aSPadmanabh Ratnakar } 2498de49bd5aSPadmanabh Ratnakar 2499de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2500de49bd5aSPadmanabh Ratnakar 2501de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2502de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2503de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2504de49bd5aSPadmanabh Ratnakar NULL); 2505de49bd5aSPadmanabh Ratnakar 2506de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2507de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2508de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2509de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2510de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2511de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2512de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2513de49bd5aSPadmanabh Ratnakar 2514de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2515de49bd5aSPadmanabh Ratnakar 2516de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2517de49bd5aSPadmanabh Ratnakar if (!status) { 2518de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2519de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2520de49bd5aSPadmanabh Ratnakar } else { 2521de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2522de49bd5aSPadmanabh Ratnakar } 2523de49bd5aSPadmanabh Ratnakar 2524de49bd5aSPadmanabh Ratnakar err_unlock: 2525b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2526de49bd5aSPadmanabh Ratnakar return status; 2527de49bd5aSPadmanabh Ratnakar } 2528de49bd5aSPadmanabh Ratnakar 2529a23113b5SSuresh Reddy static int be_cmd_write_flashrom(struct be_adapter *adapter, 2530a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 flash_type, 2531a23113b5SSuresh Reddy u32 flash_opcode, u32 img_offset, u32 buf_size) 25329aebddd1SJeff Kirsher { 25339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25349aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 25359aebddd1SJeff Kirsher int status; 25369aebddd1SJeff Kirsher 2537b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25389aebddd1SJeff Kirsher adapter->flash_status = 0; 25399aebddd1SJeff Kirsher 25409aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25419aebddd1SJeff Kirsher if (!wrb) { 25429aebddd1SJeff Kirsher status = -EBUSY; 25439aebddd1SJeff Kirsher goto err_unlock; 25449aebddd1SJeff Kirsher } 25459aebddd1SJeff Kirsher req = cmd->va; 25469aebddd1SJeff Kirsher 2547106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2548a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2549a2cc4e0bSSathya Perla cmd); 25509aebddd1SJeff Kirsher 25519aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 255270a7b525SVasundhara Volam if (flash_type == OPTYPE_OFFSET_SPECIFIED) 255370a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset); 255470a7b525SVasundhara Volam 25559aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 25569aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 25579aebddd1SJeff Kirsher 2558efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2559efaa408eSSuresh Reddy if (status) 2560efaa408eSSuresh Reddy goto err_unlock; 2561efaa408eSSuresh Reddy 2562b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25639aebddd1SJeff Kirsher 25645eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2565e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2566fd45160cSKalesh AP status = -ETIMEDOUT; 25679aebddd1SJeff Kirsher else 25689aebddd1SJeff Kirsher status = adapter->flash_status; 25699aebddd1SJeff Kirsher 25709aebddd1SJeff Kirsher return status; 25719aebddd1SJeff Kirsher 25729aebddd1SJeff Kirsher err_unlock: 2573b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25749aebddd1SJeff Kirsher return status; 25759aebddd1SJeff Kirsher } 25769aebddd1SJeff Kirsher 2577a23113b5SSuresh Reddy static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 257870a7b525SVasundhara Volam u16 img_optype, u32 img_offset, u32 crc_offset) 25799aebddd1SJeff Kirsher { 2580be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 258170a7b525SVasundhara Volam struct be_mcc_wrb *wrb; 25829aebddd1SJeff Kirsher int status; 25839aebddd1SJeff Kirsher 2584b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25859aebddd1SJeff Kirsher 25869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25879aebddd1SJeff Kirsher if (!wrb) { 25889aebddd1SJeff Kirsher status = -EBUSY; 25899aebddd1SJeff Kirsher goto err; 25909aebddd1SJeff Kirsher } 25919aebddd1SJeff Kirsher req = embedded_payload(wrb); 25929aebddd1SJeff Kirsher 2593106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2594be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2595be716446SPadmanabh Ratnakar wrb, NULL); 25969aebddd1SJeff Kirsher 259770a7b525SVasundhara Volam req->params.op_type = cpu_to_le32(img_optype); 259870a7b525SVasundhara Volam if (img_optype == OPTYPE_OFFSET_SPECIFIED) 259970a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset + crc_offset); 260070a7b525SVasundhara Volam else 260170a7b525SVasundhara Volam req->params.offset = cpu_to_le32(crc_offset); 260270a7b525SVasundhara Volam 26039aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 26049aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 26059aebddd1SJeff Kirsher 26069aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26079aebddd1SJeff Kirsher if (!status) 2608be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 26099aebddd1SJeff Kirsher 26109aebddd1SJeff Kirsher err: 2611b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 26129aebddd1SJeff Kirsher return status; 26139aebddd1SJeff Kirsher } 26149aebddd1SJeff Kirsher 2615a23113b5SSuresh Reddy static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; 2616a23113b5SSuresh Reddy 2617a23113b5SSuresh Reddy static bool phy_flashing_required(struct be_adapter *adapter) 2618a23113b5SSuresh Reddy { 2619a23113b5SSuresh Reddy return (adapter->phy.phy_type == PHY_TYPE_TN_8022 && 2620a23113b5SSuresh Reddy adapter->phy.interface_type == PHY_TYPE_BASET_10GB); 2621a23113b5SSuresh Reddy } 2622a23113b5SSuresh Reddy 2623a23113b5SSuresh Reddy static bool is_comp_in_ufi(struct be_adapter *adapter, 2624a23113b5SSuresh Reddy struct flash_section_info *fsec, int type) 2625a23113b5SSuresh Reddy { 2626a23113b5SSuresh Reddy int i = 0, img_type = 0; 2627a23113b5SSuresh Reddy struct flash_section_info_g2 *fsec_g2 = NULL; 2628a23113b5SSuresh Reddy 2629a23113b5SSuresh Reddy if (BE2_chip(adapter)) 2630a23113b5SSuresh Reddy fsec_g2 = (struct flash_section_info_g2 *)fsec; 2631a23113b5SSuresh Reddy 2632a23113b5SSuresh Reddy for (i = 0; i < MAX_FLASH_COMP; i++) { 2633a23113b5SSuresh Reddy if (fsec_g2) 2634a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); 2635a23113b5SSuresh Reddy else 2636a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2637a23113b5SSuresh Reddy 2638a23113b5SSuresh Reddy if (img_type == type) 2639a23113b5SSuresh Reddy return true; 2640a23113b5SSuresh Reddy } 2641a23113b5SSuresh Reddy return false; 2642a23113b5SSuresh Reddy } 2643a23113b5SSuresh Reddy 2644a23113b5SSuresh Reddy static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, 2645a23113b5SSuresh Reddy int header_size, 2646a23113b5SSuresh Reddy const struct firmware *fw) 2647a23113b5SSuresh Reddy { 2648a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2649a23113b5SSuresh Reddy const u8 *p = fw->data; 2650a23113b5SSuresh Reddy 2651a23113b5SSuresh Reddy p += header_size; 2652a23113b5SSuresh Reddy while (p < (fw->data + fw->size)) { 2653a23113b5SSuresh Reddy fsec = (struct flash_section_info *)p; 2654a23113b5SSuresh Reddy if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) 2655a23113b5SSuresh Reddy return fsec; 2656a23113b5SSuresh Reddy p += 32; 2657a23113b5SSuresh Reddy } 2658a23113b5SSuresh Reddy return NULL; 2659a23113b5SSuresh Reddy } 2660a23113b5SSuresh Reddy 2661a23113b5SSuresh Reddy static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p, 2662a23113b5SSuresh Reddy u32 img_offset, u32 img_size, int hdr_size, 2663a23113b5SSuresh Reddy u16 img_optype, bool *crc_match) 2664a23113b5SSuresh Reddy { 2665a23113b5SSuresh Reddy u32 crc_offset; 2666a23113b5SSuresh Reddy int status; 2667a23113b5SSuresh Reddy u8 crc[4]; 2668a23113b5SSuresh Reddy 2669a23113b5SSuresh Reddy status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset, 2670a23113b5SSuresh Reddy img_size - 4); 2671a23113b5SSuresh Reddy if (status) 2672a23113b5SSuresh Reddy return status; 2673a23113b5SSuresh Reddy 2674a23113b5SSuresh Reddy crc_offset = hdr_size + img_offset + img_size - 4; 2675a23113b5SSuresh Reddy 2676a23113b5SSuresh Reddy /* Skip flashing, if crc of flashed region matches */ 2677a23113b5SSuresh Reddy if (!memcmp(crc, p + crc_offset, 4)) 2678a23113b5SSuresh Reddy *crc_match = true; 2679a23113b5SSuresh Reddy else 2680a23113b5SSuresh Reddy *crc_match = false; 2681a23113b5SSuresh Reddy 2682a23113b5SSuresh Reddy return status; 2683a23113b5SSuresh Reddy } 2684a23113b5SSuresh Reddy 2685a23113b5SSuresh Reddy static int be_flash(struct be_adapter *adapter, const u8 *img, 2686a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int optype, int img_size, 2687a23113b5SSuresh Reddy u32 img_offset) 2688a23113b5SSuresh Reddy { 2689a23113b5SSuresh Reddy u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0; 2690a23113b5SSuresh Reddy struct be_cmd_write_flashrom *req = flash_cmd->va; 2691a23113b5SSuresh Reddy int status; 2692a23113b5SSuresh Reddy 2693a23113b5SSuresh Reddy while (total_bytes) { 2694a23113b5SSuresh Reddy num_bytes = min_t(u32, 32 * 1024, total_bytes); 2695a23113b5SSuresh Reddy 2696a23113b5SSuresh Reddy total_bytes -= num_bytes; 2697a23113b5SSuresh Reddy 2698a23113b5SSuresh Reddy if (!total_bytes) { 2699a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2700a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_FLASH; 2701a23113b5SSuresh Reddy else 2702a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_FLASH; 2703a23113b5SSuresh Reddy } else { 2704a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2705a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_SAVE; 2706a23113b5SSuresh Reddy else 2707a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_SAVE; 2708a23113b5SSuresh Reddy } 2709a23113b5SSuresh Reddy 2710a23113b5SSuresh Reddy memcpy(req->data_buf, img, num_bytes); 2711a23113b5SSuresh Reddy img += num_bytes; 2712a23113b5SSuresh Reddy status = be_cmd_write_flashrom(adapter, flash_cmd, optype, 2713a23113b5SSuresh Reddy flash_op, img_offset + 2714a23113b5SSuresh Reddy bytes_sent, num_bytes); 2715a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST && 2716a23113b5SSuresh Reddy optype == OPTYPE_PHY_FW) 2717a23113b5SSuresh Reddy break; 2718a23113b5SSuresh Reddy else if (status) 2719a23113b5SSuresh Reddy return status; 2720a23113b5SSuresh Reddy 2721a23113b5SSuresh Reddy bytes_sent += num_bytes; 2722a23113b5SSuresh Reddy } 2723a23113b5SSuresh Reddy return 0; 2724a23113b5SSuresh Reddy } 2725a23113b5SSuresh Reddy 2726a23113b5SSuresh Reddy /* For BE2, BE3 and BE3-R */ 2727a23113b5SSuresh Reddy static int be_flash_BEx(struct be_adapter *adapter, 2728a23113b5SSuresh Reddy const struct firmware *fw, 2729a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2730a23113b5SSuresh Reddy { 2731a23113b5SSuresh Reddy int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); 2732a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2733a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2734a23113b5SSuresh Reddy int status, i, filehdr_size, num_comp; 2735a23113b5SSuresh Reddy const struct flash_comp *pflashcomp; 2736a23113b5SSuresh Reddy bool crc_match; 2737a23113b5SSuresh Reddy const u8 *p; 2738a23113b5SSuresh Reddy 2739a23113b5SSuresh Reddy struct flash_comp gen3_flash_types[] = { 2740a23113b5SSuresh Reddy { BE3_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2741a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2742a23113b5SSuresh Reddy { BE3_REDBOOT_START, OPTYPE_REDBOOT, 2743a23113b5SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2744a23113b5SSuresh Reddy { BE3_ISCSI_BIOS_START, OPTYPE_BIOS, 2745a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2746a23113b5SSuresh Reddy { BE3_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2747a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2748a23113b5SSuresh Reddy { BE3_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2749a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2750a23113b5SSuresh Reddy { BE3_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2751a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2752a23113b5SSuresh Reddy { BE3_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2753a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2754a23113b5SSuresh Reddy { BE3_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2755a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE}, 2756a23113b5SSuresh Reddy { BE3_NCSI_START, OPTYPE_NCSI_FW, 2757a23113b5SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE, IMAGE_NCSI}, 2758a23113b5SSuresh Reddy { BE3_PHY_FW_START, OPTYPE_PHY_FW, 2759a23113b5SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE, IMAGE_FIRMWARE_PHY} 2760a23113b5SSuresh Reddy }; 2761a23113b5SSuresh Reddy 2762a23113b5SSuresh Reddy struct flash_comp gen2_flash_types[] = { 2763a23113b5SSuresh Reddy { BE2_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2764a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2765a23113b5SSuresh Reddy { BE2_REDBOOT_START, OPTYPE_REDBOOT, 2766a23113b5SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2767a23113b5SSuresh Reddy { BE2_ISCSI_BIOS_START, OPTYPE_BIOS, 2768a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2769a23113b5SSuresh Reddy { BE2_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2770a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2771a23113b5SSuresh Reddy { BE2_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2772a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2773a23113b5SSuresh Reddy { BE2_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2774a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2775a23113b5SSuresh Reddy { BE2_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2776a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2777a23113b5SSuresh Reddy { BE2_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2778a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE} 2779a23113b5SSuresh Reddy }; 2780a23113b5SSuresh Reddy 2781a23113b5SSuresh Reddy if (BE3_chip(adapter)) { 2782a23113b5SSuresh Reddy pflashcomp = gen3_flash_types; 2783a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2784a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen3_flash_types); 2785a23113b5SSuresh Reddy } else { 2786a23113b5SSuresh Reddy pflashcomp = gen2_flash_types; 2787a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g2); 2788a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen2_flash_types); 2789a23113b5SSuresh Reddy img_hdrs_size = 0; 2790a23113b5SSuresh Reddy } 2791a23113b5SSuresh Reddy 2792a23113b5SSuresh Reddy /* Get flash section info*/ 2793a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2794a23113b5SSuresh Reddy if (!fsec) { 2795a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2796a23113b5SSuresh Reddy return -1; 2797a23113b5SSuresh Reddy } 2798a23113b5SSuresh Reddy for (i = 0; i < num_comp; i++) { 2799a23113b5SSuresh Reddy if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) 2800a23113b5SSuresh Reddy continue; 2801a23113b5SSuresh Reddy 2802a23113b5SSuresh Reddy if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && 2803a23113b5SSuresh Reddy memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0) 2804a23113b5SSuresh Reddy continue; 2805a23113b5SSuresh Reddy 2806a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_PHY_FW && 2807a23113b5SSuresh Reddy !phy_flashing_required(adapter)) 2808a23113b5SSuresh Reddy continue; 2809a23113b5SSuresh Reddy 2810a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_REDBOOT) { 2811a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, 2812a23113b5SSuresh Reddy pflashcomp[i].offset, 2813a23113b5SSuresh Reddy pflashcomp[i].size, 2814a23113b5SSuresh Reddy filehdr_size + 2815a23113b5SSuresh Reddy img_hdrs_size, 2816a23113b5SSuresh Reddy OPTYPE_REDBOOT, &crc_match); 2817a23113b5SSuresh Reddy if (status) { 2818a23113b5SSuresh Reddy dev_err(dev, 2819a23113b5SSuresh Reddy "Could not get CRC for 0x%x region\n", 2820a23113b5SSuresh Reddy pflashcomp[i].optype); 2821a23113b5SSuresh Reddy continue; 2822a23113b5SSuresh Reddy } 2823a23113b5SSuresh Reddy 2824a23113b5SSuresh Reddy if (crc_match) 2825a23113b5SSuresh Reddy continue; 2826a23113b5SSuresh Reddy } 2827a23113b5SSuresh Reddy 2828a23113b5SSuresh Reddy p = fw->data + filehdr_size + pflashcomp[i].offset + 2829a23113b5SSuresh Reddy img_hdrs_size; 2830a23113b5SSuresh Reddy if (p + pflashcomp[i].size > fw->data + fw->size) 2831a23113b5SSuresh Reddy return -1; 2832a23113b5SSuresh Reddy 2833a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, 2834a23113b5SSuresh Reddy pflashcomp[i].size, 0); 2835a23113b5SSuresh Reddy if (status) { 2836a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2837a23113b5SSuresh Reddy pflashcomp[i].img_type); 2838a23113b5SSuresh Reddy return status; 2839a23113b5SSuresh Reddy } 2840a23113b5SSuresh Reddy } 2841a23113b5SSuresh Reddy return 0; 2842a23113b5SSuresh Reddy } 2843a23113b5SSuresh Reddy 2844a23113b5SSuresh Reddy static u16 be_get_img_optype(struct flash_section_entry fsec_entry) 2845a23113b5SSuresh Reddy { 2846a23113b5SSuresh Reddy u32 img_type = le32_to_cpu(fsec_entry.type); 2847a23113b5SSuresh Reddy u16 img_optype = le16_to_cpu(fsec_entry.optype); 2848a23113b5SSuresh Reddy 2849a23113b5SSuresh Reddy if (img_optype != 0xFFFF) 2850a23113b5SSuresh Reddy return img_optype; 2851a23113b5SSuresh Reddy 2852a23113b5SSuresh Reddy switch (img_type) { 2853a23113b5SSuresh Reddy case IMAGE_FIRMWARE_ISCSI: 2854a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_ACTIVE; 2855a23113b5SSuresh Reddy break; 2856a23113b5SSuresh Reddy case IMAGE_BOOT_CODE: 2857a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT; 2858a23113b5SSuresh Reddy break; 2859a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_ISCSI: 2860a23113b5SSuresh Reddy img_optype = OPTYPE_BIOS; 2861a23113b5SSuresh Reddy break; 2862a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_PXE: 2863a23113b5SSuresh Reddy img_optype = OPTYPE_PXE_BIOS; 2864a23113b5SSuresh Reddy break; 2865a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_FCOE: 2866a23113b5SSuresh Reddy img_optype = OPTYPE_FCOE_BIOS; 2867a23113b5SSuresh Reddy break; 2868a23113b5SSuresh Reddy case IMAGE_FIRMWARE_BACKUP_ISCSI: 2869a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_BACKUP; 2870a23113b5SSuresh Reddy break; 2871a23113b5SSuresh Reddy case IMAGE_NCSI: 2872a23113b5SSuresh Reddy img_optype = OPTYPE_NCSI_FW; 2873a23113b5SSuresh Reddy break; 2874a23113b5SSuresh Reddy case IMAGE_FLASHISM_JUMPVECTOR: 2875a23113b5SSuresh Reddy img_optype = OPTYPE_FLASHISM_JUMPVECTOR; 2876a23113b5SSuresh Reddy break; 2877a23113b5SSuresh Reddy case IMAGE_FIRMWARE_PHY: 2878a23113b5SSuresh Reddy img_optype = OPTYPE_SH_PHY_FW; 2879a23113b5SSuresh Reddy break; 2880a23113b5SSuresh Reddy case IMAGE_REDBOOT_DIR: 2881a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_DIR; 2882a23113b5SSuresh Reddy break; 2883a23113b5SSuresh Reddy case IMAGE_REDBOOT_CONFIG: 2884a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_CONFIG; 2885a23113b5SSuresh Reddy break; 2886a23113b5SSuresh Reddy case IMAGE_UFI_DIR: 2887a23113b5SSuresh Reddy img_optype = OPTYPE_UFI_DIR; 2888a23113b5SSuresh Reddy break; 2889a23113b5SSuresh Reddy default: 2890a23113b5SSuresh Reddy break; 2891a23113b5SSuresh Reddy } 2892a23113b5SSuresh Reddy 2893a23113b5SSuresh Reddy return img_optype; 2894a23113b5SSuresh Reddy } 2895a23113b5SSuresh Reddy 2896a23113b5SSuresh Reddy static int be_flash_skyhawk(struct be_adapter *adapter, 2897a23113b5SSuresh Reddy const struct firmware *fw, 2898a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2899a23113b5SSuresh Reddy { 2900a23113b5SSuresh Reddy int img_hdrs_size = num_of_images * sizeof(struct image_hdr); 2901a23113b5SSuresh Reddy bool crc_match, old_fw_img, flash_offset_support = true; 2902a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2903a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2904a23113b5SSuresh Reddy u32 img_offset, img_size, img_type; 2905a23113b5SSuresh Reddy u16 img_optype, flash_optype; 2906a23113b5SSuresh Reddy int status, i, filehdr_size; 2907a23113b5SSuresh Reddy const u8 *p; 2908a23113b5SSuresh Reddy 2909a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2910a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2911a23113b5SSuresh Reddy if (!fsec) { 2912a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2913a23113b5SSuresh Reddy return -EINVAL; 2914a23113b5SSuresh Reddy } 2915a23113b5SSuresh Reddy 2916a23113b5SSuresh Reddy retry_flash: 2917a23113b5SSuresh Reddy for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { 2918a23113b5SSuresh Reddy img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); 2919a23113b5SSuresh Reddy img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); 2920a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2921a23113b5SSuresh Reddy img_optype = be_get_img_optype(fsec->fsec_entry[i]); 2922a23113b5SSuresh Reddy old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF; 2923a23113b5SSuresh Reddy 2924a23113b5SSuresh Reddy if (img_optype == 0xFFFF) 2925a23113b5SSuresh Reddy continue; 2926a23113b5SSuresh Reddy 2927a23113b5SSuresh Reddy if (flash_offset_support) 2928a23113b5SSuresh Reddy flash_optype = OPTYPE_OFFSET_SPECIFIED; 2929a23113b5SSuresh Reddy else 2930a23113b5SSuresh Reddy flash_optype = img_optype; 2931a23113b5SSuresh Reddy 2932a23113b5SSuresh Reddy /* Don't bother verifying CRC if an old FW image is being 2933a23113b5SSuresh Reddy * flashed 2934a23113b5SSuresh Reddy */ 2935a23113b5SSuresh Reddy if (old_fw_img) 2936a23113b5SSuresh Reddy goto flash; 2937a23113b5SSuresh Reddy 2938a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, img_offset, 2939a23113b5SSuresh Reddy img_size, filehdr_size + 2940a23113b5SSuresh Reddy img_hdrs_size, flash_optype, 2941a23113b5SSuresh Reddy &crc_match); 2942a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 2943a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_ILLEGAL_FIELD) { 2944a23113b5SSuresh Reddy /* The current FW image on the card does not support 2945a23113b5SSuresh Reddy * OFFSET based flashing. Retry using older mechanism 2946a23113b5SSuresh Reddy * of OPTYPE based flashing 2947a23113b5SSuresh Reddy */ 2948a23113b5SSuresh Reddy if (flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2949a23113b5SSuresh Reddy flash_offset_support = false; 2950a23113b5SSuresh Reddy goto retry_flash; 2951a23113b5SSuresh Reddy } 2952a23113b5SSuresh Reddy 2953a23113b5SSuresh Reddy /* The current FW image on the card does not recognize 2954a23113b5SSuresh Reddy * the new FLASH op_type. The FW download is partially 2955a23113b5SSuresh Reddy * complete. Reboot the server now to enable FW image 2956a23113b5SSuresh Reddy * to recognize the new FLASH op_type. To complete the 2957a23113b5SSuresh Reddy * remaining process, download the same FW again after 2958a23113b5SSuresh Reddy * the reboot. 2959a23113b5SSuresh Reddy */ 2960a23113b5SSuresh Reddy dev_err(dev, "Flash incomplete. Reset the server\n"); 2961a23113b5SSuresh Reddy dev_err(dev, "Download FW image again after reset\n"); 2962a23113b5SSuresh Reddy return -EAGAIN; 2963a23113b5SSuresh Reddy } else if (status) { 2964a23113b5SSuresh Reddy dev_err(dev, "Could not get CRC for 0x%x region\n", 2965a23113b5SSuresh Reddy img_optype); 2966a23113b5SSuresh Reddy return -EFAULT; 2967a23113b5SSuresh Reddy } 2968a23113b5SSuresh Reddy 2969a23113b5SSuresh Reddy if (crc_match) 2970a23113b5SSuresh Reddy continue; 2971a23113b5SSuresh Reddy 2972a23113b5SSuresh Reddy flash: 2973a23113b5SSuresh Reddy p = fw->data + filehdr_size + img_offset + img_hdrs_size; 2974a23113b5SSuresh Reddy if (p + img_size > fw->data + fw->size) 2975a23113b5SSuresh Reddy return -1; 2976a23113b5SSuresh Reddy 2977a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, flash_optype, img_size, 2978a23113b5SSuresh Reddy img_offset); 2979a23113b5SSuresh Reddy 2980a23113b5SSuresh Reddy /* The current FW image on the card does not support OFFSET 2981a23113b5SSuresh Reddy * based flashing. Retry using older mechanism of OPTYPE based 2982a23113b5SSuresh Reddy * flashing 2983a23113b5SSuresh Reddy */ 2984a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD && 2985a23113b5SSuresh Reddy flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2986a23113b5SSuresh Reddy flash_offset_support = false; 2987a23113b5SSuresh Reddy goto retry_flash; 2988a23113b5SSuresh Reddy } 2989a23113b5SSuresh Reddy 2990a23113b5SSuresh Reddy /* For old FW images ignore ILLEGAL_FIELD error or errors on 2991a23113b5SSuresh Reddy * UFI_DIR region 2992a23113b5SSuresh Reddy */ 2993a23113b5SSuresh Reddy if (old_fw_img && 2994a23113b5SSuresh Reddy (base_status(status) == MCC_STATUS_ILLEGAL_FIELD || 2995a23113b5SSuresh Reddy (img_optype == OPTYPE_UFI_DIR && 2996a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_FAILED))) { 2997a23113b5SSuresh Reddy continue; 2998a23113b5SSuresh Reddy } else if (status) { 2999a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 3000a23113b5SSuresh Reddy img_type); 30016b525782SSuresh Reddy 30026b525782SSuresh Reddy switch (addl_status(status)) { 30036b525782SSuresh Reddy case MCC_ADDL_STATUS_MISSING_SIGNATURE: 30046b525782SSuresh Reddy dev_err(dev, 30056b525782SSuresh Reddy "Digital signature missing in FW\n"); 30066b525782SSuresh Reddy return -EINVAL; 30076b525782SSuresh Reddy case MCC_ADDL_STATUS_INVALID_SIGNATURE: 30086b525782SSuresh Reddy dev_err(dev, 30096b525782SSuresh Reddy "Invalid digital signature in FW\n"); 30106b525782SSuresh Reddy return -EINVAL; 30116b525782SSuresh Reddy default: 3012a23113b5SSuresh Reddy return -EFAULT; 3013a23113b5SSuresh Reddy } 3014a23113b5SSuresh Reddy } 30156b525782SSuresh Reddy } 3016a23113b5SSuresh Reddy return 0; 3017a23113b5SSuresh Reddy } 3018a23113b5SSuresh Reddy 3019a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, 3020a23113b5SSuresh Reddy const struct firmware *fw) 3021a23113b5SSuresh Reddy { 3022a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3023a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3024a23113b5SSuresh Reddy const u8 *data_ptr = NULL; 3025a23113b5SSuresh Reddy u8 *dest_image_ptr = NULL; 3026a23113b5SSuresh Reddy size_t image_size = 0; 3027a23113b5SSuresh Reddy u32 chunk_size = 0; 3028a23113b5SSuresh Reddy u32 data_written = 0; 3029a23113b5SSuresh Reddy u32 offset = 0; 3030a23113b5SSuresh Reddy int status = 0; 3031a23113b5SSuresh Reddy u8 add_status = 0; 3032a23113b5SSuresh Reddy u8 change_status; 3033a23113b5SSuresh Reddy 3034a23113b5SSuresh Reddy if (!IS_ALIGNED(fw->size, sizeof(u32))) { 3035a23113b5SSuresh Reddy dev_err(dev, "FW image size should be multiple of 4\n"); 3036a23113b5SSuresh Reddy return -EINVAL; 3037a23113b5SSuresh Reddy } 3038a23113b5SSuresh Reddy 3039a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) 3040a23113b5SSuresh Reddy + LANCER_FW_DOWNLOAD_CHUNK; 3041a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, 3042a23113b5SSuresh Reddy &flash_cmd.dma, GFP_KERNEL); 3043a23113b5SSuresh Reddy if (!flash_cmd.va) 3044a23113b5SSuresh Reddy return -ENOMEM; 3045a23113b5SSuresh Reddy 3046a23113b5SSuresh Reddy dest_image_ptr = flash_cmd.va + 3047a23113b5SSuresh Reddy sizeof(struct lancer_cmd_req_write_object); 3048a23113b5SSuresh Reddy image_size = fw->size; 3049a23113b5SSuresh Reddy data_ptr = fw->data; 3050a23113b5SSuresh Reddy 3051a23113b5SSuresh Reddy while (image_size) { 3052a23113b5SSuresh Reddy chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); 3053a23113b5SSuresh Reddy 3054a23113b5SSuresh Reddy /* Copy the image chunk content. */ 3055a23113b5SSuresh Reddy memcpy(dest_image_ptr, data_ptr, chunk_size); 3056a23113b5SSuresh Reddy 3057a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3058a23113b5SSuresh Reddy chunk_size, offset, 3059a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3060a23113b5SSuresh Reddy &data_written, &change_status, 3061a23113b5SSuresh Reddy &add_status); 3062a23113b5SSuresh Reddy if (status) 3063a23113b5SSuresh Reddy break; 3064a23113b5SSuresh Reddy 3065a23113b5SSuresh Reddy offset += data_written; 3066a23113b5SSuresh Reddy data_ptr += data_written; 3067a23113b5SSuresh Reddy image_size -= data_written; 3068a23113b5SSuresh Reddy } 3069a23113b5SSuresh Reddy 3070a23113b5SSuresh Reddy if (!status) { 3071a23113b5SSuresh Reddy /* Commit the FW written */ 3072a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3073a23113b5SSuresh Reddy 0, offset, 3074a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3075a23113b5SSuresh Reddy &data_written, &change_status, 3076a23113b5SSuresh Reddy &add_status); 3077a23113b5SSuresh Reddy } 3078a23113b5SSuresh Reddy 3079a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3080a23113b5SSuresh Reddy if (status) { 3081a23113b5SSuresh Reddy dev_err(dev, "Firmware load error\n"); 3082a23113b5SSuresh Reddy return be_cmd_status(status); 3083a23113b5SSuresh Reddy } 3084a23113b5SSuresh Reddy 3085a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3086a23113b5SSuresh Reddy 3087a23113b5SSuresh Reddy if (change_status == LANCER_FW_RESET_NEEDED) { 3088a23113b5SSuresh Reddy dev_info(dev, "Resetting adapter to activate new FW\n"); 3089a23113b5SSuresh Reddy status = lancer_physdev_ctrl(adapter, 3090a23113b5SSuresh Reddy PHYSDEV_CONTROL_FW_RESET_MASK); 3091a23113b5SSuresh Reddy if (status) { 3092a23113b5SSuresh Reddy dev_err(dev, "Adapter busy, could not reset FW\n"); 3093a23113b5SSuresh Reddy dev_err(dev, "Reboot server to activate new FW\n"); 3094a23113b5SSuresh Reddy } 3095a23113b5SSuresh Reddy } else if (change_status != LANCER_NO_RESET_NEEDED) { 3096a23113b5SSuresh Reddy dev_info(dev, "Reboot server to activate new FW\n"); 3097a23113b5SSuresh Reddy } 3098a23113b5SSuresh Reddy 3099a23113b5SSuresh Reddy return 0; 3100a23113b5SSuresh Reddy } 3101a23113b5SSuresh Reddy 3102a23113b5SSuresh Reddy /* Check if the flash image file is compatible with the adapter that 3103a23113b5SSuresh Reddy * is being flashed. 3104a23113b5SSuresh Reddy */ 3105a23113b5SSuresh Reddy static bool be_check_ufi_compatibility(struct be_adapter *adapter, 3106a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr) 3107a23113b5SSuresh Reddy { 3108a23113b5SSuresh Reddy if (!fhdr) { 3109a23113b5SSuresh Reddy dev_err(&adapter->pdev->dev, "Invalid FW UFI file"); 3110a23113b5SSuresh Reddy return false; 3111a23113b5SSuresh Reddy } 3112a23113b5SSuresh Reddy 3113a23113b5SSuresh Reddy /* First letter of the build version is used to identify 3114a23113b5SSuresh Reddy * which chip this image file is meant for. 3115a23113b5SSuresh Reddy */ 3116a23113b5SSuresh Reddy switch (fhdr->build[0]) { 3117a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_SH: 3118a23113b5SSuresh Reddy if (!skyhawk_chip(adapter)) 3119a23113b5SSuresh Reddy return false; 3120a23113b5SSuresh Reddy break; 3121a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE3: 3122a23113b5SSuresh Reddy if (!BE3_chip(adapter)) 3123a23113b5SSuresh Reddy return false; 3124a23113b5SSuresh Reddy break; 3125a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE2: 3126a23113b5SSuresh Reddy if (!BE2_chip(adapter)) 3127a23113b5SSuresh Reddy return false; 3128a23113b5SSuresh Reddy break; 3129a23113b5SSuresh Reddy default: 3130a23113b5SSuresh Reddy return false; 3131a23113b5SSuresh Reddy } 3132a23113b5SSuresh Reddy 3133a23113b5SSuresh Reddy /* In BE3 FW images the "asic_type_rev" field doesn't track the 3134a23113b5SSuresh Reddy * asic_rev of the chips it is compatible with. 3135a23113b5SSuresh Reddy * When asic_type_rev is 0 the image is compatible only with 3136a23113b5SSuresh Reddy * pre-BE3-R chips (asic_rev < 0x10) 3137a23113b5SSuresh Reddy */ 3138a23113b5SSuresh Reddy if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) 3139a23113b5SSuresh Reddy return adapter->asic_rev < 0x10; 3140a23113b5SSuresh Reddy else 3141a23113b5SSuresh Reddy return (fhdr->asic_type_rev >= adapter->asic_rev); 3142a23113b5SSuresh Reddy } 3143a23113b5SSuresh Reddy 3144a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw) 3145a23113b5SSuresh Reddy { 3146a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3147a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr3; 3148a23113b5SSuresh Reddy struct image_hdr *img_hdr_ptr; 3149a23113b5SSuresh Reddy int status = 0, i, num_imgs; 3150a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3151a23113b5SSuresh Reddy 3152a23113b5SSuresh Reddy fhdr3 = (struct flash_file_hdr_g3 *)fw->data; 3153a23113b5SSuresh Reddy if (!be_check_ufi_compatibility(adapter, fhdr3)) { 3154a23113b5SSuresh Reddy dev_err(dev, "Flash image is not compatible with adapter\n"); 3155a23113b5SSuresh Reddy return -EINVAL; 3156a23113b5SSuresh Reddy } 3157a23113b5SSuresh Reddy 3158a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct be_cmd_write_flashrom); 3159a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3160a23113b5SSuresh Reddy GFP_KERNEL); 3161a23113b5SSuresh Reddy if (!flash_cmd.va) 3162a23113b5SSuresh Reddy return -ENOMEM; 3163a23113b5SSuresh Reddy 3164a23113b5SSuresh Reddy num_imgs = le32_to_cpu(fhdr3->num_imgs); 3165a23113b5SSuresh Reddy for (i = 0; i < num_imgs; i++) { 3166a23113b5SSuresh Reddy img_hdr_ptr = (struct image_hdr *)(fw->data + 3167a23113b5SSuresh Reddy (sizeof(struct flash_file_hdr_g3) + 3168a23113b5SSuresh Reddy i * sizeof(struct image_hdr))); 3169a23113b5SSuresh Reddy if (!BE2_chip(adapter) && 3170a23113b5SSuresh Reddy le32_to_cpu(img_hdr_ptr->imageid) != 1) 3171a23113b5SSuresh Reddy continue; 3172a23113b5SSuresh Reddy 3173a23113b5SSuresh Reddy if (skyhawk_chip(adapter)) 3174a23113b5SSuresh Reddy status = be_flash_skyhawk(adapter, fw, &flash_cmd, 3175a23113b5SSuresh Reddy num_imgs); 3176a23113b5SSuresh Reddy else 3177a23113b5SSuresh Reddy status = be_flash_BEx(adapter, fw, &flash_cmd, 3178a23113b5SSuresh Reddy num_imgs); 3179a23113b5SSuresh Reddy } 3180a23113b5SSuresh Reddy 3181a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3182a23113b5SSuresh Reddy if (!status) 3183a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3184a23113b5SSuresh Reddy 3185a23113b5SSuresh Reddy return status; 3186a23113b5SSuresh Reddy } 3187a23113b5SSuresh Reddy 31889aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 31899aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 31909aebddd1SJeff Kirsher { 31919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 31929aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 31939aebddd1SJeff Kirsher int status; 31949aebddd1SJeff Kirsher 3195b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 31969aebddd1SJeff Kirsher 31979aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 31989aebddd1SJeff Kirsher if (!wrb) { 31999aebddd1SJeff Kirsher status = -EBUSY; 32009aebddd1SJeff Kirsher goto err; 32019aebddd1SJeff Kirsher } 32029aebddd1SJeff Kirsher req = nonemb_cmd->va; 32039aebddd1SJeff Kirsher 3204106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 3205a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 3206a2cc4e0bSSathya Perla wrb, nonemb_cmd); 32079aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 32089aebddd1SJeff Kirsher 32099aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 32109aebddd1SJeff Kirsher 32119aebddd1SJeff Kirsher err: 3212b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32139aebddd1SJeff Kirsher return status; 32149aebddd1SJeff Kirsher } 32159aebddd1SJeff Kirsher 32169aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 32179aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 32189aebddd1SJeff Kirsher { 32199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32209aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 32219aebddd1SJeff Kirsher int status; 32229aebddd1SJeff Kirsher 32232e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 32242e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32252e365b1bSSomnath Kotur return -EPERM; 32262e365b1bSSomnath Kotur 3227b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32289aebddd1SJeff Kirsher 32299aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32309aebddd1SJeff Kirsher if (!wrb) { 32319aebddd1SJeff Kirsher status = -EBUSY; 32329c855975SSuresh Reddy goto err_unlock; 32339aebddd1SJeff Kirsher } 32349aebddd1SJeff Kirsher 32359aebddd1SJeff Kirsher req = embedded_payload(wrb); 32369aebddd1SJeff Kirsher 3237106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3238a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 3239a2cc4e0bSSathya Perla wrb, NULL); 32409aebddd1SJeff Kirsher 32419aebddd1SJeff Kirsher req->src_port = port_num; 32429aebddd1SJeff Kirsher req->dest_port = port_num; 32439aebddd1SJeff Kirsher req->loopback_type = loopback_type; 32449aebddd1SJeff Kirsher req->loopback_state = enable; 32459aebddd1SJeff Kirsher 32469c855975SSuresh Reddy status = be_mcc_notify(adapter); 32479c855975SSuresh Reddy if (status) 32489c855975SSuresh Reddy goto err_unlock; 32499c855975SSuresh Reddy 3250b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32519c855975SSuresh Reddy 32529c855975SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 32539c855975SSuresh Reddy msecs_to_jiffies(SET_LB_MODE_TIMEOUT))) 32549c855975SSuresh Reddy status = -ETIMEDOUT; 32559c855975SSuresh Reddy 32569c855975SSuresh Reddy return status; 32579c855975SSuresh Reddy 32589c855975SSuresh Reddy err_unlock: 3259b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32609aebddd1SJeff Kirsher return status; 32619aebddd1SJeff Kirsher } 32629aebddd1SJeff Kirsher 32639aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 3264a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 3265a2cc4e0bSSathya Perla u64 pattern) 32669aebddd1SJeff Kirsher { 32679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32689aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 32695eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 32709aebddd1SJeff Kirsher int status; 32719aebddd1SJeff Kirsher 32722e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_LOOPBACK_TEST, 32732e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32742e365b1bSSomnath Kotur return -EPERM; 32752e365b1bSSomnath Kotur 3276b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32779aebddd1SJeff Kirsher 32789aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32799aebddd1SJeff Kirsher if (!wrb) { 32809aebddd1SJeff Kirsher status = -EBUSY; 32819aebddd1SJeff Kirsher goto err; 32829aebddd1SJeff Kirsher } 32839aebddd1SJeff Kirsher 32849aebddd1SJeff Kirsher req = embedded_payload(wrb); 32859aebddd1SJeff Kirsher 3286106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3287a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 3288a2cc4e0bSSathya Perla NULL); 32899aebddd1SJeff Kirsher 32905eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 32919aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 32929aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 32939aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 32949aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 32959aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 32969aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 32979aebddd1SJeff Kirsher 3298efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 3299efaa408eSSuresh Reddy if (status) 3300efaa408eSSuresh Reddy goto err; 33019aebddd1SJeff Kirsher 3302b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33035eeff635SSuresh Reddy 33045eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 33055eeff635SSuresh Reddy resp = embedded_payload(wrb); 33065eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 33075eeff635SSuresh Reddy 33085eeff635SSuresh Reddy return status; 33099aebddd1SJeff Kirsher err: 3310b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33119aebddd1SJeff Kirsher return status; 33129aebddd1SJeff Kirsher } 33139aebddd1SJeff Kirsher 33149aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 33159aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 33169aebddd1SJeff Kirsher { 33179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33189aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 33199aebddd1SJeff Kirsher int status; 33209aebddd1SJeff Kirsher int i, j = 0; 33219aebddd1SJeff Kirsher 33222e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_HOST_DDR_DMA, 33232e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33242e365b1bSSomnath Kotur return -EPERM; 33252e365b1bSSomnath Kotur 3326b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33279aebddd1SJeff Kirsher 33289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33299aebddd1SJeff Kirsher if (!wrb) { 33309aebddd1SJeff Kirsher status = -EBUSY; 33319aebddd1SJeff Kirsher goto err; 33329aebddd1SJeff Kirsher } 33339aebddd1SJeff Kirsher req = cmd->va; 3334106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3335a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 3336a2cc4e0bSSathya Perla cmd); 33379aebddd1SJeff Kirsher 33389aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33399aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 33409aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 33419aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 33429aebddd1SJeff Kirsher j++; 33439aebddd1SJeff Kirsher if (j > 7) 33449aebddd1SJeff Kirsher j = 0; 33459aebddd1SJeff Kirsher } 33469aebddd1SJeff Kirsher 33479aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33489aebddd1SJeff Kirsher 33499aebddd1SJeff Kirsher if (!status) { 33509aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 335103d28ffeSKalesh AP 33529aebddd1SJeff Kirsher resp = cmd->va; 33539aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 33549aebddd1SJeff Kirsher resp->snd_err) { 33559aebddd1SJeff Kirsher status = -1; 33569aebddd1SJeff Kirsher } 33579aebddd1SJeff Kirsher } 33589aebddd1SJeff Kirsher 33599aebddd1SJeff Kirsher err: 3360b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33619aebddd1SJeff Kirsher return status; 33629aebddd1SJeff Kirsher } 33639aebddd1SJeff Kirsher 33649aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 33659aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 33669aebddd1SJeff Kirsher { 33679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33689aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 33699aebddd1SJeff Kirsher int status; 33709aebddd1SJeff Kirsher 3371b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33729aebddd1SJeff Kirsher 33739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33749aebddd1SJeff Kirsher if (!wrb) { 33759aebddd1SJeff Kirsher status = -EBUSY; 33769aebddd1SJeff Kirsher goto err; 33779aebddd1SJeff Kirsher } 33789aebddd1SJeff Kirsher req = nonemb_cmd->va; 33799aebddd1SJeff Kirsher 3380106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3381106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 3382106df1e3SSomnath Kotur nonemb_cmd); 33839aebddd1SJeff Kirsher 33849aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33859aebddd1SJeff Kirsher 33869aebddd1SJeff Kirsher err: 3387b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33889aebddd1SJeff Kirsher return status; 33899aebddd1SJeff Kirsher } 33909aebddd1SJeff Kirsher 339142f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 33929aebddd1SJeff Kirsher { 33939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33949aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 33959aebddd1SJeff Kirsher struct be_dma_mem cmd; 33969aebddd1SJeff Kirsher int status; 33979aebddd1SJeff Kirsher 3398f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 3399f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 3400f25b119cSPadmanabh Ratnakar return -EPERM; 3401f25b119cSPadmanabh Ratnakar 3402b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34039aebddd1SJeff Kirsher 34049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34059aebddd1SJeff Kirsher if (!wrb) { 34069aebddd1SJeff Kirsher status = -EBUSY; 34079aebddd1SJeff Kirsher goto err; 34089aebddd1SJeff Kirsher } 34099aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 3410e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3411e51000dbSSriharsha Basavapatna GFP_ATOMIC); 34129aebddd1SJeff Kirsher if (!cmd.va) { 34139aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 34149aebddd1SJeff Kirsher status = -ENOMEM; 34159aebddd1SJeff Kirsher goto err; 34169aebddd1SJeff Kirsher } 34179aebddd1SJeff Kirsher 34189aebddd1SJeff Kirsher req = cmd.va; 34199aebddd1SJeff Kirsher 3420106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3421106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 3422106df1e3SSomnath Kotur wrb, &cmd); 34239aebddd1SJeff Kirsher 34249aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34259aebddd1SJeff Kirsher if (!status) { 34269aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 34279aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 342803d28ffeSKalesh AP 342942f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 343042f11cf2SAjit Khaparde adapter->phy.interface_type = 34319aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 343242f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 343342f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 343442f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 343542f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 343642f11cf2SAjit Khaparde adapter->phy.misc_params = 343742f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 343868cb7e47SVasundhara Volam 343968cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 344068cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 344168cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 344268cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 344368cb7e47SVasundhara Volam } 34449aebddd1SJeff Kirsher } 3445e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 34469aebddd1SJeff Kirsher err: 3447b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34489aebddd1SJeff Kirsher return status; 34499aebddd1SJeff Kirsher } 34509aebddd1SJeff Kirsher 3451bc0ee163SLad, Prabhakar static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 34529aebddd1SJeff Kirsher { 34539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34549aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 34559aebddd1SJeff Kirsher int status; 34569aebddd1SJeff Kirsher 3457b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34589aebddd1SJeff Kirsher 34599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34609aebddd1SJeff Kirsher if (!wrb) { 34619aebddd1SJeff Kirsher status = -EBUSY; 34629aebddd1SJeff Kirsher goto err; 34639aebddd1SJeff Kirsher } 34649aebddd1SJeff Kirsher 34659aebddd1SJeff Kirsher req = embedded_payload(wrb); 34669aebddd1SJeff Kirsher 3467106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3468106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 34699aebddd1SJeff Kirsher 34709aebddd1SJeff Kirsher req->hdr.domain = domain; 34719aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 34729aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 34739aebddd1SJeff Kirsher 34749aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34759aebddd1SJeff Kirsher 34769aebddd1SJeff Kirsher err: 3477b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34789aebddd1SJeff Kirsher return status; 34799aebddd1SJeff Kirsher } 34809aebddd1SJeff Kirsher 34819aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 34829aebddd1SJeff Kirsher { 34839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34849aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 34859aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 3486a155a5dbSSriharsha Basavapatna int status, i; 34879aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 34889aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 34899aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 3490a155a5dbSSriharsha Basavapatna u32 *serial_num; 34919aebddd1SJeff Kirsher 3492d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3493d98ef50fSSuresh Reddy return -1; 3494d98ef50fSSuresh Reddy 34959aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 34969aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 3497e51000dbSSriharsha Basavapatna attribs_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3498e51000dbSSriharsha Basavapatna attribs_cmd.size, 3499e51000dbSSriharsha Basavapatna &attribs_cmd.dma, GFP_ATOMIC); 35009aebddd1SJeff Kirsher if (!attribs_cmd.va) { 3501a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3502d98ef50fSSuresh Reddy status = -ENOMEM; 3503d98ef50fSSuresh Reddy goto err; 35049aebddd1SJeff Kirsher } 35059aebddd1SJeff Kirsher 35069aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35079aebddd1SJeff Kirsher if (!wrb) { 35089aebddd1SJeff Kirsher status = -EBUSY; 35099aebddd1SJeff Kirsher goto err; 35109aebddd1SJeff Kirsher } 35119aebddd1SJeff Kirsher req = attribs_cmd.va; 35129aebddd1SJeff Kirsher 3513106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3514a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 3515a2cc4e0bSSathya Perla wrb, &attribs_cmd); 35169aebddd1SJeff Kirsher 35179aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35189aebddd1SJeff Kirsher if (!status) { 35199aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 35209aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 3521a155a5dbSSriharsha Basavapatna serial_num = attribs->hba_attribs.controller_serial_number; 3522a155a5dbSSriharsha Basavapatna for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) 3523a155a5dbSSriharsha Basavapatna adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & 3524a155a5dbSSriharsha Basavapatna (BIT_MASK(16) - 1); 35259aebddd1SJeff Kirsher } 35269aebddd1SJeff Kirsher 35279aebddd1SJeff Kirsher err: 35289aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 3529d98ef50fSSuresh Reddy if (attribs_cmd.va) 3530e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, attribs_cmd.size, 3531d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 35329aebddd1SJeff Kirsher return status; 35339aebddd1SJeff Kirsher } 35349aebddd1SJeff Kirsher 35359aebddd1SJeff Kirsher /* Uses mbox */ 35369aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 35379aebddd1SJeff Kirsher { 35389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35399aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 35409aebddd1SJeff Kirsher int status; 35419aebddd1SJeff Kirsher 35429aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 35439aebddd1SJeff Kirsher return -1; 35449aebddd1SJeff Kirsher 35459aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35469aebddd1SJeff Kirsher if (!wrb) { 35479aebddd1SJeff Kirsher status = -EBUSY; 35489aebddd1SJeff Kirsher goto err; 35499aebddd1SJeff Kirsher } 35509aebddd1SJeff Kirsher 35519aebddd1SJeff Kirsher req = embedded_payload(wrb); 35529aebddd1SJeff Kirsher 3553106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3554a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 3555a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 35569aebddd1SJeff Kirsher 35579aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 35589aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 35599aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 35609aebddd1SJeff Kirsher 35619aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35629aebddd1SJeff Kirsher if (!status) { 35639aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 356403d28ffeSKalesh AP 35659aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 35669aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 3567d379142bSSathya Perla if (!adapter->be3_native) 3568d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 3569d379142bSSathya Perla "adapter not in advanced mode\n"); 35709aebddd1SJeff Kirsher } 35719aebddd1SJeff Kirsher err: 35729aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 35739aebddd1SJeff Kirsher return status; 35749aebddd1SJeff Kirsher } 3575590c391dSPadmanabh Ratnakar 3576f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 3577f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 3578f25b119cSPadmanabh Ratnakar u32 domain) 3579f25b119cSPadmanabh Ratnakar { 3580f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3581f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 3582f25b119cSPadmanabh Ratnakar int status; 3583f25b119cSPadmanabh Ratnakar 3584b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3585f25b119cSPadmanabh Ratnakar 3586f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3587f25b119cSPadmanabh Ratnakar if (!wrb) { 3588f25b119cSPadmanabh Ratnakar status = -EBUSY; 3589f25b119cSPadmanabh Ratnakar goto err; 3590f25b119cSPadmanabh Ratnakar } 3591f25b119cSPadmanabh Ratnakar 3592f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 3593f25b119cSPadmanabh Ratnakar 3594f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3595f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 3596f25b119cSPadmanabh Ratnakar wrb, NULL); 3597f25b119cSPadmanabh Ratnakar 3598f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 3599f25b119cSPadmanabh Ratnakar 3600f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3601f25b119cSPadmanabh Ratnakar if (!status) { 3602f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 3603f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 360403d28ffeSKalesh AP 3605f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 360602308d74SSuresh Reddy 360702308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 360802308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 360902308d74SSuresh Reddy */ 361002308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 361102308d74SSuresh Reddy be_physfn(adapter)) 361202308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 3613f25b119cSPadmanabh Ratnakar } 3614f25b119cSPadmanabh Ratnakar 3615f25b119cSPadmanabh Ratnakar err: 3616b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3617f25b119cSPadmanabh Ratnakar return status; 3618f25b119cSPadmanabh Ratnakar } 3619f25b119cSPadmanabh Ratnakar 362004a06028SSathya Perla /* Set privilege(s) for a function */ 362104a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 362204a06028SSathya Perla u32 domain) 362304a06028SSathya Perla { 362404a06028SSathya Perla struct be_mcc_wrb *wrb; 362504a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 362604a06028SSathya Perla int status; 362704a06028SSathya Perla 3628b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 362904a06028SSathya Perla 363004a06028SSathya Perla wrb = wrb_from_mccq(adapter); 363104a06028SSathya Perla if (!wrb) { 363204a06028SSathya Perla status = -EBUSY; 363304a06028SSathya Perla goto err; 363404a06028SSathya Perla } 363504a06028SSathya Perla 363604a06028SSathya Perla req = embedded_payload(wrb); 363704a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 363804a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 363904a06028SSathya Perla wrb, NULL); 364004a06028SSathya Perla req->hdr.domain = domain; 364104a06028SSathya Perla if (lancer_chip(adapter)) 364204a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 364304a06028SSathya Perla else 364404a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 364504a06028SSathya Perla 364604a06028SSathya Perla status = be_mcc_notify_wait(adapter); 364704a06028SSathya Perla err: 3648b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 364904a06028SSathya Perla return status; 365004a06028SSathya Perla } 365104a06028SSathya Perla 36525a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 36535a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 36545a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 36555a712c13SSathya Perla */ 36561578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 3657b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 3658b188f090SSuresh Reddy u8 domain) 3659590c391dSPadmanabh Ratnakar { 3660590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3661590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 3662590c391dSPadmanabh Ratnakar int status; 3663590c391dSPadmanabh Ratnakar int mac_count; 3664e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 3665e5e1ee89SPadmanabh Ratnakar int i; 3666e5e1ee89SPadmanabh Ratnakar 3667e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 3668e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 3669e51000dbSSriharsha Basavapatna get_mac_list_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3670e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 3671e51000dbSSriharsha Basavapatna &get_mac_list_cmd.dma, 3672e51000dbSSriharsha Basavapatna GFP_ATOMIC); 3673e5e1ee89SPadmanabh Ratnakar 3674e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 3675e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 3676e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 3677e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 3678e5e1ee89SPadmanabh Ratnakar } 3679590c391dSPadmanabh Ratnakar 3680b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3681590c391dSPadmanabh Ratnakar 3682590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3683590c391dSPadmanabh Ratnakar if (!wrb) { 3684590c391dSPadmanabh Ratnakar status = -EBUSY; 3685e5e1ee89SPadmanabh Ratnakar goto out; 3686590c391dSPadmanabh Ratnakar } 3687e5e1ee89SPadmanabh Ratnakar 3688e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 3689590c391dSPadmanabh Ratnakar 3690590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3691bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 3692bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 3693590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3694e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 36955a712c13SSathya Perla if (*pmac_id_valid) { 36965a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 3697b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 36985a712c13SSathya Perla req->perm_override = 0; 36995a712c13SSathya Perla } else { 3700e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 37015a712c13SSathya Perla } 3702590c391dSPadmanabh Ratnakar 3703590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3704590c391dSPadmanabh Ratnakar if (!status) { 3705590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 3706e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 37075a712c13SSathya Perla 37085a712c13SSathya Perla if (*pmac_id_valid) { 37095a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 37105a712c13SSathya Perla ETH_ALEN); 37115a712c13SSathya Perla goto out; 37125a712c13SSathya Perla } 37135a712c13SSathya Perla 3714e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3715e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 3716dbedd44eSJoe Perches * or one or more true or pseudo permanent mac addresses. 37171578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 37181578e777SPadmanabh Ratnakar * found. 3719e5e1ee89SPadmanabh Ratnakar */ 3720590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3721e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3722e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3723e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3724e5e1ee89SPadmanabh Ratnakar 3725e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3726e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3727e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3728e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3729e5e1ee89SPadmanabh Ratnakar */ 3730e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 37315a712c13SSathya Perla *pmac_id_valid = true; 3732e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3733e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3734e5e1ee89SPadmanabh Ratnakar goto out; 3735590c391dSPadmanabh Ratnakar } 3736590c391dSPadmanabh Ratnakar } 37371578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 37385a712c13SSathya Perla *pmac_id_valid = false; 3739e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3740e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3741590c391dSPadmanabh Ratnakar } 3742590c391dSPadmanabh Ratnakar 3743e5e1ee89SPadmanabh Ratnakar out: 3744b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3745e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_mac_list_cmd.size, 3746e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3747590c391dSPadmanabh Ratnakar return status; 3748590c391dSPadmanabh Ratnakar } 3749590c391dSPadmanabh Ratnakar 3750a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3751a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 37525a712c13SSathya Perla { 3753b188f090SSuresh Reddy if (!active) 3754b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3755b188f090SSuresh Reddy if_handle, domain); 37563175d8c2SSathya Perla if (BEx_chip(adapter)) 37575a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3758b188f090SSuresh Reddy if_handle, curr_pmac_id); 37593175d8c2SSathya Perla else 37603175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 37613175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3762b188f090SSuresh Reddy &curr_pmac_id, 3763b188f090SSuresh Reddy if_handle, domain); 37645a712c13SSathya Perla } 37655a712c13SSathya Perla 376695046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 376795046b92SSathya Perla { 376895046b92SSathya Perla int status; 376995046b92SSathya Perla bool pmac_valid = false; 377095046b92SSathya Perla 3771c7bf7169SJoe Perches eth_zero_addr(mac); 377295046b92SSathya Perla 37733175d8c2SSathya Perla if (BEx_chip(adapter)) { 37743175d8c2SSathya Perla if (be_physfn(adapter)) 37753175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 37763175d8c2SSathya Perla 0); 377795046b92SSathya Perla else 377895046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 377995046b92SSathya Perla adapter->if_handle, 0); 37803175d8c2SSathya Perla } else { 37813175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3782b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 37833175d8c2SSathya Perla } 37843175d8c2SSathya Perla 378595046b92SSathya Perla return status; 378695046b92SSathya Perla } 378795046b92SSathya Perla 3788590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3789590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3790590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3791590c391dSPadmanabh Ratnakar { 3792590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3793590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3794590c391dSPadmanabh Ratnakar int status; 3795590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3796590c391dSPadmanabh Ratnakar 3797590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3798590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3799e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3800e51000dbSSriharsha Basavapatna GFP_KERNEL); 3801d0320f75SJoe Perches if (!cmd.va) 3802590c391dSPadmanabh Ratnakar return -ENOMEM; 3803590c391dSPadmanabh Ratnakar 3804b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3805590c391dSPadmanabh Ratnakar 3806590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3807590c391dSPadmanabh Ratnakar if (!wrb) { 3808590c391dSPadmanabh Ratnakar status = -EBUSY; 3809590c391dSPadmanabh Ratnakar goto err; 3810590c391dSPadmanabh Ratnakar } 3811590c391dSPadmanabh Ratnakar 3812590c391dSPadmanabh Ratnakar req = cmd.va; 3813590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3814590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3815590c391dSPadmanabh Ratnakar wrb, &cmd); 3816590c391dSPadmanabh Ratnakar 3817590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3818590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3819590c391dSPadmanabh Ratnakar if (mac_count) 3820590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3821590c391dSPadmanabh Ratnakar 3822590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3823590c391dSPadmanabh Ratnakar 3824590c391dSPadmanabh Ratnakar err: 3825a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3826b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3827590c391dSPadmanabh Ratnakar return status; 3828590c391dSPadmanabh Ratnakar } 38294762f6ceSAjit Khaparde 38303175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 38313175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 38323175d8c2SSathya Perla * current list are active. 38333175d8c2SSathya Perla */ 38343175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 38353175d8c2SSathya Perla { 38363175d8c2SSathya Perla bool active_mac = false; 38373175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 38383175d8c2SSathya Perla u32 pmac_id; 38393175d8c2SSathya Perla int status; 38403175d8c2SSathya Perla 38413175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3842b188f090SSuresh Reddy &pmac_id, if_id, dom); 3843b188f090SSuresh Reddy 38443175d8c2SSathya Perla if (!status && active_mac) 38453175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 38463175d8c2SSathya Perla 38473175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 38483175d8c2SSathya Perla } 38493175d8c2SSathya Perla 3850f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3851e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u16 hsw_mode, u8 spoofchk) 3852f1f3ee1bSAjit Khaparde { 3853f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3854f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3855f1f3ee1bSAjit Khaparde void *ctxt; 3856f1f3ee1bSAjit Khaparde int status; 3857f1f3ee1bSAjit Khaparde 3858884476beSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_HSW_CONFIG, 3859884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON)) 3860884476beSSomnath Kotur return -EPERM; 3861884476beSSomnath Kotur 3862b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3863f1f3ee1bSAjit Khaparde 3864f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3865f1f3ee1bSAjit Khaparde if (!wrb) { 3866f1f3ee1bSAjit Khaparde status = -EBUSY; 3867f1f3ee1bSAjit Khaparde goto err; 3868f1f3ee1bSAjit Khaparde } 3869f1f3ee1bSAjit Khaparde 3870f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3871f1f3ee1bSAjit Khaparde ctxt = &req->context; 3872f1f3ee1bSAjit Khaparde 3873f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3874a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3875a2cc4e0bSSathya Perla NULL); 3876f1f3ee1bSAjit Khaparde 3877f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3878f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3879f1f3ee1bSAjit Khaparde if (pvid) { 3880f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3881f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3882f1f3ee1bSAjit Khaparde } 3883884476beSSomnath Kotur if (hsw_mode) { 3884a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3885a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3886a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3887a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3888a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3889a77dcb8cSAjit Khaparde } 3890f1f3ee1bSAjit Khaparde 3891e7bcbd7bSKalesh AP /* Enable/disable both mac and vlan spoof checking */ 3892e7bcbd7bSKalesh AP if (!BEx_chip(adapter) && spoofchk) { 3893e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, mac_spoofchk, 3894e7bcbd7bSKalesh AP ctxt, spoofchk); 3895e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, vlan_spoofchk, 3896e7bcbd7bSKalesh AP ctxt, spoofchk); 3897e7bcbd7bSKalesh AP } 3898e7bcbd7bSKalesh AP 3899f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3900f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3901f1f3ee1bSAjit Khaparde 3902f1f3ee1bSAjit Khaparde err: 3903b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3904f1f3ee1bSAjit Khaparde return status; 3905f1f3ee1bSAjit Khaparde } 3906f1f3ee1bSAjit Khaparde 3907f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3908f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3909e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u8 *mode, bool *spoofchk) 3910f1f3ee1bSAjit Khaparde { 3911f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3912f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3913f1f3ee1bSAjit Khaparde void *ctxt; 3914f1f3ee1bSAjit Khaparde int status; 3915f1f3ee1bSAjit Khaparde u16 vid; 3916f1f3ee1bSAjit Khaparde 3917b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3918f1f3ee1bSAjit Khaparde 3919f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3920f1f3ee1bSAjit Khaparde if (!wrb) { 3921f1f3ee1bSAjit Khaparde status = -EBUSY; 3922f1f3ee1bSAjit Khaparde goto err; 3923f1f3ee1bSAjit Khaparde } 3924f1f3ee1bSAjit Khaparde 3925f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3926f1f3ee1bSAjit Khaparde ctxt = &req->context; 3927f1f3ee1bSAjit Khaparde 3928f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3929a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3930a2cc4e0bSSathya Perla NULL); 3931f1f3ee1bSAjit Khaparde 3932f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3933a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3934a77dcb8cSAjit Khaparde ctxt, intf_id); 3935f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3936a77dcb8cSAjit Khaparde 39372c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3938a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3939a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3940a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3941a77dcb8cSAjit Khaparde } 3942f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3943f1f3ee1bSAjit Khaparde 3944f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3945f1f3ee1bSAjit Khaparde if (!status) { 3946f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3947f1f3ee1bSAjit Khaparde embedded_payload(wrb); 394803d28ffeSKalesh AP 3949a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3950f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3951f1f3ee1bSAjit Khaparde pvid, &resp->context); 3952a77dcb8cSAjit Khaparde if (pvid) 3953f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3954a77dcb8cSAjit Khaparde if (mode) 3955a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3956a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3957e7bcbd7bSKalesh AP if (spoofchk) 3958e7bcbd7bSKalesh AP *spoofchk = 3959e7bcbd7bSKalesh AP AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3960e7bcbd7bSKalesh AP spoofchk, &resp->context); 3961f1f3ee1bSAjit Khaparde } 3962f1f3ee1bSAjit Khaparde 3963f1f3ee1bSAjit Khaparde err: 3964b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3965f1f3ee1bSAjit Khaparde return status; 3966f1f3ee1bSAjit Khaparde } 3967f1f3ee1bSAjit Khaparde 3968f7062ee5SSathya Perla static bool be_is_wol_excluded(struct be_adapter *adapter) 3969f7062ee5SSathya Perla { 3970f7062ee5SSathya Perla struct pci_dev *pdev = adapter->pdev; 3971f7062ee5SSathya Perla 397218c57c74SKalesh AP if (be_virtfn(adapter)) 3973f7062ee5SSathya Perla return true; 3974f7062ee5SSathya Perla 3975f7062ee5SSathya Perla switch (pdev->subsystem_device) { 3976f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID1: 3977f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID2: 3978f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID3: 3979f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID4: 3980f7062ee5SSathya Perla return true; 3981f7062ee5SSathya Perla default: 3982f7062ee5SSathya Perla return false; 3983f7062ee5SSathya Perla } 3984f7062ee5SSathya Perla } 3985f7062ee5SSathya Perla 39864762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 39874762f6ceSAjit Khaparde { 39884762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 39894762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 399076a9e08eSSuresh Reddy int status = 0; 39914762f6ceSAjit Khaparde struct be_dma_mem cmd; 39924762f6ceSAjit Khaparde 3993f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3994f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3995f25b119cSPadmanabh Ratnakar return -EPERM; 3996f25b119cSPadmanabh Ratnakar 399776a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 399876a9e08eSSuresh Reddy return status; 399976a9e08eSSuresh Reddy 4000d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4001d98ef50fSSuresh Reddy return -1; 4002d98ef50fSSuresh Reddy 40034762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 40044762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 4005e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4006e51000dbSSriharsha Basavapatna GFP_ATOMIC); 40074762f6ceSAjit Khaparde if (!cmd.va) { 4008a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 4009d98ef50fSSuresh Reddy status = -ENOMEM; 4010d98ef50fSSuresh Reddy goto err; 40114762f6ceSAjit Khaparde } 40124762f6ceSAjit Khaparde 40134762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 40144762f6ceSAjit Khaparde if (!wrb) { 40154762f6ceSAjit Khaparde status = -EBUSY; 40164762f6ceSAjit Khaparde goto err; 40174762f6ceSAjit Khaparde } 40184762f6ceSAjit Khaparde 40194762f6ceSAjit Khaparde req = cmd.va; 40204762f6ceSAjit Khaparde 40214762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 40224762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 402376a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 40244762f6ceSAjit Khaparde 40254762f6ceSAjit Khaparde req->hdr.version = 1; 40264762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 40274762f6ceSAjit Khaparde 40284762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 40294762f6ceSAjit Khaparde if (!status) { 40304762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 403103d28ffeSKalesh AP 40324762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 40334762f6ceSAjit Khaparde 40344762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 403545f13df7SSriharsha Basavapatna 403645f13df7SSriharsha Basavapatna /* Non-zero macaddr indicates WOL is enabled */ 403745f13df7SSriharsha Basavapatna if (adapter->wol_cap & BE_WOL_CAP && 403845f13df7SSriharsha Basavapatna !is_zero_ether_addr(resp->magic_mac)) 403976a9e08eSSuresh Reddy adapter->wol_en = true; 40404762f6ceSAjit Khaparde } 40414762f6ceSAjit Khaparde err: 40424762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 4043d98ef50fSSuresh Reddy if (cmd.va) 4044e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4045e51000dbSSriharsha Basavapatna cmd.dma); 40464762f6ceSAjit Khaparde return status; 4047941a77d5SSomnath Kotur 4048941a77d5SSomnath Kotur } 4049baaa08d1SVasundhara Volam 4050baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 4051baaa08d1SVasundhara Volam { 4052baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4053baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4054baaa08d1SVasundhara Volam int status; 4055baaa08d1SVasundhara Volam int i, j; 4056baaa08d1SVasundhara Volam 4057baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4058baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4059e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4060e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4061e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4062baaa08d1SVasundhara Volam if (!extfat_cmd.va) 4063baaa08d1SVasundhara Volam return -ENOMEM; 4064baaa08d1SVasundhara Volam 4065baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4066baaa08d1SVasundhara Volam if (status) 4067baaa08d1SVasundhara Volam goto err; 4068baaa08d1SVasundhara Volam 4069baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 4070baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 4071baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 4072baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 407303d28ffeSKalesh AP 4074baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 4075baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 4076baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 4077baaa08d1SVasundhara Volam cpu_to_le32(level); 4078baaa08d1SVasundhara Volam } 4079baaa08d1SVasundhara Volam } 4080baaa08d1SVasundhara Volam 4081baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 4082baaa08d1SVasundhara Volam err: 4083e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4084baaa08d1SVasundhara Volam extfat_cmd.dma); 4085baaa08d1SVasundhara Volam return status; 4086baaa08d1SVasundhara Volam } 4087baaa08d1SVasundhara Volam 4088baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 4089baaa08d1SVasundhara Volam { 4090baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4091baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4092baaa08d1SVasundhara Volam int status, j; 4093baaa08d1SVasundhara Volam int level = 0; 4094baaa08d1SVasundhara Volam 4095baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4096baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4097e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4098e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4099e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4100baaa08d1SVasundhara Volam 4101baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 4102baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 4103baaa08d1SVasundhara Volam __func__); 4104baaa08d1SVasundhara Volam goto err; 4105baaa08d1SVasundhara Volam } 4106baaa08d1SVasundhara Volam 4107baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4108baaa08d1SVasundhara Volam if (!status) { 4109baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 4110baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 411103d28ffeSKalesh AP 4112baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 4113baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 4114baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 4115baaa08d1SVasundhara Volam } 4116baaa08d1SVasundhara Volam } 4117e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4118baaa08d1SVasundhara Volam extfat_cmd.dma); 4119baaa08d1SVasundhara Volam err: 4120baaa08d1SVasundhara Volam return level; 4121baaa08d1SVasundhara Volam } 4122baaa08d1SVasundhara Volam 4123941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 4124941a77d5SSomnath Kotur struct be_dma_mem *cmd) 4125941a77d5SSomnath Kotur { 4126941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4127941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 4128941a77d5SSomnath Kotur int status; 4129941a77d5SSomnath Kotur 4130941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 4131941a77d5SSomnath Kotur return -1; 4132941a77d5SSomnath Kotur 4133941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 4134941a77d5SSomnath Kotur if (!wrb) { 4135941a77d5SSomnath Kotur status = -EBUSY; 4136941a77d5SSomnath Kotur goto err; 4137941a77d5SSomnath Kotur } 4138941a77d5SSomnath Kotur 4139941a77d5SSomnath Kotur req = cmd->va; 4140941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4141941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 4142941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4143941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 4144941a77d5SSomnath Kotur 4145941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 4146941a77d5SSomnath Kotur err: 4147941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 4148941a77d5SSomnath Kotur return status; 4149941a77d5SSomnath Kotur } 4150941a77d5SSomnath Kotur 4151941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 4152941a77d5SSomnath Kotur struct be_dma_mem *cmd, 4153941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 4154941a77d5SSomnath Kotur { 4155941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4156941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 4157941a77d5SSomnath Kotur int status; 4158941a77d5SSomnath Kotur 4159b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4160941a77d5SSomnath Kotur 4161941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 4162941a77d5SSomnath Kotur if (!wrb) { 4163941a77d5SSomnath Kotur status = -EBUSY; 4164941a77d5SSomnath Kotur goto err; 4165941a77d5SSomnath Kotur } 4166941a77d5SSomnath Kotur 4167941a77d5SSomnath Kotur req = cmd->va; 4168941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 4169941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4170941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 4171941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4172941a77d5SSomnath Kotur 4173941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 4174941a77d5SSomnath Kotur err: 4175b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4176941a77d5SSomnath Kotur return status; 41774762f6ceSAjit Khaparde } 41786a4ab669SParav Pandit 417921252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter) 4180b4e32a71SPadmanabh Ratnakar { 4181b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 418221252377SVasundhara Volam struct be_mcc_wrb *wrb; 4183b4e32a71SPadmanabh Ratnakar int status; 4184b4e32a71SPadmanabh Ratnakar 418521252377SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 418621252377SVasundhara Volam return -1; 4187b4e32a71SPadmanabh Ratnakar 418821252377SVasundhara Volam wrb = wrb_from_mbox(adapter); 4189b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 4190b4e32a71SPadmanabh Ratnakar 4191b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4192b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 4193b4e32a71SPadmanabh Ratnakar NULL); 419421252377SVasundhara Volam if (!BEx_chip(adapter)) 4195b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 4196b4e32a71SPadmanabh Ratnakar 419721252377SVasundhara Volam status = be_mbox_notify_wait(adapter); 4198b4e32a71SPadmanabh Ratnakar if (!status) { 4199b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 420003d28ffeSKalesh AP 420121252377SVasundhara Volam adapter->port_name = resp->port_name[adapter->hba_port_num]; 4202b4e32a71SPadmanabh Ratnakar } else { 420321252377SVasundhara Volam adapter->port_name = adapter->hba_port_num + '0'; 4204b4e32a71SPadmanabh Ratnakar } 420521252377SVasundhara Volam 420621252377SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4207b4e32a71SPadmanabh Ratnakar return status; 4208b4e32a71SPadmanabh Ratnakar } 4209b4e32a71SPadmanabh Ratnakar 4210980df249SSuresh Reddy /* When more than 1 NIC descriptor is present in the descriptor list, 4211980df249SSuresh Reddy * the caller must specify the pf_num to obtain the NIC descriptor 4212980df249SSuresh Reddy * corresponding to its pci function. 4213980df249SSuresh Reddy * get_vft must be true when the caller wants the VF-template desc of the 4214980df249SSuresh Reddy * PF-pool. 4215980df249SSuresh Reddy * The pf_num should be set to PF_NUM_IGNORE when the caller knows 4216980df249SSuresh Reddy * that only it's NIC descriptor is present in the descriptor list. 4217980df249SSuresh Reddy */ 421810cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 4219980df249SSuresh Reddy bool get_vft, u8 pf_num) 4220abb93951SPadmanabh Ratnakar { 4221150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 422210cccf60SVasundhara Volam struct be_nic_res_desc *nic; 4223abb93951SPadmanabh Ratnakar int i; 4224abb93951SPadmanabh Ratnakar 4225abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 4226150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 422710cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 422810cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 4229980df249SSuresh Reddy 4230980df249SSuresh Reddy if ((pf_num == PF_NUM_IGNORE || 4231980df249SSuresh Reddy nic->pf_num == pf_num) && 4232980df249SSuresh Reddy (!get_vft || nic->flags & BIT(VFT_SHIFT))) 423310cccf60SVasundhara Volam return nic; 423410cccf60SVasundhara Volam } 4235150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4236150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4237150d58c7SVasundhara Volam } 4238950e2958SWei Yang return NULL; 4239abb93951SPadmanabh Ratnakar } 4240abb93951SPadmanabh Ratnakar 4241980df249SSuresh Reddy static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count, 4242980df249SSuresh Reddy u8 pf_num) 424310cccf60SVasundhara Volam { 4244980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, true, pf_num); 424510cccf60SVasundhara Volam } 424610cccf60SVasundhara Volam 4247980df249SSuresh Reddy static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count, 4248980df249SSuresh Reddy u8 pf_num) 424910cccf60SVasundhara Volam { 4250980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, false, pf_num); 425110cccf60SVasundhara Volam } 425210cccf60SVasundhara Volam 4253980df249SSuresh Reddy static struct be_pcie_res_desc *be_get_pcie_desc(u8 *buf, u32 desc_count, 4254980df249SSuresh Reddy u8 pf_num) 4255150d58c7SVasundhara Volam { 4256150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4257150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4258150d58c7SVasundhara Volam int i; 4259150d58c7SVasundhara Volam 4260150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 4261980df249SSuresh Reddy if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4262980df249SSuresh Reddy hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4263150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 4264980df249SSuresh Reddy if (pcie->pf_num == pf_num) 4265150d58c7SVasundhara Volam return pcie; 4266150d58c7SVasundhara Volam } 4267150d58c7SVasundhara Volam 4268150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4269150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4270150d58c7SVasundhara Volam } 4271abb93951SPadmanabh Ratnakar return NULL; 4272abb93951SPadmanabh Ratnakar } 4273abb93951SPadmanabh Ratnakar 4274f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 4275f93f160bSVasundhara Volam { 4276f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4277f93f160bSVasundhara Volam int i; 4278f93f160bSVasundhara Volam 4279f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 4280f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 4281f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 4282f93f160bSVasundhara Volam 4283f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4284f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4285f93f160bSVasundhara Volam } 4286f93f160bSVasundhara Volam return NULL; 4287f93f160bSVasundhara Volam } 4288f93f160bSVasundhara Volam 428992bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 429092bf14abSSathya Perla struct be_nic_res_desc *desc) 429192bf14abSSathya Perla { 429292bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 429392bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 429492bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 429592bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 429692bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 429792bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 429892bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 4299f2858738SVasundhara Volam res->max_cq_count = le16_to_cpu(desc->cq_count); 4300f2858738SVasundhara Volam res->max_iface_count = le16_to_cpu(desc->iface_count); 4301f2858738SVasundhara Volam res->max_mcc_count = le16_to_cpu(desc->mcc_count); 430292bf14abSSathya Perla /* Clear flags that driver is not interested in */ 430392bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 430492bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 430592bf14abSSathya Perla } 430692bf14abSSathya Perla 4307abb93951SPadmanabh Ratnakar /* Uses Mbox */ 430892bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 4309abb93951SPadmanabh Ratnakar { 4310abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4311abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 4312abb93951SPadmanabh Ratnakar int status; 4313abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 4314abb93951SPadmanabh Ratnakar 4315d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4316d98ef50fSSuresh Reddy return -1; 4317d98ef50fSSuresh Reddy 4318abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 4319abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 4320e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4321e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4322abb93951SPadmanabh Ratnakar if (!cmd.va) { 4323abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 4324d98ef50fSSuresh Reddy status = -ENOMEM; 4325d98ef50fSSuresh Reddy goto err; 4326abb93951SPadmanabh Ratnakar } 4327abb93951SPadmanabh Ratnakar 4328abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 4329abb93951SPadmanabh Ratnakar if (!wrb) { 4330abb93951SPadmanabh Ratnakar status = -EBUSY; 4331abb93951SPadmanabh Ratnakar goto err; 4332abb93951SPadmanabh Ratnakar } 4333abb93951SPadmanabh Ratnakar 4334abb93951SPadmanabh Ratnakar req = cmd.va; 4335abb93951SPadmanabh Ratnakar 4336abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4337abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 4338abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 4339abb93951SPadmanabh Ratnakar 434028710c55SKalesh AP if (skyhawk_chip(adapter)) 434128710c55SKalesh AP req->hdr.version = 1; 434228710c55SKalesh AP 4343abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 4344abb93951SPadmanabh Ratnakar if (!status) { 4345abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 4346abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 4347150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 4348abb93951SPadmanabh Ratnakar 4349980df249SSuresh Reddy /* GET_FUNC_CONFIG returns resource descriptors of the 4350980df249SSuresh Reddy * current function only. So, pf_num should be set to 4351980df249SSuresh Reddy * PF_NUM_IGNORE. 4352980df249SSuresh Reddy */ 4353980df249SSuresh Reddy desc = be_get_func_nic_desc(resp->func_param, desc_count, 4354980df249SSuresh Reddy PF_NUM_IGNORE); 4355abb93951SPadmanabh Ratnakar if (!desc) { 4356abb93951SPadmanabh Ratnakar status = -EINVAL; 4357abb93951SPadmanabh Ratnakar goto err; 4358abb93951SPadmanabh Ratnakar } 4359980df249SSuresh Reddy 4360980df249SSuresh Reddy /* Store pf_num & vf_num for later use in GET_PROFILE_CONFIG */ 4361980df249SSuresh Reddy adapter->pf_num = desc->pf_num; 4362980df249SSuresh Reddy adapter->vf_num = desc->vf_num; 4363980df249SSuresh Reddy 4364980df249SSuresh Reddy if (res) 436592bf14abSSathya Perla be_copy_nic_desc(res, desc); 4366abb93951SPadmanabh Ratnakar } 4367abb93951SPadmanabh Ratnakar err: 4368abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 4369d98ef50fSSuresh Reddy if (cmd.va) 4370e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4371e51000dbSSriharsha Basavapatna cmd.dma); 4372abb93951SPadmanabh Ratnakar return status; 4373abb93951SPadmanabh Ratnakar } 4374abb93951SPadmanabh Ratnakar 4375de2b1e03SSomnath Kotur /* This routine returns a list of all the NIC PF_nums in the adapter */ 4376de2b1e03SSomnath Kotur u16 be_get_nic_pf_num_list(u8 *buf, u32 desc_count, u16 *nic_pf_nums) 4377de2b1e03SSomnath Kotur { 4378de2b1e03SSomnath Kotur struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4379de2b1e03SSomnath Kotur struct be_pcie_res_desc *pcie = NULL; 4380de2b1e03SSomnath Kotur int i; 4381de2b1e03SSomnath Kotur u16 nic_pf_count = 0; 4382de2b1e03SSomnath Kotur 4383de2b1e03SSomnath Kotur for (i = 0; i < desc_count; i++) { 4384de2b1e03SSomnath Kotur if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4385de2b1e03SSomnath Kotur hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4386de2b1e03SSomnath Kotur pcie = (struct be_pcie_res_desc *)hdr; 4387de2b1e03SSomnath Kotur if (pcie->pf_state && (pcie->pf_type == MISSION_NIC || 4388de2b1e03SSomnath Kotur pcie->pf_type == MISSION_RDMA)) { 4389de2b1e03SSomnath Kotur nic_pf_nums[nic_pf_count++] = pcie->pf_num; 4390de2b1e03SSomnath Kotur } 4391de2b1e03SSomnath Kotur } 4392de2b1e03SSomnath Kotur 4393de2b1e03SSomnath Kotur hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4394de2b1e03SSomnath Kotur hdr = (void *)hdr + hdr->desc_len; 4395de2b1e03SSomnath Kotur } 4396de2b1e03SSomnath Kotur return nic_pf_count; 4397de2b1e03SSomnath Kotur } 4398de2b1e03SSomnath Kotur 4399980df249SSuresh Reddy /* Will use MBOX only if MCCQ has not been created */ 440092bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 4401de2b1e03SSomnath Kotur struct be_resources *res, 4402de2b1e03SSomnath Kotur struct be_port_resources *port_res, 4403de2b1e03SSomnath Kotur u8 profile_type, u8 query, u8 domain) 4404a05f99dbSVasundhara Volam { 4405150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 4406ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 440710cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 4408150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4409f93f160bSVasundhara Volam struct be_port_res_desc *port; 4410150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 4411ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 4412a05f99dbSVasundhara Volam struct be_dma_mem cmd; 4413f2858738SVasundhara Volam u16 desc_count; 4414a05f99dbSVasundhara Volam int status; 4415a05f99dbSVasundhara Volam 4416a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4417a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 4418e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4419e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4420150d58c7SVasundhara Volam if (!cmd.va) 4421a05f99dbSVasundhara Volam return -ENOMEM; 4422a05f99dbSVasundhara Volam 4423ba48c0c9SVasundhara Volam req = cmd.va; 4424ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4425ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 4426ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 4427ba48c0c9SVasundhara Volam 4428ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 4429ba48c0c9SVasundhara Volam req->hdr.version = 1; 4430de2b1e03SSomnath Kotur req->type = profile_type; 443172ef3a88SSomnath Kotur req->hdr.domain = domain; 4432ba48c0c9SVasundhara Volam 4433f2858738SVasundhara Volam /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the 4434f2858738SVasundhara Volam * descriptors with all bits set to "1" for the fields which can be 4435f2858738SVasundhara Volam * modified using SET_PROFILE_CONFIG cmd. 4436f2858738SVasundhara Volam */ 4437f2858738SVasundhara Volam if (query == RESOURCE_MODIFIABLE) 4438f2858738SVasundhara Volam req->type |= QUERY_MODIFIABLE_FIELDS_TYPE; 4439f2858738SVasundhara Volam 4440ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4441150d58c7SVasundhara Volam if (status) 4442abb93951SPadmanabh Ratnakar goto err; 4443150d58c7SVasundhara Volam 4444150d58c7SVasundhara Volam resp = cmd.va; 4445f2858738SVasundhara Volam desc_count = le16_to_cpu(resp->desc_count); 4446150d58c7SVasundhara Volam 4447de2b1e03SSomnath Kotur if (port_res) { 4448de2b1e03SSomnath Kotur u16 nic_pf_cnt = 0, i; 4449de2b1e03SSomnath Kotur u16 nic_pf_num_list[MAX_NIC_FUNCS]; 4450de2b1e03SSomnath Kotur 4451de2b1e03SSomnath Kotur nic_pf_cnt = be_get_nic_pf_num_list(resp->func_param, 4452de2b1e03SSomnath Kotur desc_count, 4453de2b1e03SSomnath Kotur nic_pf_num_list); 4454de2b1e03SSomnath Kotur 4455de2b1e03SSomnath Kotur for (i = 0; i < nic_pf_cnt; i++) { 4456de2b1e03SSomnath Kotur nic = be_get_func_nic_desc(resp->func_param, desc_count, 4457de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4458de2b1e03SSomnath Kotur if (nic->link_param == adapter->port_num) { 4459de2b1e03SSomnath Kotur port_res->nic_pfs++; 4460de2b1e03SSomnath Kotur pcie = be_get_pcie_desc(resp->func_param, 4461de2b1e03SSomnath Kotur desc_count, 4462de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4463de2b1e03SSomnath Kotur port_res->max_vfs += le16_to_cpu(pcie->num_vfs); 4464de2b1e03SSomnath Kotur } 4465de2b1e03SSomnath Kotur } 4466de2b1e03SSomnath Kotur return status; 4467de2b1e03SSomnath Kotur } 4468de2b1e03SSomnath Kotur 4469980df249SSuresh Reddy pcie = be_get_pcie_desc(resp->func_param, desc_count, 4470980df249SSuresh Reddy adapter->pf_num); 4471150d58c7SVasundhara Volam if (pcie) 447292bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 4473150d58c7SVasundhara Volam 4474f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 4475f93f160bSVasundhara Volam if (port) 4476f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 4477f93f160bSVasundhara Volam 4478980df249SSuresh Reddy nic = be_get_func_nic_desc(resp->func_param, desc_count, 4479980df249SSuresh Reddy adapter->pf_num); 448092bf14abSSathya Perla if (nic) 448192bf14abSSathya Perla be_copy_nic_desc(res, nic); 448292bf14abSSathya Perla 4483980df249SSuresh Reddy vf_res = be_get_vft_desc(resp->func_param, desc_count, 4484980df249SSuresh Reddy adapter->pf_num); 448510cccf60SVasundhara Volam if (vf_res) 448610cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 4487abb93951SPadmanabh Ratnakar err: 4488a05f99dbSVasundhara Volam if (cmd.va) 4489e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4490e51000dbSSriharsha Basavapatna cmd.dma); 4491abb93951SPadmanabh Ratnakar return status; 4492abb93951SPadmanabh Ratnakar } 4493abb93951SPadmanabh Ratnakar 4494bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 4495bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 4496bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 4497d5c18473SPadmanabh Ratnakar { 4498d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 4499bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 4500bec84e6bSVasundhara Volam struct be_dma_mem cmd; 4501d5c18473SPadmanabh Ratnakar int status; 4502d5c18473SPadmanabh Ratnakar 4503bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4504bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 4505e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4506e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4507bec84e6bSVasundhara Volam if (!cmd.va) 4508bec84e6bSVasundhara Volam return -ENOMEM; 4509d5c18473SPadmanabh Ratnakar 4510bec84e6bSVasundhara Volam req = cmd.va; 4511d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4512bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 4513bec84e6bSVasundhara Volam &wrb, &cmd); 4514a401801cSSathya Perla req->hdr.version = version; 4515d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 4516bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 4517a401801cSSathya Perla memcpy(req->desc, desc, size); 4518d5c18473SPadmanabh Ratnakar 4519bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4520bec84e6bSVasundhara Volam 4521bec84e6bSVasundhara Volam if (cmd.va) 4522e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4523e51000dbSSriharsha Basavapatna cmd.dma); 4524d5c18473SPadmanabh Ratnakar return status; 4525d5c18473SPadmanabh Ratnakar } 4526d5c18473SPadmanabh Ratnakar 4527a401801cSSathya Perla /* Mark all fields invalid */ 4528b9263cbfSSuresh Reddy void be_reset_nic_desc(struct be_nic_res_desc *nic) 4529a401801cSSathya Perla { 4530a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 4531a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 4532a401801cSSathya Perla nic->mcc_count = 0xFFFF; 4533a401801cSSathya Perla nic->vlan_count = 0xFFFF; 4534a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 4535a401801cSSathya Perla nic->txq_count = 0xFFFF; 4536a401801cSSathya Perla nic->rq_count = 0xFFFF; 4537a401801cSSathya Perla nic->rssq_count = 0xFFFF; 4538a401801cSSathya Perla nic->lro_count = 0xFFFF; 4539a401801cSSathya Perla nic->cq_count = 0xFFFF; 4540a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 4541a401801cSSathya Perla nic->eq_count = 0xFFFF; 45420f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 4543a401801cSSathya Perla nic->link_param = 0xFF; 45440f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 4545a401801cSSathya Perla nic->acpi_params = 0xFF; 4546a401801cSSathya Perla nic->wol_param = 0x0F; 45470f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 45480f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 4549bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 4550a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 4551a401801cSSathya Perla } 4552a401801cSSathya Perla 4553bec84e6bSVasundhara Volam /* Mark all fields invalid */ 4554bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 4555bec84e6bSVasundhara Volam { 4556bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 4557bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 4558bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 4559bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 4560bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 4561bec84e6bSVasundhara Volam } 4562bec84e6bSVasundhara Volam 45630f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 45640f77ba73SRavikumar Nelavelli u8 domain) 4565a401801cSSathya Perla { 4566a401801cSSathya Perla struct be_nic_res_desc nic_desc; 45670f77ba73SRavikumar Nelavelli u32 bw_percent; 45680f77ba73SRavikumar Nelavelli u16 version = 0; 45690f77ba73SRavikumar Nelavelli 45700f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 45710f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 4572a401801cSSathya Perla 4573a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 4574980df249SSuresh Reddy nic_desc.pf_num = adapter->pf_num; 45750f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 457658bdeaa6SKalesh AP nic_desc.bw_min = 0; 45770f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 4578a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 4579a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 4580a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 4581a401801cSSathya Perla (1 << NOSV_SHIFT); 45820f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 45830f77ba73SRavikumar Nelavelli } else { 45840f77ba73SRavikumar Nelavelli version = 1; 45850f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 45860f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 45870f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 45880f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 45890f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 45900f77ba73SRavikumar Nelavelli } 4591a401801cSSathya Perla 4592a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 45930f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 4594bec84e6bSVasundhara Volam 1, version, domain); 4595bec84e6bSVasundhara Volam } 4596bec84e6bSVasundhara Volam 4597bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 4598f2858738SVasundhara Volam struct be_resources pool_res, u16 num_vfs, 4599b9263cbfSSuresh Reddy struct be_resources *vft_res) 4600bec84e6bSVasundhara Volam { 4601bec84e6bSVasundhara Volam struct { 4602bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 4603bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 4604bec84e6bSVasundhara Volam } __packed desc; 4605bec84e6bSVasundhara Volam 4606bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 4607bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 4608bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 4609bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4610f2858738SVasundhara Volam desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4611bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 4612bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 4613bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 4614bec84e6bSVasundhara Volam 4615bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 4616bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 4617bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 4618bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4619b9263cbfSSuresh Reddy desc.nic_vft.flags = vft_res->flags | BIT(VFT_SHIFT) | 4620b9263cbfSSuresh Reddy BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4621bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 4622bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 4623b9263cbfSSuresh Reddy desc.nic_vft.cap_flags = cpu_to_le32(vft_res->vf_if_cap_flags); 4624b9263cbfSSuresh Reddy desc.nic_vft.rq_count = cpu_to_le16(vft_res->max_rx_qs); 4625b9263cbfSSuresh Reddy desc.nic_vft.txq_count = cpu_to_le16(vft_res->max_tx_qs); 4626b9263cbfSSuresh Reddy desc.nic_vft.rssq_count = cpu_to_le16(vft_res->max_rss_qs); 4627b9263cbfSSuresh Reddy desc.nic_vft.cq_count = cpu_to_le16(vft_res->max_cq_count); 4628bec84e6bSVasundhara Volam 4629b9263cbfSSuresh Reddy if (vft_res->max_uc_mac) 4630b9263cbfSSuresh Reddy desc.nic_vft.unicast_mac_count = 4631b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_uc_mac); 4632b9263cbfSSuresh Reddy if (vft_res->max_vlans) 4633b9263cbfSSuresh Reddy desc.nic_vft.vlan_count = cpu_to_le16(vft_res->max_vlans); 4634b9263cbfSSuresh Reddy if (vft_res->max_iface_count) 4635b9263cbfSSuresh Reddy desc.nic_vft.iface_count = 4636b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_iface_count); 4637b9263cbfSSuresh Reddy if (vft_res->max_mcc_count) 4638b9263cbfSSuresh Reddy desc.nic_vft.mcc_count = cpu_to_le16(vft_res->max_mcc_count); 4639bec84e6bSVasundhara Volam 4640bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 4641bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 4642a401801cSSathya Perla } 4643a401801cSSathya Perla 4644a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 4645a401801cSSathya Perla { 4646a401801cSSathya Perla struct be_mcc_wrb *wrb; 4647a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 4648a401801cSSathya Perla int status; 4649a401801cSSathya Perla 4650a401801cSSathya Perla if (iface == 0xFFFFFFFF) 4651a401801cSSathya Perla return -1; 4652a401801cSSathya Perla 4653b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4654a401801cSSathya Perla 4655a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 4656a401801cSSathya Perla if (!wrb) { 4657a401801cSSathya Perla status = -EBUSY; 4658a401801cSSathya Perla goto err; 4659a401801cSSathya Perla } 4660a401801cSSathya Perla req = embedded_payload(wrb); 4661a401801cSSathya Perla 4662a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4663a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 4664a401801cSSathya Perla wrb, NULL); 4665a401801cSSathya Perla req->op = op; 4666a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 4667a401801cSSathya Perla 4668a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 4669a401801cSSathya Perla err: 4670b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4671a401801cSSathya Perla return status; 4672a401801cSSathya Perla } 4673a401801cSSathya Perla 4674a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 4675a401801cSSathya Perla { 4676a401801cSSathya Perla struct be_port_res_desc port_desc; 4677a401801cSSathya Perla 4678a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 4679a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 4680a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4681a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 4682a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 4683a401801cSSathya Perla if (port) { 4684a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 4685a401801cSSathya Perla (1 << RCVID_SHIFT); 4686a401801cSSathya Perla port_desc.nv_port = swab16(port); 4687a401801cSSathya Perla } else { 4688a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 4689a401801cSSathya Perla port_desc.nv_port = 0; 4690a401801cSSathya Perla } 4691a401801cSSathya Perla 4692a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 4693bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 4694a401801cSSathya Perla } 4695a401801cSSathya Perla 46964c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 46974c876616SSathya Perla int vf_num) 46984c876616SSathya Perla { 46994c876616SSathya Perla struct be_mcc_wrb *wrb; 47004c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 47014c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 47024c876616SSathya Perla int status; 47034c876616SSathya Perla 4704b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 47054c876616SSathya Perla 47064c876616SSathya Perla wrb = wrb_from_mccq(adapter); 47074c876616SSathya Perla if (!wrb) { 47084c876616SSathya Perla status = -EBUSY; 47094c876616SSathya Perla goto err; 47104c876616SSathya Perla } 47114c876616SSathya Perla req = embedded_payload(wrb); 47124c876616SSathya Perla 47134c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 47144c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 47154c876616SSathya Perla wrb, NULL); 47164c876616SSathya Perla req->hdr.domain = vf_num + 1; 47174c876616SSathya Perla 47184c876616SSathya Perla status = be_mcc_notify_wait(adapter); 47194c876616SSathya Perla if (!status) { 47204c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 47214c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 47224c876616SSathya Perla } 47234c876616SSathya Perla 47244c876616SSathya Perla err: 4725b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 47264c876616SSathya Perla return status; 47274c876616SSathya Perla } 47284c876616SSathya Perla 47295c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 47305c510811SSomnath Kotur { 47315c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 47325c510811SSomnath Kotur u32 reg_val; 47335c510811SSomnath Kotur int status = 0, i; 47345c510811SSomnath Kotur 47355c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 47365c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 47375c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 47385c510811SSomnath Kotur break; 47395c510811SSomnath Kotur 47405c510811SSomnath Kotur ssleep(1); 47415c510811SSomnath Kotur } 47425c510811SSomnath Kotur 47435c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 47445c510811SSomnath Kotur status = -1; 47455c510811SSomnath Kotur 47465c510811SSomnath Kotur return status; 47475c510811SSomnath Kotur } 47485c510811SSomnath Kotur 47495c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 47505c510811SSomnath Kotur { 47515c510811SSomnath Kotur int status = 0; 47525c510811SSomnath Kotur 47535c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47545c510811SSomnath Kotur if (status) 47555c510811SSomnath Kotur return status; 47565c510811SSomnath Kotur 47575c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 47585c510811SSomnath Kotur 47595c510811SSomnath Kotur return status; 47605c510811SSomnath Kotur } 47615c510811SSomnath Kotur 47625c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 47635c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 47645c510811SSomnath Kotur { 47655c510811SSomnath Kotur u32 sliport_status = 0; 47665c510811SSomnath Kotur 47675c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 47685c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 47695c510811SSomnath Kotur } 47705c510811SSomnath Kotur 47715c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 47725c510811SSomnath Kotur { 4773f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 47745c510811SSomnath Kotur int status; 47755c510811SSomnath Kotur 4776f0613380SKalesh AP if (dump_present(adapter)) { 4777f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 4778f0613380SKalesh AP return -EEXIST; 4779f0613380SKalesh AP } 4780f0613380SKalesh AP 47815c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 47825c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 47835c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 47845c510811SSomnath Kotur if (status < 0) { 4785f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 47865c510811SSomnath Kotur return status; 47875c510811SSomnath Kotur } 47885c510811SSomnath Kotur 47895c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47905c510811SSomnath Kotur if (status) 47915c510811SSomnath Kotur return status; 47925c510811SSomnath Kotur 47935c510811SSomnath Kotur if (!dump_present(adapter)) { 4794f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 4795f0613380SKalesh AP return -EIO; 47965c510811SSomnath Kotur } 47975c510811SSomnath Kotur 47985c510811SSomnath Kotur return 0; 47995c510811SSomnath Kotur } 48005c510811SSomnath Kotur 4801f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 4802f0613380SKalesh AP { 4803f0613380SKalesh AP int status; 4804f0613380SKalesh AP 4805f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 4806f0613380SKalesh AP return be_cmd_status(status); 4807f0613380SKalesh AP } 4808f0613380SKalesh AP 4809dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 4810dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 4811dcf7ebbaSPadmanabh Ratnakar { 4812dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4813dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 4814dcf7ebbaSPadmanabh Ratnakar int status; 4815dcf7ebbaSPadmanabh Ratnakar 48160599863dSVasundhara Volam if (BEx_chip(adapter)) 4817dcf7ebbaSPadmanabh Ratnakar return 0; 4818dcf7ebbaSPadmanabh Ratnakar 4819b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4820dcf7ebbaSPadmanabh Ratnakar 4821dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4822dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4823dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4824dcf7ebbaSPadmanabh Ratnakar goto err; 4825dcf7ebbaSPadmanabh Ratnakar } 4826dcf7ebbaSPadmanabh Ratnakar 4827dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4828dcf7ebbaSPadmanabh Ratnakar 4829dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4830dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4831dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4832dcf7ebbaSPadmanabh Ratnakar 4833dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4834dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4835dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4836dcf7ebbaSPadmanabh Ratnakar err: 4837b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4838dcf7ebbaSPadmanabh Ratnakar return status; 4839dcf7ebbaSPadmanabh Ratnakar } 4840dcf7ebbaSPadmanabh Ratnakar 484168c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 484268c45a2dSSomnath Kotur { 484368c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 484468c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 484568c45a2dSSomnath Kotur int status; 484668c45a2dSSomnath Kotur 484768c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 484868c45a2dSSomnath Kotur return -1; 484968c45a2dSSomnath Kotur 485068c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 485168c45a2dSSomnath Kotur 485268c45a2dSSomnath Kotur req = embedded_payload(wrb); 485368c45a2dSSomnath Kotur 485468c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 485568c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 485668c45a2dSSomnath Kotur wrb, NULL); 485768c45a2dSSomnath Kotur 485868c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 485968c45a2dSSomnath Kotur 486068c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 486168c45a2dSSomnath Kotur 486268c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 486368c45a2dSSomnath Kotur return status; 486468c45a2dSSomnath Kotur } 486568c45a2dSSomnath Kotur 4866542963b7SVasundhara Volam /* Uses MBOX */ 4867542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4868542963b7SVasundhara Volam { 4869542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4870542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4871542963b7SVasundhara Volam int status; 4872542963b7SVasundhara Volam 4873542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4874542963b7SVasundhara Volam return -1; 4875542963b7SVasundhara Volam 4876542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4877542963b7SVasundhara Volam if (!wrb) { 4878542963b7SVasundhara Volam status = -EBUSY; 4879542963b7SVasundhara Volam goto err; 4880542963b7SVasundhara Volam } 4881542963b7SVasundhara Volam 4882542963b7SVasundhara Volam req = embedded_payload(wrb); 4883542963b7SVasundhara Volam 4884542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4885542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4886542963b7SVasundhara Volam wrb, NULL); 4887542963b7SVasundhara Volam 4888542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4889542963b7SVasundhara Volam if (!status) { 4890542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4891542963b7SVasundhara Volam embedded_payload(wrb); 489203d28ffeSKalesh AP 4893542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4894542963b7SVasundhara Volam } 4895542963b7SVasundhara Volam 4896542963b7SVasundhara Volam err: 4897542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4898542963b7SVasundhara Volam return status; 4899542963b7SVasundhara Volam } 4900542963b7SVasundhara Volam 4901d9d426afSSuresh Reddy int __be_cmd_set_logical_link_config(struct be_adapter *adapter, 4902d9d426afSSuresh Reddy int link_state, int version, u8 domain) 4903bdce2ad7SSuresh Reddy { 4904bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 4905bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 4906bdce2ad7SSuresh Reddy int status; 4907bdce2ad7SSuresh Reddy 4908b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4909bdce2ad7SSuresh Reddy 4910bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4911bdce2ad7SSuresh Reddy if (!wrb) { 4912bdce2ad7SSuresh Reddy status = -EBUSY; 4913bdce2ad7SSuresh Reddy goto err; 4914bdce2ad7SSuresh Reddy } 4915bdce2ad7SSuresh Reddy 4916bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4917bdce2ad7SSuresh Reddy 4918bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4919bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4920bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4921bdce2ad7SSuresh Reddy 4922d9d426afSSuresh Reddy req->hdr.version = version; 4923bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4924bdce2ad7SSuresh Reddy 4925d9d426afSSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE || 4926d9d426afSSuresh Reddy link_state == IFLA_VF_LINK_STATE_AUTO) 4927d9d426afSSuresh Reddy req->link_config |= PLINK_ENABLE; 4928bdce2ad7SSuresh Reddy 4929bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 4930d9d426afSSuresh Reddy req->link_config |= PLINK_TRACK; 4931bdce2ad7SSuresh Reddy 4932bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4933bdce2ad7SSuresh Reddy err: 4934b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4935bdce2ad7SSuresh Reddy return status; 4936bdce2ad7SSuresh Reddy } 4937bdce2ad7SSuresh Reddy 4938d9d426afSSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4939d9d426afSSuresh Reddy int link_state, u8 domain) 4940d9d426afSSuresh Reddy { 4941d9d426afSSuresh Reddy int status; 4942d9d426afSSuresh Reddy 4943d9d426afSSuresh Reddy if (BEx_chip(adapter)) 4944d9d426afSSuresh Reddy return -EOPNOTSUPP; 4945d9d426afSSuresh Reddy 4946d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4947d9d426afSSuresh Reddy 2, domain); 4948d9d426afSSuresh Reddy 4949d9d426afSSuresh Reddy /* Version 2 of the command will not be recognized by older FW. 4950d9d426afSSuresh Reddy * On such a failure issue version 1 of the command. 4951d9d426afSSuresh Reddy */ 4952d9d426afSSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST) 4953d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4954d9d426afSSuresh Reddy 1, domain); 4955d9d426afSSuresh Reddy return status; 4956d9d426afSSuresh Reddy } 49576a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 49586a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 49596a4ab669SParav Pandit { 49606a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 49616a4ab669SParav Pandit struct be_mcc_wrb *wrb; 49626a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 49636a4ab669SParav Pandit struct be_cmd_req_hdr *req; 49646a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 49656a4ab669SParav Pandit int status; 49666a4ab669SParav Pandit 4967b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 49686a4ab669SParav Pandit 49696a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 49706a4ab669SParav Pandit if (!wrb) { 49716a4ab669SParav Pandit status = -EBUSY; 49726a4ab669SParav Pandit goto err; 49736a4ab669SParav Pandit } 49746a4ab669SParav Pandit req = embedded_payload(wrb); 49756a4ab669SParav Pandit resp = embedded_payload(wrb); 49766a4ab669SParav Pandit 49776a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 49786a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 49796a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 49806a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 49816a4ab669SParav Pandit 49826a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 49836a4ab669SParav Pandit if (cmd_status) 49846a4ab669SParav Pandit *cmd_status = (status & 0xffff); 49856a4ab669SParav Pandit if (ext_status) 49866a4ab669SParav Pandit *ext_status = 0; 49876a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 49886a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 49896a4ab669SParav Pandit err: 4990b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 49916a4ab669SParav Pandit return status; 49926a4ab669SParav Pandit } 49936a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 4994