19aebddd1SJeff Kirsher /* 240263820SVasundhara Volam * Copyright (C) 2005 - 2014 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 56f25b119cSPadmanabh Ratnakar { 57f25b119cSPadmanabh Ratnakar int i; 58f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 59f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 60f25b119cSPadmanabh Ratnakar 61f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 62f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 63f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 64f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 65f25b119cSPadmanabh Ratnakar return false; 66f25b119cSPadmanabh Ratnakar 67f25b119cSPadmanabh Ratnakar return true; 68f25b119cSPadmanabh Ratnakar } 69f25b119cSPadmanabh Ratnakar 703de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 713de09455SSomnath Kotur { 723de09455SSomnath Kotur return wrb->payload.embedded_payload; 733de09455SSomnath Kotur } 749aebddd1SJeff Kirsher 759aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 769aebddd1SJeff Kirsher { 779aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 789aebddd1SJeff Kirsher u32 val = 0; 799aebddd1SJeff Kirsher 806589ade0SSathya Perla if (be_error(adapter)) 819aebddd1SJeff Kirsher return; 829aebddd1SJeff Kirsher 839aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 849aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 859aebddd1SJeff Kirsher 869aebddd1SJeff Kirsher wmb(); 879aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 889aebddd1SJeff Kirsher } 899aebddd1SJeff Kirsher 909aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 919aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 929aebddd1SJeff Kirsher * little endian) */ 939aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 949aebddd1SJeff Kirsher { 959e9ff4b7SSathya Perla u32 flags; 969e9ff4b7SSathya Perla 979aebddd1SJeff Kirsher if (compl->flags != 0) { 989e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 999e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1009e9ff4b7SSathya Perla compl->flags = flags; 1019aebddd1SJeff Kirsher return true; 1029aebddd1SJeff Kirsher } 1039aebddd1SJeff Kirsher } 1049e9ff4b7SSathya Perla return false; 1059e9ff4b7SSathya Perla } 1069aebddd1SJeff Kirsher 1079aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1089aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1099aebddd1SJeff Kirsher { 1109aebddd1SJeff Kirsher compl->flags = 0; 1119aebddd1SJeff Kirsher } 1129aebddd1SJeff Kirsher 113652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 114652bf646SPadmanabh Ratnakar { 115652bf646SPadmanabh Ratnakar unsigned long addr; 116652bf646SPadmanabh Ratnakar 117652bf646SPadmanabh Ratnakar addr = tag1; 118652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 119652bf646SPadmanabh Ratnakar return (void *)addr; 120652bf646SPadmanabh Ratnakar } 121652bf646SPadmanabh Ratnakar 1224c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1234c60005fSKalesh AP { 1244c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1254c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1264c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 1274c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1284c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1294c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1304c60005fSKalesh AP return true; 1314c60005fSKalesh AP else 1324c60005fSKalesh AP return false; 1334c60005fSKalesh AP } 1344c60005fSKalesh AP 135559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 136559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 137559b633fSSathya Perla */ 138559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 139559b633fSSathya Perla struct be_mcc_compl *compl, 140559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 141559b633fSSathya Perla { 142559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 143559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 144559b633fSSathya Perla 145559b633fSSathya Perla if (resp_hdr) { 146559b633fSSathya Perla opcode = resp_hdr->opcode; 147559b633fSSathya Perla subsystem = resp_hdr->subsystem; 148559b633fSSathya Perla } 149559b633fSSathya Perla 150559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 151559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 152559b633fSSathya Perla complete(&adapter->et_cmd_compl); 153559b633fSSathya Perla return; 154559b633fSSathya Perla } 155559b633fSSathya Perla 156559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 157559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 158559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 159559b633fSSathya Perla adapter->flash_status = compl->status; 160559b633fSSathya Perla complete(&adapter->et_cmd_compl); 161559b633fSSathya Perla return; 162559b633fSSathya Perla } 163559b633fSSathya Perla 164559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 165559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 166559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 167559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 168559b633fSSathya Perla be_parse_stats(adapter); 169559b633fSSathya Perla adapter->stats_cmd_sent = false; 170559b633fSSathya Perla return; 171559b633fSSathya Perla } 172559b633fSSathya Perla 173559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 174559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 175559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 176559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 177559b633fSSathya Perla (void *)resp_hdr; 178559b633fSSathya Perla adapter->drv_stats.be_on_die_temperature = 179559b633fSSathya Perla resp->on_die_temperature; 180559b633fSSathya Perla } else { 181559b633fSSathya Perla adapter->be_get_temp_freq = 0; 182559b633fSSathya Perla } 183559b633fSSathya Perla return; 184559b633fSSathya Perla } 185559b633fSSathya Perla } 186559b633fSSathya Perla 1879aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1889aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1899aebddd1SJeff Kirsher { 1904c60005fSKalesh AP enum mcc_base_status base_status; 1914c60005fSKalesh AP enum mcc_addl_status addl_status; 192652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 193652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1949aebddd1SJeff Kirsher 1959aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1969aebddd1SJeff Kirsher * from mcc_wrb */ 1979aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1989aebddd1SJeff Kirsher 1994c60005fSKalesh AP base_status = base_status(compl->status); 2004c60005fSKalesh AP addl_status = addl_status(compl->status); 20196c9b2e4SVasundhara Volam 202652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 203652bf646SPadmanabh Ratnakar if (resp_hdr) { 204652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 205652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 206652bf646SPadmanabh Ratnakar } 207652bf646SPadmanabh Ratnakar 208559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2095eeff635SSuresh Reddy 210559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 211559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 21296c9b2e4SVasundhara Volam 2134c60005fSKalesh AP if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 21497f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 215522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 21697f1d8cdSVasundhara Volam opcode, subsystem); 2179aebddd1SJeff Kirsher } else { 21897f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 21997f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2204c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2219aebddd1SJeff Kirsher } 2229aebddd1SJeff Kirsher } 2234c60005fSKalesh AP return compl->status; 2249aebddd1SJeff Kirsher } 2259aebddd1SJeff Kirsher 2269aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2279aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2283acf19d9SSathya Perla struct be_mcc_compl *compl) 2299aebddd1SJeff Kirsher { 2303acf19d9SSathya Perla struct be_async_event_link_state *evt = 2313acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2323acf19d9SSathya Perla 233b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 23442f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 235b236916aSAjit Khaparde 236bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 237bdce2ad7SSuresh Reddy * notification for physical and logical link. 238bdce2ad7SSuresh Reddy * On other chips just process the logical link 239bdce2ad7SSuresh Reddy * status notification 240bdce2ad7SSuresh Reddy */ 241bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2422e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2432e177a5cSPadmanabh Ratnakar return; 2442e177a5cSPadmanabh Ratnakar 245b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 246b236916aSAjit Khaparde * it may not be received in some cases. 247b236916aSAjit Khaparde */ 248b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 249bdce2ad7SSuresh Reddy be_link_status_update(adapter, 250bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 2519aebddd1SJeff Kirsher } 2529aebddd1SJeff Kirsher 2539aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2549aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2553acf19d9SSathya Perla struct be_mcc_compl *compl) 2569aebddd1SJeff Kirsher { 2573acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 2583acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 2593acf19d9SSathya Perla 2609aebddd1SJeff Kirsher if (evt->valid) { 2619aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2629aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2639aebddd1SJeff Kirsher adapter->recommended_prio = 2649aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2659aebddd1SJeff Kirsher } 2669aebddd1SJeff Kirsher } 2679aebddd1SJeff Kirsher 268323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2699aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2703acf19d9SSathya Perla struct be_mcc_compl *compl) 2719aebddd1SJeff Kirsher { 2723acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 2733acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 2743acf19d9SSathya Perla 275323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 276323ff71eSSathya Perla evt->physical_port == adapter->port_num) 277323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2789aebddd1SJeff Kirsher } 2799aebddd1SJeff Kirsher 2809aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2819aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2823acf19d9SSathya Perla struct be_mcc_compl *compl) 2839aebddd1SJeff Kirsher { 2843acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 2853acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 2863acf19d9SSathya Perla 287bdac85b5SRavikumar Nelavelli if (evt->enabled) { 288939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 289bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 290bdac85b5SRavikumar Nelavelli } else { 2919aebddd1SJeff Kirsher adapter->pvid = 0; 2929aebddd1SJeff Kirsher } 293bdac85b5SRavikumar Nelavelli } 2949aebddd1SJeff Kirsher 2959aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2963acf19d9SSathya Perla struct be_mcc_compl *compl) 2979aebddd1SJeff Kirsher { 2983acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 2993acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 3009aebddd1SJeff Kirsher 3019aebddd1SJeff Kirsher switch (event_type) { 3029aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 3033acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 3049aebddd1SJeff Kirsher break; 3059aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 3063acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 3079aebddd1SJeff Kirsher break; 3089aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 3093acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 3109aebddd1SJeff Kirsher break; 3119aebddd1SJeff Kirsher default: 3129aebddd1SJeff Kirsher break; 3139aebddd1SJeff Kirsher } 3149aebddd1SJeff Kirsher } 3159aebddd1SJeff Kirsher 316bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 3173acf19d9SSathya Perla struct be_mcc_compl *cmp) 318bc0c3405SAjit Khaparde { 319bc0c3405SAjit Khaparde u8 event_type = 0; 320bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 321bc0c3405SAjit Khaparde 3223acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 3233acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 324bc0c3405SAjit Khaparde 325bc0c3405SAjit Khaparde switch (event_type) { 326bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 327bc0c3405SAjit Khaparde if (evt->valid) 328bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 329bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 330bc0c3405SAjit Khaparde break; 331bc0c3405SAjit Khaparde default: 33205ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 33305ccaa2bSVasundhara Volam event_type); 334bc0c3405SAjit Khaparde break; 335bc0c3405SAjit Khaparde } 336bc0c3405SAjit Khaparde } 337bc0c3405SAjit Khaparde 3383acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 3399aebddd1SJeff Kirsher { 3403acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3419aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 3429aebddd1SJeff Kirsher } 3439aebddd1SJeff Kirsher 3443acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 3459aebddd1SJeff Kirsher { 3463acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3473acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 3489aebddd1SJeff Kirsher } 3499aebddd1SJeff Kirsher 3503acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 351bc0c3405SAjit Khaparde { 3523acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3533acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 3543acf19d9SSathya Perla } 3553acf19d9SSathya Perla 3563acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 3573acf19d9SSathya Perla struct be_mcc_compl *compl) 3583acf19d9SSathya Perla { 3593acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 3603acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 3613acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 3623acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 3633acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 3643acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 365bc0c3405SAjit Khaparde } 366bc0c3405SAjit Khaparde 3679aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3689aebddd1SJeff Kirsher { 3699aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3709aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3719aebddd1SJeff Kirsher 3729aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3739aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3749aebddd1SJeff Kirsher return compl; 3759aebddd1SJeff Kirsher } 3769aebddd1SJeff Kirsher return NULL; 3779aebddd1SJeff Kirsher } 3789aebddd1SJeff Kirsher 3799aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3809aebddd1SJeff Kirsher { 3819aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3829aebddd1SJeff Kirsher 3839aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3849aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3859aebddd1SJeff Kirsher 3869aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3879aebddd1SJeff Kirsher } 3889aebddd1SJeff Kirsher 3899aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3909aebddd1SJeff Kirsher { 391a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 392a323d9bfSSathya Perla 3939aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 394a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 395a323d9bfSSathya Perla 396a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3979aebddd1SJeff Kirsher } 3989aebddd1SJeff Kirsher 39910ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 4009aebddd1SJeff Kirsher { 4019aebddd1SJeff Kirsher struct be_mcc_compl *compl; 40210ef9ab4SSathya Perla int num = 0, status = 0; 4039aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 4049aebddd1SJeff Kirsher 405072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 4063acf19d9SSathya Perla 4079aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 4089aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 4093acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 4109aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 41110ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 4129aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 4139aebddd1SJeff Kirsher } 4149aebddd1SJeff Kirsher be_mcc_compl_use(compl); 4159aebddd1SJeff Kirsher num++; 4169aebddd1SJeff Kirsher } 4179aebddd1SJeff Kirsher 41810ef9ab4SSathya Perla if (num) 41910ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 42010ef9ab4SSathya Perla 421072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 42210ef9ab4SSathya Perla return status; 4239aebddd1SJeff Kirsher } 4249aebddd1SJeff Kirsher 4259aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 4269aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 4279aebddd1SJeff Kirsher { 4289aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 42910ef9ab4SSathya Perla int i, status = 0; 4309aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 4319aebddd1SJeff Kirsher 4326589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 4336589ade0SSathya Perla if (be_error(adapter)) 4349aebddd1SJeff Kirsher return -EIO; 4359aebddd1SJeff Kirsher 436072a9c48SAmerigo Wang local_bh_disable(); 43710ef9ab4SSathya Perla status = be_process_mcc(adapter); 438072a9c48SAmerigo Wang local_bh_enable(); 4399aebddd1SJeff Kirsher 4409aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 4419aebddd1SJeff Kirsher break; 4429aebddd1SJeff Kirsher udelay(100); 4439aebddd1SJeff Kirsher } 4449aebddd1SJeff Kirsher if (i == mcc_timeout) { 4456589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4466589ade0SSathya Perla adapter->fw_timeout = true; 447652bf646SPadmanabh Ratnakar return -EIO; 4489aebddd1SJeff Kirsher } 4499aebddd1SJeff Kirsher return status; 4509aebddd1SJeff Kirsher } 4519aebddd1SJeff Kirsher 4529aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4539aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4549aebddd1SJeff Kirsher { 455652bf646SPadmanabh Ratnakar int status; 456652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 457652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 458652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 459652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 460652bf646SPadmanabh Ratnakar 461652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 462652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 463652bf646SPadmanabh Ratnakar 464652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 465652bf646SPadmanabh Ratnakar 4669aebddd1SJeff Kirsher be_mcc_notify(adapter); 467652bf646SPadmanabh Ratnakar 468652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 469652bf646SPadmanabh Ratnakar if (status == -EIO) 470652bf646SPadmanabh Ratnakar goto out; 471652bf646SPadmanabh Ratnakar 4724c60005fSKalesh AP status = (resp->base_status | 4734c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 4744c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 475652bf646SPadmanabh Ratnakar out: 476652bf646SPadmanabh Ratnakar return status; 4779aebddd1SJeff Kirsher } 4789aebddd1SJeff Kirsher 4799aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4809aebddd1SJeff Kirsher { 4819aebddd1SJeff Kirsher int msecs = 0; 4829aebddd1SJeff Kirsher u32 ready; 4839aebddd1SJeff Kirsher 4846589ade0SSathya Perla do { 4856589ade0SSathya Perla if (be_error(adapter)) 4869aebddd1SJeff Kirsher return -EIO; 4879aebddd1SJeff Kirsher 4889aebddd1SJeff Kirsher ready = ioread32(db); 489434b3648SSathya Perla if (ready == 0xffffffff) 4909aebddd1SJeff Kirsher return -1; 4919aebddd1SJeff Kirsher 4929aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4939aebddd1SJeff Kirsher if (ready) 4949aebddd1SJeff Kirsher break; 4959aebddd1SJeff Kirsher 4969aebddd1SJeff Kirsher if (msecs > 4000) { 4976589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4986589ade0SSathya Perla adapter->fw_timeout = true; 499f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 5009aebddd1SJeff Kirsher return -1; 5019aebddd1SJeff Kirsher } 5029aebddd1SJeff Kirsher 5039aebddd1SJeff Kirsher msleep(1); 5049aebddd1SJeff Kirsher msecs++; 5059aebddd1SJeff Kirsher } while (true); 5069aebddd1SJeff Kirsher 5079aebddd1SJeff Kirsher return 0; 5089aebddd1SJeff Kirsher } 5099aebddd1SJeff Kirsher 5109aebddd1SJeff Kirsher /* 5119aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 5129aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 5139aebddd1SJeff Kirsher */ 5149aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 5159aebddd1SJeff Kirsher { 5169aebddd1SJeff Kirsher int status; 5179aebddd1SJeff Kirsher u32 val = 0; 5189aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 5199aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 5209aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 5219aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 5229aebddd1SJeff Kirsher 5239aebddd1SJeff Kirsher /* wait for ready to be set */ 5249aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5259aebddd1SJeff Kirsher if (status != 0) 5269aebddd1SJeff Kirsher return status; 5279aebddd1SJeff Kirsher 5289aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 5299aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 5309aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 5319aebddd1SJeff Kirsher iowrite32(val, db); 5329aebddd1SJeff Kirsher 5339aebddd1SJeff Kirsher /* wait for ready to be set */ 5349aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5359aebddd1SJeff Kirsher if (status != 0) 5369aebddd1SJeff Kirsher return status; 5379aebddd1SJeff Kirsher 5389aebddd1SJeff Kirsher val = 0; 5399aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 5409aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 5419aebddd1SJeff Kirsher iowrite32(val, db); 5429aebddd1SJeff Kirsher 5439aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5449aebddd1SJeff Kirsher if (status != 0) 5459aebddd1SJeff Kirsher return status; 5469aebddd1SJeff Kirsher 5479aebddd1SJeff Kirsher /* A cq entry has been made now */ 5489aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5499aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5509aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5519aebddd1SJeff Kirsher if (status) 5529aebddd1SJeff Kirsher return status; 5539aebddd1SJeff Kirsher } else { 5549aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5559aebddd1SJeff Kirsher return -1; 5569aebddd1SJeff Kirsher } 5579aebddd1SJeff Kirsher return 0; 5589aebddd1SJeff Kirsher } 5599aebddd1SJeff Kirsher 560c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5619aebddd1SJeff Kirsher { 5629aebddd1SJeff Kirsher u32 sem; 5639aebddd1SJeff Kirsher 564c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 565c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5669aebddd1SJeff Kirsher else 567c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 568c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 569c5b3ad4cSSathya Perla 570c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5719aebddd1SJeff Kirsher } 5729aebddd1SJeff Kirsher 57387f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 574bf99e50dSPadmanabh Ratnakar { 575bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 576bf99e50dSPadmanabh Ratnakar u32 sliport_status; 577bf99e50dSPadmanabh Ratnakar int status = 0, i; 578bf99e50dSPadmanabh Ratnakar 579bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 580bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 581bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 582bf99e50dSPadmanabh Ratnakar break; 583bf99e50dSPadmanabh Ratnakar 584bf99e50dSPadmanabh Ratnakar msleep(1000); 585bf99e50dSPadmanabh Ratnakar } 586bf99e50dSPadmanabh Ratnakar 587bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 588bf99e50dSPadmanabh Ratnakar status = -1; 589bf99e50dSPadmanabh Ratnakar 590bf99e50dSPadmanabh Ratnakar return status; 591bf99e50dSPadmanabh Ratnakar } 592bf99e50dSPadmanabh Ratnakar 59367297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 59467297ad8SPadmanabh Ratnakar { 59567297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 59667297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 59767297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 598a2cc4e0bSSathya Perla sliport_err1 = ioread32(adapter->db + SLIPORT_ERROR1_OFFSET); 599a2cc4e0bSSathya Perla sliport_err2 = ioread32(adapter->db + SLIPORT_ERROR2_OFFSET); 60067297ad8SPadmanabh Ratnakar 60167297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 60267297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 60367297ad8SPadmanabh Ratnakar return true; 60467297ad8SPadmanabh Ratnakar } 60567297ad8SPadmanabh Ratnakar return false; 60667297ad8SPadmanabh Ratnakar } 60767297ad8SPadmanabh Ratnakar 608bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 609bf99e50dSPadmanabh Ratnakar { 610bf99e50dSPadmanabh Ratnakar int status; 611bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 61267297ad8SPadmanabh Ratnakar bool resource_error; 61367297ad8SPadmanabh Ratnakar 61467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 61567297ad8SPadmanabh Ratnakar if (resource_error) 61601e5b2c4SSomnath Kotur return -EAGAIN; 61767297ad8SPadmanabh Ratnakar 618bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 619bf99e50dSPadmanabh Ratnakar if (!status) { 620bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 621bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 622bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 623bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 624bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 625bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 626bf99e50dSPadmanabh Ratnakar 627bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 628bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 629bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 630bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 631bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 632bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 633bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 634bf99e50dSPadmanabh Ratnakar status = -1; 635bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 636bf99e50dSPadmanabh Ratnakar status = -1; 637bf99e50dSPadmanabh Ratnakar } 638bf99e50dSPadmanabh Ratnakar } 63967297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 64067297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 64167297ad8SPadmanabh Ratnakar * when PF provisions resources. 64267297ad8SPadmanabh Ratnakar */ 64367297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 64401e5b2c4SSomnath Kotur if (resource_error) 64501e5b2c4SSomnath Kotur status = -EAGAIN; 64667297ad8SPadmanabh Ratnakar 647bf99e50dSPadmanabh Ratnakar return status; 648bf99e50dSPadmanabh Ratnakar } 649bf99e50dSPadmanabh Ratnakar 650bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6519aebddd1SJeff Kirsher { 6529aebddd1SJeff Kirsher u16 stage; 6539aebddd1SJeff Kirsher int status, timeout = 0; 6549aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6559aebddd1SJeff Kirsher 656bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 657bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 658bf99e50dSPadmanabh Ratnakar return status; 659bf99e50dSPadmanabh Ratnakar } 660bf99e50dSPadmanabh Ratnakar 6619aebddd1SJeff Kirsher do { 662c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 66366d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 66466d29cbcSGavin Shan return 0; 66566d29cbcSGavin Shan 666a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 6679aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6689aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6699aebddd1SJeff Kirsher return -EINTR; 6709aebddd1SJeff Kirsher } 6719aebddd1SJeff Kirsher timeout += 2; 6723ab81b5fSSomnath Kotur } while (timeout < 60); 6739aebddd1SJeff Kirsher 6749aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6759aebddd1SJeff Kirsher return -1; 6769aebddd1SJeff Kirsher } 6779aebddd1SJeff Kirsher 6789aebddd1SJeff Kirsher 6799aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6809aebddd1SJeff Kirsher { 6819aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6829aebddd1SJeff Kirsher } 6839aebddd1SJeff Kirsher 684a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 685bea50988SSathya Perla { 686bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 687bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 688bea50988SSathya Perla } 6899aebddd1SJeff Kirsher 6909aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 691106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 692106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 693106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 694a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 695a2cc4e0bSSathya Perla struct be_dma_mem *mem) 6969aebddd1SJeff Kirsher { 697106df1e3SSomnath Kotur struct be_sge *sge; 698106df1e3SSomnath Kotur 6999aebddd1SJeff Kirsher req_hdr->opcode = opcode; 7009aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 7019aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 7029aebddd1SJeff Kirsher req_hdr->version = 0; 703bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 704106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 705106df1e3SSomnath Kotur if (mem) { 706106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 707106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 708106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 709106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 710106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 711106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 712106df1e3SSomnath Kotur } else 713106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 714106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 7159aebddd1SJeff Kirsher } 7169aebddd1SJeff Kirsher 7179aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 7189aebddd1SJeff Kirsher struct be_dma_mem *mem) 7199aebddd1SJeff Kirsher { 7209aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 7219aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 7229aebddd1SJeff Kirsher 7239aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 7249aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 7259aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 7269aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 7279aebddd1SJeff Kirsher } 7289aebddd1SJeff Kirsher } 7299aebddd1SJeff Kirsher 7309aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 7319aebddd1SJeff Kirsher { 7329aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 7339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 7349aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 7359aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7369aebddd1SJeff Kirsher return wrb; 7379aebddd1SJeff Kirsher } 7389aebddd1SJeff Kirsher 7399aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7409aebddd1SJeff Kirsher { 7419aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7439aebddd1SJeff Kirsher 744aa790db9SPadmanabh Ratnakar if (!mccq->created) 745aa790db9SPadmanabh Ratnakar return NULL; 746aa790db9SPadmanabh Ratnakar 7474d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7489aebddd1SJeff Kirsher return NULL; 7499aebddd1SJeff Kirsher 7509aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7519aebddd1SJeff Kirsher queue_head_inc(mccq); 7529aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7539aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7549aebddd1SJeff Kirsher return wrb; 7559aebddd1SJeff Kirsher } 7569aebddd1SJeff Kirsher 757bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 758bea50988SSathya Perla { 759bea50988SSathya Perla return adapter->mcc_obj.q.created; 760bea50988SSathya Perla } 761bea50988SSathya Perla 762bea50988SSathya Perla /* Must be used only in process context */ 763bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 764bea50988SSathya Perla { 765bea50988SSathya Perla if (use_mcc(adapter)) { 766bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 767bea50988SSathya Perla return 0; 768bea50988SSathya Perla } else { 769bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 770bea50988SSathya Perla } 771bea50988SSathya Perla } 772bea50988SSathya Perla 773bea50988SSathya Perla /* Must be used only in process context */ 774bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 775bea50988SSathya Perla { 776bea50988SSathya Perla if (use_mcc(adapter)) 777bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 778bea50988SSathya Perla else 779bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 780bea50988SSathya Perla } 781bea50988SSathya Perla 782bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 783bea50988SSathya Perla struct be_mcc_wrb *wrb) 784bea50988SSathya Perla { 785bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 786bea50988SSathya Perla 787bea50988SSathya Perla if (use_mcc(adapter)) { 788bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 789bea50988SSathya Perla if (!dest_wrb) 790bea50988SSathya Perla return NULL; 791bea50988SSathya Perla } else { 792bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 793bea50988SSathya Perla } 794bea50988SSathya Perla 795bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 796bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 797bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 798bea50988SSathya Perla 799bea50988SSathya Perla return dest_wrb; 800bea50988SSathya Perla } 801bea50988SSathya Perla 802bea50988SSathya Perla /* Must be used only in process context */ 803bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 804bea50988SSathya Perla struct be_mcc_wrb *wrb) 805bea50988SSathya Perla { 806bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 807bea50988SSathya Perla int status; 808bea50988SSathya Perla 809bea50988SSathya Perla status = be_cmd_lock(adapter); 810bea50988SSathya Perla if (status) 811bea50988SSathya Perla return status; 812bea50988SSathya Perla 813bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 814bea50988SSathya Perla if (!dest_wrb) 815bea50988SSathya Perla return -EBUSY; 816bea50988SSathya Perla 817bea50988SSathya Perla if (use_mcc(adapter)) 818bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 819bea50988SSathya Perla else 820bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 821bea50988SSathya Perla 822bea50988SSathya Perla if (!status) 823bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 824bea50988SSathya Perla 825bea50988SSathya Perla be_cmd_unlock(adapter); 826bea50988SSathya Perla return status; 827bea50988SSathya Perla } 828bea50988SSathya Perla 8299aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 8309aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8319aebddd1SJeff Kirsher */ 8329aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 8339aebddd1SJeff Kirsher { 8349aebddd1SJeff Kirsher u8 *wrb; 8359aebddd1SJeff Kirsher int status; 8369aebddd1SJeff Kirsher 837bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 838bf99e50dSPadmanabh Ratnakar return 0; 839bf99e50dSPadmanabh Ratnakar 8409aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8419aebddd1SJeff Kirsher return -1; 8429aebddd1SJeff Kirsher 8439aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8449aebddd1SJeff Kirsher *wrb++ = 0xFF; 8459aebddd1SJeff Kirsher *wrb++ = 0x12; 8469aebddd1SJeff Kirsher *wrb++ = 0x34; 8479aebddd1SJeff Kirsher *wrb++ = 0xFF; 8489aebddd1SJeff Kirsher *wrb++ = 0xFF; 8499aebddd1SJeff Kirsher *wrb++ = 0x56; 8509aebddd1SJeff Kirsher *wrb++ = 0x78; 8519aebddd1SJeff Kirsher *wrb = 0xFF; 8529aebddd1SJeff Kirsher 8539aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8549aebddd1SJeff Kirsher 8559aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8569aebddd1SJeff Kirsher return status; 8579aebddd1SJeff Kirsher } 8589aebddd1SJeff Kirsher 8599aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8609aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8619aebddd1SJeff Kirsher */ 8629aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8639aebddd1SJeff Kirsher { 8649aebddd1SJeff Kirsher u8 *wrb; 8659aebddd1SJeff Kirsher int status; 8669aebddd1SJeff Kirsher 867bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 868bf99e50dSPadmanabh Ratnakar return 0; 869bf99e50dSPadmanabh Ratnakar 8709aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8719aebddd1SJeff Kirsher return -1; 8729aebddd1SJeff Kirsher 8739aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8749aebddd1SJeff Kirsher *wrb++ = 0xFF; 8759aebddd1SJeff Kirsher *wrb++ = 0xAA; 8769aebddd1SJeff Kirsher *wrb++ = 0xBB; 8779aebddd1SJeff Kirsher *wrb++ = 0xFF; 8789aebddd1SJeff Kirsher *wrb++ = 0xFF; 8799aebddd1SJeff Kirsher *wrb++ = 0xCC; 8809aebddd1SJeff Kirsher *wrb++ = 0xDD; 8819aebddd1SJeff Kirsher *wrb = 0xFF; 8829aebddd1SJeff Kirsher 8839aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8849aebddd1SJeff Kirsher 8859aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8869aebddd1SJeff Kirsher return status; 8879aebddd1SJeff Kirsher } 888bf99e50dSPadmanabh Ratnakar 889f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8909aebddd1SJeff Kirsher { 8919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8929aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 893f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 894f2f781a7SSathya Perla int status, ver = 0; 8959aebddd1SJeff Kirsher 8969aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8979aebddd1SJeff Kirsher return -1; 8989aebddd1SJeff Kirsher 8999aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 9009aebddd1SJeff Kirsher req = embedded_payload(wrb); 9019aebddd1SJeff Kirsher 902106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 903a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 904a2cc4e0bSSathya Perla NULL); 9059aebddd1SJeff Kirsher 906f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 907f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 908f2f781a7SSathya Perla ver = 2; 909f2f781a7SSathya Perla 910f2f781a7SSathya Perla req->hdr.version = ver; 9119aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 9129aebddd1SJeff Kirsher 9139aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 9149aebddd1SJeff Kirsher /* 4byte eqe*/ 9159aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 9169aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 917f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 9189aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 9199aebddd1SJeff Kirsher 9209aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9219aebddd1SJeff Kirsher 9229aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9239aebddd1SJeff Kirsher if (!status) { 9249aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 925f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 926f2f781a7SSathya Perla eqo->msix_idx = 927f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 928f2f781a7SSathya Perla eqo->q.created = true; 9299aebddd1SJeff Kirsher } 9309aebddd1SJeff Kirsher 9319aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9329aebddd1SJeff Kirsher return status; 9339aebddd1SJeff Kirsher } 9349aebddd1SJeff Kirsher 935f9449ab7SSathya Perla /* Use MCC */ 9369aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 9375ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 9389aebddd1SJeff Kirsher { 9399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9409aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 9419aebddd1SJeff Kirsher int status; 9429aebddd1SJeff Kirsher 943f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 9449aebddd1SJeff Kirsher 945f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 946f9449ab7SSathya Perla if (!wrb) { 947f9449ab7SSathya Perla status = -EBUSY; 948f9449ab7SSathya Perla goto err; 949f9449ab7SSathya Perla } 9509aebddd1SJeff Kirsher req = embedded_payload(wrb); 9519aebddd1SJeff Kirsher 952106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 953a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 954a2cc4e0bSSathya Perla NULL); 9555ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9569aebddd1SJeff Kirsher if (permanent) { 9579aebddd1SJeff Kirsher req->permanent = 1; 9589aebddd1SJeff Kirsher } else { 9599aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 960590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9619aebddd1SJeff Kirsher req->permanent = 0; 9629aebddd1SJeff Kirsher } 9639aebddd1SJeff Kirsher 964f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9659aebddd1SJeff Kirsher if (!status) { 9669aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9679aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9689aebddd1SJeff Kirsher } 9699aebddd1SJeff Kirsher 970f9449ab7SSathya Perla err: 971f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9729aebddd1SJeff Kirsher return status; 9739aebddd1SJeff Kirsher } 9749aebddd1SJeff Kirsher 9759aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9769aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9779aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9789aebddd1SJeff Kirsher { 9799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9809aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9819aebddd1SJeff Kirsher int status; 9829aebddd1SJeff Kirsher 9839aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9849aebddd1SJeff Kirsher 9859aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9869aebddd1SJeff Kirsher if (!wrb) { 9879aebddd1SJeff Kirsher status = -EBUSY; 9889aebddd1SJeff Kirsher goto err; 9899aebddd1SJeff Kirsher } 9909aebddd1SJeff Kirsher req = embedded_payload(wrb); 9919aebddd1SJeff Kirsher 992106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 993a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 994a2cc4e0bSSathya Perla NULL); 9959aebddd1SJeff Kirsher 9969aebddd1SJeff Kirsher req->hdr.domain = domain; 9979aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9989aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9999aebddd1SJeff Kirsher 10009aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10019aebddd1SJeff Kirsher if (!status) { 10029aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 10039aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 10049aebddd1SJeff Kirsher } 10059aebddd1SJeff Kirsher 10069aebddd1SJeff Kirsher err: 10079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1008e3a7ae2cSSomnath Kotur 1009e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 1010e3a7ae2cSSomnath Kotur status = -EPERM; 1011e3a7ae2cSSomnath Kotur 10129aebddd1SJeff Kirsher return status; 10139aebddd1SJeff Kirsher } 10149aebddd1SJeff Kirsher 10159aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 101630128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 10179aebddd1SJeff Kirsher { 10189aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10199aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 10209aebddd1SJeff Kirsher int status; 10219aebddd1SJeff Kirsher 102230128031SSathya Perla if (pmac_id == -1) 102330128031SSathya Perla return 0; 102430128031SSathya Perla 10259aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 10269aebddd1SJeff Kirsher 10279aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10289aebddd1SJeff Kirsher if (!wrb) { 10299aebddd1SJeff Kirsher status = -EBUSY; 10309aebddd1SJeff Kirsher goto err; 10319aebddd1SJeff Kirsher } 10329aebddd1SJeff Kirsher req = embedded_payload(wrb); 10339aebddd1SJeff Kirsher 1034106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1035106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 10369aebddd1SJeff Kirsher 10379aebddd1SJeff Kirsher req->hdr.domain = dom; 10389aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 10399aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 10409aebddd1SJeff Kirsher 10419aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10429aebddd1SJeff Kirsher 10439aebddd1SJeff Kirsher err: 10449aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10459aebddd1SJeff Kirsher return status; 10469aebddd1SJeff Kirsher } 10479aebddd1SJeff Kirsher 10489aebddd1SJeff Kirsher /* Uses Mbox */ 104910ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 105010ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10519aebddd1SJeff Kirsher { 10529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10539aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10549aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10559aebddd1SJeff Kirsher void *ctxt; 10569aebddd1SJeff Kirsher int status; 10579aebddd1SJeff Kirsher 10589aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10599aebddd1SJeff Kirsher return -1; 10609aebddd1SJeff Kirsher 10619aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10629aebddd1SJeff Kirsher req = embedded_payload(wrb); 10639aebddd1SJeff Kirsher ctxt = &req->context; 10649aebddd1SJeff Kirsher 1065106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1066a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1067a2cc4e0bSSathya Perla NULL); 10689aebddd1SJeff Kirsher 10699aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1070bbdc42f8SAjit Khaparde 1071bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10729aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10739aebddd1SJeff Kirsher coalesce_wm); 10749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10759aebddd1SJeff Kirsher ctxt, no_delay); 10769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10779aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 10789aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10799aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1081bbdc42f8SAjit Khaparde } else { 1082bbdc42f8SAjit Khaparde req->hdr.version = 2; 1083bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 108409e83a9dSAjit Khaparde 108509e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 108609e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 108709e83a9dSAjit Khaparde */ 108809e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 108909e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 109009e83a9dSAjit Khaparde ctxt, coalesce_wm); 1091bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1092bbdc42f8SAjit Khaparde no_delay); 1093bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1094bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1095bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1096a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1097a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 10989aebddd1SJeff Kirsher } 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11019aebddd1SJeff Kirsher 11029aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11039aebddd1SJeff Kirsher 11049aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11059aebddd1SJeff Kirsher if (!status) { 11069aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 11079aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 11089aebddd1SJeff Kirsher cq->created = true; 11099aebddd1SJeff Kirsher } 11109aebddd1SJeff Kirsher 11119aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11129aebddd1SJeff Kirsher 11139aebddd1SJeff Kirsher return status; 11149aebddd1SJeff Kirsher } 11159aebddd1SJeff Kirsher 11169aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 11179aebddd1SJeff Kirsher { 11189aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 11199aebddd1SJeff Kirsher if (len_encoded == 16) 11209aebddd1SJeff Kirsher len_encoded = 0; 11219aebddd1SJeff Kirsher return len_encoded; 11229aebddd1SJeff Kirsher } 11239aebddd1SJeff Kirsher 11244188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 11259aebddd1SJeff Kirsher struct be_queue_info *mccq, 11269aebddd1SJeff Kirsher struct be_queue_info *cq) 11279aebddd1SJeff Kirsher { 11289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11299aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 11309aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11319aebddd1SJeff Kirsher void *ctxt; 11329aebddd1SJeff Kirsher int status; 11339aebddd1SJeff Kirsher 11349aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11359aebddd1SJeff Kirsher return -1; 11369aebddd1SJeff Kirsher 11379aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11389aebddd1SJeff Kirsher req = embedded_payload(wrb); 11399aebddd1SJeff Kirsher ctxt = &req->context; 11409aebddd1SJeff Kirsher 1141106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1142a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1143a2cc4e0bSSathya Perla NULL); 11449aebddd1SJeff Kirsher 11459aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1146666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 11479aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11489aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11499aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11509aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1151666d39c7SVasundhara Volam } else { 1152666d39c7SVasundhara Volam req->hdr.version = 1; 1153666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1154666d39c7SVasundhara Volam 1155666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1156666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1157666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1158666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1159666d39c7SVasundhara Volam ctxt, cq->id); 1160666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1161666d39c7SVasundhara Volam ctxt, 1); 11629aebddd1SJeff Kirsher } 11639aebddd1SJeff Kirsher 11649aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11659aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1166bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11679aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11689aebddd1SJeff Kirsher 11699aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11709aebddd1SJeff Kirsher 11719aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11729aebddd1SJeff Kirsher if (!status) { 11739aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11749aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11759aebddd1SJeff Kirsher mccq->created = true; 11769aebddd1SJeff Kirsher } 11779aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11789aebddd1SJeff Kirsher 11799aebddd1SJeff Kirsher return status; 11809aebddd1SJeff Kirsher } 11819aebddd1SJeff Kirsher 11824188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11839aebddd1SJeff Kirsher struct be_queue_info *mccq, 11849aebddd1SJeff Kirsher struct be_queue_info *cq) 11859aebddd1SJeff Kirsher { 11869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11879aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11889aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11899aebddd1SJeff Kirsher void *ctxt; 11909aebddd1SJeff Kirsher int status; 11919aebddd1SJeff Kirsher 11929aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11939aebddd1SJeff Kirsher return -1; 11949aebddd1SJeff Kirsher 11959aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11969aebddd1SJeff Kirsher req = embedded_payload(wrb); 11979aebddd1SJeff Kirsher ctxt = &req->context; 11989aebddd1SJeff Kirsher 1199106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1200a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1201a2cc4e0bSSathya Perla NULL); 12029aebddd1SJeff Kirsher 12039aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 12049aebddd1SJeff Kirsher 12059aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12069aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12079aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12089aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 12099aebddd1SJeff Kirsher 12109aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12119aebddd1SJeff Kirsher 12129aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12139aebddd1SJeff Kirsher 12149aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12159aebddd1SJeff Kirsher if (!status) { 12169aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 12179aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12189aebddd1SJeff Kirsher mccq->created = true; 12199aebddd1SJeff Kirsher } 12209aebddd1SJeff Kirsher 12219aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12229aebddd1SJeff Kirsher return status; 12239aebddd1SJeff Kirsher } 12249aebddd1SJeff Kirsher 12259aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1226a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 12279aebddd1SJeff Kirsher { 12289aebddd1SJeff Kirsher int status; 12299aebddd1SJeff Kirsher 12309aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1231666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 12329aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 12339aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 12349aebddd1SJeff Kirsher "and FCoE traffic"); 12359aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 12369aebddd1SJeff Kirsher } 12379aebddd1SJeff Kirsher return status; 12389aebddd1SJeff Kirsher } 12399aebddd1SJeff Kirsher 124094d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 12419aebddd1SJeff Kirsher { 12427707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 12439aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 124494d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 124594d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 12469aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 124794d73aaaSVasundhara Volam int status, ver = 0; 12489aebddd1SJeff Kirsher 12497707133cSSathya Perla req = embedded_payload(&wrb); 1250106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 12517707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 12529aebddd1SJeff Kirsher 12539aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12549aebddd1SJeff Kirsher req->hdr.version = 1; 125594d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 125694d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 125794d73aaaSVasundhara Volam req->hdr.version = 2; 125894d73aaaSVasundhara Volam } else { /* For SH */ 125994d73aaaSVasundhara Volam req->hdr.version = 2; 12609aebddd1SJeff Kirsher } 12619aebddd1SJeff Kirsher 126281b02655SVasundhara Volam if (req->hdr.version > 0) 126381b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12649aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12659aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12669aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 126794d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 126894d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12699aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 127094d73aaaSVasundhara Volam ver = req->hdr.version; 127194d73aaaSVasundhara Volam 12727707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12739aebddd1SJeff Kirsher if (!status) { 12747707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12759aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 127694d73aaaSVasundhara Volam if (ver == 2) 127794d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 127894d73aaaSVasundhara Volam else 127994d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12809aebddd1SJeff Kirsher txq->created = true; 12819aebddd1SJeff Kirsher } 12829aebddd1SJeff Kirsher 12839aebddd1SJeff Kirsher return status; 12849aebddd1SJeff Kirsher } 12859aebddd1SJeff Kirsher 12869aebddd1SJeff Kirsher /* Uses MCC */ 12879aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12889aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 128910ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12909aebddd1SJeff Kirsher { 12919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12929aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12939aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12949aebddd1SJeff Kirsher int status; 12959aebddd1SJeff Kirsher 12969aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12979aebddd1SJeff Kirsher 12989aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12999aebddd1SJeff Kirsher if (!wrb) { 13009aebddd1SJeff Kirsher status = -EBUSY; 13019aebddd1SJeff Kirsher goto err; 13029aebddd1SJeff Kirsher } 13039aebddd1SJeff Kirsher req = embedded_payload(wrb); 13049aebddd1SJeff Kirsher 1305106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1306106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 13079aebddd1SJeff Kirsher 13089aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 13099aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 13109aebddd1SJeff Kirsher req->num_pages = 2; 13119aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13129aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 131310ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 13149aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 13159aebddd1SJeff Kirsher 13169aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13179aebddd1SJeff Kirsher if (!status) { 13189aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 13199aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 13209aebddd1SJeff Kirsher rxq->created = true; 13219aebddd1SJeff Kirsher *rss_id = resp->rss_id; 13229aebddd1SJeff Kirsher } 13239aebddd1SJeff Kirsher 13249aebddd1SJeff Kirsher err: 13259aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13269aebddd1SJeff Kirsher return status; 13279aebddd1SJeff Kirsher } 13289aebddd1SJeff Kirsher 13299aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 13309aebddd1SJeff Kirsher * Uses Mbox 13319aebddd1SJeff Kirsher */ 13329aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 13339aebddd1SJeff Kirsher int queue_type) 13349aebddd1SJeff Kirsher { 13359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13369aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13379aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 13389aebddd1SJeff Kirsher int status; 13399aebddd1SJeff Kirsher 13409aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13419aebddd1SJeff Kirsher return -1; 13429aebddd1SJeff Kirsher 13439aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13449aebddd1SJeff Kirsher req = embedded_payload(wrb); 13459aebddd1SJeff Kirsher 13469aebddd1SJeff Kirsher switch (queue_type) { 13479aebddd1SJeff Kirsher case QTYPE_EQ: 13489aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13499aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 13509aebddd1SJeff Kirsher break; 13519aebddd1SJeff Kirsher case QTYPE_CQ: 13529aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13539aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13549aebddd1SJeff Kirsher break; 13559aebddd1SJeff Kirsher case QTYPE_TXQ: 13569aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13579aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13589aebddd1SJeff Kirsher break; 13599aebddd1SJeff Kirsher case QTYPE_RXQ: 13609aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13619aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13629aebddd1SJeff Kirsher break; 13639aebddd1SJeff Kirsher case QTYPE_MCCQ: 13649aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13659aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13669aebddd1SJeff Kirsher break; 13679aebddd1SJeff Kirsher default: 13689aebddd1SJeff Kirsher BUG(); 13699aebddd1SJeff Kirsher } 13709aebddd1SJeff Kirsher 1371106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1372106df1e3SSomnath Kotur NULL); 13739aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13749aebddd1SJeff Kirsher 13759aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13769aebddd1SJeff Kirsher q->created = false; 13779aebddd1SJeff Kirsher 13789aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13799aebddd1SJeff Kirsher return status; 13809aebddd1SJeff Kirsher } 13819aebddd1SJeff Kirsher 13829aebddd1SJeff Kirsher /* Uses MCC */ 13839aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13849aebddd1SJeff Kirsher { 13859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13869aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13879aebddd1SJeff Kirsher int status; 13889aebddd1SJeff Kirsher 13899aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13909aebddd1SJeff Kirsher 13919aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13929aebddd1SJeff Kirsher if (!wrb) { 13939aebddd1SJeff Kirsher status = -EBUSY; 13949aebddd1SJeff Kirsher goto err; 13959aebddd1SJeff Kirsher } 13969aebddd1SJeff Kirsher req = embedded_payload(wrb); 13979aebddd1SJeff Kirsher 1398106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1399106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 14009aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14019aebddd1SJeff Kirsher 14029aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14039aebddd1SJeff Kirsher q->created = false; 14049aebddd1SJeff Kirsher 14059aebddd1SJeff Kirsher err: 14069aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14079aebddd1SJeff Kirsher return status; 14089aebddd1SJeff Kirsher } 14099aebddd1SJeff Kirsher 14109aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1411bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 14129aebddd1SJeff Kirsher */ 14139aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 14141578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 14159aebddd1SJeff Kirsher { 1416bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 14179aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 14189aebddd1SJeff Kirsher int status; 14199aebddd1SJeff Kirsher 1420bea50988SSathya Perla req = embedded_payload(&wrb); 1421106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1422a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1423a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 14249aebddd1SJeff Kirsher req->hdr.domain = domain; 14259aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 14269aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1427f9449ab7SSathya Perla req->pmac_invalid = true; 14289aebddd1SJeff Kirsher 1429bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 14309aebddd1SJeff Kirsher if (!status) { 1431bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 14329aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1433b5bb9776SSathya Perla 1434b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1435b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1436b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 14379aebddd1SJeff Kirsher } 14389aebddd1SJeff Kirsher return status; 14399aebddd1SJeff Kirsher } 14409aebddd1SJeff Kirsher 1441f9449ab7SSathya Perla /* Uses MCCQ */ 144230128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 14439aebddd1SJeff Kirsher { 14449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14459aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 14469aebddd1SJeff Kirsher int status; 14479aebddd1SJeff Kirsher 144830128031SSathya Perla if (interface_id == -1) 1449f9449ab7SSathya Perla return 0; 14509aebddd1SJeff Kirsher 1451f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1452f9449ab7SSathya Perla 1453f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1454f9449ab7SSathya Perla if (!wrb) { 1455f9449ab7SSathya Perla status = -EBUSY; 1456f9449ab7SSathya Perla goto err; 1457f9449ab7SSathya Perla } 14589aebddd1SJeff Kirsher req = embedded_payload(wrb); 14599aebddd1SJeff Kirsher 1460106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1461a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 1462a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 14639aebddd1SJeff Kirsher req->hdr.domain = domain; 14649aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14659aebddd1SJeff Kirsher 1466f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1467f9449ab7SSathya Perla err: 1468f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14699aebddd1SJeff Kirsher return status; 14709aebddd1SJeff Kirsher } 14719aebddd1SJeff Kirsher 14729aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14739aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14749aebddd1SJeff Kirsher * Uses asynchronous MCC 14759aebddd1SJeff Kirsher */ 14769aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14779aebddd1SJeff Kirsher { 14789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14799aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14809aebddd1SJeff Kirsher int status = 0; 14819aebddd1SJeff Kirsher 14829aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14839aebddd1SJeff Kirsher 14849aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14859aebddd1SJeff Kirsher if (!wrb) { 14869aebddd1SJeff Kirsher status = -EBUSY; 14879aebddd1SJeff Kirsher goto err; 14889aebddd1SJeff Kirsher } 14899aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14909aebddd1SJeff Kirsher 1491106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1492a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1493a2cc4e0bSSathya Perla nonemb_cmd); 14949aebddd1SJeff Kirsher 1495ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 149661000861SAjit Khaparde if (BE2_chip(adapter)) 149761000861SAjit Khaparde hdr->version = 0; 149861000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 14999aebddd1SJeff Kirsher hdr->version = 1; 150061000861SAjit Khaparde else 150161000861SAjit Khaparde hdr->version = 2; 15029aebddd1SJeff Kirsher 15039aebddd1SJeff Kirsher be_mcc_notify(adapter); 15049aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15059aebddd1SJeff Kirsher 15069aebddd1SJeff Kirsher err: 15079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15089aebddd1SJeff Kirsher return status; 15099aebddd1SJeff Kirsher } 15109aebddd1SJeff Kirsher 15119aebddd1SJeff Kirsher /* Lancer Stats */ 15129aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 15139aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 15149aebddd1SJeff Kirsher { 15159aebddd1SJeff Kirsher 15169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15179aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 15189aebddd1SJeff Kirsher int status = 0; 15199aebddd1SJeff Kirsher 1520f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1521f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1522f25b119cSPadmanabh Ratnakar return -EPERM; 1523f25b119cSPadmanabh Ratnakar 15249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15259aebddd1SJeff Kirsher 15269aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15279aebddd1SJeff Kirsher if (!wrb) { 15289aebddd1SJeff Kirsher status = -EBUSY; 15299aebddd1SJeff Kirsher goto err; 15309aebddd1SJeff Kirsher } 15319aebddd1SJeff Kirsher req = nonemb_cmd->va; 15329aebddd1SJeff Kirsher 1533106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1534a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1535a2cc4e0bSSathya Perla wrb, nonemb_cmd); 15369aebddd1SJeff Kirsher 1537d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 15389aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 15399aebddd1SJeff Kirsher 15409aebddd1SJeff Kirsher be_mcc_notify(adapter); 15419aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15429aebddd1SJeff Kirsher 15439aebddd1SJeff Kirsher err: 15449aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15459aebddd1SJeff Kirsher return status; 15469aebddd1SJeff Kirsher } 15479aebddd1SJeff Kirsher 1548323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1549323ff71eSSathya Perla { 1550323ff71eSSathya Perla switch (mac_speed) { 1551323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1552323ff71eSSathya Perla return 0; 1553323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1554323ff71eSSathya Perla return 10; 1555323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1556323ff71eSSathya Perla return 100; 1557323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1558323ff71eSSathya Perla return 1000; 1559323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1560323ff71eSSathya Perla return 10000; 1561b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1562b971f847SVasundhara Volam return 20000; 1563b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1564b971f847SVasundhara Volam return 25000; 1565b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1566b971f847SVasundhara Volam return 40000; 1567323ff71eSSathya Perla } 1568323ff71eSSathya Perla return 0; 1569323ff71eSSathya Perla } 1570323ff71eSSathya Perla 1571323ff71eSSathya Perla /* Uses synchronous mcc 1572323ff71eSSathya Perla * Returns link_speed in Mbps 1573323ff71eSSathya Perla */ 1574323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1575323ff71eSSathya Perla u8 *link_status, u32 dom) 15769aebddd1SJeff Kirsher { 15779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15789aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15799aebddd1SJeff Kirsher int status; 15809aebddd1SJeff Kirsher 15819aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15829aebddd1SJeff Kirsher 1583b236916aSAjit Khaparde if (link_status) 1584b236916aSAjit Khaparde *link_status = LINK_DOWN; 1585b236916aSAjit Khaparde 15869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15879aebddd1SJeff Kirsher if (!wrb) { 15889aebddd1SJeff Kirsher status = -EBUSY; 15899aebddd1SJeff Kirsher goto err; 15909aebddd1SJeff Kirsher } 15919aebddd1SJeff Kirsher req = embedded_payload(wrb); 15929aebddd1SJeff Kirsher 159357cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1594a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1595a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 159657cd80d4SPadmanabh Ratnakar 1597ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1598ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1599daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1600daad6167SPadmanabh Ratnakar 160157cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 16029aebddd1SJeff Kirsher 16039aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16049aebddd1SJeff Kirsher if (!status) { 16059aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1606323ff71eSSathya Perla if (link_speed) { 1607323ff71eSSathya Perla *link_speed = resp->link_speed ? 1608323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1609323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1610323ff71eSSathya Perla 1611323ff71eSSathya Perla if (!resp->logical_link_status) 1612323ff71eSSathya Perla *link_speed = 0; 16139aebddd1SJeff Kirsher } 1614b236916aSAjit Khaparde if (link_status) 1615b236916aSAjit Khaparde *link_status = resp->logical_link_status; 16169aebddd1SJeff Kirsher } 16179aebddd1SJeff Kirsher 16189aebddd1SJeff Kirsher err: 16199aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16209aebddd1SJeff Kirsher return status; 16219aebddd1SJeff Kirsher } 16229aebddd1SJeff Kirsher 16239aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16249aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 16259aebddd1SJeff Kirsher { 16269aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16279aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1628117affe3SVasundhara Volam int status = 0; 16299aebddd1SJeff Kirsher 16309aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16319aebddd1SJeff Kirsher 16329aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16339aebddd1SJeff Kirsher if (!wrb) { 16349aebddd1SJeff Kirsher status = -EBUSY; 16359aebddd1SJeff Kirsher goto err; 16369aebddd1SJeff Kirsher } 16379aebddd1SJeff Kirsher req = embedded_payload(wrb); 16389aebddd1SJeff Kirsher 1639106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1640a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1641a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 16429aebddd1SJeff Kirsher 16433de09455SSomnath Kotur be_mcc_notify(adapter); 16449aebddd1SJeff Kirsher 16459aebddd1SJeff Kirsher err: 16469aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16479aebddd1SJeff Kirsher return status; 16489aebddd1SJeff Kirsher } 16499aebddd1SJeff Kirsher 16509aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16519aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 16529aebddd1SJeff Kirsher { 16539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16549aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16559aebddd1SJeff Kirsher int status; 16569aebddd1SJeff Kirsher 16579aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16589aebddd1SJeff Kirsher 16599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16609aebddd1SJeff Kirsher if (!wrb) { 16619aebddd1SJeff Kirsher status = -EBUSY; 16629aebddd1SJeff Kirsher goto err; 16639aebddd1SJeff Kirsher } 16649aebddd1SJeff Kirsher req = embedded_payload(wrb); 16659aebddd1SJeff Kirsher 1666106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1667a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, 1668a2cc4e0bSSathya Perla NULL); 16699aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16709aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16719aebddd1SJeff Kirsher if (!status) { 16729aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16739aebddd1SJeff Kirsher if (log_size && resp->log_size) 16749aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16759aebddd1SJeff Kirsher sizeof(u32); 16769aebddd1SJeff Kirsher } 16779aebddd1SJeff Kirsher err: 16789aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16799aebddd1SJeff Kirsher return status; 16809aebddd1SJeff Kirsher } 16819aebddd1SJeff Kirsher 1682c5f156deSVasundhara Volam int be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16839aebddd1SJeff Kirsher { 16849aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16869aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16879aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16889aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1689c5f156deSVasundhara Volam int status = 0; 16909aebddd1SJeff Kirsher 16919aebddd1SJeff Kirsher if (buf_len == 0) 1692c5f156deSVasundhara Volam return -EIO; 16939aebddd1SJeff Kirsher 16949aebddd1SJeff Kirsher total_size = buf_len; 16959aebddd1SJeff Kirsher 16969aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16979aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16989aebddd1SJeff Kirsher get_fat_cmd.size, 16999aebddd1SJeff Kirsher &get_fat_cmd.dma); 17009aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 17019aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 17029aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 1703c5f156deSVasundhara Volam return -ENOMEM; 17049aebddd1SJeff Kirsher } 17059aebddd1SJeff Kirsher 17069aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17079aebddd1SJeff Kirsher 17089aebddd1SJeff Kirsher while (total_size) { 17099aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 17109aebddd1SJeff Kirsher total_size -= buf_size; 17119aebddd1SJeff Kirsher 17129aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17139aebddd1SJeff Kirsher if (!wrb) { 17149aebddd1SJeff Kirsher status = -EBUSY; 17159aebddd1SJeff Kirsher goto err; 17169aebddd1SJeff Kirsher } 17179aebddd1SJeff Kirsher req = get_fat_cmd.va; 17189aebddd1SJeff Kirsher 17199aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1720106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1721a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1722a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 17239aebddd1SJeff Kirsher 17249aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 17259aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 17269aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 17279aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 17289aebddd1SJeff Kirsher 17299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17309aebddd1SJeff Kirsher if (!status) { 17319aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 17329aebddd1SJeff Kirsher memcpy(buf + offset, 17339aebddd1SJeff Kirsher resp->data_buffer, 173492aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 17359aebddd1SJeff Kirsher } else { 17369aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 17379aebddd1SJeff Kirsher goto err; 17389aebddd1SJeff Kirsher } 17399aebddd1SJeff Kirsher offset += buf_size; 17409aebddd1SJeff Kirsher log_offset += buf_size; 17419aebddd1SJeff Kirsher } 17429aebddd1SJeff Kirsher err: 17439aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 1744a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 17459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1746c5f156deSVasundhara Volam return status; 17479aebddd1SJeff Kirsher } 17489aebddd1SJeff Kirsher 174904b71175SSathya Perla /* Uses synchronous mcc */ 1750e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 17519aebddd1SJeff Kirsher { 17529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17539aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 17549aebddd1SJeff Kirsher int status; 17559aebddd1SJeff Kirsher 175604b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17579aebddd1SJeff Kirsher 175804b71175SSathya Perla wrb = wrb_from_mccq(adapter); 175904b71175SSathya Perla if (!wrb) { 176004b71175SSathya Perla status = -EBUSY; 176104b71175SSathya Perla goto err; 176204b71175SSathya Perla } 176304b71175SSathya Perla 17649aebddd1SJeff Kirsher req = embedded_payload(wrb); 17659aebddd1SJeff Kirsher 1766106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1767a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1768a2cc4e0bSSathya Perla NULL); 176904b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17709aebddd1SJeff Kirsher if (!status) { 17719aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1772acbafeb1SSathya Perla 1773242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1774242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1775242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1776242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 17779aebddd1SJeff Kirsher } 177804b71175SSathya Perla err: 177904b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17809aebddd1SJeff Kirsher return status; 17819aebddd1SJeff Kirsher } 17829aebddd1SJeff Kirsher 17839aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17849aebddd1SJeff Kirsher * Uses async mcc 17859aebddd1SJeff Kirsher */ 1786b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1787b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 17889aebddd1SJeff Kirsher { 17899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17909aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17912632bafdSSathya Perla int status = 0, i; 17929aebddd1SJeff Kirsher 17939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17949aebddd1SJeff Kirsher 17959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17969aebddd1SJeff Kirsher if (!wrb) { 17979aebddd1SJeff Kirsher status = -EBUSY; 17989aebddd1SJeff Kirsher goto err; 17999aebddd1SJeff Kirsher } 18009aebddd1SJeff Kirsher req = embedded_payload(wrb); 18019aebddd1SJeff Kirsher 1802106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1803a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1804a2cc4e0bSSathya Perla NULL); 18059aebddd1SJeff Kirsher 18062632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 18072632bafdSSathya Perla for (i = 0; i < num; i++) { 18082632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 18092632bafdSSathya Perla req->set_eqd[i].phase = 0; 18102632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 18112632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 18122632bafdSSathya Perla } 18139aebddd1SJeff Kirsher 18149aebddd1SJeff Kirsher be_mcc_notify(adapter); 18159aebddd1SJeff Kirsher err: 18169aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18179aebddd1SJeff Kirsher return status; 18189aebddd1SJeff Kirsher } 18199aebddd1SJeff Kirsher 182093676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 182193676703SKalesh AP int num) 182293676703SKalesh AP { 182393676703SKalesh AP int num_eqs, i = 0; 182493676703SKalesh AP 182593676703SKalesh AP if (lancer_chip(adapter) && num > 8) { 182693676703SKalesh AP while (num) { 182793676703SKalesh AP num_eqs = min(num, 8); 182893676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 182993676703SKalesh AP i += num_eqs; 183093676703SKalesh AP num -= num_eqs; 183193676703SKalesh AP } 183293676703SKalesh AP } else { 183393676703SKalesh AP __be_cmd_modify_eqd(adapter, set_eqd, num); 183493676703SKalesh AP } 183593676703SKalesh AP 183693676703SKalesh AP return 0; 183793676703SKalesh AP } 183893676703SKalesh AP 18399aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 18409aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 18414d567d97SKalesh AP u32 num) 18429aebddd1SJeff Kirsher { 18439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18449aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 18459aebddd1SJeff Kirsher int status; 18469aebddd1SJeff Kirsher 18479aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18489aebddd1SJeff Kirsher 18499aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18509aebddd1SJeff Kirsher if (!wrb) { 18519aebddd1SJeff Kirsher status = -EBUSY; 18529aebddd1SJeff Kirsher goto err; 18539aebddd1SJeff Kirsher } 18549aebddd1SJeff Kirsher req = embedded_payload(wrb); 18559aebddd1SJeff Kirsher 1856106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1857a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1858a2cc4e0bSSathya Perla wrb, NULL); 18599aebddd1SJeff Kirsher 18609aebddd1SJeff Kirsher req->interface_id = if_id; 1861012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 18629aebddd1SJeff Kirsher req->num_vlan = num; 18639aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 18649aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 18659aebddd1SJeff Kirsher 18669aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18679aebddd1SJeff Kirsher err: 18689aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18699aebddd1SJeff Kirsher return status; 18709aebddd1SJeff Kirsher } 18719aebddd1SJeff Kirsher 18729aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 18739aebddd1SJeff Kirsher { 18749aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18759aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 18769aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18779aebddd1SJeff Kirsher int status; 18789aebddd1SJeff Kirsher 18799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18809aebddd1SJeff Kirsher 18819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18829aebddd1SJeff Kirsher if (!wrb) { 18839aebddd1SJeff Kirsher status = -EBUSY; 18849aebddd1SJeff Kirsher goto err; 18859aebddd1SJeff Kirsher } 18869aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1887106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1888106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1889106df1e3SSomnath Kotur wrb, mem); 18909aebddd1SJeff Kirsher 18919aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18929aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18939aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1894c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1895c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18969aebddd1SJeff Kirsher if (value == ON) 1897a2cc4e0bSSathya Perla req->if_flags = 1898a2cc4e0bSSathya Perla cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1899c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1900c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 19019aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 19029aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 19039aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1904d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1905d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1906d9d604f8SAjit Khaparde 1907d9d604f8SAjit Khaparde if (value == ON) 1908d9d604f8SAjit Khaparde req->if_flags = 1909d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 19109aebddd1SJeff Kirsher } else { 19119aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 19129aebddd1SJeff Kirsher int i = 0; 19139aebddd1SJeff Kirsher 19148e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 19158e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 19161610c79fSPadmanabh Ratnakar 19171610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 19181610c79fSPadmanabh Ratnakar * and not setting flags field 19191610c79fSPadmanabh Ratnakar */ 19201610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1921abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 192292bf14abSSathya Perla be_if_cap_flags(adapter)); 1923016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 19249aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 19259aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 19269aebddd1SJeff Kirsher } 19279aebddd1SJeff Kirsher 1928012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1929012bd387SAjit Khaparde req->if_flags_mask) { 1930012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1931012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1932012bd387SAjit Khaparde req->if_flags_mask); 1933012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1934012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1935012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1936012bd387SAjit Khaparde } 1937012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1938012bd387SAjit Khaparde 19399aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1940012bd387SAjit Khaparde 19419aebddd1SJeff Kirsher err: 19429aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19439aebddd1SJeff Kirsher return status; 19449aebddd1SJeff Kirsher } 19459aebddd1SJeff Kirsher 19469aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 19479aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 19489aebddd1SJeff Kirsher { 19499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19509aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 19519aebddd1SJeff Kirsher int status; 19529aebddd1SJeff Kirsher 1953f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1954f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1955f25b119cSPadmanabh Ratnakar return -EPERM; 1956f25b119cSPadmanabh Ratnakar 19579aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19589aebddd1SJeff Kirsher 19599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19609aebddd1SJeff Kirsher if (!wrb) { 19619aebddd1SJeff Kirsher status = -EBUSY; 19629aebddd1SJeff Kirsher goto err; 19639aebddd1SJeff Kirsher } 19649aebddd1SJeff Kirsher req = embedded_payload(wrb); 19659aebddd1SJeff Kirsher 1966106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1967a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 1968a2cc4e0bSSathya Perla wrb, NULL); 19699aebddd1SJeff Kirsher 1970b29812c1SSuresh Reddy req->hdr.version = 1; 19719aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 19729aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 19739aebddd1SJeff Kirsher 19749aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19759aebddd1SJeff Kirsher 19769aebddd1SJeff Kirsher err: 19779aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1978b29812c1SSuresh Reddy 1979b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 1980b29812c1SSuresh Reddy return -EOPNOTSUPP; 1981b29812c1SSuresh Reddy 19829aebddd1SJeff Kirsher return status; 19839aebddd1SJeff Kirsher } 19849aebddd1SJeff Kirsher 19859aebddd1SJeff Kirsher /* Uses sycn mcc */ 19869aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19879aebddd1SJeff Kirsher { 19889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19899aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 19909aebddd1SJeff Kirsher int status; 19919aebddd1SJeff Kirsher 1992f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1993f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1994f25b119cSPadmanabh Ratnakar return -EPERM; 1995f25b119cSPadmanabh Ratnakar 19969aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19979aebddd1SJeff Kirsher 19989aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19999aebddd1SJeff Kirsher if (!wrb) { 20009aebddd1SJeff Kirsher status = -EBUSY; 20019aebddd1SJeff Kirsher goto err; 20029aebddd1SJeff Kirsher } 20039aebddd1SJeff Kirsher req = embedded_payload(wrb); 20049aebddd1SJeff Kirsher 2005106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2006a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2007a2cc4e0bSSathya Perla wrb, NULL); 20089aebddd1SJeff Kirsher 20099aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20109aebddd1SJeff Kirsher if (!status) { 20119aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 20129aebddd1SJeff Kirsher embedded_payload(wrb); 20139aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 20149aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 20159aebddd1SJeff Kirsher } 20169aebddd1SJeff Kirsher 20179aebddd1SJeff Kirsher err: 20189aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20199aebddd1SJeff Kirsher return status; 20209aebddd1SJeff Kirsher } 20219aebddd1SJeff Kirsher 20229aebddd1SJeff Kirsher /* Uses mbox */ 2023e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 20249aebddd1SJeff Kirsher { 20259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20269aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 20279aebddd1SJeff Kirsher int status; 20289aebddd1SJeff Kirsher 20299aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20309aebddd1SJeff Kirsher return -1; 20319aebddd1SJeff Kirsher 20329aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20339aebddd1SJeff Kirsher req = embedded_payload(wrb); 20349aebddd1SJeff Kirsher 2035106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2036a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2037a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 20389aebddd1SJeff Kirsher 20399aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20409aebddd1SJeff Kirsher if (!status) { 20419aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 2042e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2043e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2044e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2045e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2046acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2047acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2048acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 20499aebddd1SJeff Kirsher } 20509aebddd1SJeff Kirsher 20519aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20529aebddd1SJeff Kirsher return status; 20539aebddd1SJeff Kirsher } 20549aebddd1SJeff Kirsher 20559aebddd1SJeff Kirsher /* Uses mbox */ 20569aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 20579aebddd1SJeff Kirsher { 20589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20599aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 20609aebddd1SJeff Kirsher int status; 20619aebddd1SJeff Kirsher 2062bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2063bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 2064bf99e50dSPadmanabh Ratnakar if (!status) { 2065bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2066bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 2067bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 2068bf99e50dSPadmanabh Ratnakar } 2069bf99e50dSPadmanabh Ratnakar if (status) { 2070bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2071bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2072bf99e50dSPadmanabh Ratnakar } 2073bf99e50dSPadmanabh Ratnakar return status; 2074bf99e50dSPadmanabh Ratnakar } 2075bf99e50dSPadmanabh Ratnakar 20769aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20779aebddd1SJeff Kirsher return -1; 20789aebddd1SJeff Kirsher 20799aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20809aebddd1SJeff Kirsher req = embedded_payload(wrb); 20819aebddd1SJeff Kirsher 2082106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2083a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2084a2cc4e0bSSathya Perla NULL); 20859aebddd1SJeff Kirsher 20869aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20879aebddd1SJeff Kirsher 20889aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20899aebddd1SJeff Kirsher return status; 20909aebddd1SJeff Kirsher } 20919aebddd1SJeff Kirsher 2092594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 209333cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 20949aebddd1SJeff Kirsher { 20959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20969aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 20979aebddd1SJeff Kirsher int status; 20989aebddd1SJeff Kirsher 2099da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2100da1388d6SVasundhara Volam return 0; 2101da1388d6SVasundhara Volam 2102b51aa367SKalesh AP spin_lock_bh(&adapter->mcc_lock); 21039aebddd1SJeff Kirsher 2104b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2105b51aa367SKalesh AP if (!wrb) { 2106b51aa367SKalesh AP status = -EBUSY; 2107b51aa367SKalesh AP goto err; 2108b51aa367SKalesh AP } 21099aebddd1SJeff Kirsher req = embedded_payload(wrb); 21109aebddd1SJeff Kirsher 2111106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2112106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2115594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 21169aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2117594ad54aSSuresh Reddy 2118b51aa367SKalesh AP if (!BEx_chip(adapter)) 2119594ad54aSSuresh Reddy req->hdr.version = 1; 2120594ad54aSSuresh Reddy 21219aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2122e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 21239aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 21249aebddd1SJeff Kirsher 2125b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2126b51aa367SKalesh AP err: 2127b51aa367SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 21289aebddd1SJeff Kirsher return status; 21299aebddd1SJeff Kirsher } 21309aebddd1SJeff Kirsher 21319aebddd1SJeff Kirsher /* Uses sync mcc */ 21329aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 21339aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 21349aebddd1SJeff Kirsher { 21359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21369aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 21379aebddd1SJeff Kirsher int status; 21389aebddd1SJeff Kirsher 21399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21409aebddd1SJeff Kirsher 21419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21429aebddd1SJeff Kirsher if (!wrb) { 21439aebddd1SJeff Kirsher status = -EBUSY; 21449aebddd1SJeff Kirsher goto err; 21459aebddd1SJeff Kirsher } 21469aebddd1SJeff Kirsher req = embedded_payload(wrb); 21479aebddd1SJeff Kirsher 2148106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2149a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2150a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21519aebddd1SJeff Kirsher 21529aebddd1SJeff Kirsher req->port_num = port_num; 21539aebddd1SJeff Kirsher req->beacon_state = state; 21549aebddd1SJeff Kirsher req->beacon_duration = bcn; 21559aebddd1SJeff Kirsher req->status_duration = sts; 21569aebddd1SJeff Kirsher 21579aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21589aebddd1SJeff Kirsher 21599aebddd1SJeff Kirsher err: 21609aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21619aebddd1SJeff Kirsher return status; 21629aebddd1SJeff Kirsher } 21639aebddd1SJeff Kirsher 21649aebddd1SJeff Kirsher /* Uses sync mcc */ 21659aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 21669aebddd1SJeff Kirsher { 21679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21689aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 21699aebddd1SJeff Kirsher int status; 21709aebddd1SJeff Kirsher 21719aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21729aebddd1SJeff Kirsher 21739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21749aebddd1SJeff Kirsher if (!wrb) { 21759aebddd1SJeff Kirsher status = -EBUSY; 21769aebddd1SJeff Kirsher goto err; 21779aebddd1SJeff Kirsher } 21789aebddd1SJeff Kirsher req = embedded_payload(wrb); 21799aebddd1SJeff Kirsher 2180106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2181a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2182a2cc4e0bSSathya Perla wrb, NULL); 21839aebddd1SJeff Kirsher 21849aebddd1SJeff Kirsher req->port_num = port_num; 21859aebddd1SJeff Kirsher 21869aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21879aebddd1SJeff Kirsher if (!status) { 21889aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 21899aebddd1SJeff Kirsher embedded_payload(wrb); 21909aebddd1SJeff Kirsher *state = resp->beacon_state; 21919aebddd1SJeff Kirsher } 21929aebddd1SJeff Kirsher 21939aebddd1SJeff Kirsher err: 21949aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21959aebddd1SJeff Kirsher return status; 21969aebddd1SJeff Kirsher } 21979aebddd1SJeff Kirsher 2198e36edd9dSMark Leonard /* Uses sync mcc */ 2199e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2200e36edd9dSMark Leonard u8 page_num, u8 *data) 2201e36edd9dSMark Leonard { 2202e36edd9dSMark Leonard struct be_dma_mem cmd; 2203e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2204e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2205e36edd9dSMark Leonard int status; 2206e36edd9dSMark Leonard 2207e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2208e36edd9dSMark Leonard return -EINVAL; 2209e36edd9dSMark Leonard 2210e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2211e36edd9dSMark Leonard cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 2212e36edd9dSMark Leonard if (!cmd.va) { 2213e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2214e36edd9dSMark Leonard return -ENOMEM; 2215e36edd9dSMark Leonard } 2216e36edd9dSMark Leonard memset(cmd.va, 0, cmd.size); 2217e36edd9dSMark Leonard 2218e36edd9dSMark Leonard spin_lock_bh(&adapter->mcc_lock); 2219e36edd9dSMark Leonard 2220e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2221e36edd9dSMark Leonard if (!wrb) { 2222e36edd9dSMark Leonard status = -EBUSY; 2223e36edd9dSMark Leonard goto err; 2224e36edd9dSMark Leonard } 2225e36edd9dSMark Leonard req = cmd.va; 2226e36edd9dSMark Leonard 2227e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2228e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2229e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2230e36edd9dSMark Leonard 2231e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2232e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2233e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2234e36edd9dSMark Leonard if (!status) { 2235e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2236e36edd9dSMark Leonard 2237e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2238e36edd9dSMark Leonard } 2239e36edd9dSMark Leonard err: 2240e36edd9dSMark Leonard spin_unlock_bh(&adapter->mcc_lock); 2241e36edd9dSMark Leonard pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 2242e36edd9dSMark Leonard return status; 2243e36edd9dSMark Leonard } 2244e36edd9dSMark Leonard 22459aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2246f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2247f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2248f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 22499aebddd1SJeff Kirsher { 22509aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22519aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 22529aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 22539aebddd1SJeff Kirsher void *ctxt = NULL; 22549aebddd1SJeff Kirsher int status; 22559aebddd1SJeff Kirsher 22569aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22579aebddd1SJeff Kirsher adapter->flash_status = 0; 22589aebddd1SJeff Kirsher 22599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22609aebddd1SJeff Kirsher if (!wrb) { 22619aebddd1SJeff Kirsher status = -EBUSY; 22629aebddd1SJeff Kirsher goto err_unlock; 22639aebddd1SJeff Kirsher } 22649aebddd1SJeff Kirsher 22659aebddd1SJeff Kirsher req = embedded_payload(wrb); 22669aebddd1SJeff Kirsher 2267106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 22689aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2269106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2270106df1e3SSomnath Kotur NULL); 22719aebddd1SJeff Kirsher 22729aebddd1SJeff Kirsher ctxt = &req->context; 22739aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22749aebddd1SJeff Kirsher write_length, ctxt, data_size); 22759aebddd1SJeff Kirsher 22769aebddd1SJeff Kirsher if (data_size == 0) 22779aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22789aebddd1SJeff Kirsher eof, ctxt, 1); 22799aebddd1SJeff Kirsher else 22809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22819aebddd1SJeff Kirsher eof, ctxt, 0); 22829aebddd1SJeff Kirsher 22839aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 22849aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2285242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 22869aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 22879aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 22889aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 22899aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 22909aebddd1SJeff Kirsher & 0xFFFFFFFF); 22919aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 22929aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 22939aebddd1SJeff Kirsher 22949aebddd1SJeff Kirsher be_mcc_notify(adapter); 22959aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22969aebddd1SJeff Kirsher 22975eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2298701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2299fd45160cSKalesh AP status = -ETIMEDOUT; 23009aebddd1SJeff Kirsher else 23019aebddd1SJeff Kirsher status = adapter->flash_status; 23029aebddd1SJeff Kirsher 23039aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2304f67ef7baSPadmanabh Ratnakar if (!status) { 23059aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2306f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2307f67ef7baSPadmanabh Ratnakar } else { 23089aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2309f67ef7baSPadmanabh Ratnakar } 23109aebddd1SJeff Kirsher 23119aebddd1SJeff Kirsher return status; 23129aebddd1SJeff Kirsher 23139aebddd1SJeff Kirsher err_unlock: 23149aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23159aebddd1SJeff Kirsher return status; 23169aebddd1SJeff Kirsher } 23179aebddd1SJeff Kirsher 23186809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 23196809cee0SRavikumar Nelavelli { 23206809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 23216809cee0SRavikumar Nelavelli int status; 23226809cee0SRavikumar Nelavelli 23236809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 23246809cee0SRavikumar Nelavelli page_data); 23256809cee0SRavikumar Nelavelli if (!status) { 23266809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 23276809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 23286809cee0SRavikumar Nelavelli adapter->phy.cable_type = 23296809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 23306809cee0SRavikumar Nelavelli break; 23316809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 23326809cee0SRavikumar Nelavelli adapter->phy.cable_type = 23336809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 23346809cee0SRavikumar Nelavelli break; 23356809cee0SRavikumar Nelavelli default: 23366809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 23376809cee0SRavikumar Nelavelli break; 23386809cee0SRavikumar Nelavelli } 23396809cee0SRavikumar Nelavelli } 23406809cee0SRavikumar Nelavelli return status; 23416809cee0SRavikumar Nelavelli } 23426809cee0SRavikumar Nelavelli 2343f0613380SKalesh AP int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name) 2344f0613380SKalesh AP { 2345f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2346f0613380SKalesh AP struct be_mcc_wrb *wrb; 2347f0613380SKalesh AP int status; 2348f0613380SKalesh AP 2349f0613380SKalesh AP spin_lock_bh(&adapter->mcc_lock); 2350f0613380SKalesh AP 2351f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2352f0613380SKalesh AP if (!wrb) { 2353f0613380SKalesh AP status = -EBUSY; 2354f0613380SKalesh AP goto err; 2355f0613380SKalesh AP } 2356f0613380SKalesh AP 2357f0613380SKalesh AP req = embedded_payload(wrb); 2358f0613380SKalesh AP 2359f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2360f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2361f0613380SKalesh AP sizeof(*req), wrb, NULL); 2362f0613380SKalesh AP 2363242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2364f0613380SKalesh AP 2365f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2366f0613380SKalesh AP err: 2367f0613380SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 2368f0613380SKalesh AP return status; 2369f0613380SKalesh AP } 2370f0613380SKalesh AP 2371de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2372de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2373de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2374de49bd5aSPadmanabh Ratnakar { 2375de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2376de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2377de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2378de49bd5aSPadmanabh Ratnakar int status; 2379de49bd5aSPadmanabh Ratnakar 2380de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2381de49bd5aSPadmanabh Ratnakar 2382de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2383de49bd5aSPadmanabh Ratnakar if (!wrb) { 2384de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2385de49bd5aSPadmanabh Ratnakar goto err_unlock; 2386de49bd5aSPadmanabh Ratnakar } 2387de49bd5aSPadmanabh Ratnakar 2388de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2389de49bd5aSPadmanabh Ratnakar 2390de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2391de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2392de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2393de49bd5aSPadmanabh Ratnakar NULL); 2394de49bd5aSPadmanabh Ratnakar 2395de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2396de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2397de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2398de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2399de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2400de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2401de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2402de49bd5aSPadmanabh Ratnakar 2403de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2404de49bd5aSPadmanabh Ratnakar 2405de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2406de49bd5aSPadmanabh Ratnakar if (!status) { 2407de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2408de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2409de49bd5aSPadmanabh Ratnakar } else { 2410de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2411de49bd5aSPadmanabh Ratnakar } 2412de49bd5aSPadmanabh Ratnakar 2413de49bd5aSPadmanabh Ratnakar err_unlock: 2414de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2415de49bd5aSPadmanabh Ratnakar return status; 2416de49bd5aSPadmanabh Ratnakar } 2417de49bd5aSPadmanabh Ratnakar 24189aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 24199aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 24209aebddd1SJeff Kirsher { 24219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24229aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 24239aebddd1SJeff Kirsher int status; 24249aebddd1SJeff Kirsher 24259aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24269aebddd1SJeff Kirsher adapter->flash_status = 0; 24279aebddd1SJeff Kirsher 24289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24299aebddd1SJeff Kirsher if (!wrb) { 24309aebddd1SJeff Kirsher status = -EBUSY; 24319aebddd1SJeff Kirsher goto err_unlock; 24329aebddd1SJeff Kirsher } 24339aebddd1SJeff Kirsher req = cmd->va; 24349aebddd1SJeff Kirsher 2435106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2436a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2437a2cc4e0bSSathya Perla cmd); 24389aebddd1SJeff Kirsher 24399aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 24409aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 24419aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 24429aebddd1SJeff Kirsher 24439aebddd1SJeff Kirsher be_mcc_notify(adapter); 24449aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24459aebddd1SJeff Kirsher 24465eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2447e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2448fd45160cSKalesh AP status = -ETIMEDOUT; 24499aebddd1SJeff Kirsher else 24509aebddd1SJeff Kirsher status = adapter->flash_status; 24519aebddd1SJeff Kirsher 24529aebddd1SJeff Kirsher return status; 24539aebddd1SJeff Kirsher 24549aebddd1SJeff Kirsher err_unlock: 24559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24569aebddd1SJeff Kirsher return status; 24579aebddd1SJeff Kirsher } 24589aebddd1SJeff Kirsher 24599aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 246096c9b2e4SVasundhara Volam u16 optype, int offset) 24619aebddd1SJeff Kirsher { 24629aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2463be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 24649aebddd1SJeff Kirsher int status; 24659aebddd1SJeff Kirsher 24669aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24679aebddd1SJeff Kirsher 24689aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24699aebddd1SJeff Kirsher if (!wrb) { 24709aebddd1SJeff Kirsher status = -EBUSY; 24719aebddd1SJeff Kirsher goto err; 24729aebddd1SJeff Kirsher } 24739aebddd1SJeff Kirsher req = embedded_payload(wrb); 24749aebddd1SJeff Kirsher 2475106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2476be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2477be716446SPadmanabh Ratnakar wrb, NULL); 24789aebddd1SJeff Kirsher 247996c9b2e4SVasundhara Volam req->params.op_type = cpu_to_le32(optype); 24809aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 24819aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 24829aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 24839aebddd1SJeff Kirsher 24849aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24859aebddd1SJeff Kirsher if (!status) 2486be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 24879aebddd1SJeff Kirsher 24889aebddd1SJeff Kirsher err: 24899aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24909aebddd1SJeff Kirsher return status; 24919aebddd1SJeff Kirsher } 24929aebddd1SJeff Kirsher 24939aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 24949aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24959aebddd1SJeff Kirsher { 24969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24979aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 24989aebddd1SJeff Kirsher int status; 24999aebddd1SJeff Kirsher 25009aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25019aebddd1SJeff Kirsher 25029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25039aebddd1SJeff Kirsher if (!wrb) { 25049aebddd1SJeff Kirsher status = -EBUSY; 25059aebddd1SJeff Kirsher goto err; 25069aebddd1SJeff Kirsher } 25079aebddd1SJeff Kirsher req = nonemb_cmd->va; 25089aebddd1SJeff Kirsher 2509106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2510a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 2511a2cc4e0bSSathya Perla wrb, nonemb_cmd); 25129aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 25139aebddd1SJeff Kirsher 25149aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25159aebddd1SJeff Kirsher 25169aebddd1SJeff Kirsher err: 25179aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25189aebddd1SJeff Kirsher return status; 25199aebddd1SJeff Kirsher } 25209aebddd1SJeff Kirsher 25219aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 25229aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 25239aebddd1SJeff Kirsher { 25249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25259aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 25269aebddd1SJeff Kirsher int status; 25279aebddd1SJeff Kirsher 25289aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25299aebddd1SJeff Kirsher 25309aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25319aebddd1SJeff Kirsher if (!wrb) { 25329aebddd1SJeff Kirsher status = -EBUSY; 25339aebddd1SJeff Kirsher goto err; 25349aebddd1SJeff Kirsher } 25359aebddd1SJeff Kirsher 25369aebddd1SJeff Kirsher req = embedded_payload(wrb); 25379aebddd1SJeff Kirsher 2538106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2539a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 2540a2cc4e0bSSathya Perla wrb, NULL); 25419aebddd1SJeff Kirsher 25429aebddd1SJeff Kirsher req->src_port = port_num; 25439aebddd1SJeff Kirsher req->dest_port = port_num; 25449aebddd1SJeff Kirsher req->loopback_type = loopback_type; 25459aebddd1SJeff Kirsher req->loopback_state = enable; 25469aebddd1SJeff Kirsher 25479aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25489aebddd1SJeff Kirsher err: 25499aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25509aebddd1SJeff Kirsher return status; 25519aebddd1SJeff Kirsher } 25529aebddd1SJeff Kirsher 25539aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 2554a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 2555a2cc4e0bSSathya Perla u64 pattern) 25569aebddd1SJeff Kirsher { 25579aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25589aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 25595eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 25609aebddd1SJeff Kirsher int status; 25619aebddd1SJeff Kirsher 25629aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25639aebddd1SJeff Kirsher 25649aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25659aebddd1SJeff Kirsher if (!wrb) { 25669aebddd1SJeff Kirsher status = -EBUSY; 25679aebddd1SJeff Kirsher goto err; 25689aebddd1SJeff Kirsher } 25699aebddd1SJeff Kirsher 25709aebddd1SJeff Kirsher req = embedded_payload(wrb); 25719aebddd1SJeff Kirsher 2572106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2573a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 2574a2cc4e0bSSathya Perla NULL); 25759aebddd1SJeff Kirsher 25765eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 25779aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 25789aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 25799aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 25809aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 25819aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 25829aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 25839aebddd1SJeff Kirsher 25845eeff635SSuresh Reddy be_mcc_notify(adapter); 25859aebddd1SJeff Kirsher 25865eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 25875eeff635SSuresh Reddy 25885eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 25895eeff635SSuresh Reddy resp = embedded_payload(wrb); 25905eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 25915eeff635SSuresh Reddy 25925eeff635SSuresh Reddy return status; 25939aebddd1SJeff Kirsher err: 25949aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25959aebddd1SJeff Kirsher return status; 25969aebddd1SJeff Kirsher } 25979aebddd1SJeff Kirsher 25989aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 25999aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 26009aebddd1SJeff Kirsher { 26019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26029aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 26039aebddd1SJeff Kirsher int status; 26049aebddd1SJeff Kirsher int i, j = 0; 26059aebddd1SJeff Kirsher 26069aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26079aebddd1SJeff Kirsher 26089aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26099aebddd1SJeff Kirsher if (!wrb) { 26109aebddd1SJeff Kirsher status = -EBUSY; 26119aebddd1SJeff Kirsher goto err; 26129aebddd1SJeff Kirsher } 26139aebddd1SJeff Kirsher req = cmd->va; 2614106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2615a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 2616a2cc4e0bSSathya Perla cmd); 26179aebddd1SJeff Kirsher 26189aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 26199aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 26209aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 26219aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 26229aebddd1SJeff Kirsher j++; 26239aebddd1SJeff Kirsher if (j > 7) 26249aebddd1SJeff Kirsher j = 0; 26259aebddd1SJeff Kirsher } 26269aebddd1SJeff Kirsher 26279aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26289aebddd1SJeff Kirsher 26299aebddd1SJeff Kirsher if (!status) { 26309aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 26319aebddd1SJeff Kirsher resp = cmd->va; 26329aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 26339aebddd1SJeff Kirsher resp->snd_err) { 26349aebddd1SJeff Kirsher status = -1; 26359aebddd1SJeff Kirsher } 26369aebddd1SJeff Kirsher } 26379aebddd1SJeff Kirsher 26389aebddd1SJeff Kirsher err: 26399aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26409aebddd1SJeff Kirsher return status; 26419aebddd1SJeff Kirsher } 26429aebddd1SJeff Kirsher 26439aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 26449aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 26459aebddd1SJeff Kirsher { 26469aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26479aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 26489aebddd1SJeff Kirsher int status; 26499aebddd1SJeff Kirsher 26509aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26519aebddd1SJeff Kirsher 26529aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26539aebddd1SJeff Kirsher if (!wrb) { 26549aebddd1SJeff Kirsher status = -EBUSY; 26559aebddd1SJeff Kirsher goto err; 26569aebddd1SJeff Kirsher } 26579aebddd1SJeff Kirsher req = nonemb_cmd->va; 26589aebddd1SJeff Kirsher 2659106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2660106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2661106df1e3SSomnath Kotur nonemb_cmd); 26629aebddd1SJeff Kirsher 26639aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26649aebddd1SJeff Kirsher 26659aebddd1SJeff Kirsher err: 26669aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26679aebddd1SJeff Kirsher return status; 26689aebddd1SJeff Kirsher } 26699aebddd1SJeff Kirsher 267042f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 26719aebddd1SJeff Kirsher { 26729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26739aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 26749aebddd1SJeff Kirsher struct be_dma_mem cmd; 26759aebddd1SJeff Kirsher int status; 26769aebddd1SJeff Kirsher 2677f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2678f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2679f25b119cSPadmanabh Ratnakar return -EPERM; 2680f25b119cSPadmanabh Ratnakar 26819aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26829aebddd1SJeff Kirsher 26839aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26849aebddd1SJeff Kirsher if (!wrb) { 26859aebddd1SJeff Kirsher status = -EBUSY; 26869aebddd1SJeff Kirsher goto err; 26879aebddd1SJeff Kirsher } 26889aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 2689a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 26909aebddd1SJeff Kirsher if (!cmd.va) { 26919aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 26929aebddd1SJeff Kirsher status = -ENOMEM; 26939aebddd1SJeff Kirsher goto err; 26949aebddd1SJeff Kirsher } 26959aebddd1SJeff Kirsher 26969aebddd1SJeff Kirsher req = cmd.va; 26979aebddd1SJeff Kirsher 2698106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2699106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2700106df1e3SSomnath Kotur wrb, &cmd); 27019aebddd1SJeff Kirsher 27029aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 27039aebddd1SJeff Kirsher if (!status) { 27049aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 27059aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 270642f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 270742f11cf2SAjit Khaparde adapter->phy.interface_type = 27089aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 270942f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 271042f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 271142f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 271242f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 271342f11cf2SAjit Khaparde adapter->phy.misc_params = 271442f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 271568cb7e47SVasundhara Volam 271668cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 271768cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 271868cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 271968cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 272068cb7e47SVasundhara Volam } 27219aebddd1SJeff Kirsher } 2722a2cc4e0bSSathya Perla pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 27239aebddd1SJeff Kirsher err: 27249aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 27259aebddd1SJeff Kirsher return status; 27269aebddd1SJeff Kirsher } 27279aebddd1SJeff Kirsher 27289aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 27299aebddd1SJeff Kirsher { 27309aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 27319aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 27329aebddd1SJeff Kirsher int status; 27339aebddd1SJeff Kirsher 27349aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 27359aebddd1SJeff Kirsher 27369aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 27379aebddd1SJeff Kirsher if (!wrb) { 27389aebddd1SJeff Kirsher status = -EBUSY; 27399aebddd1SJeff Kirsher goto err; 27409aebddd1SJeff Kirsher } 27419aebddd1SJeff Kirsher 27429aebddd1SJeff Kirsher req = embedded_payload(wrb); 27439aebddd1SJeff Kirsher 2744106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2745106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 27469aebddd1SJeff Kirsher 27479aebddd1SJeff Kirsher req->hdr.domain = domain; 27489aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 27499aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 27509aebddd1SJeff Kirsher 27519aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 27529aebddd1SJeff Kirsher 27539aebddd1SJeff Kirsher err: 27549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 27559aebddd1SJeff Kirsher return status; 27569aebddd1SJeff Kirsher } 27579aebddd1SJeff Kirsher 27589aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 27599aebddd1SJeff Kirsher { 27609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 27619aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 27629aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 27639aebddd1SJeff Kirsher int status; 27649aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 27659aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 27669aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 27679aebddd1SJeff Kirsher 2768d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2769d98ef50fSSuresh Reddy return -1; 2770d98ef50fSSuresh Reddy 27719aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 27729aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 27739aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 27749aebddd1SJeff Kirsher &attribs_cmd.dma); 27759aebddd1SJeff Kirsher if (!attribs_cmd.va) { 2776a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 2777d98ef50fSSuresh Reddy status = -ENOMEM; 2778d98ef50fSSuresh Reddy goto err; 27799aebddd1SJeff Kirsher } 27809aebddd1SJeff Kirsher 27819aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 27829aebddd1SJeff Kirsher if (!wrb) { 27839aebddd1SJeff Kirsher status = -EBUSY; 27849aebddd1SJeff Kirsher goto err; 27859aebddd1SJeff Kirsher } 27869aebddd1SJeff Kirsher req = attribs_cmd.va; 27879aebddd1SJeff Kirsher 2788106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2789a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 2790a2cc4e0bSSathya Perla wrb, &attribs_cmd); 27919aebddd1SJeff Kirsher 27929aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 27939aebddd1SJeff Kirsher if (!status) { 27949aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 27959aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 27969aebddd1SJeff Kirsher } 27979aebddd1SJeff Kirsher 27989aebddd1SJeff Kirsher err: 27999aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2800d98ef50fSSuresh Reddy if (attribs_cmd.va) 2801d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2802d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 28039aebddd1SJeff Kirsher return status; 28049aebddd1SJeff Kirsher } 28059aebddd1SJeff Kirsher 28069aebddd1SJeff Kirsher /* Uses mbox */ 28079aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 28089aebddd1SJeff Kirsher { 28099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 28109aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 28119aebddd1SJeff Kirsher int status; 28129aebddd1SJeff Kirsher 28139aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 28149aebddd1SJeff Kirsher return -1; 28159aebddd1SJeff Kirsher 28169aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 28179aebddd1SJeff Kirsher if (!wrb) { 28189aebddd1SJeff Kirsher status = -EBUSY; 28199aebddd1SJeff Kirsher goto err; 28209aebddd1SJeff Kirsher } 28219aebddd1SJeff Kirsher 28229aebddd1SJeff Kirsher req = embedded_payload(wrb); 28239aebddd1SJeff Kirsher 2824106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2825a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 2826a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 28279aebddd1SJeff Kirsher 28289aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 28299aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 28309aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 28319aebddd1SJeff Kirsher 28329aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 28339aebddd1SJeff Kirsher if (!status) { 28349aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 28359aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 28369aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2837d379142bSSathya Perla if (!adapter->be3_native) 2838d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2839d379142bSSathya Perla "adapter not in advanced mode\n"); 28409aebddd1SJeff Kirsher } 28419aebddd1SJeff Kirsher err: 28429aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 28439aebddd1SJeff Kirsher return status; 28449aebddd1SJeff Kirsher } 2845590c391dSPadmanabh Ratnakar 2846f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2847f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2848f25b119cSPadmanabh Ratnakar u32 domain) 2849f25b119cSPadmanabh Ratnakar { 2850f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2851f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2852f25b119cSPadmanabh Ratnakar int status; 2853f25b119cSPadmanabh Ratnakar 2854f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2855f25b119cSPadmanabh Ratnakar 2856f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2857f25b119cSPadmanabh Ratnakar if (!wrb) { 2858f25b119cSPadmanabh Ratnakar status = -EBUSY; 2859f25b119cSPadmanabh Ratnakar goto err; 2860f25b119cSPadmanabh Ratnakar } 2861f25b119cSPadmanabh Ratnakar 2862f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2863f25b119cSPadmanabh Ratnakar 2864f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2865f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2866f25b119cSPadmanabh Ratnakar wrb, NULL); 2867f25b119cSPadmanabh Ratnakar 2868f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2869f25b119cSPadmanabh Ratnakar 2870f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2871f25b119cSPadmanabh Ratnakar if (!status) { 2872f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2873f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2874f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 287502308d74SSuresh Reddy 287602308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 287702308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 287802308d74SSuresh Reddy */ 287902308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 288002308d74SSuresh Reddy be_physfn(adapter)) 288102308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 2882f25b119cSPadmanabh Ratnakar } 2883f25b119cSPadmanabh Ratnakar 2884f25b119cSPadmanabh Ratnakar err: 2885f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2886f25b119cSPadmanabh Ratnakar return status; 2887f25b119cSPadmanabh Ratnakar } 2888f25b119cSPadmanabh Ratnakar 288904a06028SSathya Perla /* Set privilege(s) for a function */ 289004a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 289104a06028SSathya Perla u32 domain) 289204a06028SSathya Perla { 289304a06028SSathya Perla struct be_mcc_wrb *wrb; 289404a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 289504a06028SSathya Perla int status; 289604a06028SSathya Perla 289704a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 289804a06028SSathya Perla 289904a06028SSathya Perla wrb = wrb_from_mccq(adapter); 290004a06028SSathya Perla if (!wrb) { 290104a06028SSathya Perla status = -EBUSY; 290204a06028SSathya Perla goto err; 290304a06028SSathya Perla } 290404a06028SSathya Perla 290504a06028SSathya Perla req = embedded_payload(wrb); 290604a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 290704a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 290804a06028SSathya Perla wrb, NULL); 290904a06028SSathya Perla req->hdr.domain = domain; 291004a06028SSathya Perla if (lancer_chip(adapter)) 291104a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 291204a06028SSathya Perla else 291304a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 291404a06028SSathya Perla 291504a06028SSathya Perla status = be_mcc_notify_wait(adapter); 291604a06028SSathya Perla err: 291704a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 291804a06028SSathya Perla return status; 291904a06028SSathya Perla } 292004a06028SSathya Perla 29215a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 29225a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 29235a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 29245a712c13SSathya Perla */ 29251578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 2926b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 2927b188f090SSuresh Reddy u8 domain) 2928590c391dSPadmanabh Ratnakar { 2929590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2930590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2931590c391dSPadmanabh Ratnakar int status; 2932590c391dSPadmanabh Ratnakar int mac_count; 2933e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2934e5e1ee89SPadmanabh Ratnakar int i; 2935e5e1ee89SPadmanabh Ratnakar 2936e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2937e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2938e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2939e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2940e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2941e5e1ee89SPadmanabh Ratnakar 2942e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2943e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2944e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2945e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2946e5e1ee89SPadmanabh Ratnakar } 2947590c391dSPadmanabh Ratnakar 2948590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2949590c391dSPadmanabh Ratnakar 2950590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2951590c391dSPadmanabh Ratnakar if (!wrb) { 2952590c391dSPadmanabh Ratnakar status = -EBUSY; 2953e5e1ee89SPadmanabh Ratnakar goto out; 2954590c391dSPadmanabh Ratnakar } 2955e5e1ee89SPadmanabh Ratnakar 2956e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2957590c391dSPadmanabh Ratnakar 2958590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2959bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2960bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2961590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2962e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 29635a712c13SSathya Perla if (*pmac_id_valid) { 29645a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 2965b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 29665a712c13SSathya Perla req->perm_override = 0; 29675a712c13SSathya Perla } else { 2968e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 29695a712c13SSathya Perla } 2970590c391dSPadmanabh Ratnakar 2971590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2972590c391dSPadmanabh Ratnakar if (!status) { 2973590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2974e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 29755a712c13SSathya Perla 29765a712c13SSathya Perla if (*pmac_id_valid) { 29775a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 29785a712c13SSathya Perla ETH_ALEN); 29795a712c13SSathya Perla goto out; 29805a712c13SSathya Perla } 29815a712c13SSathya Perla 2982e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2983e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 29841578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 29851578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 29861578e777SPadmanabh Ratnakar * found. 2987e5e1ee89SPadmanabh Ratnakar */ 2988590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2989e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2990e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2991e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2992e5e1ee89SPadmanabh Ratnakar 2993e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2994e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2995e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2996e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2997e5e1ee89SPadmanabh Ratnakar */ 2998e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 29995a712c13SSathya Perla *pmac_id_valid = true; 3000e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3001e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3002e5e1ee89SPadmanabh Ratnakar goto out; 3003590c391dSPadmanabh Ratnakar } 3004590c391dSPadmanabh Ratnakar } 30051578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 30065a712c13SSathya Perla *pmac_id_valid = false; 3007e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3008e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3009590c391dSPadmanabh Ratnakar } 3010590c391dSPadmanabh Ratnakar 3011e5e1ee89SPadmanabh Ratnakar out: 3012590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3013e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 3014e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3015590c391dSPadmanabh Ratnakar return status; 3016590c391dSPadmanabh Ratnakar } 3017590c391dSPadmanabh Ratnakar 3018a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3019a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 30205a712c13SSathya Perla { 30215a712c13SSathya Perla 3022b188f090SSuresh Reddy if (!active) 3023b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3024b188f090SSuresh Reddy if_handle, domain); 30253175d8c2SSathya Perla if (BEx_chip(adapter)) 30265a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3027b188f090SSuresh Reddy if_handle, curr_pmac_id); 30283175d8c2SSathya Perla else 30293175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 30303175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3031b188f090SSuresh Reddy &curr_pmac_id, 3032b188f090SSuresh Reddy if_handle, domain); 30335a712c13SSathya Perla } 30345a712c13SSathya Perla 303595046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 303695046b92SSathya Perla { 303795046b92SSathya Perla int status; 303895046b92SSathya Perla bool pmac_valid = false; 303995046b92SSathya Perla 304095046b92SSathya Perla memset(mac, 0, ETH_ALEN); 304195046b92SSathya Perla 30423175d8c2SSathya Perla if (BEx_chip(adapter)) { 30433175d8c2SSathya Perla if (be_physfn(adapter)) 30443175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 30453175d8c2SSathya Perla 0); 304695046b92SSathya Perla else 304795046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 304895046b92SSathya Perla adapter->if_handle, 0); 30493175d8c2SSathya Perla } else { 30503175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3051b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 30523175d8c2SSathya Perla } 30533175d8c2SSathya Perla 305495046b92SSathya Perla return status; 305595046b92SSathya Perla } 305695046b92SSathya Perla 3057590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3058590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3059590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3060590c391dSPadmanabh Ratnakar { 3061590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3062590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3063590c391dSPadmanabh Ratnakar int status; 3064590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3065590c391dSPadmanabh Ratnakar 3066590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3067590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3068590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 3069590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 3070d0320f75SJoe Perches if (!cmd.va) 3071590c391dSPadmanabh Ratnakar return -ENOMEM; 3072590c391dSPadmanabh Ratnakar 3073590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3074590c391dSPadmanabh Ratnakar 3075590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3076590c391dSPadmanabh Ratnakar if (!wrb) { 3077590c391dSPadmanabh Ratnakar status = -EBUSY; 3078590c391dSPadmanabh Ratnakar goto err; 3079590c391dSPadmanabh Ratnakar } 3080590c391dSPadmanabh Ratnakar 3081590c391dSPadmanabh Ratnakar req = cmd.va; 3082590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3083590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3084590c391dSPadmanabh Ratnakar wrb, &cmd); 3085590c391dSPadmanabh Ratnakar 3086590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3087590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3088590c391dSPadmanabh Ratnakar if (mac_count) 3089590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3090590c391dSPadmanabh Ratnakar 3091590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3092590c391dSPadmanabh Ratnakar 3093590c391dSPadmanabh Ratnakar err: 3094a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3095590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3096590c391dSPadmanabh Ratnakar return status; 3097590c391dSPadmanabh Ratnakar } 30984762f6ceSAjit Khaparde 30993175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 31003175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 31013175d8c2SSathya Perla * current list are active. 31023175d8c2SSathya Perla */ 31033175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 31043175d8c2SSathya Perla { 31053175d8c2SSathya Perla bool active_mac = false; 31063175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 31073175d8c2SSathya Perla u32 pmac_id; 31083175d8c2SSathya Perla int status; 31093175d8c2SSathya Perla 31103175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3111b188f090SSuresh Reddy &pmac_id, if_id, dom); 3112b188f090SSuresh Reddy 31133175d8c2SSathya Perla if (!status && active_mac) 31143175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 31153175d8c2SSathya Perla 31163175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 31173175d8c2SSathya Perla } 31183175d8c2SSathya Perla 3119f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3120a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 3121f1f3ee1bSAjit Khaparde { 3122f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3123f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3124f1f3ee1bSAjit Khaparde void *ctxt; 3125f1f3ee1bSAjit Khaparde int status; 3126f1f3ee1bSAjit Khaparde 3127f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3128f1f3ee1bSAjit Khaparde 3129f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3130f1f3ee1bSAjit Khaparde if (!wrb) { 3131f1f3ee1bSAjit Khaparde status = -EBUSY; 3132f1f3ee1bSAjit Khaparde goto err; 3133f1f3ee1bSAjit Khaparde } 3134f1f3ee1bSAjit Khaparde 3135f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3136f1f3ee1bSAjit Khaparde ctxt = &req->context; 3137f1f3ee1bSAjit Khaparde 3138f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3139a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3140a2cc4e0bSSathya Perla NULL); 3141f1f3ee1bSAjit Khaparde 3142f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3143f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3144f1f3ee1bSAjit Khaparde if (pvid) { 3145f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3146f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3147f1f3ee1bSAjit Khaparde } 3148a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 3149a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3150a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3151a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3152a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3153a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3154a77dcb8cSAjit Khaparde } 3155f1f3ee1bSAjit Khaparde 3156f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3157f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3158f1f3ee1bSAjit Khaparde 3159f1f3ee1bSAjit Khaparde err: 3160f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3161f1f3ee1bSAjit Khaparde return status; 3162f1f3ee1bSAjit Khaparde } 3163f1f3ee1bSAjit Khaparde 3164f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3165f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3166a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 3167f1f3ee1bSAjit Khaparde { 3168f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3169f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3170f1f3ee1bSAjit Khaparde void *ctxt; 3171f1f3ee1bSAjit Khaparde int status; 3172f1f3ee1bSAjit Khaparde u16 vid; 3173f1f3ee1bSAjit Khaparde 3174f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3175f1f3ee1bSAjit Khaparde 3176f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3177f1f3ee1bSAjit Khaparde if (!wrb) { 3178f1f3ee1bSAjit Khaparde status = -EBUSY; 3179f1f3ee1bSAjit Khaparde goto err; 3180f1f3ee1bSAjit Khaparde } 3181f1f3ee1bSAjit Khaparde 3182f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3183f1f3ee1bSAjit Khaparde ctxt = &req->context; 3184f1f3ee1bSAjit Khaparde 3185f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3186a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3187a2cc4e0bSSathya Perla NULL); 3188f1f3ee1bSAjit Khaparde 3189f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3190a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3191a77dcb8cSAjit Khaparde ctxt, intf_id); 3192f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3193a77dcb8cSAjit Khaparde 31942c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3195a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3196a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3197a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3198a77dcb8cSAjit Khaparde } 3199f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3200f1f3ee1bSAjit Khaparde 3201f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3202f1f3ee1bSAjit Khaparde if (!status) { 3203f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3204f1f3ee1bSAjit Khaparde embedded_payload(wrb); 3205a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3206f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3207f1f3ee1bSAjit Khaparde pvid, &resp->context); 3208a77dcb8cSAjit Khaparde if (pvid) 3209f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3210a77dcb8cSAjit Khaparde if (mode) 3211a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3212a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3213f1f3ee1bSAjit Khaparde } 3214f1f3ee1bSAjit Khaparde 3215f1f3ee1bSAjit Khaparde err: 3216f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3217f1f3ee1bSAjit Khaparde return status; 3218f1f3ee1bSAjit Khaparde } 3219f1f3ee1bSAjit Khaparde 32204762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 32214762f6ceSAjit Khaparde { 32224762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 32234762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 322476a9e08eSSuresh Reddy int status = 0; 32254762f6ceSAjit Khaparde struct be_dma_mem cmd; 32264762f6ceSAjit Khaparde 3227f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3228f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3229f25b119cSPadmanabh Ratnakar return -EPERM; 3230f25b119cSPadmanabh Ratnakar 323176a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 323276a9e08eSSuresh Reddy return status; 323376a9e08eSSuresh Reddy 3234d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3235d98ef50fSSuresh Reddy return -1; 3236d98ef50fSSuresh Reddy 32374762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 32384762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 3239a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 32404762f6ceSAjit Khaparde if (!cmd.va) { 3241a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3242d98ef50fSSuresh Reddy status = -ENOMEM; 3243d98ef50fSSuresh Reddy goto err; 32444762f6ceSAjit Khaparde } 32454762f6ceSAjit Khaparde 32464762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 32474762f6ceSAjit Khaparde if (!wrb) { 32484762f6ceSAjit Khaparde status = -EBUSY; 32494762f6ceSAjit Khaparde goto err; 32504762f6ceSAjit Khaparde } 32514762f6ceSAjit Khaparde 32524762f6ceSAjit Khaparde req = cmd.va; 32534762f6ceSAjit Khaparde 32544762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 32554762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 325676a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 32574762f6ceSAjit Khaparde 32584762f6ceSAjit Khaparde req->hdr.version = 1; 32594762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 32604762f6ceSAjit Khaparde 32614762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 32624762f6ceSAjit Khaparde if (!status) { 32634762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 32644762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 32654762f6ceSAjit Khaparde 32664762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 326776a9e08eSSuresh Reddy if (adapter->wol_cap & BE_WOL_CAP) 326876a9e08eSSuresh Reddy adapter->wol_en = true; 32694762f6ceSAjit Khaparde } 32704762f6ceSAjit Khaparde err: 32714762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3272d98ef50fSSuresh Reddy if (cmd.va) 32734762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 32744762f6ceSAjit Khaparde return status; 3275941a77d5SSomnath Kotur 3276941a77d5SSomnath Kotur } 3277baaa08d1SVasundhara Volam 3278baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 3279baaa08d1SVasundhara Volam { 3280baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3281baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3282baaa08d1SVasundhara Volam int status; 3283baaa08d1SVasundhara Volam int i, j; 3284baaa08d1SVasundhara Volam 3285baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3286baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3287baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3288baaa08d1SVasundhara Volam &extfat_cmd.dma); 3289baaa08d1SVasundhara Volam if (!extfat_cmd.va) 3290baaa08d1SVasundhara Volam return -ENOMEM; 3291baaa08d1SVasundhara Volam 3292baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3293baaa08d1SVasundhara Volam if (status) 3294baaa08d1SVasundhara Volam goto err; 3295baaa08d1SVasundhara Volam 3296baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 3297baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 3298baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 3299baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 3300baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 3301baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 3302baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 3303baaa08d1SVasundhara Volam cpu_to_le32(level); 3304baaa08d1SVasundhara Volam } 3305baaa08d1SVasundhara Volam } 3306baaa08d1SVasundhara Volam 3307baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 3308baaa08d1SVasundhara Volam err: 3309baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3310baaa08d1SVasundhara Volam extfat_cmd.dma); 3311baaa08d1SVasundhara Volam return status; 3312baaa08d1SVasundhara Volam } 3313baaa08d1SVasundhara Volam 3314baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 3315baaa08d1SVasundhara Volam { 3316baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3317baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3318baaa08d1SVasundhara Volam int status, j; 3319baaa08d1SVasundhara Volam int level = 0; 3320baaa08d1SVasundhara Volam 3321baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3322baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3323baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3324baaa08d1SVasundhara Volam &extfat_cmd.dma); 3325baaa08d1SVasundhara Volam 3326baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 3327baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 3328baaa08d1SVasundhara Volam __func__); 3329baaa08d1SVasundhara Volam goto err; 3330baaa08d1SVasundhara Volam } 3331baaa08d1SVasundhara Volam 3332baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3333baaa08d1SVasundhara Volam if (!status) { 3334baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 3335baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 3336baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 3337baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 3338baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 3339baaa08d1SVasundhara Volam } 3340baaa08d1SVasundhara Volam } 3341baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3342baaa08d1SVasundhara Volam extfat_cmd.dma); 3343baaa08d1SVasundhara Volam err: 3344baaa08d1SVasundhara Volam return level; 3345baaa08d1SVasundhara Volam } 3346baaa08d1SVasundhara Volam 3347941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3348941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3349941a77d5SSomnath Kotur { 3350941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3351941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3352941a77d5SSomnath Kotur int status; 3353941a77d5SSomnath Kotur 3354941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3355941a77d5SSomnath Kotur return -1; 3356941a77d5SSomnath Kotur 3357941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3358941a77d5SSomnath Kotur if (!wrb) { 3359941a77d5SSomnath Kotur status = -EBUSY; 3360941a77d5SSomnath Kotur goto err; 3361941a77d5SSomnath Kotur } 3362941a77d5SSomnath Kotur 3363941a77d5SSomnath Kotur req = cmd->va; 3364941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3365941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3366941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3367941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3368941a77d5SSomnath Kotur 3369941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3370941a77d5SSomnath Kotur err: 3371941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3372941a77d5SSomnath Kotur return status; 3373941a77d5SSomnath Kotur } 3374941a77d5SSomnath Kotur 3375941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3376941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3377941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3378941a77d5SSomnath Kotur { 3379941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3380941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3381941a77d5SSomnath Kotur int status; 3382941a77d5SSomnath Kotur 3383941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3384941a77d5SSomnath Kotur 3385941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3386941a77d5SSomnath Kotur if (!wrb) { 3387941a77d5SSomnath Kotur status = -EBUSY; 3388941a77d5SSomnath Kotur goto err; 3389941a77d5SSomnath Kotur } 3390941a77d5SSomnath Kotur 3391941a77d5SSomnath Kotur req = cmd->va; 3392941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3393941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3394941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3395941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3396941a77d5SSomnath Kotur 3397941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3398941a77d5SSomnath Kotur err: 3399941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3400941a77d5SSomnath Kotur return status; 34014762f6ceSAjit Khaparde } 34026a4ab669SParav Pandit 3403b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3404b4e32a71SPadmanabh Ratnakar { 3405b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3406b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3407b4e32a71SPadmanabh Ratnakar int status; 3408b4e32a71SPadmanabh Ratnakar 3409b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3410b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3411b4e32a71SPadmanabh Ratnakar return 0; 3412b4e32a71SPadmanabh Ratnakar } 3413b4e32a71SPadmanabh Ratnakar 3414b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3415b4e32a71SPadmanabh Ratnakar 3416b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3417b4e32a71SPadmanabh Ratnakar if (!wrb) { 3418b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3419b4e32a71SPadmanabh Ratnakar goto err; 3420b4e32a71SPadmanabh Ratnakar } 3421b4e32a71SPadmanabh Ratnakar 3422b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3423b4e32a71SPadmanabh Ratnakar 3424b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3425b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3426b4e32a71SPadmanabh Ratnakar NULL); 3427b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3428b4e32a71SPadmanabh Ratnakar 3429b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3430b4e32a71SPadmanabh Ratnakar if (!status) { 3431b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3432b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3433b4e32a71SPadmanabh Ratnakar } else { 3434b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3435b4e32a71SPadmanabh Ratnakar } 3436b4e32a71SPadmanabh Ratnakar err: 3437b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3438b4e32a71SPadmanabh Ratnakar return status; 3439b4e32a71SPadmanabh Ratnakar } 3440b4e32a71SPadmanabh Ratnakar 344110cccf60SVasundhara Volam /* Descriptor type */ 344210cccf60SVasundhara Volam enum { 344310cccf60SVasundhara Volam FUNC_DESC = 1, 344410cccf60SVasundhara Volam VFT_DESC = 2 344510cccf60SVasundhara Volam }; 344610cccf60SVasundhara Volam 344710cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 344810cccf60SVasundhara Volam int desc_type) 3449abb93951SPadmanabh Ratnakar { 3450150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 345110cccf60SVasundhara Volam struct be_nic_res_desc *nic; 3452abb93951SPadmanabh Ratnakar int i; 3453abb93951SPadmanabh Ratnakar 3454abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3455150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 345610cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 345710cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 345810cccf60SVasundhara Volam if (desc_type == FUNC_DESC || 345910cccf60SVasundhara Volam (desc_type == VFT_DESC && 346010cccf60SVasundhara Volam nic->flags & (1 << VFT_SHIFT))) 346110cccf60SVasundhara Volam return nic; 346210cccf60SVasundhara Volam } 3463150d58c7SVasundhara Volam 3464150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3465150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3466150d58c7SVasundhara Volam } 3467950e2958SWei Yang return NULL; 3468abb93951SPadmanabh Ratnakar } 3469abb93951SPadmanabh Ratnakar 347010cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count) 347110cccf60SVasundhara Volam { 347210cccf60SVasundhara Volam return be_get_nic_desc(buf, desc_count, VFT_DESC); 347310cccf60SVasundhara Volam } 347410cccf60SVasundhara Volam 347510cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count) 347610cccf60SVasundhara Volam { 347710cccf60SVasundhara Volam return be_get_nic_desc(buf, desc_count, FUNC_DESC); 347810cccf60SVasundhara Volam } 347910cccf60SVasundhara Volam 3480150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3481150d58c7SVasundhara Volam u32 desc_count) 3482150d58c7SVasundhara Volam { 3483150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3484150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3485150d58c7SVasundhara Volam int i; 3486150d58c7SVasundhara Volam 3487150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3488150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3489150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3490150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3491150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3492150d58c7SVasundhara Volam return pcie; 3493150d58c7SVasundhara Volam } 3494150d58c7SVasundhara Volam 3495150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3496150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3497150d58c7SVasundhara Volam } 3498abb93951SPadmanabh Ratnakar return NULL; 3499abb93951SPadmanabh Ratnakar } 3500abb93951SPadmanabh Ratnakar 3501f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 3502f93f160bSVasundhara Volam { 3503f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3504f93f160bSVasundhara Volam int i; 3505f93f160bSVasundhara Volam 3506f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 3507f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 3508f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 3509f93f160bSVasundhara Volam 3510f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3511f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3512f93f160bSVasundhara Volam } 3513f93f160bSVasundhara Volam return NULL; 3514f93f160bSVasundhara Volam } 3515f93f160bSVasundhara Volam 351692bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 351792bf14abSSathya Perla struct be_nic_res_desc *desc) 351892bf14abSSathya Perla { 351992bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 352092bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 352192bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 352292bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 352392bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 352492bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 352592bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 352692bf14abSSathya Perla /* Clear flags that driver is not interested in */ 352792bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 352892bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 352992bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 353092bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 353192bf14abSSathya Perla res->max_rss_qs -= 1; 353292bf14abSSathya Perla } 353392bf14abSSathya Perla 3534abb93951SPadmanabh Ratnakar /* Uses Mbox */ 353592bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3536abb93951SPadmanabh Ratnakar { 3537abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3538abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3539abb93951SPadmanabh Ratnakar int status; 3540abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3541abb93951SPadmanabh Ratnakar 3542d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3543d98ef50fSSuresh Reddy return -1; 3544d98ef50fSSuresh Reddy 3545abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3546abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3547a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3548abb93951SPadmanabh Ratnakar if (!cmd.va) { 3549abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3550d98ef50fSSuresh Reddy status = -ENOMEM; 3551d98ef50fSSuresh Reddy goto err; 3552abb93951SPadmanabh Ratnakar } 3553abb93951SPadmanabh Ratnakar 3554abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3555abb93951SPadmanabh Ratnakar if (!wrb) { 3556abb93951SPadmanabh Ratnakar status = -EBUSY; 3557abb93951SPadmanabh Ratnakar goto err; 3558abb93951SPadmanabh Ratnakar } 3559abb93951SPadmanabh Ratnakar 3560abb93951SPadmanabh Ratnakar req = cmd.va; 3561abb93951SPadmanabh Ratnakar 3562abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3563abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3564abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3565abb93951SPadmanabh Ratnakar 356628710c55SKalesh AP if (skyhawk_chip(adapter)) 356728710c55SKalesh AP req->hdr.version = 1; 356828710c55SKalesh AP 3569abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3570abb93951SPadmanabh Ratnakar if (!status) { 3571abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3572abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3573150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3574abb93951SPadmanabh Ratnakar 357510cccf60SVasundhara Volam desc = be_get_func_nic_desc(resp->func_param, desc_count); 3576abb93951SPadmanabh Ratnakar if (!desc) { 3577abb93951SPadmanabh Ratnakar status = -EINVAL; 3578abb93951SPadmanabh Ratnakar goto err; 3579abb93951SPadmanabh Ratnakar } 3580abb93951SPadmanabh Ratnakar 3581d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 358292bf14abSSathya Perla be_copy_nic_desc(res, desc); 3583abb93951SPadmanabh Ratnakar } 3584abb93951SPadmanabh Ratnakar err: 3585abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3586d98ef50fSSuresh Reddy if (cmd.va) 3587d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3588abb93951SPadmanabh Ratnakar return status; 3589abb93951SPadmanabh Ratnakar } 3590abb93951SPadmanabh Ratnakar 3591ba48c0c9SVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 359292bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 359392bf14abSSathya Perla struct be_resources *res, u8 domain) 3594a05f99dbSVasundhara Volam { 3595150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3596ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 359710cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 3598150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3599f93f160bSVasundhara Volam struct be_port_res_desc *port; 3600150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3601ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 3602a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3603150d58c7SVasundhara Volam u32 desc_count; 3604a05f99dbSVasundhara Volam int status; 3605a05f99dbSVasundhara Volam 3606a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3607a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3608150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3609150d58c7SVasundhara Volam if (!cmd.va) 3610a05f99dbSVasundhara Volam return -ENOMEM; 3611a05f99dbSVasundhara Volam 3612ba48c0c9SVasundhara Volam req = cmd.va; 3613ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3614ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3615ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 3616ba48c0c9SVasundhara Volam 3617ba48c0c9SVasundhara Volam req->hdr.domain = domain; 3618ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 3619ba48c0c9SVasundhara Volam req->hdr.version = 1; 3620ba48c0c9SVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3621ba48c0c9SVasundhara Volam 3622ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 3623150d58c7SVasundhara Volam if (status) 3624abb93951SPadmanabh Ratnakar goto err; 3625150d58c7SVasundhara Volam 3626150d58c7SVasundhara Volam resp = cmd.va; 3627150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3628150d58c7SVasundhara Volam 3629150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3630150d58c7SVasundhara Volam desc_count); 3631150d58c7SVasundhara Volam if (pcie) 363292bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3633150d58c7SVasundhara Volam 3634f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 3635f93f160bSVasundhara Volam if (port) 3636f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 3637f93f160bSVasundhara Volam 363810cccf60SVasundhara Volam nic = be_get_func_nic_desc(resp->func_param, desc_count); 363992bf14abSSathya Perla if (nic) 364092bf14abSSathya Perla be_copy_nic_desc(res, nic); 364192bf14abSSathya Perla 364210cccf60SVasundhara Volam vf_res = be_get_vft_desc(resp->func_param, desc_count); 364310cccf60SVasundhara Volam if (vf_res) 364410cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 3645abb93951SPadmanabh Ratnakar err: 3646a05f99dbSVasundhara Volam if (cmd.va) 3647150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3648abb93951SPadmanabh Ratnakar return status; 3649abb93951SPadmanabh Ratnakar } 3650abb93951SPadmanabh Ratnakar 3651bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 3652bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 3653bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 3654d5c18473SPadmanabh Ratnakar { 3655d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3656bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 3657bec84e6bSVasundhara Volam struct be_dma_mem cmd; 3658d5c18473SPadmanabh Ratnakar int status; 3659d5c18473SPadmanabh Ratnakar 3660bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3661bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 3662bec84e6bSVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3663bec84e6bSVasundhara Volam if (!cmd.va) 3664bec84e6bSVasundhara Volam return -ENOMEM; 3665d5c18473SPadmanabh Ratnakar 3666bec84e6bSVasundhara Volam req = cmd.va; 3667d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3668bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 3669bec84e6bSVasundhara Volam &wrb, &cmd); 3670a401801cSSathya Perla req->hdr.version = version; 3671d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3672bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 3673a401801cSSathya Perla memcpy(req->desc, desc, size); 3674d5c18473SPadmanabh Ratnakar 3675bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 3676bec84e6bSVasundhara Volam 3677bec84e6bSVasundhara Volam if (cmd.va) 3678bec84e6bSVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3679d5c18473SPadmanabh Ratnakar return status; 3680d5c18473SPadmanabh Ratnakar } 3681d5c18473SPadmanabh Ratnakar 3682a401801cSSathya Perla /* Mark all fields invalid */ 3683bec84e6bSVasundhara Volam static void be_reset_nic_desc(struct be_nic_res_desc *nic) 3684a401801cSSathya Perla { 3685a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 3686a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 3687a401801cSSathya Perla nic->mcc_count = 0xFFFF; 3688a401801cSSathya Perla nic->vlan_count = 0xFFFF; 3689a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 3690a401801cSSathya Perla nic->txq_count = 0xFFFF; 3691a401801cSSathya Perla nic->rq_count = 0xFFFF; 3692a401801cSSathya Perla nic->rssq_count = 0xFFFF; 3693a401801cSSathya Perla nic->lro_count = 0xFFFF; 3694a401801cSSathya Perla nic->cq_count = 0xFFFF; 3695a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 3696a401801cSSathya Perla nic->eq_count = 0xFFFF; 36970f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 3698a401801cSSathya Perla nic->link_param = 0xFF; 36990f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 3700a401801cSSathya Perla nic->acpi_params = 0xFF; 3701a401801cSSathya Perla nic->wol_param = 0x0F; 37020f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 37030f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 3704bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 3705a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 3706a401801cSSathya Perla } 3707a401801cSSathya Perla 3708bec84e6bSVasundhara Volam /* Mark all fields invalid */ 3709bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 3710bec84e6bSVasundhara Volam { 3711bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 3712bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 3713bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 3714bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 3715bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 3716bec84e6bSVasundhara Volam } 3717bec84e6bSVasundhara Volam 37180f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 37190f77ba73SRavikumar Nelavelli u8 domain) 3720a401801cSSathya Perla { 3721a401801cSSathya Perla struct be_nic_res_desc nic_desc; 37220f77ba73SRavikumar Nelavelli u32 bw_percent; 37230f77ba73SRavikumar Nelavelli u16 version = 0; 37240f77ba73SRavikumar Nelavelli 37250f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 37260f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 3727a401801cSSathya Perla 3728a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 37290f77ba73SRavikumar Nelavelli nic_desc.pf_num = adapter->pf_number; 37300f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 37310f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 3732a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3733a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3734a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 3735a401801cSSathya Perla (1 << NOSV_SHIFT); 37360f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 37370f77ba73SRavikumar Nelavelli } else { 37380f77ba73SRavikumar Nelavelli version = 1; 37390f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 37400f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 37410f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 37420f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 37430f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 37440f77ba73SRavikumar Nelavelli } 3745a401801cSSathya Perla 3746a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 37470f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 3748bec84e6bSVasundhara Volam 1, version, domain); 3749bec84e6bSVasundhara Volam } 3750bec84e6bSVasundhara Volam 3751bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 3752bec84e6bSVasundhara Volam struct be_resources res, u16 num_vfs) 3753bec84e6bSVasundhara Volam { 3754bec84e6bSVasundhara Volam struct { 3755bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 3756bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 3757bec84e6bSVasundhara Volam } __packed desc; 3758bec84e6bSVasundhara Volam u16 vf_q_count; 3759bec84e6bSVasundhara Volam 3760bec84e6bSVasundhara Volam if (BEx_chip(adapter) || lancer_chip(adapter)) 3761bec84e6bSVasundhara Volam return 0; 3762bec84e6bSVasundhara Volam 3763bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 3764bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 3765bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 3766bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3767bec84e6bSVasundhara Volam desc.pcie.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3768bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 3769bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 3770bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 3771bec84e6bSVasundhara Volam 3772bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 3773bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 3774bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 3775bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3776bec84e6bSVasundhara Volam desc.nic_vft.flags = (1 << VFT_SHIFT) | (1 << IMM_SHIFT) | 3777bec84e6bSVasundhara Volam (1 << NOSV_SHIFT); 3778bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 3779bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 3780bec84e6bSVasundhara Volam 3781bec84e6bSVasundhara Volam if (num_vfs && res.vf_if_cap_flags & BE_IF_FLAGS_RSS) { 3782bec84e6bSVasundhara Volam /* If number of VFs requested is 8 less than max supported, 3783bec84e6bSVasundhara Volam * assign 8 queue pairs to the PF and divide the remaining 3784bec84e6bSVasundhara Volam * resources evenly among the VFs 3785bec84e6bSVasundhara Volam */ 3786bec84e6bSVasundhara Volam if (num_vfs < (be_max_vfs(adapter) - 8)) 3787bec84e6bSVasundhara Volam vf_q_count = (res.max_rss_qs - 8) / num_vfs; 3788bec84e6bSVasundhara Volam else 3789bec84e6bSVasundhara Volam vf_q_count = res.max_rss_qs / num_vfs; 3790bec84e6bSVasundhara Volam 3791bec84e6bSVasundhara Volam desc.nic_vft.rq_count = cpu_to_le16(vf_q_count); 3792bec84e6bSVasundhara Volam desc.nic_vft.txq_count = cpu_to_le16(vf_q_count); 3793bec84e6bSVasundhara Volam desc.nic_vft.rssq_count = cpu_to_le16(vf_q_count - 1); 3794bec84e6bSVasundhara Volam desc.nic_vft.cq_count = cpu_to_le16(3 * vf_q_count); 3795bec84e6bSVasundhara Volam } else { 3796bec84e6bSVasundhara Volam desc.nic_vft.txq_count = cpu_to_le16(1); 3797bec84e6bSVasundhara Volam desc.nic_vft.rq_count = cpu_to_le16(1); 3798bec84e6bSVasundhara Volam desc.nic_vft.rssq_count = cpu_to_le16(0); 3799bec84e6bSVasundhara Volam /* One CQ for each TX, RX and MCCQ */ 3800bec84e6bSVasundhara Volam desc.nic_vft.cq_count = cpu_to_le16(3); 3801bec84e6bSVasundhara Volam } 3802bec84e6bSVasundhara Volam 3803bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 3804bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 3805a401801cSSathya Perla } 3806a401801cSSathya Perla 3807a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 3808a401801cSSathya Perla { 3809a401801cSSathya Perla struct be_mcc_wrb *wrb; 3810a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 3811a401801cSSathya Perla int status; 3812a401801cSSathya Perla 3813a401801cSSathya Perla if (iface == 0xFFFFFFFF) 3814a401801cSSathya Perla return -1; 3815a401801cSSathya Perla 3816a401801cSSathya Perla spin_lock_bh(&adapter->mcc_lock); 3817a401801cSSathya Perla 3818a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 3819a401801cSSathya Perla if (!wrb) { 3820a401801cSSathya Perla status = -EBUSY; 3821a401801cSSathya Perla goto err; 3822a401801cSSathya Perla } 3823a401801cSSathya Perla req = embedded_payload(wrb); 3824a401801cSSathya Perla 3825a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3826a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 3827a401801cSSathya Perla wrb, NULL); 3828a401801cSSathya Perla req->op = op; 3829a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 3830a401801cSSathya Perla 3831a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 3832a401801cSSathya Perla err: 3833a401801cSSathya Perla spin_unlock_bh(&adapter->mcc_lock); 3834a401801cSSathya Perla return status; 3835a401801cSSathya Perla } 3836a401801cSSathya Perla 3837a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 3838a401801cSSathya Perla { 3839a401801cSSathya Perla struct be_port_res_desc port_desc; 3840a401801cSSathya Perla 3841a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 3842a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 3843a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3844a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3845a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 3846a401801cSSathya Perla if (port) { 3847a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 3848a401801cSSathya Perla (1 << RCVID_SHIFT); 3849a401801cSSathya Perla port_desc.nv_port = swab16(port); 3850a401801cSSathya Perla } else { 3851a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 3852a401801cSSathya Perla port_desc.nv_port = 0; 3853a401801cSSathya Perla } 3854a401801cSSathya Perla 3855a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 3856bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 3857a401801cSSathya Perla } 3858a401801cSSathya Perla 38594c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 38604c876616SSathya Perla int vf_num) 38614c876616SSathya Perla { 38624c876616SSathya Perla struct be_mcc_wrb *wrb; 38634c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 38644c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 38654c876616SSathya Perla int status; 38664c876616SSathya Perla 38674c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 38684c876616SSathya Perla 38694c876616SSathya Perla wrb = wrb_from_mccq(adapter); 38704c876616SSathya Perla if (!wrb) { 38714c876616SSathya Perla status = -EBUSY; 38724c876616SSathya Perla goto err; 38734c876616SSathya Perla } 38744c876616SSathya Perla req = embedded_payload(wrb); 38754c876616SSathya Perla 38764c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 38774c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 38784c876616SSathya Perla wrb, NULL); 38794c876616SSathya Perla req->hdr.domain = vf_num + 1; 38804c876616SSathya Perla 38814c876616SSathya Perla status = be_mcc_notify_wait(adapter); 38824c876616SSathya Perla if (!status) { 38834c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 38844c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 38854c876616SSathya Perla } 38864c876616SSathya Perla 38874c876616SSathya Perla err: 38884c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 38894c876616SSathya Perla return status; 38904c876616SSathya Perla } 38914c876616SSathya Perla 38925c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 38935c510811SSomnath Kotur { 38945c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 38955c510811SSomnath Kotur u32 reg_val; 38965c510811SSomnath Kotur int status = 0, i; 38975c510811SSomnath Kotur 38985c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 38995c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 39005c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 39015c510811SSomnath Kotur break; 39025c510811SSomnath Kotur 39035c510811SSomnath Kotur ssleep(1); 39045c510811SSomnath Kotur } 39055c510811SSomnath Kotur 39065c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 39075c510811SSomnath Kotur status = -1; 39085c510811SSomnath Kotur 39095c510811SSomnath Kotur return status; 39105c510811SSomnath Kotur } 39115c510811SSomnath Kotur 39125c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 39135c510811SSomnath Kotur { 39145c510811SSomnath Kotur int status = 0; 39155c510811SSomnath Kotur 39165c510811SSomnath Kotur status = lancer_wait_idle(adapter); 39175c510811SSomnath Kotur if (status) 39185c510811SSomnath Kotur return status; 39195c510811SSomnath Kotur 39205c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 39215c510811SSomnath Kotur 39225c510811SSomnath Kotur return status; 39235c510811SSomnath Kotur } 39245c510811SSomnath Kotur 39255c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 39265c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 39275c510811SSomnath Kotur { 39285c510811SSomnath Kotur u32 sliport_status = 0; 39295c510811SSomnath Kotur 39305c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 39315c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 39325c510811SSomnath Kotur } 39335c510811SSomnath Kotur 39345c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 39355c510811SSomnath Kotur { 3936f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 39375c510811SSomnath Kotur int status; 39385c510811SSomnath Kotur 3939f0613380SKalesh AP if (dump_present(adapter)) { 3940f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 3941f0613380SKalesh AP return -EEXIST; 3942f0613380SKalesh AP } 3943f0613380SKalesh AP 39445c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 39455c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 39465c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 39475c510811SSomnath Kotur if (status < 0) { 3948f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 39495c510811SSomnath Kotur return status; 39505c510811SSomnath Kotur } 39515c510811SSomnath Kotur 39525c510811SSomnath Kotur status = lancer_wait_idle(adapter); 39535c510811SSomnath Kotur if (status) 39545c510811SSomnath Kotur return status; 39555c510811SSomnath Kotur 39565c510811SSomnath Kotur if (!dump_present(adapter)) { 3957f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 3958f0613380SKalesh AP return -EIO; 39595c510811SSomnath Kotur } 39605c510811SSomnath Kotur 39615c510811SSomnath Kotur return 0; 39625c510811SSomnath Kotur } 39635c510811SSomnath Kotur 3964f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 3965f0613380SKalesh AP { 3966f0613380SKalesh AP int status; 3967f0613380SKalesh AP 3968f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 3969f0613380SKalesh AP return be_cmd_status(status); 3970f0613380SKalesh AP } 3971f0613380SKalesh AP 3972dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3973dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3974dcf7ebbaSPadmanabh Ratnakar { 3975dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3976dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3977dcf7ebbaSPadmanabh Ratnakar int status; 3978dcf7ebbaSPadmanabh Ratnakar 39790599863dSVasundhara Volam if (BEx_chip(adapter)) 3980dcf7ebbaSPadmanabh Ratnakar return 0; 3981dcf7ebbaSPadmanabh Ratnakar 3982dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3983dcf7ebbaSPadmanabh Ratnakar 3984dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3985dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3986dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3987dcf7ebbaSPadmanabh Ratnakar goto err; 3988dcf7ebbaSPadmanabh Ratnakar } 3989dcf7ebbaSPadmanabh Ratnakar 3990dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3991dcf7ebbaSPadmanabh Ratnakar 3992dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3993dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3994dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3995dcf7ebbaSPadmanabh Ratnakar 3996dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3997dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3998dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3999dcf7ebbaSPadmanabh Ratnakar err: 4000dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 4001dcf7ebbaSPadmanabh Ratnakar return status; 4002dcf7ebbaSPadmanabh Ratnakar } 4003dcf7ebbaSPadmanabh Ratnakar 400468c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 400568c45a2dSSomnath Kotur { 400668c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 400768c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 400868c45a2dSSomnath Kotur int status; 400968c45a2dSSomnath Kotur 401068c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 401168c45a2dSSomnath Kotur return -1; 401268c45a2dSSomnath Kotur 401368c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 401468c45a2dSSomnath Kotur 401568c45a2dSSomnath Kotur req = embedded_payload(wrb); 401668c45a2dSSomnath Kotur 401768c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 401868c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 401968c45a2dSSomnath Kotur wrb, NULL); 402068c45a2dSSomnath Kotur 402168c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 402268c45a2dSSomnath Kotur 402368c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 402468c45a2dSSomnath Kotur 402568c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 402668c45a2dSSomnath Kotur return status; 402768c45a2dSSomnath Kotur } 402868c45a2dSSomnath Kotur 4029542963b7SVasundhara Volam /* Uses MBOX */ 4030542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4031542963b7SVasundhara Volam { 4032542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4033542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4034542963b7SVasundhara Volam int status; 4035542963b7SVasundhara Volam 4036542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4037542963b7SVasundhara Volam return -1; 4038542963b7SVasundhara Volam 4039542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4040542963b7SVasundhara Volam if (!wrb) { 4041542963b7SVasundhara Volam status = -EBUSY; 4042542963b7SVasundhara Volam goto err; 4043542963b7SVasundhara Volam } 4044542963b7SVasundhara Volam 4045542963b7SVasundhara Volam req = embedded_payload(wrb); 4046542963b7SVasundhara Volam 4047542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4048542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4049542963b7SVasundhara Volam wrb, NULL); 4050542963b7SVasundhara Volam 4051542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4052542963b7SVasundhara Volam if (!status) { 4053542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4054542963b7SVasundhara Volam embedded_payload(wrb); 4055542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4056542963b7SVasundhara Volam } 4057542963b7SVasundhara Volam 4058542963b7SVasundhara Volam err: 4059542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4060542963b7SVasundhara Volam return status; 4061542963b7SVasundhara Volam } 4062542963b7SVasundhara Volam 4063bdce2ad7SSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4064bdce2ad7SSuresh Reddy int link_state, u8 domain) 4065bdce2ad7SSuresh Reddy { 4066bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 4067bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 4068bdce2ad7SSuresh Reddy int status; 4069bdce2ad7SSuresh Reddy 4070bdce2ad7SSuresh Reddy if (BEx_chip(adapter) || lancer_chip(adapter)) 4071bdce2ad7SSuresh Reddy return 0; 4072bdce2ad7SSuresh Reddy 4073bdce2ad7SSuresh Reddy spin_lock_bh(&adapter->mcc_lock); 4074bdce2ad7SSuresh Reddy 4075bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4076bdce2ad7SSuresh Reddy if (!wrb) { 4077bdce2ad7SSuresh Reddy status = -EBUSY; 4078bdce2ad7SSuresh Reddy goto err; 4079bdce2ad7SSuresh Reddy } 4080bdce2ad7SSuresh Reddy 4081bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4082bdce2ad7SSuresh Reddy 4083bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4084bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4085bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4086bdce2ad7SSuresh Reddy 4087bdce2ad7SSuresh Reddy req->hdr.version = 1; 4088bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4089bdce2ad7SSuresh Reddy 4090bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE) 4091bdce2ad7SSuresh Reddy req->link_config |= 1; 4092bdce2ad7SSuresh Reddy 4093bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 4094bdce2ad7SSuresh Reddy req->link_config |= 1 << PLINK_TRACK_SHIFT; 4095bdce2ad7SSuresh Reddy 4096bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4097bdce2ad7SSuresh Reddy err: 4098bdce2ad7SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 4099bdce2ad7SSuresh Reddy return status; 4100bdce2ad7SSuresh Reddy } 4101bdce2ad7SSuresh Reddy 41026a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 41036a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 41046a4ab669SParav Pandit { 41056a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 41066a4ab669SParav Pandit struct be_mcc_wrb *wrb; 41076a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 41086a4ab669SParav Pandit struct be_cmd_req_hdr *req; 41096a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 41106a4ab669SParav Pandit int status; 41116a4ab669SParav Pandit 41126a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 41136a4ab669SParav Pandit 41146a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 41156a4ab669SParav Pandit if (!wrb) { 41166a4ab669SParav Pandit status = -EBUSY; 41176a4ab669SParav Pandit goto err; 41186a4ab669SParav Pandit } 41196a4ab669SParav Pandit req = embedded_payload(wrb); 41206a4ab669SParav Pandit resp = embedded_payload(wrb); 41216a4ab669SParav Pandit 41226a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 41236a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 41246a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 41256a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 41266a4ab669SParav Pandit 41276a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 41286a4ab669SParav Pandit if (cmd_status) 41296a4ab669SParav Pandit *cmd_status = (status & 0xffff); 41306a4ab669SParav Pandit if (ext_status) 41316a4ab669SParav Pandit *ext_status = 0; 41326a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 41336a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 41346a4ab669SParav Pandit err: 41356a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 41366a4ab669SParav Pandit return status; 41376a4ab669SParav Pandit } 41386a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 4139