19aebddd1SJeff Kirsher /* 2d19261b8SVasundhara Volam * Copyright (C) 2005 - 2015 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 2251d1f98aSAjit Khaparde char *be_misconfig_evt_port_state[] = { 2351d1f98aSAjit Khaparde "Physical Link is functional", 2451d1f98aSAjit Khaparde "Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replace.", 2551d1f98aSAjit Khaparde "Optics of two types installed – Remove one optic or install matching pair of optics.", 2651d1f98aSAjit Khaparde "Incompatible optics – Replace with compatible optics for card to function.", 2751d1f98aSAjit Khaparde "Unqualified optics – Replace with Avago optics for Warranty and Technical Support.", 2851d1f98aSAjit Khaparde "Uncertified optics – Replace with Avago-certified optics to enable link operation." 2921252377SVasundhara Volam }; 3021252377SVasundhara Volam 3151d1f98aSAjit Khaparde static char *be_port_misconfig_evt_severity[] = { 3251d1f98aSAjit Khaparde "KERN_WARN", 3351d1f98aSAjit Khaparde "KERN_INFO", 3451d1f98aSAjit Khaparde "KERN_ERR", 3551d1f98aSAjit Khaparde "KERN_WARN" 3651d1f98aSAjit Khaparde }; 3751d1f98aSAjit Khaparde 3851d1f98aSAjit Khaparde static char *phy_state_oper_desc[] = { 3951d1f98aSAjit Khaparde "Link is non-operational", 4051d1f98aSAjit Khaparde "Link is operational", 4121252377SVasundhara Volam "" 4221252377SVasundhara Volam }; 4321252377SVasundhara Volam 44f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 45f25b119cSPadmanabh Ratnakar { 46f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 47f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 48f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 49f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 50f25b119cSPadmanabh Ratnakar }, 51f25b119cSPadmanabh Ratnakar { 52f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 53f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 54f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 55f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 56f25b119cSPadmanabh Ratnakar }, 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 59f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 60f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 61f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 62f25b119cSPadmanabh Ratnakar }, 63f25b119cSPadmanabh Ratnakar { 64f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 65f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 66f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 67f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 68f25b119cSPadmanabh Ratnakar }, 69f25b119cSPadmanabh Ratnakar { 70f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 71f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 72f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 73f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 742e365b1bSSomnath Kotur }, 752e365b1bSSomnath Kotur { 762e365b1bSSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, 772e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 782e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 792e365b1bSSomnath Kotur }, 802e365b1bSSomnath Kotur { 812e365b1bSSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, 822e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 832e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 842e365b1bSSomnath Kotur }, 852e365b1bSSomnath Kotur { 862e365b1bSSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 872e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 882e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 892e365b1bSSomnath Kotur }, 90f25b119cSPadmanabh Ratnakar }; 91f25b119cSPadmanabh Ratnakar 92a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 93f25b119cSPadmanabh Ratnakar { 94f25b119cSPadmanabh Ratnakar int i; 95f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 96f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 97f25b119cSPadmanabh Ratnakar 98f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 99f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 100f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 101f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 102f25b119cSPadmanabh Ratnakar return false; 103f25b119cSPadmanabh Ratnakar 104f25b119cSPadmanabh Ratnakar return true; 105f25b119cSPadmanabh Ratnakar } 106f25b119cSPadmanabh Ratnakar 1073de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 1083de09455SSomnath Kotur { 1093de09455SSomnath Kotur return wrb->payload.embedded_payload; 1103de09455SSomnath Kotur } 1119aebddd1SJeff Kirsher 112efaa408eSSuresh Reddy static int be_mcc_notify(struct be_adapter *adapter) 1139aebddd1SJeff Kirsher { 1149aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 1159aebddd1SJeff Kirsher u32 val = 0; 1169aebddd1SJeff Kirsher 117954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 118efaa408eSSuresh Reddy return -EIO; 1199aebddd1SJeff Kirsher 1209aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 1219aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 1229aebddd1SJeff Kirsher 1239aebddd1SJeff Kirsher wmb(); 1249aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 125efaa408eSSuresh Reddy 126efaa408eSSuresh Reddy return 0; 1279aebddd1SJeff Kirsher } 1289aebddd1SJeff Kirsher 1299aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 1309aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 1319aebddd1SJeff Kirsher * little endian) */ 1329aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 1339aebddd1SJeff Kirsher { 1349e9ff4b7SSathya Perla u32 flags; 1359e9ff4b7SSathya Perla 1369aebddd1SJeff Kirsher if (compl->flags != 0) { 1379e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1389e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1399e9ff4b7SSathya Perla compl->flags = flags; 1409aebddd1SJeff Kirsher return true; 1419aebddd1SJeff Kirsher } 1429aebddd1SJeff Kirsher } 1439e9ff4b7SSathya Perla return false; 1449e9ff4b7SSathya Perla } 1459aebddd1SJeff Kirsher 1469aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1479aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1489aebddd1SJeff Kirsher { 1499aebddd1SJeff Kirsher compl->flags = 0; 1509aebddd1SJeff Kirsher } 1519aebddd1SJeff Kirsher 152652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 153652bf646SPadmanabh Ratnakar { 154652bf646SPadmanabh Ratnakar unsigned long addr; 155652bf646SPadmanabh Ratnakar 156652bf646SPadmanabh Ratnakar addr = tag1; 157652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 158652bf646SPadmanabh Ratnakar return (void *)addr; 159652bf646SPadmanabh Ratnakar } 160652bf646SPadmanabh Ratnakar 1614c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1624c60005fSKalesh AP { 1634c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1644c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1654c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 16677be8c1cSKalesh AP addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS || 1674c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1684c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1694c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1704c60005fSKalesh AP return true; 1714c60005fSKalesh AP else 1724c60005fSKalesh AP return false; 1734c60005fSKalesh AP } 1744c60005fSKalesh AP 175559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 176559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 177559b633fSSathya Perla */ 178559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 179559b633fSSathya Perla struct be_mcc_compl *compl, 180559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 181559b633fSSathya Perla { 182559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 183559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 184559b633fSSathya Perla 185559b633fSSathya Perla if (resp_hdr) { 186559b633fSSathya Perla opcode = resp_hdr->opcode; 187559b633fSSathya Perla subsystem = resp_hdr->subsystem; 188559b633fSSathya Perla } 189559b633fSSathya Perla 190559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 191559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 192559b633fSSathya Perla complete(&adapter->et_cmd_compl); 193559b633fSSathya Perla return; 194559b633fSSathya Perla } 195559b633fSSathya Perla 1969c855975SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE && 1979c855975SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 1989c855975SSuresh Reddy complete(&adapter->et_cmd_compl); 1999c855975SSuresh Reddy return; 2009c855975SSuresh Reddy } 2019c855975SSuresh Reddy 202559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 203559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 204559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 205559b633fSSathya Perla adapter->flash_status = compl->status; 206559b633fSSathya Perla complete(&adapter->et_cmd_compl); 207559b633fSSathya Perla return; 208559b633fSSathya Perla } 209559b633fSSathya Perla 210559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 211559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 212559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 213559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 214559b633fSSathya Perla be_parse_stats(adapter); 215559b633fSSathya Perla adapter->stats_cmd_sent = false; 216559b633fSSathya Perla return; 217559b633fSSathya Perla } 218559b633fSSathya Perla 219559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 220559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 221559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 222559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 223559b633fSSathya Perla (void *)resp_hdr; 22429e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 225559b633fSSathya Perla resp->on_die_temperature; 226559b633fSSathya Perla } else { 227559b633fSSathya Perla adapter->be_get_temp_freq = 0; 22829e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 22929e9122bSVenkata Duvvuru BE_INVALID_DIE_TEMP; 230559b633fSSathya Perla } 231559b633fSSathya Perla return; 232559b633fSSathya Perla } 233559b633fSSathya Perla } 234559b633fSSathya Perla 2359aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 2369aebddd1SJeff Kirsher struct be_mcc_compl *compl) 2379aebddd1SJeff Kirsher { 2384c60005fSKalesh AP enum mcc_base_status base_status; 2394c60005fSKalesh AP enum mcc_addl_status addl_status; 240652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 241652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 2429aebddd1SJeff Kirsher 2439aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 2449aebddd1SJeff Kirsher * from mcc_wrb */ 2459aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 2469aebddd1SJeff Kirsher 2474c60005fSKalesh AP base_status = base_status(compl->status); 2484c60005fSKalesh AP addl_status = addl_status(compl->status); 24996c9b2e4SVasundhara Volam 250652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 251652bf646SPadmanabh Ratnakar if (resp_hdr) { 252652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 253652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 254652bf646SPadmanabh Ratnakar } 255652bf646SPadmanabh Ratnakar 256559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2575eeff635SSuresh Reddy 258559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 259559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 260fa5c867dSSuresh Reddy if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST || 261fa5c867dSSuresh Reddy addl_status == MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES) { 26297f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 263522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 26497f1d8cdSVasundhara Volam opcode, subsystem); 2659aebddd1SJeff Kirsher } else { 26697f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 26797f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2684c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2699aebddd1SJeff Kirsher } 2709aebddd1SJeff Kirsher } 2714c60005fSKalesh AP return compl->status; 2729aebddd1SJeff Kirsher } 2739aebddd1SJeff Kirsher 2749aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2759aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2763acf19d9SSathya Perla struct be_mcc_compl *compl) 2779aebddd1SJeff Kirsher { 2783acf19d9SSathya Perla struct be_async_event_link_state *evt = 2793acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2803acf19d9SSathya Perla 281b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 28242f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 283b236916aSAjit Khaparde 284bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 285bdce2ad7SSuresh Reddy * notification for physical and logical link. 286bdce2ad7SSuresh Reddy * On other chips just process the logical link 287bdce2ad7SSuresh Reddy * status notification 288bdce2ad7SSuresh Reddy */ 289bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2902e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2912e177a5cSPadmanabh Ratnakar return; 2922e177a5cSPadmanabh Ratnakar 293b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 294b236916aSAjit Khaparde * it may not be received in some cases. 295b236916aSAjit Khaparde */ 296b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 297bdce2ad7SSuresh Reddy be_link_status_update(adapter, 298bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 2999aebddd1SJeff Kirsher } 3009aebddd1SJeff Kirsher 30121252377SVasundhara Volam static void be_async_port_misconfig_event_process(struct be_adapter *adapter, 30221252377SVasundhara Volam struct be_mcc_compl *compl) 30321252377SVasundhara Volam { 30421252377SVasundhara Volam struct be_async_event_misconfig_port *evt = 30521252377SVasundhara Volam (struct be_async_event_misconfig_port *)compl; 30651d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word1 = le32_to_cpu(evt->event_data_word1); 30751d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word2 = le32_to_cpu(evt->event_data_word2); 30851d1f98aSAjit Khaparde u8 phy_oper_state = PHY_STATE_OPER_MSG_NONE; 30921252377SVasundhara Volam struct device *dev = &adapter->pdev->dev; 31051d1f98aSAjit Khaparde u8 msg_severity = DEFAULT_MSG_SEVERITY; 31151d1f98aSAjit Khaparde u8 phy_state_info; 31251d1f98aSAjit Khaparde u8 new_phy_state; 31321252377SVasundhara Volam 31451d1f98aSAjit Khaparde new_phy_state = 31551d1f98aSAjit Khaparde (sfp_misconfig_evt_word1 >> (adapter->hba_port_num * 8)) & 0xff; 31621252377SVasundhara Volam 31751d1f98aSAjit Khaparde if (new_phy_state == adapter->phy_state) 31851d1f98aSAjit Khaparde return; 31951d1f98aSAjit Khaparde 32051d1f98aSAjit Khaparde adapter->phy_state = new_phy_state; 32151d1f98aSAjit Khaparde 32251d1f98aSAjit Khaparde /* for older fw that doesn't populate link effect data */ 32351d1f98aSAjit Khaparde if (!sfp_misconfig_evt_word2) 32451d1f98aSAjit Khaparde goto log_message; 32551d1f98aSAjit Khaparde 32651d1f98aSAjit Khaparde phy_state_info = 32751d1f98aSAjit Khaparde (sfp_misconfig_evt_word2 >> (adapter->hba_port_num * 8)) & 0xff; 32851d1f98aSAjit Khaparde 32951d1f98aSAjit Khaparde if (phy_state_info & PHY_STATE_INFO_VALID) { 33051d1f98aSAjit Khaparde msg_severity = (phy_state_info & PHY_STATE_MSG_SEVERITY) >> 1; 33151d1f98aSAjit Khaparde 33251d1f98aSAjit Khaparde if (be_phy_unqualified(new_phy_state)) 33351d1f98aSAjit Khaparde phy_oper_state = (phy_state_info & PHY_STATE_OPER); 33451d1f98aSAjit Khaparde } 33551d1f98aSAjit Khaparde 33651d1f98aSAjit Khaparde log_message: 33721252377SVasundhara Volam /* Log an error message that would allow a user to determine 33821252377SVasundhara Volam * whether the SFPs have an issue 33921252377SVasundhara Volam */ 34051d1f98aSAjit Khaparde if (be_phy_state_unknown(new_phy_state)) 34151d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 34251d1f98aSAjit Khaparde "Port %c: Unrecognized Optics state: 0x%x. %s", 34351d1f98aSAjit Khaparde adapter->port_name, 34451d1f98aSAjit Khaparde new_phy_state, 34551d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 34651d1f98aSAjit Khaparde else 34751d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 34851d1f98aSAjit Khaparde "Port %c: %s %s", 34951d1f98aSAjit Khaparde adapter->port_name, 35051d1f98aSAjit Khaparde be_misconfig_evt_port_state[new_phy_state], 35151d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35221252377SVasundhara Volam 35351d1f98aSAjit Khaparde /* Log Vendor name and part no. if a misconfigured SFP is detected */ 35451d1f98aSAjit Khaparde if (be_phy_misconfigured(new_phy_state)) 35551d1f98aSAjit Khaparde adapter->flags |= BE_FLAGS_PHY_MISCONFIGURED; 35621252377SVasundhara Volam } 35721252377SVasundhara Volam 3589aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 3599aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 3603acf19d9SSathya Perla struct be_mcc_compl *compl) 3619aebddd1SJeff Kirsher { 3623acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 3633acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 3643acf19d9SSathya Perla 3659aebddd1SJeff Kirsher if (evt->valid) { 3669aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 367fdf81bfbSSathya Perla adapter->recommended_prio_bits = 3689aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 3699aebddd1SJeff Kirsher } 3709aebddd1SJeff Kirsher } 3719aebddd1SJeff Kirsher 372323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 3739aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 3743acf19d9SSathya Perla struct be_mcc_compl *compl) 3759aebddd1SJeff Kirsher { 3763acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 3773acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 3783acf19d9SSathya Perla 379323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 380323ff71eSSathya Perla evt->physical_port == adapter->port_num) 381323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 3829aebddd1SJeff Kirsher } 3839aebddd1SJeff Kirsher 3849aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 3859aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 3863acf19d9SSathya Perla struct be_mcc_compl *compl) 3879aebddd1SJeff Kirsher { 3883acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 3893acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 3903acf19d9SSathya Perla 391bdac85b5SRavikumar Nelavelli if (evt->enabled) { 392939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 393bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 394bdac85b5SRavikumar Nelavelli } else { 3959aebddd1SJeff Kirsher adapter->pvid = 0; 3969aebddd1SJeff Kirsher } 397bdac85b5SRavikumar Nelavelli } 3989aebddd1SJeff Kirsher 399760c295eSVenkata Duvvuru #define MGMT_ENABLE_MASK 0x4 400760c295eSVenkata Duvvuru static void be_async_grp5_fw_control_process(struct be_adapter *adapter, 401760c295eSVenkata Duvvuru struct be_mcc_compl *compl) 402760c295eSVenkata Duvvuru { 403760c295eSVenkata Duvvuru struct be_async_fw_control *evt = (struct be_async_fw_control *)compl; 404760c295eSVenkata Duvvuru u32 evt_dw1 = le32_to_cpu(evt->event_data_word1); 405760c295eSVenkata Duvvuru 406760c295eSVenkata Duvvuru if (evt_dw1 & MGMT_ENABLE_MASK) { 407760c295eSVenkata Duvvuru adapter->flags |= BE_FLAGS_OS2BMC; 408760c295eSVenkata Duvvuru adapter->bmc_filt_mask = le32_to_cpu(evt->event_data_word2); 409760c295eSVenkata Duvvuru } else { 410760c295eSVenkata Duvvuru adapter->flags &= ~BE_FLAGS_OS2BMC; 411760c295eSVenkata Duvvuru } 412760c295eSVenkata Duvvuru } 413760c295eSVenkata Duvvuru 4149aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 4153acf19d9SSathya Perla struct be_mcc_compl *compl) 4169aebddd1SJeff Kirsher { 4173acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4183acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 4199aebddd1SJeff Kirsher 4209aebddd1SJeff Kirsher switch (event_type) { 4219aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 4223acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 4239aebddd1SJeff Kirsher break; 4249aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 4253acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 4269aebddd1SJeff Kirsher break; 4279aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 4283acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 4299aebddd1SJeff Kirsher break; 430760c295eSVenkata Duvvuru /* Async event to disable/enable os2bmc and/or mac-learning */ 431760c295eSVenkata Duvvuru case ASYNC_EVENT_FW_CONTROL: 432760c295eSVenkata Duvvuru be_async_grp5_fw_control_process(adapter, compl); 433760c295eSVenkata Duvvuru break; 4349aebddd1SJeff Kirsher default: 4359aebddd1SJeff Kirsher break; 4369aebddd1SJeff Kirsher } 4379aebddd1SJeff Kirsher } 4389aebddd1SJeff Kirsher 439bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 4403acf19d9SSathya Perla struct be_mcc_compl *cmp) 441bc0c3405SAjit Khaparde { 442bc0c3405SAjit Khaparde u8 event_type = 0; 443bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 444bc0c3405SAjit Khaparde 4453acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4463acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 447bc0c3405SAjit Khaparde 448bc0c3405SAjit Khaparde switch (event_type) { 449bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 450bc0c3405SAjit Khaparde if (evt->valid) 451bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 452bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 453bc0c3405SAjit Khaparde break; 454bc0c3405SAjit Khaparde default: 45505ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 45605ccaa2bSVasundhara Volam event_type); 457bc0c3405SAjit Khaparde break; 458bc0c3405SAjit Khaparde } 459bc0c3405SAjit Khaparde } 460bc0c3405SAjit Khaparde 46121252377SVasundhara Volam static void be_async_sliport_evt_process(struct be_adapter *adapter, 46221252377SVasundhara Volam struct be_mcc_compl *cmp) 46321252377SVasundhara Volam { 46421252377SVasundhara Volam u8 event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 46521252377SVasundhara Volam ASYNC_EVENT_TYPE_MASK; 46621252377SVasundhara Volam 46721252377SVasundhara Volam if (event_type == ASYNC_EVENT_PORT_MISCONFIG) 46821252377SVasundhara Volam be_async_port_misconfig_event_process(adapter, cmp); 46921252377SVasundhara Volam } 47021252377SVasundhara Volam 4713acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 4729aebddd1SJeff Kirsher { 4733acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4749aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 4759aebddd1SJeff Kirsher } 4769aebddd1SJeff Kirsher 4773acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 4789aebddd1SJeff Kirsher { 4793acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4803acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 4819aebddd1SJeff Kirsher } 4829aebddd1SJeff Kirsher 4833acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 484bc0c3405SAjit Khaparde { 4853acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4863acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 4873acf19d9SSathya Perla } 4883acf19d9SSathya Perla 48921252377SVasundhara Volam static inline bool is_sliport_evt(u32 flags) 49021252377SVasundhara Volam { 49121252377SVasundhara Volam return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 49221252377SVasundhara Volam ASYNC_EVENT_CODE_SLIPORT; 49321252377SVasundhara Volam } 49421252377SVasundhara Volam 4953acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 4963acf19d9SSathya Perla struct be_mcc_compl *compl) 4973acf19d9SSathya Perla { 4983acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 4993acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 5003acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 5013acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 5023acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 5033acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 50421252377SVasundhara Volam else if (is_sliport_evt(compl->flags)) 50521252377SVasundhara Volam be_async_sliport_evt_process(adapter, compl); 506bc0c3405SAjit Khaparde } 507bc0c3405SAjit Khaparde 5089aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 5099aebddd1SJeff Kirsher { 5109aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 5119aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 5129aebddd1SJeff Kirsher 5139aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5149aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 5159aebddd1SJeff Kirsher return compl; 5169aebddd1SJeff Kirsher } 5179aebddd1SJeff Kirsher return NULL; 5189aebddd1SJeff Kirsher } 5199aebddd1SJeff Kirsher 5209aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 5219aebddd1SJeff Kirsher { 5229aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 5239aebddd1SJeff Kirsher 5249aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 5259aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 5269aebddd1SJeff Kirsher 5279aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 5289aebddd1SJeff Kirsher } 5299aebddd1SJeff Kirsher 5309aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 5319aebddd1SJeff Kirsher { 532a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 533a323d9bfSSathya Perla 5349aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 535a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 536a323d9bfSSathya Perla 537a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 5389aebddd1SJeff Kirsher } 5399aebddd1SJeff Kirsher 54010ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 5419aebddd1SJeff Kirsher { 5429aebddd1SJeff Kirsher struct be_mcc_compl *compl; 54310ef9ab4SSathya Perla int num = 0, status = 0; 5449aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5459aebddd1SJeff Kirsher 546072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 5473acf19d9SSathya Perla 5489aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 5499aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 5503acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 5519aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 55210ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 5539aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 5549aebddd1SJeff Kirsher } 5559aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5569aebddd1SJeff Kirsher num++; 5579aebddd1SJeff Kirsher } 5589aebddd1SJeff Kirsher 55910ef9ab4SSathya Perla if (num) 56010ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 56110ef9ab4SSathya Perla 562072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 56310ef9ab4SSathya Perla return status; 5649aebddd1SJeff Kirsher } 5659aebddd1SJeff Kirsher 5669aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 5679aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 5689aebddd1SJeff Kirsher { 5699aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 57010ef9ab4SSathya Perla int i, status = 0; 5719aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5729aebddd1SJeff Kirsher 5736589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 574954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 5759aebddd1SJeff Kirsher return -EIO; 5769aebddd1SJeff Kirsher 577072a9c48SAmerigo Wang local_bh_disable(); 57810ef9ab4SSathya Perla status = be_process_mcc(adapter); 579072a9c48SAmerigo Wang local_bh_enable(); 5809aebddd1SJeff Kirsher 5819aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 5829aebddd1SJeff Kirsher break; 5839aebddd1SJeff Kirsher udelay(100); 5849aebddd1SJeff Kirsher } 5859aebddd1SJeff Kirsher if (i == mcc_timeout) { 5866589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 587954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 588652bf646SPadmanabh Ratnakar return -EIO; 5899aebddd1SJeff Kirsher } 5909aebddd1SJeff Kirsher return status; 5919aebddd1SJeff Kirsher } 5929aebddd1SJeff Kirsher 5939aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 5949aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 5959aebddd1SJeff Kirsher { 596652bf646SPadmanabh Ratnakar int status; 597652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 598652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 599b0fd2eb2Sajit.khaparde@broadcom.com u32 index = mcc_obj->q.head; 600652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 601652bf646SPadmanabh Ratnakar 602652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 603652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 604652bf646SPadmanabh Ratnakar 605652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 606652bf646SPadmanabh Ratnakar 607efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 608efaa408eSSuresh Reddy if (status) 609efaa408eSSuresh Reddy goto out; 610652bf646SPadmanabh Ratnakar 611652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 612652bf646SPadmanabh Ratnakar if (status == -EIO) 613652bf646SPadmanabh Ratnakar goto out; 614652bf646SPadmanabh Ratnakar 6154c60005fSKalesh AP status = (resp->base_status | 6164c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 6174c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 618652bf646SPadmanabh Ratnakar out: 619652bf646SPadmanabh Ratnakar return status; 6209aebddd1SJeff Kirsher } 6219aebddd1SJeff Kirsher 6229aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 6239aebddd1SJeff Kirsher { 6249aebddd1SJeff Kirsher int msecs = 0; 6259aebddd1SJeff Kirsher u32 ready; 6269aebddd1SJeff Kirsher 6276589ade0SSathya Perla do { 628954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 6299aebddd1SJeff Kirsher return -EIO; 6309aebddd1SJeff Kirsher 6319aebddd1SJeff Kirsher ready = ioread32(db); 632434b3648SSathya Perla if (ready == 0xffffffff) 6339aebddd1SJeff Kirsher return -1; 6349aebddd1SJeff Kirsher 6359aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 6369aebddd1SJeff Kirsher if (ready) 6379aebddd1SJeff Kirsher break; 6389aebddd1SJeff Kirsher 6399aebddd1SJeff Kirsher if (msecs > 4000) { 6406589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 641954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 642f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 6439aebddd1SJeff Kirsher return -1; 6449aebddd1SJeff Kirsher } 6459aebddd1SJeff Kirsher 6469aebddd1SJeff Kirsher msleep(1); 6479aebddd1SJeff Kirsher msecs++; 6489aebddd1SJeff Kirsher } while (true); 6499aebddd1SJeff Kirsher 6509aebddd1SJeff Kirsher return 0; 6519aebddd1SJeff Kirsher } 6529aebddd1SJeff Kirsher 6539aebddd1SJeff Kirsher /* 6549aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 6559aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 6569aebddd1SJeff Kirsher */ 6579aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 6589aebddd1SJeff Kirsher { 6599aebddd1SJeff Kirsher int status; 6609aebddd1SJeff Kirsher u32 val = 0; 6619aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 6629aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6639aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 6649aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 6659aebddd1SJeff Kirsher 6669aebddd1SJeff Kirsher /* wait for ready to be set */ 6679aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6689aebddd1SJeff Kirsher if (status != 0) 6699aebddd1SJeff Kirsher return status; 6709aebddd1SJeff Kirsher 6719aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 6729aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 6739aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 6749aebddd1SJeff Kirsher iowrite32(val, db); 6759aebddd1SJeff Kirsher 6769aebddd1SJeff Kirsher /* wait for ready to be set */ 6779aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6789aebddd1SJeff Kirsher if (status != 0) 6799aebddd1SJeff Kirsher return status; 6809aebddd1SJeff Kirsher 6819aebddd1SJeff Kirsher val = 0; 6829aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 6839aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 6849aebddd1SJeff Kirsher iowrite32(val, db); 6859aebddd1SJeff Kirsher 6869aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6879aebddd1SJeff Kirsher if (status != 0) 6889aebddd1SJeff Kirsher return status; 6899aebddd1SJeff Kirsher 6909aebddd1SJeff Kirsher /* A cq entry has been made now */ 6919aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 6929aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 6939aebddd1SJeff Kirsher be_mcc_compl_use(compl); 6949aebddd1SJeff Kirsher if (status) 6959aebddd1SJeff Kirsher return status; 6969aebddd1SJeff Kirsher } else { 6979aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 6989aebddd1SJeff Kirsher return -1; 6999aebddd1SJeff Kirsher } 7009aebddd1SJeff Kirsher return 0; 7019aebddd1SJeff Kirsher } 7029aebddd1SJeff Kirsher 703c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 7049aebddd1SJeff Kirsher { 7059aebddd1SJeff Kirsher u32 sem; 7069aebddd1SJeff Kirsher 707c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 708c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 7099aebddd1SJeff Kirsher else 710c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 711c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 712c5b3ad4cSSathya Perla 713c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 7149aebddd1SJeff Kirsher } 7159aebddd1SJeff Kirsher 71687f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 717bf99e50dSPadmanabh Ratnakar { 718bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 719bf99e50dSPadmanabh Ratnakar u32 sliport_status; 720e673244aSKalesh AP int i; 721bf99e50dSPadmanabh Ratnakar 722bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 723bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 724bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 7259fa465c0SSathya Perla return 0; 7269fa465c0SSathya Perla 7279fa465c0SSathya Perla if (sliport_status & SLIPORT_STATUS_ERR_MASK && 7289fa465c0SSathya Perla !(sliport_status & SLIPORT_STATUS_RN_MASK)) 7299fa465c0SSathya Perla return -EIO; 730bf99e50dSPadmanabh Ratnakar 731bf99e50dSPadmanabh Ratnakar msleep(1000); 732bf99e50dSPadmanabh Ratnakar } 733bf99e50dSPadmanabh Ratnakar 734e673244aSKalesh AP return sliport_status ? : -1; 735bf99e50dSPadmanabh Ratnakar } 736bf99e50dSPadmanabh Ratnakar 737bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 7389aebddd1SJeff Kirsher { 7399aebddd1SJeff Kirsher u16 stage; 7409aebddd1SJeff Kirsher int status, timeout = 0; 7419aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 7429aebddd1SJeff Kirsher 743bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 744bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 745e673244aSKalesh AP if (status) { 746e673244aSKalesh AP stage = status; 747e673244aSKalesh AP goto err; 748e673244aSKalesh AP } 749e673244aSKalesh AP return 0; 750bf99e50dSPadmanabh Ratnakar } 751bf99e50dSPadmanabh Ratnakar 7529aebddd1SJeff Kirsher do { 753ca3de6b2SSathya Perla /* There's no means to poll POST state on BE2/3 VFs */ 754ca3de6b2SSathya Perla if (BEx_chip(adapter) && be_virtfn(adapter)) 755ca3de6b2SSathya Perla return 0; 756ca3de6b2SSathya Perla 757c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 75866d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 75966d29cbcSGavin Shan return 0; 76066d29cbcSGavin Shan 761a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 7629aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 7639aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 7649aebddd1SJeff Kirsher return -EINTR; 7659aebddd1SJeff Kirsher } 7669aebddd1SJeff Kirsher timeout += 2; 7673ab81b5fSSomnath Kotur } while (timeout < 60); 7689aebddd1SJeff Kirsher 769e673244aSKalesh AP err: 770e673244aSKalesh AP dev_err(dev, "POST timeout; stage=%#x\n", stage); 7719fa465c0SSathya Perla return -ETIMEDOUT; 7729aebddd1SJeff Kirsher } 7739aebddd1SJeff Kirsher 7749aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 7759aebddd1SJeff Kirsher { 7769aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 7779aebddd1SJeff Kirsher } 7789aebddd1SJeff Kirsher 779a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 780bea50988SSathya Perla { 781bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 782bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 783bea50988SSathya Perla } 7849aebddd1SJeff Kirsher 7859aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 786106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 787106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 788106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 789a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 790a2cc4e0bSSathya Perla struct be_dma_mem *mem) 7919aebddd1SJeff Kirsher { 792106df1e3SSomnath Kotur struct be_sge *sge; 793106df1e3SSomnath Kotur 7949aebddd1SJeff Kirsher req_hdr->opcode = opcode; 7959aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 7969aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 7979aebddd1SJeff Kirsher req_hdr->version = 0; 798bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 799106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 800106df1e3SSomnath Kotur if (mem) { 801106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 802106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 803106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 804106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 805106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 806106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 807106df1e3SSomnath Kotur } else 808106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 809106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 8109aebddd1SJeff Kirsher } 8119aebddd1SJeff Kirsher 8129aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 8139aebddd1SJeff Kirsher struct be_dma_mem *mem) 8149aebddd1SJeff Kirsher { 8159aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 8169aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 8179aebddd1SJeff Kirsher 8189aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 8199aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 8209aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 8219aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 8229aebddd1SJeff Kirsher } 8239aebddd1SJeff Kirsher } 8249aebddd1SJeff Kirsher 8259aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 8269aebddd1SJeff Kirsher { 8279aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 8289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 8299aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 8309aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8319aebddd1SJeff Kirsher return wrb; 8329aebddd1SJeff Kirsher } 8339aebddd1SJeff Kirsher 8349aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 8359aebddd1SJeff Kirsher { 8369aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 8379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8389aebddd1SJeff Kirsher 839aa790db9SPadmanabh Ratnakar if (!mccq->created) 840aa790db9SPadmanabh Ratnakar return NULL; 841aa790db9SPadmanabh Ratnakar 8424d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 8439aebddd1SJeff Kirsher return NULL; 8449aebddd1SJeff Kirsher 8459aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 8469aebddd1SJeff Kirsher queue_head_inc(mccq); 8479aebddd1SJeff Kirsher atomic_inc(&mccq->used); 8489aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8499aebddd1SJeff Kirsher return wrb; 8509aebddd1SJeff Kirsher } 8519aebddd1SJeff Kirsher 852bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 853bea50988SSathya Perla { 854bea50988SSathya Perla return adapter->mcc_obj.q.created; 855bea50988SSathya Perla } 856bea50988SSathya Perla 857bea50988SSathya Perla /* Must be used only in process context */ 858bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 859bea50988SSathya Perla { 860bea50988SSathya Perla if (use_mcc(adapter)) { 861bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 862bea50988SSathya Perla return 0; 863bea50988SSathya Perla } else { 864bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 865bea50988SSathya Perla } 866bea50988SSathya Perla } 867bea50988SSathya Perla 868bea50988SSathya Perla /* Must be used only in process context */ 869bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 870bea50988SSathya Perla { 871bea50988SSathya Perla if (use_mcc(adapter)) 872bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 873bea50988SSathya Perla else 874bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 875bea50988SSathya Perla } 876bea50988SSathya Perla 877bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 878bea50988SSathya Perla struct be_mcc_wrb *wrb) 879bea50988SSathya Perla { 880bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 881bea50988SSathya Perla 882bea50988SSathya Perla if (use_mcc(adapter)) { 883bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 884bea50988SSathya Perla if (!dest_wrb) 885bea50988SSathya Perla return NULL; 886bea50988SSathya Perla } else { 887bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 888bea50988SSathya Perla } 889bea50988SSathya Perla 890bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 891bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 892bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 893bea50988SSathya Perla 894bea50988SSathya Perla return dest_wrb; 895bea50988SSathya Perla } 896bea50988SSathya Perla 897bea50988SSathya Perla /* Must be used only in process context */ 898bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 899bea50988SSathya Perla struct be_mcc_wrb *wrb) 900bea50988SSathya Perla { 901bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 902bea50988SSathya Perla int status; 903bea50988SSathya Perla 904bea50988SSathya Perla status = be_cmd_lock(adapter); 905bea50988SSathya Perla if (status) 906bea50988SSathya Perla return status; 907bea50988SSathya Perla 908bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 9090c884567SSuresh Reddy if (!dest_wrb) { 9100c884567SSuresh Reddy status = -EBUSY; 9110c884567SSuresh Reddy goto unlock; 9120c884567SSuresh Reddy } 913bea50988SSathya Perla 914bea50988SSathya Perla if (use_mcc(adapter)) 915bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 916bea50988SSathya Perla else 917bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 918bea50988SSathya Perla 919bea50988SSathya Perla if (!status) 920bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 921bea50988SSathya Perla 9220c884567SSuresh Reddy unlock: 923bea50988SSathya Perla be_cmd_unlock(adapter); 924bea50988SSathya Perla return status; 925bea50988SSathya Perla } 926bea50988SSathya Perla 9279aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 9289aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9299aebddd1SJeff Kirsher */ 9309aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 9319aebddd1SJeff Kirsher { 9329aebddd1SJeff Kirsher u8 *wrb; 9339aebddd1SJeff Kirsher int status; 9349aebddd1SJeff Kirsher 935bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 936bf99e50dSPadmanabh Ratnakar return 0; 937bf99e50dSPadmanabh Ratnakar 9389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9399aebddd1SJeff Kirsher return -1; 9409aebddd1SJeff Kirsher 9419aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9429aebddd1SJeff Kirsher *wrb++ = 0xFF; 9439aebddd1SJeff Kirsher *wrb++ = 0x12; 9449aebddd1SJeff Kirsher *wrb++ = 0x34; 9459aebddd1SJeff Kirsher *wrb++ = 0xFF; 9469aebddd1SJeff Kirsher *wrb++ = 0xFF; 9479aebddd1SJeff Kirsher *wrb++ = 0x56; 9489aebddd1SJeff Kirsher *wrb++ = 0x78; 9499aebddd1SJeff Kirsher *wrb = 0xFF; 9509aebddd1SJeff Kirsher 9519aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9529aebddd1SJeff Kirsher 9539aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9549aebddd1SJeff Kirsher return status; 9559aebddd1SJeff Kirsher } 9569aebddd1SJeff Kirsher 9579aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 9589aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9599aebddd1SJeff Kirsher */ 9609aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 9619aebddd1SJeff Kirsher { 9629aebddd1SJeff Kirsher u8 *wrb; 9639aebddd1SJeff Kirsher int status; 9649aebddd1SJeff Kirsher 965bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 966bf99e50dSPadmanabh Ratnakar return 0; 967bf99e50dSPadmanabh Ratnakar 9689aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9699aebddd1SJeff Kirsher return -1; 9709aebddd1SJeff Kirsher 9719aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9729aebddd1SJeff Kirsher *wrb++ = 0xFF; 9739aebddd1SJeff Kirsher *wrb++ = 0xAA; 9749aebddd1SJeff Kirsher *wrb++ = 0xBB; 9759aebddd1SJeff Kirsher *wrb++ = 0xFF; 9769aebddd1SJeff Kirsher *wrb++ = 0xFF; 9779aebddd1SJeff Kirsher *wrb++ = 0xCC; 9789aebddd1SJeff Kirsher *wrb++ = 0xDD; 9799aebddd1SJeff Kirsher *wrb = 0xFF; 9809aebddd1SJeff Kirsher 9819aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9829aebddd1SJeff Kirsher 9839aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9849aebddd1SJeff Kirsher return status; 9859aebddd1SJeff Kirsher } 986bf99e50dSPadmanabh Ratnakar 987f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 9889aebddd1SJeff Kirsher { 9899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9909aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 991f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 992f2f781a7SSathya Perla int status, ver = 0; 9939aebddd1SJeff Kirsher 9949aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9959aebddd1SJeff Kirsher return -1; 9969aebddd1SJeff Kirsher 9979aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 9989aebddd1SJeff Kirsher req = embedded_payload(wrb); 9999aebddd1SJeff Kirsher 1000106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1001a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 1002a2cc4e0bSSathya Perla NULL); 10039aebddd1SJeff Kirsher 1004f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 1005f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 1006f2f781a7SSathya Perla ver = 2; 1007f2f781a7SSathya Perla 1008f2f781a7SSathya Perla req->hdr.version = ver; 10099aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10109aebddd1SJeff Kirsher 10119aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 10129aebddd1SJeff Kirsher /* 4byte eqe*/ 10139aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 10149aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 1015f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 10169aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 10179aebddd1SJeff Kirsher 10189aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10199aebddd1SJeff Kirsher 10209aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10219aebddd1SJeff Kirsher if (!status) { 10229aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 102303d28ffeSKalesh AP 1024f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 1025f2f781a7SSathya Perla eqo->msix_idx = 1026f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 1027f2f781a7SSathya Perla eqo->q.created = true; 10289aebddd1SJeff Kirsher } 10299aebddd1SJeff Kirsher 10309aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10319aebddd1SJeff Kirsher return status; 10329aebddd1SJeff Kirsher } 10339aebddd1SJeff Kirsher 1034f9449ab7SSathya Perla /* Use MCC */ 10359aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 10365ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 10379aebddd1SJeff Kirsher { 10389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10399aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 10409aebddd1SJeff Kirsher int status; 10419aebddd1SJeff Kirsher 1042f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 10439aebddd1SJeff Kirsher 1044f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1045f9449ab7SSathya Perla if (!wrb) { 1046f9449ab7SSathya Perla status = -EBUSY; 1047f9449ab7SSathya Perla goto err; 1048f9449ab7SSathya Perla } 10499aebddd1SJeff Kirsher req = embedded_payload(wrb); 10509aebddd1SJeff Kirsher 1051106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1052a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 1053a2cc4e0bSSathya Perla NULL); 10545ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 10559aebddd1SJeff Kirsher if (permanent) { 10569aebddd1SJeff Kirsher req->permanent = 1; 10579aebddd1SJeff Kirsher } else { 10589aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 1059590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 10609aebddd1SJeff Kirsher req->permanent = 0; 10619aebddd1SJeff Kirsher } 10629aebddd1SJeff Kirsher 1063f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 10649aebddd1SJeff Kirsher if (!status) { 10659aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 106603d28ffeSKalesh AP 10679aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 10689aebddd1SJeff Kirsher } 10699aebddd1SJeff Kirsher 1070f9449ab7SSathya Perla err: 1071f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 10729aebddd1SJeff Kirsher return status; 10739aebddd1SJeff Kirsher } 10749aebddd1SJeff Kirsher 10759aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 10769aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 10779aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 10789aebddd1SJeff Kirsher { 10799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10809aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 10819aebddd1SJeff Kirsher int status; 10829aebddd1SJeff Kirsher 10839aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 10849aebddd1SJeff Kirsher 10859aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10869aebddd1SJeff Kirsher if (!wrb) { 10879aebddd1SJeff Kirsher status = -EBUSY; 10889aebddd1SJeff Kirsher goto err; 10899aebddd1SJeff Kirsher } 10909aebddd1SJeff Kirsher req = embedded_payload(wrb); 10919aebddd1SJeff Kirsher 1092106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1093a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 1094a2cc4e0bSSathya Perla NULL); 10959aebddd1SJeff Kirsher 10969aebddd1SJeff Kirsher req->hdr.domain = domain; 10979aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 10989aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11019aebddd1SJeff Kirsher if (!status) { 11029aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 110303d28ffeSKalesh AP 11049aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11059aebddd1SJeff Kirsher } 11069aebddd1SJeff Kirsher 11079aebddd1SJeff Kirsher err: 11089aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1109e3a7ae2cSSomnath Kotur 1110e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 1111e3a7ae2cSSomnath Kotur status = -EPERM; 1112e3a7ae2cSSomnath Kotur 11139aebddd1SJeff Kirsher return status; 11149aebddd1SJeff Kirsher } 11159aebddd1SJeff Kirsher 11169aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 111730128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 11189aebddd1SJeff Kirsher { 11199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11209aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 11219aebddd1SJeff Kirsher int status; 11229aebddd1SJeff Kirsher 112330128031SSathya Perla if (pmac_id == -1) 112430128031SSathya Perla return 0; 112530128031SSathya Perla 11269aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 11279aebddd1SJeff Kirsher 11289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11299aebddd1SJeff Kirsher if (!wrb) { 11309aebddd1SJeff Kirsher status = -EBUSY; 11319aebddd1SJeff Kirsher goto err; 11329aebddd1SJeff Kirsher } 11339aebddd1SJeff Kirsher req = embedded_payload(wrb); 11349aebddd1SJeff Kirsher 1135106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1136cd3307aaSKalesh AP OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), 1137cd3307aaSKalesh AP wrb, NULL); 11389aebddd1SJeff Kirsher 11399aebddd1SJeff Kirsher req->hdr.domain = dom; 11409aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11419aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 11429aebddd1SJeff Kirsher 11439aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11449aebddd1SJeff Kirsher 11459aebddd1SJeff Kirsher err: 11469aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 11479aebddd1SJeff Kirsher return status; 11489aebddd1SJeff Kirsher } 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher /* Uses Mbox */ 115110ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 115210ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 11539aebddd1SJeff Kirsher { 11549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11559aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 11569aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 11579aebddd1SJeff Kirsher void *ctxt; 11589aebddd1SJeff Kirsher int status; 11599aebddd1SJeff Kirsher 11609aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11619aebddd1SJeff Kirsher return -1; 11629aebddd1SJeff Kirsher 11639aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11649aebddd1SJeff Kirsher req = embedded_payload(wrb); 11659aebddd1SJeff Kirsher ctxt = &req->context; 11669aebddd1SJeff Kirsher 1167106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1168a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1169a2cc4e0bSSathya Perla NULL); 11709aebddd1SJeff Kirsher 11719aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1172bbdc42f8SAjit Khaparde 1173bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 11749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 11759aebddd1SJeff Kirsher coalesce_wm); 11769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 11779aebddd1SJeff Kirsher ctxt, no_delay); 11789aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 11799aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 11809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 11819aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 11829aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1183bbdc42f8SAjit Khaparde } else { 1184bbdc42f8SAjit Khaparde req->hdr.version = 2; 1185bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 118609e83a9dSAjit Khaparde 118709e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 118809e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 118909e83a9dSAjit Khaparde */ 119009e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 119109e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 119209e83a9dSAjit Khaparde ctxt, coalesce_wm); 1193bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1194bbdc42f8SAjit Khaparde no_delay); 1195bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1196bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1197bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1198a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1199a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 12009aebddd1SJeff Kirsher } 12019aebddd1SJeff Kirsher 12029aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12039aebddd1SJeff Kirsher 12049aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12059aebddd1SJeff Kirsher 12069aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12079aebddd1SJeff Kirsher if (!status) { 12089aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 120903d28ffeSKalesh AP 12109aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 12119aebddd1SJeff Kirsher cq->created = true; 12129aebddd1SJeff Kirsher } 12139aebddd1SJeff Kirsher 12149aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12159aebddd1SJeff Kirsher 12169aebddd1SJeff Kirsher return status; 12179aebddd1SJeff Kirsher } 12189aebddd1SJeff Kirsher 12199aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 12209aebddd1SJeff Kirsher { 12219aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 122203d28ffeSKalesh AP 12239aebddd1SJeff Kirsher if (len_encoded == 16) 12249aebddd1SJeff Kirsher len_encoded = 0; 12259aebddd1SJeff Kirsher return len_encoded; 12269aebddd1SJeff Kirsher } 12279aebddd1SJeff Kirsher 12284188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 12299aebddd1SJeff Kirsher struct be_queue_info *mccq, 12309aebddd1SJeff Kirsher struct be_queue_info *cq) 12319aebddd1SJeff Kirsher { 12329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12339aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 12349aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 12359aebddd1SJeff Kirsher void *ctxt; 12369aebddd1SJeff Kirsher int status; 12379aebddd1SJeff Kirsher 12389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12399aebddd1SJeff Kirsher return -1; 12409aebddd1SJeff Kirsher 12419aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12429aebddd1SJeff Kirsher req = embedded_payload(wrb); 12439aebddd1SJeff Kirsher ctxt = &req->context; 12449aebddd1SJeff Kirsher 1245106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1246a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1247a2cc4e0bSSathya Perla NULL); 12489aebddd1SJeff Kirsher 12499aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1250666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 12519aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12529aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12539aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1255666d39c7SVasundhara Volam } else { 1256666d39c7SVasundhara Volam req->hdr.version = 1; 1257666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1258666d39c7SVasundhara Volam 1259666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1260666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1261666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1262666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1263666d39c7SVasundhara Volam ctxt, cq->id); 1264666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1265666d39c7SVasundhara Volam ctxt, 1); 12669aebddd1SJeff Kirsher } 12679aebddd1SJeff Kirsher 126821252377SVasundhara Volam /* Subscribe to Link State, Sliport Event and Group 5 Events 126921252377SVasundhara Volam * (bits 1, 5 and 17 set) 127021252377SVasundhara Volam */ 127121252377SVasundhara Volam req->async_event_bitmap[0] = 127221252377SVasundhara Volam cpu_to_le32(BIT(ASYNC_EVENT_CODE_LINK_STATE) | 127321252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_GRP_5) | 127421252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_QNQ) | 127521252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_SLIPORT)); 127621252377SVasundhara Volam 12779aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12789aebddd1SJeff Kirsher 12799aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12809aebddd1SJeff Kirsher 12819aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12829aebddd1SJeff Kirsher if (!status) { 12839aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 128403d28ffeSKalesh AP 12859aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12869aebddd1SJeff Kirsher mccq->created = true; 12879aebddd1SJeff Kirsher } 12889aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12899aebddd1SJeff Kirsher 12909aebddd1SJeff Kirsher return status; 12919aebddd1SJeff Kirsher } 12929aebddd1SJeff Kirsher 12934188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 12949aebddd1SJeff Kirsher struct be_queue_info *mccq, 12959aebddd1SJeff Kirsher struct be_queue_info *cq) 12969aebddd1SJeff Kirsher { 12979aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12989aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 12999aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 13009aebddd1SJeff Kirsher void *ctxt; 13019aebddd1SJeff Kirsher int status; 13029aebddd1SJeff Kirsher 13039aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13049aebddd1SJeff Kirsher return -1; 13059aebddd1SJeff Kirsher 13069aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13079aebddd1SJeff Kirsher req = embedded_payload(wrb); 13089aebddd1SJeff Kirsher ctxt = &req->context; 13099aebddd1SJeff Kirsher 1310106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1311a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1312a2cc4e0bSSathya Perla NULL); 13139aebddd1SJeff Kirsher 13149aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 13159aebddd1SJeff Kirsher 13169aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 13179aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 13189aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 13199aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 13229aebddd1SJeff Kirsher 13239aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13249aebddd1SJeff Kirsher 13259aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13269aebddd1SJeff Kirsher if (!status) { 13279aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 132803d28ffeSKalesh AP 13299aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 13309aebddd1SJeff Kirsher mccq->created = true; 13319aebddd1SJeff Kirsher } 13329aebddd1SJeff Kirsher 13339aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13349aebddd1SJeff Kirsher return status; 13359aebddd1SJeff Kirsher } 13369aebddd1SJeff Kirsher 13379aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1338a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 13399aebddd1SJeff Kirsher { 13409aebddd1SJeff Kirsher int status; 13419aebddd1SJeff Kirsher 13429aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1343666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 13449aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 13459aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 13469aebddd1SJeff Kirsher "and FCoE traffic"); 13479aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 13489aebddd1SJeff Kirsher } 13499aebddd1SJeff Kirsher return status; 13509aebddd1SJeff Kirsher } 13519aebddd1SJeff Kirsher 135294d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 13539aebddd1SJeff Kirsher { 13547707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 13559aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 135694d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 135794d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 13589aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 135994d73aaaSVasundhara Volam int status, ver = 0; 13609aebddd1SJeff Kirsher 13617707133cSSathya Perla req = embedded_payload(&wrb); 1362106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 13637707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 13649aebddd1SJeff Kirsher 13659aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 13669aebddd1SJeff Kirsher req->hdr.version = 1; 136794d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 136894d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 136994d73aaaSVasundhara Volam req->hdr.version = 2; 137094d73aaaSVasundhara Volam } else { /* For SH */ 137194d73aaaSVasundhara Volam req->hdr.version = 2; 13729aebddd1SJeff Kirsher } 13739aebddd1SJeff Kirsher 137481b02655SVasundhara Volam if (req->hdr.version > 0) 137581b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 13769aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 13779aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 13789aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 137994d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 138094d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 13819aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 138294d73aaaSVasundhara Volam ver = req->hdr.version; 138394d73aaaSVasundhara Volam 13847707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13859aebddd1SJeff Kirsher if (!status) { 13867707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 138703d28ffeSKalesh AP 13889aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 138994d73aaaSVasundhara Volam if (ver == 2) 139094d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 139194d73aaaSVasundhara Volam else 139294d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 13939aebddd1SJeff Kirsher txq->created = true; 13949aebddd1SJeff Kirsher } 13959aebddd1SJeff Kirsher 13969aebddd1SJeff Kirsher return status; 13979aebddd1SJeff Kirsher } 13989aebddd1SJeff Kirsher 13999aebddd1SJeff Kirsher /* Uses MCC */ 14009aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 14019aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 140210ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 14039aebddd1SJeff Kirsher { 14049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14059aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 14069aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 14079aebddd1SJeff Kirsher int status; 14089aebddd1SJeff Kirsher 14099aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14109aebddd1SJeff Kirsher 14119aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14129aebddd1SJeff Kirsher if (!wrb) { 14139aebddd1SJeff Kirsher status = -EBUSY; 14149aebddd1SJeff Kirsher goto err; 14159aebddd1SJeff Kirsher } 14169aebddd1SJeff Kirsher req = embedded_payload(wrb); 14179aebddd1SJeff Kirsher 1418106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1419106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 14209aebddd1SJeff Kirsher 14219aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 14229aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 14239aebddd1SJeff Kirsher req->num_pages = 2; 14249aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 14259aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 142610ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 14279aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 14289aebddd1SJeff Kirsher 14299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14309aebddd1SJeff Kirsher if (!status) { 14319aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 143203d28ffeSKalesh AP 14339aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 14349aebddd1SJeff Kirsher rxq->created = true; 14359aebddd1SJeff Kirsher *rss_id = resp->rss_id; 14369aebddd1SJeff Kirsher } 14379aebddd1SJeff Kirsher 14389aebddd1SJeff Kirsher err: 14399aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14409aebddd1SJeff Kirsher return status; 14419aebddd1SJeff Kirsher } 14429aebddd1SJeff Kirsher 14439aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 14449aebddd1SJeff Kirsher * Uses Mbox 14459aebddd1SJeff Kirsher */ 14469aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 14479aebddd1SJeff Kirsher int queue_type) 14489aebddd1SJeff Kirsher { 14499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14509aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 14519aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 14529aebddd1SJeff Kirsher int status; 14539aebddd1SJeff Kirsher 14549aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 14559aebddd1SJeff Kirsher return -1; 14569aebddd1SJeff Kirsher 14579aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 14589aebddd1SJeff Kirsher req = embedded_payload(wrb); 14599aebddd1SJeff Kirsher 14609aebddd1SJeff Kirsher switch (queue_type) { 14619aebddd1SJeff Kirsher case QTYPE_EQ: 14629aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14639aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 14649aebddd1SJeff Kirsher break; 14659aebddd1SJeff Kirsher case QTYPE_CQ: 14669aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14679aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 14689aebddd1SJeff Kirsher break; 14699aebddd1SJeff Kirsher case QTYPE_TXQ: 14709aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14719aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 14729aebddd1SJeff Kirsher break; 14739aebddd1SJeff Kirsher case QTYPE_RXQ: 14749aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14759aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 14769aebddd1SJeff Kirsher break; 14779aebddd1SJeff Kirsher case QTYPE_MCCQ: 14789aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14799aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 14809aebddd1SJeff Kirsher break; 14819aebddd1SJeff Kirsher default: 14829aebddd1SJeff Kirsher BUG(); 14839aebddd1SJeff Kirsher } 14849aebddd1SJeff Kirsher 1485106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1486106df1e3SSomnath Kotur NULL); 14879aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14889aebddd1SJeff Kirsher 14899aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 14909aebddd1SJeff Kirsher q->created = false; 14919aebddd1SJeff Kirsher 14929aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 14939aebddd1SJeff Kirsher return status; 14949aebddd1SJeff Kirsher } 14959aebddd1SJeff Kirsher 14969aebddd1SJeff Kirsher /* Uses MCC */ 14979aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 14989aebddd1SJeff Kirsher { 14999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15009aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 15019aebddd1SJeff Kirsher int status; 15029aebddd1SJeff Kirsher 15039aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15049aebddd1SJeff Kirsher 15059aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15069aebddd1SJeff Kirsher if (!wrb) { 15079aebddd1SJeff Kirsher status = -EBUSY; 15089aebddd1SJeff Kirsher goto err; 15099aebddd1SJeff Kirsher } 15109aebddd1SJeff Kirsher req = embedded_payload(wrb); 15119aebddd1SJeff Kirsher 1512106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1513106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 15149aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 15159aebddd1SJeff Kirsher 15169aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15179aebddd1SJeff Kirsher q->created = false; 15189aebddd1SJeff Kirsher 15199aebddd1SJeff Kirsher err: 15209aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15219aebddd1SJeff Kirsher return status; 15229aebddd1SJeff Kirsher } 15239aebddd1SJeff Kirsher 15249aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1525bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 15269aebddd1SJeff Kirsher */ 15279aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 15281578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 15299aebddd1SJeff Kirsher { 1530bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 15319aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 15329aebddd1SJeff Kirsher int status; 15339aebddd1SJeff Kirsher 1534bea50988SSathya Perla req = embedded_payload(&wrb); 1535106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1536a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1537a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 15389aebddd1SJeff Kirsher req->hdr.domain = domain; 15399aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 15409aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1541f9449ab7SSathya Perla req->pmac_invalid = true; 15429aebddd1SJeff Kirsher 1543bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 15449aebddd1SJeff Kirsher if (!status) { 1545bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 154603d28ffeSKalesh AP 15479aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1548b5bb9776SSathya Perla 1549b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 155018c57c74SKalesh AP if (BE3_chip(adapter) && be_virtfn(adapter)) 1551b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 15529aebddd1SJeff Kirsher } 15539aebddd1SJeff Kirsher return status; 15549aebddd1SJeff Kirsher } 15559aebddd1SJeff Kirsher 155662219066SAjit Khaparde /* Uses MCCQ if available else MBOX */ 155730128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 15589aebddd1SJeff Kirsher { 155962219066SAjit Khaparde struct be_mcc_wrb wrb = {0}; 15609aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 15619aebddd1SJeff Kirsher int status; 15629aebddd1SJeff Kirsher 156330128031SSathya Perla if (interface_id == -1) 1564f9449ab7SSathya Perla return 0; 15659aebddd1SJeff Kirsher 156662219066SAjit Khaparde req = embedded_payload(&wrb); 15679aebddd1SJeff Kirsher 1568106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1569a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 157062219066SAjit Khaparde sizeof(*req), &wrb, NULL); 15719aebddd1SJeff Kirsher req->hdr.domain = domain; 15729aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 15739aebddd1SJeff Kirsher 157462219066SAjit Khaparde status = be_cmd_notify_wait(adapter, &wrb); 15759aebddd1SJeff Kirsher return status; 15769aebddd1SJeff Kirsher } 15779aebddd1SJeff Kirsher 15789aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 15799aebddd1SJeff Kirsher * WRB but is a separate dma memory block 15809aebddd1SJeff Kirsher * Uses asynchronous MCC 15819aebddd1SJeff Kirsher */ 15829aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 15839aebddd1SJeff Kirsher { 15849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15859aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 15869aebddd1SJeff Kirsher int status = 0; 15879aebddd1SJeff Kirsher 15889aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15899aebddd1SJeff Kirsher 15909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15919aebddd1SJeff Kirsher if (!wrb) { 15929aebddd1SJeff Kirsher status = -EBUSY; 15939aebddd1SJeff Kirsher goto err; 15949aebddd1SJeff Kirsher } 15959aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 15969aebddd1SJeff Kirsher 1597106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1598a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1599a2cc4e0bSSathya Perla nonemb_cmd); 16009aebddd1SJeff Kirsher 1601ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 160261000861SAjit Khaparde if (BE2_chip(adapter)) 160361000861SAjit Khaparde hdr->version = 0; 160461000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 16059aebddd1SJeff Kirsher hdr->version = 1; 160661000861SAjit Khaparde else 160761000861SAjit Khaparde hdr->version = 2; 16089aebddd1SJeff Kirsher 1609efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1610efaa408eSSuresh Reddy if (status) 1611efaa408eSSuresh Reddy goto err; 1612efaa408eSSuresh Reddy 16139aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16149aebddd1SJeff Kirsher 16159aebddd1SJeff Kirsher err: 16169aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16179aebddd1SJeff Kirsher return status; 16189aebddd1SJeff Kirsher } 16199aebddd1SJeff Kirsher 16209aebddd1SJeff Kirsher /* Lancer Stats */ 16219aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 16229aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 16239aebddd1SJeff Kirsher { 16249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16259aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 16269aebddd1SJeff Kirsher int status = 0; 16279aebddd1SJeff Kirsher 1628f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1629f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1630f25b119cSPadmanabh Ratnakar return -EPERM; 1631f25b119cSPadmanabh Ratnakar 16329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16339aebddd1SJeff Kirsher 16349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16359aebddd1SJeff Kirsher if (!wrb) { 16369aebddd1SJeff Kirsher status = -EBUSY; 16379aebddd1SJeff Kirsher goto err; 16389aebddd1SJeff Kirsher } 16399aebddd1SJeff Kirsher req = nonemb_cmd->va; 16409aebddd1SJeff Kirsher 1641106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1642a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1643a2cc4e0bSSathya Perla wrb, nonemb_cmd); 16449aebddd1SJeff Kirsher 1645d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 16469aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 16479aebddd1SJeff Kirsher 1648efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1649efaa408eSSuresh Reddy if (status) 1650efaa408eSSuresh Reddy goto err; 1651efaa408eSSuresh Reddy 16529aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16539aebddd1SJeff Kirsher 16549aebddd1SJeff Kirsher err: 16559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16569aebddd1SJeff Kirsher return status; 16579aebddd1SJeff Kirsher } 16589aebddd1SJeff Kirsher 1659323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1660323ff71eSSathya Perla { 1661323ff71eSSathya Perla switch (mac_speed) { 1662323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1663323ff71eSSathya Perla return 0; 1664323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1665323ff71eSSathya Perla return 10; 1666323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1667323ff71eSSathya Perla return 100; 1668323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1669323ff71eSSathya Perla return 1000; 1670323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1671323ff71eSSathya Perla return 10000; 1672b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1673b971f847SVasundhara Volam return 20000; 1674b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1675b971f847SVasundhara Volam return 25000; 1676b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1677b971f847SVasundhara Volam return 40000; 1678323ff71eSSathya Perla } 1679323ff71eSSathya Perla return 0; 1680323ff71eSSathya Perla } 1681323ff71eSSathya Perla 1682323ff71eSSathya Perla /* Uses synchronous mcc 1683323ff71eSSathya Perla * Returns link_speed in Mbps 1684323ff71eSSathya Perla */ 1685323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1686323ff71eSSathya Perla u8 *link_status, u32 dom) 16879aebddd1SJeff Kirsher { 16889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16899aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 16909aebddd1SJeff Kirsher int status; 16919aebddd1SJeff Kirsher 16929aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16939aebddd1SJeff Kirsher 1694b236916aSAjit Khaparde if (link_status) 1695b236916aSAjit Khaparde *link_status = LINK_DOWN; 1696b236916aSAjit Khaparde 16979aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16989aebddd1SJeff Kirsher if (!wrb) { 16999aebddd1SJeff Kirsher status = -EBUSY; 17009aebddd1SJeff Kirsher goto err; 17019aebddd1SJeff Kirsher } 17029aebddd1SJeff Kirsher req = embedded_payload(wrb); 17039aebddd1SJeff Kirsher 170457cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1705a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1706a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 170757cd80d4SPadmanabh Ratnakar 1708ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1709ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1710daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1711daad6167SPadmanabh Ratnakar 171257cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 17139aebddd1SJeff Kirsher 17149aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17159aebddd1SJeff Kirsher if (!status) { 17169aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 171703d28ffeSKalesh AP 1718323ff71eSSathya Perla if (link_speed) { 1719323ff71eSSathya Perla *link_speed = resp->link_speed ? 1720323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1721323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1722323ff71eSSathya Perla 1723323ff71eSSathya Perla if (!resp->logical_link_status) 1724323ff71eSSathya Perla *link_speed = 0; 17259aebddd1SJeff Kirsher } 1726b236916aSAjit Khaparde if (link_status) 1727b236916aSAjit Khaparde *link_status = resp->logical_link_status; 17289aebddd1SJeff Kirsher } 17299aebddd1SJeff Kirsher 17309aebddd1SJeff Kirsher err: 17319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17329aebddd1SJeff Kirsher return status; 17339aebddd1SJeff Kirsher } 17349aebddd1SJeff Kirsher 17359aebddd1SJeff Kirsher /* Uses synchronous mcc */ 17369aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 17379aebddd1SJeff Kirsher { 17389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17399aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1740117affe3SVasundhara Volam int status = 0; 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17439aebddd1SJeff Kirsher 17449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17459aebddd1SJeff Kirsher if (!wrb) { 17469aebddd1SJeff Kirsher status = -EBUSY; 17479aebddd1SJeff Kirsher goto err; 17489aebddd1SJeff Kirsher } 17499aebddd1SJeff Kirsher req = embedded_payload(wrb); 17509aebddd1SJeff Kirsher 1751106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1752a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1753a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 17549aebddd1SJeff Kirsher 1755efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 17569aebddd1SJeff Kirsher err: 17579aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17589aebddd1SJeff Kirsher return status; 17599aebddd1SJeff Kirsher } 17609aebddd1SJeff Kirsher 17619aebddd1SJeff Kirsher /* Uses synchronous mcc */ 1762fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size) 17639aebddd1SJeff Kirsher { 1764fd7ff6f0SVenkat Duvvuru struct be_mcc_wrb wrb = {0}; 17659aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17669aebddd1SJeff Kirsher int status; 17679aebddd1SJeff Kirsher 1768fd7ff6f0SVenkat Duvvuru req = embedded_payload(&wrb); 17699aebddd1SJeff Kirsher 1770106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1771fd7ff6f0SVenkat Duvvuru OPCODE_COMMON_MANAGE_FAT, sizeof(*req), 1772fd7ff6f0SVenkat Duvvuru &wrb, NULL); 17739aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 1774fd7ff6f0SVenkat Duvvuru status = be_cmd_notify_wait(adapter, &wrb); 17759aebddd1SJeff Kirsher if (!status) { 1776fd7ff6f0SVenkat Duvvuru struct be_cmd_resp_get_fat *resp = embedded_payload(&wrb); 177703d28ffeSKalesh AP 1778fd7ff6f0SVenkat Duvvuru if (dump_size && resp->log_size) 1779fd7ff6f0SVenkat Duvvuru *dump_size = le32_to_cpu(resp->log_size) - 17809aebddd1SJeff Kirsher sizeof(u32); 17819aebddd1SJeff Kirsher } 17829aebddd1SJeff Kirsher return status; 17839aebddd1SJeff Kirsher } 17849aebddd1SJeff Kirsher 1785fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf) 17869aebddd1SJeff Kirsher { 17879aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 17889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17899aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17909aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 17919aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1792fd7ff6f0SVenkat Duvvuru int status; 17939aebddd1SJeff Kirsher 17949aebddd1SJeff Kirsher if (buf_len == 0) 1795fd7ff6f0SVenkat Duvvuru return 0; 17969aebddd1SJeff Kirsher 17979aebddd1SJeff Kirsher total_size = buf_len; 17989aebddd1SJeff Kirsher 17999aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1800e51000dbSSriharsha Basavapatna get_fat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 18019aebddd1SJeff Kirsher get_fat_cmd.size, 1802e51000dbSSriharsha Basavapatna &get_fat_cmd.dma, GFP_ATOMIC); 1803fd7ff6f0SVenkat Duvvuru if (!get_fat_cmd.va) 1804c5f156deSVasundhara Volam return -ENOMEM; 18059aebddd1SJeff Kirsher 18069aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18079aebddd1SJeff Kirsher 18089aebddd1SJeff Kirsher while (total_size) { 18099aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 18109aebddd1SJeff Kirsher total_size -= buf_size; 18119aebddd1SJeff Kirsher 18129aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18139aebddd1SJeff Kirsher if (!wrb) { 18149aebddd1SJeff Kirsher status = -EBUSY; 18159aebddd1SJeff Kirsher goto err; 18169aebddd1SJeff Kirsher } 18179aebddd1SJeff Kirsher req = get_fat_cmd.va; 18189aebddd1SJeff Kirsher 18199aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1820106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1821a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1822a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 18239aebddd1SJeff Kirsher 18249aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 18259aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 18269aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 18279aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 18289aebddd1SJeff Kirsher 18299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18309aebddd1SJeff Kirsher if (!status) { 18319aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 183203d28ffeSKalesh AP 18339aebddd1SJeff Kirsher memcpy(buf + offset, 18349aebddd1SJeff Kirsher resp->data_buffer, 183592aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 18369aebddd1SJeff Kirsher } else { 18379aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 18389aebddd1SJeff Kirsher goto err; 18399aebddd1SJeff Kirsher } 18409aebddd1SJeff Kirsher offset += buf_size; 18419aebddd1SJeff Kirsher log_offset += buf_size; 18429aebddd1SJeff Kirsher } 18439aebddd1SJeff Kirsher err: 1844e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_fat_cmd.size, 1845a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 18469aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1847c5f156deSVasundhara Volam return status; 18489aebddd1SJeff Kirsher } 18499aebddd1SJeff Kirsher 185004b71175SSathya Perla /* Uses synchronous mcc */ 1851e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 18529aebddd1SJeff Kirsher { 18539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18549aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 18559aebddd1SJeff Kirsher int status; 18569aebddd1SJeff Kirsher 185704b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 18589aebddd1SJeff Kirsher 185904b71175SSathya Perla wrb = wrb_from_mccq(adapter); 186004b71175SSathya Perla if (!wrb) { 186104b71175SSathya Perla status = -EBUSY; 186204b71175SSathya Perla goto err; 186304b71175SSathya Perla } 186404b71175SSathya Perla 18659aebddd1SJeff Kirsher req = embedded_payload(wrb); 18669aebddd1SJeff Kirsher 1867106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1868a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1869a2cc4e0bSSathya Perla NULL); 187004b71175SSathya Perla status = be_mcc_notify_wait(adapter); 18719aebddd1SJeff Kirsher if (!status) { 18729aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1873acbafeb1SSathya Perla 1874242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1875242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1876242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1877242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 18789aebddd1SJeff Kirsher } 187904b71175SSathya Perla err: 188004b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 18819aebddd1SJeff Kirsher return status; 18829aebddd1SJeff Kirsher } 18839aebddd1SJeff Kirsher 18849aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 18859aebddd1SJeff Kirsher * Uses async mcc 18869aebddd1SJeff Kirsher */ 1887b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1888b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 18899aebddd1SJeff Kirsher { 18909aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18919aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 18922632bafdSSathya Perla int status = 0, i; 18939aebddd1SJeff Kirsher 18949aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18959aebddd1SJeff Kirsher 18969aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18979aebddd1SJeff Kirsher if (!wrb) { 18989aebddd1SJeff Kirsher status = -EBUSY; 18999aebddd1SJeff Kirsher goto err; 19009aebddd1SJeff Kirsher } 19019aebddd1SJeff Kirsher req = embedded_payload(wrb); 19029aebddd1SJeff Kirsher 1903106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1904a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1905a2cc4e0bSSathya Perla NULL); 19069aebddd1SJeff Kirsher 19072632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 19082632bafdSSathya Perla for (i = 0; i < num; i++) { 19092632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 19102632bafdSSathya Perla req->set_eqd[i].phase = 0; 19112632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 19122632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 19132632bafdSSathya Perla } 19149aebddd1SJeff Kirsher 1915efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 19169aebddd1SJeff Kirsher err: 19179aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19189aebddd1SJeff Kirsher return status; 19199aebddd1SJeff Kirsher } 19209aebddd1SJeff Kirsher 192193676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 192293676703SKalesh AP int num) 192393676703SKalesh AP { 192493676703SKalesh AP int num_eqs, i = 0; 192593676703SKalesh AP 192693676703SKalesh AP while (num) { 192793676703SKalesh AP num_eqs = min(num, 8); 192893676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 192993676703SKalesh AP i += num_eqs; 193093676703SKalesh AP num -= num_eqs; 193193676703SKalesh AP } 193293676703SKalesh AP 193393676703SKalesh AP return 0; 193493676703SKalesh AP } 193593676703SKalesh AP 19369aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 19379aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1938435452aaSVasundhara Volam u32 num, u32 domain) 19399aebddd1SJeff Kirsher { 19409aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19419aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 19429aebddd1SJeff Kirsher int status; 19439aebddd1SJeff Kirsher 19449aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19459aebddd1SJeff Kirsher 19469aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19479aebddd1SJeff Kirsher if (!wrb) { 19489aebddd1SJeff Kirsher status = -EBUSY; 19499aebddd1SJeff Kirsher goto err; 19509aebddd1SJeff Kirsher } 19519aebddd1SJeff Kirsher req = embedded_payload(wrb); 19529aebddd1SJeff Kirsher 1953106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1954a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1955a2cc4e0bSSathya Perla wrb, NULL); 1956435452aaSVasundhara Volam req->hdr.domain = domain; 19579aebddd1SJeff Kirsher 19589aebddd1SJeff Kirsher req->interface_id = if_id; 1959012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 19609aebddd1SJeff Kirsher req->num_vlan = num; 19619aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 19629aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 19639aebddd1SJeff Kirsher 19649aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19659aebddd1SJeff Kirsher err: 19669aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19679aebddd1SJeff Kirsher return status; 19689aebddd1SJeff Kirsher } 19699aebddd1SJeff Kirsher 1970ac34b743SSathya Perla static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 19719aebddd1SJeff Kirsher { 19729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19739aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 19749aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 19759aebddd1SJeff Kirsher int status; 19769aebddd1SJeff Kirsher 19779aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19789aebddd1SJeff Kirsher 19799aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19809aebddd1SJeff Kirsher if (!wrb) { 19819aebddd1SJeff Kirsher status = -EBUSY; 19829aebddd1SJeff Kirsher goto err; 19839aebddd1SJeff Kirsher } 19849aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1985106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1986106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1987106df1e3SSomnath Kotur wrb, mem); 19889aebddd1SJeff Kirsher 19899aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1990ac34b743SSathya Perla req->if_flags_mask = cpu_to_le32(flags); 1991ac34b743SSathya Perla req->if_flags = (value == ON) ? req->if_flags_mask : 0; 1992d9d604f8SAjit Khaparde 1993ac34b743SSathya Perla if (flags & BE_IF_FLAGS_MULTICAST) { 19949aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 19959aebddd1SJeff Kirsher int i = 0; 19969aebddd1SJeff Kirsher 19971610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 19981610c79fSPadmanabh Ratnakar * and not setting flags field 19991610c79fSPadmanabh Ratnakar */ 20001610c79fSPadmanabh Ratnakar req->if_flags_mask |= 2001abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 200292bf14abSSathya Perla be_if_cap_flags(adapter)); 2003016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 20049aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 20059aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 20069aebddd1SJeff Kirsher } 20079aebddd1SJeff Kirsher 2008b6588879SSathya Perla status = be_mcc_notify_wait(adapter); 20099aebddd1SJeff Kirsher err: 20109aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20119aebddd1SJeff Kirsher return status; 20129aebddd1SJeff Kirsher } 20139aebddd1SJeff Kirsher 2014ac34b743SSathya Perla int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 2015ac34b743SSathya Perla { 2016ac34b743SSathya Perla struct device *dev = &adapter->pdev->dev; 2017ac34b743SSathya Perla 2018ac34b743SSathya Perla if ((flags & be_if_cap_flags(adapter)) != flags) { 2019ac34b743SSathya Perla dev_warn(dev, "Cannot set rx filter flags 0x%x\n", flags); 2020ac34b743SSathya Perla dev_warn(dev, "Interface is capable of 0x%x flags only\n", 2021ac34b743SSathya Perla be_if_cap_flags(adapter)); 2022ac34b743SSathya Perla } 2023ac34b743SSathya Perla flags &= be_if_cap_flags(adapter); 2024196e3735SKalesh AP if (!flags) 2025196e3735SKalesh AP return -ENOTSUPP; 2026ac34b743SSathya Perla 2027ac34b743SSathya Perla return __be_cmd_rx_filter(adapter, flags, value); 2028ac34b743SSathya Perla } 2029ac34b743SSathya Perla 20309aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 20319aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 20329aebddd1SJeff Kirsher { 20339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20349aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 20359aebddd1SJeff Kirsher int status; 20369aebddd1SJeff Kirsher 2037f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 2038f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2039f25b119cSPadmanabh Ratnakar return -EPERM; 2040f25b119cSPadmanabh Ratnakar 20419aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20429aebddd1SJeff Kirsher 20439aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20449aebddd1SJeff Kirsher if (!wrb) { 20459aebddd1SJeff Kirsher status = -EBUSY; 20469aebddd1SJeff Kirsher goto err; 20479aebddd1SJeff Kirsher } 20489aebddd1SJeff Kirsher req = embedded_payload(wrb); 20499aebddd1SJeff Kirsher 2050106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2051a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 2052a2cc4e0bSSathya Perla wrb, NULL); 20539aebddd1SJeff Kirsher 2054b29812c1SSuresh Reddy req->hdr.version = 1; 20559aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 20569aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 20579aebddd1SJeff Kirsher 20589aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20599aebddd1SJeff Kirsher 20609aebddd1SJeff Kirsher err: 20619aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 2062b29812c1SSuresh Reddy 2063b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 2064b29812c1SSuresh Reddy return -EOPNOTSUPP; 2065b29812c1SSuresh Reddy 20669aebddd1SJeff Kirsher return status; 20679aebddd1SJeff Kirsher } 20689aebddd1SJeff Kirsher 20699aebddd1SJeff Kirsher /* Uses sycn mcc */ 20709aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 20719aebddd1SJeff Kirsher { 20729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20739aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20749aebddd1SJeff Kirsher int status; 20759aebddd1SJeff Kirsher 2076f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2077f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2078f25b119cSPadmanabh Ratnakar return -EPERM; 2079f25b119cSPadmanabh Ratnakar 20809aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20819aebddd1SJeff Kirsher 20829aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20839aebddd1SJeff Kirsher if (!wrb) { 20849aebddd1SJeff Kirsher status = -EBUSY; 20859aebddd1SJeff Kirsher goto err; 20869aebddd1SJeff Kirsher } 20879aebddd1SJeff Kirsher req = embedded_payload(wrb); 20889aebddd1SJeff Kirsher 2089106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2090a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2091a2cc4e0bSSathya Perla wrb, NULL); 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20949aebddd1SJeff Kirsher if (!status) { 20959aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 20969aebddd1SJeff Kirsher embedded_payload(wrb); 209703d28ffeSKalesh AP 20989aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 20999aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 21009aebddd1SJeff Kirsher } 21019aebddd1SJeff Kirsher 21029aebddd1SJeff Kirsher err: 21039aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21049aebddd1SJeff Kirsher return status; 21059aebddd1SJeff Kirsher } 21069aebddd1SJeff Kirsher 21079aebddd1SJeff Kirsher /* Uses mbox */ 2108e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 21099aebddd1SJeff Kirsher { 21109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21119aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 21129aebddd1SJeff Kirsher int status; 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21159aebddd1SJeff Kirsher return -1; 21169aebddd1SJeff Kirsher 21179aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21189aebddd1SJeff Kirsher req = embedded_payload(wrb); 21199aebddd1SJeff Kirsher 2120106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2121a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2122a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21239aebddd1SJeff Kirsher 21249aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21259aebddd1SJeff Kirsher if (!status) { 21269aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 212703d28ffeSKalesh AP 2128e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2129e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2130e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2131e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2132acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2133acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2134acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 21359aebddd1SJeff Kirsher } 21369aebddd1SJeff Kirsher 21379aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21389aebddd1SJeff Kirsher return status; 21399aebddd1SJeff Kirsher } 21409aebddd1SJeff Kirsher 21419aebddd1SJeff Kirsher /* Uses mbox */ 21429aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 21439aebddd1SJeff Kirsher { 21449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21459aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 21469aebddd1SJeff Kirsher int status; 21479aebddd1SJeff Kirsher 2148bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2149bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2150bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 21519fa465c0SSathya Perla status = lancer_wait_ready(adapter); 21529fa465c0SSathya Perla if (status) 2153bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2154bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2155bf99e50dSPadmanabh Ratnakar return status; 2156bf99e50dSPadmanabh Ratnakar } 2157bf99e50dSPadmanabh Ratnakar 21589aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21599aebddd1SJeff Kirsher return -1; 21609aebddd1SJeff Kirsher 21619aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21629aebddd1SJeff Kirsher req = embedded_payload(wrb); 21639aebddd1SJeff Kirsher 2164106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2165a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2166a2cc4e0bSSathya Perla NULL); 21679aebddd1SJeff Kirsher 21689aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21699aebddd1SJeff Kirsher 21709aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21719aebddd1SJeff Kirsher return status; 21729aebddd1SJeff Kirsher } 21739aebddd1SJeff Kirsher 2174594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 217533cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21769aebddd1SJeff Kirsher { 21779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21789aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21799aebddd1SJeff Kirsher int status; 21809aebddd1SJeff Kirsher 2181da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2182da1388d6SVasundhara Volam return 0; 2183da1388d6SVasundhara Volam 2184b51aa367SKalesh AP spin_lock_bh(&adapter->mcc_lock); 21859aebddd1SJeff Kirsher 2186b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2187b51aa367SKalesh AP if (!wrb) { 2188b51aa367SKalesh AP status = -EBUSY; 2189b51aa367SKalesh AP goto err; 2190b51aa367SKalesh AP } 21919aebddd1SJeff Kirsher req = embedded_payload(wrb); 21929aebddd1SJeff Kirsher 2193106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2194106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 21959aebddd1SJeff Kirsher 21969aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2197594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 21989aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2199594ad54aSSuresh Reddy 2200b51aa367SKalesh AP if (!BEx_chip(adapter)) 2201594ad54aSSuresh Reddy req->hdr.version = 1; 2202594ad54aSSuresh Reddy 22039aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2204e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 22059aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 22069aebddd1SJeff Kirsher 2207b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2208b51aa367SKalesh AP err: 2209b51aa367SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 22109aebddd1SJeff Kirsher return status; 22119aebddd1SJeff Kirsher } 22129aebddd1SJeff Kirsher 22139aebddd1SJeff Kirsher /* Uses sync mcc */ 22149aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 22159aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 22169aebddd1SJeff Kirsher { 22179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22189aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 22199aebddd1SJeff Kirsher int status; 22209aebddd1SJeff Kirsher 22219aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22229aebddd1SJeff Kirsher 22239aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22249aebddd1SJeff Kirsher if (!wrb) { 22259aebddd1SJeff Kirsher status = -EBUSY; 22269aebddd1SJeff Kirsher goto err; 22279aebddd1SJeff Kirsher } 22289aebddd1SJeff Kirsher req = embedded_payload(wrb); 22299aebddd1SJeff Kirsher 2230106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2231a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2232a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 22339aebddd1SJeff Kirsher 22349aebddd1SJeff Kirsher req->port_num = port_num; 22359aebddd1SJeff Kirsher req->beacon_state = state; 22369aebddd1SJeff Kirsher req->beacon_duration = bcn; 22379aebddd1SJeff Kirsher req->status_duration = sts; 22389aebddd1SJeff Kirsher 22399aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22409aebddd1SJeff Kirsher 22419aebddd1SJeff Kirsher err: 22429aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22439aebddd1SJeff Kirsher return status; 22449aebddd1SJeff Kirsher } 22459aebddd1SJeff Kirsher 22469aebddd1SJeff Kirsher /* Uses sync mcc */ 22479aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 22489aebddd1SJeff Kirsher { 22499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22509aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 22519aebddd1SJeff Kirsher int status; 22529aebddd1SJeff Kirsher 22539aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22549aebddd1SJeff Kirsher 22559aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22569aebddd1SJeff Kirsher if (!wrb) { 22579aebddd1SJeff Kirsher status = -EBUSY; 22589aebddd1SJeff Kirsher goto err; 22599aebddd1SJeff Kirsher } 22609aebddd1SJeff Kirsher req = embedded_payload(wrb); 22619aebddd1SJeff Kirsher 2262106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2263a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2264a2cc4e0bSSathya Perla wrb, NULL); 22659aebddd1SJeff Kirsher 22669aebddd1SJeff Kirsher req->port_num = port_num; 22679aebddd1SJeff Kirsher 22689aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22699aebddd1SJeff Kirsher if (!status) { 22709aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22719aebddd1SJeff Kirsher embedded_payload(wrb); 227203d28ffeSKalesh AP 22739aebddd1SJeff Kirsher *state = resp->beacon_state; 22749aebddd1SJeff Kirsher } 22759aebddd1SJeff Kirsher 22769aebddd1SJeff Kirsher err: 22779aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22789aebddd1SJeff Kirsher return status; 22799aebddd1SJeff Kirsher } 22809aebddd1SJeff Kirsher 2281e36edd9dSMark Leonard /* Uses sync mcc */ 2282e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2283e36edd9dSMark Leonard u8 page_num, u8 *data) 2284e36edd9dSMark Leonard { 2285e36edd9dSMark Leonard struct be_dma_mem cmd; 2286e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2287e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2288e36edd9dSMark Leonard int status; 2289e36edd9dSMark Leonard 2290e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2291e36edd9dSMark Leonard return -EINVAL; 2292e36edd9dSMark Leonard 2293e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2294e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 2295e51000dbSSriharsha Basavapatna GFP_ATOMIC); 2296e36edd9dSMark Leonard if (!cmd.va) { 2297e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2298e36edd9dSMark Leonard return -ENOMEM; 2299e36edd9dSMark Leonard } 2300e36edd9dSMark Leonard 2301e36edd9dSMark Leonard spin_lock_bh(&adapter->mcc_lock); 2302e36edd9dSMark Leonard 2303e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2304e36edd9dSMark Leonard if (!wrb) { 2305e36edd9dSMark Leonard status = -EBUSY; 2306e36edd9dSMark Leonard goto err; 2307e36edd9dSMark Leonard } 2308e36edd9dSMark Leonard req = cmd.va; 2309e36edd9dSMark Leonard 2310e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2311e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2312e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2313e36edd9dSMark Leonard 2314e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2315e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2316e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2317e36edd9dSMark Leonard if (!status) { 2318e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2319e36edd9dSMark Leonard 2320e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2321e36edd9dSMark Leonard } 2322e36edd9dSMark Leonard err: 2323e36edd9dSMark Leonard spin_unlock_bh(&adapter->mcc_lock); 2324e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2325e36edd9dSMark Leonard return status; 2326e36edd9dSMark Leonard } 2327e36edd9dSMark Leonard 2328a23113b5SSuresh Reddy static int lancer_cmd_write_object(struct be_adapter *adapter, 2329a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 data_size, 2330a23113b5SSuresh Reddy u32 data_offset, const char *obj_name, 2331a23113b5SSuresh Reddy u32 *data_written, u8 *change_status, 2332a23113b5SSuresh Reddy u8 *addn_status) 23339aebddd1SJeff Kirsher { 23349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23359aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 23369aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 23379aebddd1SJeff Kirsher void *ctxt = NULL; 23389aebddd1SJeff Kirsher int status; 23399aebddd1SJeff Kirsher 23409aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23419aebddd1SJeff Kirsher adapter->flash_status = 0; 23429aebddd1SJeff Kirsher 23439aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23449aebddd1SJeff Kirsher if (!wrb) { 23459aebddd1SJeff Kirsher status = -EBUSY; 23469aebddd1SJeff Kirsher goto err_unlock; 23479aebddd1SJeff Kirsher } 23489aebddd1SJeff Kirsher 23499aebddd1SJeff Kirsher req = embedded_payload(wrb); 23509aebddd1SJeff Kirsher 2351106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 23529aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2353106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2354106df1e3SSomnath Kotur NULL); 23559aebddd1SJeff Kirsher 23569aebddd1SJeff Kirsher ctxt = &req->context; 23579aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23589aebddd1SJeff Kirsher write_length, ctxt, data_size); 23599aebddd1SJeff Kirsher 23609aebddd1SJeff Kirsher if (data_size == 0) 23619aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23629aebddd1SJeff Kirsher eof, ctxt, 1); 23639aebddd1SJeff Kirsher else 23649aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23659aebddd1SJeff Kirsher eof, ctxt, 0); 23669aebddd1SJeff Kirsher 23679aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 23689aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2369242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23709aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23719aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23729aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23739aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23749aebddd1SJeff Kirsher & 0xFFFFFFFF); 23759aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23769aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23779aebddd1SJeff Kirsher 2378efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2379efaa408eSSuresh Reddy if (status) 2380efaa408eSSuresh Reddy goto err_unlock; 2381efaa408eSSuresh Reddy 23829aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23839aebddd1SJeff Kirsher 23845eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2385701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2386fd45160cSKalesh AP status = -ETIMEDOUT; 23879aebddd1SJeff Kirsher else 23889aebddd1SJeff Kirsher status = adapter->flash_status; 23899aebddd1SJeff Kirsher 23909aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2391f67ef7baSPadmanabh Ratnakar if (!status) { 23929aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2393f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2394f67ef7baSPadmanabh Ratnakar } else { 23959aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2396f67ef7baSPadmanabh Ratnakar } 23979aebddd1SJeff Kirsher 23989aebddd1SJeff Kirsher return status; 23999aebddd1SJeff Kirsher 24009aebddd1SJeff Kirsher err_unlock: 24019aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24029aebddd1SJeff Kirsher return status; 24039aebddd1SJeff Kirsher } 24049aebddd1SJeff Kirsher 24056809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 24066809cee0SRavikumar Nelavelli { 24076809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 24086809cee0SRavikumar Nelavelli int status; 24096809cee0SRavikumar Nelavelli 24106809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 24116809cee0SRavikumar Nelavelli page_data); 24126809cee0SRavikumar Nelavelli if (!status) { 24136809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 24146809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 24156809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24166809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 24176809cee0SRavikumar Nelavelli break; 24186809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 24196809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24206809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 24216809cee0SRavikumar Nelavelli break; 24226809cee0SRavikumar Nelavelli default: 24236809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 24246809cee0SRavikumar Nelavelli break; 24256809cee0SRavikumar Nelavelli } 24266809cee0SRavikumar Nelavelli } 24276809cee0SRavikumar Nelavelli return status; 24286809cee0SRavikumar Nelavelli } 24296809cee0SRavikumar Nelavelli 243021252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter) 243121252377SVasundhara Volam { 243221252377SVasundhara Volam u8 page_data[PAGE_DATA_LEN]; 243321252377SVasundhara Volam int status; 243421252377SVasundhara Volam 243521252377SVasundhara Volam status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 243621252377SVasundhara Volam page_data); 243721252377SVasundhara Volam if (!status) { 243821252377SVasundhara Volam strlcpy(adapter->phy.vendor_name, page_data + 243921252377SVasundhara Volam SFP_VENDOR_NAME_OFFSET, SFP_VENDOR_NAME_LEN - 1); 244021252377SVasundhara Volam strlcpy(adapter->phy.vendor_pn, 244121252377SVasundhara Volam page_data + SFP_VENDOR_PN_OFFSET, 244221252377SVasundhara Volam SFP_VENDOR_NAME_LEN - 1); 244321252377SVasundhara Volam } 244421252377SVasundhara Volam 244521252377SVasundhara Volam return status; 244621252377SVasundhara Volam } 244721252377SVasundhara Volam 2448a23113b5SSuresh Reddy static int lancer_cmd_delete_object(struct be_adapter *adapter, 2449a23113b5SSuresh Reddy const char *obj_name) 2450f0613380SKalesh AP { 2451f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2452f0613380SKalesh AP struct be_mcc_wrb *wrb; 2453f0613380SKalesh AP int status; 2454f0613380SKalesh AP 2455f0613380SKalesh AP spin_lock_bh(&adapter->mcc_lock); 2456f0613380SKalesh AP 2457f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2458f0613380SKalesh AP if (!wrb) { 2459f0613380SKalesh AP status = -EBUSY; 2460f0613380SKalesh AP goto err; 2461f0613380SKalesh AP } 2462f0613380SKalesh AP 2463f0613380SKalesh AP req = embedded_payload(wrb); 2464f0613380SKalesh AP 2465f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2466f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2467f0613380SKalesh AP sizeof(*req), wrb, NULL); 2468f0613380SKalesh AP 2469242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2470f0613380SKalesh AP 2471f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2472f0613380SKalesh AP err: 2473f0613380SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 2474f0613380SKalesh AP return status; 2475f0613380SKalesh AP } 2476f0613380SKalesh AP 2477de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2478de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2479de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2480de49bd5aSPadmanabh Ratnakar { 2481de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2482de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2483de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2484de49bd5aSPadmanabh Ratnakar int status; 2485de49bd5aSPadmanabh Ratnakar 2486de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2487de49bd5aSPadmanabh Ratnakar 2488de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2489de49bd5aSPadmanabh Ratnakar if (!wrb) { 2490de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2491de49bd5aSPadmanabh Ratnakar goto err_unlock; 2492de49bd5aSPadmanabh Ratnakar } 2493de49bd5aSPadmanabh Ratnakar 2494de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2495de49bd5aSPadmanabh Ratnakar 2496de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2497de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2498de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2499de49bd5aSPadmanabh Ratnakar NULL); 2500de49bd5aSPadmanabh Ratnakar 2501de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2502de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2503de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2504de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2505de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2506de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2507de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2508de49bd5aSPadmanabh Ratnakar 2509de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2510de49bd5aSPadmanabh Ratnakar 2511de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2512de49bd5aSPadmanabh Ratnakar if (!status) { 2513de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2514de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2515de49bd5aSPadmanabh Ratnakar } else { 2516de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2517de49bd5aSPadmanabh Ratnakar } 2518de49bd5aSPadmanabh Ratnakar 2519de49bd5aSPadmanabh Ratnakar err_unlock: 2520de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2521de49bd5aSPadmanabh Ratnakar return status; 2522de49bd5aSPadmanabh Ratnakar } 2523de49bd5aSPadmanabh Ratnakar 2524a23113b5SSuresh Reddy static int be_cmd_write_flashrom(struct be_adapter *adapter, 2525a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 flash_type, 2526a23113b5SSuresh Reddy u32 flash_opcode, u32 img_offset, u32 buf_size) 25279aebddd1SJeff Kirsher { 25289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25299aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 25309aebddd1SJeff Kirsher int status; 25319aebddd1SJeff Kirsher 25329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25339aebddd1SJeff Kirsher adapter->flash_status = 0; 25349aebddd1SJeff Kirsher 25359aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25369aebddd1SJeff Kirsher if (!wrb) { 25379aebddd1SJeff Kirsher status = -EBUSY; 25389aebddd1SJeff Kirsher goto err_unlock; 25399aebddd1SJeff Kirsher } 25409aebddd1SJeff Kirsher req = cmd->va; 25419aebddd1SJeff Kirsher 2542106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2543a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2544a2cc4e0bSSathya Perla cmd); 25459aebddd1SJeff Kirsher 25469aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 254770a7b525SVasundhara Volam if (flash_type == OPTYPE_OFFSET_SPECIFIED) 254870a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset); 254970a7b525SVasundhara Volam 25509aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 25519aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 25529aebddd1SJeff Kirsher 2553efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2554efaa408eSSuresh Reddy if (status) 2555efaa408eSSuresh Reddy goto err_unlock; 2556efaa408eSSuresh Reddy 25579aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25589aebddd1SJeff Kirsher 25595eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2560e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2561fd45160cSKalesh AP status = -ETIMEDOUT; 25629aebddd1SJeff Kirsher else 25639aebddd1SJeff Kirsher status = adapter->flash_status; 25649aebddd1SJeff Kirsher 25659aebddd1SJeff Kirsher return status; 25669aebddd1SJeff Kirsher 25679aebddd1SJeff Kirsher err_unlock: 25689aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25699aebddd1SJeff Kirsher return status; 25709aebddd1SJeff Kirsher } 25719aebddd1SJeff Kirsher 2572a23113b5SSuresh Reddy static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 257370a7b525SVasundhara Volam u16 img_optype, u32 img_offset, u32 crc_offset) 25749aebddd1SJeff Kirsher { 2575be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 257670a7b525SVasundhara Volam struct be_mcc_wrb *wrb; 25779aebddd1SJeff Kirsher int status; 25789aebddd1SJeff Kirsher 25799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25809aebddd1SJeff Kirsher 25819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25829aebddd1SJeff Kirsher if (!wrb) { 25839aebddd1SJeff Kirsher status = -EBUSY; 25849aebddd1SJeff Kirsher goto err; 25859aebddd1SJeff Kirsher } 25869aebddd1SJeff Kirsher req = embedded_payload(wrb); 25879aebddd1SJeff Kirsher 2588106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2589be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2590be716446SPadmanabh Ratnakar wrb, NULL); 25919aebddd1SJeff Kirsher 259270a7b525SVasundhara Volam req->params.op_type = cpu_to_le32(img_optype); 259370a7b525SVasundhara Volam if (img_optype == OPTYPE_OFFSET_SPECIFIED) 259470a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset + crc_offset); 259570a7b525SVasundhara Volam else 259670a7b525SVasundhara Volam req->params.offset = cpu_to_le32(crc_offset); 259770a7b525SVasundhara Volam 25989aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 25999aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 26009aebddd1SJeff Kirsher 26019aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26029aebddd1SJeff Kirsher if (!status) 2603be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 26049aebddd1SJeff Kirsher 26059aebddd1SJeff Kirsher err: 26069aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26079aebddd1SJeff Kirsher return status; 26089aebddd1SJeff Kirsher } 26099aebddd1SJeff Kirsher 2610a23113b5SSuresh Reddy static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; 2611a23113b5SSuresh Reddy 2612a23113b5SSuresh Reddy static bool phy_flashing_required(struct be_adapter *adapter) 2613a23113b5SSuresh Reddy { 2614a23113b5SSuresh Reddy return (adapter->phy.phy_type == PHY_TYPE_TN_8022 && 2615a23113b5SSuresh Reddy adapter->phy.interface_type == PHY_TYPE_BASET_10GB); 2616a23113b5SSuresh Reddy } 2617a23113b5SSuresh Reddy 2618a23113b5SSuresh Reddy static bool is_comp_in_ufi(struct be_adapter *adapter, 2619a23113b5SSuresh Reddy struct flash_section_info *fsec, int type) 2620a23113b5SSuresh Reddy { 2621a23113b5SSuresh Reddy int i = 0, img_type = 0; 2622a23113b5SSuresh Reddy struct flash_section_info_g2 *fsec_g2 = NULL; 2623a23113b5SSuresh Reddy 2624a23113b5SSuresh Reddy if (BE2_chip(adapter)) 2625a23113b5SSuresh Reddy fsec_g2 = (struct flash_section_info_g2 *)fsec; 2626a23113b5SSuresh Reddy 2627a23113b5SSuresh Reddy for (i = 0; i < MAX_FLASH_COMP; i++) { 2628a23113b5SSuresh Reddy if (fsec_g2) 2629a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); 2630a23113b5SSuresh Reddy else 2631a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2632a23113b5SSuresh Reddy 2633a23113b5SSuresh Reddy if (img_type == type) 2634a23113b5SSuresh Reddy return true; 2635a23113b5SSuresh Reddy } 2636a23113b5SSuresh Reddy return false; 2637a23113b5SSuresh Reddy } 2638a23113b5SSuresh Reddy 2639a23113b5SSuresh Reddy static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, 2640a23113b5SSuresh Reddy int header_size, 2641a23113b5SSuresh Reddy const struct firmware *fw) 2642a23113b5SSuresh Reddy { 2643a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2644a23113b5SSuresh Reddy const u8 *p = fw->data; 2645a23113b5SSuresh Reddy 2646a23113b5SSuresh Reddy p += header_size; 2647a23113b5SSuresh Reddy while (p < (fw->data + fw->size)) { 2648a23113b5SSuresh Reddy fsec = (struct flash_section_info *)p; 2649a23113b5SSuresh Reddy if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) 2650a23113b5SSuresh Reddy return fsec; 2651a23113b5SSuresh Reddy p += 32; 2652a23113b5SSuresh Reddy } 2653a23113b5SSuresh Reddy return NULL; 2654a23113b5SSuresh Reddy } 2655a23113b5SSuresh Reddy 2656a23113b5SSuresh Reddy static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p, 2657a23113b5SSuresh Reddy u32 img_offset, u32 img_size, int hdr_size, 2658a23113b5SSuresh Reddy u16 img_optype, bool *crc_match) 2659a23113b5SSuresh Reddy { 2660a23113b5SSuresh Reddy u32 crc_offset; 2661a23113b5SSuresh Reddy int status; 2662a23113b5SSuresh Reddy u8 crc[4]; 2663a23113b5SSuresh Reddy 2664a23113b5SSuresh Reddy status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset, 2665a23113b5SSuresh Reddy img_size - 4); 2666a23113b5SSuresh Reddy if (status) 2667a23113b5SSuresh Reddy return status; 2668a23113b5SSuresh Reddy 2669a23113b5SSuresh Reddy crc_offset = hdr_size + img_offset + img_size - 4; 2670a23113b5SSuresh Reddy 2671a23113b5SSuresh Reddy /* Skip flashing, if crc of flashed region matches */ 2672a23113b5SSuresh Reddy if (!memcmp(crc, p + crc_offset, 4)) 2673a23113b5SSuresh Reddy *crc_match = true; 2674a23113b5SSuresh Reddy else 2675a23113b5SSuresh Reddy *crc_match = false; 2676a23113b5SSuresh Reddy 2677a23113b5SSuresh Reddy return status; 2678a23113b5SSuresh Reddy } 2679a23113b5SSuresh Reddy 2680a23113b5SSuresh Reddy static int be_flash(struct be_adapter *adapter, const u8 *img, 2681a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int optype, int img_size, 2682a23113b5SSuresh Reddy u32 img_offset) 2683a23113b5SSuresh Reddy { 2684a23113b5SSuresh Reddy u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0; 2685a23113b5SSuresh Reddy struct be_cmd_write_flashrom *req = flash_cmd->va; 2686a23113b5SSuresh Reddy int status; 2687a23113b5SSuresh Reddy 2688a23113b5SSuresh Reddy while (total_bytes) { 2689a23113b5SSuresh Reddy num_bytes = min_t(u32, 32 * 1024, total_bytes); 2690a23113b5SSuresh Reddy 2691a23113b5SSuresh Reddy total_bytes -= num_bytes; 2692a23113b5SSuresh Reddy 2693a23113b5SSuresh Reddy if (!total_bytes) { 2694a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2695a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_FLASH; 2696a23113b5SSuresh Reddy else 2697a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_FLASH; 2698a23113b5SSuresh Reddy } else { 2699a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2700a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_SAVE; 2701a23113b5SSuresh Reddy else 2702a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_SAVE; 2703a23113b5SSuresh Reddy } 2704a23113b5SSuresh Reddy 2705a23113b5SSuresh Reddy memcpy(req->data_buf, img, num_bytes); 2706a23113b5SSuresh Reddy img += num_bytes; 2707a23113b5SSuresh Reddy status = be_cmd_write_flashrom(adapter, flash_cmd, optype, 2708a23113b5SSuresh Reddy flash_op, img_offset + 2709a23113b5SSuresh Reddy bytes_sent, num_bytes); 2710a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST && 2711a23113b5SSuresh Reddy optype == OPTYPE_PHY_FW) 2712a23113b5SSuresh Reddy break; 2713a23113b5SSuresh Reddy else if (status) 2714a23113b5SSuresh Reddy return status; 2715a23113b5SSuresh Reddy 2716a23113b5SSuresh Reddy bytes_sent += num_bytes; 2717a23113b5SSuresh Reddy } 2718a23113b5SSuresh Reddy return 0; 2719a23113b5SSuresh Reddy } 2720a23113b5SSuresh Reddy 2721a23113b5SSuresh Reddy /* For BE2, BE3 and BE3-R */ 2722a23113b5SSuresh Reddy static int be_flash_BEx(struct be_adapter *adapter, 2723a23113b5SSuresh Reddy const struct firmware *fw, 2724a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2725a23113b5SSuresh Reddy { 2726a23113b5SSuresh Reddy int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); 2727a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2728a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2729a23113b5SSuresh Reddy int status, i, filehdr_size, num_comp; 2730a23113b5SSuresh Reddy const struct flash_comp *pflashcomp; 2731a23113b5SSuresh Reddy bool crc_match; 2732a23113b5SSuresh Reddy const u8 *p; 2733a23113b5SSuresh Reddy 2734a23113b5SSuresh Reddy struct flash_comp gen3_flash_types[] = { 2735a23113b5SSuresh Reddy { BE3_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2736a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2737a23113b5SSuresh Reddy { BE3_REDBOOT_START, OPTYPE_REDBOOT, 2738a23113b5SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2739a23113b5SSuresh Reddy { BE3_ISCSI_BIOS_START, OPTYPE_BIOS, 2740a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2741a23113b5SSuresh Reddy { BE3_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2742a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2743a23113b5SSuresh Reddy { BE3_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2744a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2745a23113b5SSuresh Reddy { BE3_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2746a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2747a23113b5SSuresh Reddy { BE3_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2748a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2749a23113b5SSuresh Reddy { BE3_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2750a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE}, 2751a23113b5SSuresh Reddy { BE3_NCSI_START, OPTYPE_NCSI_FW, 2752a23113b5SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE, IMAGE_NCSI}, 2753a23113b5SSuresh Reddy { BE3_PHY_FW_START, OPTYPE_PHY_FW, 2754a23113b5SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE, IMAGE_FIRMWARE_PHY} 2755a23113b5SSuresh Reddy }; 2756a23113b5SSuresh Reddy 2757a23113b5SSuresh Reddy struct flash_comp gen2_flash_types[] = { 2758a23113b5SSuresh Reddy { BE2_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2759a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2760a23113b5SSuresh Reddy { BE2_REDBOOT_START, OPTYPE_REDBOOT, 2761a23113b5SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2762a23113b5SSuresh Reddy { BE2_ISCSI_BIOS_START, OPTYPE_BIOS, 2763a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2764a23113b5SSuresh Reddy { BE2_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2765a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2766a23113b5SSuresh Reddy { BE2_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2767a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2768a23113b5SSuresh Reddy { BE2_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2769a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2770a23113b5SSuresh Reddy { BE2_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2771a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2772a23113b5SSuresh Reddy { BE2_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2773a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE} 2774a23113b5SSuresh Reddy }; 2775a23113b5SSuresh Reddy 2776a23113b5SSuresh Reddy if (BE3_chip(adapter)) { 2777a23113b5SSuresh Reddy pflashcomp = gen3_flash_types; 2778a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2779a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen3_flash_types); 2780a23113b5SSuresh Reddy } else { 2781a23113b5SSuresh Reddy pflashcomp = gen2_flash_types; 2782a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g2); 2783a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen2_flash_types); 2784a23113b5SSuresh Reddy img_hdrs_size = 0; 2785a23113b5SSuresh Reddy } 2786a23113b5SSuresh Reddy 2787a23113b5SSuresh Reddy /* Get flash section info*/ 2788a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2789a23113b5SSuresh Reddy if (!fsec) { 2790a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2791a23113b5SSuresh Reddy return -1; 2792a23113b5SSuresh Reddy } 2793a23113b5SSuresh Reddy for (i = 0; i < num_comp; i++) { 2794a23113b5SSuresh Reddy if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) 2795a23113b5SSuresh Reddy continue; 2796a23113b5SSuresh Reddy 2797a23113b5SSuresh Reddy if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && 2798a23113b5SSuresh Reddy memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0) 2799a23113b5SSuresh Reddy continue; 2800a23113b5SSuresh Reddy 2801a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_PHY_FW && 2802a23113b5SSuresh Reddy !phy_flashing_required(adapter)) 2803a23113b5SSuresh Reddy continue; 2804a23113b5SSuresh Reddy 2805a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_REDBOOT) { 2806a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, 2807a23113b5SSuresh Reddy pflashcomp[i].offset, 2808a23113b5SSuresh Reddy pflashcomp[i].size, 2809a23113b5SSuresh Reddy filehdr_size + 2810a23113b5SSuresh Reddy img_hdrs_size, 2811a23113b5SSuresh Reddy OPTYPE_REDBOOT, &crc_match); 2812a23113b5SSuresh Reddy if (status) { 2813a23113b5SSuresh Reddy dev_err(dev, 2814a23113b5SSuresh Reddy "Could not get CRC for 0x%x region\n", 2815a23113b5SSuresh Reddy pflashcomp[i].optype); 2816a23113b5SSuresh Reddy continue; 2817a23113b5SSuresh Reddy } 2818a23113b5SSuresh Reddy 2819a23113b5SSuresh Reddy if (crc_match) 2820a23113b5SSuresh Reddy continue; 2821a23113b5SSuresh Reddy } 2822a23113b5SSuresh Reddy 2823a23113b5SSuresh Reddy p = fw->data + filehdr_size + pflashcomp[i].offset + 2824a23113b5SSuresh Reddy img_hdrs_size; 2825a23113b5SSuresh Reddy if (p + pflashcomp[i].size > fw->data + fw->size) 2826a23113b5SSuresh Reddy return -1; 2827a23113b5SSuresh Reddy 2828a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, 2829a23113b5SSuresh Reddy pflashcomp[i].size, 0); 2830a23113b5SSuresh Reddy if (status) { 2831a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2832a23113b5SSuresh Reddy pflashcomp[i].img_type); 2833a23113b5SSuresh Reddy return status; 2834a23113b5SSuresh Reddy } 2835a23113b5SSuresh Reddy } 2836a23113b5SSuresh Reddy return 0; 2837a23113b5SSuresh Reddy } 2838a23113b5SSuresh Reddy 2839a23113b5SSuresh Reddy static u16 be_get_img_optype(struct flash_section_entry fsec_entry) 2840a23113b5SSuresh Reddy { 2841a23113b5SSuresh Reddy u32 img_type = le32_to_cpu(fsec_entry.type); 2842a23113b5SSuresh Reddy u16 img_optype = le16_to_cpu(fsec_entry.optype); 2843a23113b5SSuresh Reddy 2844a23113b5SSuresh Reddy if (img_optype != 0xFFFF) 2845a23113b5SSuresh Reddy return img_optype; 2846a23113b5SSuresh Reddy 2847a23113b5SSuresh Reddy switch (img_type) { 2848a23113b5SSuresh Reddy case IMAGE_FIRMWARE_ISCSI: 2849a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_ACTIVE; 2850a23113b5SSuresh Reddy break; 2851a23113b5SSuresh Reddy case IMAGE_BOOT_CODE: 2852a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT; 2853a23113b5SSuresh Reddy break; 2854a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_ISCSI: 2855a23113b5SSuresh Reddy img_optype = OPTYPE_BIOS; 2856a23113b5SSuresh Reddy break; 2857a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_PXE: 2858a23113b5SSuresh Reddy img_optype = OPTYPE_PXE_BIOS; 2859a23113b5SSuresh Reddy break; 2860a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_FCOE: 2861a23113b5SSuresh Reddy img_optype = OPTYPE_FCOE_BIOS; 2862a23113b5SSuresh Reddy break; 2863a23113b5SSuresh Reddy case IMAGE_FIRMWARE_BACKUP_ISCSI: 2864a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_BACKUP; 2865a23113b5SSuresh Reddy break; 2866a23113b5SSuresh Reddy case IMAGE_NCSI: 2867a23113b5SSuresh Reddy img_optype = OPTYPE_NCSI_FW; 2868a23113b5SSuresh Reddy break; 2869a23113b5SSuresh Reddy case IMAGE_FLASHISM_JUMPVECTOR: 2870a23113b5SSuresh Reddy img_optype = OPTYPE_FLASHISM_JUMPVECTOR; 2871a23113b5SSuresh Reddy break; 2872a23113b5SSuresh Reddy case IMAGE_FIRMWARE_PHY: 2873a23113b5SSuresh Reddy img_optype = OPTYPE_SH_PHY_FW; 2874a23113b5SSuresh Reddy break; 2875a23113b5SSuresh Reddy case IMAGE_REDBOOT_DIR: 2876a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_DIR; 2877a23113b5SSuresh Reddy break; 2878a23113b5SSuresh Reddy case IMAGE_REDBOOT_CONFIG: 2879a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_CONFIG; 2880a23113b5SSuresh Reddy break; 2881a23113b5SSuresh Reddy case IMAGE_UFI_DIR: 2882a23113b5SSuresh Reddy img_optype = OPTYPE_UFI_DIR; 2883a23113b5SSuresh Reddy break; 2884a23113b5SSuresh Reddy default: 2885a23113b5SSuresh Reddy break; 2886a23113b5SSuresh Reddy } 2887a23113b5SSuresh Reddy 2888a23113b5SSuresh Reddy return img_optype; 2889a23113b5SSuresh Reddy } 2890a23113b5SSuresh Reddy 2891a23113b5SSuresh Reddy static int be_flash_skyhawk(struct be_adapter *adapter, 2892a23113b5SSuresh Reddy const struct firmware *fw, 2893a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2894a23113b5SSuresh Reddy { 2895a23113b5SSuresh Reddy int img_hdrs_size = num_of_images * sizeof(struct image_hdr); 2896a23113b5SSuresh Reddy bool crc_match, old_fw_img, flash_offset_support = true; 2897a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2898a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2899a23113b5SSuresh Reddy u32 img_offset, img_size, img_type; 2900a23113b5SSuresh Reddy u16 img_optype, flash_optype; 2901a23113b5SSuresh Reddy int status, i, filehdr_size; 2902a23113b5SSuresh Reddy const u8 *p; 2903a23113b5SSuresh Reddy 2904a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2905a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2906a23113b5SSuresh Reddy if (!fsec) { 2907a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2908a23113b5SSuresh Reddy return -EINVAL; 2909a23113b5SSuresh Reddy } 2910a23113b5SSuresh Reddy 2911a23113b5SSuresh Reddy retry_flash: 2912a23113b5SSuresh Reddy for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { 2913a23113b5SSuresh Reddy img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); 2914a23113b5SSuresh Reddy img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); 2915a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2916a23113b5SSuresh Reddy img_optype = be_get_img_optype(fsec->fsec_entry[i]); 2917a23113b5SSuresh Reddy old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF; 2918a23113b5SSuresh Reddy 2919a23113b5SSuresh Reddy if (img_optype == 0xFFFF) 2920a23113b5SSuresh Reddy continue; 2921a23113b5SSuresh Reddy 2922a23113b5SSuresh Reddy if (flash_offset_support) 2923a23113b5SSuresh Reddy flash_optype = OPTYPE_OFFSET_SPECIFIED; 2924a23113b5SSuresh Reddy else 2925a23113b5SSuresh Reddy flash_optype = img_optype; 2926a23113b5SSuresh Reddy 2927a23113b5SSuresh Reddy /* Don't bother verifying CRC if an old FW image is being 2928a23113b5SSuresh Reddy * flashed 2929a23113b5SSuresh Reddy */ 2930a23113b5SSuresh Reddy if (old_fw_img) 2931a23113b5SSuresh Reddy goto flash; 2932a23113b5SSuresh Reddy 2933a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, img_offset, 2934a23113b5SSuresh Reddy img_size, filehdr_size + 2935a23113b5SSuresh Reddy img_hdrs_size, flash_optype, 2936a23113b5SSuresh Reddy &crc_match); 2937a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 2938a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_ILLEGAL_FIELD) { 2939a23113b5SSuresh Reddy /* The current FW image on the card does not support 2940a23113b5SSuresh Reddy * OFFSET based flashing. Retry using older mechanism 2941a23113b5SSuresh Reddy * of OPTYPE based flashing 2942a23113b5SSuresh Reddy */ 2943a23113b5SSuresh Reddy if (flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2944a23113b5SSuresh Reddy flash_offset_support = false; 2945a23113b5SSuresh Reddy goto retry_flash; 2946a23113b5SSuresh Reddy } 2947a23113b5SSuresh Reddy 2948a23113b5SSuresh Reddy /* The current FW image on the card does not recognize 2949a23113b5SSuresh Reddy * the new FLASH op_type. The FW download is partially 2950a23113b5SSuresh Reddy * complete. Reboot the server now to enable FW image 2951a23113b5SSuresh Reddy * to recognize the new FLASH op_type. To complete the 2952a23113b5SSuresh Reddy * remaining process, download the same FW again after 2953a23113b5SSuresh Reddy * the reboot. 2954a23113b5SSuresh Reddy */ 2955a23113b5SSuresh Reddy dev_err(dev, "Flash incomplete. Reset the server\n"); 2956a23113b5SSuresh Reddy dev_err(dev, "Download FW image again after reset\n"); 2957a23113b5SSuresh Reddy return -EAGAIN; 2958a23113b5SSuresh Reddy } else if (status) { 2959a23113b5SSuresh Reddy dev_err(dev, "Could not get CRC for 0x%x region\n", 2960a23113b5SSuresh Reddy img_optype); 2961a23113b5SSuresh Reddy return -EFAULT; 2962a23113b5SSuresh Reddy } 2963a23113b5SSuresh Reddy 2964a23113b5SSuresh Reddy if (crc_match) 2965a23113b5SSuresh Reddy continue; 2966a23113b5SSuresh Reddy 2967a23113b5SSuresh Reddy flash: 2968a23113b5SSuresh Reddy p = fw->data + filehdr_size + img_offset + img_hdrs_size; 2969a23113b5SSuresh Reddy if (p + img_size > fw->data + fw->size) 2970a23113b5SSuresh Reddy return -1; 2971a23113b5SSuresh Reddy 2972a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, flash_optype, img_size, 2973a23113b5SSuresh Reddy img_offset); 2974a23113b5SSuresh Reddy 2975a23113b5SSuresh Reddy /* The current FW image on the card does not support OFFSET 2976a23113b5SSuresh Reddy * based flashing. Retry using older mechanism of OPTYPE based 2977a23113b5SSuresh Reddy * flashing 2978a23113b5SSuresh Reddy */ 2979a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD && 2980a23113b5SSuresh Reddy flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2981a23113b5SSuresh Reddy flash_offset_support = false; 2982a23113b5SSuresh Reddy goto retry_flash; 2983a23113b5SSuresh Reddy } 2984a23113b5SSuresh Reddy 2985a23113b5SSuresh Reddy /* For old FW images ignore ILLEGAL_FIELD error or errors on 2986a23113b5SSuresh Reddy * UFI_DIR region 2987a23113b5SSuresh Reddy */ 2988a23113b5SSuresh Reddy if (old_fw_img && 2989a23113b5SSuresh Reddy (base_status(status) == MCC_STATUS_ILLEGAL_FIELD || 2990a23113b5SSuresh Reddy (img_optype == OPTYPE_UFI_DIR && 2991a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_FAILED))) { 2992a23113b5SSuresh Reddy continue; 2993a23113b5SSuresh Reddy } else if (status) { 2994a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2995a23113b5SSuresh Reddy img_type); 29966b525782SSuresh Reddy 29976b525782SSuresh Reddy switch (addl_status(status)) { 29986b525782SSuresh Reddy case MCC_ADDL_STATUS_MISSING_SIGNATURE: 29996b525782SSuresh Reddy dev_err(dev, 30006b525782SSuresh Reddy "Digital signature missing in FW\n"); 30016b525782SSuresh Reddy return -EINVAL; 30026b525782SSuresh Reddy case MCC_ADDL_STATUS_INVALID_SIGNATURE: 30036b525782SSuresh Reddy dev_err(dev, 30046b525782SSuresh Reddy "Invalid digital signature in FW\n"); 30056b525782SSuresh Reddy return -EINVAL; 30066b525782SSuresh Reddy default: 3007a23113b5SSuresh Reddy return -EFAULT; 3008a23113b5SSuresh Reddy } 3009a23113b5SSuresh Reddy } 30106b525782SSuresh Reddy } 3011a23113b5SSuresh Reddy return 0; 3012a23113b5SSuresh Reddy } 3013a23113b5SSuresh Reddy 3014a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, 3015a23113b5SSuresh Reddy const struct firmware *fw) 3016a23113b5SSuresh Reddy { 3017a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3018a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3019a23113b5SSuresh Reddy const u8 *data_ptr = NULL; 3020a23113b5SSuresh Reddy u8 *dest_image_ptr = NULL; 3021a23113b5SSuresh Reddy size_t image_size = 0; 3022a23113b5SSuresh Reddy u32 chunk_size = 0; 3023a23113b5SSuresh Reddy u32 data_written = 0; 3024a23113b5SSuresh Reddy u32 offset = 0; 3025a23113b5SSuresh Reddy int status = 0; 3026a23113b5SSuresh Reddy u8 add_status = 0; 3027a23113b5SSuresh Reddy u8 change_status; 3028a23113b5SSuresh Reddy 3029a23113b5SSuresh Reddy if (!IS_ALIGNED(fw->size, sizeof(u32))) { 3030a23113b5SSuresh Reddy dev_err(dev, "FW image size should be multiple of 4\n"); 3031a23113b5SSuresh Reddy return -EINVAL; 3032a23113b5SSuresh Reddy } 3033a23113b5SSuresh Reddy 3034a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) 3035a23113b5SSuresh Reddy + LANCER_FW_DOWNLOAD_CHUNK; 3036a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, 3037a23113b5SSuresh Reddy &flash_cmd.dma, GFP_KERNEL); 3038a23113b5SSuresh Reddy if (!flash_cmd.va) 3039a23113b5SSuresh Reddy return -ENOMEM; 3040a23113b5SSuresh Reddy 3041a23113b5SSuresh Reddy dest_image_ptr = flash_cmd.va + 3042a23113b5SSuresh Reddy sizeof(struct lancer_cmd_req_write_object); 3043a23113b5SSuresh Reddy image_size = fw->size; 3044a23113b5SSuresh Reddy data_ptr = fw->data; 3045a23113b5SSuresh Reddy 3046a23113b5SSuresh Reddy while (image_size) { 3047a23113b5SSuresh Reddy chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); 3048a23113b5SSuresh Reddy 3049a23113b5SSuresh Reddy /* Copy the image chunk content. */ 3050a23113b5SSuresh Reddy memcpy(dest_image_ptr, data_ptr, chunk_size); 3051a23113b5SSuresh Reddy 3052a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3053a23113b5SSuresh Reddy chunk_size, offset, 3054a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3055a23113b5SSuresh Reddy &data_written, &change_status, 3056a23113b5SSuresh Reddy &add_status); 3057a23113b5SSuresh Reddy if (status) 3058a23113b5SSuresh Reddy break; 3059a23113b5SSuresh Reddy 3060a23113b5SSuresh Reddy offset += data_written; 3061a23113b5SSuresh Reddy data_ptr += data_written; 3062a23113b5SSuresh Reddy image_size -= data_written; 3063a23113b5SSuresh Reddy } 3064a23113b5SSuresh Reddy 3065a23113b5SSuresh Reddy if (!status) { 3066a23113b5SSuresh Reddy /* Commit the FW written */ 3067a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3068a23113b5SSuresh Reddy 0, offset, 3069a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3070a23113b5SSuresh Reddy &data_written, &change_status, 3071a23113b5SSuresh Reddy &add_status); 3072a23113b5SSuresh Reddy } 3073a23113b5SSuresh Reddy 3074a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3075a23113b5SSuresh Reddy if (status) { 3076a23113b5SSuresh Reddy dev_err(dev, "Firmware load error\n"); 3077a23113b5SSuresh Reddy return be_cmd_status(status); 3078a23113b5SSuresh Reddy } 3079a23113b5SSuresh Reddy 3080a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3081a23113b5SSuresh Reddy 3082a23113b5SSuresh Reddy if (change_status == LANCER_FW_RESET_NEEDED) { 3083a23113b5SSuresh Reddy dev_info(dev, "Resetting adapter to activate new FW\n"); 3084a23113b5SSuresh Reddy status = lancer_physdev_ctrl(adapter, 3085a23113b5SSuresh Reddy PHYSDEV_CONTROL_FW_RESET_MASK); 3086a23113b5SSuresh Reddy if (status) { 3087a23113b5SSuresh Reddy dev_err(dev, "Adapter busy, could not reset FW\n"); 3088a23113b5SSuresh Reddy dev_err(dev, "Reboot server to activate new FW\n"); 3089a23113b5SSuresh Reddy } 3090a23113b5SSuresh Reddy } else if (change_status != LANCER_NO_RESET_NEEDED) { 3091a23113b5SSuresh Reddy dev_info(dev, "Reboot server to activate new FW\n"); 3092a23113b5SSuresh Reddy } 3093a23113b5SSuresh Reddy 3094a23113b5SSuresh Reddy return 0; 3095a23113b5SSuresh Reddy } 3096a23113b5SSuresh Reddy 3097a23113b5SSuresh Reddy /* Check if the flash image file is compatible with the adapter that 3098a23113b5SSuresh Reddy * is being flashed. 3099a23113b5SSuresh Reddy */ 3100a23113b5SSuresh Reddy static bool be_check_ufi_compatibility(struct be_adapter *adapter, 3101a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr) 3102a23113b5SSuresh Reddy { 3103a23113b5SSuresh Reddy if (!fhdr) { 3104a23113b5SSuresh Reddy dev_err(&adapter->pdev->dev, "Invalid FW UFI file"); 3105a23113b5SSuresh Reddy return false; 3106a23113b5SSuresh Reddy } 3107a23113b5SSuresh Reddy 3108a23113b5SSuresh Reddy /* First letter of the build version is used to identify 3109a23113b5SSuresh Reddy * which chip this image file is meant for. 3110a23113b5SSuresh Reddy */ 3111a23113b5SSuresh Reddy switch (fhdr->build[0]) { 3112a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_SH: 3113a23113b5SSuresh Reddy if (!skyhawk_chip(adapter)) 3114a23113b5SSuresh Reddy return false; 3115a23113b5SSuresh Reddy break; 3116a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE3: 3117a23113b5SSuresh Reddy if (!BE3_chip(adapter)) 3118a23113b5SSuresh Reddy return false; 3119a23113b5SSuresh Reddy break; 3120a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE2: 3121a23113b5SSuresh Reddy if (!BE2_chip(adapter)) 3122a23113b5SSuresh Reddy return false; 3123a23113b5SSuresh Reddy break; 3124a23113b5SSuresh Reddy default: 3125a23113b5SSuresh Reddy return false; 3126a23113b5SSuresh Reddy } 3127a23113b5SSuresh Reddy 3128a23113b5SSuresh Reddy /* In BE3 FW images the "asic_type_rev" field doesn't track the 3129a23113b5SSuresh Reddy * asic_rev of the chips it is compatible with. 3130a23113b5SSuresh Reddy * When asic_type_rev is 0 the image is compatible only with 3131a23113b5SSuresh Reddy * pre-BE3-R chips (asic_rev < 0x10) 3132a23113b5SSuresh Reddy */ 3133a23113b5SSuresh Reddy if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) 3134a23113b5SSuresh Reddy return adapter->asic_rev < 0x10; 3135a23113b5SSuresh Reddy else 3136a23113b5SSuresh Reddy return (fhdr->asic_type_rev >= adapter->asic_rev); 3137a23113b5SSuresh Reddy } 3138a23113b5SSuresh Reddy 3139a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw) 3140a23113b5SSuresh Reddy { 3141a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3142a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr3; 3143a23113b5SSuresh Reddy struct image_hdr *img_hdr_ptr; 3144a23113b5SSuresh Reddy int status = 0, i, num_imgs; 3145a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3146a23113b5SSuresh Reddy 3147a23113b5SSuresh Reddy fhdr3 = (struct flash_file_hdr_g3 *)fw->data; 3148a23113b5SSuresh Reddy if (!be_check_ufi_compatibility(adapter, fhdr3)) { 3149a23113b5SSuresh Reddy dev_err(dev, "Flash image is not compatible with adapter\n"); 3150a23113b5SSuresh Reddy return -EINVAL; 3151a23113b5SSuresh Reddy } 3152a23113b5SSuresh Reddy 3153a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct be_cmd_write_flashrom); 3154a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3155a23113b5SSuresh Reddy GFP_KERNEL); 3156a23113b5SSuresh Reddy if (!flash_cmd.va) 3157a23113b5SSuresh Reddy return -ENOMEM; 3158a23113b5SSuresh Reddy 3159a23113b5SSuresh Reddy num_imgs = le32_to_cpu(fhdr3->num_imgs); 3160a23113b5SSuresh Reddy for (i = 0; i < num_imgs; i++) { 3161a23113b5SSuresh Reddy img_hdr_ptr = (struct image_hdr *)(fw->data + 3162a23113b5SSuresh Reddy (sizeof(struct flash_file_hdr_g3) + 3163a23113b5SSuresh Reddy i * sizeof(struct image_hdr))); 3164a23113b5SSuresh Reddy if (!BE2_chip(adapter) && 3165a23113b5SSuresh Reddy le32_to_cpu(img_hdr_ptr->imageid) != 1) 3166a23113b5SSuresh Reddy continue; 3167a23113b5SSuresh Reddy 3168a23113b5SSuresh Reddy if (skyhawk_chip(adapter)) 3169a23113b5SSuresh Reddy status = be_flash_skyhawk(adapter, fw, &flash_cmd, 3170a23113b5SSuresh Reddy num_imgs); 3171a23113b5SSuresh Reddy else 3172a23113b5SSuresh Reddy status = be_flash_BEx(adapter, fw, &flash_cmd, 3173a23113b5SSuresh Reddy num_imgs); 3174a23113b5SSuresh Reddy } 3175a23113b5SSuresh Reddy 3176a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3177a23113b5SSuresh Reddy if (!status) 3178a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3179a23113b5SSuresh Reddy 3180a23113b5SSuresh Reddy return status; 3181a23113b5SSuresh Reddy } 3182a23113b5SSuresh Reddy 31839aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 31849aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 31859aebddd1SJeff Kirsher { 31869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 31879aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 31889aebddd1SJeff Kirsher int status; 31899aebddd1SJeff Kirsher 31909aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 31919aebddd1SJeff Kirsher 31929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 31939aebddd1SJeff Kirsher if (!wrb) { 31949aebddd1SJeff Kirsher status = -EBUSY; 31959aebddd1SJeff Kirsher goto err; 31969aebddd1SJeff Kirsher } 31979aebddd1SJeff Kirsher req = nonemb_cmd->va; 31989aebddd1SJeff Kirsher 3199106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 3200a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 3201a2cc4e0bSSathya Perla wrb, nonemb_cmd); 32029aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 32039aebddd1SJeff Kirsher 32049aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 32059aebddd1SJeff Kirsher 32069aebddd1SJeff Kirsher err: 32079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 32089aebddd1SJeff Kirsher return status; 32099aebddd1SJeff Kirsher } 32109aebddd1SJeff Kirsher 32119aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 32129aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 32139aebddd1SJeff Kirsher { 32149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32159aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 32169aebddd1SJeff Kirsher int status; 32179aebddd1SJeff Kirsher 32182e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 32192e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32202e365b1bSSomnath Kotur return -EPERM; 32212e365b1bSSomnath Kotur 32229aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 32239aebddd1SJeff Kirsher 32249aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32259aebddd1SJeff Kirsher if (!wrb) { 32269aebddd1SJeff Kirsher status = -EBUSY; 32279c855975SSuresh Reddy goto err_unlock; 32289aebddd1SJeff Kirsher } 32299aebddd1SJeff Kirsher 32309aebddd1SJeff Kirsher req = embedded_payload(wrb); 32319aebddd1SJeff Kirsher 3232106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3233a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 3234a2cc4e0bSSathya Perla wrb, NULL); 32359aebddd1SJeff Kirsher 32369aebddd1SJeff Kirsher req->src_port = port_num; 32379aebddd1SJeff Kirsher req->dest_port = port_num; 32389aebddd1SJeff Kirsher req->loopback_type = loopback_type; 32399aebddd1SJeff Kirsher req->loopback_state = enable; 32409aebddd1SJeff Kirsher 32419c855975SSuresh Reddy status = be_mcc_notify(adapter); 32429c855975SSuresh Reddy if (status) 32439c855975SSuresh Reddy goto err_unlock; 32449c855975SSuresh Reddy 32459c855975SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 32469c855975SSuresh Reddy 32479c855975SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 32489c855975SSuresh Reddy msecs_to_jiffies(SET_LB_MODE_TIMEOUT))) 32499c855975SSuresh Reddy status = -ETIMEDOUT; 32509c855975SSuresh Reddy 32519c855975SSuresh Reddy return status; 32529c855975SSuresh Reddy 32539c855975SSuresh Reddy err_unlock: 32549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 32559aebddd1SJeff Kirsher return status; 32569aebddd1SJeff Kirsher } 32579aebddd1SJeff Kirsher 32589aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 3259a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 3260a2cc4e0bSSathya Perla u64 pattern) 32619aebddd1SJeff Kirsher { 32629aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32639aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 32645eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 32659aebddd1SJeff Kirsher int status; 32669aebddd1SJeff Kirsher 32672e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_LOOPBACK_TEST, 32682e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32692e365b1bSSomnath Kotur return -EPERM; 32702e365b1bSSomnath Kotur 32719aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 32729aebddd1SJeff Kirsher 32739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32749aebddd1SJeff Kirsher if (!wrb) { 32759aebddd1SJeff Kirsher status = -EBUSY; 32769aebddd1SJeff Kirsher goto err; 32779aebddd1SJeff Kirsher } 32789aebddd1SJeff Kirsher 32799aebddd1SJeff Kirsher req = embedded_payload(wrb); 32809aebddd1SJeff Kirsher 3281106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3282a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 3283a2cc4e0bSSathya Perla NULL); 32849aebddd1SJeff Kirsher 32855eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 32869aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 32879aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 32889aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 32899aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 32909aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 32919aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 32929aebddd1SJeff Kirsher 3293efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 3294efaa408eSSuresh Reddy if (status) 3295efaa408eSSuresh Reddy goto err; 32969aebddd1SJeff Kirsher 32975eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 32985eeff635SSuresh Reddy 32995eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 33005eeff635SSuresh Reddy resp = embedded_payload(wrb); 33015eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 33025eeff635SSuresh Reddy 33035eeff635SSuresh Reddy return status; 33049aebddd1SJeff Kirsher err: 33059aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 33069aebddd1SJeff Kirsher return status; 33079aebddd1SJeff Kirsher } 33089aebddd1SJeff Kirsher 33099aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 33109aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 33119aebddd1SJeff Kirsher { 33129aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33139aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 33149aebddd1SJeff Kirsher int status; 33159aebddd1SJeff Kirsher int i, j = 0; 33169aebddd1SJeff Kirsher 33172e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_HOST_DDR_DMA, 33182e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33192e365b1bSSomnath Kotur return -EPERM; 33202e365b1bSSomnath Kotur 33219aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 33229aebddd1SJeff Kirsher 33239aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33249aebddd1SJeff Kirsher if (!wrb) { 33259aebddd1SJeff Kirsher status = -EBUSY; 33269aebddd1SJeff Kirsher goto err; 33279aebddd1SJeff Kirsher } 33289aebddd1SJeff Kirsher req = cmd->va; 3329106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3330a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 3331a2cc4e0bSSathya Perla cmd); 33329aebddd1SJeff Kirsher 33339aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33349aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 33359aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 33369aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 33379aebddd1SJeff Kirsher j++; 33389aebddd1SJeff Kirsher if (j > 7) 33399aebddd1SJeff Kirsher j = 0; 33409aebddd1SJeff Kirsher } 33419aebddd1SJeff Kirsher 33429aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33439aebddd1SJeff Kirsher 33449aebddd1SJeff Kirsher if (!status) { 33459aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 334603d28ffeSKalesh AP 33479aebddd1SJeff Kirsher resp = cmd->va; 33489aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 33499aebddd1SJeff Kirsher resp->snd_err) { 33509aebddd1SJeff Kirsher status = -1; 33519aebddd1SJeff Kirsher } 33529aebddd1SJeff Kirsher } 33539aebddd1SJeff Kirsher 33549aebddd1SJeff Kirsher err: 33559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 33569aebddd1SJeff Kirsher return status; 33579aebddd1SJeff Kirsher } 33589aebddd1SJeff Kirsher 33599aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 33609aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 33619aebddd1SJeff Kirsher { 33629aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33639aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 33649aebddd1SJeff Kirsher int status; 33659aebddd1SJeff Kirsher 33669aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 33679aebddd1SJeff Kirsher 33689aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33699aebddd1SJeff Kirsher if (!wrb) { 33709aebddd1SJeff Kirsher status = -EBUSY; 33719aebddd1SJeff Kirsher goto err; 33729aebddd1SJeff Kirsher } 33739aebddd1SJeff Kirsher req = nonemb_cmd->va; 33749aebddd1SJeff Kirsher 3375106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3376106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 3377106df1e3SSomnath Kotur nonemb_cmd); 33789aebddd1SJeff Kirsher 33799aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33809aebddd1SJeff Kirsher 33819aebddd1SJeff Kirsher err: 33829aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 33839aebddd1SJeff Kirsher return status; 33849aebddd1SJeff Kirsher } 33859aebddd1SJeff Kirsher 338642f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 33879aebddd1SJeff Kirsher { 33889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33899aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 33909aebddd1SJeff Kirsher struct be_dma_mem cmd; 33919aebddd1SJeff Kirsher int status; 33929aebddd1SJeff Kirsher 3393f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 3394f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 3395f25b119cSPadmanabh Ratnakar return -EPERM; 3396f25b119cSPadmanabh Ratnakar 33979aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 33989aebddd1SJeff Kirsher 33999aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34009aebddd1SJeff Kirsher if (!wrb) { 34019aebddd1SJeff Kirsher status = -EBUSY; 34029aebddd1SJeff Kirsher goto err; 34039aebddd1SJeff Kirsher } 34049aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 3405e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3406e51000dbSSriharsha Basavapatna GFP_ATOMIC); 34079aebddd1SJeff Kirsher if (!cmd.va) { 34089aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 34099aebddd1SJeff Kirsher status = -ENOMEM; 34109aebddd1SJeff Kirsher goto err; 34119aebddd1SJeff Kirsher } 34129aebddd1SJeff Kirsher 34139aebddd1SJeff Kirsher req = cmd.va; 34149aebddd1SJeff Kirsher 3415106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3416106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 3417106df1e3SSomnath Kotur wrb, &cmd); 34189aebddd1SJeff Kirsher 34199aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34209aebddd1SJeff Kirsher if (!status) { 34219aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 34229aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 342303d28ffeSKalesh AP 342442f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 342542f11cf2SAjit Khaparde adapter->phy.interface_type = 34269aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 342742f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 342842f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 342942f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 343042f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 343142f11cf2SAjit Khaparde adapter->phy.misc_params = 343242f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 343368cb7e47SVasundhara Volam 343468cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 343568cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 343668cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 343768cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 343868cb7e47SVasundhara Volam } 34399aebddd1SJeff Kirsher } 3440e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 34419aebddd1SJeff Kirsher err: 34429aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 34439aebddd1SJeff Kirsher return status; 34449aebddd1SJeff Kirsher } 34459aebddd1SJeff Kirsher 3446bc0ee163SLad, Prabhakar static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 34479aebddd1SJeff Kirsher { 34489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34499aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 34509aebddd1SJeff Kirsher int status; 34519aebddd1SJeff Kirsher 34529aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 34539aebddd1SJeff Kirsher 34549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34559aebddd1SJeff Kirsher if (!wrb) { 34569aebddd1SJeff Kirsher status = -EBUSY; 34579aebddd1SJeff Kirsher goto err; 34589aebddd1SJeff Kirsher } 34599aebddd1SJeff Kirsher 34609aebddd1SJeff Kirsher req = embedded_payload(wrb); 34619aebddd1SJeff Kirsher 3462106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3463106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 34649aebddd1SJeff Kirsher 34659aebddd1SJeff Kirsher req->hdr.domain = domain; 34669aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 34679aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 34689aebddd1SJeff Kirsher 34699aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34709aebddd1SJeff Kirsher 34719aebddd1SJeff Kirsher err: 34729aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 34739aebddd1SJeff Kirsher return status; 34749aebddd1SJeff Kirsher } 34759aebddd1SJeff Kirsher 34769aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 34779aebddd1SJeff Kirsher { 34789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34799aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 34809aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 3481a155a5dbSSriharsha Basavapatna int status, i; 34829aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 34839aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 34849aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 3485a155a5dbSSriharsha Basavapatna u32 *serial_num; 34869aebddd1SJeff Kirsher 3487d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3488d98ef50fSSuresh Reddy return -1; 3489d98ef50fSSuresh Reddy 34909aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 34919aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 3492e51000dbSSriharsha Basavapatna attribs_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3493e51000dbSSriharsha Basavapatna attribs_cmd.size, 3494e51000dbSSriharsha Basavapatna &attribs_cmd.dma, GFP_ATOMIC); 34959aebddd1SJeff Kirsher if (!attribs_cmd.va) { 3496a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3497d98ef50fSSuresh Reddy status = -ENOMEM; 3498d98ef50fSSuresh Reddy goto err; 34999aebddd1SJeff Kirsher } 35009aebddd1SJeff Kirsher 35019aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35029aebddd1SJeff Kirsher if (!wrb) { 35039aebddd1SJeff Kirsher status = -EBUSY; 35049aebddd1SJeff Kirsher goto err; 35059aebddd1SJeff Kirsher } 35069aebddd1SJeff Kirsher req = attribs_cmd.va; 35079aebddd1SJeff Kirsher 3508106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3509a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 3510a2cc4e0bSSathya Perla wrb, &attribs_cmd); 35119aebddd1SJeff Kirsher 35129aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35139aebddd1SJeff Kirsher if (!status) { 35149aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 35159aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 3516a155a5dbSSriharsha Basavapatna serial_num = attribs->hba_attribs.controller_serial_number; 3517a155a5dbSSriharsha Basavapatna for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) 3518a155a5dbSSriharsha Basavapatna adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & 3519a155a5dbSSriharsha Basavapatna (BIT_MASK(16) - 1); 35209aebddd1SJeff Kirsher } 35219aebddd1SJeff Kirsher 35229aebddd1SJeff Kirsher err: 35239aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 3524d98ef50fSSuresh Reddy if (attribs_cmd.va) 3525e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, attribs_cmd.size, 3526d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 35279aebddd1SJeff Kirsher return status; 35289aebddd1SJeff Kirsher } 35299aebddd1SJeff Kirsher 35309aebddd1SJeff Kirsher /* Uses mbox */ 35319aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 35329aebddd1SJeff Kirsher { 35339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35349aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 35359aebddd1SJeff Kirsher int status; 35369aebddd1SJeff Kirsher 35379aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 35389aebddd1SJeff Kirsher return -1; 35399aebddd1SJeff Kirsher 35409aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35419aebddd1SJeff Kirsher if (!wrb) { 35429aebddd1SJeff Kirsher status = -EBUSY; 35439aebddd1SJeff Kirsher goto err; 35449aebddd1SJeff Kirsher } 35459aebddd1SJeff Kirsher 35469aebddd1SJeff Kirsher req = embedded_payload(wrb); 35479aebddd1SJeff Kirsher 3548106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3549a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 3550a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 35519aebddd1SJeff Kirsher 35529aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 35539aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 35549aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 35559aebddd1SJeff Kirsher 35569aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35579aebddd1SJeff Kirsher if (!status) { 35589aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 355903d28ffeSKalesh AP 35609aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 35619aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 3562d379142bSSathya Perla if (!adapter->be3_native) 3563d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 3564d379142bSSathya Perla "adapter not in advanced mode\n"); 35659aebddd1SJeff Kirsher } 35669aebddd1SJeff Kirsher err: 35679aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 35689aebddd1SJeff Kirsher return status; 35699aebddd1SJeff Kirsher } 3570590c391dSPadmanabh Ratnakar 3571f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 3572f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 3573f25b119cSPadmanabh Ratnakar u32 domain) 3574f25b119cSPadmanabh Ratnakar { 3575f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3576f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 3577f25b119cSPadmanabh Ratnakar int status; 3578f25b119cSPadmanabh Ratnakar 3579f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3580f25b119cSPadmanabh Ratnakar 3581f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3582f25b119cSPadmanabh Ratnakar if (!wrb) { 3583f25b119cSPadmanabh Ratnakar status = -EBUSY; 3584f25b119cSPadmanabh Ratnakar goto err; 3585f25b119cSPadmanabh Ratnakar } 3586f25b119cSPadmanabh Ratnakar 3587f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 3588f25b119cSPadmanabh Ratnakar 3589f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3590f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 3591f25b119cSPadmanabh Ratnakar wrb, NULL); 3592f25b119cSPadmanabh Ratnakar 3593f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 3594f25b119cSPadmanabh Ratnakar 3595f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3596f25b119cSPadmanabh Ratnakar if (!status) { 3597f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 3598f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 359903d28ffeSKalesh AP 3600f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 360102308d74SSuresh Reddy 360202308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 360302308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 360402308d74SSuresh Reddy */ 360502308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 360602308d74SSuresh Reddy be_physfn(adapter)) 360702308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 3608f25b119cSPadmanabh Ratnakar } 3609f25b119cSPadmanabh Ratnakar 3610f25b119cSPadmanabh Ratnakar err: 3611f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3612f25b119cSPadmanabh Ratnakar return status; 3613f25b119cSPadmanabh Ratnakar } 3614f25b119cSPadmanabh Ratnakar 361504a06028SSathya Perla /* Set privilege(s) for a function */ 361604a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 361704a06028SSathya Perla u32 domain) 361804a06028SSathya Perla { 361904a06028SSathya Perla struct be_mcc_wrb *wrb; 362004a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 362104a06028SSathya Perla int status; 362204a06028SSathya Perla 362304a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 362404a06028SSathya Perla 362504a06028SSathya Perla wrb = wrb_from_mccq(adapter); 362604a06028SSathya Perla if (!wrb) { 362704a06028SSathya Perla status = -EBUSY; 362804a06028SSathya Perla goto err; 362904a06028SSathya Perla } 363004a06028SSathya Perla 363104a06028SSathya Perla req = embedded_payload(wrb); 363204a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 363304a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 363404a06028SSathya Perla wrb, NULL); 363504a06028SSathya Perla req->hdr.domain = domain; 363604a06028SSathya Perla if (lancer_chip(adapter)) 363704a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 363804a06028SSathya Perla else 363904a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 364004a06028SSathya Perla 364104a06028SSathya Perla status = be_mcc_notify_wait(adapter); 364204a06028SSathya Perla err: 364304a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 364404a06028SSathya Perla return status; 364504a06028SSathya Perla } 364604a06028SSathya Perla 36475a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 36485a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 36495a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 36505a712c13SSathya Perla */ 36511578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 3652b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 3653b188f090SSuresh Reddy u8 domain) 3654590c391dSPadmanabh Ratnakar { 3655590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3656590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 3657590c391dSPadmanabh Ratnakar int status; 3658590c391dSPadmanabh Ratnakar int mac_count; 3659e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 3660e5e1ee89SPadmanabh Ratnakar int i; 3661e5e1ee89SPadmanabh Ratnakar 3662e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 3663e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 3664e51000dbSSriharsha Basavapatna get_mac_list_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3665e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 3666e51000dbSSriharsha Basavapatna &get_mac_list_cmd.dma, 3667e51000dbSSriharsha Basavapatna GFP_ATOMIC); 3668e5e1ee89SPadmanabh Ratnakar 3669e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 3670e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 3671e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 3672e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 3673e5e1ee89SPadmanabh Ratnakar } 3674590c391dSPadmanabh Ratnakar 3675590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3676590c391dSPadmanabh Ratnakar 3677590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3678590c391dSPadmanabh Ratnakar if (!wrb) { 3679590c391dSPadmanabh Ratnakar status = -EBUSY; 3680e5e1ee89SPadmanabh Ratnakar goto out; 3681590c391dSPadmanabh Ratnakar } 3682e5e1ee89SPadmanabh Ratnakar 3683e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 3684590c391dSPadmanabh Ratnakar 3685590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3686bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 3687bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 3688590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3689e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 36905a712c13SSathya Perla if (*pmac_id_valid) { 36915a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 3692b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 36935a712c13SSathya Perla req->perm_override = 0; 36945a712c13SSathya Perla } else { 3695e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 36965a712c13SSathya Perla } 3697590c391dSPadmanabh Ratnakar 3698590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3699590c391dSPadmanabh Ratnakar if (!status) { 3700590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 3701e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 37025a712c13SSathya Perla 37035a712c13SSathya Perla if (*pmac_id_valid) { 37045a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 37055a712c13SSathya Perla ETH_ALEN); 37065a712c13SSathya Perla goto out; 37075a712c13SSathya Perla } 37085a712c13SSathya Perla 3709e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3710e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 3711dbedd44eSJoe Perches * or one or more true or pseudo permanent mac addresses. 37121578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 37131578e777SPadmanabh Ratnakar * found. 3714e5e1ee89SPadmanabh Ratnakar */ 3715590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3716e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3717e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3718e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3719e5e1ee89SPadmanabh Ratnakar 3720e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3721e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3722e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3723e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3724e5e1ee89SPadmanabh Ratnakar */ 3725e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 37265a712c13SSathya Perla *pmac_id_valid = true; 3727e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3728e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3729e5e1ee89SPadmanabh Ratnakar goto out; 3730590c391dSPadmanabh Ratnakar } 3731590c391dSPadmanabh Ratnakar } 37321578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 37335a712c13SSathya Perla *pmac_id_valid = false; 3734e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3735e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3736590c391dSPadmanabh Ratnakar } 3737590c391dSPadmanabh Ratnakar 3738e5e1ee89SPadmanabh Ratnakar out: 3739590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3740e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_mac_list_cmd.size, 3741e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3742590c391dSPadmanabh Ratnakar return status; 3743590c391dSPadmanabh Ratnakar } 3744590c391dSPadmanabh Ratnakar 3745a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3746a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 37475a712c13SSathya Perla { 3748b188f090SSuresh Reddy if (!active) 3749b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3750b188f090SSuresh Reddy if_handle, domain); 37513175d8c2SSathya Perla if (BEx_chip(adapter)) 37525a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3753b188f090SSuresh Reddy if_handle, curr_pmac_id); 37543175d8c2SSathya Perla else 37553175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 37563175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3757b188f090SSuresh Reddy &curr_pmac_id, 3758b188f090SSuresh Reddy if_handle, domain); 37595a712c13SSathya Perla } 37605a712c13SSathya Perla 376195046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 376295046b92SSathya Perla { 376395046b92SSathya Perla int status; 376495046b92SSathya Perla bool pmac_valid = false; 376595046b92SSathya Perla 3766c7bf7169SJoe Perches eth_zero_addr(mac); 376795046b92SSathya Perla 37683175d8c2SSathya Perla if (BEx_chip(adapter)) { 37693175d8c2SSathya Perla if (be_physfn(adapter)) 37703175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 37713175d8c2SSathya Perla 0); 377295046b92SSathya Perla else 377395046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 377495046b92SSathya Perla adapter->if_handle, 0); 37753175d8c2SSathya Perla } else { 37763175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3777b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 37783175d8c2SSathya Perla } 37793175d8c2SSathya Perla 378095046b92SSathya Perla return status; 378195046b92SSathya Perla } 378295046b92SSathya Perla 3783590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3784590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3785590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3786590c391dSPadmanabh Ratnakar { 3787590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3788590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3789590c391dSPadmanabh Ratnakar int status; 3790590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3791590c391dSPadmanabh Ratnakar 3792590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3793590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3794e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3795e51000dbSSriharsha Basavapatna GFP_KERNEL); 3796d0320f75SJoe Perches if (!cmd.va) 3797590c391dSPadmanabh Ratnakar return -ENOMEM; 3798590c391dSPadmanabh Ratnakar 3799590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3800590c391dSPadmanabh Ratnakar 3801590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3802590c391dSPadmanabh Ratnakar if (!wrb) { 3803590c391dSPadmanabh Ratnakar status = -EBUSY; 3804590c391dSPadmanabh Ratnakar goto err; 3805590c391dSPadmanabh Ratnakar } 3806590c391dSPadmanabh Ratnakar 3807590c391dSPadmanabh Ratnakar req = cmd.va; 3808590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3809590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3810590c391dSPadmanabh Ratnakar wrb, &cmd); 3811590c391dSPadmanabh Ratnakar 3812590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3813590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3814590c391dSPadmanabh Ratnakar if (mac_count) 3815590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3816590c391dSPadmanabh Ratnakar 3817590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3818590c391dSPadmanabh Ratnakar 3819590c391dSPadmanabh Ratnakar err: 3820a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3821590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3822590c391dSPadmanabh Ratnakar return status; 3823590c391dSPadmanabh Ratnakar } 38244762f6ceSAjit Khaparde 38253175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 38263175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 38273175d8c2SSathya Perla * current list are active. 38283175d8c2SSathya Perla */ 38293175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 38303175d8c2SSathya Perla { 38313175d8c2SSathya Perla bool active_mac = false; 38323175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 38333175d8c2SSathya Perla u32 pmac_id; 38343175d8c2SSathya Perla int status; 38353175d8c2SSathya Perla 38363175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3837b188f090SSuresh Reddy &pmac_id, if_id, dom); 3838b188f090SSuresh Reddy 38393175d8c2SSathya Perla if (!status && active_mac) 38403175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 38413175d8c2SSathya Perla 38423175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 38433175d8c2SSathya Perla } 38443175d8c2SSathya Perla 3845f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3846e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u16 hsw_mode, u8 spoofchk) 3847f1f3ee1bSAjit Khaparde { 3848f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3849f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3850f1f3ee1bSAjit Khaparde void *ctxt; 3851f1f3ee1bSAjit Khaparde int status; 3852f1f3ee1bSAjit Khaparde 3853f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3854f1f3ee1bSAjit Khaparde 3855f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3856f1f3ee1bSAjit Khaparde if (!wrb) { 3857f1f3ee1bSAjit Khaparde status = -EBUSY; 3858f1f3ee1bSAjit Khaparde goto err; 3859f1f3ee1bSAjit Khaparde } 3860f1f3ee1bSAjit Khaparde 3861f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3862f1f3ee1bSAjit Khaparde ctxt = &req->context; 3863f1f3ee1bSAjit Khaparde 3864f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3865a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3866a2cc4e0bSSathya Perla NULL); 3867f1f3ee1bSAjit Khaparde 3868f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3869f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3870f1f3ee1bSAjit Khaparde if (pvid) { 3871f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3872f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3873f1f3ee1bSAjit Khaparde } 3874a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 3875a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3876a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3877a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3878a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3879a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3880a77dcb8cSAjit Khaparde } 3881f1f3ee1bSAjit Khaparde 3882e7bcbd7bSKalesh AP /* Enable/disable both mac and vlan spoof checking */ 3883e7bcbd7bSKalesh AP if (!BEx_chip(adapter) && spoofchk) { 3884e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, mac_spoofchk, 3885e7bcbd7bSKalesh AP ctxt, spoofchk); 3886e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, vlan_spoofchk, 3887e7bcbd7bSKalesh AP ctxt, spoofchk); 3888e7bcbd7bSKalesh AP } 3889e7bcbd7bSKalesh AP 3890f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3891f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3892f1f3ee1bSAjit Khaparde 3893f1f3ee1bSAjit Khaparde err: 3894f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3895f1f3ee1bSAjit Khaparde return status; 3896f1f3ee1bSAjit Khaparde } 3897f1f3ee1bSAjit Khaparde 3898f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3899f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3900e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u8 *mode, bool *spoofchk) 3901f1f3ee1bSAjit Khaparde { 3902f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3903f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3904f1f3ee1bSAjit Khaparde void *ctxt; 3905f1f3ee1bSAjit Khaparde int status; 3906f1f3ee1bSAjit Khaparde u16 vid; 3907f1f3ee1bSAjit Khaparde 3908f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3909f1f3ee1bSAjit Khaparde 3910f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3911f1f3ee1bSAjit Khaparde if (!wrb) { 3912f1f3ee1bSAjit Khaparde status = -EBUSY; 3913f1f3ee1bSAjit Khaparde goto err; 3914f1f3ee1bSAjit Khaparde } 3915f1f3ee1bSAjit Khaparde 3916f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3917f1f3ee1bSAjit Khaparde ctxt = &req->context; 3918f1f3ee1bSAjit Khaparde 3919f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3920a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3921a2cc4e0bSSathya Perla NULL); 3922f1f3ee1bSAjit Khaparde 3923f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3924a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3925a77dcb8cSAjit Khaparde ctxt, intf_id); 3926f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3927a77dcb8cSAjit Khaparde 39282c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3929a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3930a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3931a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3932a77dcb8cSAjit Khaparde } 3933f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3934f1f3ee1bSAjit Khaparde 3935f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3936f1f3ee1bSAjit Khaparde if (!status) { 3937f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3938f1f3ee1bSAjit Khaparde embedded_payload(wrb); 393903d28ffeSKalesh AP 3940a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3941f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3942f1f3ee1bSAjit Khaparde pvid, &resp->context); 3943a77dcb8cSAjit Khaparde if (pvid) 3944f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3945a77dcb8cSAjit Khaparde if (mode) 3946a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3947a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3948e7bcbd7bSKalesh AP if (spoofchk) 3949e7bcbd7bSKalesh AP *spoofchk = 3950e7bcbd7bSKalesh AP AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3951e7bcbd7bSKalesh AP spoofchk, &resp->context); 3952f1f3ee1bSAjit Khaparde } 3953f1f3ee1bSAjit Khaparde 3954f1f3ee1bSAjit Khaparde err: 3955f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3956f1f3ee1bSAjit Khaparde return status; 3957f1f3ee1bSAjit Khaparde } 3958f1f3ee1bSAjit Khaparde 3959f7062ee5SSathya Perla static bool be_is_wol_excluded(struct be_adapter *adapter) 3960f7062ee5SSathya Perla { 3961f7062ee5SSathya Perla struct pci_dev *pdev = adapter->pdev; 3962f7062ee5SSathya Perla 396318c57c74SKalesh AP if (be_virtfn(adapter)) 3964f7062ee5SSathya Perla return true; 3965f7062ee5SSathya Perla 3966f7062ee5SSathya Perla switch (pdev->subsystem_device) { 3967f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID1: 3968f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID2: 3969f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID3: 3970f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID4: 3971f7062ee5SSathya Perla return true; 3972f7062ee5SSathya Perla default: 3973f7062ee5SSathya Perla return false; 3974f7062ee5SSathya Perla } 3975f7062ee5SSathya Perla } 3976f7062ee5SSathya Perla 39774762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 39784762f6ceSAjit Khaparde { 39794762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 39804762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 398176a9e08eSSuresh Reddy int status = 0; 39824762f6ceSAjit Khaparde struct be_dma_mem cmd; 39834762f6ceSAjit Khaparde 3984f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3985f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3986f25b119cSPadmanabh Ratnakar return -EPERM; 3987f25b119cSPadmanabh Ratnakar 398876a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 398976a9e08eSSuresh Reddy return status; 399076a9e08eSSuresh Reddy 3991d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3992d98ef50fSSuresh Reddy return -1; 3993d98ef50fSSuresh Reddy 39944762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 39954762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 3996e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3997e51000dbSSriharsha Basavapatna GFP_ATOMIC); 39984762f6ceSAjit Khaparde if (!cmd.va) { 3999a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 4000d98ef50fSSuresh Reddy status = -ENOMEM; 4001d98ef50fSSuresh Reddy goto err; 40024762f6ceSAjit Khaparde } 40034762f6ceSAjit Khaparde 40044762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 40054762f6ceSAjit Khaparde if (!wrb) { 40064762f6ceSAjit Khaparde status = -EBUSY; 40074762f6ceSAjit Khaparde goto err; 40084762f6ceSAjit Khaparde } 40094762f6ceSAjit Khaparde 40104762f6ceSAjit Khaparde req = cmd.va; 40114762f6ceSAjit Khaparde 40124762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 40134762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 401476a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 40154762f6ceSAjit Khaparde 40164762f6ceSAjit Khaparde req->hdr.version = 1; 40174762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 40184762f6ceSAjit Khaparde 40194762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 40204762f6ceSAjit Khaparde if (!status) { 40214762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 402203d28ffeSKalesh AP 40234762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 40244762f6ceSAjit Khaparde 40254762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 402676a9e08eSSuresh Reddy if (adapter->wol_cap & BE_WOL_CAP) 402776a9e08eSSuresh Reddy adapter->wol_en = true; 40284762f6ceSAjit Khaparde } 40294762f6ceSAjit Khaparde err: 40304762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 4031d98ef50fSSuresh Reddy if (cmd.va) 4032e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4033e51000dbSSriharsha Basavapatna cmd.dma); 40344762f6ceSAjit Khaparde return status; 4035941a77d5SSomnath Kotur 4036941a77d5SSomnath Kotur } 4037baaa08d1SVasundhara Volam 4038baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 4039baaa08d1SVasundhara Volam { 4040baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4041baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4042baaa08d1SVasundhara Volam int status; 4043baaa08d1SVasundhara Volam int i, j; 4044baaa08d1SVasundhara Volam 4045baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4046baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4047e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4048e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4049e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4050baaa08d1SVasundhara Volam if (!extfat_cmd.va) 4051baaa08d1SVasundhara Volam return -ENOMEM; 4052baaa08d1SVasundhara Volam 4053baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4054baaa08d1SVasundhara Volam if (status) 4055baaa08d1SVasundhara Volam goto err; 4056baaa08d1SVasundhara Volam 4057baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 4058baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 4059baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 4060baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 406103d28ffeSKalesh AP 4062baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 4063baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 4064baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 4065baaa08d1SVasundhara Volam cpu_to_le32(level); 4066baaa08d1SVasundhara Volam } 4067baaa08d1SVasundhara Volam } 4068baaa08d1SVasundhara Volam 4069baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 4070baaa08d1SVasundhara Volam err: 4071e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4072baaa08d1SVasundhara Volam extfat_cmd.dma); 4073baaa08d1SVasundhara Volam return status; 4074baaa08d1SVasundhara Volam } 4075baaa08d1SVasundhara Volam 4076baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 4077baaa08d1SVasundhara Volam { 4078baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4079baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4080baaa08d1SVasundhara Volam int status, j; 4081baaa08d1SVasundhara Volam int level = 0; 4082baaa08d1SVasundhara Volam 4083baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4084baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4085e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4086e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4087e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4088baaa08d1SVasundhara Volam 4089baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 4090baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 4091baaa08d1SVasundhara Volam __func__); 4092baaa08d1SVasundhara Volam goto err; 4093baaa08d1SVasundhara Volam } 4094baaa08d1SVasundhara Volam 4095baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4096baaa08d1SVasundhara Volam if (!status) { 4097baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 4098baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 409903d28ffeSKalesh AP 4100baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 4101baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 4102baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 4103baaa08d1SVasundhara Volam } 4104baaa08d1SVasundhara Volam } 4105e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4106baaa08d1SVasundhara Volam extfat_cmd.dma); 4107baaa08d1SVasundhara Volam err: 4108baaa08d1SVasundhara Volam return level; 4109baaa08d1SVasundhara Volam } 4110baaa08d1SVasundhara Volam 4111941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 4112941a77d5SSomnath Kotur struct be_dma_mem *cmd) 4113941a77d5SSomnath Kotur { 4114941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4115941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 4116941a77d5SSomnath Kotur int status; 4117941a77d5SSomnath Kotur 4118941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 4119941a77d5SSomnath Kotur return -1; 4120941a77d5SSomnath Kotur 4121941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 4122941a77d5SSomnath Kotur if (!wrb) { 4123941a77d5SSomnath Kotur status = -EBUSY; 4124941a77d5SSomnath Kotur goto err; 4125941a77d5SSomnath Kotur } 4126941a77d5SSomnath Kotur 4127941a77d5SSomnath Kotur req = cmd->va; 4128941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4129941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 4130941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4131941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 4132941a77d5SSomnath Kotur 4133941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 4134941a77d5SSomnath Kotur err: 4135941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 4136941a77d5SSomnath Kotur return status; 4137941a77d5SSomnath Kotur } 4138941a77d5SSomnath Kotur 4139941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 4140941a77d5SSomnath Kotur struct be_dma_mem *cmd, 4141941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 4142941a77d5SSomnath Kotur { 4143941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4144941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 4145941a77d5SSomnath Kotur int status; 4146941a77d5SSomnath Kotur 4147941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 4148941a77d5SSomnath Kotur 4149941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 4150941a77d5SSomnath Kotur if (!wrb) { 4151941a77d5SSomnath Kotur status = -EBUSY; 4152941a77d5SSomnath Kotur goto err; 4153941a77d5SSomnath Kotur } 4154941a77d5SSomnath Kotur 4155941a77d5SSomnath Kotur req = cmd->va; 4156941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 4157941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4158941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 4159941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4160941a77d5SSomnath Kotur 4161941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 4162941a77d5SSomnath Kotur err: 4163941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 4164941a77d5SSomnath Kotur return status; 41654762f6ceSAjit Khaparde } 41666a4ab669SParav Pandit 416721252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter) 4168b4e32a71SPadmanabh Ratnakar { 4169b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 417021252377SVasundhara Volam struct be_mcc_wrb *wrb; 4171b4e32a71SPadmanabh Ratnakar int status; 4172b4e32a71SPadmanabh Ratnakar 417321252377SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 417421252377SVasundhara Volam return -1; 4175b4e32a71SPadmanabh Ratnakar 417621252377SVasundhara Volam wrb = wrb_from_mbox(adapter); 4177b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 4178b4e32a71SPadmanabh Ratnakar 4179b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4180b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 4181b4e32a71SPadmanabh Ratnakar NULL); 418221252377SVasundhara Volam if (!BEx_chip(adapter)) 4183b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 4184b4e32a71SPadmanabh Ratnakar 418521252377SVasundhara Volam status = be_mbox_notify_wait(adapter); 4186b4e32a71SPadmanabh Ratnakar if (!status) { 4187b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 418803d28ffeSKalesh AP 418921252377SVasundhara Volam adapter->port_name = resp->port_name[adapter->hba_port_num]; 4190b4e32a71SPadmanabh Ratnakar } else { 419121252377SVasundhara Volam adapter->port_name = adapter->hba_port_num + '0'; 4192b4e32a71SPadmanabh Ratnakar } 419321252377SVasundhara Volam 419421252377SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4195b4e32a71SPadmanabh Ratnakar return status; 4196b4e32a71SPadmanabh Ratnakar } 4197b4e32a71SPadmanabh Ratnakar 4198980df249SSuresh Reddy /* When more than 1 NIC descriptor is present in the descriptor list, 4199980df249SSuresh Reddy * the caller must specify the pf_num to obtain the NIC descriptor 4200980df249SSuresh Reddy * corresponding to its pci function. 4201980df249SSuresh Reddy * get_vft must be true when the caller wants the VF-template desc of the 4202980df249SSuresh Reddy * PF-pool. 4203980df249SSuresh Reddy * The pf_num should be set to PF_NUM_IGNORE when the caller knows 4204980df249SSuresh Reddy * that only it's NIC descriptor is present in the descriptor list. 4205980df249SSuresh Reddy */ 420610cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 4207980df249SSuresh Reddy bool get_vft, u8 pf_num) 4208abb93951SPadmanabh Ratnakar { 4209150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 421010cccf60SVasundhara Volam struct be_nic_res_desc *nic; 4211abb93951SPadmanabh Ratnakar int i; 4212abb93951SPadmanabh Ratnakar 4213abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 4214150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 421510cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 421610cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 4217980df249SSuresh Reddy 4218980df249SSuresh Reddy if ((pf_num == PF_NUM_IGNORE || 4219980df249SSuresh Reddy nic->pf_num == pf_num) && 4220980df249SSuresh Reddy (!get_vft || nic->flags & BIT(VFT_SHIFT))) 422110cccf60SVasundhara Volam return nic; 422210cccf60SVasundhara Volam } 4223150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4224150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4225150d58c7SVasundhara Volam } 4226950e2958SWei Yang return NULL; 4227abb93951SPadmanabh Ratnakar } 4228abb93951SPadmanabh Ratnakar 4229980df249SSuresh Reddy static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count, 4230980df249SSuresh Reddy u8 pf_num) 423110cccf60SVasundhara Volam { 4232980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, true, pf_num); 423310cccf60SVasundhara Volam } 423410cccf60SVasundhara Volam 4235980df249SSuresh Reddy static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count, 4236980df249SSuresh Reddy u8 pf_num) 423710cccf60SVasundhara Volam { 4238980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, false, pf_num); 423910cccf60SVasundhara Volam } 424010cccf60SVasundhara Volam 4241980df249SSuresh Reddy static struct be_pcie_res_desc *be_get_pcie_desc(u8 *buf, u32 desc_count, 4242980df249SSuresh Reddy u8 pf_num) 4243150d58c7SVasundhara Volam { 4244150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4245150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4246150d58c7SVasundhara Volam int i; 4247150d58c7SVasundhara Volam 4248150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 4249980df249SSuresh Reddy if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4250980df249SSuresh Reddy hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4251150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 4252980df249SSuresh Reddy if (pcie->pf_num == pf_num) 4253150d58c7SVasundhara Volam return pcie; 4254150d58c7SVasundhara Volam } 4255150d58c7SVasundhara Volam 4256150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4257150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4258150d58c7SVasundhara Volam } 4259abb93951SPadmanabh Ratnakar return NULL; 4260abb93951SPadmanabh Ratnakar } 4261abb93951SPadmanabh Ratnakar 4262f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 4263f93f160bSVasundhara Volam { 4264f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4265f93f160bSVasundhara Volam int i; 4266f93f160bSVasundhara Volam 4267f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 4268f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 4269f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 4270f93f160bSVasundhara Volam 4271f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4272f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4273f93f160bSVasundhara Volam } 4274f93f160bSVasundhara Volam return NULL; 4275f93f160bSVasundhara Volam } 4276f93f160bSVasundhara Volam 427792bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 427892bf14abSSathya Perla struct be_nic_res_desc *desc) 427992bf14abSSathya Perla { 428092bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 428192bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 428292bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 428392bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 428492bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 428592bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 428692bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 4287f2858738SVasundhara Volam res->max_cq_count = le16_to_cpu(desc->cq_count); 4288f2858738SVasundhara Volam res->max_iface_count = le16_to_cpu(desc->iface_count); 4289f2858738SVasundhara Volam res->max_mcc_count = le16_to_cpu(desc->mcc_count); 429092bf14abSSathya Perla /* Clear flags that driver is not interested in */ 429192bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 429292bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 429392bf14abSSathya Perla } 429492bf14abSSathya Perla 4295abb93951SPadmanabh Ratnakar /* Uses Mbox */ 429692bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 4297abb93951SPadmanabh Ratnakar { 4298abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4299abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 4300abb93951SPadmanabh Ratnakar int status; 4301abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 4302abb93951SPadmanabh Ratnakar 4303d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4304d98ef50fSSuresh Reddy return -1; 4305d98ef50fSSuresh Reddy 4306abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 4307abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 4308e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4309e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4310abb93951SPadmanabh Ratnakar if (!cmd.va) { 4311abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 4312d98ef50fSSuresh Reddy status = -ENOMEM; 4313d98ef50fSSuresh Reddy goto err; 4314abb93951SPadmanabh Ratnakar } 4315abb93951SPadmanabh Ratnakar 4316abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 4317abb93951SPadmanabh Ratnakar if (!wrb) { 4318abb93951SPadmanabh Ratnakar status = -EBUSY; 4319abb93951SPadmanabh Ratnakar goto err; 4320abb93951SPadmanabh Ratnakar } 4321abb93951SPadmanabh Ratnakar 4322abb93951SPadmanabh Ratnakar req = cmd.va; 4323abb93951SPadmanabh Ratnakar 4324abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4325abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 4326abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 4327abb93951SPadmanabh Ratnakar 432828710c55SKalesh AP if (skyhawk_chip(adapter)) 432928710c55SKalesh AP req->hdr.version = 1; 433028710c55SKalesh AP 4331abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 4332abb93951SPadmanabh Ratnakar if (!status) { 4333abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 4334abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 4335150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 4336abb93951SPadmanabh Ratnakar 4337980df249SSuresh Reddy /* GET_FUNC_CONFIG returns resource descriptors of the 4338980df249SSuresh Reddy * current function only. So, pf_num should be set to 4339980df249SSuresh Reddy * PF_NUM_IGNORE. 4340980df249SSuresh Reddy */ 4341980df249SSuresh Reddy desc = be_get_func_nic_desc(resp->func_param, desc_count, 4342980df249SSuresh Reddy PF_NUM_IGNORE); 4343abb93951SPadmanabh Ratnakar if (!desc) { 4344abb93951SPadmanabh Ratnakar status = -EINVAL; 4345abb93951SPadmanabh Ratnakar goto err; 4346abb93951SPadmanabh Ratnakar } 4347980df249SSuresh Reddy 4348980df249SSuresh Reddy /* Store pf_num & vf_num for later use in GET_PROFILE_CONFIG */ 4349980df249SSuresh Reddy adapter->pf_num = desc->pf_num; 4350980df249SSuresh Reddy adapter->vf_num = desc->vf_num; 4351980df249SSuresh Reddy 4352980df249SSuresh Reddy if (res) 435392bf14abSSathya Perla be_copy_nic_desc(res, desc); 4354abb93951SPadmanabh Ratnakar } 4355abb93951SPadmanabh Ratnakar err: 4356abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 4357d98ef50fSSuresh Reddy if (cmd.va) 4358e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4359e51000dbSSriharsha Basavapatna cmd.dma); 4360abb93951SPadmanabh Ratnakar return status; 4361abb93951SPadmanabh Ratnakar } 4362abb93951SPadmanabh Ratnakar 4363980df249SSuresh Reddy /* Will use MBOX only if MCCQ has not been created */ 436492bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 4365f2858738SVasundhara Volam struct be_resources *res, u8 query, u8 domain) 4366a05f99dbSVasundhara Volam { 4367150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 4368ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 436910cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 4370150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4371f93f160bSVasundhara Volam struct be_port_res_desc *port; 4372150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 4373ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 4374a05f99dbSVasundhara Volam struct be_dma_mem cmd; 4375f2858738SVasundhara Volam u16 desc_count; 4376a05f99dbSVasundhara Volam int status; 4377a05f99dbSVasundhara Volam 4378a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4379a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 4380e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4381e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4382150d58c7SVasundhara Volam if (!cmd.va) 4383a05f99dbSVasundhara Volam return -ENOMEM; 4384a05f99dbSVasundhara Volam 4385ba48c0c9SVasundhara Volam req = cmd.va; 4386ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4387ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 4388ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 4389ba48c0c9SVasundhara Volam 4390ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 4391ba48c0c9SVasundhara Volam req->hdr.version = 1; 4392ba48c0c9SVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 439372ef3a88SSomnath Kotur req->hdr.domain = domain; 4394ba48c0c9SVasundhara Volam 4395f2858738SVasundhara Volam /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the 4396f2858738SVasundhara Volam * descriptors with all bits set to "1" for the fields which can be 4397f2858738SVasundhara Volam * modified using SET_PROFILE_CONFIG cmd. 4398f2858738SVasundhara Volam */ 4399f2858738SVasundhara Volam if (query == RESOURCE_MODIFIABLE) 4400f2858738SVasundhara Volam req->type |= QUERY_MODIFIABLE_FIELDS_TYPE; 4401f2858738SVasundhara Volam 4402ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4403150d58c7SVasundhara Volam if (status) 4404abb93951SPadmanabh Ratnakar goto err; 4405150d58c7SVasundhara Volam 4406150d58c7SVasundhara Volam resp = cmd.va; 4407f2858738SVasundhara Volam desc_count = le16_to_cpu(resp->desc_count); 4408150d58c7SVasundhara Volam 4409980df249SSuresh Reddy pcie = be_get_pcie_desc(resp->func_param, desc_count, 4410980df249SSuresh Reddy adapter->pf_num); 4411150d58c7SVasundhara Volam if (pcie) 441292bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 4413150d58c7SVasundhara Volam 4414f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 4415f93f160bSVasundhara Volam if (port) 4416f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 4417f93f160bSVasundhara Volam 4418980df249SSuresh Reddy nic = be_get_func_nic_desc(resp->func_param, desc_count, 4419980df249SSuresh Reddy adapter->pf_num); 442092bf14abSSathya Perla if (nic) 442192bf14abSSathya Perla be_copy_nic_desc(res, nic); 442292bf14abSSathya Perla 4423980df249SSuresh Reddy vf_res = be_get_vft_desc(resp->func_param, desc_count, 4424980df249SSuresh Reddy adapter->pf_num); 442510cccf60SVasundhara Volam if (vf_res) 442610cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 4427abb93951SPadmanabh Ratnakar err: 4428a05f99dbSVasundhara Volam if (cmd.va) 4429e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4430e51000dbSSriharsha Basavapatna cmd.dma); 4431abb93951SPadmanabh Ratnakar return status; 4432abb93951SPadmanabh Ratnakar } 4433abb93951SPadmanabh Ratnakar 4434bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 4435bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 4436bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 4437d5c18473SPadmanabh Ratnakar { 4438d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 4439bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 4440bec84e6bSVasundhara Volam struct be_dma_mem cmd; 4441d5c18473SPadmanabh Ratnakar int status; 4442d5c18473SPadmanabh Ratnakar 4443bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4444bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 4445e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4446e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4447bec84e6bSVasundhara Volam if (!cmd.va) 4448bec84e6bSVasundhara Volam return -ENOMEM; 4449d5c18473SPadmanabh Ratnakar 4450bec84e6bSVasundhara Volam req = cmd.va; 4451d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4452bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 4453bec84e6bSVasundhara Volam &wrb, &cmd); 4454a401801cSSathya Perla req->hdr.version = version; 4455d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 4456bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 4457a401801cSSathya Perla memcpy(req->desc, desc, size); 4458d5c18473SPadmanabh Ratnakar 4459bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4460bec84e6bSVasundhara Volam 4461bec84e6bSVasundhara Volam if (cmd.va) 4462e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4463e51000dbSSriharsha Basavapatna cmd.dma); 4464d5c18473SPadmanabh Ratnakar return status; 4465d5c18473SPadmanabh Ratnakar } 4466d5c18473SPadmanabh Ratnakar 4467a401801cSSathya Perla /* Mark all fields invalid */ 4468bec84e6bSVasundhara Volam static void be_reset_nic_desc(struct be_nic_res_desc *nic) 4469a401801cSSathya Perla { 4470a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 4471a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 4472a401801cSSathya Perla nic->mcc_count = 0xFFFF; 4473a401801cSSathya Perla nic->vlan_count = 0xFFFF; 4474a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 4475a401801cSSathya Perla nic->txq_count = 0xFFFF; 4476a401801cSSathya Perla nic->rq_count = 0xFFFF; 4477a401801cSSathya Perla nic->rssq_count = 0xFFFF; 4478a401801cSSathya Perla nic->lro_count = 0xFFFF; 4479a401801cSSathya Perla nic->cq_count = 0xFFFF; 4480a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 4481a401801cSSathya Perla nic->eq_count = 0xFFFF; 44820f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 4483a401801cSSathya Perla nic->link_param = 0xFF; 44840f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 4485a401801cSSathya Perla nic->acpi_params = 0xFF; 4486a401801cSSathya Perla nic->wol_param = 0x0F; 44870f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 44880f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 4489bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 4490a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 4491a401801cSSathya Perla } 4492a401801cSSathya Perla 4493bec84e6bSVasundhara Volam /* Mark all fields invalid */ 4494bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 4495bec84e6bSVasundhara Volam { 4496bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 4497bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 4498bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 4499bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 4500bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 4501bec84e6bSVasundhara Volam } 4502bec84e6bSVasundhara Volam 45030f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 45040f77ba73SRavikumar Nelavelli u8 domain) 4505a401801cSSathya Perla { 4506a401801cSSathya Perla struct be_nic_res_desc nic_desc; 45070f77ba73SRavikumar Nelavelli u32 bw_percent; 45080f77ba73SRavikumar Nelavelli u16 version = 0; 45090f77ba73SRavikumar Nelavelli 45100f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 45110f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 4512a401801cSSathya Perla 4513a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 4514980df249SSuresh Reddy nic_desc.pf_num = adapter->pf_num; 45150f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 451658bdeaa6SKalesh AP nic_desc.bw_min = 0; 45170f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 4518a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 4519a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 4520a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 4521a401801cSSathya Perla (1 << NOSV_SHIFT); 45220f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 45230f77ba73SRavikumar Nelavelli } else { 45240f77ba73SRavikumar Nelavelli version = 1; 45250f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 45260f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 45270f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 45280f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 45290f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 45300f77ba73SRavikumar Nelavelli } 4531a401801cSSathya Perla 4532a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 45330f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 4534bec84e6bSVasundhara Volam 1, version, domain); 4535bec84e6bSVasundhara Volam } 4536bec84e6bSVasundhara Volam 4537f2858738SVasundhara Volam static void be_fill_vf_res_template(struct be_adapter *adapter, 4538f2858738SVasundhara Volam struct be_resources pool_res, 4539f2858738SVasundhara Volam u16 num_vfs, u16 num_vf_qs, 4540f2858738SVasundhara Volam struct be_nic_res_desc *nic_vft) 4541f2858738SVasundhara Volam { 4542f2858738SVasundhara Volam u32 vf_if_cap_flags = pool_res.vf_if_cap_flags; 4543f2858738SVasundhara Volam struct be_resources res_mod = {0}; 4544f2858738SVasundhara Volam 4545f2858738SVasundhara Volam /* Resource with fields set to all '1's by GET_PROFILE_CONFIG cmd, 4546f2858738SVasundhara Volam * which are modifiable using SET_PROFILE_CONFIG cmd. 4547f2858738SVasundhara Volam */ 4548f2858738SVasundhara Volam be_cmd_get_profile_config(adapter, &res_mod, RESOURCE_MODIFIABLE, 0); 4549f2858738SVasundhara Volam 4550f2858738SVasundhara Volam /* If RSS IFACE capability flags are modifiable for a VF, set the 4551f2858738SVasundhara Volam * capability flag as valid and set RSS and DEFQ_RSS IFACE flags if 4552f2858738SVasundhara Volam * more than 1 RSSQ is available for a VF. 4553f2858738SVasundhara Volam * Otherwise, provision only 1 queue pair for VF. 4554f2858738SVasundhara Volam */ 4555f2858738SVasundhara Volam if (res_mod.vf_if_cap_flags & BE_IF_FLAGS_RSS) { 4556f2858738SVasundhara Volam nic_vft->flags |= BIT(IF_CAPS_FLAGS_VALID_SHIFT); 4557f2858738SVasundhara Volam if (num_vf_qs > 1) { 4558f2858738SVasundhara Volam vf_if_cap_flags |= BE_IF_FLAGS_RSS; 4559f2858738SVasundhara Volam if (pool_res.if_cap_flags & BE_IF_FLAGS_DEFQ_RSS) 4560f2858738SVasundhara Volam vf_if_cap_flags |= BE_IF_FLAGS_DEFQ_RSS; 4561f2858738SVasundhara Volam } else { 4562f2858738SVasundhara Volam vf_if_cap_flags &= ~(BE_IF_FLAGS_RSS | 4563f2858738SVasundhara Volam BE_IF_FLAGS_DEFQ_RSS); 4564f2858738SVasundhara Volam } 4565f2858738SVasundhara Volam } else { 4566f2858738SVasundhara Volam num_vf_qs = 1; 4567f2858738SVasundhara Volam } 4568f2858738SVasundhara Volam 4569196e3735SKalesh AP if (res_mod.vf_if_cap_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS) { 4570196e3735SKalesh AP nic_vft->flags |= BIT(IF_CAPS_FLAGS_VALID_SHIFT); 4571196e3735SKalesh AP vf_if_cap_flags &= ~BE_IF_FLAGS_VLAN_PROMISCUOUS; 4572196e3735SKalesh AP } 4573196e3735SKalesh AP 4574196e3735SKalesh AP nic_vft->cap_flags = cpu_to_le32(vf_if_cap_flags); 4575f2858738SVasundhara Volam nic_vft->rq_count = cpu_to_le16(num_vf_qs); 4576f2858738SVasundhara Volam nic_vft->txq_count = cpu_to_le16(num_vf_qs); 4577f2858738SVasundhara Volam nic_vft->rssq_count = cpu_to_le16(num_vf_qs); 4578f2858738SVasundhara Volam nic_vft->cq_count = cpu_to_le16(pool_res.max_cq_count / 4579f2858738SVasundhara Volam (num_vfs + 1)); 4580f2858738SVasundhara Volam 4581f2858738SVasundhara Volam /* Distribute unicast MACs, VLANs, IFACE count and MCCQ count equally 4582f2858738SVasundhara Volam * among the PF and it's VFs, if the fields are changeable 4583f2858738SVasundhara Volam */ 4584f2858738SVasundhara Volam if (res_mod.max_uc_mac == FIELD_MODIFIABLE) 4585f2858738SVasundhara Volam nic_vft->unicast_mac_count = cpu_to_le16(pool_res.max_uc_mac / 4586f2858738SVasundhara Volam (num_vfs + 1)); 4587f2858738SVasundhara Volam 4588f2858738SVasundhara Volam if (res_mod.max_vlans == FIELD_MODIFIABLE) 4589f2858738SVasundhara Volam nic_vft->vlan_count = cpu_to_le16(pool_res.max_vlans / 4590f2858738SVasundhara Volam (num_vfs + 1)); 4591f2858738SVasundhara Volam 4592f2858738SVasundhara Volam if (res_mod.max_iface_count == FIELD_MODIFIABLE) 4593f2858738SVasundhara Volam nic_vft->iface_count = cpu_to_le16(pool_res.max_iface_count / 4594f2858738SVasundhara Volam (num_vfs + 1)); 4595f2858738SVasundhara Volam 4596f2858738SVasundhara Volam if (res_mod.max_mcc_count == FIELD_MODIFIABLE) 4597f2858738SVasundhara Volam nic_vft->mcc_count = cpu_to_le16(pool_res.max_mcc_count / 4598f2858738SVasundhara Volam (num_vfs + 1)); 4599f2858738SVasundhara Volam } 4600f2858738SVasundhara Volam 4601bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 4602f2858738SVasundhara Volam struct be_resources pool_res, u16 num_vfs, 4603f2858738SVasundhara Volam u16 num_vf_qs) 4604bec84e6bSVasundhara Volam { 4605bec84e6bSVasundhara Volam struct { 4606bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 4607bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 4608bec84e6bSVasundhara Volam } __packed desc; 4609bec84e6bSVasundhara Volam 4610bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 4611bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 4612bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 4613bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4614f2858738SVasundhara Volam desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4615bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 4616bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 4617bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 4618bec84e6bSVasundhara Volam 4619bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 4620bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 4621bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 4622bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4623f2858738SVasundhara Volam desc.nic_vft.flags = BIT(VFT_SHIFT) | BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4624bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 4625bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 4626bec84e6bSVasundhara Volam 4627f2858738SVasundhara Volam be_fill_vf_res_template(adapter, pool_res, num_vfs, num_vf_qs, 4628f2858738SVasundhara Volam &desc.nic_vft); 4629bec84e6bSVasundhara Volam 4630bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 4631bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 4632a401801cSSathya Perla } 4633a401801cSSathya Perla 4634a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 4635a401801cSSathya Perla { 4636a401801cSSathya Perla struct be_mcc_wrb *wrb; 4637a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 4638a401801cSSathya Perla int status; 4639a401801cSSathya Perla 4640a401801cSSathya Perla if (iface == 0xFFFFFFFF) 4641a401801cSSathya Perla return -1; 4642a401801cSSathya Perla 4643a401801cSSathya Perla spin_lock_bh(&adapter->mcc_lock); 4644a401801cSSathya Perla 4645a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 4646a401801cSSathya Perla if (!wrb) { 4647a401801cSSathya Perla status = -EBUSY; 4648a401801cSSathya Perla goto err; 4649a401801cSSathya Perla } 4650a401801cSSathya Perla req = embedded_payload(wrb); 4651a401801cSSathya Perla 4652a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4653a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 4654a401801cSSathya Perla wrb, NULL); 4655a401801cSSathya Perla req->op = op; 4656a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 4657a401801cSSathya Perla 4658a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 4659a401801cSSathya Perla err: 4660a401801cSSathya Perla spin_unlock_bh(&adapter->mcc_lock); 4661a401801cSSathya Perla return status; 4662a401801cSSathya Perla } 4663a401801cSSathya Perla 4664a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 4665a401801cSSathya Perla { 4666a401801cSSathya Perla struct be_port_res_desc port_desc; 4667a401801cSSathya Perla 4668a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 4669a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 4670a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4671a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 4672a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 4673a401801cSSathya Perla if (port) { 4674a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 4675a401801cSSathya Perla (1 << RCVID_SHIFT); 4676a401801cSSathya Perla port_desc.nv_port = swab16(port); 4677a401801cSSathya Perla } else { 4678a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 4679a401801cSSathya Perla port_desc.nv_port = 0; 4680a401801cSSathya Perla } 4681a401801cSSathya Perla 4682a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 4683bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 4684a401801cSSathya Perla } 4685a401801cSSathya Perla 46864c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 46874c876616SSathya Perla int vf_num) 46884c876616SSathya Perla { 46894c876616SSathya Perla struct be_mcc_wrb *wrb; 46904c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 46914c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 46924c876616SSathya Perla int status; 46934c876616SSathya Perla 46944c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 46954c876616SSathya Perla 46964c876616SSathya Perla wrb = wrb_from_mccq(adapter); 46974c876616SSathya Perla if (!wrb) { 46984c876616SSathya Perla status = -EBUSY; 46994c876616SSathya Perla goto err; 47004c876616SSathya Perla } 47014c876616SSathya Perla req = embedded_payload(wrb); 47024c876616SSathya Perla 47034c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 47044c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 47054c876616SSathya Perla wrb, NULL); 47064c876616SSathya Perla req->hdr.domain = vf_num + 1; 47074c876616SSathya Perla 47084c876616SSathya Perla status = be_mcc_notify_wait(adapter); 47094c876616SSathya Perla if (!status) { 47104c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 47114c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 47124c876616SSathya Perla } 47134c876616SSathya Perla 47144c876616SSathya Perla err: 47154c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 47164c876616SSathya Perla return status; 47174c876616SSathya Perla } 47184c876616SSathya Perla 47195c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 47205c510811SSomnath Kotur { 47215c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 47225c510811SSomnath Kotur u32 reg_val; 47235c510811SSomnath Kotur int status = 0, i; 47245c510811SSomnath Kotur 47255c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 47265c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 47275c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 47285c510811SSomnath Kotur break; 47295c510811SSomnath Kotur 47305c510811SSomnath Kotur ssleep(1); 47315c510811SSomnath Kotur } 47325c510811SSomnath Kotur 47335c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 47345c510811SSomnath Kotur status = -1; 47355c510811SSomnath Kotur 47365c510811SSomnath Kotur return status; 47375c510811SSomnath Kotur } 47385c510811SSomnath Kotur 47395c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 47405c510811SSomnath Kotur { 47415c510811SSomnath Kotur int status = 0; 47425c510811SSomnath Kotur 47435c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47445c510811SSomnath Kotur if (status) 47455c510811SSomnath Kotur return status; 47465c510811SSomnath Kotur 47475c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 47485c510811SSomnath Kotur 47495c510811SSomnath Kotur return status; 47505c510811SSomnath Kotur } 47515c510811SSomnath Kotur 47525c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 47535c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 47545c510811SSomnath Kotur { 47555c510811SSomnath Kotur u32 sliport_status = 0; 47565c510811SSomnath Kotur 47575c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 47585c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 47595c510811SSomnath Kotur } 47605c510811SSomnath Kotur 47615c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 47625c510811SSomnath Kotur { 4763f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 47645c510811SSomnath Kotur int status; 47655c510811SSomnath Kotur 4766f0613380SKalesh AP if (dump_present(adapter)) { 4767f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 4768f0613380SKalesh AP return -EEXIST; 4769f0613380SKalesh AP } 4770f0613380SKalesh AP 47715c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 47725c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 47735c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 47745c510811SSomnath Kotur if (status < 0) { 4775f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 47765c510811SSomnath Kotur return status; 47775c510811SSomnath Kotur } 47785c510811SSomnath Kotur 47795c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47805c510811SSomnath Kotur if (status) 47815c510811SSomnath Kotur return status; 47825c510811SSomnath Kotur 47835c510811SSomnath Kotur if (!dump_present(adapter)) { 4784f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 4785f0613380SKalesh AP return -EIO; 47865c510811SSomnath Kotur } 47875c510811SSomnath Kotur 47885c510811SSomnath Kotur return 0; 47895c510811SSomnath Kotur } 47905c510811SSomnath Kotur 4791f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 4792f0613380SKalesh AP { 4793f0613380SKalesh AP int status; 4794f0613380SKalesh AP 4795f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 4796f0613380SKalesh AP return be_cmd_status(status); 4797f0613380SKalesh AP } 4798f0613380SKalesh AP 4799dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 4800dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 4801dcf7ebbaSPadmanabh Ratnakar { 4802dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4803dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 4804dcf7ebbaSPadmanabh Ratnakar int status; 4805dcf7ebbaSPadmanabh Ratnakar 48060599863dSVasundhara Volam if (BEx_chip(adapter)) 4807dcf7ebbaSPadmanabh Ratnakar return 0; 4808dcf7ebbaSPadmanabh Ratnakar 4809dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 4810dcf7ebbaSPadmanabh Ratnakar 4811dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4812dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4813dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4814dcf7ebbaSPadmanabh Ratnakar goto err; 4815dcf7ebbaSPadmanabh Ratnakar } 4816dcf7ebbaSPadmanabh Ratnakar 4817dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4818dcf7ebbaSPadmanabh Ratnakar 4819dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4820dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4821dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4822dcf7ebbaSPadmanabh Ratnakar 4823dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4824dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4825dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4826dcf7ebbaSPadmanabh Ratnakar err: 4827dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 4828dcf7ebbaSPadmanabh Ratnakar return status; 4829dcf7ebbaSPadmanabh Ratnakar } 4830dcf7ebbaSPadmanabh Ratnakar 483168c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 483268c45a2dSSomnath Kotur { 483368c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 483468c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 483568c45a2dSSomnath Kotur int status; 483668c45a2dSSomnath Kotur 483768c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 483868c45a2dSSomnath Kotur return -1; 483968c45a2dSSomnath Kotur 484068c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 484168c45a2dSSomnath Kotur 484268c45a2dSSomnath Kotur req = embedded_payload(wrb); 484368c45a2dSSomnath Kotur 484468c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 484568c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 484668c45a2dSSomnath Kotur wrb, NULL); 484768c45a2dSSomnath Kotur 484868c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 484968c45a2dSSomnath Kotur 485068c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 485168c45a2dSSomnath Kotur 485268c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 485368c45a2dSSomnath Kotur return status; 485468c45a2dSSomnath Kotur } 485568c45a2dSSomnath Kotur 4856542963b7SVasundhara Volam /* Uses MBOX */ 4857542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4858542963b7SVasundhara Volam { 4859542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4860542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4861542963b7SVasundhara Volam int status; 4862542963b7SVasundhara Volam 4863542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4864542963b7SVasundhara Volam return -1; 4865542963b7SVasundhara Volam 4866542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4867542963b7SVasundhara Volam if (!wrb) { 4868542963b7SVasundhara Volam status = -EBUSY; 4869542963b7SVasundhara Volam goto err; 4870542963b7SVasundhara Volam } 4871542963b7SVasundhara Volam 4872542963b7SVasundhara Volam req = embedded_payload(wrb); 4873542963b7SVasundhara Volam 4874542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4875542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4876542963b7SVasundhara Volam wrb, NULL); 4877542963b7SVasundhara Volam 4878542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4879542963b7SVasundhara Volam if (!status) { 4880542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4881542963b7SVasundhara Volam embedded_payload(wrb); 488203d28ffeSKalesh AP 4883542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4884542963b7SVasundhara Volam } 4885542963b7SVasundhara Volam 4886542963b7SVasundhara Volam err: 4887542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4888542963b7SVasundhara Volam return status; 4889542963b7SVasundhara Volam } 4890542963b7SVasundhara Volam 4891d9d426afSSuresh Reddy int __be_cmd_set_logical_link_config(struct be_adapter *adapter, 4892d9d426afSSuresh Reddy int link_state, int version, u8 domain) 4893bdce2ad7SSuresh Reddy { 4894bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 4895bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 4896bdce2ad7SSuresh Reddy int status; 4897bdce2ad7SSuresh Reddy 4898bdce2ad7SSuresh Reddy spin_lock_bh(&adapter->mcc_lock); 4899bdce2ad7SSuresh Reddy 4900bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4901bdce2ad7SSuresh Reddy if (!wrb) { 4902bdce2ad7SSuresh Reddy status = -EBUSY; 4903bdce2ad7SSuresh Reddy goto err; 4904bdce2ad7SSuresh Reddy } 4905bdce2ad7SSuresh Reddy 4906bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4907bdce2ad7SSuresh Reddy 4908bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4909bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4910bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4911bdce2ad7SSuresh Reddy 4912d9d426afSSuresh Reddy req->hdr.version = version; 4913bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4914bdce2ad7SSuresh Reddy 4915d9d426afSSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE || 4916d9d426afSSuresh Reddy link_state == IFLA_VF_LINK_STATE_AUTO) 4917d9d426afSSuresh Reddy req->link_config |= PLINK_ENABLE; 4918bdce2ad7SSuresh Reddy 4919bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 4920d9d426afSSuresh Reddy req->link_config |= PLINK_TRACK; 4921bdce2ad7SSuresh Reddy 4922bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4923bdce2ad7SSuresh Reddy err: 4924bdce2ad7SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 4925bdce2ad7SSuresh Reddy return status; 4926bdce2ad7SSuresh Reddy } 4927bdce2ad7SSuresh Reddy 4928d9d426afSSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4929d9d426afSSuresh Reddy int link_state, u8 domain) 4930d9d426afSSuresh Reddy { 4931d9d426afSSuresh Reddy int status; 4932d9d426afSSuresh Reddy 4933d9d426afSSuresh Reddy if (BEx_chip(adapter)) 4934d9d426afSSuresh Reddy return -EOPNOTSUPP; 4935d9d426afSSuresh Reddy 4936d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4937d9d426afSSuresh Reddy 2, domain); 4938d9d426afSSuresh Reddy 4939d9d426afSSuresh Reddy /* Version 2 of the command will not be recognized by older FW. 4940d9d426afSSuresh Reddy * On such a failure issue version 1 of the command. 4941d9d426afSSuresh Reddy */ 4942d9d426afSSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST) 4943d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4944d9d426afSSuresh Reddy 1, domain); 4945d9d426afSSuresh Reddy return status; 4946d9d426afSSuresh Reddy } 49476a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 49486a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 49496a4ab669SParav Pandit { 49506a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 49516a4ab669SParav Pandit struct be_mcc_wrb *wrb; 49526a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 49536a4ab669SParav Pandit struct be_cmd_req_hdr *req; 49546a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 49556a4ab669SParav Pandit int status; 49566a4ab669SParav Pandit 49576a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 49586a4ab669SParav Pandit 49596a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 49606a4ab669SParav Pandit if (!wrb) { 49616a4ab669SParav Pandit status = -EBUSY; 49626a4ab669SParav Pandit goto err; 49636a4ab669SParav Pandit } 49646a4ab669SParav Pandit req = embedded_payload(wrb); 49656a4ab669SParav Pandit resp = embedded_payload(wrb); 49666a4ab669SParav Pandit 49676a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 49686a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 49696a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 49706a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 49716a4ab669SParav Pandit 49726a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 49736a4ab669SParav Pandit if (cmd_status) 49746a4ab669SParav Pandit *cmd_status = (status & 0xffff); 49756a4ab669SParav Pandit if (ext_status) 49766a4ab669SParav Pandit *ext_status = 0; 49776a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 49786a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 49796a4ab669SParav Pandit err: 49806a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 49816a4ab669SParav Pandit return status; 49826a4ab669SParav Pandit } 49836a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 4984