19aebddd1SJeff Kirsher /* 240263820SVasundhara Volam * Copyright (C) 2005 - 2014 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 1445eeff635SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 1455eeff635SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 1465eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1475eeff635SSuresh Reddy return 0; 1485eeff635SSuresh Reddy } 1495eeff635SSuresh Reddy 150652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 151652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 152652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1539aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1545eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1559aebddd1SJeff Kirsher } 1569aebddd1SJeff Kirsher 1579aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 158652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 159652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 160652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1619aebddd1SJeff Kirsher be_parse_stats(adapter); 1629aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1639aebddd1SJeff Kirsher } 164652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 165652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1663de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 167652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1683de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1693de09455SSomnath Kotur resp->on_die_temperature; 1703de09455SSomnath Kotur } 1719aebddd1SJeff Kirsher } else { 172652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1737aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1743de09455SSomnath Kotur 1759aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1769aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1779aebddd1SJeff Kirsher goto done; 1789aebddd1SJeff Kirsher 1799aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 18097f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 181522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem); 1839aebddd1SJeff Kirsher } else { 1849aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1859aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18697f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18797f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18897f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 189d9d604f8SAjit Khaparde 190d9d604f8SAjit Khaparde if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) 191d9d604f8SAjit Khaparde return extd_status; 1929aebddd1SJeff Kirsher } 1939aebddd1SJeff Kirsher } 1949aebddd1SJeff Kirsher done: 1959aebddd1SJeff Kirsher return compl_status; 1969aebddd1SJeff Kirsher } 1979aebddd1SJeff Kirsher 1989aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1999aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2009aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 2019aebddd1SJeff Kirsher { 202b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 20342f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 204b236916aSAjit Khaparde 205bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 206bdce2ad7SSuresh Reddy * notification for physical and logical link. 207bdce2ad7SSuresh Reddy * On other chips just process the logical link 208bdce2ad7SSuresh Reddy * status notification 209bdce2ad7SSuresh Reddy */ 210bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2112e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2122e177a5cSPadmanabh Ratnakar return; 2132e177a5cSPadmanabh Ratnakar 214b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 215b236916aSAjit Khaparde * it may not be received in some cases. 216b236916aSAjit Khaparde */ 217b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 218bdce2ad7SSuresh Reddy be_link_status_update(adapter, 219bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 2209aebddd1SJeff Kirsher } 2219aebddd1SJeff Kirsher 2229aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2239aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2249aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2259aebddd1SJeff Kirsher { 2269aebddd1SJeff Kirsher if (evt->valid) { 2279aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2289aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2299aebddd1SJeff Kirsher adapter->recommended_prio = 2309aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2319aebddd1SJeff Kirsher } 2329aebddd1SJeff Kirsher } 2339aebddd1SJeff Kirsher 234323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2359aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2369aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2379aebddd1SJeff Kirsher { 238323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 239323ff71eSSathya Perla evt->physical_port == adapter->port_num) 240323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2419aebddd1SJeff Kirsher } 2429aebddd1SJeff Kirsher 2439aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2449aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2459aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2469aebddd1SJeff Kirsher { 247bdac85b5SRavikumar Nelavelli if (evt->enabled) { 248939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 249bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 250bdac85b5SRavikumar Nelavelli } else { 2519aebddd1SJeff Kirsher adapter->pvid = 0; 2529aebddd1SJeff Kirsher } 253bdac85b5SRavikumar Nelavelli } 2549aebddd1SJeff Kirsher 2559aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2569aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2579aebddd1SJeff Kirsher { 2589aebddd1SJeff Kirsher u8 event_type = 0; 2599aebddd1SJeff Kirsher 2609aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2619aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2629aebddd1SJeff Kirsher 2639aebddd1SJeff Kirsher switch (event_type) { 2649aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2659aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2669aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2679aebddd1SJeff Kirsher break; 2689aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2699aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2709aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2719aebddd1SJeff Kirsher break; 2729aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2739aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2749aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2759aebddd1SJeff Kirsher break; 2769aebddd1SJeff Kirsher default: 27705ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 27805ccaa2bSVasundhara Volam event_type); 2799aebddd1SJeff Kirsher break; 2809aebddd1SJeff Kirsher } 2819aebddd1SJeff Kirsher } 2829aebddd1SJeff Kirsher 283bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 284bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 285bc0c3405SAjit Khaparde { 286bc0c3405SAjit Khaparde u8 event_type = 0; 287bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 288bc0c3405SAjit Khaparde 289bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 290bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 291bc0c3405SAjit Khaparde 292bc0c3405SAjit Khaparde switch (event_type) { 293bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 294bc0c3405SAjit Khaparde if (evt->valid) 295bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 296bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 297bc0c3405SAjit Khaparde break; 298bc0c3405SAjit Khaparde default: 29905ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 30005ccaa2bSVasundhara Volam event_type); 301bc0c3405SAjit Khaparde break; 302bc0c3405SAjit Khaparde } 303bc0c3405SAjit Khaparde } 304bc0c3405SAjit Khaparde 3059aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 3069aebddd1SJeff Kirsher { 3079aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3089aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3099aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 3109aebddd1SJeff Kirsher } 3119aebddd1SJeff Kirsher 3129aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 3139aebddd1SJeff Kirsher { 3149aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3159aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3169aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3179aebddd1SJeff Kirsher } 3189aebddd1SJeff Kirsher 319bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 320bc0c3405SAjit Khaparde { 321bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 322bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 323bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 324bc0c3405SAjit Khaparde } 325bc0c3405SAjit Khaparde 3269aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3279aebddd1SJeff Kirsher { 3289aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3299aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3309aebddd1SJeff Kirsher 3319aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3329aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3339aebddd1SJeff Kirsher return compl; 3349aebddd1SJeff Kirsher } 3359aebddd1SJeff Kirsher return NULL; 3369aebddd1SJeff Kirsher } 3379aebddd1SJeff Kirsher 3389aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3399aebddd1SJeff Kirsher { 3409aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3419aebddd1SJeff Kirsher 3429aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3439aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3449aebddd1SJeff Kirsher 3459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3469aebddd1SJeff Kirsher } 3479aebddd1SJeff Kirsher 3489aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3499aebddd1SJeff Kirsher { 350a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 351a323d9bfSSathya Perla 3529aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 353a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 354a323d9bfSSathya Perla 355a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3569aebddd1SJeff Kirsher } 3579aebddd1SJeff Kirsher 35810ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3599aebddd1SJeff Kirsher { 3609aebddd1SJeff Kirsher struct be_mcc_compl *compl; 36110ef9ab4SSathya Perla int num = 0, status = 0; 3629aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3639aebddd1SJeff Kirsher 364072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3659aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3669aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3679aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3689aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3699aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3709aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3719aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3729aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3739aebddd1SJeff Kirsher compl->flags, compl); 374bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 375bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 376bc0c3405SAjit Khaparde compl->flags, compl); 3779aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 37810ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3799aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3809aebddd1SJeff Kirsher } 3819aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3829aebddd1SJeff Kirsher num++; 3839aebddd1SJeff Kirsher } 3849aebddd1SJeff Kirsher 38510ef9ab4SSathya Perla if (num) 38610ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 38710ef9ab4SSathya Perla 388072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 38910ef9ab4SSathya Perla return status; 3909aebddd1SJeff Kirsher } 3919aebddd1SJeff Kirsher 3929aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3939aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3949aebddd1SJeff Kirsher { 3959aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 39610ef9ab4SSathya Perla int i, status = 0; 3979aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3989aebddd1SJeff Kirsher 3996589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 4006589ade0SSathya Perla if (be_error(adapter)) 4019aebddd1SJeff Kirsher return -EIO; 4029aebddd1SJeff Kirsher 403072a9c48SAmerigo Wang local_bh_disable(); 40410ef9ab4SSathya Perla status = be_process_mcc(adapter); 405072a9c48SAmerigo Wang local_bh_enable(); 4069aebddd1SJeff Kirsher 4079aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 4089aebddd1SJeff Kirsher break; 4099aebddd1SJeff Kirsher udelay(100); 4109aebddd1SJeff Kirsher } 4119aebddd1SJeff Kirsher if (i == mcc_timeout) { 4126589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4136589ade0SSathya Perla adapter->fw_timeout = true; 414652bf646SPadmanabh Ratnakar return -EIO; 4159aebddd1SJeff Kirsher } 4169aebddd1SJeff Kirsher return status; 4179aebddd1SJeff Kirsher } 4189aebddd1SJeff Kirsher 4199aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4209aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4219aebddd1SJeff Kirsher { 422652bf646SPadmanabh Ratnakar int status; 423652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 424652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 425652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 426652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 427652bf646SPadmanabh Ratnakar 428652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 429652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 430652bf646SPadmanabh Ratnakar 431652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 432652bf646SPadmanabh Ratnakar 4339aebddd1SJeff Kirsher be_mcc_notify(adapter); 434652bf646SPadmanabh Ratnakar 435652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 436652bf646SPadmanabh Ratnakar if (status == -EIO) 437652bf646SPadmanabh Ratnakar goto out; 438652bf646SPadmanabh Ratnakar 439652bf646SPadmanabh Ratnakar status = resp->status; 440652bf646SPadmanabh Ratnakar out: 441652bf646SPadmanabh Ratnakar return status; 4429aebddd1SJeff Kirsher } 4439aebddd1SJeff Kirsher 4449aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4459aebddd1SJeff Kirsher { 4469aebddd1SJeff Kirsher int msecs = 0; 4479aebddd1SJeff Kirsher u32 ready; 4489aebddd1SJeff Kirsher 4496589ade0SSathya Perla do { 4506589ade0SSathya Perla if (be_error(adapter)) 4519aebddd1SJeff Kirsher return -EIO; 4529aebddd1SJeff Kirsher 4539aebddd1SJeff Kirsher ready = ioread32(db); 454434b3648SSathya Perla if (ready == 0xffffffff) 4559aebddd1SJeff Kirsher return -1; 4569aebddd1SJeff Kirsher 4579aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4589aebddd1SJeff Kirsher if (ready) 4599aebddd1SJeff Kirsher break; 4609aebddd1SJeff Kirsher 4619aebddd1SJeff Kirsher if (msecs > 4000) { 4626589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4636589ade0SSathya Perla adapter->fw_timeout = true; 464f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4659aebddd1SJeff Kirsher return -1; 4669aebddd1SJeff Kirsher } 4679aebddd1SJeff Kirsher 4689aebddd1SJeff Kirsher msleep(1); 4699aebddd1SJeff Kirsher msecs++; 4709aebddd1SJeff Kirsher } while (true); 4719aebddd1SJeff Kirsher 4729aebddd1SJeff Kirsher return 0; 4739aebddd1SJeff Kirsher } 4749aebddd1SJeff Kirsher 4759aebddd1SJeff Kirsher /* 4769aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4779aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4789aebddd1SJeff Kirsher */ 4799aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4809aebddd1SJeff Kirsher { 4819aebddd1SJeff Kirsher int status; 4829aebddd1SJeff Kirsher u32 val = 0; 4839aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4849aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4859aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4869aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4879aebddd1SJeff Kirsher 4889aebddd1SJeff Kirsher /* wait for ready to be set */ 4899aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4909aebddd1SJeff Kirsher if (status != 0) 4919aebddd1SJeff Kirsher return status; 4929aebddd1SJeff Kirsher 4939aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4949aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4959aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4969aebddd1SJeff Kirsher iowrite32(val, db); 4979aebddd1SJeff Kirsher 4989aebddd1SJeff Kirsher /* wait for ready to be set */ 4999aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5009aebddd1SJeff Kirsher if (status != 0) 5019aebddd1SJeff Kirsher return status; 5029aebddd1SJeff Kirsher 5039aebddd1SJeff Kirsher val = 0; 5049aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 5059aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 5069aebddd1SJeff Kirsher iowrite32(val, db); 5079aebddd1SJeff Kirsher 5089aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5099aebddd1SJeff Kirsher if (status != 0) 5109aebddd1SJeff Kirsher return status; 5119aebddd1SJeff Kirsher 5129aebddd1SJeff Kirsher /* A cq entry has been made now */ 5139aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5149aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5159aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5169aebddd1SJeff Kirsher if (status) 5179aebddd1SJeff Kirsher return status; 5189aebddd1SJeff Kirsher } else { 5199aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5209aebddd1SJeff Kirsher return -1; 5219aebddd1SJeff Kirsher } 5229aebddd1SJeff Kirsher return 0; 5239aebddd1SJeff Kirsher } 5249aebddd1SJeff Kirsher 525c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5269aebddd1SJeff Kirsher { 5279aebddd1SJeff Kirsher u32 sem; 5289aebddd1SJeff Kirsher 529c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 530c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5319aebddd1SJeff Kirsher else 532c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 533c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 534c5b3ad4cSSathya Perla 535c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5369aebddd1SJeff Kirsher } 5379aebddd1SJeff Kirsher 53887f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 539bf99e50dSPadmanabh Ratnakar { 540bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 541bf99e50dSPadmanabh Ratnakar u32 sliport_status; 542bf99e50dSPadmanabh Ratnakar int status = 0, i; 543bf99e50dSPadmanabh Ratnakar 544bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 545bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 546bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 547bf99e50dSPadmanabh Ratnakar break; 548bf99e50dSPadmanabh Ratnakar 549bf99e50dSPadmanabh Ratnakar msleep(1000); 550bf99e50dSPadmanabh Ratnakar } 551bf99e50dSPadmanabh Ratnakar 552bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 553bf99e50dSPadmanabh Ratnakar status = -1; 554bf99e50dSPadmanabh Ratnakar 555bf99e50dSPadmanabh Ratnakar return status; 556bf99e50dSPadmanabh Ratnakar } 557bf99e50dSPadmanabh Ratnakar 55867297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 55967297ad8SPadmanabh Ratnakar { 56067297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 56167297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 56267297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 56367297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 56467297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 56567297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 56667297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 56767297ad8SPadmanabh Ratnakar 56867297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 56967297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 57067297ad8SPadmanabh Ratnakar return true; 57167297ad8SPadmanabh Ratnakar } 57267297ad8SPadmanabh Ratnakar return false; 57367297ad8SPadmanabh Ratnakar } 57467297ad8SPadmanabh Ratnakar 575bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 576bf99e50dSPadmanabh Ratnakar { 577bf99e50dSPadmanabh Ratnakar int status; 578bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 57967297ad8SPadmanabh Ratnakar bool resource_error; 58067297ad8SPadmanabh Ratnakar 58167297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 58267297ad8SPadmanabh Ratnakar if (resource_error) 58301e5b2c4SSomnath Kotur return -EAGAIN; 58467297ad8SPadmanabh Ratnakar 585bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 586bf99e50dSPadmanabh Ratnakar if (!status) { 587bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 588bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 589bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 590bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 591bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 592bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 593bf99e50dSPadmanabh Ratnakar 594bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 595bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 596bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 597bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 598bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 599bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 600bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 601bf99e50dSPadmanabh Ratnakar status = -1; 602bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 603bf99e50dSPadmanabh Ratnakar status = -1; 604bf99e50dSPadmanabh Ratnakar } 605bf99e50dSPadmanabh Ratnakar } 60667297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 60767297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 60867297ad8SPadmanabh Ratnakar * when PF provisions resources. 60967297ad8SPadmanabh Ratnakar */ 61067297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 61101e5b2c4SSomnath Kotur if (resource_error) 61201e5b2c4SSomnath Kotur status = -EAGAIN; 61367297ad8SPadmanabh Ratnakar 614bf99e50dSPadmanabh Ratnakar return status; 615bf99e50dSPadmanabh Ratnakar } 616bf99e50dSPadmanabh Ratnakar 617bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6189aebddd1SJeff Kirsher { 6199aebddd1SJeff Kirsher u16 stage; 6209aebddd1SJeff Kirsher int status, timeout = 0; 6219aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6229aebddd1SJeff Kirsher 623bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 624bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 625bf99e50dSPadmanabh Ratnakar return status; 626bf99e50dSPadmanabh Ratnakar } 627bf99e50dSPadmanabh Ratnakar 6289aebddd1SJeff Kirsher do { 629c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 63066d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 63166d29cbcSGavin Shan return 0; 63266d29cbcSGavin Shan 63366d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 63466d29cbcSGavin Shan timeout); 6359aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6369aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6379aebddd1SJeff Kirsher return -EINTR; 6389aebddd1SJeff Kirsher } 6399aebddd1SJeff Kirsher timeout += 2; 6403ab81b5fSSomnath Kotur } while (timeout < 60); 6419aebddd1SJeff Kirsher 6429aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6439aebddd1SJeff Kirsher return -1; 6449aebddd1SJeff Kirsher } 6459aebddd1SJeff Kirsher 6469aebddd1SJeff Kirsher 6479aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6489aebddd1SJeff Kirsher { 6499aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6509aebddd1SJeff Kirsher } 6519aebddd1SJeff Kirsher 652bea50988SSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, 653bea50988SSathya Perla unsigned long addr) 654bea50988SSathya Perla { 655bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 656bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 657bea50988SSathya Perla } 6589aebddd1SJeff Kirsher 6599aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 660106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 661106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 662106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 663106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6649aebddd1SJeff Kirsher { 665106df1e3SSomnath Kotur struct be_sge *sge; 666106df1e3SSomnath Kotur 6679aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6689aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6699aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6709aebddd1SJeff Kirsher req_hdr->version = 0; 671bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 672106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 673106df1e3SSomnath Kotur if (mem) { 674106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 675106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 676106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 677106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 678106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 679106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 680106df1e3SSomnath Kotur } else 681106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 682106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6839aebddd1SJeff Kirsher } 6849aebddd1SJeff Kirsher 6859aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6869aebddd1SJeff Kirsher struct be_dma_mem *mem) 6879aebddd1SJeff Kirsher { 6889aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6899aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6909aebddd1SJeff Kirsher 6919aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6929aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6939aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6949aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6959aebddd1SJeff Kirsher } 6969aebddd1SJeff Kirsher } 6979aebddd1SJeff Kirsher 6989aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 6999aebddd1SJeff Kirsher { 7009aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 7019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 7029aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 7039aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7049aebddd1SJeff Kirsher return wrb; 7059aebddd1SJeff Kirsher } 7069aebddd1SJeff Kirsher 7079aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7089aebddd1SJeff Kirsher { 7099aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7119aebddd1SJeff Kirsher 712aa790db9SPadmanabh Ratnakar if (!mccq->created) 713aa790db9SPadmanabh Ratnakar return NULL; 714aa790db9SPadmanabh Ratnakar 7154d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7169aebddd1SJeff Kirsher return NULL; 7179aebddd1SJeff Kirsher 7189aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7199aebddd1SJeff Kirsher queue_head_inc(mccq); 7209aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7219aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7229aebddd1SJeff Kirsher return wrb; 7239aebddd1SJeff Kirsher } 7249aebddd1SJeff Kirsher 725bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 726bea50988SSathya Perla { 727bea50988SSathya Perla return adapter->mcc_obj.q.created; 728bea50988SSathya Perla } 729bea50988SSathya Perla 730bea50988SSathya Perla /* Must be used only in process context */ 731bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 732bea50988SSathya Perla { 733bea50988SSathya Perla if (use_mcc(adapter)) { 734bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 735bea50988SSathya Perla return 0; 736bea50988SSathya Perla } else { 737bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 738bea50988SSathya Perla } 739bea50988SSathya Perla } 740bea50988SSathya Perla 741bea50988SSathya Perla /* Must be used only in process context */ 742bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 743bea50988SSathya Perla { 744bea50988SSathya Perla if (use_mcc(adapter)) 745bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 746bea50988SSathya Perla else 747bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 748bea50988SSathya Perla } 749bea50988SSathya Perla 750bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 751bea50988SSathya Perla struct be_mcc_wrb *wrb) 752bea50988SSathya Perla { 753bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 754bea50988SSathya Perla 755bea50988SSathya Perla if (use_mcc(adapter)) { 756bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 757bea50988SSathya Perla if (!dest_wrb) 758bea50988SSathya Perla return NULL; 759bea50988SSathya Perla } else { 760bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 761bea50988SSathya Perla } 762bea50988SSathya Perla 763bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 764bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 765bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 766bea50988SSathya Perla 767bea50988SSathya Perla return dest_wrb; 768bea50988SSathya Perla } 769bea50988SSathya Perla 770bea50988SSathya Perla /* Must be used only in process context */ 771bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 772bea50988SSathya Perla struct be_mcc_wrb *wrb) 773bea50988SSathya Perla { 774bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 775bea50988SSathya Perla int status; 776bea50988SSathya Perla 777bea50988SSathya Perla status = be_cmd_lock(adapter); 778bea50988SSathya Perla if (status) 779bea50988SSathya Perla return status; 780bea50988SSathya Perla 781bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 782bea50988SSathya Perla if (!dest_wrb) 783bea50988SSathya Perla return -EBUSY; 784bea50988SSathya Perla 785bea50988SSathya Perla if (use_mcc(adapter)) 786bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 787bea50988SSathya Perla else 788bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 789bea50988SSathya Perla 790bea50988SSathya Perla if (!status) 791bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 792bea50988SSathya Perla 793bea50988SSathya Perla be_cmd_unlock(adapter); 794bea50988SSathya Perla return status; 795bea50988SSathya Perla } 796bea50988SSathya Perla 7979aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7989aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7999aebddd1SJeff Kirsher */ 8009aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 8019aebddd1SJeff Kirsher { 8029aebddd1SJeff Kirsher u8 *wrb; 8039aebddd1SJeff Kirsher int status; 8049aebddd1SJeff Kirsher 805bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 806bf99e50dSPadmanabh Ratnakar return 0; 807bf99e50dSPadmanabh Ratnakar 8089aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8099aebddd1SJeff Kirsher return -1; 8109aebddd1SJeff Kirsher 8119aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8129aebddd1SJeff Kirsher *wrb++ = 0xFF; 8139aebddd1SJeff Kirsher *wrb++ = 0x12; 8149aebddd1SJeff Kirsher *wrb++ = 0x34; 8159aebddd1SJeff Kirsher *wrb++ = 0xFF; 8169aebddd1SJeff Kirsher *wrb++ = 0xFF; 8179aebddd1SJeff Kirsher *wrb++ = 0x56; 8189aebddd1SJeff Kirsher *wrb++ = 0x78; 8199aebddd1SJeff Kirsher *wrb = 0xFF; 8209aebddd1SJeff Kirsher 8219aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8229aebddd1SJeff Kirsher 8239aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8249aebddd1SJeff Kirsher return status; 8259aebddd1SJeff Kirsher } 8269aebddd1SJeff Kirsher 8279aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8289aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8299aebddd1SJeff Kirsher */ 8309aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8319aebddd1SJeff Kirsher { 8329aebddd1SJeff Kirsher u8 *wrb; 8339aebddd1SJeff Kirsher int status; 8349aebddd1SJeff Kirsher 835bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 836bf99e50dSPadmanabh Ratnakar return 0; 837bf99e50dSPadmanabh Ratnakar 8389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8399aebddd1SJeff Kirsher return -1; 8409aebddd1SJeff Kirsher 8419aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8429aebddd1SJeff Kirsher *wrb++ = 0xFF; 8439aebddd1SJeff Kirsher *wrb++ = 0xAA; 8449aebddd1SJeff Kirsher *wrb++ = 0xBB; 8459aebddd1SJeff Kirsher *wrb++ = 0xFF; 8469aebddd1SJeff Kirsher *wrb++ = 0xFF; 8479aebddd1SJeff Kirsher *wrb++ = 0xCC; 8489aebddd1SJeff Kirsher *wrb++ = 0xDD; 8499aebddd1SJeff Kirsher *wrb = 0xFF; 8509aebddd1SJeff Kirsher 8519aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8529aebddd1SJeff Kirsher 8539aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8549aebddd1SJeff Kirsher return status; 8559aebddd1SJeff Kirsher } 856bf99e50dSPadmanabh Ratnakar 857f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8589aebddd1SJeff Kirsher { 8599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8609aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 861f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 862f2f781a7SSathya Perla int status, ver = 0; 8639aebddd1SJeff Kirsher 8649aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8659aebddd1SJeff Kirsher return -1; 8669aebddd1SJeff Kirsher 8679aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8689aebddd1SJeff Kirsher req = embedded_payload(wrb); 8699aebddd1SJeff Kirsher 870106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 871106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 8729aebddd1SJeff Kirsher 873f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 874f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 875f2f781a7SSathya Perla ver = 2; 876f2f781a7SSathya Perla 877f2f781a7SSathya Perla req->hdr.version = ver; 8789aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8799aebddd1SJeff Kirsher 8809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8819aebddd1SJeff Kirsher /* 4byte eqe*/ 8829aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8839aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 884f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 8859aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 8869aebddd1SJeff Kirsher 8879aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8889aebddd1SJeff Kirsher 8899aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8909aebddd1SJeff Kirsher if (!status) { 8919aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 892f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 893f2f781a7SSathya Perla eqo->msix_idx = 894f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 895f2f781a7SSathya Perla eqo->q.created = true; 8969aebddd1SJeff Kirsher } 8979aebddd1SJeff Kirsher 8989aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8999aebddd1SJeff Kirsher return status; 9009aebddd1SJeff Kirsher } 9019aebddd1SJeff Kirsher 902f9449ab7SSathya Perla /* Use MCC */ 9039aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 9045ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 9059aebddd1SJeff Kirsher { 9069aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9079aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 9089aebddd1SJeff Kirsher int status; 9099aebddd1SJeff Kirsher 910f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 9119aebddd1SJeff Kirsher 912f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 913f9449ab7SSathya Perla if (!wrb) { 914f9449ab7SSathya Perla status = -EBUSY; 915f9449ab7SSathya Perla goto err; 916f9449ab7SSathya Perla } 9179aebddd1SJeff Kirsher req = embedded_payload(wrb); 9189aebddd1SJeff Kirsher 919106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 920106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 9215ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9229aebddd1SJeff Kirsher if (permanent) { 9239aebddd1SJeff Kirsher req->permanent = 1; 9249aebddd1SJeff Kirsher } else { 9259aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 926590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9279aebddd1SJeff Kirsher req->permanent = 0; 9289aebddd1SJeff Kirsher } 9299aebddd1SJeff Kirsher 930f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9319aebddd1SJeff Kirsher if (!status) { 9329aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9339aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9349aebddd1SJeff Kirsher } 9359aebddd1SJeff Kirsher 936f9449ab7SSathya Perla err: 937f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9389aebddd1SJeff Kirsher return status; 9399aebddd1SJeff Kirsher } 9409aebddd1SJeff Kirsher 9419aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9429aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9439aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9449aebddd1SJeff Kirsher { 9459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9469aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9479aebddd1SJeff Kirsher int status; 9489aebddd1SJeff Kirsher 9499aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9509aebddd1SJeff Kirsher 9519aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9529aebddd1SJeff Kirsher if (!wrb) { 9539aebddd1SJeff Kirsher status = -EBUSY; 9549aebddd1SJeff Kirsher goto err; 9559aebddd1SJeff Kirsher } 9569aebddd1SJeff Kirsher req = embedded_payload(wrb); 9579aebddd1SJeff Kirsher 958106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 959106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 9609aebddd1SJeff Kirsher 9619aebddd1SJeff Kirsher req->hdr.domain = domain; 9629aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9639aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9649aebddd1SJeff Kirsher 9659aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9669aebddd1SJeff Kirsher if (!status) { 9679aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 9689aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 9699aebddd1SJeff Kirsher } 9709aebddd1SJeff Kirsher 9719aebddd1SJeff Kirsher err: 9729aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 973e3a7ae2cSSomnath Kotur 974e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 975e3a7ae2cSSomnath Kotur status = -EPERM; 976e3a7ae2cSSomnath Kotur 9779aebddd1SJeff Kirsher return status; 9789aebddd1SJeff Kirsher } 9799aebddd1SJeff Kirsher 9809aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 98130128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9829aebddd1SJeff Kirsher { 9839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9849aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 9859aebddd1SJeff Kirsher int status; 9869aebddd1SJeff Kirsher 98730128031SSathya Perla if (pmac_id == -1) 98830128031SSathya Perla return 0; 98930128031SSathya Perla 9909aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9919aebddd1SJeff Kirsher 9929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9939aebddd1SJeff Kirsher if (!wrb) { 9949aebddd1SJeff Kirsher status = -EBUSY; 9959aebddd1SJeff Kirsher goto err; 9969aebddd1SJeff Kirsher } 9979aebddd1SJeff Kirsher req = embedded_payload(wrb); 9989aebddd1SJeff Kirsher 999106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1000106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 10019aebddd1SJeff Kirsher 10029aebddd1SJeff Kirsher req->hdr.domain = dom; 10039aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 10049aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 10059aebddd1SJeff Kirsher 10069aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10079aebddd1SJeff Kirsher 10089aebddd1SJeff Kirsher err: 10099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10109aebddd1SJeff Kirsher return status; 10119aebddd1SJeff Kirsher } 10129aebddd1SJeff Kirsher 10139aebddd1SJeff Kirsher /* Uses Mbox */ 101410ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 101510ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10169aebddd1SJeff Kirsher { 10179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10189aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10199aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10209aebddd1SJeff Kirsher void *ctxt; 10219aebddd1SJeff Kirsher int status; 10229aebddd1SJeff Kirsher 10239aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10249aebddd1SJeff Kirsher return -1; 10259aebddd1SJeff Kirsher 10269aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10279aebddd1SJeff Kirsher req = embedded_payload(wrb); 10289aebddd1SJeff Kirsher ctxt = &req->context; 10299aebddd1SJeff Kirsher 1030106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1031106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 10329aebddd1SJeff Kirsher 10339aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1034bbdc42f8SAjit Khaparde 1035bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10369aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10379aebddd1SJeff Kirsher coalesce_wm); 10389aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10399aebddd1SJeff Kirsher ctxt, no_delay); 10409aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10419aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 10429aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10439aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10449aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1045bbdc42f8SAjit Khaparde } else { 1046bbdc42f8SAjit Khaparde req->hdr.version = 2; 1047bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 104809e83a9dSAjit Khaparde 104909e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 105009e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 105109e83a9dSAjit Khaparde */ 105209e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 105309e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 105409e83a9dSAjit Khaparde ctxt, coalesce_wm); 1055bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1056bbdc42f8SAjit Khaparde no_delay); 1057bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1058bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 1059bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1060bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 1061bbdc42f8SAjit Khaparde ctxt, 1); 1062bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 1063bbdc42f8SAjit Khaparde ctxt, eq->id); 10649aebddd1SJeff Kirsher } 10659aebddd1SJeff Kirsher 10669aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10679aebddd1SJeff Kirsher 10689aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10699aebddd1SJeff Kirsher 10709aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10719aebddd1SJeff Kirsher if (!status) { 10729aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 10739aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 10749aebddd1SJeff Kirsher cq->created = true; 10759aebddd1SJeff Kirsher } 10769aebddd1SJeff Kirsher 10779aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10789aebddd1SJeff Kirsher 10799aebddd1SJeff Kirsher return status; 10809aebddd1SJeff Kirsher } 10819aebddd1SJeff Kirsher 10829aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10839aebddd1SJeff Kirsher { 10849aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 10859aebddd1SJeff Kirsher if (len_encoded == 16) 10869aebddd1SJeff Kirsher len_encoded = 0; 10879aebddd1SJeff Kirsher return len_encoded; 10889aebddd1SJeff Kirsher } 10899aebddd1SJeff Kirsher 10904188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 10919aebddd1SJeff Kirsher struct be_queue_info *mccq, 10929aebddd1SJeff Kirsher struct be_queue_info *cq) 10939aebddd1SJeff Kirsher { 10949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10959aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10969aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10979aebddd1SJeff Kirsher void *ctxt; 10989aebddd1SJeff Kirsher int status; 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11019aebddd1SJeff Kirsher return -1; 11029aebddd1SJeff Kirsher 11039aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11049aebddd1SJeff Kirsher req = embedded_payload(wrb); 11059aebddd1SJeff Kirsher ctxt = &req->context; 11069aebddd1SJeff Kirsher 1107106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1108106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 11099aebddd1SJeff Kirsher 11109aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1111666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 11129aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11139aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11149aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11159aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1116666d39c7SVasundhara Volam } else { 1117666d39c7SVasundhara Volam req->hdr.version = 1; 1118666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1119666d39c7SVasundhara Volam 1120666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1121666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1122666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1123666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1124666d39c7SVasundhara Volam ctxt, cq->id); 1125666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1126666d39c7SVasundhara Volam ctxt, 1); 11279aebddd1SJeff Kirsher } 11289aebddd1SJeff Kirsher 11299aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11309aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1131bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11329aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11339aebddd1SJeff Kirsher 11349aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11359aebddd1SJeff Kirsher 11369aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11379aebddd1SJeff Kirsher if (!status) { 11389aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11399aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11409aebddd1SJeff Kirsher mccq->created = true; 11419aebddd1SJeff Kirsher } 11429aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11439aebddd1SJeff Kirsher 11449aebddd1SJeff Kirsher return status; 11459aebddd1SJeff Kirsher } 11469aebddd1SJeff Kirsher 11474188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11489aebddd1SJeff Kirsher struct be_queue_info *mccq, 11499aebddd1SJeff Kirsher struct be_queue_info *cq) 11509aebddd1SJeff Kirsher { 11519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11529aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11539aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11549aebddd1SJeff Kirsher void *ctxt; 11559aebddd1SJeff Kirsher int status; 11569aebddd1SJeff Kirsher 11579aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11589aebddd1SJeff Kirsher return -1; 11599aebddd1SJeff Kirsher 11609aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11619aebddd1SJeff Kirsher req = embedded_payload(wrb); 11629aebddd1SJeff Kirsher ctxt = &req->context; 11639aebddd1SJeff Kirsher 1164106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1165106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 11669aebddd1SJeff Kirsher 11679aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 11689aebddd1SJeff Kirsher 11699aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11709aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11719aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11729aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11739aebddd1SJeff Kirsher 11749aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11759aebddd1SJeff Kirsher 11769aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11779aebddd1SJeff Kirsher 11789aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11799aebddd1SJeff Kirsher if (!status) { 11809aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11819aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11829aebddd1SJeff Kirsher mccq->created = true; 11839aebddd1SJeff Kirsher } 11849aebddd1SJeff Kirsher 11859aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11869aebddd1SJeff Kirsher return status; 11879aebddd1SJeff Kirsher } 11889aebddd1SJeff Kirsher 11899aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 11909aebddd1SJeff Kirsher struct be_queue_info *mccq, 11919aebddd1SJeff Kirsher struct be_queue_info *cq) 11929aebddd1SJeff Kirsher { 11939aebddd1SJeff Kirsher int status; 11949aebddd1SJeff Kirsher 11959aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1196666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 11979aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11989aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11999aebddd1SJeff Kirsher "and FCoE traffic"); 12009aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 12019aebddd1SJeff Kirsher } 12029aebddd1SJeff Kirsher return status; 12039aebddd1SJeff Kirsher } 12049aebddd1SJeff Kirsher 120594d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 12069aebddd1SJeff Kirsher { 12077707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 12089aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 120994d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 121094d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 12119aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 121294d73aaaSVasundhara Volam int status, ver = 0; 12139aebddd1SJeff Kirsher 12147707133cSSathya Perla req = embedded_payload(&wrb); 1215106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 12167707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 12179aebddd1SJeff Kirsher 12189aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12199aebddd1SJeff Kirsher req->hdr.version = 1; 122094d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 122194d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 122294d73aaaSVasundhara Volam req->hdr.version = 2; 122394d73aaaSVasundhara Volam } else { /* For SH */ 122494d73aaaSVasundhara Volam req->hdr.version = 2; 12259aebddd1SJeff Kirsher } 12269aebddd1SJeff Kirsher 122781b02655SVasundhara Volam if (req->hdr.version > 0) 122881b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12299aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12309aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12319aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 123294d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 123394d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12349aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 123594d73aaaSVasundhara Volam ver = req->hdr.version; 123694d73aaaSVasundhara Volam 12377707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12389aebddd1SJeff Kirsher if (!status) { 12397707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12409aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 124194d73aaaSVasundhara Volam if (ver == 2) 124294d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 124394d73aaaSVasundhara Volam else 124494d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12459aebddd1SJeff Kirsher txq->created = true; 12469aebddd1SJeff Kirsher } 12479aebddd1SJeff Kirsher 12489aebddd1SJeff Kirsher return status; 12499aebddd1SJeff Kirsher } 12509aebddd1SJeff Kirsher 12519aebddd1SJeff Kirsher /* Uses MCC */ 12529aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12539aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 125410ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12559aebddd1SJeff Kirsher { 12569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12579aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12589aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12599aebddd1SJeff Kirsher int status; 12609aebddd1SJeff Kirsher 12619aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12629aebddd1SJeff Kirsher 12639aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12649aebddd1SJeff Kirsher if (!wrb) { 12659aebddd1SJeff Kirsher status = -EBUSY; 12669aebddd1SJeff Kirsher goto err; 12679aebddd1SJeff Kirsher } 12689aebddd1SJeff Kirsher req = embedded_payload(wrb); 12699aebddd1SJeff Kirsher 1270106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1271106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12729aebddd1SJeff Kirsher 12739aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12749aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12759aebddd1SJeff Kirsher req->num_pages = 2; 12769aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12779aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 127810ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12799aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12809aebddd1SJeff Kirsher 12819aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12829aebddd1SJeff Kirsher if (!status) { 12839aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12849aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12859aebddd1SJeff Kirsher rxq->created = true; 12869aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12879aebddd1SJeff Kirsher } 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher err: 12909aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12919aebddd1SJeff Kirsher return status; 12929aebddd1SJeff Kirsher } 12939aebddd1SJeff Kirsher 12949aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12959aebddd1SJeff Kirsher * Uses Mbox 12969aebddd1SJeff Kirsher */ 12979aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12989aebddd1SJeff Kirsher int queue_type) 12999aebddd1SJeff Kirsher { 13009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13019aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13029aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 13039aebddd1SJeff Kirsher int status; 13049aebddd1SJeff Kirsher 13059aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13069aebddd1SJeff Kirsher return -1; 13079aebddd1SJeff Kirsher 13089aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13099aebddd1SJeff Kirsher req = embedded_payload(wrb); 13109aebddd1SJeff Kirsher 13119aebddd1SJeff Kirsher switch (queue_type) { 13129aebddd1SJeff Kirsher case QTYPE_EQ: 13139aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13149aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 13159aebddd1SJeff Kirsher break; 13169aebddd1SJeff Kirsher case QTYPE_CQ: 13179aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13189aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13199aebddd1SJeff Kirsher break; 13209aebddd1SJeff Kirsher case QTYPE_TXQ: 13219aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13229aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13239aebddd1SJeff Kirsher break; 13249aebddd1SJeff Kirsher case QTYPE_RXQ: 13259aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13269aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13279aebddd1SJeff Kirsher break; 13289aebddd1SJeff Kirsher case QTYPE_MCCQ: 13299aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13309aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13319aebddd1SJeff Kirsher break; 13329aebddd1SJeff Kirsher default: 13339aebddd1SJeff Kirsher BUG(); 13349aebddd1SJeff Kirsher } 13359aebddd1SJeff Kirsher 1336106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1337106df1e3SSomnath Kotur NULL); 13389aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13399aebddd1SJeff Kirsher 13409aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13419aebddd1SJeff Kirsher q->created = false; 13429aebddd1SJeff Kirsher 13439aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13449aebddd1SJeff Kirsher return status; 13459aebddd1SJeff Kirsher } 13469aebddd1SJeff Kirsher 13479aebddd1SJeff Kirsher /* Uses MCC */ 13489aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13499aebddd1SJeff Kirsher { 13509aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13519aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13529aebddd1SJeff Kirsher int status; 13539aebddd1SJeff Kirsher 13549aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13559aebddd1SJeff Kirsher 13569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13579aebddd1SJeff Kirsher if (!wrb) { 13589aebddd1SJeff Kirsher status = -EBUSY; 13599aebddd1SJeff Kirsher goto err; 13609aebddd1SJeff Kirsher } 13619aebddd1SJeff Kirsher req = embedded_payload(wrb); 13629aebddd1SJeff Kirsher 1363106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1364106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13659aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13669aebddd1SJeff Kirsher 13679aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13689aebddd1SJeff Kirsher q->created = false; 13699aebddd1SJeff Kirsher 13709aebddd1SJeff Kirsher err: 13719aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13729aebddd1SJeff Kirsher return status; 13739aebddd1SJeff Kirsher } 13749aebddd1SJeff Kirsher 13759aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1376bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 13779aebddd1SJeff Kirsher */ 13789aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13791578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13809aebddd1SJeff Kirsher { 1381bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 13829aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13839aebddd1SJeff Kirsher int status; 13849aebddd1SJeff Kirsher 1385bea50988SSathya Perla req = embedded_payload(&wrb); 1386106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1387bea50988SSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL); 13889aebddd1SJeff Kirsher req->hdr.domain = domain; 13899aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13909aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1391f9449ab7SSathya Perla req->pmac_invalid = true; 13929aebddd1SJeff Kirsher 1393bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13949aebddd1SJeff Kirsher if (!status) { 1395bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 13969aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1397b5bb9776SSathya Perla 1398b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1399b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1400b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 14019aebddd1SJeff Kirsher } 14029aebddd1SJeff Kirsher return status; 14039aebddd1SJeff Kirsher } 14049aebddd1SJeff Kirsher 1405f9449ab7SSathya Perla /* Uses MCCQ */ 140630128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 14079aebddd1SJeff Kirsher { 14089aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14099aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 14109aebddd1SJeff Kirsher int status; 14119aebddd1SJeff Kirsher 141230128031SSathya Perla if (interface_id == -1) 1413f9449ab7SSathya Perla return 0; 14149aebddd1SJeff Kirsher 1415f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1416f9449ab7SSathya Perla 1417f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1418f9449ab7SSathya Perla if (!wrb) { 1419f9449ab7SSathya Perla status = -EBUSY; 1420f9449ab7SSathya Perla goto err; 1421f9449ab7SSathya Perla } 14229aebddd1SJeff Kirsher req = embedded_payload(wrb); 14239aebddd1SJeff Kirsher 1424106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1425106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 14269aebddd1SJeff Kirsher req->hdr.domain = domain; 14279aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14289aebddd1SJeff Kirsher 1429f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1430f9449ab7SSathya Perla err: 1431f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14329aebddd1SJeff Kirsher return status; 14339aebddd1SJeff Kirsher } 14349aebddd1SJeff Kirsher 14359aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14369aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14379aebddd1SJeff Kirsher * Uses asynchronous MCC 14389aebddd1SJeff Kirsher */ 14399aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14409aebddd1SJeff Kirsher { 14419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14429aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14439aebddd1SJeff Kirsher int status = 0; 14449aebddd1SJeff Kirsher 14459aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14469aebddd1SJeff Kirsher 14479aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14489aebddd1SJeff Kirsher if (!wrb) { 14499aebddd1SJeff Kirsher status = -EBUSY; 14509aebddd1SJeff Kirsher goto err; 14519aebddd1SJeff Kirsher } 14529aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14539aebddd1SJeff Kirsher 1454106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1455106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 14569aebddd1SJeff Kirsher 1457ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 145861000861SAjit Khaparde if (BE2_chip(adapter)) 145961000861SAjit Khaparde hdr->version = 0; 146061000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 14619aebddd1SJeff Kirsher hdr->version = 1; 146261000861SAjit Khaparde else 146361000861SAjit Khaparde hdr->version = 2; 14649aebddd1SJeff Kirsher 14659aebddd1SJeff Kirsher be_mcc_notify(adapter); 14669aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14679aebddd1SJeff Kirsher 14689aebddd1SJeff Kirsher err: 14699aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14709aebddd1SJeff Kirsher return status; 14719aebddd1SJeff Kirsher } 14729aebddd1SJeff Kirsher 14739aebddd1SJeff Kirsher /* Lancer Stats */ 14749aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14759aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14769aebddd1SJeff Kirsher { 14779aebddd1SJeff Kirsher 14789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14799aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14809aebddd1SJeff Kirsher int status = 0; 14819aebddd1SJeff Kirsher 1482f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1483f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1484f25b119cSPadmanabh Ratnakar return -EPERM; 1485f25b119cSPadmanabh Ratnakar 14869aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14879aebddd1SJeff Kirsher 14889aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14899aebddd1SJeff Kirsher if (!wrb) { 14909aebddd1SJeff Kirsher status = -EBUSY; 14919aebddd1SJeff Kirsher goto err; 14929aebddd1SJeff Kirsher } 14939aebddd1SJeff Kirsher req = nonemb_cmd->va; 14949aebddd1SJeff Kirsher 1495106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1496106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1497106df1e3SSomnath Kotur nonemb_cmd); 14989aebddd1SJeff Kirsher 1499d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 15009aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 15019aebddd1SJeff Kirsher 15029aebddd1SJeff Kirsher be_mcc_notify(adapter); 15039aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15049aebddd1SJeff Kirsher 15059aebddd1SJeff Kirsher err: 15069aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15079aebddd1SJeff Kirsher return status; 15089aebddd1SJeff Kirsher } 15099aebddd1SJeff Kirsher 1510323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1511323ff71eSSathya Perla { 1512323ff71eSSathya Perla switch (mac_speed) { 1513323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1514323ff71eSSathya Perla return 0; 1515323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1516323ff71eSSathya Perla return 10; 1517323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1518323ff71eSSathya Perla return 100; 1519323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1520323ff71eSSathya Perla return 1000; 1521323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1522323ff71eSSathya Perla return 10000; 1523b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1524b971f847SVasundhara Volam return 20000; 1525b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1526b971f847SVasundhara Volam return 25000; 1527b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1528b971f847SVasundhara Volam return 40000; 1529323ff71eSSathya Perla } 1530323ff71eSSathya Perla return 0; 1531323ff71eSSathya Perla } 1532323ff71eSSathya Perla 1533323ff71eSSathya Perla /* Uses synchronous mcc 1534323ff71eSSathya Perla * Returns link_speed in Mbps 1535323ff71eSSathya Perla */ 1536323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1537323ff71eSSathya Perla u8 *link_status, u32 dom) 15389aebddd1SJeff Kirsher { 15399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15409aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15419aebddd1SJeff Kirsher int status; 15429aebddd1SJeff Kirsher 15439aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15449aebddd1SJeff Kirsher 1545b236916aSAjit Khaparde if (link_status) 1546b236916aSAjit Khaparde *link_status = LINK_DOWN; 1547b236916aSAjit Khaparde 15489aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15499aebddd1SJeff Kirsher if (!wrb) { 15509aebddd1SJeff Kirsher status = -EBUSY; 15519aebddd1SJeff Kirsher goto err; 15529aebddd1SJeff Kirsher } 15539aebddd1SJeff Kirsher req = embedded_payload(wrb); 15549aebddd1SJeff Kirsher 155557cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 155657cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 155757cd80d4SPadmanabh Ratnakar 1558ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1559ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1560daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1561daad6167SPadmanabh Ratnakar 156257cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15639aebddd1SJeff Kirsher 15649aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15659aebddd1SJeff Kirsher if (!status) { 15669aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1567323ff71eSSathya Perla if (link_speed) { 1568323ff71eSSathya Perla *link_speed = resp->link_speed ? 1569323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1570323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1571323ff71eSSathya Perla 1572323ff71eSSathya Perla if (!resp->logical_link_status) 1573323ff71eSSathya Perla *link_speed = 0; 15749aebddd1SJeff Kirsher } 1575b236916aSAjit Khaparde if (link_status) 1576b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15779aebddd1SJeff Kirsher } 15789aebddd1SJeff Kirsher 15799aebddd1SJeff Kirsher err: 15809aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15819aebddd1SJeff Kirsher return status; 15829aebddd1SJeff Kirsher } 15839aebddd1SJeff Kirsher 15849aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15859aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15869aebddd1SJeff Kirsher { 15879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15889aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1589117affe3SVasundhara Volam int status = 0; 15909aebddd1SJeff Kirsher 15919aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15929aebddd1SJeff Kirsher 15939aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15949aebddd1SJeff Kirsher if (!wrb) { 15959aebddd1SJeff Kirsher status = -EBUSY; 15969aebddd1SJeff Kirsher goto err; 15979aebddd1SJeff Kirsher } 15989aebddd1SJeff Kirsher req = embedded_payload(wrb); 15999aebddd1SJeff Kirsher 1600106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1601106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1602106df1e3SSomnath Kotur wrb, NULL); 16039aebddd1SJeff Kirsher 16043de09455SSomnath Kotur be_mcc_notify(adapter); 16059aebddd1SJeff Kirsher 16069aebddd1SJeff Kirsher err: 16079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16089aebddd1SJeff Kirsher return status; 16099aebddd1SJeff Kirsher } 16109aebddd1SJeff Kirsher 16119aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16129aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 16139aebddd1SJeff Kirsher { 16149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16159aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16169aebddd1SJeff Kirsher int status; 16179aebddd1SJeff Kirsher 16189aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16199aebddd1SJeff Kirsher 16209aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16219aebddd1SJeff Kirsher if (!wrb) { 16229aebddd1SJeff Kirsher status = -EBUSY; 16239aebddd1SJeff Kirsher goto err; 16249aebddd1SJeff Kirsher } 16259aebddd1SJeff Kirsher req = embedded_payload(wrb); 16269aebddd1SJeff Kirsher 1627106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1628106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 16299aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16309aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16319aebddd1SJeff Kirsher if (!status) { 16329aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16339aebddd1SJeff Kirsher if (log_size && resp->log_size) 16349aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16359aebddd1SJeff Kirsher sizeof(u32); 16369aebddd1SJeff Kirsher } 16379aebddd1SJeff Kirsher err: 16389aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16399aebddd1SJeff Kirsher return status; 16409aebddd1SJeff Kirsher } 16419aebddd1SJeff Kirsher 16429aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16439aebddd1SJeff Kirsher { 16449aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16469aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16479aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16489aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 16499aebddd1SJeff Kirsher int status; 16509aebddd1SJeff Kirsher 16519aebddd1SJeff Kirsher if (buf_len == 0) 16529aebddd1SJeff Kirsher return; 16539aebddd1SJeff Kirsher 16549aebddd1SJeff Kirsher total_size = buf_len; 16559aebddd1SJeff Kirsher 16569aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16579aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16589aebddd1SJeff Kirsher get_fat_cmd.size, 16599aebddd1SJeff Kirsher &get_fat_cmd.dma); 16609aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 16619aebddd1SJeff Kirsher status = -ENOMEM; 16629aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16639aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16649aebddd1SJeff Kirsher return; 16659aebddd1SJeff Kirsher } 16669aebddd1SJeff Kirsher 16679aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16689aebddd1SJeff Kirsher 16699aebddd1SJeff Kirsher while (total_size) { 16709aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16719aebddd1SJeff Kirsher total_size -= buf_size; 16729aebddd1SJeff Kirsher 16739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16749aebddd1SJeff Kirsher if (!wrb) { 16759aebddd1SJeff Kirsher status = -EBUSY; 16769aebddd1SJeff Kirsher goto err; 16779aebddd1SJeff Kirsher } 16789aebddd1SJeff Kirsher req = get_fat_cmd.va; 16799aebddd1SJeff Kirsher 16809aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1681106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1682106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1683106df1e3SSomnath Kotur &get_fat_cmd); 16849aebddd1SJeff Kirsher 16859aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16869aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16879aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16889aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16899aebddd1SJeff Kirsher 16909aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16919aebddd1SJeff Kirsher if (!status) { 16929aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16939aebddd1SJeff Kirsher memcpy(buf + offset, 16949aebddd1SJeff Kirsher resp->data_buffer, 169592aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16969aebddd1SJeff Kirsher } else { 16979aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16989aebddd1SJeff Kirsher goto err; 16999aebddd1SJeff Kirsher } 17009aebddd1SJeff Kirsher offset += buf_size; 17019aebddd1SJeff Kirsher log_offset += buf_size; 17029aebddd1SJeff Kirsher } 17039aebddd1SJeff Kirsher err: 17049aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 17059aebddd1SJeff Kirsher get_fat_cmd.va, 17069aebddd1SJeff Kirsher get_fat_cmd.dma); 17079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17089aebddd1SJeff Kirsher } 17099aebddd1SJeff Kirsher 171004b71175SSathya Perla /* Uses synchronous mcc */ 171104b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 171204b71175SSathya Perla char *fw_on_flash) 17139aebddd1SJeff Kirsher { 17149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17159aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 17169aebddd1SJeff Kirsher int status; 17179aebddd1SJeff Kirsher 171804b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17199aebddd1SJeff Kirsher 172004b71175SSathya Perla wrb = wrb_from_mccq(adapter); 172104b71175SSathya Perla if (!wrb) { 172204b71175SSathya Perla status = -EBUSY; 172304b71175SSathya Perla goto err; 172404b71175SSathya Perla } 172504b71175SSathya Perla 17269aebddd1SJeff Kirsher req = embedded_payload(wrb); 17279aebddd1SJeff Kirsher 1728106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1729106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 173004b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17319aebddd1SJeff Kirsher if (!status) { 17329aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 173304b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 173404b71175SSathya Perla if (fw_on_flash) 173504b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 17369aebddd1SJeff Kirsher } 173704b71175SSathya Perla err: 173804b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17399aebddd1SJeff Kirsher return status; 17409aebddd1SJeff Kirsher } 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17439aebddd1SJeff Kirsher * Uses async mcc 17449aebddd1SJeff Kirsher */ 17452632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 17462632bafdSSathya Perla int num) 17479aebddd1SJeff Kirsher { 17489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17499aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17502632bafdSSathya Perla int status = 0, i; 17519aebddd1SJeff Kirsher 17529aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17539aebddd1SJeff Kirsher 17549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17559aebddd1SJeff Kirsher if (!wrb) { 17569aebddd1SJeff Kirsher status = -EBUSY; 17579aebddd1SJeff Kirsher goto err; 17589aebddd1SJeff Kirsher } 17599aebddd1SJeff Kirsher req = embedded_payload(wrb); 17609aebddd1SJeff Kirsher 1761106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1762106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 17639aebddd1SJeff Kirsher 17642632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 17652632bafdSSathya Perla for (i = 0; i < num; i++) { 17662632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 17672632bafdSSathya Perla req->set_eqd[i].phase = 0; 17682632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 17692632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 17702632bafdSSathya Perla } 17719aebddd1SJeff Kirsher 17729aebddd1SJeff Kirsher be_mcc_notify(adapter); 17739aebddd1SJeff Kirsher err: 17749aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17759aebddd1SJeff Kirsher return status; 17769aebddd1SJeff Kirsher } 17779aebddd1SJeff Kirsher 17789aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17799aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1780012bd387SAjit Khaparde u32 num, bool promiscuous) 17819aebddd1SJeff Kirsher { 17829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17839aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17849aebddd1SJeff Kirsher int status; 17859aebddd1SJeff Kirsher 17869aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17879aebddd1SJeff Kirsher 17889aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17899aebddd1SJeff Kirsher if (!wrb) { 17909aebddd1SJeff Kirsher status = -EBUSY; 17919aebddd1SJeff Kirsher goto err; 17929aebddd1SJeff Kirsher } 17939aebddd1SJeff Kirsher req = embedded_payload(wrb); 17949aebddd1SJeff Kirsher 1795106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1796106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17979aebddd1SJeff Kirsher 17989aebddd1SJeff Kirsher req->interface_id = if_id; 17999aebddd1SJeff Kirsher req->promiscuous = promiscuous; 1800012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 18019aebddd1SJeff Kirsher req->num_vlan = num; 18029aebddd1SJeff Kirsher if (!promiscuous) { 18039aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 18049aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 18059aebddd1SJeff Kirsher } 18069aebddd1SJeff Kirsher 18079aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18089aebddd1SJeff Kirsher 18099aebddd1SJeff Kirsher err: 18109aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18119aebddd1SJeff Kirsher return status; 18129aebddd1SJeff Kirsher } 18139aebddd1SJeff Kirsher 18149aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 18159aebddd1SJeff Kirsher { 18169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18179aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 18189aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18199aebddd1SJeff Kirsher int status; 18209aebddd1SJeff Kirsher 18219aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18229aebddd1SJeff Kirsher 18239aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18249aebddd1SJeff Kirsher if (!wrb) { 18259aebddd1SJeff Kirsher status = -EBUSY; 18269aebddd1SJeff Kirsher goto err; 18279aebddd1SJeff Kirsher } 18289aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1829106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1830106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1831106df1e3SSomnath Kotur wrb, mem); 18329aebddd1SJeff Kirsher 18339aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18349aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18359aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1836c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1837c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18389aebddd1SJeff Kirsher if (value == ON) 18399aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1840c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1841c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18429aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 18439aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 18449aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1845d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1846d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1847d9d604f8SAjit Khaparde 1848d9d604f8SAjit Khaparde if (value == ON) 1849d9d604f8SAjit Khaparde req->if_flags = 1850d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 18519aebddd1SJeff Kirsher } else { 18529aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 18539aebddd1SJeff Kirsher int i = 0; 18549aebddd1SJeff Kirsher 18558e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 18568e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 18571610c79fSPadmanabh Ratnakar 18581610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 18591610c79fSPadmanabh Ratnakar * and not setting flags field 18601610c79fSPadmanabh Ratnakar */ 18611610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1862abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 186392bf14abSSathya Perla be_if_cap_flags(adapter)); 1864016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 18659aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 18669aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 18679aebddd1SJeff Kirsher } 18689aebddd1SJeff Kirsher 1869012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1870012bd387SAjit Khaparde req->if_flags_mask) { 1871012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1872012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1873012bd387SAjit Khaparde req->if_flags_mask); 1874012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1875012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1876012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1877012bd387SAjit Khaparde } 1878012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1879012bd387SAjit Khaparde 18809aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1881012bd387SAjit Khaparde 18829aebddd1SJeff Kirsher err: 18839aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18849aebddd1SJeff Kirsher return status; 18859aebddd1SJeff Kirsher } 18869aebddd1SJeff Kirsher 18879aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 18889aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 18899aebddd1SJeff Kirsher { 18909aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18919aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 18929aebddd1SJeff Kirsher int status; 18939aebddd1SJeff Kirsher 1894f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1895f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1896f25b119cSPadmanabh Ratnakar return -EPERM; 1897f25b119cSPadmanabh Ratnakar 18989aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18999aebddd1SJeff Kirsher 19009aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19019aebddd1SJeff Kirsher if (!wrb) { 19029aebddd1SJeff Kirsher status = -EBUSY; 19039aebddd1SJeff Kirsher goto err; 19049aebddd1SJeff Kirsher } 19059aebddd1SJeff Kirsher req = embedded_payload(wrb); 19069aebddd1SJeff Kirsher 1907106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1908106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 19099aebddd1SJeff Kirsher 19109aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 19119aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 19129aebddd1SJeff Kirsher 19139aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19149aebddd1SJeff Kirsher 19159aebddd1SJeff Kirsher err: 19169aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19179aebddd1SJeff Kirsher return status; 19189aebddd1SJeff Kirsher } 19199aebddd1SJeff Kirsher 19209aebddd1SJeff Kirsher /* Uses sycn mcc */ 19219aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19229aebddd1SJeff Kirsher { 19239aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19249aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 19259aebddd1SJeff Kirsher int status; 19269aebddd1SJeff Kirsher 1927f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1928f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1929f25b119cSPadmanabh Ratnakar return -EPERM; 1930f25b119cSPadmanabh Ratnakar 19319aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19329aebddd1SJeff Kirsher 19339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19349aebddd1SJeff Kirsher if (!wrb) { 19359aebddd1SJeff Kirsher status = -EBUSY; 19369aebddd1SJeff Kirsher goto err; 19379aebddd1SJeff Kirsher } 19389aebddd1SJeff Kirsher req = embedded_payload(wrb); 19399aebddd1SJeff Kirsher 1940106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1941106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 19429aebddd1SJeff Kirsher 19439aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19449aebddd1SJeff Kirsher if (!status) { 19459aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 19469aebddd1SJeff Kirsher embedded_payload(wrb); 19479aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 19489aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 19499aebddd1SJeff Kirsher } 19509aebddd1SJeff Kirsher 19519aebddd1SJeff Kirsher err: 19529aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19539aebddd1SJeff Kirsher return status; 19549aebddd1SJeff Kirsher } 19559aebddd1SJeff Kirsher 19569aebddd1SJeff Kirsher /* Uses mbox */ 19579aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19580ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 19599aebddd1SJeff Kirsher { 19609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19619aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 19629aebddd1SJeff Kirsher int status; 19639aebddd1SJeff Kirsher 19649aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19659aebddd1SJeff Kirsher return -1; 19669aebddd1SJeff Kirsher 19679aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19689aebddd1SJeff Kirsher req = embedded_payload(wrb); 19699aebddd1SJeff Kirsher 1970106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1971106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 19729aebddd1SJeff Kirsher 19739aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19749aebddd1SJeff Kirsher if (!status) { 19759aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 19769aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 19779aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 19789aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 19790ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 19809aebddd1SJeff Kirsher } 19819aebddd1SJeff Kirsher 19829aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19839aebddd1SJeff Kirsher return status; 19849aebddd1SJeff Kirsher } 19859aebddd1SJeff Kirsher 19869aebddd1SJeff Kirsher /* Uses mbox */ 19879aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 19889aebddd1SJeff Kirsher { 19899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19909aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 19919aebddd1SJeff Kirsher int status; 19929aebddd1SJeff Kirsher 1993bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1994bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1995bf99e50dSPadmanabh Ratnakar if (!status) { 1996bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1997bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1998bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1999bf99e50dSPadmanabh Ratnakar } 2000bf99e50dSPadmanabh Ratnakar if (status) { 2001bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2002bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2003bf99e50dSPadmanabh Ratnakar } 2004bf99e50dSPadmanabh Ratnakar return status; 2005bf99e50dSPadmanabh Ratnakar } 2006bf99e50dSPadmanabh Ratnakar 20079aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20089aebddd1SJeff Kirsher return -1; 20099aebddd1SJeff Kirsher 20109aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20119aebddd1SJeff Kirsher req = embedded_payload(wrb); 20129aebddd1SJeff Kirsher 2013106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2014106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 20159aebddd1SJeff Kirsher 20169aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20179aebddd1SJeff Kirsher 20189aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20199aebddd1SJeff Kirsher return status; 20209aebddd1SJeff Kirsher } 20219aebddd1SJeff Kirsher 2022594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2023594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 20249aebddd1SJeff Kirsher { 20259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20269aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 202765f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 202865f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 202965f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 20309aebddd1SJeff Kirsher int status; 20319aebddd1SJeff Kirsher 2032da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2033da1388d6SVasundhara Volam return 0; 2034da1388d6SVasundhara Volam 20359aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20369aebddd1SJeff Kirsher return -1; 20379aebddd1SJeff Kirsher 20389aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20399aebddd1SJeff Kirsher req = embedded_payload(wrb); 20409aebddd1SJeff Kirsher 2041106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2042106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 20439aebddd1SJeff Kirsher 20449aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2045594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 20469aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2047594ad54aSSuresh Reddy 2048594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 2049594ad54aSSuresh Reddy req->hdr.version = 1; 2050594ad54aSSuresh Reddy 20519aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 20529aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 20539aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 20549aebddd1SJeff Kirsher 20559aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20569aebddd1SJeff Kirsher 20579aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20589aebddd1SJeff Kirsher return status; 20599aebddd1SJeff Kirsher } 20609aebddd1SJeff Kirsher 20619aebddd1SJeff Kirsher /* Uses sync mcc */ 20629aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 20639aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 20649aebddd1SJeff Kirsher { 20659aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20669aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 20679aebddd1SJeff Kirsher int status; 20689aebddd1SJeff Kirsher 20699aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20709aebddd1SJeff Kirsher 20719aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20729aebddd1SJeff Kirsher if (!wrb) { 20739aebddd1SJeff Kirsher status = -EBUSY; 20749aebddd1SJeff Kirsher goto err; 20759aebddd1SJeff Kirsher } 20769aebddd1SJeff Kirsher req = embedded_payload(wrb); 20779aebddd1SJeff Kirsher 2078106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2079106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 20809aebddd1SJeff Kirsher 20819aebddd1SJeff Kirsher req->port_num = port_num; 20829aebddd1SJeff Kirsher req->beacon_state = state; 20839aebddd1SJeff Kirsher req->beacon_duration = bcn; 20849aebddd1SJeff Kirsher req->status_duration = sts; 20859aebddd1SJeff Kirsher 20869aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20879aebddd1SJeff Kirsher 20889aebddd1SJeff Kirsher err: 20899aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20909aebddd1SJeff Kirsher return status; 20919aebddd1SJeff Kirsher } 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher /* Uses sync mcc */ 20949aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 20959aebddd1SJeff Kirsher { 20969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20979aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20989aebddd1SJeff Kirsher int status; 20999aebddd1SJeff Kirsher 21009aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21019aebddd1SJeff Kirsher 21029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21039aebddd1SJeff Kirsher if (!wrb) { 21049aebddd1SJeff Kirsher status = -EBUSY; 21059aebddd1SJeff Kirsher goto err; 21069aebddd1SJeff Kirsher } 21079aebddd1SJeff Kirsher req = embedded_payload(wrb); 21089aebddd1SJeff Kirsher 2109106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2110106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 21119aebddd1SJeff Kirsher 21129aebddd1SJeff Kirsher req->port_num = port_num; 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21159aebddd1SJeff Kirsher if (!status) { 21169aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 21179aebddd1SJeff Kirsher embedded_payload(wrb); 21189aebddd1SJeff Kirsher *state = resp->beacon_state; 21199aebddd1SJeff Kirsher } 21209aebddd1SJeff Kirsher 21219aebddd1SJeff Kirsher err: 21229aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21239aebddd1SJeff Kirsher return status; 21249aebddd1SJeff Kirsher } 21259aebddd1SJeff Kirsher 21269aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2127f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2128f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2129f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 21309aebddd1SJeff Kirsher { 21319aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21329aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 21339aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 21349aebddd1SJeff Kirsher void *ctxt = NULL; 21359aebddd1SJeff Kirsher int status; 21369aebddd1SJeff Kirsher 21379aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21389aebddd1SJeff Kirsher adapter->flash_status = 0; 21399aebddd1SJeff Kirsher 21409aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21419aebddd1SJeff Kirsher if (!wrb) { 21429aebddd1SJeff Kirsher status = -EBUSY; 21439aebddd1SJeff Kirsher goto err_unlock; 21449aebddd1SJeff Kirsher } 21459aebddd1SJeff Kirsher 21469aebddd1SJeff Kirsher req = embedded_payload(wrb); 21479aebddd1SJeff Kirsher 2148106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 21499aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2150106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2151106df1e3SSomnath Kotur NULL); 21529aebddd1SJeff Kirsher 21539aebddd1SJeff Kirsher ctxt = &req->context; 21549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21559aebddd1SJeff Kirsher write_length, ctxt, data_size); 21569aebddd1SJeff Kirsher 21579aebddd1SJeff Kirsher if (data_size == 0) 21589aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21599aebddd1SJeff Kirsher eof, ctxt, 1); 21609aebddd1SJeff Kirsher else 21619aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21629aebddd1SJeff Kirsher eof, ctxt, 0); 21639aebddd1SJeff Kirsher 21649aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 21659aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 21669aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 21679aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 21689aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 21699aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 21709aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 21719aebddd1SJeff Kirsher & 0xFFFFFFFF); 21729aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 21739aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 21749aebddd1SJeff Kirsher 21759aebddd1SJeff Kirsher be_mcc_notify(adapter); 21769aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21779aebddd1SJeff Kirsher 21785eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2179701962d0SSomnath Kotur msecs_to_jiffies(60000))) 21809aebddd1SJeff Kirsher status = -1; 21819aebddd1SJeff Kirsher else 21829aebddd1SJeff Kirsher status = adapter->flash_status; 21839aebddd1SJeff Kirsher 21849aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2185f67ef7baSPadmanabh Ratnakar if (!status) { 21869aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2187f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2188f67ef7baSPadmanabh Ratnakar } else { 21899aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2190f67ef7baSPadmanabh Ratnakar } 21919aebddd1SJeff Kirsher 21929aebddd1SJeff Kirsher return status; 21939aebddd1SJeff Kirsher 21949aebddd1SJeff Kirsher err_unlock: 21959aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21969aebddd1SJeff Kirsher return status; 21979aebddd1SJeff Kirsher } 21989aebddd1SJeff Kirsher 2199de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2200de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2201de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2202de49bd5aSPadmanabh Ratnakar { 2203de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2204de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2205de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2206de49bd5aSPadmanabh Ratnakar int status; 2207de49bd5aSPadmanabh Ratnakar 2208de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2209de49bd5aSPadmanabh Ratnakar 2210de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2211de49bd5aSPadmanabh Ratnakar if (!wrb) { 2212de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2213de49bd5aSPadmanabh Ratnakar goto err_unlock; 2214de49bd5aSPadmanabh Ratnakar } 2215de49bd5aSPadmanabh Ratnakar 2216de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2217de49bd5aSPadmanabh Ratnakar 2218de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2219de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2220de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2221de49bd5aSPadmanabh Ratnakar NULL); 2222de49bd5aSPadmanabh Ratnakar 2223de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2224de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2225de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2226de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2227de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2228de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2229de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2230de49bd5aSPadmanabh Ratnakar 2231de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2232de49bd5aSPadmanabh Ratnakar 2233de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2234de49bd5aSPadmanabh Ratnakar if (!status) { 2235de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2236de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2237de49bd5aSPadmanabh Ratnakar } else { 2238de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2239de49bd5aSPadmanabh Ratnakar } 2240de49bd5aSPadmanabh Ratnakar 2241de49bd5aSPadmanabh Ratnakar err_unlock: 2242de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2243de49bd5aSPadmanabh Ratnakar return status; 2244de49bd5aSPadmanabh Ratnakar } 2245de49bd5aSPadmanabh Ratnakar 22469aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 22479aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 22489aebddd1SJeff Kirsher { 22499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22509aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 22519aebddd1SJeff Kirsher int status; 22529aebddd1SJeff Kirsher 22539aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22549aebddd1SJeff Kirsher adapter->flash_status = 0; 22559aebddd1SJeff Kirsher 22569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22579aebddd1SJeff Kirsher if (!wrb) { 22589aebddd1SJeff Kirsher status = -EBUSY; 22599aebddd1SJeff Kirsher goto err_unlock; 22609aebddd1SJeff Kirsher } 22619aebddd1SJeff Kirsher req = cmd->va; 22629aebddd1SJeff Kirsher 2263106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2264106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 22659aebddd1SJeff Kirsher 22669aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 22679aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 22689aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 22699aebddd1SJeff Kirsher 22709aebddd1SJeff Kirsher be_mcc_notify(adapter); 22719aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22729aebddd1SJeff Kirsher 22735eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2274e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 22759aebddd1SJeff Kirsher status = -1; 22769aebddd1SJeff Kirsher else 22779aebddd1SJeff Kirsher status = adapter->flash_status; 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher return status; 22809aebddd1SJeff Kirsher 22819aebddd1SJeff Kirsher err_unlock: 22829aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22839aebddd1SJeff Kirsher return status; 22849aebddd1SJeff Kirsher } 22859aebddd1SJeff Kirsher 22869aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 22879aebddd1SJeff Kirsher int offset) 22889aebddd1SJeff Kirsher { 22899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2290be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 22919aebddd1SJeff Kirsher int status; 22929aebddd1SJeff Kirsher 22939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22949aebddd1SJeff Kirsher 22959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22969aebddd1SJeff Kirsher if (!wrb) { 22979aebddd1SJeff Kirsher status = -EBUSY; 22989aebddd1SJeff Kirsher goto err; 22999aebddd1SJeff Kirsher } 23009aebddd1SJeff Kirsher req = embedded_payload(wrb); 23019aebddd1SJeff Kirsher 2302106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2303be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2304be716446SPadmanabh Ratnakar wrb, NULL); 23059aebddd1SJeff Kirsher 2306c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 23079aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 23089aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 23099aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 23109aebddd1SJeff Kirsher 23119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23129aebddd1SJeff Kirsher if (!status) 2313be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 23149aebddd1SJeff Kirsher 23159aebddd1SJeff Kirsher err: 23169aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23179aebddd1SJeff Kirsher return status; 23189aebddd1SJeff Kirsher } 23199aebddd1SJeff Kirsher 23209aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 23219aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23229aebddd1SJeff Kirsher { 23239aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23249aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 23259aebddd1SJeff Kirsher int status; 23269aebddd1SJeff Kirsher 23279aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23289aebddd1SJeff Kirsher 23299aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23309aebddd1SJeff Kirsher if (!wrb) { 23319aebddd1SJeff Kirsher status = -EBUSY; 23329aebddd1SJeff Kirsher goto err; 23339aebddd1SJeff Kirsher } 23349aebddd1SJeff Kirsher req = nonemb_cmd->va; 23359aebddd1SJeff Kirsher 2336106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2337106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2338106df1e3SSomnath Kotur nonemb_cmd); 23399aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 23409aebddd1SJeff Kirsher 23419aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23429aebddd1SJeff Kirsher 23439aebddd1SJeff Kirsher err: 23449aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23459aebddd1SJeff Kirsher return status; 23469aebddd1SJeff Kirsher } 23479aebddd1SJeff Kirsher 23489aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 23499aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 23509aebddd1SJeff Kirsher { 23519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23529aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 23539aebddd1SJeff Kirsher int status; 23549aebddd1SJeff Kirsher 23559aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23569aebddd1SJeff Kirsher 23579aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23589aebddd1SJeff Kirsher if (!wrb) { 23599aebddd1SJeff Kirsher status = -EBUSY; 23609aebddd1SJeff Kirsher goto err; 23619aebddd1SJeff Kirsher } 23629aebddd1SJeff Kirsher 23639aebddd1SJeff Kirsher req = embedded_payload(wrb); 23649aebddd1SJeff Kirsher 2365106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2366106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2367106df1e3SSomnath Kotur NULL); 23689aebddd1SJeff Kirsher 23699aebddd1SJeff Kirsher req->src_port = port_num; 23709aebddd1SJeff Kirsher req->dest_port = port_num; 23719aebddd1SJeff Kirsher req->loopback_type = loopback_type; 23729aebddd1SJeff Kirsher req->loopback_state = enable; 23739aebddd1SJeff Kirsher 23749aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23759aebddd1SJeff Kirsher err: 23769aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23779aebddd1SJeff Kirsher return status; 23789aebddd1SJeff Kirsher } 23799aebddd1SJeff Kirsher 23809aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 23819aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 23829aebddd1SJeff Kirsher { 23839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23849aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 23855eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 23869aebddd1SJeff Kirsher int status; 23879aebddd1SJeff Kirsher 23889aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23899aebddd1SJeff Kirsher 23909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23919aebddd1SJeff Kirsher if (!wrb) { 23929aebddd1SJeff Kirsher status = -EBUSY; 23939aebddd1SJeff Kirsher goto err; 23949aebddd1SJeff Kirsher } 23959aebddd1SJeff Kirsher 23969aebddd1SJeff Kirsher req = embedded_payload(wrb); 23979aebddd1SJeff Kirsher 2398106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2399106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 24009aebddd1SJeff Kirsher 24015eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 24029aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24039aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 24049aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 24059aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 24069aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 24079aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 24089aebddd1SJeff Kirsher 24095eeff635SSuresh Reddy be_mcc_notify(adapter); 24109aebddd1SJeff Kirsher 24115eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 24125eeff635SSuresh Reddy 24135eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 24145eeff635SSuresh Reddy resp = embedded_payload(wrb); 24155eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 24165eeff635SSuresh Reddy 24175eeff635SSuresh Reddy return status; 24189aebddd1SJeff Kirsher err: 24199aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24209aebddd1SJeff Kirsher return status; 24219aebddd1SJeff Kirsher } 24229aebddd1SJeff Kirsher 24239aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 24249aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 24259aebddd1SJeff Kirsher { 24269aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24279aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 24289aebddd1SJeff Kirsher int status; 24299aebddd1SJeff Kirsher int i, j = 0; 24309aebddd1SJeff Kirsher 24319aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24329aebddd1SJeff Kirsher 24339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24349aebddd1SJeff Kirsher if (!wrb) { 24359aebddd1SJeff Kirsher status = -EBUSY; 24369aebddd1SJeff Kirsher goto err; 24379aebddd1SJeff Kirsher } 24389aebddd1SJeff Kirsher req = cmd->va; 2439106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2440106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 24419aebddd1SJeff Kirsher 24429aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24439aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 24449aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 24459aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 24469aebddd1SJeff Kirsher j++; 24479aebddd1SJeff Kirsher if (j > 7) 24489aebddd1SJeff Kirsher j = 0; 24499aebddd1SJeff Kirsher } 24509aebddd1SJeff Kirsher 24519aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24529aebddd1SJeff Kirsher 24539aebddd1SJeff Kirsher if (!status) { 24549aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 24559aebddd1SJeff Kirsher resp = cmd->va; 24569aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 24579aebddd1SJeff Kirsher resp->snd_err) { 24589aebddd1SJeff Kirsher status = -1; 24599aebddd1SJeff Kirsher } 24609aebddd1SJeff Kirsher } 24619aebddd1SJeff Kirsher 24629aebddd1SJeff Kirsher err: 24639aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24649aebddd1SJeff Kirsher return status; 24659aebddd1SJeff Kirsher } 24669aebddd1SJeff Kirsher 24679aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 24689aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24699aebddd1SJeff Kirsher { 24709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24719aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 24729aebddd1SJeff Kirsher int status; 24739aebddd1SJeff Kirsher 24749aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24759aebddd1SJeff Kirsher 24769aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24779aebddd1SJeff Kirsher if (!wrb) { 24789aebddd1SJeff Kirsher status = -EBUSY; 24799aebddd1SJeff Kirsher goto err; 24809aebddd1SJeff Kirsher } 24819aebddd1SJeff Kirsher req = nonemb_cmd->va; 24829aebddd1SJeff Kirsher 2483106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2484106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2485106df1e3SSomnath Kotur nonemb_cmd); 24869aebddd1SJeff Kirsher 24879aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24889aebddd1SJeff Kirsher 24899aebddd1SJeff Kirsher err: 24909aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24919aebddd1SJeff Kirsher return status; 24929aebddd1SJeff Kirsher } 24939aebddd1SJeff Kirsher 249442f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 24959aebddd1SJeff Kirsher { 24969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24979aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 24989aebddd1SJeff Kirsher struct be_dma_mem cmd; 24999aebddd1SJeff Kirsher int status; 25009aebddd1SJeff Kirsher 2501f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2502f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2503f25b119cSPadmanabh Ratnakar return -EPERM; 2504f25b119cSPadmanabh Ratnakar 25059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25069aebddd1SJeff Kirsher 25079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25089aebddd1SJeff Kirsher if (!wrb) { 25099aebddd1SJeff Kirsher status = -EBUSY; 25109aebddd1SJeff Kirsher goto err; 25119aebddd1SJeff Kirsher } 25129aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 25139aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 25149aebddd1SJeff Kirsher &cmd.dma); 25159aebddd1SJeff Kirsher if (!cmd.va) { 25169aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 25179aebddd1SJeff Kirsher status = -ENOMEM; 25189aebddd1SJeff Kirsher goto err; 25199aebddd1SJeff Kirsher } 25209aebddd1SJeff Kirsher 25219aebddd1SJeff Kirsher req = cmd.va; 25229aebddd1SJeff Kirsher 2523106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2524106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2525106df1e3SSomnath Kotur wrb, &cmd); 25269aebddd1SJeff Kirsher 25279aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25289aebddd1SJeff Kirsher if (!status) { 25299aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 25309aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 253142f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 253242f11cf2SAjit Khaparde adapter->phy.interface_type = 25339aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 253442f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 253542f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 253642f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 253742f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 253842f11cf2SAjit Khaparde adapter->phy.misc_params = 253942f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 254068cb7e47SVasundhara Volam 254168cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 254268cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 254368cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 254468cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 254568cb7e47SVasundhara Volam } 25469aebddd1SJeff Kirsher } 25479aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 25489aebddd1SJeff Kirsher cmd.va, cmd.dma); 25499aebddd1SJeff Kirsher err: 25509aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25519aebddd1SJeff Kirsher return status; 25529aebddd1SJeff Kirsher } 25539aebddd1SJeff Kirsher 25549aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 25559aebddd1SJeff Kirsher { 25569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25579aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 25589aebddd1SJeff Kirsher int status; 25599aebddd1SJeff Kirsher 25609aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25619aebddd1SJeff Kirsher 25629aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25639aebddd1SJeff Kirsher if (!wrb) { 25649aebddd1SJeff Kirsher status = -EBUSY; 25659aebddd1SJeff Kirsher goto err; 25669aebddd1SJeff Kirsher } 25679aebddd1SJeff Kirsher 25689aebddd1SJeff Kirsher req = embedded_payload(wrb); 25699aebddd1SJeff Kirsher 2570106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2571106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 25729aebddd1SJeff Kirsher 25739aebddd1SJeff Kirsher req->hdr.domain = domain; 25749aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 25759aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 25769aebddd1SJeff Kirsher 25779aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25789aebddd1SJeff Kirsher 25799aebddd1SJeff Kirsher err: 25809aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25819aebddd1SJeff Kirsher return status; 25829aebddd1SJeff Kirsher } 25839aebddd1SJeff Kirsher 25849aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 25859aebddd1SJeff Kirsher { 25869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25879aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 25889aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 25899aebddd1SJeff Kirsher int status; 25909aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 25919aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 25929aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 25939aebddd1SJeff Kirsher 2594d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2595d98ef50fSSuresh Reddy return -1; 2596d98ef50fSSuresh Reddy 25979aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 25989aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 25999aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 26009aebddd1SJeff Kirsher &attribs_cmd.dma); 26019aebddd1SJeff Kirsher if (!attribs_cmd.va) { 26029aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 26039aebddd1SJeff Kirsher "Memory allocation failure\n"); 2604d98ef50fSSuresh Reddy status = -ENOMEM; 2605d98ef50fSSuresh Reddy goto err; 26069aebddd1SJeff Kirsher } 26079aebddd1SJeff Kirsher 26089aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26099aebddd1SJeff Kirsher if (!wrb) { 26109aebddd1SJeff Kirsher status = -EBUSY; 26119aebddd1SJeff Kirsher goto err; 26129aebddd1SJeff Kirsher } 26139aebddd1SJeff Kirsher req = attribs_cmd.va; 26149aebddd1SJeff Kirsher 2615106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2616106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2617106df1e3SSomnath Kotur &attribs_cmd); 26189aebddd1SJeff Kirsher 26199aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26209aebddd1SJeff Kirsher if (!status) { 26219aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 26229aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 26239aebddd1SJeff Kirsher } 26249aebddd1SJeff Kirsher 26259aebddd1SJeff Kirsher err: 26269aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2627d98ef50fSSuresh Reddy if (attribs_cmd.va) 2628d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2629d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 26309aebddd1SJeff Kirsher return status; 26319aebddd1SJeff Kirsher } 26329aebddd1SJeff Kirsher 26339aebddd1SJeff Kirsher /* Uses mbox */ 26349aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 26359aebddd1SJeff Kirsher { 26369aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26379aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 26389aebddd1SJeff Kirsher int status; 26399aebddd1SJeff Kirsher 26409aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 26419aebddd1SJeff Kirsher return -1; 26429aebddd1SJeff Kirsher 26439aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26449aebddd1SJeff Kirsher if (!wrb) { 26459aebddd1SJeff Kirsher status = -EBUSY; 26469aebddd1SJeff Kirsher goto err; 26479aebddd1SJeff Kirsher } 26489aebddd1SJeff Kirsher 26499aebddd1SJeff Kirsher req = embedded_payload(wrb); 26509aebddd1SJeff Kirsher 2651106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2652106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 26539aebddd1SJeff Kirsher 26549aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 26559aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 26569aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 26579aebddd1SJeff Kirsher 26589aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26599aebddd1SJeff Kirsher if (!status) { 26609aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 26619aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 26629aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2663d379142bSSathya Perla if (!adapter->be3_native) 2664d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2665d379142bSSathya Perla "adapter not in advanced mode\n"); 26669aebddd1SJeff Kirsher } 26679aebddd1SJeff Kirsher err: 26689aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 26699aebddd1SJeff Kirsher return status; 26709aebddd1SJeff Kirsher } 2671590c391dSPadmanabh Ratnakar 2672f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2673f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2674f25b119cSPadmanabh Ratnakar u32 domain) 2675f25b119cSPadmanabh Ratnakar { 2676f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2677f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2678f25b119cSPadmanabh Ratnakar int status; 2679f25b119cSPadmanabh Ratnakar 2680f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2681f25b119cSPadmanabh Ratnakar 2682f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2683f25b119cSPadmanabh Ratnakar if (!wrb) { 2684f25b119cSPadmanabh Ratnakar status = -EBUSY; 2685f25b119cSPadmanabh Ratnakar goto err; 2686f25b119cSPadmanabh Ratnakar } 2687f25b119cSPadmanabh Ratnakar 2688f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2689f25b119cSPadmanabh Ratnakar 2690f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2691f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2692f25b119cSPadmanabh Ratnakar wrb, NULL); 2693f25b119cSPadmanabh Ratnakar 2694f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2695f25b119cSPadmanabh Ratnakar 2696f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2697f25b119cSPadmanabh Ratnakar if (!status) { 2698f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2699f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2700f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 270102308d74SSuresh Reddy 270202308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 270302308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 270402308d74SSuresh Reddy */ 270502308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 270602308d74SSuresh Reddy be_physfn(adapter)) 270702308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 2708f25b119cSPadmanabh Ratnakar } 2709f25b119cSPadmanabh Ratnakar 2710f25b119cSPadmanabh Ratnakar err: 2711f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2712f25b119cSPadmanabh Ratnakar return status; 2713f25b119cSPadmanabh Ratnakar } 2714f25b119cSPadmanabh Ratnakar 271504a06028SSathya Perla /* Set privilege(s) for a function */ 271604a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 271704a06028SSathya Perla u32 domain) 271804a06028SSathya Perla { 271904a06028SSathya Perla struct be_mcc_wrb *wrb; 272004a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 272104a06028SSathya Perla int status; 272204a06028SSathya Perla 272304a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 272404a06028SSathya Perla 272504a06028SSathya Perla wrb = wrb_from_mccq(adapter); 272604a06028SSathya Perla if (!wrb) { 272704a06028SSathya Perla status = -EBUSY; 272804a06028SSathya Perla goto err; 272904a06028SSathya Perla } 273004a06028SSathya Perla 273104a06028SSathya Perla req = embedded_payload(wrb); 273204a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 273304a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 273404a06028SSathya Perla wrb, NULL); 273504a06028SSathya Perla req->hdr.domain = domain; 273604a06028SSathya Perla if (lancer_chip(adapter)) 273704a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 273804a06028SSathya Perla else 273904a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 274004a06028SSathya Perla 274104a06028SSathya Perla status = be_mcc_notify_wait(adapter); 274204a06028SSathya Perla err: 274304a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 274404a06028SSathya Perla return status; 274504a06028SSathya Perla } 274604a06028SSathya Perla 27475a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 27485a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 27495a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 27505a712c13SSathya Perla */ 27511578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 2752b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 2753b188f090SSuresh Reddy u8 domain) 2754590c391dSPadmanabh Ratnakar { 2755590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2756590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2757590c391dSPadmanabh Ratnakar int status; 2758590c391dSPadmanabh Ratnakar int mac_count; 2759e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2760e5e1ee89SPadmanabh Ratnakar int i; 2761e5e1ee89SPadmanabh Ratnakar 2762e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2763e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2764e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2765e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2766e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2767e5e1ee89SPadmanabh Ratnakar 2768e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2769e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2770e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2771e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2772e5e1ee89SPadmanabh Ratnakar } 2773590c391dSPadmanabh Ratnakar 2774590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2775590c391dSPadmanabh Ratnakar 2776590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2777590c391dSPadmanabh Ratnakar if (!wrb) { 2778590c391dSPadmanabh Ratnakar status = -EBUSY; 2779e5e1ee89SPadmanabh Ratnakar goto out; 2780590c391dSPadmanabh Ratnakar } 2781e5e1ee89SPadmanabh Ratnakar 2782e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2783590c391dSPadmanabh Ratnakar 2784590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2785bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2786bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2787590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2788e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 27895a712c13SSathya Perla if (*pmac_id_valid) { 27905a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 2791b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 27925a712c13SSathya Perla req->perm_override = 0; 27935a712c13SSathya Perla } else { 2794e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 27955a712c13SSathya Perla } 2796590c391dSPadmanabh Ratnakar 2797590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2798590c391dSPadmanabh Ratnakar if (!status) { 2799590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2800e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 28015a712c13SSathya Perla 28025a712c13SSathya Perla if (*pmac_id_valid) { 28035a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 28045a712c13SSathya Perla ETH_ALEN); 28055a712c13SSathya Perla goto out; 28065a712c13SSathya Perla } 28075a712c13SSathya Perla 2808e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2809e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 28101578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 28111578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 28121578e777SPadmanabh Ratnakar * found. 2813e5e1ee89SPadmanabh Ratnakar */ 2814590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2815e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2816e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2817e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2818e5e1ee89SPadmanabh Ratnakar 2819e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2820e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2821e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2822e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2823e5e1ee89SPadmanabh Ratnakar */ 2824e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 28255a712c13SSathya Perla *pmac_id_valid = true; 2826e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2827e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2828e5e1ee89SPadmanabh Ratnakar goto out; 2829590c391dSPadmanabh Ratnakar } 2830590c391dSPadmanabh Ratnakar } 28311578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 28325a712c13SSathya Perla *pmac_id_valid = false; 2833e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2834e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2835590c391dSPadmanabh Ratnakar } 2836590c391dSPadmanabh Ratnakar 2837e5e1ee89SPadmanabh Ratnakar out: 2838590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2839e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2840e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2841590c391dSPadmanabh Ratnakar return status; 2842590c391dSPadmanabh Ratnakar } 2843590c391dSPadmanabh Ratnakar 2844b188f090SSuresh Reddy int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac, 2845b188f090SSuresh Reddy u32 if_handle, bool active, u32 domain) 28465a712c13SSathya Perla { 28475a712c13SSathya Perla 2848b188f090SSuresh Reddy if (!active) 2849b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 2850b188f090SSuresh Reddy if_handle, domain); 28513175d8c2SSathya Perla if (BEx_chip(adapter)) 28525a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 2853b188f090SSuresh Reddy if_handle, curr_pmac_id); 28543175d8c2SSathya Perla else 28553175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 28563175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 2857b188f090SSuresh Reddy &curr_pmac_id, 2858b188f090SSuresh Reddy if_handle, domain); 28595a712c13SSathya Perla } 28605a712c13SSathya Perla 286195046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 286295046b92SSathya Perla { 286395046b92SSathya Perla int status; 286495046b92SSathya Perla bool pmac_valid = false; 286595046b92SSathya Perla 286695046b92SSathya Perla memset(mac, 0, ETH_ALEN); 286795046b92SSathya Perla 28683175d8c2SSathya Perla if (BEx_chip(adapter)) { 28693175d8c2SSathya Perla if (be_physfn(adapter)) 28703175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 28713175d8c2SSathya Perla 0); 287295046b92SSathya Perla else 287395046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 287495046b92SSathya Perla adapter->if_handle, 0); 28753175d8c2SSathya Perla } else { 28763175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 2877b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 28783175d8c2SSathya Perla } 28793175d8c2SSathya Perla 288095046b92SSathya Perla return status; 288195046b92SSathya Perla } 288295046b92SSathya Perla 2883590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2884590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2885590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2886590c391dSPadmanabh Ratnakar { 2887590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2888590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2889590c391dSPadmanabh Ratnakar int status; 2890590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2891590c391dSPadmanabh Ratnakar 2892590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2893590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2894590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2895590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2896d0320f75SJoe Perches if (!cmd.va) 2897590c391dSPadmanabh Ratnakar return -ENOMEM; 2898590c391dSPadmanabh Ratnakar 2899590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2900590c391dSPadmanabh Ratnakar 2901590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2902590c391dSPadmanabh Ratnakar if (!wrb) { 2903590c391dSPadmanabh Ratnakar status = -EBUSY; 2904590c391dSPadmanabh Ratnakar goto err; 2905590c391dSPadmanabh Ratnakar } 2906590c391dSPadmanabh Ratnakar 2907590c391dSPadmanabh Ratnakar req = cmd.va; 2908590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2909590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2910590c391dSPadmanabh Ratnakar wrb, &cmd); 2911590c391dSPadmanabh Ratnakar 2912590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2913590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2914590c391dSPadmanabh Ratnakar if (mac_count) 2915590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2916590c391dSPadmanabh Ratnakar 2917590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2918590c391dSPadmanabh Ratnakar 2919590c391dSPadmanabh Ratnakar err: 2920590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2921590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2922590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2923590c391dSPadmanabh Ratnakar return status; 2924590c391dSPadmanabh Ratnakar } 29254762f6ceSAjit Khaparde 29263175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 29273175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 29283175d8c2SSathya Perla * current list are active. 29293175d8c2SSathya Perla */ 29303175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 29313175d8c2SSathya Perla { 29323175d8c2SSathya Perla bool active_mac = false; 29333175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 29343175d8c2SSathya Perla u32 pmac_id; 29353175d8c2SSathya Perla int status; 29363175d8c2SSathya Perla 29373175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 2938b188f090SSuresh Reddy &pmac_id, if_id, dom); 2939b188f090SSuresh Reddy 29403175d8c2SSathya Perla if (!status && active_mac) 29413175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 29423175d8c2SSathya Perla 29433175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 29443175d8c2SSathya Perla } 29453175d8c2SSathya Perla 2946f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2947a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 2948f1f3ee1bSAjit Khaparde { 2949f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2950f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2951f1f3ee1bSAjit Khaparde void *ctxt; 2952f1f3ee1bSAjit Khaparde int status; 2953f1f3ee1bSAjit Khaparde 2954f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2955f1f3ee1bSAjit Khaparde 2956f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2957f1f3ee1bSAjit Khaparde if (!wrb) { 2958f1f3ee1bSAjit Khaparde status = -EBUSY; 2959f1f3ee1bSAjit Khaparde goto err; 2960f1f3ee1bSAjit Khaparde } 2961f1f3ee1bSAjit Khaparde 2962f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2963f1f3ee1bSAjit Khaparde ctxt = &req->context; 2964f1f3ee1bSAjit Khaparde 2965f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2966f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2967f1f3ee1bSAjit Khaparde 2968f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2969f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2970f1f3ee1bSAjit Khaparde if (pvid) { 2971f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2972f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2973f1f3ee1bSAjit Khaparde } 2974a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 2975a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 2976a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2977a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 2978a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 2979a77dcb8cSAjit Khaparde ctxt, hsw_mode); 2980a77dcb8cSAjit Khaparde } 2981f1f3ee1bSAjit Khaparde 2982f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2983f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2984f1f3ee1bSAjit Khaparde 2985f1f3ee1bSAjit Khaparde err: 2986f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2987f1f3ee1bSAjit Khaparde return status; 2988f1f3ee1bSAjit Khaparde } 2989f1f3ee1bSAjit Khaparde 2990f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2991f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2992a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 2993f1f3ee1bSAjit Khaparde { 2994f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2995f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2996f1f3ee1bSAjit Khaparde void *ctxt; 2997f1f3ee1bSAjit Khaparde int status; 2998f1f3ee1bSAjit Khaparde u16 vid; 2999f1f3ee1bSAjit Khaparde 3000f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3001f1f3ee1bSAjit Khaparde 3002f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3003f1f3ee1bSAjit Khaparde if (!wrb) { 3004f1f3ee1bSAjit Khaparde status = -EBUSY; 3005f1f3ee1bSAjit Khaparde goto err; 3006f1f3ee1bSAjit Khaparde } 3007f1f3ee1bSAjit Khaparde 3008f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3009f1f3ee1bSAjit Khaparde ctxt = &req->context; 3010f1f3ee1bSAjit Khaparde 3011f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3012f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 3013f1f3ee1bSAjit Khaparde 3014f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3015a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3016a77dcb8cSAjit Khaparde ctxt, intf_id); 3017f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3018a77dcb8cSAjit Khaparde 30192c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3020a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3021a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3022a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3023a77dcb8cSAjit Khaparde } 3024f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3025f1f3ee1bSAjit Khaparde 3026f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3027f1f3ee1bSAjit Khaparde if (!status) { 3028f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3029f1f3ee1bSAjit Khaparde embedded_payload(wrb); 3030f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 3031f1f3ee1bSAjit Khaparde sizeof(resp->context)); 3032f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3033f1f3ee1bSAjit Khaparde pvid, &resp->context); 3034a77dcb8cSAjit Khaparde if (pvid) 3035f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3036a77dcb8cSAjit Khaparde if (mode) 3037a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3038a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3039f1f3ee1bSAjit Khaparde } 3040f1f3ee1bSAjit Khaparde 3041f1f3ee1bSAjit Khaparde err: 3042f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3043f1f3ee1bSAjit Khaparde return status; 3044f1f3ee1bSAjit Khaparde } 3045f1f3ee1bSAjit Khaparde 30464762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 30474762f6ceSAjit Khaparde { 30484762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 30494762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 305076a9e08eSSuresh Reddy int status = 0; 30514762f6ceSAjit Khaparde struct be_dma_mem cmd; 30524762f6ceSAjit Khaparde 3053f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3054f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3055f25b119cSPadmanabh Ratnakar return -EPERM; 3056f25b119cSPadmanabh Ratnakar 305776a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 305876a9e08eSSuresh Reddy return status; 305976a9e08eSSuresh Reddy 3060d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3061d98ef50fSSuresh Reddy return -1; 3062d98ef50fSSuresh Reddy 30634762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 30644762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 30654762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 30664762f6ceSAjit Khaparde &cmd.dma); 30674762f6ceSAjit Khaparde if (!cmd.va) { 30684762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 30694762f6ceSAjit Khaparde "Memory allocation failure\n"); 3070d98ef50fSSuresh Reddy status = -ENOMEM; 3071d98ef50fSSuresh Reddy goto err; 30724762f6ceSAjit Khaparde } 30734762f6ceSAjit Khaparde 30744762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 30754762f6ceSAjit Khaparde if (!wrb) { 30764762f6ceSAjit Khaparde status = -EBUSY; 30774762f6ceSAjit Khaparde goto err; 30784762f6ceSAjit Khaparde } 30794762f6ceSAjit Khaparde 30804762f6ceSAjit Khaparde req = cmd.va; 30814762f6ceSAjit Khaparde 30824762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 30834762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 308476a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 30854762f6ceSAjit Khaparde 30864762f6ceSAjit Khaparde req->hdr.version = 1; 30874762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 30884762f6ceSAjit Khaparde 30894762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 30904762f6ceSAjit Khaparde if (!status) { 30914762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 30924762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 30934762f6ceSAjit Khaparde 30944762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 309576a9e08eSSuresh Reddy if (adapter->wol_cap & BE_WOL_CAP) 309676a9e08eSSuresh Reddy adapter->wol_en = true; 30974762f6ceSAjit Khaparde } 30984762f6ceSAjit Khaparde err: 30994762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3100d98ef50fSSuresh Reddy if (cmd.va) 31014762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 31024762f6ceSAjit Khaparde return status; 3103941a77d5SSomnath Kotur 3104941a77d5SSomnath Kotur } 3105baaa08d1SVasundhara Volam 3106baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 3107baaa08d1SVasundhara Volam { 3108baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3109baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3110baaa08d1SVasundhara Volam int status; 3111baaa08d1SVasundhara Volam int i, j; 3112baaa08d1SVasundhara Volam 3113baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3114baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3115baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3116baaa08d1SVasundhara Volam &extfat_cmd.dma); 3117baaa08d1SVasundhara Volam if (!extfat_cmd.va) 3118baaa08d1SVasundhara Volam return -ENOMEM; 3119baaa08d1SVasundhara Volam 3120baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3121baaa08d1SVasundhara Volam if (status) 3122baaa08d1SVasundhara Volam goto err; 3123baaa08d1SVasundhara Volam 3124baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 3125baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 3126baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 3127baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 3128baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 3129baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 3130baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 3131baaa08d1SVasundhara Volam cpu_to_le32(level); 3132baaa08d1SVasundhara Volam } 3133baaa08d1SVasundhara Volam } 3134baaa08d1SVasundhara Volam 3135baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 3136baaa08d1SVasundhara Volam err: 3137baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3138baaa08d1SVasundhara Volam extfat_cmd.dma); 3139baaa08d1SVasundhara Volam return status; 3140baaa08d1SVasundhara Volam } 3141baaa08d1SVasundhara Volam 3142baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 3143baaa08d1SVasundhara Volam { 3144baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3145baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3146baaa08d1SVasundhara Volam int status, j; 3147baaa08d1SVasundhara Volam int level = 0; 3148baaa08d1SVasundhara Volam 3149baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3150baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3151baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3152baaa08d1SVasundhara Volam &extfat_cmd.dma); 3153baaa08d1SVasundhara Volam 3154baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 3155baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 3156baaa08d1SVasundhara Volam __func__); 3157baaa08d1SVasundhara Volam goto err; 3158baaa08d1SVasundhara Volam } 3159baaa08d1SVasundhara Volam 3160baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3161baaa08d1SVasundhara Volam if (!status) { 3162baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 3163baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 3164baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 3165baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 3166baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 3167baaa08d1SVasundhara Volam } 3168baaa08d1SVasundhara Volam } 3169baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3170baaa08d1SVasundhara Volam extfat_cmd.dma); 3171baaa08d1SVasundhara Volam err: 3172baaa08d1SVasundhara Volam return level; 3173baaa08d1SVasundhara Volam } 3174baaa08d1SVasundhara Volam 3175941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3176941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3177941a77d5SSomnath Kotur { 3178941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3179941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3180941a77d5SSomnath Kotur int status; 3181941a77d5SSomnath Kotur 3182941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3183941a77d5SSomnath Kotur return -1; 3184941a77d5SSomnath Kotur 3185941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3186941a77d5SSomnath Kotur if (!wrb) { 3187941a77d5SSomnath Kotur status = -EBUSY; 3188941a77d5SSomnath Kotur goto err; 3189941a77d5SSomnath Kotur } 3190941a77d5SSomnath Kotur 3191941a77d5SSomnath Kotur req = cmd->va; 3192941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3193941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3194941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3195941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3196941a77d5SSomnath Kotur 3197941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3198941a77d5SSomnath Kotur err: 3199941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3200941a77d5SSomnath Kotur return status; 3201941a77d5SSomnath Kotur } 3202941a77d5SSomnath Kotur 3203941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3204941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3205941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3206941a77d5SSomnath Kotur { 3207941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3208941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3209941a77d5SSomnath Kotur int status; 3210941a77d5SSomnath Kotur 3211941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3212941a77d5SSomnath Kotur 3213941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3214941a77d5SSomnath Kotur if (!wrb) { 3215941a77d5SSomnath Kotur status = -EBUSY; 3216941a77d5SSomnath Kotur goto err; 3217941a77d5SSomnath Kotur } 3218941a77d5SSomnath Kotur 3219941a77d5SSomnath Kotur req = cmd->va; 3220941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3221941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3222941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3223941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3224941a77d5SSomnath Kotur 3225941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3226941a77d5SSomnath Kotur err: 3227941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3228941a77d5SSomnath Kotur return status; 32294762f6ceSAjit Khaparde } 32306a4ab669SParav Pandit 3231b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3232b4e32a71SPadmanabh Ratnakar { 3233b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3234b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3235b4e32a71SPadmanabh Ratnakar int status; 3236b4e32a71SPadmanabh Ratnakar 3237b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3238b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3239b4e32a71SPadmanabh Ratnakar return 0; 3240b4e32a71SPadmanabh Ratnakar } 3241b4e32a71SPadmanabh Ratnakar 3242b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3243b4e32a71SPadmanabh Ratnakar 3244b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3245b4e32a71SPadmanabh Ratnakar if (!wrb) { 3246b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3247b4e32a71SPadmanabh Ratnakar goto err; 3248b4e32a71SPadmanabh Ratnakar } 3249b4e32a71SPadmanabh Ratnakar 3250b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3251b4e32a71SPadmanabh Ratnakar 3252b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3253b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3254b4e32a71SPadmanabh Ratnakar NULL); 3255b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3256b4e32a71SPadmanabh Ratnakar 3257b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3258b4e32a71SPadmanabh Ratnakar if (!status) { 3259b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3260b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3261b4e32a71SPadmanabh Ratnakar } else { 3262b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3263b4e32a71SPadmanabh Ratnakar } 3264b4e32a71SPadmanabh Ratnakar err: 3265b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3266b4e32a71SPadmanabh Ratnakar return status; 3267b4e32a71SPadmanabh Ratnakar } 3268b4e32a71SPadmanabh Ratnakar 3269150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3270abb93951SPadmanabh Ratnakar { 3271150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3272abb93951SPadmanabh Ratnakar int i; 3273abb93951SPadmanabh Ratnakar 3274abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3275150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3276150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3277150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3278150d58c7SVasundhara Volam 3279150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3280150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3281150d58c7SVasundhara Volam } 3282950e2958SWei Yang return NULL; 3283abb93951SPadmanabh Ratnakar } 3284abb93951SPadmanabh Ratnakar 3285150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3286150d58c7SVasundhara Volam u32 desc_count) 3287150d58c7SVasundhara Volam { 3288150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3289150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3290150d58c7SVasundhara Volam int i; 3291150d58c7SVasundhara Volam 3292150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3293150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3294150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3295150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3296150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3297150d58c7SVasundhara Volam return pcie; 3298150d58c7SVasundhara Volam } 3299150d58c7SVasundhara Volam 3300150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3301150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3302150d58c7SVasundhara Volam } 3303abb93951SPadmanabh Ratnakar return NULL; 3304abb93951SPadmanabh Ratnakar } 3305abb93951SPadmanabh Ratnakar 3306f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 3307f93f160bSVasundhara Volam { 3308f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3309f93f160bSVasundhara Volam int i; 3310f93f160bSVasundhara Volam 3311f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 3312f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 3313f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 3314f93f160bSVasundhara Volam 3315f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3316f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3317f93f160bSVasundhara Volam } 3318f93f160bSVasundhara Volam return NULL; 3319f93f160bSVasundhara Volam } 3320f93f160bSVasundhara Volam 332192bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 332292bf14abSSathya Perla struct be_nic_res_desc *desc) 332392bf14abSSathya Perla { 332492bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 332592bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 332692bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 332792bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 332892bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 332992bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 333092bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 333192bf14abSSathya Perla /* Clear flags that driver is not interested in */ 333292bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 333392bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 333492bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 333592bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 333692bf14abSSathya Perla res->max_rss_qs -= 1; 333792bf14abSSathya Perla } 333892bf14abSSathya Perla 3339abb93951SPadmanabh Ratnakar /* Uses Mbox */ 334092bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3341abb93951SPadmanabh Ratnakar { 3342abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3343abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3344abb93951SPadmanabh Ratnakar int status; 3345abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3346abb93951SPadmanabh Ratnakar 3347d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3348d98ef50fSSuresh Reddy return -1; 3349d98ef50fSSuresh Reddy 3350abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3351abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3352abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3353abb93951SPadmanabh Ratnakar &cmd.dma); 3354abb93951SPadmanabh Ratnakar if (!cmd.va) { 3355abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3356d98ef50fSSuresh Reddy status = -ENOMEM; 3357d98ef50fSSuresh Reddy goto err; 3358abb93951SPadmanabh Ratnakar } 3359abb93951SPadmanabh Ratnakar 3360abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3361abb93951SPadmanabh Ratnakar if (!wrb) { 3362abb93951SPadmanabh Ratnakar status = -EBUSY; 3363abb93951SPadmanabh Ratnakar goto err; 3364abb93951SPadmanabh Ratnakar } 3365abb93951SPadmanabh Ratnakar 3366abb93951SPadmanabh Ratnakar req = cmd.va; 3367abb93951SPadmanabh Ratnakar 3368abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3369abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3370abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3371abb93951SPadmanabh Ratnakar 337228710c55SKalesh AP if (skyhawk_chip(adapter)) 337328710c55SKalesh AP req->hdr.version = 1; 337428710c55SKalesh AP 3375abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3376abb93951SPadmanabh Ratnakar if (!status) { 3377abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3378abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3379150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3380abb93951SPadmanabh Ratnakar 3381150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3382abb93951SPadmanabh Ratnakar if (!desc) { 3383abb93951SPadmanabh Ratnakar status = -EINVAL; 3384abb93951SPadmanabh Ratnakar goto err; 3385abb93951SPadmanabh Ratnakar } 3386abb93951SPadmanabh Ratnakar 3387d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 338892bf14abSSathya Perla be_copy_nic_desc(res, desc); 3389abb93951SPadmanabh Ratnakar } 3390abb93951SPadmanabh Ratnakar err: 3391abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3392d98ef50fSSuresh Reddy if (cmd.va) 3393d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3394abb93951SPadmanabh Ratnakar return status; 3395abb93951SPadmanabh Ratnakar } 3396abb93951SPadmanabh Ratnakar 3397a05f99dbSVasundhara Volam /* Uses mbox */ 33984188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3399a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3400abb93951SPadmanabh Ratnakar { 3401abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3402abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3403abb93951SPadmanabh Ratnakar int status; 3404abb93951SPadmanabh Ratnakar 3405a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3406a05f99dbSVasundhara Volam return -1; 3407a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3408a05f99dbSVasundhara Volam 3409a05f99dbSVasundhara Volam req = cmd->va; 3410a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3411a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3412a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3413a05f99dbSVasundhara Volam 3414a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3415a05f99dbSVasundhara Volam req->hdr.domain = domain; 3416a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3417a05f99dbSVasundhara Volam req->hdr.version = 1; 3418a05f99dbSVasundhara Volam 3419a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3420a05f99dbSVasundhara Volam 3421a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3422a05f99dbSVasundhara Volam return status; 3423abb93951SPadmanabh Ratnakar } 3424abb93951SPadmanabh Ratnakar 3425a05f99dbSVasundhara Volam /* Uses sync mcc */ 34264188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3427a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3428a05f99dbSVasundhara Volam { 3429a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3430a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3431a05f99dbSVasundhara Volam int status; 3432a05f99dbSVasundhara Volam 3433abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3434abb93951SPadmanabh Ratnakar 3435abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3436abb93951SPadmanabh Ratnakar if (!wrb) { 3437abb93951SPadmanabh Ratnakar status = -EBUSY; 3438abb93951SPadmanabh Ratnakar goto err; 3439abb93951SPadmanabh Ratnakar } 3440abb93951SPadmanabh Ratnakar 3441a05f99dbSVasundhara Volam req = cmd->va; 3442abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3443abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3444a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3445abb93951SPadmanabh Ratnakar 3446abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3447abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3448a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3449a05f99dbSVasundhara Volam req->hdr.version = 1; 3450abb93951SPadmanabh Ratnakar 3451abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3452a05f99dbSVasundhara Volam 3453a05f99dbSVasundhara Volam err: 3454a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3455a05f99dbSVasundhara Volam return status; 3456a05f99dbSVasundhara Volam } 3457a05f99dbSVasundhara Volam 3458a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 345992bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 346092bf14abSSathya Perla struct be_resources *res, u8 domain) 3461a05f99dbSVasundhara Volam { 3462150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3463150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3464f93f160bSVasundhara Volam struct be_port_res_desc *port; 3465150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3466a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3467a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3468150d58c7SVasundhara Volam u32 desc_count; 3469a05f99dbSVasundhara Volam int status; 3470a05f99dbSVasundhara Volam 3471a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3472a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3473150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3474150d58c7SVasundhara Volam if (!cmd.va) 3475a05f99dbSVasundhara Volam return -ENOMEM; 3476a05f99dbSVasundhara Volam 3477a05f99dbSVasundhara Volam if (!mccq->created) 3478a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3479a05f99dbSVasundhara Volam else 3480a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3481150d58c7SVasundhara Volam if (status) 3482abb93951SPadmanabh Ratnakar goto err; 3483150d58c7SVasundhara Volam 3484150d58c7SVasundhara Volam resp = cmd.va; 3485150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3486150d58c7SVasundhara Volam 3487150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3488150d58c7SVasundhara Volam desc_count); 3489150d58c7SVasundhara Volam if (pcie) 349092bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3491150d58c7SVasundhara Volam 3492f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 3493f93f160bSVasundhara Volam if (port) 3494f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 3495f93f160bSVasundhara Volam 3496150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 349792bf14abSSathya Perla if (nic) 349892bf14abSSathya Perla be_copy_nic_desc(res, nic); 349992bf14abSSathya Perla 3500abb93951SPadmanabh Ratnakar err: 3501a05f99dbSVasundhara Volam if (cmd.va) 3502150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3503abb93951SPadmanabh Ratnakar return status; 3504abb93951SPadmanabh Ratnakar } 3505abb93951SPadmanabh Ratnakar 3506a401801cSSathya Perla int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 3507a401801cSSathya Perla int size, u8 version, u8 domain) 3508d5c18473SPadmanabh Ratnakar { 3509d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3510a401801cSSathya Perla struct be_mcc_wrb *wrb; 3511d5c18473SPadmanabh Ratnakar int status; 3512d5c18473SPadmanabh Ratnakar 3513d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3514d5c18473SPadmanabh Ratnakar 3515d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3516d5c18473SPadmanabh Ratnakar if (!wrb) { 3517d5c18473SPadmanabh Ratnakar status = -EBUSY; 3518d5c18473SPadmanabh Ratnakar goto err; 3519d5c18473SPadmanabh Ratnakar } 3520d5c18473SPadmanabh Ratnakar 3521d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3522d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3523d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3524d5c18473SPadmanabh Ratnakar wrb, NULL); 3525a401801cSSathya Perla req->hdr.version = version; 3526d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3527d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3528a401801cSSathya Perla memcpy(req->desc, desc, size); 3529d5c18473SPadmanabh Ratnakar 3530d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3531d5c18473SPadmanabh Ratnakar err: 3532d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3533d5c18473SPadmanabh Ratnakar return status; 3534d5c18473SPadmanabh Ratnakar } 3535d5c18473SPadmanabh Ratnakar 3536a401801cSSathya Perla /* Mark all fields invalid */ 3537a401801cSSathya Perla void be_reset_nic_desc(struct be_nic_res_desc *nic) 3538a401801cSSathya Perla { 3539a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 3540a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 3541a401801cSSathya Perla nic->mcc_count = 0xFFFF; 3542a401801cSSathya Perla nic->vlan_count = 0xFFFF; 3543a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 3544a401801cSSathya Perla nic->txq_count = 0xFFFF; 3545a401801cSSathya Perla nic->rq_count = 0xFFFF; 3546a401801cSSathya Perla nic->rssq_count = 0xFFFF; 3547a401801cSSathya Perla nic->lro_count = 0xFFFF; 3548a401801cSSathya Perla nic->cq_count = 0xFFFF; 3549a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 3550a401801cSSathya Perla nic->eq_count = 0xFFFF; 3551a401801cSSathya Perla nic->link_param = 0xFF; 3552a401801cSSathya Perla nic->acpi_params = 0xFF; 3553a401801cSSathya Perla nic->wol_param = 0x0F; 3554a401801cSSathya Perla nic->bw_min = 0xFFFFFFFF; 3555a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 3556a401801cSSathya Perla } 3557a401801cSSathya Perla 3558a401801cSSathya Perla int be_cmd_config_qos(struct be_adapter *adapter, u32 bps, u8 domain) 3559a401801cSSathya Perla { 3560a401801cSSathya Perla if (lancer_chip(adapter)) { 3561a401801cSSathya Perla struct be_nic_res_desc nic_desc; 3562a401801cSSathya Perla 3563a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 3564a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3565a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3566a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 3567a401801cSSathya Perla (1 << NOSV_SHIFT); 3568a401801cSSathya Perla nic_desc.pf_num = adapter->pf_number; 3569a401801cSSathya Perla nic_desc.vf_num = domain; 3570a401801cSSathya Perla nic_desc.bw_max = cpu_to_le32(bps); 3571a401801cSSathya Perla 3572a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 3573a401801cSSathya Perla RESOURCE_DESC_SIZE_V0, 3574a401801cSSathya Perla 0, domain); 3575a401801cSSathya Perla } else { 3576a401801cSSathya Perla return be_cmd_set_qos(adapter, bps, domain); 3577a401801cSSathya Perla } 3578a401801cSSathya Perla } 3579a401801cSSathya Perla 3580a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 3581a401801cSSathya Perla { 3582a401801cSSathya Perla struct be_mcc_wrb *wrb; 3583a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 3584a401801cSSathya Perla int status; 3585a401801cSSathya Perla 3586a401801cSSathya Perla if (iface == 0xFFFFFFFF) 3587a401801cSSathya Perla return -1; 3588a401801cSSathya Perla 3589a401801cSSathya Perla spin_lock_bh(&adapter->mcc_lock); 3590a401801cSSathya Perla 3591a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 3592a401801cSSathya Perla if (!wrb) { 3593a401801cSSathya Perla status = -EBUSY; 3594a401801cSSathya Perla goto err; 3595a401801cSSathya Perla } 3596a401801cSSathya Perla req = embedded_payload(wrb); 3597a401801cSSathya Perla 3598a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3599a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 3600a401801cSSathya Perla wrb, NULL); 3601a401801cSSathya Perla req->op = op; 3602a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 3603a401801cSSathya Perla 3604a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 3605a401801cSSathya Perla err: 3606a401801cSSathya Perla spin_unlock_bh(&adapter->mcc_lock); 3607a401801cSSathya Perla return status; 3608a401801cSSathya Perla } 3609a401801cSSathya Perla 3610a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 3611a401801cSSathya Perla { 3612a401801cSSathya Perla struct be_port_res_desc port_desc; 3613a401801cSSathya Perla 3614a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 3615a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 3616a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3617a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3618a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 3619a401801cSSathya Perla if (port) { 3620a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 3621a401801cSSathya Perla (1 << RCVID_SHIFT); 3622a401801cSSathya Perla port_desc.nv_port = swab16(port); 3623a401801cSSathya Perla } else { 3624a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 3625a401801cSSathya Perla port_desc.nv_port = 0; 3626a401801cSSathya Perla } 3627a401801cSSathya Perla 3628a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 3629a401801cSSathya Perla RESOURCE_DESC_SIZE_V1, 1, 0); 3630a401801cSSathya Perla } 3631a401801cSSathya Perla 36324c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 36334c876616SSathya Perla int vf_num) 36344c876616SSathya Perla { 36354c876616SSathya Perla struct be_mcc_wrb *wrb; 36364c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 36374c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 36384c876616SSathya Perla int status; 36394c876616SSathya Perla 36404c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 36414c876616SSathya Perla 36424c876616SSathya Perla wrb = wrb_from_mccq(adapter); 36434c876616SSathya Perla if (!wrb) { 36444c876616SSathya Perla status = -EBUSY; 36454c876616SSathya Perla goto err; 36464c876616SSathya Perla } 36474c876616SSathya Perla req = embedded_payload(wrb); 36484c876616SSathya Perla 36494c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 36504c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 36514c876616SSathya Perla wrb, NULL); 36524c876616SSathya Perla req->hdr.domain = vf_num + 1; 36534c876616SSathya Perla 36544c876616SSathya Perla status = be_mcc_notify_wait(adapter); 36554c876616SSathya Perla if (!status) { 36564c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 36574c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 36584c876616SSathya Perla } 36594c876616SSathya Perla 36604c876616SSathya Perla err: 36614c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 36624c876616SSathya Perla return status; 36634c876616SSathya Perla } 36644c876616SSathya Perla 36655c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 36665c510811SSomnath Kotur { 36675c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 36685c510811SSomnath Kotur u32 reg_val; 36695c510811SSomnath Kotur int status = 0, i; 36705c510811SSomnath Kotur 36715c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 36725c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 36735c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 36745c510811SSomnath Kotur break; 36755c510811SSomnath Kotur 36765c510811SSomnath Kotur ssleep(1); 36775c510811SSomnath Kotur } 36785c510811SSomnath Kotur 36795c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 36805c510811SSomnath Kotur status = -1; 36815c510811SSomnath Kotur 36825c510811SSomnath Kotur return status; 36835c510811SSomnath Kotur } 36845c510811SSomnath Kotur 36855c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 36865c510811SSomnath Kotur { 36875c510811SSomnath Kotur int status = 0; 36885c510811SSomnath Kotur 36895c510811SSomnath Kotur status = lancer_wait_idle(adapter); 36905c510811SSomnath Kotur if (status) 36915c510811SSomnath Kotur return status; 36925c510811SSomnath Kotur 36935c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 36945c510811SSomnath Kotur 36955c510811SSomnath Kotur return status; 36965c510811SSomnath Kotur } 36975c510811SSomnath Kotur 36985c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 36995c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 37005c510811SSomnath Kotur { 37015c510811SSomnath Kotur u32 sliport_status = 0; 37025c510811SSomnath Kotur 37035c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 37045c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 37055c510811SSomnath Kotur } 37065c510811SSomnath Kotur 37075c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 37085c510811SSomnath Kotur { 37095c510811SSomnath Kotur int status; 37105c510811SSomnath Kotur 37115c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 37125c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 37135c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 37145c510811SSomnath Kotur if (status < 0) { 37155c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 37165c510811SSomnath Kotur return status; 37175c510811SSomnath Kotur } 37185c510811SSomnath Kotur 37195c510811SSomnath Kotur status = lancer_wait_idle(adapter); 37205c510811SSomnath Kotur if (status) 37215c510811SSomnath Kotur return status; 37225c510811SSomnath Kotur 37235c510811SSomnath Kotur if (!dump_present(adapter)) { 37245c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 37255c510811SSomnath Kotur return -1; 37265c510811SSomnath Kotur } 37275c510811SSomnath Kotur 37285c510811SSomnath Kotur return 0; 37295c510811SSomnath Kotur } 37305c510811SSomnath Kotur 3731dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3732dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3733dcf7ebbaSPadmanabh Ratnakar { 3734dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3735dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3736dcf7ebbaSPadmanabh Ratnakar int status; 3737dcf7ebbaSPadmanabh Ratnakar 37380599863dSVasundhara Volam if (BEx_chip(adapter)) 3739dcf7ebbaSPadmanabh Ratnakar return 0; 3740dcf7ebbaSPadmanabh Ratnakar 3741dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3742dcf7ebbaSPadmanabh Ratnakar 3743dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3744dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3745dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3746dcf7ebbaSPadmanabh Ratnakar goto err; 3747dcf7ebbaSPadmanabh Ratnakar } 3748dcf7ebbaSPadmanabh Ratnakar 3749dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3750dcf7ebbaSPadmanabh Ratnakar 3751dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3752dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3753dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3754dcf7ebbaSPadmanabh Ratnakar 3755dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3756dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3757dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3758dcf7ebbaSPadmanabh Ratnakar err: 3759dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3760dcf7ebbaSPadmanabh Ratnakar return status; 3761dcf7ebbaSPadmanabh Ratnakar } 3762dcf7ebbaSPadmanabh Ratnakar 376368c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 376468c45a2dSSomnath Kotur { 376568c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 376668c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 376768c45a2dSSomnath Kotur int status; 376868c45a2dSSomnath Kotur 376968c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 377068c45a2dSSomnath Kotur return -1; 377168c45a2dSSomnath Kotur 377268c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 377368c45a2dSSomnath Kotur 377468c45a2dSSomnath Kotur req = embedded_payload(wrb); 377568c45a2dSSomnath Kotur 377668c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 377768c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 377868c45a2dSSomnath Kotur wrb, NULL); 377968c45a2dSSomnath Kotur 378068c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 378168c45a2dSSomnath Kotur 378268c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 378368c45a2dSSomnath Kotur 378468c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 378568c45a2dSSomnath Kotur return status; 378668c45a2dSSomnath Kotur } 378768c45a2dSSomnath Kotur 3788542963b7SVasundhara Volam /* Uses MBOX */ 3789542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 3790542963b7SVasundhara Volam { 3791542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 3792542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 3793542963b7SVasundhara Volam int status; 3794542963b7SVasundhara Volam 3795542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3796542963b7SVasundhara Volam return -1; 3797542963b7SVasundhara Volam 3798542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 3799542963b7SVasundhara Volam if (!wrb) { 3800542963b7SVasundhara Volam status = -EBUSY; 3801542963b7SVasundhara Volam goto err; 3802542963b7SVasundhara Volam } 3803542963b7SVasundhara Volam 3804542963b7SVasundhara Volam req = embedded_payload(wrb); 3805542963b7SVasundhara Volam 3806542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3807542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 3808542963b7SVasundhara Volam wrb, NULL); 3809542963b7SVasundhara Volam 3810542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 3811542963b7SVasundhara Volam if (!status) { 3812542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 3813542963b7SVasundhara Volam embedded_payload(wrb); 3814542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 3815542963b7SVasundhara Volam } 3816542963b7SVasundhara Volam 3817542963b7SVasundhara Volam err: 3818542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3819542963b7SVasundhara Volam return status; 3820542963b7SVasundhara Volam } 3821542963b7SVasundhara Volam 3822bdce2ad7SSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 3823bdce2ad7SSuresh Reddy int link_state, u8 domain) 3824bdce2ad7SSuresh Reddy { 3825bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 3826bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 3827bdce2ad7SSuresh Reddy int status; 3828bdce2ad7SSuresh Reddy 3829bdce2ad7SSuresh Reddy if (BEx_chip(adapter) || lancer_chip(adapter)) 3830bdce2ad7SSuresh Reddy return 0; 3831bdce2ad7SSuresh Reddy 3832bdce2ad7SSuresh Reddy spin_lock_bh(&adapter->mcc_lock); 3833bdce2ad7SSuresh Reddy 3834bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 3835bdce2ad7SSuresh Reddy if (!wrb) { 3836bdce2ad7SSuresh Reddy status = -EBUSY; 3837bdce2ad7SSuresh Reddy goto err; 3838bdce2ad7SSuresh Reddy } 3839bdce2ad7SSuresh Reddy 3840bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 3841bdce2ad7SSuresh Reddy 3842bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3843bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 3844bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 3845bdce2ad7SSuresh Reddy 3846bdce2ad7SSuresh Reddy req->hdr.version = 1; 3847bdce2ad7SSuresh Reddy req->hdr.domain = domain; 3848bdce2ad7SSuresh Reddy 3849bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE) 3850bdce2ad7SSuresh Reddy req->link_config |= 1; 3851bdce2ad7SSuresh Reddy 3852bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 3853bdce2ad7SSuresh Reddy req->link_config |= 1 << PLINK_TRACK_SHIFT; 3854bdce2ad7SSuresh Reddy 3855bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 3856bdce2ad7SSuresh Reddy err: 3857bdce2ad7SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 3858bdce2ad7SSuresh Reddy return status; 3859bdce2ad7SSuresh Reddy } 3860bdce2ad7SSuresh Reddy 38616a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 38626a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 38636a4ab669SParav Pandit { 38646a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 38656a4ab669SParav Pandit struct be_mcc_wrb *wrb; 38666a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 38676a4ab669SParav Pandit struct be_cmd_req_hdr *req; 38686a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 38696a4ab669SParav Pandit int status; 38706a4ab669SParav Pandit 38716a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 38726a4ab669SParav Pandit 38736a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 38746a4ab669SParav Pandit if (!wrb) { 38756a4ab669SParav Pandit status = -EBUSY; 38766a4ab669SParav Pandit goto err; 38776a4ab669SParav Pandit } 38786a4ab669SParav Pandit req = embedded_payload(wrb); 38796a4ab669SParav Pandit resp = embedded_payload(wrb); 38806a4ab669SParav Pandit 38816a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 38826a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 38836a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 38846a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 38856a4ab669SParav Pandit 38866a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 38876a4ab669SParav Pandit if (cmd_status) 38886a4ab669SParav Pandit *cmd_status = (status & 0xffff); 38896a4ab669SParav Pandit if (ext_status) 38906a4ab669SParav Pandit *ext_status = 0; 38916a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 38926a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 38936a4ab669SParav Pandit err: 38946a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 38956a4ab669SParav Pandit return status; 38966a4ab669SParav Pandit } 38976a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3898