19aebddd1SJeff Kirsher /* 240263820SVasundhara Volam * Copyright (C) 2005 - 2014 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 56f25b119cSPadmanabh Ratnakar { 57f25b119cSPadmanabh Ratnakar int i; 58f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 59f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 60f25b119cSPadmanabh Ratnakar 61f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 62f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 63f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 64f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 65f25b119cSPadmanabh Ratnakar return false; 66f25b119cSPadmanabh Ratnakar 67f25b119cSPadmanabh Ratnakar return true; 68f25b119cSPadmanabh Ratnakar } 69f25b119cSPadmanabh Ratnakar 703de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 713de09455SSomnath Kotur { 723de09455SSomnath Kotur return wrb->payload.embedded_payload; 733de09455SSomnath Kotur } 749aebddd1SJeff Kirsher 759aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 769aebddd1SJeff Kirsher { 779aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 789aebddd1SJeff Kirsher u32 val = 0; 799aebddd1SJeff Kirsher 806589ade0SSathya Perla if (be_error(adapter)) 819aebddd1SJeff Kirsher return; 829aebddd1SJeff Kirsher 839aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 849aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 859aebddd1SJeff Kirsher 869aebddd1SJeff Kirsher wmb(); 879aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 889aebddd1SJeff Kirsher } 899aebddd1SJeff Kirsher 909aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 919aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 929aebddd1SJeff Kirsher * little endian) */ 939aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 949aebddd1SJeff Kirsher { 959e9ff4b7SSathya Perla u32 flags; 969e9ff4b7SSathya Perla 979aebddd1SJeff Kirsher if (compl->flags != 0) { 989e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 999e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1009e9ff4b7SSathya Perla compl->flags = flags; 1019aebddd1SJeff Kirsher return true; 1029aebddd1SJeff Kirsher } 1039aebddd1SJeff Kirsher } 1049e9ff4b7SSathya Perla return false; 1059e9ff4b7SSathya Perla } 1069aebddd1SJeff Kirsher 1079aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1089aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1099aebddd1SJeff Kirsher { 1109aebddd1SJeff Kirsher compl->flags = 0; 1119aebddd1SJeff Kirsher } 1129aebddd1SJeff Kirsher 113652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 114652bf646SPadmanabh Ratnakar { 115652bf646SPadmanabh Ratnakar unsigned long addr; 116652bf646SPadmanabh Ratnakar 117652bf646SPadmanabh Ratnakar addr = tag1; 118652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 119652bf646SPadmanabh Ratnakar return (void *)addr; 120652bf646SPadmanabh Ratnakar } 121652bf646SPadmanabh Ratnakar 1229aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1239aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1249aebddd1SJeff Kirsher { 1259aebddd1SJeff Kirsher u16 compl_status, extd_status; 126652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 127652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1289aebddd1SJeff Kirsher 1299aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1309aebddd1SJeff Kirsher * from mcc_wrb */ 1319aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1329aebddd1SJeff Kirsher 1339aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1349aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1359aebddd1SJeff Kirsher 13696c9b2e4SVasundhara Volam extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 13796c9b2e4SVasundhara Volam CQE_STATUS_EXTD_MASK; 13896c9b2e4SVasundhara Volam 139652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 140652bf646SPadmanabh Ratnakar 141652bf646SPadmanabh Ratnakar if (resp_hdr) { 142652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 143652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 144652bf646SPadmanabh Ratnakar } 145652bf646SPadmanabh Ratnakar 1465eeff635SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 1475eeff635SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 1485eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1495eeff635SSuresh Reddy return 0; 1505eeff635SSuresh Reddy } 1515eeff635SSuresh Reddy 152652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 153652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 154652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1559aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1565eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1579aebddd1SJeff Kirsher } 1589aebddd1SJeff Kirsher 1599aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 160652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 161652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 162652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1639aebddd1SJeff Kirsher be_parse_stats(adapter); 1649aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1659aebddd1SJeff Kirsher } 166652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 167652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1683de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 169652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1703de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1713de09455SSomnath Kotur resp->on_die_temperature; 1723de09455SSomnath Kotur } 1739aebddd1SJeff Kirsher } else { 174652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1757aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1763de09455SSomnath Kotur 1779aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1789aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 17996c9b2e4SVasundhara Volam return compl_status; 18096c9b2e4SVasundhara Volam 18196c9b2e4SVasundhara Volam /* Ignore CRC mismatch error during FW download with old FW */ 18296c9b2e4SVasundhara Volam if (opcode == OPCODE_COMMON_WRITE_FLASHROM && 18396c9b2e4SVasundhara Volam compl_status == MCC_STATUS_FAILED && 18496c9b2e4SVasundhara Volam extd_status == MCC_ADDL_STS_FLASH_IMAGE_CRC_MISMATCH) 18596c9b2e4SVasundhara Volam return compl_status; 18696c9b2e4SVasundhara Volam 18796c9b2e4SVasundhara Volam /* Ignore illegal field error during FW download with old FW */ 18896c9b2e4SVasundhara Volam if (opcode == OPCODE_COMMON_WRITE_FLASHROM && 18996c9b2e4SVasundhara Volam compl_status == MCC_STATUS_ILLEGAL_FIELD) 19096c9b2e4SVasundhara Volam return compl_status; 1919aebddd1SJeff Kirsher 1929aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 19397f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 194522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 19597f1d8cdSVasundhara Volam opcode, subsystem); 1969aebddd1SJeff Kirsher } else { 19797f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 19897f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 19997f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 200d9d604f8SAjit Khaparde 201d9d604f8SAjit Khaparde if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) 202d9d604f8SAjit Khaparde return extd_status; 2039aebddd1SJeff Kirsher } 2049aebddd1SJeff Kirsher } 2059aebddd1SJeff Kirsher return compl_status; 2069aebddd1SJeff Kirsher } 2079aebddd1SJeff Kirsher 2089aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2099aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2109aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 2119aebddd1SJeff Kirsher { 212b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 21342f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 214b236916aSAjit Khaparde 215bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 216bdce2ad7SSuresh Reddy * notification for physical and logical link. 217bdce2ad7SSuresh Reddy * On other chips just process the logical link 218bdce2ad7SSuresh Reddy * status notification 219bdce2ad7SSuresh Reddy */ 220bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2212e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2222e177a5cSPadmanabh Ratnakar return; 2232e177a5cSPadmanabh Ratnakar 224b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 225b236916aSAjit Khaparde * it may not be received in some cases. 226b236916aSAjit Khaparde */ 227b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 228bdce2ad7SSuresh Reddy be_link_status_update(adapter, 229bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 2309aebddd1SJeff Kirsher } 2319aebddd1SJeff Kirsher 2329aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2339aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 234a2cc4e0bSSathya Perla struct 235a2cc4e0bSSathya Perla be_async_event_grp5_cos_priority 236a2cc4e0bSSathya Perla *evt) 2379aebddd1SJeff Kirsher { 2389aebddd1SJeff Kirsher if (evt->valid) { 2399aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2409aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2419aebddd1SJeff Kirsher adapter->recommended_prio = 2429aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2439aebddd1SJeff Kirsher } 2449aebddd1SJeff Kirsher } 2459aebddd1SJeff Kirsher 246323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2479aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 248a2cc4e0bSSathya Perla struct 249a2cc4e0bSSathya Perla be_async_event_grp5_qos_link_speed 250a2cc4e0bSSathya Perla *evt) 2519aebddd1SJeff Kirsher { 252323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 253323ff71eSSathya Perla evt->physical_port == adapter->port_num) 254323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2559aebddd1SJeff Kirsher } 2569aebddd1SJeff Kirsher 2579aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2589aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 259a2cc4e0bSSathya Perla struct 260a2cc4e0bSSathya Perla be_async_event_grp5_pvid_state 261a2cc4e0bSSathya Perla *evt) 2629aebddd1SJeff Kirsher { 263bdac85b5SRavikumar Nelavelli if (evt->enabled) { 264939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 265bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 266bdac85b5SRavikumar Nelavelli } else { 2679aebddd1SJeff Kirsher adapter->pvid = 0; 2689aebddd1SJeff Kirsher } 269bdac85b5SRavikumar Nelavelli } 2709aebddd1SJeff Kirsher 2719aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2729aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2739aebddd1SJeff Kirsher { 2749aebddd1SJeff Kirsher u8 event_type = 0; 2759aebddd1SJeff Kirsher 2769aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2779aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2789aebddd1SJeff Kirsher 2799aebddd1SJeff Kirsher switch (event_type) { 2809aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2819aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2829aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2839aebddd1SJeff Kirsher break; 2849aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2859aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2869aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2879aebddd1SJeff Kirsher break; 2889aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2899aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2909aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2919aebddd1SJeff Kirsher break; 2929aebddd1SJeff Kirsher default: 29305ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 29405ccaa2bSVasundhara Volam event_type); 2959aebddd1SJeff Kirsher break; 2969aebddd1SJeff Kirsher } 2979aebddd1SJeff Kirsher } 2989aebddd1SJeff Kirsher 299bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 300bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 301bc0c3405SAjit Khaparde { 302bc0c3405SAjit Khaparde u8 event_type = 0; 303bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 304bc0c3405SAjit Khaparde 305bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 306bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 307bc0c3405SAjit Khaparde 308bc0c3405SAjit Khaparde switch (event_type) { 309bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 310bc0c3405SAjit Khaparde if (evt->valid) 311bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 312bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 313bc0c3405SAjit Khaparde break; 314bc0c3405SAjit Khaparde default: 31505ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 31605ccaa2bSVasundhara Volam event_type); 317bc0c3405SAjit Khaparde break; 318bc0c3405SAjit Khaparde } 319bc0c3405SAjit Khaparde } 320bc0c3405SAjit Khaparde 3219aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 3229aebddd1SJeff Kirsher { 3239aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3249aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3259aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 3269aebddd1SJeff Kirsher } 3279aebddd1SJeff Kirsher 3289aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 3299aebddd1SJeff Kirsher { 3309aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3319aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3329aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3339aebddd1SJeff Kirsher } 3349aebddd1SJeff Kirsher 335bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 336bc0c3405SAjit Khaparde { 337bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 338bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 339bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 340bc0c3405SAjit Khaparde } 341bc0c3405SAjit Khaparde 3429aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3439aebddd1SJeff Kirsher { 3449aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3459aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3469aebddd1SJeff Kirsher 3479aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3489aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3499aebddd1SJeff Kirsher return compl; 3509aebddd1SJeff Kirsher } 3519aebddd1SJeff Kirsher return NULL; 3529aebddd1SJeff Kirsher } 3539aebddd1SJeff Kirsher 3549aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3559aebddd1SJeff Kirsher { 3569aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3579aebddd1SJeff Kirsher 3589aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3599aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3609aebddd1SJeff Kirsher 3619aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3629aebddd1SJeff Kirsher } 3639aebddd1SJeff Kirsher 3649aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3659aebddd1SJeff Kirsher { 366a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 367a323d9bfSSathya Perla 3689aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 369a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 370a323d9bfSSathya Perla 371a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3729aebddd1SJeff Kirsher } 3739aebddd1SJeff Kirsher 37410ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3759aebddd1SJeff Kirsher { 3769aebddd1SJeff Kirsher struct be_mcc_compl *compl; 37710ef9ab4SSathya Perla int num = 0, status = 0; 3789aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3799aebddd1SJeff Kirsher 380072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3819aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3829aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3839aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3849aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3859aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3869aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3879aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3889aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3899aebddd1SJeff Kirsher compl->flags, compl); 390bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 391bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 392bc0c3405SAjit Khaparde compl->flags, compl); 3939aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 39410ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3959aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3969aebddd1SJeff Kirsher } 3979aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3989aebddd1SJeff Kirsher num++; 3999aebddd1SJeff Kirsher } 4009aebddd1SJeff Kirsher 40110ef9ab4SSathya Perla if (num) 40210ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 40310ef9ab4SSathya Perla 404072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 40510ef9ab4SSathya Perla return status; 4069aebddd1SJeff Kirsher } 4079aebddd1SJeff Kirsher 4089aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 4099aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 4109aebddd1SJeff Kirsher { 4119aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 41210ef9ab4SSathya Perla int i, status = 0; 4139aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 4149aebddd1SJeff Kirsher 4156589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 4166589ade0SSathya Perla if (be_error(adapter)) 4179aebddd1SJeff Kirsher return -EIO; 4189aebddd1SJeff Kirsher 419072a9c48SAmerigo Wang local_bh_disable(); 42010ef9ab4SSathya Perla status = be_process_mcc(adapter); 421072a9c48SAmerigo Wang local_bh_enable(); 4229aebddd1SJeff Kirsher 4239aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 4249aebddd1SJeff Kirsher break; 4259aebddd1SJeff Kirsher udelay(100); 4269aebddd1SJeff Kirsher } 4279aebddd1SJeff Kirsher if (i == mcc_timeout) { 4286589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4296589ade0SSathya Perla adapter->fw_timeout = true; 430652bf646SPadmanabh Ratnakar return -EIO; 4319aebddd1SJeff Kirsher } 4329aebddd1SJeff Kirsher return status; 4339aebddd1SJeff Kirsher } 4349aebddd1SJeff Kirsher 4359aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4369aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4379aebddd1SJeff Kirsher { 438652bf646SPadmanabh Ratnakar int status; 439652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 440652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 441652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 442652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 443652bf646SPadmanabh Ratnakar 444652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 445652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 446652bf646SPadmanabh Ratnakar 447652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 448652bf646SPadmanabh Ratnakar 4499aebddd1SJeff Kirsher be_mcc_notify(adapter); 450652bf646SPadmanabh Ratnakar 451652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 452652bf646SPadmanabh Ratnakar if (status == -EIO) 453652bf646SPadmanabh Ratnakar goto out; 454652bf646SPadmanabh Ratnakar 455652bf646SPadmanabh Ratnakar status = resp->status; 456652bf646SPadmanabh Ratnakar out: 457652bf646SPadmanabh Ratnakar return status; 4589aebddd1SJeff Kirsher } 4599aebddd1SJeff Kirsher 4609aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4619aebddd1SJeff Kirsher { 4629aebddd1SJeff Kirsher int msecs = 0; 4639aebddd1SJeff Kirsher u32 ready; 4649aebddd1SJeff Kirsher 4656589ade0SSathya Perla do { 4666589ade0SSathya Perla if (be_error(adapter)) 4679aebddd1SJeff Kirsher return -EIO; 4689aebddd1SJeff Kirsher 4699aebddd1SJeff Kirsher ready = ioread32(db); 470434b3648SSathya Perla if (ready == 0xffffffff) 4719aebddd1SJeff Kirsher return -1; 4729aebddd1SJeff Kirsher 4739aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4749aebddd1SJeff Kirsher if (ready) 4759aebddd1SJeff Kirsher break; 4769aebddd1SJeff Kirsher 4779aebddd1SJeff Kirsher if (msecs > 4000) { 4786589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4796589ade0SSathya Perla adapter->fw_timeout = true; 480f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4819aebddd1SJeff Kirsher return -1; 4829aebddd1SJeff Kirsher } 4839aebddd1SJeff Kirsher 4849aebddd1SJeff Kirsher msleep(1); 4859aebddd1SJeff Kirsher msecs++; 4869aebddd1SJeff Kirsher } while (true); 4879aebddd1SJeff Kirsher 4889aebddd1SJeff Kirsher return 0; 4899aebddd1SJeff Kirsher } 4909aebddd1SJeff Kirsher 4919aebddd1SJeff Kirsher /* 4929aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4939aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4949aebddd1SJeff Kirsher */ 4959aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4969aebddd1SJeff Kirsher { 4979aebddd1SJeff Kirsher int status; 4989aebddd1SJeff Kirsher u32 val = 0; 4999aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 5009aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 5019aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 5029aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 5039aebddd1SJeff Kirsher 5049aebddd1SJeff Kirsher /* wait for ready to be set */ 5059aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5069aebddd1SJeff Kirsher if (status != 0) 5079aebddd1SJeff Kirsher return status; 5089aebddd1SJeff Kirsher 5099aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 5109aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 5119aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 5129aebddd1SJeff Kirsher iowrite32(val, db); 5139aebddd1SJeff Kirsher 5149aebddd1SJeff Kirsher /* wait for ready to be set */ 5159aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5169aebddd1SJeff Kirsher if (status != 0) 5179aebddd1SJeff Kirsher return status; 5189aebddd1SJeff Kirsher 5199aebddd1SJeff Kirsher val = 0; 5209aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 5219aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 5229aebddd1SJeff Kirsher iowrite32(val, db); 5239aebddd1SJeff Kirsher 5249aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5259aebddd1SJeff Kirsher if (status != 0) 5269aebddd1SJeff Kirsher return status; 5279aebddd1SJeff Kirsher 5289aebddd1SJeff Kirsher /* A cq entry has been made now */ 5299aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5309aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5319aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5329aebddd1SJeff Kirsher if (status) 5339aebddd1SJeff Kirsher return status; 5349aebddd1SJeff Kirsher } else { 5359aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5369aebddd1SJeff Kirsher return -1; 5379aebddd1SJeff Kirsher } 5389aebddd1SJeff Kirsher return 0; 5399aebddd1SJeff Kirsher } 5409aebddd1SJeff Kirsher 541c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5429aebddd1SJeff Kirsher { 5439aebddd1SJeff Kirsher u32 sem; 5449aebddd1SJeff Kirsher 545c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 546c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5479aebddd1SJeff Kirsher else 548c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 549c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 550c5b3ad4cSSathya Perla 551c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5529aebddd1SJeff Kirsher } 5539aebddd1SJeff Kirsher 55487f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 555bf99e50dSPadmanabh Ratnakar { 556bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 557bf99e50dSPadmanabh Ratnakar u32 sliport_status; 558bf99e50dSPadmanabh Ratnakar int status = 0, i; 559bf99e50dSPadmanabh Ratnakar 560bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 561bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 562bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 563bf99e50dSPadmanabh Ratnakar break; 564bf99e50dSPadmanabh Ratnakar 565bf99e50dSPadmanabh Ratnakar msleep(1000); 566bf99e50dSPadmanabh Ratnakar } 567bf99e50dSPadmanabh Ratnakar 568bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 569bf99e50dSPadmanabh Ratnakar status = -1; 570bf99e50dSPadmanabh Ratnakar 571bf99e50dSPadmanabh Ratnakar return status; 572bf99e50dSPadmanabh Ratnakar } 573bf99e50dSPadmanabh Ratnakar 57467297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 57567297ad8SPadmanabh Ratnakar { 57667297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 57767297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 57867297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 579a2cc4e0bSSathya Perla sliport_err1 = ioread32(adapter->db + SLIPORT_ERROR1_OFFSET); 580a2cc4e0bSSathya Perla sliport_err2 = ioread32(adapter->db + SLIPORT_ERROR2_OFFSET); 58167297ad8SPadmanabh Ratnakar 58267297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 58367297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 58467297ad8SPadmanabh Ratnakar return true; 58567297ad8SPadmanabh Ratnakar } 58667297ad8SPadmanabh Ratnakar return false; 58767297ad8SPadmanabh Ratnakar } 58867297ad8SPadmanabh Ratnakar 589bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 590bf99e50dSPadmanabh Ratnakar { 591bf99e50dSPadmanabh Ratnakar int status; 592bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 59367297ad8SPadmanabh Ratnakar bool resource_error; 59467297ad8SPadmanabh Ratnakar 59567297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 59667297ad8SPadmanabh Ratnakar if (resource_error) 59701e5b2c4SSomnath Kotur return -EAGAIN; 59867297ad8SPadmanabh Ratnakar 599bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 600bf99e50dSPadmanabh Ratnakar if (!status) { 601bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 602bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 603bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 604bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 605bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 606bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 607bf99e50dSPadmanabh Ratnakar 608bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 609bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 610bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 611bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 612bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 613bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 614bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 615bf99e50dSPadmanabh Ratnakar status = -1; 616bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 617bf99e50dSPadmanabh Ratnakar status = -1; 618bf99e50dSPadmanabh Ratnakar } 619bf99e50dSPadmanabh Ratnakar } 62067297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 62167297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 62267297ad8SPadmanabh Ratnakar * when PF provisions resources. 62367297ad8SPadmanabh Ratnakar */ 62467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 62501e5b2c4SSomnath Kotur if (resource_error) 62601e5b2c4SSomnath Kotur status = -EAGAIN; 62767297ad8SPadmanabh Ratnakar 628bf99e50dSPadmanabh Ratnakar return status; 629bf99e50dSPadmanabh Ratnakar } 630bf99e50dSPadmanabh Ratnakar 631bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6329aebddd1SJeff Kirsher { 6339aebddd1SJeff Kirsher u16 stage; 6349aebddd1SJeff Kirsher int status, timeout = 0; 6359aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6369aebddd1SJeff Kirsher 637bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 638bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 639bf99e50dSPadmanabh Ratnakar return status; 640bf99e50dSPadmanabh Ratnakar } 641bf99e50dSPadmanabh Ratnakar 6429aebddd1SJeff Kirsher do { 643c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 64466d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 64566d29cbcSGavin Shan return 0; 64666d29cbcSGavin Shan 647a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 6489aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6499aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6509aebddd1SJeff Kirsher return -EINTR; 6519aebddd1SJeff Kirsher } 6529aebddd1SJeff Kirsher timeout += 2; 6533ab81b5fSSomnath Kotur } while (timeout < 60); 6549aebddd1SJeff Kirsher 6559aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6569aebddd1SJeff Kirsher return -1; 6579aebddd1SJeff Kirsher } 6589aebddd1SJeff Kirsher 6599aebddd1SJeff Kirsher 6609aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6619aebddd1SJeff Kirsher { 6629aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6639aebddd1SJeff Kirsher } 6649aebddd1SJeff Kirsher 665a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 666bea50988SSathya Perla { 667bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 668bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 669bea50988SSathya Perla } 6709aebddd1SJeff Kirsher 6719aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 672106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 673106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 674106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 675a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 676a2cc4e0bSSathya Perla struct be_dma_mem *mem) 6779aebddd1SJeff Kirsher { 678106df1e3SSomnath Kotur struct be_sge *sge; 679106df1e3SSomnath Kotur 6809aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6819aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6829aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6839aebddd1SJeff Kirsher req_hdr->version = 0; 684bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 685106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 686106df1e3SSomnath Kotur if (mem) { 687106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 688106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 689106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 690106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 691106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 692106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 693106df1e3SSomnath Kotur } else 694106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 695106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6969aebddd1SJeff Kirsher } 6979aebddd1SJeff Kirsher 6989aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6999aebddd1SJeff Kirsher struct be_dma_mem *mem) 7009aebddd1SJeff Kirsher { 7019aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 7029aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 7039aebddd1SJeff Kirsher 7049aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 7059aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 7069aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 7079aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 7089aebddd1SJeff Kirsher } 7099aebddd1SJeff Kirsher } 7109aebddd1SJeff Kirsher 7119aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 7129aebddd1SJeff Kirsher { 7139aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 7149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 7159aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 7169aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7179aebddd1SJeff Kirsher return wrb; 7189aebddd1SJeff Kirsher } 7199aebddd1SJeff Kirsher 7209aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7219aebddd1SJeff Kirsher { 7229aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7239aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7249aebddd1SJeff Kirsher 725aa790db9SPadmanabh Ratnakar if (!mccq->created) 726aa790db9SPadmanabh Ratnakar return NULL; 727aa790db9SPadmanabh Ratnakar 7284d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7299aebddd1SJeff Kirsher return NULL; 7309aebddd1SJeff Kirsher 7319aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7329aebddd1SJeff Kirsher queue_head_inc(mccq); 7339aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7349aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7359aebddd1SJeff Kirsher return wrb; 7369aebddd1SJeff Kirsher } 7379aebddd1SJeff Kirsher 738bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 739bea50988SSathya Perla { 740bea50988SSathya Perla return adapter->mcc_obj.q.created; 741bea50988SSathya Perla } 742bea50988SSathya Perla 743bea50988SSathya Perla /* Must be used only in process context */ 744bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 745bea50988SSathya Perla { 746bea50988SSathya Perla if (use_mcc(adapter)) { 747bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 748bea50988SSathya Perla return 0; 749bea50988SSathya Perla } else { 750bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 751bea50988SSathya Perla } 752bea50988SSathya Perla } 753bea50988SSathya Perla 754bea50988SSathya Perla /* Must be used only in process context */ 755bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 756bea50988SSathya Perla { 757bea50988SSathya Perla if (use_mcc(adapter)) 758bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 759bea50988SSathya Perla else 760bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 761bea50988SSathya Perla } 762bea50988SSathya Perla 763bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 764bea50988SSathya Perla struct be_mcc_wrb *wrb) 765bea50988SSathya Perla { 766bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 767bea50988SSathya Perla 768bea50988SSathya Perla if (use_mcc(adapter)) { 769bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 770bea50988SSathya Perla if (!dest_wrb) 771bea50988SSathya Perla return NULL; 772bea50988SSathya Perla } else { 773bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 774bea50988SSathya Perla } 775bea50988SSathya Perla 776bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 777bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 778bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 779bea50988SSathya Perla 780bea50988SSathya Perla return dest_wrb; 781bea50988SSathya Perla } 782bea50988SSathya Perla 783bea50988SSathya Perla /* Must be used only in process context */ 784bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 785bea50988SSathya Perla struct be_mcc_wrb *wrb) 786bea50988SSathya Perla { 787bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 788bea50988SSathya Perla int status; 789bea50988SSathya Perla 790bea50988SSathya Perla status = be_cmd_lock(adapter); 791bea50988SSathya Perla if (status) 792bea50988SSathya Perla return status; 793bea50988SSathya Perla 794bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 795bea50988SSathya Perla if (!dest_wrb) 796bea50988SSathya Perla return -EBUSY; 797bea50988SSathya Perla 798bea50988SSathya Perla if (use_mcc(adapter)) 799bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 800bea50988SSathya Perla else 801bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 802bea50988SSathya Perla 803bea50988SSathya Perla if (!status) 804bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 805bea50988SSathya Perla 806bea50988SSathya Perla be_cmd_unlock(adapter); 807bea50988SSathya Perla return status; 808bea50988SSathya Perla } 809bea50988SSathya Perla 8109aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 8119aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8129aebddd1SJeff Kirsher */ 8139aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 8149aebddd1SJeff Kirsher { 8159aebddd1SJeff Kirsher u8 *wrb; 8169aebddd1SJeff Kirsher int status; 8179aebddd1SJeff Kirsher 818bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 819bf99e50dSPadmanabh Ratnakar return 0; 820bf99e50dSPadmanabh Ratnakar 8219aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8229aebddd1SJeff Kirsher return -1; 8239aebddd1SJeff Kirsher 8249aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8259aebddd1SJeff Kirsher *wrb++ = 0xFF; 8269aebddd1SJeff Kirsher *wrb++ = 0x12; 8279aebddd1SJeff Kirsher *wrb++ = 0x34; 8289aebddd1SJeff Kirsher *wrb++ = 0xFF; 8299aebddd1SJeff Kirsher *wrb++ = 0xFF; 8309aebddd1SJeff Kirsher *wrb++ = 0x56; 8319aebddd1SJeff Kirsher *wrb++ = 0x78; 8329aebddd1SJeff Kirsher *wrb = 0xFF; 8339aebddd1SJeff Kirsher 8349aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8359aebddd1SJeff Kirsher 8369aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8379aebddd1SJeff Kirsher return status; 8389aebddd1SJeff Kirsher } 8399aebddd1SJeff Kirsher 8409aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8419aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8429aebddd1SJeff Kirsher */ 8439aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8449aebddd1SJeff Kirsher { 8459aebddd1SJeff Kirsher u8 *wrb; 8469aebddd1SJeff Kirsher int status; 8479aebddd1SJeff Kirsher 848bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 849bf99e50dSPadmanabh Ratnakar return 0; 850bf99e50dSPadmanabh Ratnakar 8519aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8529aebddd1SJeff Kirsher return -1; 8539aebddd1SJeff Kirsher 8549aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8559aebddd1SJeff Kirsher *wrb++ = 0xFF; 8569aebddd1SJeff Kirsher *wrb++ = 0xAA; 8579aebddd1SJeff Kirsher *wrb++ = 0xBB; 8589aebddd1SJeff Kirsher *wrb++ = 0xFF; 8599aebddd1SJeff Kirsher *wrb++ = 0xFF; 8609aebddd1SJeff Kirsher *wrb++ = 0xCC; 8619aebddd1SJeff Kirsher *wrb++ = 0xDD; 8629aebddd1SJeff Kirsher *wrb = 0xFF; 8639aebddd1SJeff Kirsher 8649aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8659aebddd1SJeff Kirsher 8669aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8679aebddd1SJeff Kirsher return status; 8689aebddd1SJeff Kirsher } 869bf99e50dSPadmanabh Ratnakar 870f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8719aebddd1SJeff Kirsher { 8729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8739aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 874f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 875f2f781a7SSathya Perla int status, ver = 0; 8769aebddd1SJeff Kirsher 8779aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8789aebddd1SJeff Kirsher return -1; 8799aebddd1SJeff Kirsher 8809aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8819aebddd1SJeff Kirsher req = embedded_payload(wrb); 8829aebddd1SJeff Kirsher 883106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 884a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 885a2cc4e0bSSathya Perla NULL); 8869aebddd1SJeff Kirsher 887f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 888f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 889f2f781a7SSathya Perla ver = 2; 890f2f781a7SSathya Perla 891f2f781a7SSathya Perla req->hdr.version = ver; 8929aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8939aebddd1SJeff Kirsher 8949aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8959aebddd1SJeff Kirsher /* 4byte eqe*/ 8969aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8979aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 898f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 8999aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 9009aebddd1SJeff Kirsher 9019aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9029aebddd1SJeff Kirsher 9039aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9049aebddd1SJeff Kirsher if (!status) { 9059aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 906f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 907f2f781a7SSathya Perla eqo->msix_idx = 908f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 909f2f781a7SSathya Perla eqo->q.created = true; 9109aebddd1SJeff Kirsher } 9119aebddd1SJeff Kirsher 9129aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9139aebddd1SJeff Kirsher return status; 9149aebddd1SJeff Kirsher } 9159aebddd1SJeff Kirsher 916f9449ab7SSathya Perla /* Use MCC */ 9179aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 9185ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 9199aebddd1SJeff Kirsher { 9209aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9219aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 9229aebddd1SJeff Kirsher int status; 9239aebddd1SJeff Kirsher 924f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 9259aebddd1SJeff Kirsher 926f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 927f9449ab7SSathya Perla if (!wrb) { 928f9449ab7SSathya Perla status = -EBUSY; 929f9449ab7SSathya Perla goto err; 930f9449ab7SSathya Perla } 9319aebddd1SJeff Kirsher req = embedded_payload(wrb); 9329aebddd1SJeff Kirsher 933106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 934a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 935a2cc4e0bSSathya Perla NULL); 9365ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9379aebddd1SJeff Kirsher if (permanent) { 9389aebddd1SJeff Kirsher req->permanent = 1; 9399aebddd1SJeff Kirsher } else { 9409aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 941590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9429aebddd1SJeff Kirsher req->permanent = 0; 9439aebddd1SJeff Kirsher } 9449aebddd1SJeff Kirsher 945f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9469aebddd1SJeff Kirsher if (!status) { 9479aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9489aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9499aebddd1SJeff Kirsher } 9509aebddd1SJeff Kirsher 951f9449ab7SSathya Perla err: 952f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9539aebddd1SJeff Kirsher return status; 9549aebddd1SJeff Kirsher } 9559aebddd1SJeff Kirsher 9569aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9579aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9589aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9599aebddd1SJeff Kirsher { 9609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9619aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9629aebddd1SJeff Kirsher int status; 9639aebddd1SJeff Kirsher 9649aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9659aebddd1SJeff Kirsher 9669aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9679aebddd1SJeff Kirsher if (!wrb) { 9689aebddd1SJeff Kirsher status = -EBUSY; 9699aebddd1SJeff Kirsher goto err; 9709aebddd1SJeff Kirsher } 9719aebddd1SJeff Kirsher req = embedded_payload(wrb); 9729aebddd1SJeff Kirsher 973106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 974a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 975a2cc4e0bSSathya Perla NULL); 9769aebddd1SJeff Kirsher 9779aebddd1SJeff Kirsher req->hdr.domain = domain; 9789aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9799aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9809aebddd1SJeff Kirsher 9819aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9829aebddd1SJeff Kirsher if (!status) { 9839aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 9849aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 9859aebddd1SJeff Kirsher } 9869aebddd1SJeff Kirsher 9879aebddd1SJeff Kirsher err: 9889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 989e3a7ae2cSSomnath Kotur 990e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 991e3a7ae2cSSomnath Kotur status = -EPERM; 992e3a7ae2cSSomnath Kotur 9939aebddd1SJeff Kirsher return status; 9949aebddd1SJeff Kirsher } 9959aebddd1SJeff Kirsher 9969aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 99730128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9989aebddd1SJeff Kirsher { 9999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10009aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 10019aebddd1SJeff Kirsher int status; 10029aebddd1SJeff Kirsher 100330128031SSathya Perla if (pmac_id == -1) 100430128031SSathya Perla return 0; 100530128031SSathya Perla 10069aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 10079aebddd1SJeff Kirsher 10089aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10099aebddd1SJeff Kirsher if (!wrb) { 10109aebddd1SJeff Kirsher status = -EBUSY; 10119aebddd1SJeff Kirsher goto err; 10129aebddd1SJeff Kirsher } 10139aebddd1SJeff Kirsher req = embedded_payload(wrb); 10149aebddd1SJeff Kirsher 1015106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1016106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 10179aebddd1SJeff Kirsher 10189aebddd1SJeff Kirsher req->hdr.domain = dom; 10199aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 10209aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 10219aebddd1SJeff Kirsher 10229aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10239aebddd1SJeff Kirsher 10249aebddd1SJeff Kirsher err: 10259aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10269aebddd1SJeff Kirsher return status; 10279aebddd1SJeff Kirsher } 10289aebddd1SJeff Kirsher 10299aebddd1SJeff Kirsher /* Uses Mbox */ 103010ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 103110ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10329aebddd1SJeff Kirsher { 10339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10349aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10359aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10369aebddd1SJeff Kirsher void *ctxt; 10379aebddd1SJeff Kirsher int status; 10389aebddd1SJeff Kirsher 10399aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10409aebddd1SJeff Kirsher return -1; 10419aebddd1SJeff Kirsher 10429aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10439aebddd1SJeff Kirsher req = embedded_payload(wrb); 10449aebddd1SJeff Kirsher ctxt = &req->context; 10459aebddd1SJeff Kirsher 1046106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1047a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1048a2cc4e0bSSathya Perla NULL); 10499aebddd1SJeff Kirsher 10509aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1051bbdc42f8SAjit Khaparde 1052bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10539aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10549aebddd1SJeff Kirsher coalesce_wm); 10559aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10569aebddd1SJeff Kirsher ctxt, no_delay); 10579aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10589aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 10599aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10609aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10619aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1062bbdc42f8SAjit Khaparde } else { 1063bbdc42f8SAjit Khaparde req->hdr.version = 2; 1064bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 106509e83a9dSAjit Khaparde 106609e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 106709e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 106809e83a9dSAjit Khaparde */ 106909e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 107009e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 107109e83a9dSAjit Khaparde ctxt, coalesce_wm); 1072bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1073bbdc42f8SAjit Khaparde no_delay); 1074bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1075bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1076bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1077a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1078a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 10799aebddd1SJeff Kirsher } 10809aebddd1SJeff Kirsher 10819aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10829aebddd1SJeff Kirsher 10839aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10849aebddd1SJeff Kirsher 10859aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10869aebddd1SJeff Kirsher if (!status) { 10879aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 10889aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 10899aebddd1SJeff Kirsher cq->created = true; 10909aebddd1SJeff Kirsher } 10919aebddd1SJeff Kirsher 10929aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10939aebddd1SJeff Kirsher 10949aebddd1SJeff Kirsher return status; 10959aebddd1SJeff Kirsher } 10969aebddd1SJeff Kirsher 10979aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10989aebddd1SJeff Kirsher { 10999aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 11009aebddd1SJeff Kirsher if (len_encoded == 16) 11019aebddd1SJeff Kirsher len_encoded = 0; 11029aebddd1SJeff Kirsher return len_encoded; 11039aebddd1SJeff Kirsher } 11049aebddd1SJeff Kirsher 11054188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 11069aebddd1SJeff Kirsher struct be_queue_info *mccq, 11079aebddd1SJeff Kirsher struct be_queue_info *cq) 11089aebddd1SJeff Kirsher { 11099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11109aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 11119aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11129aebddd1SJeff Kirsher void *ctxt; 11139aebddd1SJeff Kirsher int status; 11149aebddd1SJeff Kirsher 11159aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11169aebddd1SJeff Kirsher return -1; 11179aebddd1SJeff Kirsher 11189aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11199aebddd1SJeff Kirsher req = embedded_payload(wrb); 11209aebddd1SJeff Kirsher ctxt = &req->context; 11219aebddd1SJeff Kirsher 1122106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1123a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1124a2cc4e0bSSathya Perla NULL); 11259aebddd1SJeff Kirsher 11269aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1127666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 11289aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11299aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11309aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11319aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1132666d39c7SVasundhara Volam } else { 1133666d39c7SVasundhara Volam req->hdr.version = 1; 1134666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1135666d39c7SVasundhara Volam 1136666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1137666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1138666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1139666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1140666d39c7SVasundhara Volam ctxt, cq->id); 1141666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1142666d39c7SVasundhara Volam ctxt, 1); 11439aebddd1SJeff Kirsher } 11449aebddd1SJeff Kirsher 11459aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11469aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1147bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11489aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11519aebddd1SJeff Kirsher 11529aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11539aebddd1SJeff Kirsher if (!status) { 11549aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11559aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11569aebddd1SJeff Kirsher mccq->created = true; 11579aebddd1SJeff Kirsher } 11589aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11599aebddd1SJeff Kirsher 11609aebddd1SJeff Kirsher return status; 11619aebddd1SJeff Kirsher } 11629aebddd1SJeff Kirsher 11634188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11649aebddd1SJeff Kirsher struct be_queue_info *mccq, 11659aebddd1SJeff Kirsher struct be_queue_info *cq) 11669aebddd1SJeff Kirsher { 11679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11689aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11699aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11709aebddd1SJeff Kirsher void *ctxt; 11719aebddd1SJeff Kirsher int status; 11729aebddd1SJeff Kirsher 11739aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11749aebddd1SJeff Kirsher return -1; 11759aebddd1SJeff Kirsher 11769aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11779aebddd1SJeff Kirsher req = embedded_payload(wrb); 11789aebddd1SJeff Kirsher ctxt = &req->context; 11799aebddd1SJeff Kirsher 1180106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1181a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1182a2cc4e0bSSathya Perla NULL); 11839aebddd1SJeff Kirsher 11849aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 11859aebddd1SJeff Kirsher 11869aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11889aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11899aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11909aebddd1SJeff Kirsher 11919aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11929aebddd1SJeff Kirsher 11939aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11949aebddd1SJeff Kirsher 11959aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11969aebddd1SJeff Kirsher if (!status) { 11979aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11989aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11999aebddd1SJeff Kirsher mccq->created = true; 12009aebddd1SJeff Kirsher } 12019aebddd1SJeff Kirsher 12029aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12039aebddd1SJeff Kirsher return status; 12049aebddd1SJeff Kirsher } 12059aebddd1SJeff Kirsher 12069aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1207a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 12089aebddd1SJeff Kirsher { 12099aebddd1SJeff Kirsher int status; 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1212666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 12139aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 12149aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 12159aebddd1SJeff Kirsher "and FCoE traffic"); 12169aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 12179aebddd1SJeff Kirsher } 12189aebddd1SJeff Kirsher return status; 12199aebddd1SJeff Kirsher } 12209aebddd1SJeff Kirsher 122194d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 12229aebddd1SJeff Kirsher { 12237707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 12249aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 122594d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 122694d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 12279aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 122894d73aaaSVasundhara Volam int status, ver = 0; 12299aebddd1SJeff Kirsher 12307707133cSSathya Perla req = embedded_payload(&wrb); 1231106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 12327707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 12339aebddd1SJeff Kirsher 12349aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12359aebddd1SJeff Kirsher req->hdr.version = 1; 123694d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 123794d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 123894d73aaaSVasundhara Volam req->hdr.version = 2; 123994d73aaaSVasundhara Volam } else { /* For SH */ 124094d73aaaSVasundhara Volam req->hdr.version = 2; 12419aebddd1SJeff Kirsher } 12429aebddd1SJeff Kirsher 124381b02655SVasundhara Volam if (req->hdr.version > 0) 124481b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12459aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12469aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12479aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 124894d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 124994d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12509aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 125194d73aaaSVasundhara Volam ver = req->hdr.version; 125294d73aaaSVasundhara Volam 12537707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12549aebddd1SJeff Kirsher if (!status) { 12557707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12569aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 125794d73aaaSVasundhara Volam if (ver == 2) 125894d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 125994d73aaaSVasundhara Volam else 126094d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12619aebddd1SJeff Kirsher txq->created = true; 12629aebddd1SJeff Kirsher } 12639aebddd1SJeff Kirsher 12649aebddd1SJeff Kirsher return status; 12659aebddd1SJeff Kirsher } 12669aebddd1SJeff Kirsher 12679aebddd1SJeff Kirsher /* Uses MCC */ 12689aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12699aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 127010ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12719aebddd1SJeff Kirsher { 12729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12739aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12749aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12759aebddd1SJeff Kirsher int status; 12769aebddd1SJeff Kirsher 12779aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12789aebddd1SJeff Kirsher 12799aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12809aebddd1SJeff Kirsher if (!wrb) { 12819aebddd1SJeff Kirsher status = -EBUSY; 12829aebddd1SJeff Kirsher goto err; 12839aebddd1SJeff Kirsher } 12849aebddd1SJeff Kirsher req = embedded_payload(wrb); 12859aebddd1SJeff Kirsher 1286106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1287106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12909aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12919aebddd1SJeff Kirsher req->num_pages = 2; 12929aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12939aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 129410ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12959aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12969aebddd1SJeff Kirsher 12979aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12989aebddd1SJeff Kirsher if (!status) { 12999aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 13009aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 13019aebddd1SJeff Kirsher rxq->created = true; 13029aebddd1SJeff Kirsher *rss_id = resp->rss_id; 13039aebddd1SJeff Kirsher } 13049aebddd1SJeff Kirsher 13059aebddd1SJeff Kirsher err: 13069aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13079aebddd1SJeff Kirsher return status; 13089aebddd1SJeff Kirsher } 13099aebddd1SJeff Kirsher 13109aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 13119aebddd1SJeff Kirsher * Uses Mbox 13129aebddd1SJeff Kirsher */ 13139aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 13149aebddd1SJeff Kirsher int queue_type) 13159aebddd1SJeff Kirsher { 13169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13179aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13189aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 13199aebddd1SJeff Kirsher int status; 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13229aebddd1SJeff Kirsher return -1; 13239aebddd1SJeff Kirsher 13249aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13259aebddd1SJeff Kirsher req = embedded_payload(wrb); 13269aebddd1SJeff Kirsher 13279aebddd1SJeff Kirsher switch (queue_type) { 13289aebddd1SJeff Kirsher case QTYPE_EQ: 13299aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13309aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 13319aebddd1SJeff Kirsher break; 13329aebddd1SJeff Kirsher case QTYPE_CQ: 13339aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13349aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13359aebddd1SJeff Kirsher break; 13369aebddd1SJeff Kirsher case QTYPE_TXQ: 13379aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13389aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13399aebddd1SJeff Kirsher break; 13409aebddd1SJeff Kirsher case QTYPE_RXQ: 13419aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13429aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13439aebddd1SJeff Kirsher break; 13449aebddd1SJeff Kirsher case QTYPE_MCCQ: 13459aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13469aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13479aebddd1SJeff Kirsher break; 13489aebddd1SJeff Kirsher default: 13499aebddd1SJeff Kirsher BUG(); 13509aebddd1SJeff Kirsher } 13519aebddd1SJeff Kirsher 1352106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1353106df1e3SSomnath Kotur NULL); 13549aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13559aebddd1SJeff Kirsher 13569aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13579aebddd1SJeff Kirsher q->created = false; 13589aebddd1SJeff Kirsher 13599aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13609aebddd1SJeff Kirsher return status; 13619aebddd1SJeff Kirsher } 13629aebddd1SJeff Kirsher 13639aebddd1SJeff Kirsher /* Uses MCC */ 13649aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13659aebddd1SJeff Kirsher { 13669aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13679aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13689aebddd1SJeff Kirsher int status; 13699aebddd1SJeff Kirsher 13709aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13719aebddd1SJeff Kirsher 13729aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13739aebddd1SJeff Kirsher if (!wrb) { 13749aebddd1SJeff Kirsher status = -EBUSY; 13759aebddd1SJeff Kirsher goto err; 13769aebddd1SJeff Kirsher } 13779aebddd1SJeff Kirsher req = embedded_payload(wrb); 13789aebddd1SJeff Kirsher 1379106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1380106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13819aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13829aebddd1SJeff Kirsher 13839aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13849aebddd1SJeff Kirsher q->created = false; 13859aebddd1SJeff Kirsher 13869aebddd1SJeff Kirsher err: 13879aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13889aebddd1SJeff Kirsher return status; 13899aebddd1SJeff Kirsher } 13909aebddd1SJeff Kirsher 13919aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1392bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 13939aebddd1SJeff Kirsher */ 13949aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13951578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13969aebddd1SJeff Kirsher { 1397bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 13989aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13999aebddd1SJeff Kirsher int status; 14009aebddd1SJeff Kirsher 1401bea50988SSathya Perla req = embedded_payload(&wrb); 1402106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1403a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1404a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 14059aebddd1SJeff Kirsher req->hdr.domain = domain; 14069aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 14079aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1408f9449ab7SSathya Perla req->pmac_invalid = true; 14099aebddd1SJeff Kirsher 1410bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 14119aebddd1SJeff Kirsher if (!status) { 1412bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 14139aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1414b5bb9776SSathya Perla 1415b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1416b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1417b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 14189aebddd1SJeff Kirsher } 14199aebddd1SJeff Kirsher return status; 14209aebddd1SJeff Kirsher } 14219aebddd1SJeff Kirsher 1422f9449ab7SSathya Perla /* Uses MCCQ */ 142330128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 14249aebddd1SJeff Kirsher { 14259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14269aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 14279aebddd1SJeff Kirsher int status; 14289aebddd1SJeff Kirsher 142930128031SSathya Perla if (interface_id == -1) 1430f9449ab7SSathya Perla return 0; 14319aebddd1SJeff Kirsher 1432f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1433f9449ab7SSathya Perla 1434f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1435f9449ab7SSathya Perla if (!wrb) { 1436f9449ab7SSathya Perla status = -EBUSY; 1437f9449ab7SSathya Perla goto err; 1438f9449ab7SSathya Perla } 14399aebddd1SJeff Kirsher req = embedded_payload(wrb); 14409aebddd1SJeff Kirsher 1441106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1442a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 1443a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 14449aebddd1SJeff Kirsher req->hdr.domain = domain; 14459aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14469aebddd1SJeff Kirsher 1447f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1448f9449ab7SSathya Perla err: 1449f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14509aebddd1SJeff Kirsher return status; 14519aebddd1SJeff Kirsher } 14529aebddd1SJeff Kirsher 14539aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14549aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14559aebddd1SJeff Kirsher * Uses asynchronous MCC 14569aebddd1SJeff Kirsher */ 14579aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14589aebddd1SJeff Kirsher { 14599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14609aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14619aebddd1SJeff Kirsher int status = 0; 14629aebddd1SJeff Kirsher 14639aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14649aebddd1SJeff Kirsher 14659aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14669aebddd1SJeff Kirsher if (!wrb) { 14679aebddd1SJeff Kirsher status = -EBUSY; 14689aebddd1SJeff Kirsher goto err; 14699aebddd1SJeff Kirsher } 14709aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14719aebddd1SJeff Kirsher 1472106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1473a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1474a2cc4e0bSSathya Perla nonemb_cmd); 14759aebddd1SJeff Kirsher 1476ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 147761000861SAjit Khaparde if (BE2_chip(adapter)) 147861000861SAjit Khaparde hdr->version = 0; 147961000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 14809aebddd1SJeff Kirsher hdr->version = 1; 148161000861SAjit Khaparde else 148261000861SAjit Khaparde hdr->version = 2; 14839aebddd1SJeff Kirsher 14849aebddd1SJeff Kirsher be_mcc_notify(adapter); 14859aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14869aebddd1SJeff Kirsher 14879aebddd1SJeff Kirsher err: 14889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14899aebddd1SJeff Kirsher return status; 14909aebddd1SJeff Kirsher } 14919aebddd1SJeff Kirsher 14929aebddd1SJeff Kirsher /* Lancer Stats */ 14939aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14949aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14959aebddd1SJeff Kirsher { 14969aebddd1SJeff Kirsher 14979aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14989aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14999aebddd1SJeff Kirsher int status = 0; 15009aebddd1SJeff Kirsher 1501f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1502f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1503f25b119cSPadmanabh Ratnakar return -EPERM; 1504f25b119cSPadmanabh Ratnakar 15059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15069aebddd1SJeff Kirsher 15079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15089aebddd1SJeff Kirsher if (!wrb) { 15099aebddd1SJeff Kirsher status = -EBUSY; 15109aebddd1SJeff Kirsher goto err; 15119aebddd1SJeff Kirsher } 15129aebddd1SJeff Kirsher req = nonemb_cmd->va; 15139aebddd1SJeff Kirsher 1514106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1515a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1516a2cc4e0bSSathya Perla wrb, nonemb_cmd); 15179aebddd1SJeff Kirsher 1518d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 15199aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 15209aebddd1SJeff Kirsher 15219aebddd1SJeff Kirsher be_mcc_notify(adapter); 15229aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15239aebddd1SJeff Kirsher 15249aebddd1SJeff Kirsher err: 15259aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15269aebddd1SJeff Kirsher return status; 15279aebddd1SJeff Kirsher } 15289aebddd1SJeff Kirsher 1529323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1530323ff71eSSathya Perla { 1531323ff71eSSathya Perla switch (mac_speed) { 1532323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1533323ff71eSSathya Perla return 0; 1534323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1535323ff71eSSathya Perla return 10; 1536323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1537323ff71eSSathya Perla return 100; 1538323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1539323ff71eSSathya Perla return 1000; 1540323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1541323ff71eSSathya Perla return 10000; 1542b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1543b971f847SVasundhara Volam return 20000; 1544b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1545b971f847SVasundhara Volam return 25000; 1546b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1547b971f847SVasundhara Volam return 40000; 1548323ff71eSSathya Perla } 1549323ff71eSSathya Perla return 0; 1550323ff71eSSathya Perla } 1551323ff71eSSathya Perla 1552323ff71eSSathya Perla /* Uses synchronous mcc 1553323ff71eSSathya Perla * Returns link_speed in Mbps 1554323ff71eSSathya Perla */ 1555323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1556323ff71eSSathya Perla u8 *link_status, u32 dom) 15579aebddd1SJeff Kirsher { 15589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15599aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15609aebddd1SJeff Kirsher int status; 15619aebddd1SJeff Kirsher 15629aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15639aebddd1SJeff Kirsher 1564b236916aSAjit Khaparde if (link_status) 1565b236916aSAjit Khaparde *link_status = LINK_DOWN; 1566b236916aSAjit Khaparde 15679aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15689aebddd1SJeff Kirsher if (!wrb) { 15699aebddd1SJeff Kirsher status = -EBUSY; 15709aebddd1SJeff Kirsher goto err; 15719aebddd1SJeff Kirsher } 15729aebddd1SJeff Kirsher req = embedded_payload(wrb); 15739aebddd1SJeff Kirsher 157457cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1575a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1576a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 157757cd80d4SPadmanabh Ratnakar 1578ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1579ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1580daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1581daad6167SPadmanabh Ratnakar 158257cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15839aebddd1SJeff Kirsher 15849aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15859aebddd1SJeff Kirsher if (!status) { 15869aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1587323ff71eSSathya Perla if (link_speed) { 1588323ff71eSSathya Perla *link_speed = resp->link_speed ? 1589323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1590323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1591323ff71eSSathya Perla 1592323ff71eSSathya Perla if (!resp->logical_link_status) 1593323ff71eSSathya Perla *link_speed = 0; 15949aebddd1SJeff Kirsher } 1595b236916aSAjit Khaparde if (link_status) 1596b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15979aebddd1SJeff Kirsher } 15989aebddd1SJeff Kirsher 15999aebddd1SJeff Kirsher err: 16009aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16019aebddd1SJeff Kirsher return status; 16029aebddd1SJeff Kirsher } 16039aebddd1SJeff Kirsher 16049aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16059aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 16069aebddd1SJeff Kirsher { 16079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16089aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1609117affe3SVasundhara Volam int status = 0; 16109aebddd1SJeff Kirsher 16119aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16129aebddd1SJeff Kirsher 16139aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16149aebddd1SJeff Kirsher if (!wrb) { 16159aebddd1SJeff Kirsher status = -EBUSY; 16169aebddd1SJeff Kirsher goto err; 16179aebddd1SJeff Kirsher } 16189aebddd1SJeff Kirsher req = embedded_payload(wrb); 16199aebddd1SJeff Kirsher 1620106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1621a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1622a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 16239aebddd1SJeff Kirsher 16243de09455SSomnath Kotur be_mcc_notify(adapter); 16259aebddd1SJeff Kirsher 16269aebddd1SJeff Kirsher err: 16279aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16289aebddd1SJeff Kirsher return status; 16299aebddd1SJeff Kirsher } 16309aebddd1SJeff Kirsher 16319aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16329aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 16339aebddd1SJeff Kirsher { 16349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16359aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16369aebddd1SJeff Kirsher int status; 16379aebddd1SJeff Kirsher 16389aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16399aebddd1SJeff Kirsher 16409aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16419aebddd1SJeff Kirsher if (!wrb) { 16429aebddd1SJeff Kirsher status = -EBUSY; 16439aebddd1SJeff Kirsher goto err; 16449aebddd1SJeff Kirsher } 16459aebddd1SJeff Kirsher req = embedded_payload(wrb); 16469aebddd1SJeff Kirsher 1647106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1648a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, 1649a2cc4e0bSSathya Perla NULL); 16509aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16519aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16529aebddd1SJeff Kirsher if (!status) { 16539aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16549aebddd1SJeff Kirsher if (log_size && resp->log_size) 16559aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16569aebddd1SJeff Kirsher sizeof(u32); 16579aebddd1SJeff Kirsher } 16589aebddd1SJeff Kirsher err: 16599aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16609aebddd1SJeff Kirsher return status; 16619aebddd1SJeff Kirsher } 16629aebddd1SJeff Kirsher 16639aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16649aebddd1SJeff Kirsher { 16659aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16669aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16679aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16689aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16699aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 16709aebddd1SJeff Kirsher int status; 16719aebddd1SJeff Kirsher 16729aebddd1SJeff Kirsher if (buf_len == 0) 16739aebddd1SJeff Kirsher return; 16749aebddd1SJeff Kirsher 16759aebddd1SJeff Kirsher total_size = buf_len; 16769aebddd1SJeff Kirsher 16779aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16789aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16799aebddd1SJeff Kirsher get_fat_cmd.size, 16809aebddd1SJeff Kirsher &get_fat_cmd.dma); 16819aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 16829aebddd1SJeff Kirsher status = -ENOMEM; 16839aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16849aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16859aebddd1SJeff Kirsher return; 16869aebddd1SJeff Kirsher } 16879aebddd1SJeff Kirsher 16889aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16899aebddd1SJeff Kirsher 16909aebddd1SJeff Kirsher while (total_size) { 16919aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16929aebddd1SJeff Kirsher total_size -= buf_size; 16939aebddd1SJeff Kirsher 16949aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16959aebddd1SJeff Kirsher if (!wrb) { 16969aebddd1SJeff Kirsher status = -EBUSY; 16979aebddd1SJeff Kirsher goto err; 16989aebddd1SJeff Kirsher } 16999aebddd1SJeff Kirsher req = get_fat_cmd.va; 17009aebddd1SJeff Kirsher 17019aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1702106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1703a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1704a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 17059aebddd1SJeff Kirsher 17069aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 17079aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 17089aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 17099aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 17109aebddd1SJeff Kirsher 17119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17129aebddd1SJeff Kirsher if (!status) { 17139aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 17149aebddd1SJeff Kirsher memcpy(buf + offset, 17159aebddd1SJeff Kirsher resp->data_buffer, 171692aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 17179aebddd1SJeff Kirsher } else { 17189aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 17199aebddd1SJeff Kirsher goto err; 17209aebddd1SJeff Kirsher } 17219aebddd1SJeff Kirsher offset += buf_size; 17229aebddd1SJeff Kirsher log_offset += buf_size; 17239aebddd1SJeff Kirsher } 17249aebddd1SJeff Kirsher err: 17259aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 1726a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 17279aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17289aebddd1SJeff Kirsher } 17299aebddd1SJeff Kirsher 173004b71175SSathya Perla /* Uses synchronous mcc */ 173104b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 173204b71175SSathya Perla char *fw_on_flash) 17339aebddd1SJeff Kirsher { 17349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17359aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 17369aebddd1SJeff Kirsher int status; 17379aebddd1SJeff Kirsher 173804b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17399aebddd1SJeff Kirsher 174004b71175SSathya Perla wrb = wrb_from_mccq(adapter); 174104b71175SSathya Perla if (!wrb) { 174204b71175SSathya Perla status = -EBUSY; 174304b71175SSathya Perla goto err; 174404b71175SSathya Perla } 174504b71175SSathya Perla 17469aebddd1SJeff Kirsher req = embedded_payload(wrb); 17479aebddd1SJeff Kirsher 1748106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1749a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1750a2cc4e0bSSathya Perla NULL); 175104b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17529aebddd1SJeff Kirsher if (!status) { 17539aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 175404b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 175504b71175SSathya Perla if (fw_on_flash) 175604b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 17579aebddd1SJeff Kirsher } 175804b71175SSathya Perla err: 175904b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17609aebddd1SJeff Kirsher return status; 17619aebddd1SJeff Kirsher } 17629aebddd1SJeff Kirsher 17639aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17649aebddd1SJeff Kirsher * Uses async mcc 17659aebddd1SJeff Kirsher */ 17662632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 17672632bafdSSathya Perla int num) 17689aebddd1SJeff Kirsher { 17699aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17709aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17712632bafdSSathya Perla int status = 0, i; 17729aebddd1SJeff Kirsher 17739aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17749aebddd1SJeff Kirsher 17759aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17769aebddd1SJeff Kirsher if (!wrb) { 17779aebddd1SJeff Kirsher status = -EBUSY; 17789aebddd1SJeff Kirsher goto err; 17799aebddd1SJeff Kirsher } 17809aebddd1SJeff Kirsher req = embedded_payload(wrb); 17819aebddd1SJeff Kirsher 1782106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1783a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1784a2cc4e0bSSathya Perla NULL); 17859aebddd1SJeff Kirsher 17862632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 17872632bafdSSathya Perla for (i = 0; i < num; i++) { 17882632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 17892632bafdSSathya Perla req->set_eqd[i].phase = 0; 17902632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 17912632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 17922632bafdSSathya Perla } 17939aebddd1SJeff Kirsher 17949aebddd1SJeff Kirsher be_mcc_notify(adapter); 17959aebddd1SJeff Kirsher err: 17969aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17979aebddd1SJeff Kirsher return status; 17989aebddd1SJeff Kirsher } 17999aebddd1SJeff Kirsher 18009aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 18019aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 18024d567d97SKalesh AP u32 num) 18039aebddd1SJeff Kirsher { 18049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18059aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 18069aebddd1SJeff Kirsher int status; 18079aebddd1SJeff Kirsher 18089aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18099aebddd1SJeff Kirsher 18109aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18119aebddd1SJeff Kirsher if (!wrb) { 18129aebddd1SJeff Kirsher status = -EBUSY; 18139aebddd1SJeff Kirsher goto err; 18149aebddd1SJeff Kirsher } 18159aebddd1SJeff Kirsher req = embedded_payload(wrb); 18169aebddd1SJeff Kirsher 1817106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1818a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1819a2cc4e0bSSathya Perla wrb, NULL); 18209aebddd1SJeff Kirsher 18219aebddd1SJeff Kirsher req->interface_id = if_id; 1822012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 18239aebddd1SJeff Kirsher req->num_vlan = num; 18249aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 18259aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 18269aebddd1SJeff Kirsher 18279aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18289aebddd1SJeff Kirsher err: 18299aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18309aebddd1SJeff Kirsher return status; 18319aebddd1SJeff Kirsher } 18329aebddd1SJeff Kirsher 18339aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 18349aebddd1SJeff Kirsher { 18359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18369aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 18379aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18389aebddd1SJeff Kirsher int status; 18399aebddd1SJeff Kirsher 18409aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18419aebddd1SJeff Kirsher 18429aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18439aebddd1SJeff Kirsher if (!wrb) { 18449aebddd1SJeff Kirsher status = -EBUSY; 18459aebddd1SJeff Kirsher goto err; 18469aebddd1SJeff Kirsher } 18479aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1848106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1849106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1850106df1e3SSomnath Kotur wrb, mem); 18519aebddd1SJeff Kirsher 18529aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18539aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18549aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1855c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1856c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18579aebddd1SJeff Kirsher if (value == ON) 1858a2cc4e0bSSathya Perla req->if_flags = 1859a2cc4e0bSSathya Perla cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1860c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1861c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18629aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 18639aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 18649aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1865d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1866d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1867d9d604f8SAjit Khaparde 1868d9d604f8SAjit Khaparde if (value == ON) 1869d9d604f8SAjit Khaparde req->if_flags = 1870d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 18719aebddd1SJeff Kirsher } else { 18729aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 18739aebddd1SJeff Kirsher int i = 0; 18749aebddd1SJeff Kirsher 18758e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 18768e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 18771610c79fSPadmanabh Ratnakar 18781610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 18791610c79fSPadmanabh Ratnakar * and not setting flags field 18801610c79fSPadmanabh Ratnakar */ 18811610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1882abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 188392bf14abSSathya Perla be_if_cap_flags(adapter)); 1884016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 18859aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 18869aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 18879aebddd1SJeff Kirsher } 18889aebddd1SJeff Kirsher 1889012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1890012bd387SAjit Khaparde req->if_flags_mask) { 1891012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1892012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1893012bd387SAjit Khaparde req->if_flags_mask); 1894012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1895012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1896012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1897012bd387SAjit Khaparde } 1898012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1899012bd387SAjit Khaparde 19009aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1901012bd387SAjit Khaparde 19029aebddd1SJeff Kirsher err: 19039aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19049aebddd1SJeff Kirsher return status; 19059aebddd1SJeff Kirsher } 19069aebddd1SJeff Kirsher 19079aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 19089aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 19099aebddd1SJeff Kirsher { 19109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19119aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 19129aebddd1SJeff Kirsher int status; 19139aebddd1SJeff Kirsher 1914f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1915f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1916f25b119cSPadmanabh Ratnakar return -EPERM; 1917f25b119cSPadmanabh Ratnakar 19189aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19199aebddd1SJeff Kirsher 19209aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19219aebddd1SJeff Kirsher if (!wrb) { 19229aebddd1SJeff Kirsher status = -EBUSY; 19239aebddd1SJeff Kirsher goto err; 19249aebddd1SJeff Kirsher } 19259aebddd1SJeff Kirsher req = embedded_payload(wrb); 19269aebddd1SJeff Kirsher 1927106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1928a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 1929a2cc4e0bSSathya Perla wrb, NULL); 19309aebddd1SJeff Kirsher 19319aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 19329aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 19339aebddd1SJeff Kirsher 19349aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19359aebddd1SJeff Kirsher 19369aebddd1SJeff Kirsher err: 19379aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19389aebddd1SJeff Kirsher return status; 19399aebddd1SJeff Kirsher } 19409aebddd1SJeff Kirsher 19419aebddd1SJeff Kirsher /* Uses sycn mcc */ 19429aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19439aebddd1SJeff Kirsher { 19449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19459aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 19469aebddd1SJeff Kirsher int status; 19479aebddd1SJeff Kirsher 1948f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1949f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1950f25b119cSPadmanabh Ratnakar return -EPERM; 1951f25b119cSPadmanabh Ratnakar 19529aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19539aebddd1SJeff Kirsher 19549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19559aebddd1SJeff Kirsher if (!wrb) { 19569aebddd1SJeff Kirsher status = -EBUSY; 19579aebddd1SJeff Kirsher goto err; 19589aebddd1SJeff Kirsher } 19599aebddd1SJeff Kirsher req = embedded_payload(wrb); 19609aebddd1SJeff Kirsher 1961106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1962a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 1963a2cc4e0bSSathya Perla wrb, NULL); 19649aebddd1SJeff Kirsher 19659aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19669aebddd1SJeff Kirsher if (!status) { 19679aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 19689aebddd1SJeff Kirsher embedded_payload(wrb); 19699aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 19709aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 19719aebddd1SJeff Kirsher } 19729aebddd1SJeff Kirsher 19739aebddd1SJeff Kirsher err: 19749aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19759aebddd1SJeff Kirsher return status; 19769aebddd1SJeff Kirsher } 19779aebddd1SJeff Kirsher 19789aebddd1SJeff Kirsher /* Uses mbox */ 19799aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19800ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 19819aebddd1SJeff Kirsher { 19829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19839aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 19849aebddd1SJeff Kirsher int status; 19859aebddd1SJeff Kirsher 19869aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19879aebddd1SJeff Kirsher return -1; 19889aebddd1SJeff Kirsher 19899aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19909aebddd1SJeff Kirsher req = embedded_payload(wrb); 19919aebddd1SJeff Kirsher 1992106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1993a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 1994a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 19959aebddd1SJeff Kirsher 19969aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19979aebddd1SJeff Kirsher if (!status) { 19989aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 19999aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 20009aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 20019aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 20020ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 20039aebddd1SJeff Kirsher } 20049aebddd1SJeff Kirsher 20059aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20069aebddd1SJeff Kirsher return status; 20079aebddd1SJeff Kirsher } 20089aebddd1SJeff Kirsher 20099aebddd1SJeff Kirsher /* Uses mbox */ 20109aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 20119aebddd1SJeff Kirsher { 20129aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20139aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 20149aebddd1SJeff Kirsher int status; 20159aebddd1SJeff Kirsher 2016bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2017bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 2018bf99e50dSPadmanabh Ratnakar if (!status) { 2019bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2020bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 2021bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 2022bf99e50dSPadmanabh Ratnakar } 2023bf99e50dSPadmanabh Ratnakar if (status) { 2024bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2025bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2026bf99e50dSPadmanabh Ratnakar } 2027bf99e50dSPadmanabh Ratnakar return status; 2028bf99e50dSPadmanabh Ratnakar } 2029bf99e50dSPadmanabh Ratnakar 20309aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20319aebddd1SJeff Kirsher return -1; 20329aebddd1SJeff Kirsher 20339aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20349aebddd1SJeff Kirsher req = embedded_payload(wrb); 20359aebddd1SJeff Kirsher 2036106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2037a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2038a2cc4e0bSSathya Perla NULL); 20399aebddd1SJeff Kirsher 20409aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20419aebddd1SJeff Kirsher 20429aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20439aebddd1SJeff Kirsher return status; 20449aebddd1SJeff Kirsher } 20459aebddd1SJeff Kirsher 2046594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2047e2557877SVenkata Duvvuru u32 rss_hash_opts, u16 table_size, u8 *rss_hkey) 20489aebddd1SJeff Kirsher { 20499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20509aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 20519aebddd1SJeff Kirsher int status; 20529aebddd1SJeff Kirsher 2053da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2054da1388d6SVasundhara Volam return 0; 2055da1388d6SVasundhara Volam 2056b51aa367SKalesh AP spin_lock_bh(&adapter->mcc_lock); 20579aebddd1SJeff Kirsher 2058b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2059b51aa367SKalesh AP if (!wrb) { 2060b51aa367SKalesh AP status = -EBUSY; 2061b51aa367SKalesh AP goto err; 2062b51aa367SKalesh AP } 20639aebddd1SJeff Kirsher req = embedded_payload(wrb); 20649aebddd1SJeff Kirsher 2065106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2066106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 20679aebddd1SJeff Kirsher 20689aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2069594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 20709aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2071594ad54aSSuresh Reddy 2072b51aa367SKalesh AP if (!BEx_chip(adapter)) 2073594ad54aSSuresh Reddy req->hdr.version = 1; 2074594ad54aSSuresh Reddy 20759aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2076e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 20779aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 20789aebddd1SJeff Kirsher 2079b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2080b51aa367SKalesh AP err: 2081b51aa367SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 20829aebddd1SJeff Kirsher return status; 20839aebddd1SJeff Kirsher } 20849aebddd1SJeff Kirsher 20859aebddd1SJeff Kirsher /* Uses sync mcc */ 20869aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 20879aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 20889aebddd1SJeff Kirsher { 20899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20909aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 20919aebddd1SJeff Kirsher int status; 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20949aebddd1SJeff Kirsher 20959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20969aebddd1SJeff Kirsher if (!wrb) { 20979aebddd1SJeff Kirsher status = -EBUSY; 20989aebddd1SJeff Kirsher goto err; 20999aebddd1SJeff Kirsher } 21009aebddd1SJeff Kirsher req = embedded_payload(wrb); 21019aebddd1SJeff Kirsher 2102106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2103a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2104a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21059aebddd1SJeff Kirsher 21069aebddd1SJeff Kirsher req->port_num = port_num; 21079aebddd1SJeff Kirsher req->beacon_state = state; 21089aebddd1SJeff Kirsher req->beacon_duration = bcn; 21099aebddd1SJeff Kirsher req->status_duration = sts; 21109aebddd1SJeff Kirsher 21119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21129aebddd1SJeff Kirsher 21139aebddd1SJeff Kirsher err: 21149aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21159aebddd1SJeff Kirsher return status; 21169aebddd1SJeff Kirsher } 21179aebddd1SJeff Kirsher 21189aebddd1SJeff Kirsher /* Uses sync mcc */ 21199aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 21209aebddd1SJeff Kirsher { 21219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21229aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 21239aebddd1SJeff Kirsher int status; 21249aebddd1SJeff Kirsher 21259aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21269aebddd1SJeff Kirsher 21279aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21289aebddd1SJeff Kirsher if (!wrb) { 21299aebddd1SJeff Kirsher status = -EBUSY; 21309aebddd1SJeff Kirsher goto err; 21319aebddd1SJeff Kirsher } 21329aebddd1SJeff Kirsher req = embedded_payload(wrb); 21339aebddd1SJeff Kirsher 2134106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2135a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2136a2cc4e0bSSathya Perla wrb, NULL); 21379aebddd1SJeff Kirsher 21389aebddd1SJeff Kirsher req->port_num = port_num; 21399aebddd1SJeff Kirsher 21409aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21419aebddd1SJeff Kirsher if (!status) { 21429aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 21439aebddd1SJeff Kirsher embedded_payload(wrb); 21449aebddd1SJeff Kirsher *state = resp->beacon_state; 21459aebddd1SJeff Kirsher } 21469aebddd1SJeff Kirsher 21479aebddd1SJeff Kirsher err: 21489aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21499aebddd1SJeff Kirsher return status; 21509aebddd1SJeff Kirsher } 21519aebddd1SJeff Kirsher 21529aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2153f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2154f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2155f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 21569aebddd1SJeff Kirsher { 21579aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21589aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 21599aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 21609aebddd1SJeff Kirsher void *ctxt = NULL; 21619aebddd1SJeff Kirsher int status; 21629aebddd1SJeff Kirsher 21639aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21649aebddd1SJeff Kirsher adapter->flash_status = 0; 21659aebddd1SJeff Kirsher 21669aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21679aebddd1SJeff Kirsher if (!wrb) { 21689aebddd1SJeff Kirsher status = -EBUSY; 21699aebddd1SJeff Kirsher goto err_unlock; 21709aebddd1SJeff Kirsher } 21719aebddd1SJeff Kirsher 21729aebddd1SJeff Kirsher req = embedded_payload(wrb); 21739aebddd1SJeff Kirsher 2174106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 21759aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2176106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2177106df1e3SSomnath Kotur NULL); 21789aebddd1SJeff Kirsher 21799aebddd1SJeff Kirsher ctxt = &req->context; 21809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21819aebddd1SJeff Kirsher write_length, ctxt, data_size); 21829aebddd1SJeff Kirsher 21839aebddd1SJeff Kirsher if (data_size == 0) 21849aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21859aebddd1SJeff Kirsher eof, ctxt, 1); 21869aebddd1SJeff Kirsher else 21879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21889aebddd1SJeff Kirsher eof, ctxt, 0); 21899aebddd1SJeff Kirsher 21909aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 21919aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 21929aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 21939aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 21949aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 21959aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 21969aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 21979aebddd1SJeff Kirsher & 0xFFFFFFFF); 21989aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 21999aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 22009aebddd1SJeff Kirsher 22019aebddd1SJeff Kirsher be_mcc_notify(adapter); 22029aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22039aebddd1SJeff Kirsher 22045eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2205701962d0SSomnath Kotur msecs_to_jiffies(60000))) 22069aebddd1SJeff Kirsher status = -1; 22079aebddd1SJeff Kirsher else 22089aebddd1SJeff Kirsher status = adapter->flash_status; 22099aebddd1SJeff Kirsher 22109aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2211f67ef7baSPadmanabh Ratnakar if (!status) { 22129aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2213f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2214f67ef7baSPadmanabh Ratnakar } else { 22159aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2216f67ef7baSPadmanabh Ratnakar } 22179aebddd1SJeff Kirsher 22189aebddd1SJeff Kirsher return status; 22199aebddd1SJeff Kirsher 22209aebddd1SJeff Kirsher err_unlock: 22219aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22229aebddd1SJeff Kirsher return status; 22239aebddd1SJeff Kirsher } 22249aebddd1SJeff Kirsher 2225de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2226de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2227de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2228de49bd5aSPadmanabh Ratnakar { 2229de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2230de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2231de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2232de49bd5aSPadmanabh Ratnakar int status; 2233de49bd5aSPadmanabh Ratnakar 2234de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2235de49bd5aSPadmanabh Ratnakar 2236de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2237de49bd5aSPadmanabh Ratnakar if (!wrb) { 2238de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2239de49bd5aSPadmanabh Ratnakar goto err_unlock; 2240de49bd5aSPadmanabh Ratnakar } 2241de49bd5aSPadmanabh Ratnakar 2242de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2243de49bd5aSPadmanabh Ratnakar 2244de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2245de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2246de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2247de49bd5aSPadmanabh Ratnakar NULL); 2248de49bd5aSPadmanabh Ratnakar 2249de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2250de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2251de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2252de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2253de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2254de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2255de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2256de49bd5aSPadmanabh Ratnakar 2257de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2258de49bd5aSPadmanabh Ratnakar 2259de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2260de49bd5aSPadmanabh Ratnakar if (!status) { 2261de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2262de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2263de49bd5aSPadmanabh Ratnakar } else { 2264de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2265de49bd5aSPadmanabh Ratnakar } 2266de49bd5aSPadmanabh Ratnakar 2267de49bd5aSPadmanabh Ratnakar err_unlock: 2268de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2269de49bd5aSPadmanabh Ratnakar return status; 2270de49bd5aSPadmanabh Ratnakar } 2271de49bd5aSPadmanabh Ratnakar 22729aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 22739aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 22749aebddd1SJeff Kirsher { 22759aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22769aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 22779aebddd1SJeff Kirsher int status; 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22809aebddd1SJeff Kirsher adapter->flash_status = 0; 22819aebddd1SJeff Kirsher 22829aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22839aebddd1SJeff Kirsher if (!wrb) { 22849aebddd1SJeff Kirsher status = -EBUSY; 22859aebddd1SJeff Kirsher goto err_unlock; 22869aebddd1SJeff Kirsher } 22879aebddd1SJeff Kirsher req = cmd->va; 22889aebddd1SJeff Kirsher 2289106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2290a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2291a2cc4e0bSSathya Perla cmd); 22929aebddd1SJeff Kirsher 22939aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 22949aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 22959aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 22969aebddd1SJeff Kirsher 22979aebddd1SJeff Kirsher be_mcc_notify(adapter); 22989aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22999aebddd1SJeff Kirsher 23005eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2301e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 23029aebddd1SJeff Kirsher status = -1; 23039aebddd1SJeff Kirsher else 23049aebddd1SJeff Kirsher status = adapter->flash_status; 23059aebddd1SJeff Kirsher 23069aebddd1SJeff Kirsher return status; 23079aebddd1SJeff Kirsher 23089aebddd1SJeff Kirsher err_unlock: 23099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23109aebddd1SJeff Kirsher return status; 23119aebddd1SJeff Kirsher } 23129aebddd1SJeff Kirsher 23139aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 231496c9b2e4SVasundhara Volam u16 optype, int offset) 23159aebddd1SJeff Kirsher { 23169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2317be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 23189aebddd1SJeff Kirsher int status; 23199aebddd1SJeff Kirsher 23209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23219aebddd1SJeff Kirsher 23229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23239aebddd1SJeff Kirsher if (!wrb) { 23249aebddd1SJeff Kirsher status = -EBUSY; 23259aebddd1SJeff Kirsher goto err; 23269aebddd1SJeff Kirsher } 23279aebddd1SJeff Kirsher req = embedded_payload(wrb); 23289aebddd1SJeff Kirsher 2329106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2330be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2331be716446SPadmanabh Ratnakar wrb, NULL); 23329aebddd1SJeff Kirsher 233396c9b2e4SVasundhara Volam req->params.op_type = cpu_to_le32(optype); 23349aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 23359aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 23369aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 23379aebddd1SJeff Kirsher 23389aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23399aebddd1SJeff Kirsher if (!status) 2340be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 23419aebddd1SJeff Kirsher 23429aebddd1SJeff Kirsher err: 23439aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23449aebddd1SJeff Kirsher return status; 23459aebddd1SJeff Kirsher } 23469aebddd1SJeff Kirsher 23479aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 23489aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23499aebddd1SJeff Kirsher { 23509aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23519aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 23529aebddd1SJeff Kirsher int status; 23539aebddd1SJeff Kirsher 23549aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23559aebddd1SJeff Kirsher 23569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23579aebddd1SJeff Kirsher if (!wrb) { 23589aebddd1SJeff Kirsher status = -EBUSY; 23599aebddd1SJeff Kirsher goto err; 23609aebddd1SJeff Kirsher } 23619aebddd1SJeff Kirsher req = nonemb_cmd->va; 23629aebddd1SJeff Kirsher 2363106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2364a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 2365a2cc4e0bSSathya Perla wrb, nonemb_cmd); 23669aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 23679aebddd1SJeff Kirsher 23689aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23699aebddd1SJeff Kirsher 23709aebddd1SJeff Kirsher err: 23719aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23729aebddd1SJeff Kirsher return status; 23739aebddd1SJeff Kirsher } 23749aebddd1SJeff Kirsher 23759aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 23769aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 23779aebddd1SJeff Kirsher { 23789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23799aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 23809aebddd1SJeff Kirsher int status; 23819aebddd1SJeff Kirsher 23829aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23839aebddd1SJeff Kirsher 23849aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23859aebddd1SJeff Kirsher if (!wrb) { 23869aebddd1SJeff Kirsher status = -EBUSY; 23879aebddd1SJeff Kirsher goto err; 23889aebddd1SJeff Kirsher } 23899aebddd1SJeff Kirsher 23909aebddd1SJeff Kirsher req = embedded_payload(wrb); 23919aebddd1SJeff Kirsher 2392106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2393a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 2394a2cc4e0bSSathya Perla wrb, NULL); 23959aebddd1SJeff Kirsher 23969aebddd1SJeff Kirsher req->src_port = port_num; 23979aebddd1SJeff Kirsher req->dest_port = port_num; 23989aebddd1SJeff Kirsher req->loopback_type = loopback_type; 23999aebddd1SJeff Kirsher req->loopback_state = enable; 24009aebddd1SJeff Kirsher 24019aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24029aebddd1SJeff Kirsher err: 24039aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24049aebddd1SJeff Kirsher return status; 24059aebddd1SJeff Kirsher } 24069aebddd1SJeff Kirsher 24079aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 2408a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 2409a2cc4e0bSSathya Perla u64 pattern) 24109aebddd1SJeff Kirsher { 24119aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24129aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 24135eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 24149aebddd1SJeff Kirsher int status; 24159aebddd1SJeff Kirsher 24169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24179aebddd1SJeff Kirsher 24189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24199aebddd1SJeff Kirsher if (!wrb) { 24209aebddd1SJeff Kirsher status = -EBUSY; 24219aebddd1SJeff Kirsher goto err; 24229aebddd1SJeff Kirsher } 24239aebddd1SJeff Kirsher 24249aebddd1SJeff Kirsher req = embedded_payload(wrb); 24259aebddd1SJeff Kirsher 2426106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2427a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 2428a2cc4e0bSSathya Perla NULL); 24299aebddd1SJeff Kirsher 24305eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 24319aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24329aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 24339aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 24349aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 24359aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 24369aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 24379aebddd1SJeff Kirsher 24385eeff635SSuresh Reddy be_mcc_notify(adapter); 24399aebddd1SJeff Kirsher 24405eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 24415eeff635SSuresh Reddy 24425eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 24435eeff635SSuresh Reddy resp = embedded_payload(wrb); 24445eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 24455eeff635SSuresh Reddy 24465eeff635SSuresh Reddy return status; 24479aebddd1SJeff Kirsher err: 24489aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24499aebddd1SJeff Kirsher return status; 24509aebddd1SJeff Kirsher } 24519aebddd1SJeff Kirsher 24529aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 24539aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 24549aebddd1SJeff Kirsher { 24559aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24569aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 24579aebddd1SJeff Kirsher int status; 24589aebddd1SJeff Kirsher int i, j = 0; 24599aebddd1SJeff Kirsher 24609aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24619aebddd1SJeff Kirsher 24629aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24639aebddd1SJeff Kirsher if (!wrb) { 24649aebddd1SJeff Kirsher status = -EBUSY; 24659aebddd1SJeff Kirsher goto err; 24669aebddd1SJeff Kirsher } 24679aebddd1SJeff Kirsher req = cmd->va; 2468106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2469a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 2470a2cc4e0bSSathya Perla cmd); 24719aebddd1SJeff Kirsher 24729aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24739aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 24749aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 24759aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 24769aebddd1SJeff Kirsher j++; 24779aebddd1SJeff Kirsher if (j > 7) 24789aebddd1SJeff Kirsher j = 0; 24799aebddd1SJeff Kirsher } 24809aebddd1SJeff Kirsher 24819aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24829aebddd1SJeff Kirsher 24839aebddd1SJeff Kirsher if (!status) { 24849aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 24859aebddd1SJeff Kirsher resp = cmd->va; 24869aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 24879aebddd1SJeff Kirsher resp->snd_err) { 24889aebddd1SJeff Kirsher status = -1; 24899aebddd1SJeff Kirsher } 24909aebddd1SJeff Kirsher } 24919aebddd1SJeff Kirsher 24929aebddd1SJeff Kirsher err: 24939aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24949aebddd1SJeff Kirsher return status; 24959aebddd1SJeff Kirsher } 24969aebddd1SJeff Kirsher 24979aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 24989aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24999aebddd1SJeff Kirsher { 25009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25019aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 25029aebddd1SJeff Kirsher int status; 25039aebddd1SJeff Kirsher 25049aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25059aebddd1SJeff Kirsher 25069aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25079aebddd1SJeff Kirsher if (!wrb) { 25089aebddd1SJeff Kirsher status = -EBUSY; 25099aebddd1SJeff Kirsher goto err; 25109aebddd1SJeff Kirsher } 25119aebddd1SJeff Kirsher req = nonemb_cmd->va; 25129aebddd1SJeff Kirsher 2513106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2514106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2515106df1e3SSomnath Kotur nonemb_cmd); 25169aebddd1SJeff Kirsher 25179aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25189aebddd1SJeff Kirsher 25199aebddd1SJeff Kirsher err: 25209aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25219aebddd1SJeff Kirsher return status; 25229aebddd1SJeff Kirsher } 25239aebddd1SJeff Kirsher 252442f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 25259aebddd1SJeff Kirsher { 25269aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25279aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 25289aebddd1SJeff Kirsher struct be_dma_mem cmd; 25299aebddd1SJeff Kirsher int status; 25309aebddd1SJeff Kirsher 2531f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2532f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2533f25b119cSPadmanabh Ratnakar return -EPERM; 2534f25b119cSPadmanabh Ratnakar 25359aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25369aebddd1SJeff Kirsher 25379aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25389aebddd1SJeff Kirsher if (!wrb) { 25399aebddd1SJeff Kirsher status = -EBUSY; 25409aebddd1SJeff Kirsher goto err; 25419aebddd1SJeff Kirsher } 25429aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 2543a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 25449aebddd1SJeff Kirsher if (!cmd.va) { 25459aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 25469aebddd1SJeff Kirsher status = -ENOMEM; 25479aebddd1SJeff Kirsher goto err; 25489aebddd1SJeff Kirsher } 25499aebddd1SJeff Kirsher 25509aebddd1SJeff Kirsher req = cmd.va; 25519aebddd1SJeff Kirsher 2552106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2553106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2554106df1e3SSomnath Kotur wrb, &cmd); 25559aebddd1SJeff Kirsher 25569aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25579aebddd1SJeff Kirsher if (!status) { 25589aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 25599aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 256042f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 256142f11cf2SAjit Khaparde adapter->phy.interface_type = 25629aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 256342f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 256442f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 256542f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 256642f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 256742f11cf2SAjit Khaparde adapter->phy.misc_params = 256842f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 256968cb7e47SVasundhara Volam 257068cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 257168cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 257268cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 257368cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 257468cb7e47SVasundhara Volam } 25759aebddd1SJeff Kirsher } 2576a2cc4e0bSSathya Perla pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 25779aebddd1SJeff Kirsher err: 25789aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25799aebddd1SJeff Kirsher return status; 25809aebddd1SJeff Kirsher } 25819aebddd1SJeff Kirsher 25829aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 25839aebddd1SJeff Kirsher { 25849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25859aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 25869aebddd1SJeff Kirsher int status; 25879aebddd1SJeff Kirsher 25889aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25899aebddd1SJeff Kirsher 25909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25919aebddd1SJeff Kirsher if (!wrb) { 25929aebddd1SJeff Kirsher status = -EBUSY; 25939aebddd1SJeff Kirsher goto err; 25949aebddd1SJeff Kirsher } 25959aebddd1SJeff Kirsher 25969aebddd1SJeff Kirsher req = embedded_payload(wrb); 25979aebddd1SJeff Kirsher 2598106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2599106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 26009aebddd1SJeff Kirsher 26019aebddd1SJeff Kirsher req->hdr.domain = domain; 26029aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 26039aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 26049aebddd1SJeff Kirsher 26059aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26069aebddd1SJeff Kirsher 26079aebddd1SJeff Kirsher err: 26089aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26099aebddd1SJeff Kirsher return status; 26109aebddd1SJeff Kirsher } 26119aebddd1SJeff Kirsher 26129aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 26139aebddd1SJeff Kirsher { 26149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26159aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 26169aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 26179aebddd1SJeff Kirsher int status; 26189aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 26199aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 26209aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 26219aebddd1SJeff Kirsher 2622d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2623d98ef50fSSuresh Reddy return -1; 2624d98ef50fSSuresh Reddy 26259aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 26269aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 26279aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 26289aebddd1SJeff Kirsher &attribs_cmd.dma); 26299aebddd1SJeff Kirsher if (!attribs_cmd.va) { 2630a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 2631d98ef50fSSuresh Reddy status = -ENOMEM; 2632d98ef50fSSuresh Reddy goto err; 26339aebddd1SJeff Kirsher } 26349aebddd1SJeff Kirsher 26359aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26369aebddd1SJeff Kirsher if (!wrb) { 26379aebddd1SJeff Kirsher status = -EBUSY; 26389aebddd1SJeff Kirsher goto err; 26399aebddd1SJeff Kirsher } 26409aebddd1SJeff Kirsher req = attribs_cmd.va; 26419aebddd1SJeff Kirsher 2642106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2643a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 2644a2cc4e0bSSathya Perla wrb, &attribs_cmd); 26459aebddd1SJeff Kirsher 26469aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26479aebddd1SJeff Kirsher if (!status) { 26489aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 26499aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 26509aebddd1SJeff Kirsher } 26519aebddd1SJeff Kirsher 26529aebddd1SJeff Kirsher err: 26539aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2654d98ef50fSSuresh Reddy if (attribs_cmd.va) 2655d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2656d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 26579aebddd1SJeff Kirsher return status; 26589aebddd1SJeff Kirsher } 26599aebddd1SJeff Kirsher 26609aebddd1SJeff Kirsher /* Uses mbox */ 26619aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 26629aebddd1SJeff Kirsher { 26639aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26649aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 26659aebddd1SJeff Kirsher int status; 26669aebddd1SJeff Kirsher 26679aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 26689aebddd1SJeff Kirsher return -1; 26699aebddd1SJeff Kirsher 26709aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26719aebddd1SJeff Kirsher if (!wrb) { 26729aebddd1SJeff Kirsher status = -EBUSY; 26739aebddd1SJeff Kirsher goto err; 26749aebddd1SJeff Kirsher } 26759aebddd1SJeff Kirsher 26769aebddd1SJeff Kirsher req = embedded_payload(wrb); 26779aebddd1SJeff Kirsher 2678106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2679a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 2680a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 26819aebddd1SJeff Kirsher 26829aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 26839aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 26849aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 26859aebddd1SJeff Kirsher 26869aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26879aebddd1SJeff Kirsher if (!status) { 26889aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 26899aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 26909aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2691d379142bSSathya Perla if (!adapter->be3_native) 2692d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2693d379142bSSathya Perla "adapter not in advanced mode\n"); 26949aebddd1SJeff Kirsher } 26959aebddd1SJeff Kirsher err: 26969aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 26979aebddd1SJeff Kirsher return status; 26989aebddd1SJeff Kirsher } 2699590c391dSPadmanabh Ratnakar 2700f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2701f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2702f25b119cSPadmanabh Ratnakar u32 domain) 2703f25b119cSPadmanabh Ratnakar { 2704f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2705f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2706f25b119cSPadmanabh Ratnakar int status; 2707f25b119cSPadmanabh Ratnakar 2708f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2709f25b119cSPadmanabh Ratnakar 2710f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2711f25b119cSPadmanabh Ratnakar if (!wrb) { 2712f25b119cSPadmanabh Ratnakar status = -EBUSY; 2713f25b119cSPadmanabh Ratnakar goto err; 2714f25b119cSPadmanabh Ratnakar } 2715f25b119cSPadmanabh Ratnakar 2716f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2717f25b119cSPadmanabh Ratnakar 2718f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2719f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2720f25b119cSPadmanabh Ratnakar wrb, NULL); 2721f25b119cSPadmanabh Ratnakar 2722f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2723f25b119cSPadmanabh Ratnakar 2724f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2725f25b119cSPadmanabh Ratnakar if (!status) { 2726f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2727f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2728f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 272902308d74SSuresh Reddy 273002308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 273102308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 273202308d74SSuresh Reddy */ 273302308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 273402308d74SSuresh Reddy be_physfn(adapter)) 273502308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 2736f25b119cSPadmanabh Ratnakar } 2737f25b119cSPadmanabh Ratnakar 2738f25b119cSPadmanabh Ratnakar err: 2739f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2740f25b119cSPadmanabh Ratnakar return status; 2741f25b119cSPadmanabh Ratnakar } 2742f25b119cSPadmanabh Ratnakar 274304a06028SSathya Perla /* Set privilege(s) for a function */ 274404a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 274504a06028SSathya Perla u32 domain) 274604a06028SSathya Perla { 274704a06028SSathya Perla struct be_mcc_wrb *wrb; 274804a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 274904a06028SSathya Perla int status; 275004a06028SSathya Perla 275104a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 275204a06028SSathya Perla 275304a06028SSathya Perla wrb = wrb_from_mccq(adapter); 275404a06028SSathya Perla if (!wrb) { 275504a06028SSathya Perla status = -EBUSY; 275604a06028SSathya Perla goto err; 275704a06028SSathya Perla } 275804a06028SSathya Perla 275904a06028SSathya Perla req = embedded_payload(wrb); 276004a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 276104a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 276204a06028SSathya Perla wrb, NULL); 276304a06028SSathya Perla req->hdr.domain = domain; 276404a06028SSathya Perla if (lancer_chip(adapter)) 276504a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 276604a06028SSathya Perla else 276704a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 276804a06028SSathya Perla 276904a06028SSathya Perla status = be_mcc_notify_wait(adapter); 277004a06028SSathya Perla err: 277104a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 277204a06028SSathya Perla return status; 277304a06028SSathya Perla } 277404a06028SSathya Perla 27755a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 27765a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 27775a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 27785a712c13SSathya Perla */ 27791578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 2780b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 2781b188f090SSuresh Reddy u8 domain) 2782590c391dSPadmanabh Ratnakar { 2783590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2784590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2785590c391dSPadmanabh Ratnakar int status; 2786590c391dSPadmanabh Ratnakar int mac_count; 2787e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2788e5e1ee89SPadmanabh Ratnakar int i; 2789e5e1ee89SPadmanabh Ratnakar 2790e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2791e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2792e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2793e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2794e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2795e5e1ee89SPadmanabh Ratnakar 2796e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2797e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2798e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2799e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2800e5e1ee89SPadmanabh Ratnakar } 2801590c391dSPadmanabh Ratnakar 2802590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2803590c391dSPadmanabh Ratnakar 2804590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2805590c391dSPadmanabh Ratnakar if (!wrb) { 2806590c391dSPadmanabh Ratnakar status = -EBUSY; 2807e5e1ee89SPadmanabh Ratnakar goto out; 2808590c391dSPadmanabh Ratnakar } 2809e5e1ee89SPadmanabh Ratnakar 2810e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2811590c391dSPadmanabh Ratnakar 2812590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2813bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2814bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2815590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2816e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 28175a712c13SSathya Perla if (*pmac_id_valid) { 28185a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 2819b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 28205a712c13SSathya Perla req->perm_override = 0; 28215a712c13SSathya Perla } else { 2822e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 28235a712c13SSathya Perla } 2824590c391dSPadmanabh Ratnakar 2825590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2826590c391dSPadmanabh Ratnakar if (!status) { 2827590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2828e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 28295a712c13SSathya Perla 28305a712c13SSathya Perla if (*pmac_id_valid) { 28315a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 28325a712c13SSathya Perla ETH_ALEN); 28335a712c13SSathya Perla goto out; 28345a712c13SSathya Perla } 28355a712c13SSathya Perla 2836e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2837e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 28381578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 28391578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 28401578e777SPadmanabh Ratnakar * found. 2841e5e1ee89SPadmanabh Ratnakar */ 2842590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2843e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2844e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2845e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2846e5e1ee89SPadmanabh Ratnakar 2847e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2848e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2849e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2850e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2851e5e1ee89SPadmanabh Ratnakar */ 2852e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 28535a712c13SSathya Perla *pmac_id_valid = true; 2854e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2855e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2856e5e1ee89SPadmanabh Ratnakar goto out; 2857590c391dSPadmanabh Ratnakar } 2858590c391dSPadmanabh Ratnakar } 28591578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 28605a712c13SSathya Perla *pmac_id_valid = false; 2861e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2862e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2863590c391dSPadmanabh Ratnakar } 2864590c391dSPadmanabh Ratnakar 2865e5e1ee89SPadmanabh Ratnakar out: 2866590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2867e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2868e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2869590c391dSPadmanabh Ratnakar return status; 2870590c391dSPadmanabh Ratnakar } 2871590c391dSPadmanabh Ratnakar 2872a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 2873a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 28745a712c13SSathya Perla { 28755a712c13SSathya Perla 2876b188f090SSuresh Reddy if (!active) 2877b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 2878b188f090SSuresh Reddy if_handle, domain); 28793175d8c2SSathya Perla if (BEx_chip(adapter)) 28805a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 2881b188f090SSuresh Reddy if_handle, curr_pmac_id); 28823175d8c2SSathya Perla else 28833175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 28843175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 2885b188f090SSuresh Reddy &curr_pmac_id, 2886b188f090SSuresh Reddy if_handle, domain); 28875a712c13SSathya Perla } 28885a712c13SSathya Perla 288995046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 289095046b92SSathya Perla { 289195046b92SSathya Perla int status; 289295046b92SSathya Perla bool pmac_valid = false; 289395046b92SSathya Perla 289495046b92SSathya Perla memset(mac, 0, ETH_ALEN); 289595046b92SSathya Perla 28963175d8c2SSathya Perla if (BEx_chip(adapter)) { 28973175d8c2SSathya Perla if (be_physfn(adapter)) 28983175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 28993175d8c2SSathya Perla 0); 290095046b92SSathya Perla else 290195046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 290295046b92SSathya Perla adapter->if_handle, 0); 29033175d8c2SSathya Perla } else { 29043175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 2905b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 29063175d8c2SSathya Perla } 29073175d8c2SSathya Perla 290895046b92SSathya Perla return status; 290995046b92SSathya Perla } 291095046b92SSathya Perla 2911590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2912590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2913590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2914590c391dSPadmanabh Ratnakar { 2915590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2916590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2917590c391dSPadmanabh Ratnakar int status; 2918590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2919590c391dSPadmanabh Ratnakar 2920590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2921590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2922590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2923590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2924d0320f75SJoe Perches if (!cmd.va) 2925590c391dSPadmanabh Ratnakar return -ENOMEM; 2926590c391dSPadmanabh Ratnakar 2927590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2928590c391dSPadmanabh Ratnakar 2929590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2930590c391dSPadmanabh Ratnakar if (!wrb) { 2931590c391dSPadmanabh Ratnakar status = -EBUSY; 2932590c391dSPadmanabh Ratnakar goto err; 2933590c391dSPadmanabh Ratnakar } 2934590c391dSPadmanabh Ratnakar 2935590c391dSPadmanabh Ratnakar req = cmd.va; 2936590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2937590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2938590c391dSPadmanabh Ratnakar wrb, &cmd); 2939590c391dSPadmanabh Ratnakar 2940590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2941590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2942590c391dSPadmanabh Ratnakar if (mac_count) 2943590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2944590c391dSPadmanabh Ratnakar 2945590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2946590c391dSPadmanabh Ratnakar 2947590c391dSPadmanabh Ratnakar err: 2948a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2949590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2950590c391dSPadmanabh Ratnakar return status; 2951590c391dSPadmanabh Ratnakar } 29524762f6ceSAjit Khaparde 29533175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 29543175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 29553175d8c2SSathya Perla * current list are active. 29563175d8c2SSathya Perla */ 29573175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 29583175d8c2SSathya Perla { 29593175d8c2SSathya Perla bool active_mac = false; 29603175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 29613175d8c2SSathya Perla u32 pmac_id; 29623175d8c2SSathya Perla int status; 29633175d8c2SSathya Perla 29643175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 2965b188f090SSuresh Reddy &pmac_id, if_id, dom); 2966b188f090SSuresh Reddy 29673175d8c2SSathya Perla if (!status && active_mac) 29683175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 29693175d8c2SSathya Perla 29703175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 29713175d8c2SSathya Perla } 29723175d8c2SSathya Perla 2973f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2974a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 2975f1f3ee1bSAjit Khaparde { 2976f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2977f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2978f1f3ee1bSAjit Khaparde void *ctxt; 2979f1f3ee1bSAjit Khaparde int status; 2980f1f3ee1bSAjit Khaparde 2981f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2982f1f3ee1bSAjit Khaparde 2983f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2984f1f3ee1bSAjit Khaparde if (!wrb) { 2985f1f3ee1bSAjit Khaparde status = -EBUSY; 2986f1f3ee1bSAjit Khaparde goto err; 2987f1f3ee1bSAjit Khaparde } 2988f1f3ee1bSAjit Khaparde 2989f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2990f1f3ee1bSAjit Khaparde ctxt = &req->context; 2991f1f3ee1bSAjit Khaparde 2992f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2993a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 2994a2cc4e0bSSathya Perla NULL); 2995f1f3ee1bSAjit Khaparde 2996f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2997f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2998f1f3ee1bSAjit Khaparde if (pvid) { 2999f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3000f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3001f1f3ee1bSAjit Khaparde } 3002a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 3003a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3004a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3005a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3006a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3007a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3008a77dcb8cSAjit Khaparde } 3009f1f3ee1bSAjit Khaparde 3010f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3011f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3012f1f3ee1bSAjit Khaparde 3013f1f3ee1bSAjit Khaparde err: 3014f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3015f1f3ee1bSAjit Khaparde return status; 3016f1f3ee1bSAjit Khaparde } 3017f1f3ee1bSAjit Khaparde 3018f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3019f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3020a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 3021f1f3ee1bSAjit Khaparde { 3022f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3023f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3024f1f3ee1bSAjit Khaparde void *ctxt; 3025f1f3ee1bSAjit Khaparde int status; 3026f1f3ee1bSAjit Khaparde u16 vid; 3027f1f3ee1bSAjit Khaparde 3028f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3029f1f3ee1bSAjit Khaparde 3030f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3031f1f3ee1bSAjit Khaparde if (!wrb) { 3032f1f3ee1bSAjit Khaparde status = -EBUSY; 3033f1f3ee1bSAjit Khaparde goto err; 3034f1f3ee1bSAjit Khaparde } 3035f1f3ee1bSAjit Khaparde 3036f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3037f1f3ee1bSAjit Khaparde ctxt = &req->context; 3038f1f3ee1bSAjit Khaparde 3039f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3040a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3041a2cc4e0bSSathya Perla NULL); 3042f1f3ee1bSAjit Khaparde 3043f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3044a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3045a77dcb8cSAjit Khaparde ctxt, intf_id); 3046f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3047a77dcb8cSAjit Khaparde 30482c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3049a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3050a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3051a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3052a77dcb8cSAjit Khaparde } 3053f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3054f1f3ee1bSAjit Khaparde 3055f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3056f1f3ee1bSAjit Khaparde if (!status) { 3057f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3058f1f3ee1bSAjit Khaparde embedded_payload(wrb); 3059a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3060f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3061f1f3ee1bSAjit Khaparde pvid, &resp->context); 3062a77dcb8cSAjit Khaparde if (pvid) 3063f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3064a77dcb8cSAjit Khaparde if (mode) 3065a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3066a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3067f1f3ee1bSAjit Khaparde } 3068f1f3ee1bSAjit Khaparde 3069f1f3ee1bSAjit Khaparde err: 3070f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3071f1f3ee1bSAjit Khaparde return status; 3072f1f3ee1bSAjit Khaparde } 3073f1f3ee1bSAjit Khaparde 30744762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 30754762f6ceSAjit Khaparde { 30764762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 30774762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 307876a9e08eSSuresh Reddy int status = 0; 30794762f6ceSAjit Khaparde struct be_dma_mem cmd; 30804762f6ceSAjit Khaparde 3081f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3082f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3083f25b119cSPadmanabh Ratnakar return -EPERM; 3084f25b119cSPadmanabh Ratnakar 308576a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 308676a9e08eSSuresh Reddy return status; 308776a9e08eSSuresh Reddy 3088d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3089d98ef50fSSuresh Reddy return -1; 3090d98ef50fSSuresh Reddy 30914762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 30924762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 3093a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 30944762f6ceSAjit Khaparde if (!cmd.va) { 3095a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3096d98ef50fSSuresh Reddy status = -ENOMEM; 3097d98ef50fSSuresh Reddy goto err; 30984762f6ceSAjit Khaparde } 30994762f6ceSAjit Khaparde 31004762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 31014762f6ceSAjit Khaparde if (!wrb) { 31024762f6ceSAjit Khaparde status = -EBUSY; 31034762f6ceSAjit Khaparde goto err; 31044762f6ceSAjit Khaparde } 31054762f6ceSAjit Khaparde 31064762f6ceSAjit Khaparde req = cmd.va; 31074762f6ceSAjit Khaparde 31084762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 31094762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 311076a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 31114762f6ceSAjit Khaparde 31124762f6ceSAjit Khaparde req->hdr.version = 1; 31134762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 31144762f6ceSAjit Khaparde 31154762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 31164762f6ceSAjit Khaparde if (!status) { 31174762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 31184762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 31194762f6ceSAjit Khaparde 31204762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 312176a9e08eSSuresh Reddy if (adapter->wol_cap & BE_WOL_CAP) 312276a9e08eSSuresh Reddy adapter->wol_en = true; 31234762f6ceSAjit Khaparde } 31244762f6ceSAjit Khaparde err: 31254762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3126d98ef50fSSuresh Reddy if (cmd.va) 31274762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 31284762f6ceSAjit Khaparde return status; 3129941a77d5SSomnath Kotur 3130941a77d5SSomnath Kotur } 3131baaa08d1SVasundhara Volam 3132baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 3133baaa08d1SVasundhara Volam { 3134baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3135baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3136baaa08d1SVasundhara Volam int status; 3137baaa08d1SVasundhara Volam int i, j; 3138baaa08d1SVasundhara Volam 3139baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3140baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3141baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3142baaa08d1SVasundhara Volam &extfat_cmd.dma); 3143baaa08d1SVasundhara Volam if (!extfat_cmd.va) 3144baaa08d1SVasundhara Volam return -ENOMEM; 3145baaa08d1SVasundhara Volam 3146baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3147baaa08d1SVasundhara Volam if (status) 3148baaa08d1SVasundhara Volam goto err; 3149baaa08d1SVasundhara Volam 3150baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 3151baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 3152baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 3153baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 3154baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 3155baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 3156baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 3157baaa08d1SVasundhara Volam cpu_to_le32(level); 3158baaa08d1SVasundhara Volam } 3159baaa08d1SVasundhara Volam } 3160baaa08d1SVasundhara Volam 3161baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 3162baaa08d1SVasundhara Volam err: 3163baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3164baaa08d1SVasundhara Volam extfat_cmd.dma); 3165baaa08d1SVasundhara Volam return status; 3166baaa08d1SVasundhara Volam } 3167baaa08d1SVasundhara Volam 3168baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 3169baaa08d1SVasundhara Volam { 3170baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3171baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3172baaa08d1SVasundhara Volam int status, j; 3173baaa08d1SVasundhara Volam int level = 0; 3174baaa08d1SVasundhara Volam 3175baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3176baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3177baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3178baaa08d1SVasundhara Volam &extfat_cmd.dma); 3179baaa08d1SVasundhara Volam 3180baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 3181baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 3182baaa08d1SVasundhara Volam __func__); 3183baaa08d1SVasundhara Volam goto err; 3184baaa08d1SVasundhara Volam } 3185baaa08d1SVasundhara Volam 3186baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3187baaa08d1SVasundhara Volam if (!status) { 3188baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 3189baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 3190baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 3191baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 3192baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 3193baaa08d1SVasundhara Volam } 3194baaa08d1SVasundhara Volam } 3195baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3196baaa08d1SVasundhara Volam extfat_cmd.dma); 3197baaa08d1SVasundhara Volam err: 3198baaa08d1SVasundhara Volam return level; 3199baaa08d1SVasundhara Volam } 3200baaa08d1SVasundhara Volam 3201941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3202941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3203941a77d5SSomnath Kotur { 3204941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3205941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3206941a77d5SSomnath Kotur int status; 3207941a77d5SSomnath Kotur 3208941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3209941a77d5SSomnath Kotur return -1; 3210941a77d5SSomnath Kotur 3211941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3212941a77d5SSomnath Kotur if (!wrb) { 3213941a77d5SSomnath Kotur status = -EBUSY; 3214941a77d5SSomnath Kotur goto err; 3215941a77d5SSomnath Kotur } 3216941a77d5SSomnath Kotur 3217941a77d5SSomnath Kotur req = cmd->va; 3218941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3219941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3220941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3221941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3222941a77d5SSomnath Kotur 3223941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3224941a77d5SSomnath Kotur err: 3225941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3226941a77d5SSomnath Kotur return status; 3227941a77d5SSomnath Kotur } 3228941a77d5SSomnath Kotur 3229941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3230941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3231941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3232941a77d5SSomnath Kotur { 3233941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3234941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3235941a77d5SSomnath Kotur int status; 3236941a77d5SSomnath Kotur 3237941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3238941a77d5SSomnath Kotur 3239941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3240941a77d5SSomnath Kotur if (!wrb) { 3241941a77d5SSomnath Kotur status = -EBUSY; 3242941a77d5SSomnath Kotur goto err; 3243941a77d5SSomnath Kotur } 3244941a77d5SSomnath Kotur 3245941a77d5SSomnath Kotur req = cmd->va; 3246941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3247941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3248941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3249941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3250941a77d5SSomnath Kotur 3251941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3252941a77d5SSomnath Kotur err: 3253941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3254941a77d5SSomnath Kotur return status; 32554762f6ceSAjit Khaparde } 32566a4ab669SParav Pandit 3257b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3258b4e32a71SPadmanabh Ratnakar { 3259b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3260b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3261b4e32a71SPadmanabh Ratnakar int status; 3262b4e32a71SPadmanabh Ratnakar 3263b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3264b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3265b4e32a71SPadmanabh Ratnakar return 0; 3266b4e32a71SPadmanabh Ratnakar } 3267b4e32a71SPadmanabh Ratnakar 3268b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3269b4e32a71SPadmanabh Ratnakar 3270b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3271b4e32a71SPadmanabh Ratnakar if (!wrb) { 3272b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3273b4e32a71SPadmanabh Ratnakar goto err; 3274b4e32a71SPadmanabh Ratnakar } 3275b4e32a71SPadmanabh Ratnakar 3276b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3277b4e32a71SPadmanabh Ratnakar 3278b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3279b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3280b4e32a71SPadmanabh Ratnakar NULL); 3281b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3282b4e32a71SPadmanabh Ratnakar 3283b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3284b4e32a71SPadmanabh Ratnakar if (!status) { 3285b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3286b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3287b4e32a71SPadmanabh Ratnakar } else { 3288b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3289b4e32a71SPadmanabh Ratnakar } 3290b4e32a71SPadmanabh Ratnakar err: 3291b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3292b4e32a71SPadmanabh Ratnakar return status; 3293b4e32a71SPadmanabh Ratnakar } 3294b4e32a71SPadmanabh Ratnakar 3295150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3296abb93951SPadmanabh Ratnakar { 3297150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3298abb93951SPadmanabh Ratnakar int i; 3299abb93951SPadmanabh Ratnakar 3300abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3301150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3302150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3303150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3304150d58c7SVasundhara Volam 3305150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3306150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3307150d58c7SVasundhara Volam } 3308950e2958SWei Yang return NULL; 3309abb93951SPadmanabh Ratnakar } 3310abb93951SPadmanabh Ratnakar 3311150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3312150d58c7SVasundhara Volam u32 desc_count) 3313150d58c7SVasundhara Volam { 3314150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3315150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3316150d58c7SVasundhara Volam int i; 3317150d58c7SVasundhara Volam 3318150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3319150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3320150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3321150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3322150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3323150d58c7SVasundhara Volam return pcie; 3324150d58c7SVasundhara Volam } 3325150d58c7SVasundhara Volam 3326150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3327150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3328150d58c7SVasundhara Volam } 3329abb93951SPadmanabh Ratnakar return NULL; 3330abb93951SPadmanabh Ratnakar } 3331abb93951SPadmanabh Ratnakar 3332f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 3333f93f160bSVasundhara Volam { 3334f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3335f93f160bSVasundhara Volam int i; 3336f93f160bSVasundhara Volam 3337f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 3338f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 3339f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 3340f93f160bSVasundhara Volam 3341f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3342f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3343f93f160bSVasundhara Volam } 3344f93f160bSVasundhara Volam return NULL; 3345f93f160bSVasundhara Volam } 3346f93f160bSVasundhara Volam 334792bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 334892bf14abSSathya Perla struct be_nic_res_desc *desc) 334992bf14abSSathya Perla { 335092bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 335192bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 335292bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 335392bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 335492bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 335592bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 335692bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 335792bf14abSSathya Perla /* Clear flags that driver is not interested in */ 335892bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 335992bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 336092bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 336192bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 336292bf14abSSathya Perla res->max_rss_qs -= 1; 336392bf14abSSathya Perla } 336492bf14abSSathya Perla 3365abb93951SPadmanabh Ratnakar /* Uses Mbox */ 336692bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3367abb93951SPadmanabh Ratnakar { 3368abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3369abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3370abb93951SPadmanabh Ratnakar int status; 3371abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3372abb93951SPadmanabh Ratnakar 3373d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3374d98ef50fSSuresh Reddy return -1; 3375d98ef50fSSuresh Reddy 3376abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3377abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3378a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3379abb93951SPadmanabh Ratnakar if (!cmd.va) { 3380abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3381d98ef50fSSuresh Reddy status = -ENOMEM; 3382d98ef50fSSuresh Reddy goto err; 3383abb93951SPadmanabh Ratnakar } 3384abb93951SPadmanabh Ratnakar 3385abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3386abb93951SPadmanabh Ratnakar if (!wrb) { 3387abb93951SPadmanabh Ratnakar status = -EBUSY; 3388abb93951SPadmanabh Ratnakar goto err; 3389abb93951SPadmanabh Ratnakar } 3390abb93951SPadmanabh Ratnakar 3391abb93951SPadmanabh Ratnakar req = cmd.va; 3392abb93951SPadmanabh Ratnakar 3393abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3394abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3395abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3396abb93951SPadmanabh Ratnakar 339728710c55SKalesh AP if (skyhawk_chip(adapter)) 339828710c55SKalesh AP req->hdr.version = 1; 339928710c55SKalesh AP 3400abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3401abb93951SPadmanabh Ratnakar if (!status) { 3402abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3403abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3404150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3405abb93951SPadmanabh Ratnakar 3406150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3407abb93951SPadmanabh Ratnakar if (!desc) { 3408abb93951SPadmanabh Ratnakar status = -EINVAL; 3409abb93951SPadmanabh Ratnakar goto err; 3410abb93951SPadmanabh Ratnakar } 3411abb93951SPadmanabh Ratnakar 3412d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 341392bf14abSSathya Perla be_copy_nic_desc(res, desc); 3414abb93951SPadmanabh Ratnakar } 3415abb93951SPadmanabh Ratnakar err: 3416abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3417d98ef50fSSuresh Reddy if (cmd.va) 3418d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3419abb93951SPadmanabh Ratnakar return status; 3420abb93951SPadmanabh Ratnakar } 3421abb93951SPadmanabh Ratnakar 3422a05f99dbSVasundhara Volam /* Uses mbox */ 34234188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3424a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3425abb93951SPadmanabh Ratnakar { 3426abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3427abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3428abb93951SPadmanabh Ratnakar int status; 3429abb93951SPadmanabh Ratnakar 3430a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3431a05f99dbSVasundhara Volam return -1; 3432a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3433a05f99dbSVasundhara Volam 3434a05f99dbSVasundhara Volam req = cmd->va; 3435a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3436a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3437a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3438a05f99dbSVasundhara Volam 3439a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3440a05f99dbSVasundhara Volam req->hdr.domain = domain; 3441a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3442a05f99dbSVasundhara Volam req->hdr.version = 1; 3443a05f99dbSVasundhara Volam 3444a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3445a05f99dbSVasundhara Volam 3446a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3447a05f99dbSVasundhara Volam return status; 3448abb93951SPadmanabh Ratnakar } 3449abb93951SPadmanabh Ratnakar 3450a05f99dbSVasundhara Volam /* Uses sync mcc */ 34514188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3452a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3453a05f99dbSVasundhara Volam { 3454a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3455a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3456a05f99dbSVasundhara Volam int status; 3457a05f99dbSVasundhara Volam 3458abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3459abb93951SPadmanabh Ratnakar 3460abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3461abb93951SPadmanabh Ratnakar if (!wrb) { 3462abb93951SPadmanabh Ratnakar status = -EBUSY; 3463abb93951SPadmanabh Ratnakar goto err; 3464abb93951SPadmanabh Ratnakar } 3465abb93951SPadmanabh Ratnakar 3466a05f99dbSVasundhara Volam req = cmd->va; 3467abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3468abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3469a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3470abb93951SPadmanabh Ratnakar 3471abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3472abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3473a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3474a05f99dbSVasundhara Volam req->hdr.version = 1; 3475abb93951SPadmanabh Ratnakar 3476abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3477a05f99dbSVasundhara Volam 3478a05f99dbSVasundhara Volam err: 3479a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3480a05f99dbSVasundhara Volam return status; 3481a05f99dbSVasundhara Volam } 3482a05f99dbSVasundhara Volam 3483a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 348492bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 348592bf14abSSathya Perla struct be_resources *res, u8 domain) 3486a05f99dbSVasundhara Volam { 3487150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3488150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3489f93f160bSVasundhara Volam struct be_port_res_desc *port; 3490150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3491a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3492a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3493150d58c7SVasundhara Volam u32 desc_count; 3494a05f99dbSVasundhara Volam int status; 3495a05f99dbSVasundhara Volam 3496a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3497a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3498150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3499150d58c7SVasundhara Volam if (!cmd.va) 3500a05f99dbSVasundhara Volam return -ENOMEM; 3501a05f99dbSVasundhara Volam 3502a05f99dbSVasundhara Volam if (!mccq->created) 3503a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3504a05f99dbSVasundhara Volam else 3505a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3506150d58c7SVasundhara Volam if (status) 3507abb93951SPadmanabh Ratnakar goto err; 3508150d58c7SVasundhara Volam 3509150d58c7SVasundhara Volam resp = cmd.va; 3510150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3511150d58c7SVasundhara Volam 3512150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3513150d58c7SVasundhara Volam desc_count); 3514150d58c7SVasundhara Volam if (pcie) 351592bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3516150d58c7SVasundhara Volam 3517f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 3518f93f160bSVasundhara Volam if (port) 3519f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 3520f93f160bSVasundhara Volam 3521150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 352292bf14abSSathya Perla if (nic) 352392bf14abSSathya Perla be_copy_nic_desc(res, nic); 352492bf14abSSathya Perla 3525abb93951SPadmanabh Ratnakar err: 3526a05f99dbSVasundhara Volam if (cmd.va) 3527150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3528abb93951SPadmanabh Ratnakar return status; 3529abb93951SPadmanabh Ratnakar } 3530abb93951SPadmanabh Ratnakar 3531a401801cSSathya Perla int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 3532a401801cSSathya Perla int size, u8 version, u8 domain) 3533d5c18473SPadmanabh Ratnakar { 3534d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3535a401801cSSathya Perla struct be_mcc_wrb *wrb; 3536d5c18473SPadmanabh Ratnakar int status; 3537d5c18473SPadmanabh Ratnakar 3538d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3539d5c18473SPadmanabh Ratnakar 3540d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3541d5c18473SPadmanabh Ratnakar if (!wrb) { 3542d5c18473SPadmanabh Ratnakar status = -EBUSY; 3543d5c18473SPadmanabh Ratnakar goto err; 3544d5c18473SPadmanabh Ratnakar } 3545d5c18473SPadmanabh Ratnakar 3546d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3547d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3548d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3549d5c18473SPadmanabh Ratnakar wrb, NULL); 3550a401801cSSathya Perla req->hdr.version = version; 3551d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3552d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3553a401801cSSathya Perla memcpy(req->desc, desc, size); 3554d5c18473SPadmanabh Ratnakar 3555d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3556d5c18473SPadmanabh Ratnakar err: 3557d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3558d5c18473SPadmanabh Ratnakar return status; 3559d5c18473SPadmanabh Ratnakar } 3560d5c18473SPadmanabh Ratnakar 3561a401801cSSathya Perla /* Mark all fields invalid */ 3562a401801cSSathya Perla void be_reset_nic_desc(struct be_nic_res_desc *nic) 3563a401801cSSathya Perla { 3564a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 3565a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 3566a401801cSSathya Perla nic->mcc_count = 0xFFFF; 3567a401801cSSathya Perla nic->vlan_count = 0xFFFF; 3568a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 3569a401801cSSathya Perla nic->txq_count = 0xFFFF; 3570a401801cSSathya Perla nic->rq_count = 0xFFFF; 3571a401801cSSathya Perla nic->rssq_count = 0xFFFF; 3572a401801cSSathya Perla nic->lro_count = 0xFFFF; 3573a401801cSSathya Perla nic->cq_count = 0xFFFF; 3574a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 3575a401801cSSathya Perla nic->eq_count = 0xFFFF; 35760f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 3577a401801cSSathya Perla nic->link_param = 0xFF; 35780f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 3579a401801cSSathya Perla nic->acpi_params = 0xFF; 3580a401801cSSathya Perla nic->wol_param = 0x0F; 35810f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 35820f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 3583a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 3584a401801cSSathya Perla } 3585a401801cSSathya Perla 35860f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 35870f77ba73SRavikumar Nelavelli u8 domain) 3588a401801cSSathya Perla { 3589a401801cSSathya Perla struct be_nic_res_desc nic_desc; 35900f77ba73SRavikumar Nelavelli u32 bw_percent; 35910f77ba73SRavikumar Nelavelli u16 version = 0; 35920f77ba73SRavikumar Nelavelli 35930f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 35940f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 3595a401801cSSathya Perla 3596a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 35970f77ba73SRavikumar Nelavelli nic_desc.pf_num = adapter->pf_number; 35980f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 35990f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 3600a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3601a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3602a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 3603a401801cSSathya Perla (1 << NOSV_SHIFT); 36040f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 36050f77ba73SRavikumar Nelavelli } else { 36060f77ba73SRavikumar Nelavelli version = 1; 36070f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 36080f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 36090f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 36100f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 36110f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 36120f77ba73SRavikumar Nelavelli } 3613a401801cSSathya Perla 3614a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 36150f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 36160f77ba73SRavikumar Nelavelli version, domain); 3617a401801cSSathya Perla } 3618a401801cSSathya Perla 3619a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 3620a401801cSSathya Perla { 3621a401801cSSathya Perla struct be_mcc_wrb *wrb; 3622a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 3623a401801cSSathya Perla int status; 3624a401801cSSathya Perla 3625a401801cSSathya Perla if (iface == 0xFFFFFFFF) 3626a401801cSSathya Perla return -1; 3627a401801cSSathya Perla 3628a401801cSSathya Perla spin_lock_bh(&adapter->mcc_lock); 3629a401801cSSathya Perla 3630a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 3631a401801cSSathya Perla if (!wrb) { 3632a401801cSSathya Perla status = -EBUSY; 3633a401801cSSathya Perla goto err; 3634a401801cSSathya Perla } 3635a401801cSSathya Perla req = embedded_payload(wrb); 3636a401801cSSathya Perla 3637a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3638a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 3639a401801cSSathya Perla wrb, NULL); 3640a401801cSSathya Perla req->op = op; 3641a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 3642a401801cSSathya Perla 3643a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 3644a401801cSSathya Perla err: 3645a401801cSSathya Perla spin_unlock_bh(&adapter->mcc_lock); 3646a401801cSSathya Perla return status; 3647a401801cSSathya Perla } 3648a401801cSSathya Perla 3649a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 3650a401801cSSathya Perla { 3651a401801cSSathya Perla struct be_port_res_desc port_desc; 3652a401801cSSathya Perla 3653a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 3654a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 3655a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3656a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3657a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 3658a401801cSSathya Perla if (port) { 3659a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 3660a401801cSSathya Perla (1 << RCVID_SHIFT); 3661a401801cSSathya Perla port_desc.nv_port = swab16(port); 3662a401801cSSathya Perla } else { 3663a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 3664a401801cSSathya Perla port_desc.nv_port = 0; 3665a401801cSSathya Perla } 3666a401801cSSathya Perla 3667a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 3668a401801cSSathya Perla RESOURCE_DESC_SIZE_V1, 1, 0); 3669a401801cSSathya Perla } 3670a401801cSSathya Perla 36714c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 36724c876616SSathya Perla int vf_num) 36734c876616SSathya Perla { 36744c876616SSathya Perla struct be_mcc_wrb *wrb; 36754c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 36764c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 36774c876616SSathya Perla int status; 36784c876616SSathya Perla 36794c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 36804c876616SSathya Perla 36814c876616SSathya Perla wrb = wrb_from_mccq(adapter); 36824c876616SSathya Perla if (!wrb) { 36834c876616SSathya Perla status = -EBUSY; 36844c876616SSathya Perla goto err; 36854c876616SSathya Perla } 36864c876616SSathya Perla req = embedded_payload(wrb); 36874c876616SSathya Perla 36884c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 36894c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 36904c876616SSathya Perla wrb, NULL); 36914c876616SSathya Perla req->hdr.domain = vf_num + 1; 36924c876616SSathya Perla 36934c876616SSathya Perla status = be_mcc_notify_wait(adapter); 36944c876616SSathya Perla if (!status) { 36954c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 36964c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 36974c876616SSathya Perla } 36984c876616SSathya Perla 36994c876616SSathya Perla err: 37004c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 37014c876616SSathya Perla return status; 37024c876616SSathya Perla } 37034c876616SSathya Perla 37045c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 37055c510811SSomnath Kotur { 37065c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 37075c510811SSomnath Kotur u32 reg_val; 37085c510811SSomnath Kotur int status = 0, i; 37095c510811SSomnath Kotur 37105c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 37115c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 37125c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 37135c510811SSomnath Kotur break; 37145c510811SSomnath Kotur 37155c510811SSomnath Kotur ssleep(1); 37165c510811SSomnath Kotur } 37175c510811SSomnath Kotur 37185c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 37195c510811SSomnath Kotur status = -1; 37205c510811SSomnath Kotur 37215c510811SSomnath Kotur return status; 37225c510811SSomnath Kotur } 37235c510811SSomnath Kotur 37245c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 37255c510811SSomnath Kotur { 37265c510811SSomnath Kotur int status = 0; 37275c510811SSomnath Kotur 37285c510811SSomnath Kotur status = lancer_wait_idle(adapter); 37295c510811SSomnath Kotur if (status) 37305c510811SSomnath Kotur return status; 37315c510811SSomnath Kotur 37325c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 37335c510811SSomnath Kotur 37345c510811SSomnath Kotur return status; 37355c510811SSomnath Kotur } 37365c510811SSomnath Kotur 37375c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 37385c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 37395c510811SSomnath Kotur { 37405c510811SSomnath Kotur u32 sliport_status = 0; 37415c510811SSomnath Kotur 37425c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 37435c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 37445c510811SSomnath Kotur } 37455c510811SSomnath Kotur 37465c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 37475c510811SSomnath Kotur { 37485c510811SSomnath Kotur int status; 37495c510811SSomnath Kotur 37505c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 37515c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 37525c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 37535c510811SSomnath Kotur if (status < 0) { 37545c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 37555c510811SSomnath Kotur return status; 37565c510811SSomnath Kotur } 37575c510811SSomnath Kotur 37585c510811SSomnath Kotur status = lancer_wait_idle(adapter); 37595c510811SSomnath Kotur if (status) 37605c510811SSomnath Kotur return status; 37615c510811SSomnath Kotur 37625c510811SSomnath Kotur if (!dump_present(adapter)) { 37635c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 37645c510811SSomnath Kotur return -1; 37655c510811SSomnath Kotur } 37665c510811SSomnath Kotur 37675c510811SSomnath Kotur return 0; 37685c510811SSomnath Kotur } 37695c510811SSomnath Kotur 3770dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3771dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3772dcf7ebbaSPadmanabh Ratnakar { 3773dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3774dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3775dcf7ebbaSPadmanabh Ratnakar int status; 3776dcf7ebbaSPadmanabh Ratnakar 37770599863dSVasundhara Volam if (BEx_chip(adapter)) 3778dcf7ebbaSPadmanabh Ratnakar return 0; 3779dcf7ebbaSPadmanabh Ratnakar 3780dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3781dcf7ebbaSPadmanabh Ratnakar 3782dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3783dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3784dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3785dcf7ebbaSPadmanabh Ratnakar goto err; 3786dcf7ebbaSPadmanabh Ratnakar } 3787dcf7ebbaSPadmanabh Ratnakar 3788dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3789dcf7ebbaSPadmanabh Ratnakar 3790dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3791dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3792dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3793dcf7ebbaSPadmanabh Ratnakar 3794dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3795dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3796dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3797dcf7ebbaSPadmanabh Ratnakar err: 3798dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3799dcf7ebbaSPadmanabh Ratnakar return status; 3800dcf7ebbaSPadmanabh Ratnakar } 3801dcf7ebbaSPadmanabh Ratnakar 380268c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 380368c45a2dSSomnath Kotur { 380468c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 380568c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 380668c45a2dSSomnath Kotur int status; 380768c45a2dSSomnath Kotur 380868c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 380968c45a2dSSomnath Kotur return -1; 381068c45a2dSSomnath Kotur 381168c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 381268c45a2dSSomnath Kotur 381368c45a2dSSomnath Kotur req = embedded_payload(wrb); 381468c45a2dSSomnath Kotur 381568c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 381668c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 381768c45a2dSSomnath Kotur wrb, NULL); 381868c45a2dSSomnath Kotur 381968c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 382068c45a2dSSomnath Kotur 382168c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 382268c45a2dSSomnath Kotur 382368c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 382468c45a2dSSomnath Kotur return status; 382568c45a2dSSomnath Kotur } 382668c45a2dSSomnath Kotur 3827542963b7SVasundhara Volam /* Uses MBOX */ 3828542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 3829542963b7SVasundhara Volam { 3830542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 3831542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 3832542963b7SVasundhara Volam int status; 3833542963b7SVasundhara Volam 3834542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3835542963b7SVasundhara Volam return -1; 3836542963b7SVasundhara Volam 3837542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 3838542963b7SVasundhara Volam if (!wrb) { 3839542963b7SVasundhara Volam status = -EBUSY; 3840542963b7SVasundhara Volam goto err; 3841542963b7SVasundhara Volam } 3842542963b7SVasundhara Volam 3843542963b7SVasundhara Volam req = embedded_payload(wrb); 3844542963b7SVasundhara Volam 3845542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3846542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 3847542963b7SVasundhara Volam wrb, NULL); 3848542963b7SVasundhara Volam 3849542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 3850542963b7SVasundhara Volam if (!status) { 3851542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 3852542963b7SVasundhara Volam embedded_payload(wrb); 3853542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 3854542963b7SVasundhara Volam } 3855542963b7SVasundhara Volam 3856542963b7SVasundhara Volam err: 3857542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3858542963b7SVasundhara Volam return status; 3859542963b7SVasundhara Volam } 3860542963b7SVasundhara Volam 3861bdce2ad7SSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 3862bdce2ad7SSuresh Reddy int link_state, u8 domain) 3863bdce2ad7SSuresh Reddy { 3864bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 3865bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 3866bdce2ad7SSuresh Reddy int status; 3867bdce2ad7SSuresh Reddy 3868bdce2ad7SSuresh Reddy if (BEx_chip(adapter) || lancer_chip(adapter)) 3869bdce2ad7SSuresh Reddy return 0; 3870bdce2ad7SSuresh Reddy 3871bdce2ad7SSuresh Reddy spin_lock_bh(&adapter->mcc_lock); 3872bdce2ad7SSuresh Reddy 3873bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 3874bdce2ad7SSuresh Reddy if (!wrb) { 3875bdce2ad7SSuresh Reddy status = -EBUSY; 3876bdce2ad7SSuresh Reddy goto err; 3877bdce2ad7SSuresh Reddy } 3878bdce2ad7SSuresh Reddy 3879bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 3880bdce2ad7SSuresh Reddy 3881bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3882bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 3883bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 3884bdce2ad7SSuresh Reddy 3885bdce2ad7SSuresh Reddy req->hdr.version = 1; 3886bdce2ad7SSuresh Reddy req->hdr.domain = domain; 3887bdce2ad7SSuresh Reddy 3888bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE) 3889bdce2ad7SSuresh Reddy req->link_config |= 1; 3890bdce2ad7SSuresh Reddy 3891bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 3892bdce2ad7SSuresh Reddy req->link_config |= 1 << PLINK_TRACK_SHIFT; 3893bdce2ad7SSuresh Reddy 3894bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 3895bdce2ad7SSuresh Reddy err: 3896bdce2ad7SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 3897bdce2ad7SSuresh Reddy return status; 3898bdce2ad7SSuresh Reddy } 3899bdce2ad7SSuresh Reddy 39006a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 39016a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 39026a4ab669SParav Pandit { 39036a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 39046a4ab669SParav Pandit struct be_mcc_wrb *wrb; 39056a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 39066a4ab669SParav Pandit struct be_cmd_req_hdr *req; 39076a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 39086a4ab669SParav Pandit int status; 39096a4ab669SParav Pandit 39106a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 39116a4ab669SParav Pandit 39126a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 39136a4ab669SParav Pandit if (!wrb) { 39146a4ab669SParav Pandit status = -EBUSY; 39156a4ab669SParav Pandit goto err; 39166a4ab669SParav Pandit } 39176a4ab669SParav Pandit req = embedded_payload(wrb); 39186a4ab669SParav Pandit resp = embedded_payload(wrb); 39196a4ab669SParav Pandit 39206a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 39216a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 39226a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 39236a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 39246a4ab669SParav Pandit 39256a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 39266a4ab669SParav Pandit if (cmd_status) 39276a4ab669SParav Pandit *cmd_status = (status & 0xffff); 39286a4ab669SParav Pandit if (ext_status) 39296a4ab669SParav Pandit *ext_status = 0; 39306a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 39316a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 39326a4ab669SParav Pandit err: 39336a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 39346a4ab669SParav Pandit return status; 39356a4ab669SParav Pandit } 39366a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3937