19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 144652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 145652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 146652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1479aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1489aebddd1SJeff Kirsher complete(&adapter->flash_compl); 1499aebddd1SJeff Kirsher } 1509aebddd1SJeff Kirsher 1519aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 152652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 153652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 154652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1559aebddd1SJeff Kirsher be_parse_stats(adapter); 1569aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1579aebddd1SJeff Kirsher } 158652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 159652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1603de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 161652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1623de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1633de09455SSomnath Kotur resp->on_die_temperature; 1643de09455SSomnath Kotur } 1659aebddd1SJeff Kirsher } else { 166652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1677aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1683de09455SSomnath Kotur 1699aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1709aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1719aebddd1SJeff Kirsher goto done; 1729aebddd1SJeff Kirsher 1739aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 17497f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 175522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 17697f1d8cdSVasundhara Volam opcode, subsystem); 1779aebddd1SJeff Kirsher } else { 1789aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1799aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18097f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18197f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 1839aebddd1SJeff Kirsher } 1849aebddd1SJeff Kirsher } 1859aebddd1SJeff Kirsher done: 1869aebddd1SJeff Kirsher return compl_status; 1879aebddd1SJeff Kirsher } 1889aebddd1SJeff Kirsher 1899aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1909aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 1919aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 1929aebddd1SJeff Kirsher { 193b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 19442f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 195b236916aSAjit Khaparde 1962e177a5cSPadmanabh Ratnakar /* Ignore physical link event */ 1972e177a5cSPadmanabh Ratnakar if (lancer_chip(adapter) && 1982e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 1992e177a5cSPadmanabh Ratnakar return; 2002e177a5cSPadmanabh Ratnakar 201b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 202b236916aSAjit Khaparde * it may not be received in some cases. 203b236916aSAjit Khaparde */ 204b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 2059aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 2069aebddd1SJeff Kirsher } 2079aebddd1SJeff Kirsher 2089aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2099aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2109aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2119aebddd1SJeff Kirsher { 2129aebddd1SJeff Kirsher if (evt->valid) { 2139aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2149aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2159aebddd1SJeff Kirsher adapter->recommended_prio = 2169aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2179aebddd1SJeff Kirsher } 2189aebddd1SJeff Kirsher } 2199aebddd1SJeff Kirsher 220323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2219aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2229aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2239aebddd1SJeff Kirsher { 224323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 225323ff71eSSathya Perla evt->physical_port == adapter->port_num) 226323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2279aebddd1SJeff Kirsher } 2289aebddd1SJeff Kirsher 2299aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2309aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2319aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2329aebddd1SJeff Kirsher { 2339aebddd1SJeff Kirsher if (evt->enabled) 234939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 2359aebddd1SJeff Kirsher else 2369aebddd1SJeff Kirsher adapter->pvid = 0; 2379aebddd1SJeff Kirsher } 2389aebddd1SJeff Kirsher 2399aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2409aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2419aebddd1SJeff Kirsher { 2429aebddd1SJeff Kirsher u8 event_type = 0; 2439aebddd1SJeff Kirsher 2449aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2459aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2469aebddd1SJeff Kirsher 2479aebddd1SJeff Kirsher switch (event_type) { 2489aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2499aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2509aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2519aebddd1SJeff Kirsher break; 2529aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2539aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2549aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2559aebddd1SJeff Kirsher break; 2569aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2579aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2589aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2599aebddd1SJeff Kirsher break; 2609aebddd1SJeff Kirsher default: 2619aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Unknown grp5 event!\n"); 2629aebddd1SJeff Kirsher break; 2639aebddd1SJeff Kirsher } 2649aebddd1SJeff Kirsher } 2659aebddd1SJeff Kirsher 266bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 267bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 268bc0c3405SAjit Khaparde { 269bc0c3405SAjit Khaparde u8 event_type = 0; 270bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 271bc0c3405SAjit Khaparde 272bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 273bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 274bc0c3405SAjit Khaparde 275bc0c3405SAjit Khaparde switch (event_type) { 276bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 277bc0c3405SAjit Khaparde if (evt->valid) 278bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 279bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 280bc0c3405SAjit Khaparde break; 281bc0c3405SAjit Khaparde default: 282bc0c3405SAjit Khaparde dev_warn(&adapter->pdev->dev, "Unknown debug event\n"); 283bc0c3405SAjit Khaparde break; 284bc0c3405SAjit Khaparde } 285bc0c3405SAjit Khaparde } 286bc0c3405SAjit Khaparde 2879aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 2889aebddd1SJeff Kirsher { 2899aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2909aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2919aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 2929aebddd1SJeff Kirsher } 2939aebddd1SJeff Kirsher 2949aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 2959aebddd1SJeff Kirsher { 2969aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2979aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2989aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 2999aebddd1SJeff Kirsher } 3009aebddd1SJeff Kirsher 301bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 302bc0c3405SAjit Khaparde { 303bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 304bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 305bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 306bc0c3405SAjit Khaparde } 307bc0c3405SAjit Khaparde 3089aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3099aebddd1SJeff Kirsher { 3109aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3119aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3129aebddd1SJeff Kirsher 3139aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3149aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3159aebddd1SJeff Kirsher return compl; 3169aebddd1SJeff Kirsher } 3179aebddd1SJeff Kirsher return NULL; 3189aebddd1SJeff Kirsher } 3199aebddd1SJeff Kirsher 3209aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3219aebddd1SJeff Kirsher { 3229aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3239aebddd1SJeff Kirsher 3249aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3259aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3269aebddd1SJeff Kirsher 3279aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3289aebddd1SJeff Kirsher } 3299aebddd1SJeff Kirsher 3309aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3319aebddd1SJeff Kirsher { 332a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 333a323d9bfSSathya Perla 3349aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 335a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 336a323d9bfSSathya Perla 337a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3389aebddd1SJeff Kirsher } 3399aebddd1SJeff Kirsher 34010ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3419aebddd1SJeff Kirsher { 3429aebddd1SJeff Kirsher struct be_mcc_compl *compl; 34310ef9ab4SSathya Perla int num = 0, status = 0; 3449aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3459aebddd1SJeff Kirsher 346072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3479aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3489aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3499aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3509aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3519aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3529aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3539aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3549aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3559aebddd1SJeff Kirsher compl->flags, compl); 356bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 357bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 358bc0c3405SAjit Khaparde compl->flags, compl); 3599aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 36010ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3619aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3629aebddd1SJeff Kirsher } 3639aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3649aebddd1SJeff Kirsher num++; 3659aebddd1SJeff Kirsher } 3669aebddd1SJeff Kirsher 36710ef9ab4SSathya Perla if (num) 36810ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 36910ef9ab4SSathya Perla 370072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 37110ef9ab4SSathya Perla return status; 3729aebddd1SJeff Kirsher } 3739aebddd1SJeff Kirsher 3749aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3759aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3769aebddd1SJeff Kirsher { 3779aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 37810ef9ab4SSathya Perla int i, status = 0; 3799aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3809aebddd1SJeff Kirsher 3816589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 3826589ade0SSathya Perla if (be_error(adapter)) 3839aebddd1SJeff Kirsher return -EIO; 3849aebddd1SJeff Kirsher 385072a9c48SAmerigo Wang local_bh_disable(); 38610ef9ab4SSathya Perla status = be_process_mcc(adapter); 387072a9c48SAmerigo Wang local_bh_enable(); 3889aebddd1SJeff Kirsher 3899aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 3909aebddd1SJeff Kirsher break; 3919aebddd1SJeff Kirsher udelay(100); 3929aebddd1SJeff Kirsher } 3939aebddd1SJeff Kirsher if (i == mcc_timeout) { 3946589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 3956589ade0SSathya Perla adapter->fw_timeout = true; 396652bf646SPadmanabh Ratnakar return -EIO; 3979aebddd1SJeff Kirsher } 3989aebddd1SJeff Kirsher return status; 3999aebddd1SJeff Kirsher } 4009aebddd1SJeff Kirsher 4019aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4029aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4039aebddd1SJeff Kirsher { 404652bf646SPadmanabh Ratnakar int status; 405652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 406652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 407652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 408652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 409652bf646SPadmanabh Ratnakar 410652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 411652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 412652bf646SPadmanabh Ratnakar 413652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 414652bf646SPadmanabh Ratnakar 4159aebddd1SJeff Kirsher be_mcc_notify(adapter); 416652bf646SPadmanabh Ratnakar 417652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 418652bf646SPadmanabh Ratnakar if (status == -EIO) 419652bf646SPadmanabh Ratnakar goto out; 420652bf646SPadmanabh Ratnakar 421652bf646SPadmanabh Ratnakar status = resp->status; 422652bf646SPadmanabh Ratnakar out: 423652bf646SPadmanabh Ratnakar return status; 4249aebddd1SJeff Kirsher } 4259aebddd1SJeff Kirsher 4269aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4279aebddd1SJeff Kirsher { 4289aebddd1SJeff Kirsher int msecs = 0; 4299aebddd1SJeff Kirsher u32 ready; 4309aebddd1SJeff Kirsher 4316589ade0SSathya Perla do { 4326589ade0SSathya Perla if (be_error(adapter)) 4339aebddd1SJeff Kirsher return -EIO; 4349aebddd1SJeff Kirsher 4359aebddd1SJeff Kirsher ready = ioread32(db); 436434b3648SSathya Perla if (ready == 0xffffffff) 4379aebddd1SJeff Kirsher return -1; 4389aebddd1SJeff Kirsher 4399aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4409aebddd1SJeff Kirsher if (ready) 4419aebddd1SJeff Kirsher break; 4429aebddd1SJeff Kirsher 4439aebddd1SJeff Kirsher if (msecs > 4000) { 4446589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4456589ade0SSathya Perla adapter->fw_timeout = true; 446f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4479aebddd1SJeff Kirsher return -1; 4489aebddd1SJeff Kirsher } 4499aebddd1SJeff Kirsher 4509aebddd1SJeff Kirsher msleep(1); 4519aebddd1SJeff Kirsher msecs++; 4529aebddd1SJeff Kirsher } while (true); 4539aebddd1SJeff Kirsher 4549aebddd1SJeff Kirsher return 0; 4559aebddd1SJeff Kirsher } 4569aebddd1SJeff Kirsher 4579aebddd1SJeff Kirsher /* 4589aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4599aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4609aebddd1SJeff Kirsher */ 4619aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4629aebddd1SJeff Kirsher { 4639aebddd1SJeff Kirsher int status; 4649aebddd1SJeff Kirsher u32 val = 0; 4659aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4669aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4679aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4689aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4699aebddd1SJeff Kirsher 4709aebddd1SJeff Kirsher /* wait for ready to be set */ 4719aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4729aebddd1SJeff Kirsher if (status != 0) 4739aebddd1SJeff Kirsher return status; 4749aebddd1SJeff Kirsher 4759aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4769aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4779aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4789aebddd1SJeff Kirsher iowrite32(val, db); 4799aebddd1SJeff Kirsher 4809aebddd1SJeff Kirsher /* wait for ready to be set */ 4819aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4829aebddd1SJeff Kirsher if (status != 0) 4839aebddd1SJeff Kirsher return status; 4849aebddd1SJeff Kirsher 4859aebddd1SJeff Kirsher val = 0; 4869aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 4879aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 4889aebddd1SJeff Kirsher iowrite32(val, db); 4899aebddd1SJeff Kirsher 4909aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4919aebddd1SJeff Kirsher if (status != 0) 4929aebddd1SJeff Kirsher return status; 4939aebddd1SJeff Kirsher 4949aebddd1SJeff Kirsher /* A cq entry has been made now */ 4959aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 4969aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 4979aebddd1SJeff Kirsher be_mcc_compl_use(compl); 4989aebddd1SJeff Kirsher if (status) 4999aebddd1SJeff Kirsher return status; 5009aebddd1SJeff Kirsher } else { 5019aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5029aebddd1SJeff Kirsher return -1; 5039aebddd1SJeff Kirsher } 5049aebddd1SJeff Kirsher return 0; 5059aebddd1SJeff Kirsher } 5069aebddd1SJeff Kirsher 507c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5089aebddd1SJeff Kirsher { 5099aebddd1SJeff Kirsher u32 sem; 5109aebddd1SJeff Kirsher 511c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 512c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5139aebddd1SJeff Kirsher else 514c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 515c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 516c5b3ad4cSSathya Perla 517c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5189aebddd1SJeff Kirsher } 5199aebddd1SJeff Kirsher 520bf99e50dSPadmanabh Ratnakar int lancer_wait_ready(struct be_adapter *adapter) 521bf99e50dSPadmanabh Ratnakar { 522bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 523bf99e50dSPadmanabh Ratnakar u32 sliport_status; 524bf99e50dSPadmanabh Ratnakar int status = 0, i; 525bf99e50dSPadmanabh Ratnakar 526bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 527bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 528bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 529bf99e50dSPadmanabh Ratnakar break; 530bf99e50dSPadmanabh Ratnakar 531bf99e50dSPadmanabh Ratnakar msleep(1000); 532bf99e50dSPadmanabh Ratnakar } 533bf99e50dSPadmanabh Ratnakar 534bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 535bf99e50dSPadmanabh Ratnakar status = -1; 536bf99e50dSPadmanabh Ratnakar 537bf99e50dSPadmanabh Ratnakar return status; 538bf99e50dSPadmanabh Ratnakar } 539bf99e50dSPadmanabh Ratnakar 54067297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 54167297ad8SPadmanabh Ratnakar { 54267297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 54367297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 54467297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 54567297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 54667297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 54767297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 54867297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 54967297ad8SPadmanabh Ratnakar 55067297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 55167297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 55267297ad8SPadmanabh Ratnakar return true; 55367297ad8SPadmanabh Ratnakar } 55467297ad8SPadmanabh Ratnakar return false; 55567297ad8SPadmanabh Ratnakar } 55667297ad8SPadmanabh Ratnakar 557bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 558bf99e50dSPadmanabh Ratnakar { 559bf99e50dSPadmanabh Ratnakar int status; 560bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 56167297ad8SPadmanabh Ratnakar bool resource_error; 56267297ad8SPadmanabh Ratnakar 56367297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 56467297ad8SPadmanabh Ratnakar if (resource_error) 56501e5b2c4SSomnath Kotur return -EAGAIN; 56667297ad8SPadmanabh Ratnakar 567bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 568bf99e50dSPadmanabh Ratnakar if (!status) { 569bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 570bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 571bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 572bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 573bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 574bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 575bf99e50dSPadmanabh Ratnakar 576bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 577bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 578bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 579bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 580bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 581bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 582bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 583bf99e50dSPadmanabh Ratnakar status = -1; 584bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 585bf99e50dSPadmanabh Ratnakar status = -1; 586bf99e50dSPadmanabh Ratnakar } 587bf99e50dSPadmanabh Ratnakar } 58867297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 58967297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 59067297ad8SPadmanabh Ratnakar * when PF provisions resources. 59167297ad8SPadmanabh Ratnakar */ 59267297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 59301e5b2c4SSomnath Kotur if (resource_error) 59401e5b2c4SSomnath Kotur status = -EAGAIN; 59567297ad8SPadmanabh Ratnakar 596bf99e50dSPadmanabh Ratnakar return status; 597bf99e50dSPadmanabh Ratnakar } 598bf99e50dSPadmanabh Ratnakar 599bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6009aebddd1SJeff Kirsher { 6019aebddd1SJeff Kirsher u16 stage; 6029aebddd1SJeff Kirsher int status, timeout = 0; 6039aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6049aebddd1SJeff Kirsher 605bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 606bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 607bf99e50dSPadmanabh Ratnakar return status; 608bf99e50dSPadmanabh Ratnakar } 609bf99e50dSPadmanabh Ratnakar 6109aebddd1SJeff Kirsher do { 611c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 61266d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 61366d29cbcSGavin Shan return 0; 61466d29cbcSGavin Shan 61566d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 61666d29cbcSGavin Shan timeout); 6179aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6189aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6199aebddd1SJeff Kirsher return -EINTR; 6209aebddd1SJeff Kirsher } 6219aebddd1SJeff Kirsher timeout += 2; 6223ab81b5fSSomnath Kotur } while (timeout < 60); 6239aebddd1SJeff Kirsher 6249aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6259aebddd1SJeff Kirsher return -1; 6269aebddd1SJeff Kirsher } 6279aebddd1SJeff Kirsher 6289aebddd1SJeff Kirsher 6299aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6309aebddd1SJeff Kirsher { 6319aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6329aebddd1SJeff Kirsher } 6339aebddd1SJeff Kirsher 6349aebddd1SJeff Kirsher 6359aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 636106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 637106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 638106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 639106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6409aebddd1SJeff Kirsher { 641106df1e3SSomnath Kotur struct be_sge *sge; 642652bf646SPadmanabh Ratnakar unsigned long addr = (unsigned long)req_hdr; 643652bf646SPadmanabh Ratnakar u64 req_addr = addr; 644106df1e3SSomnath Kotur 6459aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6469aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6479aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6489aebddd1SJeff Kirsher req_hdr->version = 0; 649106df1e3SSomnath Kotur 650652bf646SPadmanabh Ratnakar wrb->tag0 = req_addr & 0xFFFFFFFF; 651652bf646SPadmanabh Ratnakar wrb->tag1 = upper_32_bits(req_addr); 652652bf646SPadmanabh Ratnakar 653106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 654106df1e3SSomnath Kotur if (mem) { 655106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 656106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 657106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 658106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 659106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 660106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 661106df1e3SSomnath Kotur } else 662106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 663106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6649aebddd1SJeff Kirsher } 6659aebddd1SJeff Kirsher 6669aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6679aebddd1SJeff Kirsher struct be_dma_mem *mem) 6689aebddd1SJeff Kirsher { 6699aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6709aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6719aebddd1SJeff Kirsher 6729aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6739aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6749aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6759aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6769aebddd1SJeff Kirsher } 6779aebddd1SJeff Kirsher } 6789aebddd1SJeff Kirsher 6799aebddd1SJeff Kirsher /* Converts interrupt delay in microseconds to multiplier value */ 6809aebddd1SJeff Kirsher static u32 eq_delay_to_mult(u32 usec_delay) 6819aebddd1SJeff Kirsher { 6829aebddd1SJeff Kirsher #define MAX_INTR_RATE 651042 6839aebddd1SJeff Kirsher const u32 round = 10; 6849aebddd1SJeff Kirsher u32 multiplier; 6859aebddd1SJeff Kirsher 6869aebddd1SJeff Kirsher if (usec_delay == 0) 6879aebddd1SJeff Kirsher multiplier = 0; 6889aebddd1SJeff Kirsher else { 6899aebddd1SJeff Kirsher u32 interrupt_rate = 1000000 / usec_delay; 6909aebddd1SJeff Kirsher /* Max delay, corresponding to the lowest interrupt rate */ 6919aebddd1SJeff Kirsher if (interrupt_rate == 0) 6929aebddd1SJeff Kirsher multiplier = 1023; 6939aebddd1SJeff Kirsher else { 6949aebddd1SJeff Kirsher multiplier = (MAX_INTR_RATE - interrupt_rate) * round; 6959aebddd1SJeff Kirsher multiplier /= interrupt_rate; 6969aebddd1SJeff Kirsher /* Round the multiplier to the closest value.*/ 6979aebddd1SJeff Kirsher multiplier = (multiplier + round/2) / round; 6989aebddd1SJeff Kirsher multiplier = min(multiplier, (u32)1023); 6999aebddd1SJeff Kirsher } 7009aebddd1SJeff Kirsher } 7019aebddd1SJeff Kirsher return multiplier; 7029aebddd1SJeff Kirsher } 7039aebddd1SJeff Kirsher 7049aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 7059aebddd1SJeff Kirsher { 7069aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 7079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 7089aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 7099aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7109aebddd1SJeff Kirsher return wrb; 7119aebddd1SJeff Kirsher } 7129aebddd1SJeff Kirsher 7139aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7149aebddd1SJeff Kirsher { 7159aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7179aebddd1SJeff Kirsher 718aa790db9SPadmanabh Ratnakar if (!mccq->created) 719aa790db9SPadmanabh Ratnakar return NULL; 720aa790db9SPadmanabh Ratnakar 7214d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7229aebddd1SJeff Kirsher return NULL; 7239aebddd1SJeff Kirsher 7249aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7259aebddd1SJeff Kirsher queue_head_inc(mccq); 7269aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7279aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7289aebddd1SJeff Kirsher return wrb; 7299aebddd1SJeff Kirsher } 7309aebddd1SJeff Kirsher 7319aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7329aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7339aebddd1SJeff Kirsher */ 7349aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 7359aebddd1SJeff Kirsher { 7369aebddd1SJeff Kirsher u8 *wrb; 7379aebddd1SJeff Kirsher int status; 7389aebddd1SJeff Kirsher 739bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 740bf99e50dSPadmanabh Ratnakar return 0; 741bf99e50dSPadmanabh Ratnakar 7429aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7439aebddd1SJeff Kirsher return -1; 7449aebddd1SJeff Kirsher 7459aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7469aebddd1SJeff Kirsher *wrb++ = 0xFF; 7479aebddd1SJeff Kirsher *wrb++ = 0x12; 7489aebddd1SJeff Kirsher *wrb++ = 0x34; 7499aebddd1SJeff Kirsher *wrb++ = 0xFF; 7509aebddd1SJeff Kirsher *wrb++ = 0xFF; 7519aebddd1SJeff Kirsher *wrb++ = 0x56; 7529aebddd1SJeff Kirsher *wrb++ = 0x78; 7539aebddd1SJeff Kirsher *wrb = 0xFF; 7549aebddd1SJeff Kirsher 7559aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 7569aebddd1SJeff Kirsher 7579aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 7589aebddd1SJeff Kirsher return status; 7599aebddd1SJeff Kirsher } 7609aebddd1SJeff Kirsher 7619aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 7629aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7639aebddd1SJeff Kirsher */ 7649aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 7659aebddd1SJeff Kirsher { 7669aebddd1SJeff Kirsher u8 *wrb; 7679aebddd1SJeff Kirsher int status; 7689aebddd1SJeff Kirsher 769bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 770bf99e50dSPadmanabh Ratnakar return 0; 771bf99e50dSPadmanabh Ratnakar 7729aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7739aebddd1SJeff Kirsher return -1; 7749aebddd1SJeff Kirsher 7759aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7769aebddd1SJeff Kirsher *wrb++ = 0xFF; 7779aebddd1SJeff Kirsher *wrb++ = 0xAA; 7789aebddd1SJeff Kirsher *wrb++ = 0xBB; 7799aebddd1SJeff Kirsher *wrb++ = 0xFF; 7809aebddd1SJeff Kirsher *wrb++ = 0xFF; 7819aebddd1SJeff Kirsher *wrb++ = 0xCC; 7829aebddd1SJeff Kirsher *wrb++ = 0xDD; 7839aebddd1SJeff Kirsher *wrb = 0xFF; 7849aebddd1SJeff Kirsher 7859aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 7869aebddd1SJeff Kirsher 7879aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 7889aebddd1SJeff Kirsher return status; 7899aebddd1SJeff Kirsher } 790bf99e50dSPadmanabh Ratnakar 7919aebddd1SJeff Kirsher int be_cmd_eq_create(struct be_adapter *adapter, 7929aebddd1SJeff Kirsher struct be_queue_info *eq, int eq_delay) 7939aebddd1SJeff Kirsher { 7949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7959aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 7969aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &eq->dma_mem; 7979aebddd1SJeff Kirsher int status; 7989aebddd1SJeff Kirsher 7999aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8009aebddd1SJeff Kirsher return -1; 8019aebddd1SJeff Kirsher 8029aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8039aebddd1SJeff Kirsher req = embedded_payload(wrb); 8049aebddd1SJeff Kirsher 805106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 806106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 8079aebddd1SJeff Kirsher 8089aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8099aebddd1SJeff Kirsher 8109aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8119aebddd1SJeff Kirsher /* 4byte eqe*/ 8129aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8139aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 8149aebddd1SJeff Kirsher __ilog2_u32(eq->len/256)); 8159aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context, 8169aebddd1SJeff Kirsher eq_delay_to_mult(eq_delay)); 8179aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 8189aebddd1SJeff Kirsher 8199aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8209aebddd1SJeff Kirsher 8219aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8229aebddd1SJeff Kirsher if (!status) { 8239aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 8249aebddd1SJeff Kirsher eq->id = le16_to_cpu(resp->eq_id); 8259aebddd1SJeff Kirsher eq->created = true; 8269aebddd1SJeff Kirsher } 8279aebddd1SJeff Kirsher 8289aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8299aebddd1SJeff Kirsher return status; 8309aebddd1SJeff Kirsher } 8319aebddd1SJeff Kirsher 832f9449ab7SSathya Perla /* Use MCC */ 8339aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 8345ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 8359aebddd1SJeff Kirsher { 8369aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8379aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 8389aebddd1SJeff Kirsher int status; 8399aebddd1SJeff Kirsher 840f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 8419aebddd1SJeff Kirsher 842f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 843f9449ab7SSathya Perla if (!wrb) { 844f9449ab7SSathya Perla status = -EBUSY; 845f9449ab7SSathya Perla goto err; 846f9449ab7SSathya Perla } 8479aebddd1SJeff Kirsher req = embedded_payload(wrb); 8489aebddd1SJeff Kirsher 849106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 850106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 8515ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 8529aebddd1SJeff Kirsher if (permanent) { 8539aebddd1SJeff Kirsher req->permanent = 1; 8549aebddd1SJeff Kirsher } else { 8559aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 856590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 8579aebddd1SJeff Kirsher req->permanent = 0; 8589aebddd1SJeff Kirsher } 8599aebddd1SJeff Kirsher 860f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 8619aebddd1SJeff Kirsher if (!status) { 8629aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 8639aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 8649aebddd1SJeff Kirsher } 8659aebddd1SJeff Kirsher 866f9449ab7SSathya Perla err: 867f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 8689aebddd1SJeff Kirsher return status; 8699aebddd1SJeff Kirsher } 8709aebddd1SJeff Kirsher 8719aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 8729aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 8739aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 8749aebddd1SJeff Kirsher { 8759aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8769aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 8779aebddd1SJeff Kirsher int status; 8789aebddd1SJeff Kirsher 8799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 8809aebddd1SJeff Kirsher 8819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 8829aebddd1SJeff Kirsher if (!wrb) { 8839aebddd1SJeff Kirsher status = -EBUSY; 8849aebddd1SJeff Kirsher goto err; 8859aebddd1SJeff Kirsher } 8869aebddd1SJeff Kirsher req = embedded_payload(wrb); 8879aebddd1SJeff Kirsher 888106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 889106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 8909aebddd1SJeff Kirsher 8919aebddd1SJeff Kirsher req->hdr.domain = domain; 8929aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 8939aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 8949aebddd1SJeff Kirsher 8959aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 8969aebddd1SJeff Kirsher if (!status) { 8979aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 8989aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 8999aebddd1SJeff Kirsher } 9009aebddd1SJeff Kirsher 9019aebddd1SJeff Kirsher err: 9029aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 903e3a7ae2cSSomnath Kotur 904e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 905e3a7ae2cSSomnath Kotur status = -EPERM; 906e3a7ae2cSSomnath Kotur 9079aebddd1SJeff Kirsher return status; 9089aebddd1SJeff Kirsher } 9099aebddd1SJeff Kirsher 9109aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 91130128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9129aebddd1SJeff Kirsher { 9139aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9149aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 9159aebddd1SJeff Kirsher int status; 9169aebddd1SJeff Kirsher 91730128031SSathya Perla if (pmac_id == -1) 91830128031SSathya Perla return 0; 91930128031SSathya Perla 9209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9219aebddd1SJeff Kirsher 9229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9239aebddd1SJeff Kirsher if (!wrb) { 9249aebddd1SJeff Kirsher status = -EBUSY; 9259aebddd1SJeff Kirsher goto err; 9269aebddd1SJeff Kirsher } 9279aebddd1SJeff Kirsher req = embedded_payload(wrb); 9289aebddd1SJeff Kirsher 929106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 930106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 9319aebddd1SJeff Kirsher 9329aebddd1SJeff Kirsher req->hdr.domain = dom; 9339aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9349aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 9359aebddd1SJeff Kirsher 9369aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9379aebddd1SJeff Kirsher 9389aebddd1SJeff Kirsher err: 9399aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 9409aebddd1SJeff Kirsher return status; 9419aebddd1SJeff Kirsher } 9429aebddd1SJeff Kirsher 9439aebddd1SJeff Kirsher /* Uses Mbox */ 94410ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 94510ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 9469aebddd1SJeff Kirsher { 9479aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9489aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 9499aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 9509aebddd1SJeff Kirsher void *ctxt; 9519aebddd1SJeff Kirsher int status; 9529aebddd1SJeff Kirsher 9539aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9549aebddd1SJeff Kirsher return -1; 9559aebddd1SJeff Kirsher 9569aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 9579aebddd1SJeff Kirsher req = embedded_payload(wrb); 9589aebddd1SJeff Kirsher ctxt = &req->context; 9599aebddd1SJeff Kirsher 960106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 961106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 9629aebddd1SJeff Kirsher 9639aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 964bbdc42f8SAjit Khaparde 965bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 9669aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 9679aebddd1SJeff Kirsher coalesce_wm); 9689aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 9699aebddd1SJeff Kirsher ctxt, no_delay); 9709aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 9719aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 9729aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 9739aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 9749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 975bbdc42f8SAjit Khaparde } else { 976bbdc42f8SAjit Khaparde req->hdr.version = 2; 977bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 978bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 979bbdc42f8SAjit Khaparde no_delay); 980bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 981bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 982bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 983bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 984bbdc42f8SAjit Khaparde ctxt, 1); 985bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 986bbdc42f8SAjit Khaparde ctxt, eq->id); 9879aebddd1SJeff Kirsher } 9889aebddd1SJeff Kirsher 9899aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 9909aebddd1SJeff Kirsher 9919aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9929aebddd1SJeff Kirsher 9939aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9949aebddd1SJeff Kirsher if (!status) { 9959aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 9969aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 9979aebddd1SJeff Kirsher cq->created = true; 9989aebddd1SJeff Kirsher } 9999aebddd1SJeff Kirsher 10009aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10019aebddd1SJeff Kirsher 10029aebddd1SJeff Kirsher return status; 10039aebddd1SJeff Kirsher } 10049aebddd1SJeff Kirsher 10059aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10069aebddd1SJeff Kirsher { 10079aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 10089aebddd1SJeff Kirsher if (len_encoded == 16) 10099aebddd1SJeff Kirsher len_encoded = 0; 10109aebddd1SJeff Kirsher return len_encoded; 10119aebddd1SJeff Kirsher } 10129aebddd1SJeff Kirsher 10139aebddd1SJeff Kirsher int be_cmd_mccq_ext_create(struct be_adapter *adapter, 10149aebddd1SJeff Kirsher struct be_queue_info *mccq, 10159aebddd1SJeff Kirsher struct be_queue_info *cq) 10169aebddd1SJeff Kirsher { 10179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10189aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10199aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10209aebddd1SJeff Kirsher void *ctxt; 10219aebddd1SJeff Kirsher int status; 10229aebddd1SJeff Kirsher 10239aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10249aebddd1SJeff Kirsher return -1; 10259aebddd1SJeff Kirsher 10269aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10279aebddd1SJeff Kirsher req = embedded_payload(wrb); 10289aebddd1SJeff Kirsher ctxt = &req->context; 10299aebddd1SJeff Kirsher 1030106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1031106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 10329aebddd1SJeff Kirsher 10339aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10349aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 10359aebddd1SJeff Kirsher req->hdr.version = 1; 10369aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq->id); 10379aebddd1SJeff Kirsher 10389aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt, 10399aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10409aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1); 10419aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id, 10429aebddd1SJeff Kirsher ctxt, cq->id); 10439aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid, 10449aebddd1SJeff Kirsher ctxt, 1); 10459aebddd1SJeff Kirsher 10469aebddd1SJeff Kirsher } else { 10479aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 10489aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 10499aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10509aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 10519aebddd1SJeff Kirsher } 10529aebddd1SJeff Kirsher 10539aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 10549aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1055bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 10569aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10579aebddd1SJeff Kirsher 10589aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10599aebddd1SJeff Kirsher 10609aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10619aebddd1SJeff Kirsher if (!status) { 10629aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 10639aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 10649aebddd1SJeff Kirsher mccq->created = true; 10659aebddd1SJeff Kirsher } 10669aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10679aebddd1SJeff Kirsher 10689aebddd1SJeff Kirsher return status; 10699aebddd1SJeff Kirsher } 10709aebddd1SJeff Kirsher 10719aebddd1SJeff Kirsher int be_cmd_mccq_org_create(struct be_adapter *adapter, 10729aebddd1SJeff Kirsher struct be_queue_info *mccq, 10739aebddd1SJeff Kirsher struct be_queue_info *cq) 10749aebddd1SJeff Kirsher { 10759aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10769aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 10779aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10789aebddd1SJeff Kirsher void *ctxt; 10799aebddd1SJeff Kirsher int status; 10809aebddd1SJeff Kirsher 10819aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10829aebddd1SJeff Kirsher return -1; 10839aebddd1SJeff Kirsher 10849aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10859aebddd1SJeff Kirsher req = embedded_payload(wrb); 10869aebddd1SJeff Kirsher ctxt = &req->context; 10879aebddd1SJeff Kirsher 1088106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1089106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 10909aebddd1SJeff Kirsher 10919aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10929aebddd1SJeff Kirsher 10939aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 10949aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 10959aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10969aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 10979aebddd1SJeff Kirsher 10989aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11019aebddd1SJeff Kirsher 11029aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11039aebddd1SJeff Kirsher if (!status) { 11049aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11059aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11069aebddd1SJeff Kirsher mccq->created = true; 11079aebddd1SJeff Kirsher } 11089aebddd1SJeff Kirsher 11099aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11109aebddd1SJeff Kirsher return status; 11119aebddd1SJeff Kirsher } 11129aebddd1SJeff Kirsher 11139aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 11149aebddd1SJeff Kirsher struct be_queue_info *mccq, 11159aebddd1SJeff Kirsher struct be_queue_info *cq) 11169aebddd1SJeff Kirsher { 11179aebddd1SJeff Kirsher int status; 11189aebddd1SJeff Kirsher 11199aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 11209aebddd1SJeff Kirsher if (status && !lancer_chip(adapter)) { 11219aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11229aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11239aebddd1SJeff Kirsher "and FCoE traffic"); 11249aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 11259aebddd1SJeff Kirsher } 11269aebddd1SJeff Kirsher return status; 11279aebddd1SJeff Kirsher } 11289aebddd1SJeff Kirsher 112994d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 11309aebddd1SJeff Kirsher { 11319aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11329aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 113394d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 113494d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 11359aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 113694d73aaaSVasundhara Volam int status, ver = 0; 11379aebddd1SJeff Kirsher 1138293c4a7dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 11399aebddd1SJeff Kirsher 1140293c4a7dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 1141293c4a7dSPadmanabh Ratnakar if (!wrb) { 1142293c4a7dSPadmanabh Ratnakar status = -EBUSY; 1143293c4a7dSPadmanabh Ratnakar goto err; 1144293c4a7dSPadmanabh Ratnakar } 1145293c4a7dSPadmanabh Ratnakar 11469aebddd1SJeff Kirsher req = embedded_payload(wrb); 11479aebddd1SJeff Kirsher 1148106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1149106df1e3SSomnath Kotur OPCODE_ETH_TX_CREATE, sizeof(*req), wrb, NULL); 11509aebddd1SJeff Kirsher 11519aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 11529aebddd1SJeff Kirsher req->hdr.version = 1; 115394d73aaaSVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 115494d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 115594d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 115694d73aaaSVasundhara Volam req->hdr.version = 2; 115794d73aaaSVasundhara Volam } else { /* For SH */ 115894d73aaaSVasundhara Volam req->hdr.version = 2; 11599aebddd1SJeff Kirsher } 11609aebddd1SJeff Kirsher 11619aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 11629aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 11639aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 116494d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 116594d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 11669aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11679aebddd1SJeff Kirsher 116894d73aaaSVasundhara Volam ver = req->hdr.version; 116994d73aaaSVasundhara Volam 1170293c4a7dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 11719aebddd1SJeff Kirsher if (!status) { 11729aebddd1SJeff Kirsher struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); 11739aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 117494d73aaaSVasundhara Volam if (ver == 2) 117594d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 117694d73aaaSVasundhara Volam else 117794d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 11789aebddd1SJeff Kirsher txq->created = true; 11799aebddd1SJeff Kirsher } 11809aebddd1SJeff Kirsher 1181293c4a7dSPadmanabh Ratnakar err: 1182293c4a7dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 11839aebddd1SJeff Kirsher 11849aebddd1SJeff Kirsher return status; 11859aebddd1SJeff Kirsher } 11869aebddd1SJeff Kirsher 11879aebddd1SJeff Kirsher /* Uses MCC */ 11889aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 11899aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 119010ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 11919aebddd1SJeff Kirsher { 11929aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11939aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 11949aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 11959aebddd1SJeff Kirsher int status; 11969aebddd1SJeff Kirsher 11979aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 11989aebddd1SJeff Kirsher 11999aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12009aebddd1SJeff Kirsher if (!wrb) { 12019aebddd1SJeff Kirsher status = -EBUSY; 12029aebddd1SJeff Kirsher goto err; 12039aebddd1SJeff Kirsher } 12049aebddd1SJeff Kirsher req = embedded_payload(wrb); 12059aebddd1SJeff Kirsher 1206106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1207106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12089aebddd1SJeff Kirsher 12099aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12109aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12119aebddd1SJeff Kirsher req->num_pages = 2; 12129aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12139aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 121410ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12159aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12169aebddd1SJeff Kirsher 12179aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12189aebddd1SJeff Kirsher if (!status) { 12199aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12209aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12219aebddd1SJeff Kirsher rxq->created = true; 12229aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12239aebddd1SJeff Kirsher } 12249aebddd1SJeff Kirsher 12259aebddd1SJeff Kirsher err: 12269aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12279aebddd1SJeff Kirsher return status; 12289aebddd1SJeff Kirsher } 12299aebddd1SJeff Kirsher 12309aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12319aebddd1SJeff Kirsher * Uses Mbox 12329aebddd1SJeff Kirsher */ 12339aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12349aebddd1SJeff Kirsher int queue_type) 12359aebddd1SJeff Kirsher { 12369aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12379aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12389aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 12399aebddd1SJeff Kirsher int status; 12409aebddd1SJeff Kirsher 12419aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12429aebddd1SJeff Kirsher return -1; 12439aebddd1SJeff Kirsher 12449aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12459aebddd1SJeff Kirsher req = embedded_payload(wrb); 12469aebddd1SJeff Kirsher 12479aebddd1SJeff Kirsher switch (queue_type) { 12489aebddd1SJeff Kirsher case QTYPE_EQ: 12499aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12509aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 12519aebddd1SJeff Kirsher break; 12529aebddd1SJeff Kirsher case QTYPE_CQ: 12539aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12549aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 12559aebddd1SJeff Kirsher break; 12569aebddd1SJeff Kirsher case QTYPE_TXQ: 12579aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 12589aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 12599aebddd1SJeff Kirsher break; 12609aebddd1SJeff Kirsher case QTYPE_RXQ: 12619aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 12629aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 12639aebddd1SJeff Kirsher break; 12649aebddd1SJeff Kirsher case QTYPE_MCCQ: 12659aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12669aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 12679aebddd1SJeff Kirsher break; 12689aebddd1SJeff Kirsher default: 12699aebddd1SJeff Kirsher BUG(); 12709aebddd1SJeff Kirsher } 12719aebddd1SJeff Kirsher 1272106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1273106df1e3SSomnath Kotur NULL); 12749aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 12759aebddd1SJeff Kirsher 12769aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12779aebddd1SJeff Kirsher q->created = false; 12789aebddd1SJeff Kirsher 12799aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12809aebddd1SJeff Kirsher return status; 12819aebddd1SJeff Kirsher } 12829aebddd1SJeff Kirsher 12839aebddd1SJeff Kirsher /* Uses MCC */ 12849aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 12859aebddd1SJeff Kirsher { 12869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12879aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12889aebddd1SJeff Kirsher int status; 12899aebddd1SJeff Kirsher 12909aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12919aebddd1SJeff Kirsher 12929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12939aebddd1SJeff Kirsher if (!wrb) { 12949aebddd1SJeff Kirsher status = -EBUSY; 12959aebddd1SJeff Kirsher goto err; 12969aebddd1SJeff Kirsher } 12979aebddd1SJeff Kirsher req = embedded_payload(wrb); 12989aebddd1SJeff Kirsher 1299106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1300106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13019aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13029aebddd1SJeff Kirsher 13039aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13049aebddd1SJeff Kirsher q->created = false; 13059aebddd1SJeff Kirsher 13069aebddd1SJeff Kirsher err: 13079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13089aebddd1SJeff Kirsher return status; 13099aebddd1SJeff Kirsher } 13109aebddd1SJeff Kirsher 13119aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1312f9449ab7SSathya Perla * Uses MCCQ 13139aebddd1SJeff Kirsher */ 13149aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13151578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13169aebddd1SJeff Kirsher { 13179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13189aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13199aebddd1SJeff Kirsher int status; 13209aebddd1SJeff Kirsher 1321f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 13229aebddd1SJeff Kirsher 1323f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1324f9449ab7SSathya Perla if (!wrb) { 1325f9449ab7SSathya Perla status = -EBUSY; 1326f9449ab7SSathya Perla goto err; 1327f9449ab7SSathya Perla } 13289aebddd1SJeff Kirsher req = embedded_payload(wrb); 13299aebddd1SJeff Kirsher 1330106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1331106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), wrb, NULL); 13329aebddd1SJeff Kirsher req->hdr.domain = domain; 13339aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13349aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 13351578e777SPadmanabh Ratnakar 1336f9449ab7SSathya Perla req->pmac_invalid = true; 13379aebddd1SJeff Kirsher 1338f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 13399aebddd1SJeff Kirsher if (!status) { 13409aebddd1SJeff Kirsher struct be_cmd_resp_if_create *resp = embedded_payload(wrb); 13419aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1342b5bb9776SSathya Perla 1343b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1344b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1345b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 13469aebddd1SJeff Kirsher } 13479aebddd1SJeff Kirsher 1348f9449ab7SSathya Perla err: 1349f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 13509aebddd1SJeff Kirsher return status; 13519aebddd1SJeff Kirsher } 13529aebddd1SJeff Kirsher 1353f9449ab7SSathya Perla /* Uses MCCQ */ 135430128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 13559aebddd1SJeff Kirsher { 13569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13579aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 13589aebddd1SJeff Kirsher int status; 13599aebddd1SJeff Kirsher 136030128031SSathya Perla if (interface_id == -1) 1361f9449ab7SSathya Perla return 0; 13629aebddd1SJeff Kirsher 1363f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1364f9449ab7SSathya Perla 1365f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1366f9449ab7SSathya Perla if (!wrb) { 1367f9449ab7SSathya Perla status = -EBUSY; 1368f9449ab7SSathya Perla goto err; 1369f9449ab7SSathya Perla } 13709aebddd1SJeff Kirsher req = embedded_payload(wrb); 13719aebddd1SJeff Kirsher 1372106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1373106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 13749aebddd1SJeff Kirsher req->hdr.domain = domain; 13759aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 13769aebddd1SJeff Kirsher 1377f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1378f9449ab7SSathya Perla err: 1379f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 13809aebddd1SJeff Kirsher return status; 13819aebddd1SJeff Kirsher } 13829aebddd1SJeff Kirsher 13839aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 13849aebddd1SJeff Kirsher * WRB but is a separate dma memory block 13859aebddd1SJeff Kirsher * Uses asynchronous MCC 13869aebddd1SJeff Kirsher */ 13879aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 13889aebddd1SJeff Kirsher { 13899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13909aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 13919aebddd1SJeff Kirsher int status = 0; 13929aebddd1SJeff Kirsher 13939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13949aebddd1SJeff Kirsher 13959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13969aebddd1SJeff Kirsher if (!wrb) { 13979aebddd1SJeff Kirsher status = -EBUSY; 13989aebddd1SJeff Kirsher goto err; 13999aebddd1SJeff Kirsher } 14009aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14019aebddd1SJeff Kirsher 1402106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1403106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 14049aebddd1SJeff Kirsher 1405ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1406ca34fe38SSathya Perla if (!BE2_chip(adapter)) 14079aebddd1SJeff Kirsher hdr->version = 1; 14089aebddd1SJeff Kirsher 14099aebddd1SJeff Kirsher be_mcc_notify(adapter); 14109aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14119aebddd1SJeff Kirsher 14129aebddd1SJeff Kirsher err: 14139aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14149aebddd1SJeff Kirsher return status; 14159aebddd1SJeff Kirsher } 14169aebddd1SJeff Kirsher 14179aebddd1SJeff Kirsher /* Lancer Stats */ 14189aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14199aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14209aebddd1SJeff Kirsher { 14219aebddd1SJeff Kirsher 14229aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14239aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14249aebddd1SJeff Kirsher int status = 0; 14259aebddd1SJeff Kirsher 1426f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1427f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1428f25b119cSPadmanabh Ratnakar return -EPERM; 1429f25b119cSPadmanabh Ratnakar 14309aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14319aebddd1SJeff Kirsher 14329aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14339aebddd1SJeff Kirsher if (!wrb) { 14349aebddd1SJeff Kirsher status = -EBUSY; 14359aebddd1SJeff Kirsher goto err; 14369aebddd1SJeff Kirsher } 14379aebddd1SJeff Kirsher req = nonemb_cmd->va; 14389aebddd1SJeff Kirsher 1439106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1440106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1441106df1e3SSomnath Kotur nonemb_cmd); 14429aebddd1SJeff Kirsher 1443d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 14449aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 14459aebddd1SJeff Kirsher 14469aebddd1SJeff Kirsher be_mcc_notify(adapter); 14479aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14489aebddd1SJeff Kirsher 14499aebddd1SJeff Kirsher err: 14509aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14519aebddd1SJeff Kirsher return status; 14529aebddd1SJeff Kirsher } 14539aebddd1SJeff Kirsher 1454323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1455323ff71eSSathya Perla { 1456323ff71eSSathya Perla switch (mac_speed) { 1457323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1458323ff71eSSathya Perla return 0; 1459323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1460323ff71eSSathya Perla return 10; 1461323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1462323ff71eSSathya Perla return 100; 1463323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1464323ff71eSSathya Perla return 1000; 1465323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1466323ff71eSSathya Perla return 10000; 1467323ff71eSSathya Perla } 1468323ff71eSSathya Perla return 0; 1469323ff71eSSathya Perla } 1470323ff71eSSathya Perla 1471323ff71eSSathya Perla /* Uses synchronous mcc 1472323ff71eSSathya Perla * Returns link_speed in Mbps 1473323ff71eSSathya Perla */ 1474323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1475323ff71eSSathya Perla u8 *link_status, u32 dom) 14769aebddd1SJeff Kirsher { 14779aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14789aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 14799aebddd1SJeff Kirsher int status; 14809aebddd1SJeff Kirsher 14819aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14829aebddd1SJeff Kirsher 1483b236916aSAjit Khaparde if (link_status) 1484b236916aSAjit Khaparde *link_status = LINK_DOWN; 1485b236916aSAjit Khaparde 14869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14879aebddd1SJeff Kirsher if (!wrb) { 14889aebddd1SJeff Kirsher status = -EBUSY; 14899aebddd1SJeff Kirsher goto err; 14909aebddd1SJeff Kirsher } 14919aebddd1SJeff Kirsher req = embedded_payload(wrb); 14929aebddd1SJeff Kirsher 149357cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 149457cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 149557cd80d4SPadmanabh Ratnakar 1496ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1497ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1498daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1499daad6167SPadmanabh Ratnakar 150057cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15019aebddd1SJeff Kirsher 15029aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15039aebddd1SJeff Kirsher if (!status) { 15049aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1505323ff71eSSathya Perla if (link_speed) { 1506323ff71eSSathya Perla *link_speed = resp->link_speed ? 1507323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1508323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1509323ff71eSSathya Perla 1510323ff71eSSathya Perla if (!resp->logical_link_status) 1511323ff71eSSathya Perla *link_speed = 0; 15129aebddd1SJeff Kirsher } 1513b236916aSAjit Khaparde if (link_status) 1514b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15159aebddd1SJeff Kirsher } 15169aebddd1SJeff Kirsher 15179aebddd1SJeff Kirsher err: 15189aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15199aebddd1SJeff Kirsher return status; 15209aebddd1SJeff Kirsher } 15219aebddd1SJeff Kirsher 15229aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15239aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15249aebddd1SJeff Kirsher { 15259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15269aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 15279aebddd1SJeff Kirsher int status; 15289aebddd1SJeff Kirsher 15299aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15309aebddd1SJeff Kirsher 15319aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15329aebddd1SJeff Kirsher if (!wrb) { 15339aebddd1SJeff Kirsher status = -EBUSY; 15349aebddd1SJeff Kirsher goto err; 15359aebddd1SJeff Kirsher } 15369aebddd1SJeff Kirsher req = embedded_payload(wrb); 15379aebddd1SJeff Kirsher 1538106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1539106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1540106df1e3SSomnath Kotur wrb, NULL); 15419aebddd1SJeff Kirsher 15423de09455SSomnath Kotur be_mcc_notify(adapter); 15439aebddd1SJeff Kirsher 15449aebddd1SJeff Kirsher err: 15459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15469aebddd1SJeff Kirsher return status; 15479aebddd1SJeff Kirsher } 15489aebddd1SJeff Kirsher 15499aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15509aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 15519aebddd1SJeff Kirsher { 15529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15539aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15549aebddd1SJeff Kirsher int status; 15559aebddd1SJeff Kirsher 15569aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15579aebddd1SJeff Kirsher 15589aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15599aebddd1SJeff Kirsher if (!wrb) { 15609aebddd1SJeff Kirsher status = -EBUSY; 15619aebddd1SJeff Kirsher goto err; 15629aebddd1SJeff Kirsher } 15639aebddd1SJeff Kirsher req = embedded_payload(wrb); 15649aebddd1SJeff Kirsher 1565106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1566106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 15679aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 15689aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15699aebddd1SJeff Kirsher if (!status) { 15709aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 15719aebddd1SJeff Kirsher if (log_size && resp->log_size) 15729aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 15739aebddd1SJeff Kirsher sizeof(u32); 15749aebddd1SJeff Kirsher } 15759aebddd1SJeff Kirsher err: 15769aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15779aebddd1SJeff Kirsher return status; 15789aebddd1SJeff Kirsher } 15799aebddd1SJeff Kirsher 15809aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 15819aebddd1SJeff Kirsher { 15829aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 15839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15849aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15859aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 15869aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 15879aebddd1SJeff Kirsher int status; 15889aebddd1SJeff Kirsher 15899aebddd1SJeff Kirsher if (buf_len == 0) 15909aebddd1SJeff Kirsher return; 15919aebddd1SJeff Kirsher 15929aebddd1SJeff Kirsher total_size = buf_len; 15939aebddd1SJeff Kirsher 15949aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 15959aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 15969aebddd1SJeff Kirsher get_fat_cmd.size, 15979aebddd1SJeff Kirsher &get_fat_cmd.dma); 15989aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 15999aebddd1SJeff Kirsher status = -ENOMEM; 16009aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16019aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16029aebddd1SJeff Kirsher return; 16039aebddd1SJeff Kirsher } 16049aebddd1SJeff Kirsher 16059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16069aebddd1SJeff Kirsher 16079aebddd1SJeff Kirsher while (total_size) { 16089aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16099aebddd1SJeff Kirsher total_size -= buf_size; 16109aebddd1SJeff Kirsher 16119aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16129aebddd1SJeff Kirsher if (!wrb) { 16139aebddd1SJeff Kirsher status = -EBUSY; 16149aebddd1SJeff Kirsher goto err; 16159aebddd1SJeff Kirsher } 16169aebddd1SJeff Kirsher req = get_fat_cmd.va; 16179aebddd1SJeff Kirsher 16189aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1619106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1620106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1621106df1e3SSomnath Kotur &get_fat_cmd); 16229aebddd1SJeff Kirsher 16239aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16249aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16259aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16269aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16279aebddd1SJeff Kirsher 16289aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16299aebddd1SJeff Kirsher if (!status) { 16309aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16319aebddd1SJeff Kirsher memcpy(buf + offset, 16329aebddd1SJeff Kirsher resp->data_buffer, 163392aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16349aebddd1SJeff Kirsher } else { 16359aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16369aebddd1SJeff Kirsher goto err; 16379aebddd1SJeff Kirsher } 16389aebddd1SJeff Kirsher offset += buf_size; 16399aebddd1SJeff Kirsher log_offset += buf_size; 16409aebddd1SJeff Kirsher } 16419aebddd1SJeff Kirsher err: 16429aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 16439aebddd1SJeff Kirsher get_fat_cmd.va, 16449aebddd1SJeff Kirsher get_fat_cmd.dma); 16459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16469aebddd1SJeff Kirsher } 16479aebddd1SJeff Kirsher 164804b71175SSathya Perla /* Uses synchronous mcc */ 164904b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 165004b71175SSathya Perla char *fw_on_flash) 16519aebddd1SJeff Kirsher { 16529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16539aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 16549aebddd1SJeff Kirsher int status; 16559aebddd1SJeff Kirsher 165604b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 16579aebddd1SJeff Kirsher 165804b71175SSathya Perla wrb = wrb_from_mccq(adapter); 165904b71175SSathya Perla if (!wrb) { 166004b71175SSathya Perla status = -EBUSY; 166104b71175SSathya Perla goto err; 166204b71175SSathya Perla } 166304b71175SSathya Perla 16649aebddd1SJeff Kirsher req = embedded_payload(wrb); 16659aebddd1SJeff Kirsher 1666106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1667106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 166804b71175SSathya Perla status = be_mcc_notify_wait(adapter); 16699aebddd1SJeff Kirsher if (!status) { 16709aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 167104b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 167204b71175SSathya Perla if (fw_on_flash) 167304b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 16749aebddd1SJeff Kirsher } 167504b71175SSathya Perla err: 167604b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 16779aebddd1SJeff Kirsher return status; 16789aebddd1SJeff Kirsher } 16799aebddd1SJeff Kirsher 16809aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 16819aebddd1SJeff Kirsher * Uses async mcc 16829aebddd1SJeff Kirsher */ 16839aebddd1SJeff Kirsher int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) 16849aebddd1SJeff Kirsher { 16859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16869aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 16879aebddd1SJeff Kirsher int status = 0; 16889aebddd1SJeff Kirsher 16899aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16909aebddd1SJeff Kirsher 16919aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16929aebddd1SJeff Kirsher if (!wrb) { 16939aebddd1SJeff Kirsher status = -EBUSY; 16949aebddd1SJeff Kirsher goto err; 16959aebddd1SJeff Kirsher } 16969aebddd1SJeff Kirsher req = embedded_payload(wrb); 16979aebddd1SJeff Kirsher 1698106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1699106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 17009aebddd1SJeff Kirsher 17019aebddd1SJeff Kirsher req->num_eq = cpu_to_le32(1); 17029aebddd1SJeff Kirsher req->delay[0].eq_id = cpu_to_le32(eq_id); 17039aebddd1SJeff Kirsher req->delay[0].phase = 0; 17049aebddd1SJeff Kirsher req->delay[0].delay_multiplier = cpu_to_le32(eqd); 17059aebddd1SJeff Kirsher 17069aebddd1SJeff Kirsher be_mcc_notify(adapter); 17079aebddd1SJeff Kirsher 17089aebddd1SJeff Kirsher err: 17099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17109aebddd1SJeff Kirsher return status; 17119aebddd1SJeff Kirsher } 17129aebddd1SJeff Kirsher 17139aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17149aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 17159aebddd1SJeff Kirsher u32 num, bool untagged, bool promiscuous) 17169aebddd1SJeff Kirsher { 17179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17189aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17199aebddd1SJeff Kirsher int status; 17209aebddd1SJeff Kirsher 17219aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17229aebddd1SJeff Kirsher 17239aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17249aebddd1SJeff Kirsher if (!wrb) { 17259aebddd1SJeff Kirsher status = -EBUSY; 17269aebddd1SJeff Kirsher goto err; 17279aebddd1SJeff Kirsher } 17289aebddd1SJeff Kirsher req = embedded_payload(wrb); 17299aebddd1SJeff Kirsher 1730106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1731106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17329aebddd1SJeff Kirsher 17339aebddd1SJeff Kirsher req->interface_id = if_id; 17349aebddd1SJeff Kirsher req->promiscuous = promiscuous; 17359aebddd1SJeff Kirsher req->untagged = untagged; 17369aebddd1SJeff Kirsher req->num_vlan = num; 17379aebddd1SJeff Kirsher if (!promiscuous) { 17389aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 17399aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 17409aebddd1SJeff Kirsher } 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17439aebddd1SJeff Kirsher 17449aebddd1SJeff Kirsher err: 17459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17469aebddd1SJeff Kirsher return status; 17479aebddd1SJeff Kirsher } 17489aebddd1SJeff Kirsher 17499aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 17509aebddd1SJeff Kirsher { 17519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17529aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 17539aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 17549aebddd1SJeff Kirsher int status; 17559aebddd1SJeff Kirsher 17569aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17579aebddd1SJeff Kirsher 17589aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17599aebddd1SJeff Kirsher if (!wrb) { 17609aebddd1SJeff Kirsher status = -EBUSY; 17619aebddd1SJeff Kirsher goto err; 17629aebddd1SJeff Kirsher } 17639aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1764106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1765106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1766106df1e3SSomnath Kotur wrb, mem); 17679aebddd1SJeff Kirsher 17689aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 17699aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 17709aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1771c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1772c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 17739aebddd1SJeff Kirsher if (value == ON) 17749aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1775c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1776c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 17779aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 17789aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 17799aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 17809aebddd1SJeff Kirsher } else { 17819aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 17829aebddd1SJeff Kirsher int i = 0; 17839aebddd1SJeff Kirsher 17848e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 17858e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 17861610c79fSPadmanabh Ratnakar 17871610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 17881610c79fSPadmanabh Ratnakar * and not setting flags field 17891610c79fSPadmanabh Ratnakar */ 17901610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1791abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 1792abb93951SPadmanabh Ratnakar adapter->if_cap_flags); 17931610c79fSPadmanabh Ratnakar 1794016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 17959aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 17969aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 17979aebddd1SJeff Kirsher } 17989aebddd1SJeff Kirsher 17999aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18009aebddd1SJeff Kirsher err: 18019aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18029aebddd1SJeff Kirsher return status; 18039aebddd1SJeff Kirsher } 18049aebddd1SJeff Kirsher 18059aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 18069aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 18079aebddd1SJeff Kirsher { 18089aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18099aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 18109aebddd1SJeff Kirsher int status; 18119aebddd1SJeff Kirsher 1812f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1813f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1814f25b119cSPadmanabh Ratnakar return -EPERM; 1815f25b119cSPadmanabh Ratnakar 18169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18179aebddd1SJeff Kirsher 18189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18199aebddd1SJeff Kirsher if (!wrb) { 18209aebddd1SJeff Kirsher status = -EBUSY; 18219aebddd1SJeff Kirsher goto err; 18229aebddd1SJeff Kirsher } 18239aebddd1SJeff Kirsher req = embedded_payload(wrb); 18249aebddd1SJeff Kirsher 1825106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1826106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18279aebddd1SJeff Kirsher 18289aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 18299aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 18309aebddd1SJeff Kirsher 18319aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18329aebddd1SJeff Kirsher 18339aebddd1SJeff Kirsher err: 18349aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18359aebddd1SJeff Kirsher return status; 18369aebddd1SJeff Kirsher } 18379aebddd1SJeff Kirsher 18389aebddd1SJeff Kirsher /* Uses sycn mcc */ 18399aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 18409aebddd1SJeff Kirsher { 18419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18429aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 18439aebddd1SJeff Kirsher int status; 18449aebddd1SJeff Kirsher 1845f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1846f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1847f25b119cSPadmanabh Ratnakar return -EPERM; 1848f25b119cSPadmanabh Ratnakar 18499aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18509aebddd1SJeff Kirsher 18519aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18529aebddd1SJeff Kirsher if (!wrb) { 18539aebddd1SJeff Kirsher status = -EBUSY; 18549aebddd1SJeff Kirsher goto err; 18559aebddd1SJeff Kirsher } 18569aebddd1SJeff Kirsher req = embedded_payload(wrb); 18579aebddd1SJeff Kirsher 1858106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1859106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18609aebddd1SJeff Kirsher 18619aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18629aebddd1SJeff Kirsher if (!status) { 18639aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 18649aebddd1SJeff Kirsher embedded_payload(wrb); 18659aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 18669aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 18679aebddd1SJeff Kirsher } 18689aebddd1SJeff Kirsher 18699aebddd1SJeff Kirsher err: 18709aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18719aebddd1SJeff Kirsher return status; 18729aebddd1SJeff Kirsher } 18739aebddd1SJeff Kirsher 18749aebddd1SJeff Kirsher /* Uses mbox */ 18759aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 18760ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 18779aebddd1SJeff Kirsher { 18789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18799aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 18809aebddd1SJeff Kirsher int status; 18819aebddd1SJeff Kirsher 18829aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 18839aebddd1SJeff Kirsher return -1; 18849aebddd1SJeff Kirsher 18859aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 18869aebddd1SJeff Kirsher req = embedded_payload(wrb); 18879aebddd1SJeff Kirsher 1888106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1889106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 18909aebddd1SJeff Kirsher 18919aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 18929aebddd1SJeff Kirsher if (!status) { 18939aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 18949aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 18959aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 18969aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 18970ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 18989aebddd1SJeff Kirsher } 18999aebddd1SJeff Kirsher 19009aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19019aebddd1SJeff Kirsher return status; 19029aebddd1SJeff Kirsher } 19039aebddd1SJeff Kirsher 19049aebddd1SJeff Kirsher /* Uses mbox */ 19059aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 19069aebddd1SJeff Kirsher { 19079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19089aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 19099aebddd1SJeff Kirsher int status; 19109aebddd1SJeff Kirsher 1911bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1912bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1913bf99e50dSPadmanabh Ratnakar if (!status) { 1914bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1915bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1916bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1917bf99e50dSPadmanabh Ratnakar } 1918bf99e50dSPadmanabh Ratnakar if (status) { 1919bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 1920bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 1921bf99e50dSPadmanabh Ratnakar } 1922bf99e50dSPadmanabh Ratnakar return status; 1923bf99e50dSPadmanabh Ratnakar } 1924bf99e50dSPadmanabh Ratnakar 19259aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19269aebddd1SJeff Kirsher return -1; 19279aebddd1SJeff Kirsher 19289aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19299aebddd1SJeff Kirsher req = embedded_payload(wrb); 19309aebddd1SJeff Kirsher 1931106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 1932106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 19339aebddd1SJeff Kirsher 19349aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19359aebddd1SJeff Kirsher 19369aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19379aebddd1SJeff Kirsher return status; 19389aebddd1SJeff Kirsher } 19399aebddd1SJeff Kirsher 1940594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 1941594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 19429aebddd1SJeff Kirsher { 19439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19449aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 194565f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 194665f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 194765f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 19489aebddd1SJeff Kirsher int status; 19499aebddd1SJeff Kirsher 19509aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19519aebddd1SJeff Kirsher return -1; 19529aebddd1SJeff Kirsher 19539aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19549aebddd1SJeff Kirsher req = embedded_payload(wrb); 19559aebddd1SJeff Kirsher 1956106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1957106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 19589aebddd1SJeff Kirsher 19599aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1960594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 19619aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 1962594ad54aSSuresh Reddy 1963594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 1964594ad54aSSuresh Reddy req->hdr.version = 1; 1965594ad54aSSuresh Reddy 19669aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 19679aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 19689aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 19699aebddd1SJeff Kirsher 19709aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19719aebddd1SJeff Kirsher 19729aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19739aebddd1SJeff Kirsher return status; 19749aebddd1SJeff Kirsher } 19759aebddd1SJeff Kirsher 19769aebddd1SJeff Kirsher /* Uses sync mcc */ 19779aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 19789aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 19799aebddd1SJeff Kirsher { 19809aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19819aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 19829aebddd1SJeff Kirsher int status; 19839aebddd1SJeff Kirsher 19849aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19859aebddd1SJeff Kirsher 19869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19879aebddd1SJeff Kirsher if (!wrb) { 19889aebddd1SJeff Kirsher status = -EBUSY; 19899aebddd1SJeff Kirsher goto err; 19909aebddd1SJeff Kirsher } 19919aebddd1SJeff Kirsher req = embedded_payload(wrb); 19929aebddd1SJeff Kirsher 1993106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1994106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 19959aebddd1SJeff Kirsher 19969aebddd1SJeff Kirsher req->port_num = port_num; 19979aebddd1SJeff Kirsher req->beacon_state = state; 19989aebddd1SJeff Kirsher req->beacon_duration = bcn; 19999aebddd1SJeff Kirsher req->status_duration = sts; 20009aebddd1SJeff Kirsher 20019aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20029aebddd1SJeff Kirsher 20039aebddd1SJeff Kirsher err: 20049aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20059aebddd1SJeff Kirsher return status; 20069aebddd1SJeff Kirsher } 20079aebddd1SJeff Kirsher 20089aebddd1SJeff Kirsher /* Uses sync mcc */ 20099aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 20109aebddd1SJeff Kirsher { 20119aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20129aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20139aebddd1SJeff Kirsher int status; 20149aebddd1SJeff Kirsher 20159aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20169aebddd1SJeff Kirsher 20179aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20189aebddd1SJeff Kirsher if (!wrb) { 20199aebddd1SJeff Kirsher status = -EBUSY; 20209aebddd1SJeff Kirsher goto err; 20219aebddd1SJeff Kirsher } 20229aebddd1SJeff Kirsher req = embedded_payload(wrb); 20239aebddd1SJeff Kirsher 2024106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2025106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 20269aebddd1SJeff Kirsher 20279aebddd1SJeff Kirsher req->port_num = port_num; 20289aebddd1SJeff Kirsher 20299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20309aebddd1SJeff Kirsher if (!status) { 20319aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 20329aebddd1SJeff Kirsher embedded_payload(wrb); 20339aebddd1SJeff Kirsher *state = resp->beacon_state; 20349aebddd1SJeff Kirsher } 20359aebddd1SJeff Kirsher 20369aebddd1SJeff Kirsher err: 20379aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20389aebddd1SJeff Kirsher return status; 20399aebddd1SJeff Kirsher } 20409aebddd1SJeff Kirsher 20419aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2042f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2043f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2044f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 20459aebddd1SJeff Kirsher { 20469aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20479aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 20489aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 20499aebddd1SJeff Kirsher void *ctxt = NULL; 20509aebddd1SJeff Kirsher int status; 20519aebddd1SJeff Kirsher 20529aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20539aebddd1SJeff Kirsher adapter->flash_status = 0; 20549aebddd1SJeff Kirsher 20559aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20569aebddd1SJeff Kirsher if (!wrb) { 20579aebddd1SJeff Kirsher status = -EBUSY; 20589aebddd1SJeff Kirsher goto err_unlock; 20599aebddd1SJeff Kirsher } 20609aebddd1SJeff Kirsher 20619aebddd1SJeff Kirsher req = embedded_payload(wrb); 20629aebddd1SJeff Kirsher 2063106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 20649aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2065106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2066106df1e3SSomnath Kotur NULL); 20679aebddd1SJeff Kirsher 20689aebddd1SJeff Kirsher ctxt = &req->context; 20699aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20709aebddd1SJeff Kirsher write_length, ctxt, data_size); 20719aebddd1SJeff Kirsher 20729aebddd1SJeff Kirsher if (data_size == 0) 20739aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20749aebddd1SJeff Kirsher eof, ctxt, 1); 20759aebddd1SJeff Kirsher else 20769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20779aebddd1SJeff Kirsher eof, ctxt, 0); 20789aebddd1SJeff Kirsher 20799aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 20809aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 20819aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 20829aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 20839aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 20849aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 20859aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 20869aebddd1SJeff Kirsher & 0xFFFFFFFF); 20879aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 20889aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 20899aebddd1SJeff Kirsher 20909aebddd1SJeff Kirsher be_mcc_notify(adapter); 20919aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2094701962d0SSomnath Kotur msecs_to_jiffies(60000))) 20959aebddd1SJeff Kirsher status = -1; 20969aebddd1SJeff Kirsher else 20979aebddd1SJeff Kirsher status = adapter->flash_status; 20989aebddd1SJeff Kirsher 20999aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2100f67ef7baSPadmanabh Ratnakar if (!status) { 21019aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2102f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2103f67ef7baSPadmanabh Ratnakar } else { 21049aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2105f67ef7baSPadmanabh Ratnakar } 21069aebddd1SJeff Kirsher 21079aebddd1SJeff Kirsher return status; 21089aebddd1SJeff Kirsher 21099aebddd1SJeff Kirsher err_unlock: 21109aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21119aebddd1SJeff Kirsher return status; 21129aebddd1SJeff Kirsher } 21139aebddd1SJeff Kirsher 2114de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2115de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2116de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2117de49bd5aSPadmanabh Ratnakar { 2118de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2119de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2120de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2121de49bd5aSPadmanabh Ratnakar int status; 2122de49bd5aSPadmanabh Ratnakar 2123de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2124de49bd5aSPadmanabh Ratnakar 2125de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2126de49bd5aSPadmanabh Ratnakar if (!wrb) { 2127de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2128de49bd5aSPadmanabh Ratnakar goto err_unlock; 2129de49bd5aSPadmanabh Ratnakar } 2130de49bd5aSPadmanabh Ratnakar 2131de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2132de49bd5aSPadmanabh Ratnakar 2133de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2134de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2135de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2136de49bd5aSPadmanabh Ratnakar NULL); 2137de49bd5aSPadmanabh Ratnakar 2138de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2139de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2140de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2141de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2142de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2143de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2144de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2145de49bd5aSPadmanabh Ratnakar 2146de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2147de49bd5aSPadmanabh Ratnakar 2148de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2149de49bd5aSPadmanabh Ratnakar if (!status) { 2150de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2151de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2152de49bd5aSPadmanabh Ratnakar } else { 2153de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2154de49bd5aSPadmanabh Ratnakar } 2155de49bd5aSPadmanabh Ratnakar 2156de49bd5aSPadmanabh Ratnakar err_unlock: 2157de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2158de49bd5aSPadmanabh Ratnakar return status; 2159de49bd5aSPadmanabh Ratnakar } 2160de49bd5aSPadmanabh Ratnakar 21619aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 21629aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 21639aebddd1SJeff Kirsher { 21649aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21659aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 21669aebddd1SJeff Kirsher int status; 21679aebddd1SJeff Kirsher 21689aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21699aebddd1SJeff Kirsher adapter->flash_status = 0; 21709aebddd1SJeff Kirsher 21719aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21729aebddd1SJeff Kirsher if (!wrb) { 21739aebddd1SJeff Kirsher status = -EBUSY; 21749aebddd1SJeff Kirsher goto err_unlock; 21759aebddd1SJeff Kirsher } 21769aebddd1SJeff Kirsher req = cmd->va; 21779aebddd1SJeff Kirsher 2178106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2179106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 21809aebddd1SJeff Kirsher 21819aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 21829aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 21839aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 21849aebddd1SJeff Kirsher 21859aebddd1SJeff Kirsher be_mcc_notify(adapter); 21869aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21879aebddd1SJeff Kirsher 21889aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2189e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 21909aebddd1SJeff Kirsher status = -1; 21919aebddd1SJeff Kirsher else 21929aebddd1SJeff Kirsher status = adapter->flash_status; 21939aebddd1SJeff Kirsher 21949aebddd1SJeff Kirsher return status; 21959aebddd1SJeff Kirsher 21969aebddd1SJeff Kirsher err_unlock: 21979aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21989aebddd1SJeff Kirsher return status; 21999aebddd1SJeff Kirsher } 22009aebddd1SJeff Kirsher 22019aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 22029aebddd1SJeff Kirsher int offset) 22039aebddd1SJeff Kirsher { 22049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2205be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 22069aebddd1SJeff Kirsher int status; 22079aebddd1SJeff Kirsher 22089aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22099aebddd1SJeff Kirsher 22109aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22119aebddd1SJeff Kirsher if (!wrb) { 22129aebddd1SJeff Kirsher status = -EBUSY; 22139aebddd1SJeff Kirsher goto err; 22149aebddd1SJeff Kirsher } 22159aebddd1SJeff Kirsher req = embedded_payload(wrb); 22169aebddd1SJeff Kirsher 2217106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2218be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2219be716446SPadmanabh Ratnakar wrb, NULL); 22209aebddd1SJeff Kirsher 2221c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 22229aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 22239aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 22249aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 22259aebddd1SJeff Kirsher 22269aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22279aebddd1SJeff Kirsher if (!status) 2228be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 22299aebddd1SJeff Kirsher 22309aebddd1SJeff Kirsher err: 22319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22329aebddd1SJeff Kirsher return status; 22339aebddd1SJeff Kirsher } 22349aebddd1SJeff Kirsher 22359aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 22369aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 22379aebddd1SJeff Kirsher { 22389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22399aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 22409aebddd1SJeff Kirsher int status; 22419aebddd1SJeff Kirsher 22429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22439aebddd1SJeff Kirsher 22449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22459aebddd1SJeff Kirsher if (!wrb) { 22469aebddd1SJeff Kirsher status = -EBUSY; 22479aebddd1SJeff Kirsher goto err; 22489aebddd1SJeff Kirsher } 22499aebddd1SJeff Kirsher req = nonemb_cmd->va; 22509aebddd1SJeff Kirsher 2251106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2252106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2253106df1e3SSomnath Kotur nonemb_cmd); 22549aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 22559aebddd1SJeff Kirsher 22569aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22579aebddd1SJeff Kirsher 22589aebddd1SJeff Kirsher err: 22599aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22609aebddd1SJeff Kirsher return status; 22619aebddd1SJeff Kirsher } 22629aebddd1SJeff Kirsher 22639aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 22649aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 22659aebddd1SJeff Kirsher { 22669aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22679aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 22689aebddd1SJeff Kirsher int status; 22699aebddd1SJeff Kirsher 22709aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22719aebddd1SJeff Kirsher 22729aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22739aebddd1SJeff Kirsher if (!wrb) { 22749aebddd1SJeff Kirsher status = -EBUSY; 22759aebddd1SJeff Kirsher goto err; 22769aebddd1SJeff Kirsher } 22779aebddd1SJeff Kirsher 22789aebddd1SJeff Kirsher req = embedded_payload(wrb); 22799aebddd1SJeff Kirsher 2280106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2281106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2282106df1e3SSomnath Kotur NULL); 22839aebddd1SJeff Kirsher 22849aebddd1SJeff Kirsher req->src_port = port_num; 22859aebddd1SJeff Kirsher req->dest_port = port_num; 22869aebddd1SJeff Kirsher req->loopback_type = loopback_type; 22879aebddd1SJeff Kirsher req->loopback_state = enable; 22889aebddd1SJeff Kirsher 22899aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22909aebddd1SJeff Kirsher err: 22919aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22929aebddd1SJeff Kirsher return status; 22939aebddd1SJeff Kirsher } 22949aebddd1SJeff Kirsher 22959aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 22969aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 22979aebddd1SJeff Kirsher { 22989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22999aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 23009aebddd1SJeff Kirsher int status; 23019aebddd1SJeff Kirsher 23029aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23039aebddd1SJeff Kirsher 23049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23059aebddd1SJeff Kirsher if (!wrb) { 23069aebddd1SJeff Kirsher status = -EBUSY; 23079aebddd1SJeff Kirsher goto err; 23089aebddd1SJeff Kirsher } 23099aebddd1SJeff Kirsher 23109aebddd1SJeff Kirsher req = embedded_payload(wrb); 23119aebddd1SJeff Kirsher 2312106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2313106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 23149aebddd1SJeff Kirsher req->hdr.timeout = cpu_to_le32(4); 23159aebddd1SJeff Kirsher 23169aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23179aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 23189aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 23199aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 23209aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 23219aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 23229aebddd1SJeff Kirsher 23239aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23249aebddd1SJeff Kirsher if (!status) { 23259aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); 23269aebddd1SJeff Kirsher status = le32_to_cpu(resp->status); 23279aebddd1SJeff Kirsher } 23289aebddd1SJeff Kirsher 23299aebddd1SJeff Kirsher err: 23309aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23319aebddd1SJeff Kirsher return status; 23329aebddd1SJeff Kirsher } 23339aebddd1SJeff Kirsher 23349aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 23359aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 23369aebddd1SJeff Kirsher { 23379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23389aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 23399aebddd1SJeff Kirsher int status; 23409aebddd1SJeff Kirsher int i, j = 0; 23419aebddd1SJeff Kirsher 23429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23439aebddd1SJeff Kirsher 23449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23459aebddd1SJeff Kirsher if (!wrb) { 23469aebddd1SJeff Kirsher status = -EBUSY; 23479aebddd1SJeff Kirsher goto err; 23489aebddd1SJeff Kirsher } 23499aebddd1SJeff Kirsher req = cmd->va; 2350106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2351106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 23529aebddd1SJeff Kirsher 23539aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23549aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 23559aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 23569aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 23579aebddd1SJeff Kirsher j++; 23589aebddd1SJeff Kirsher if (j > 7) 23599aebddd1SJeff Kirsher j = 0; 23609aebddd1SJeff Kirsher } 23619aebddd1SJeff Kirsher 23629aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23639aebddd1SJeff Kirsher 23649aebddd1SJeff Kirsher if (!status) { 23659aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 23669aebddd1SJeff Kirsher resp = cmd->va; 23679aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 23689aebddd1SJeff Kirsher resp->snd_err) { 23699aebddd1SJeff Kirsher status = -1; 23709aebddd1SJeff Kirsher } 23719aebddd1SJeff Kirsher } 23729aebddd1SJeff Kirsher 23739aebddd1SJeff Kirsher err: 23749aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23759aebddd1SJeff Kirsher return status; 23769aebddd1SJeff Kirsher } 23779aebddd1SJeff Kirsher 23789aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 23799aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23809aebddd1SJeff Kirsher { 23819aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23829aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 23839aebddd1SJeff Kirsher int status; 23849aebddd1SJeff Kirsher 23859aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23869aebddd1SJeff Kirsher 23879aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23889aebddd1SJeff Kirsher if (!wrb) { 23899aebddd1SJeff Kirsher status = -EBUSY; 23909aebddd1SJeff Kirsher goto err; 23919aebddd1SJeff Kirsher } 23929aebddd1SJeff Kirsher req = nonemb_cmd->va; 23939aebddd1SJeff Kirsher 2394106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2395106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2396106df1e3SSomnath Kotur nonemb_cmd); 23979aebddd1SJeff Kirsher 23989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23999aebddd1SJeff Kirsher 24009aebddd1SJeff Kirsher err: 24019aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24029aebddd1SJeff Kirsher return status; 24039aebddd1SJeff Kirsher } 24049aebddd1SJeff Kirsher 240542f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 24069aebddd1SJeff Kirsher { 24079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24089aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 24099aebddd1SJeff Kirsher struct be_dma_mem cmd; 24109aebddd1SJeff Kirsher int status; 24119aebddd1SJeff Kirsher 2412f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2413f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2414f25b119cSPadmanabh Ratnakar return -EPERM; 2415f25b119cSPadmanabh Ratnakar 24169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24179aebddd1SJeff Kirsher 24189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24199aebddd1SJeff Kirsher if (!wrb) { 24209aebddd1SJeff Kirsher status = -EBUSY; 24219aebddd1SJeff Kirsher goto err; 24229aebddd1SJeff Kirsher } 24239aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 24249aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 24259aebddd1SJeff Kirsher &cmd.dma); 24269aebddd1SJeff Kirsher if (!cmd.va) { 24279aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 24289aebddd1SJeff Kirsher status = -ENOMEM; 24299aebddd1SJeff Kirsher goto err; 24309aebddd1SJeff Kirsher } 24319aebddd1SJeff Kirsher 24329aebddd1SJeff Kirsher req = cmd.va; 24339aebddd1SJeff Kirsher 2434106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2435106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2436106df1e3SSomnath Kotur wrb, &cmd); 24379aebddd1SJeff Kirsher 24389aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24399aebddd1SJeff Kirsher if (!status) { 24409aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 24419aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 244242f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 244342f11cf2SAjit Khaparde adapter->phy.interface_type = 24449aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 244542f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 244642f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 244742f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 244842f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 244942f11cf2SAjit Khaparde adapter->phy.misc_params = 245042f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 24519aebddd1SJeff Kirsher } 24529aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 24539aebddd1SJeff Kirsher cmd.va, cmd.dma); 24549aebddd1SJeff Kirsher err: 24559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24569aebddd1SJeff Kirsher return status; 24579aebddd1SJeff Kirsher } 24589aebddd1SJeff Kirsher 24599aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 24609aebddd1SJeff Kirsher { 24619aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24629aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 24639aebddd1SJeff Kirsher int status; 24649aebddd1SJeff Kirsher 24659aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24669aebddd1SJeff Kirsher 24679aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24689aebddd1SJeff Kirsher if (!wrb) { 24699aebddd1SJeff Kirsher status = -EBUSY; 24709aebddd1SJeff Kirsher goto err; 24719aebddd1SJeff Kirsher } 24729aebddd1SJeff Kirsher 24739aebddd1SJeff Kirsher req = embedded_payload(wrb); 24749aebddd1SJeff Kirsher 2475106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2476106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 24779aebddd1SJeff Kirsher 24789aebddd1SJeff Kirsher req->hdr.domain = domain; 24799aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 24809aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 24819aebddd1SJeff Kirsher 24829aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24839aebddd1SJeff Kirsher 24849aebddd1SJeff Kirsher err: 24859aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24869aebddd1SJeff Kirsher return status; 24879aebddd1SJeff Kirsher } 24889aebddd1SJeff Kirsher 24899aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 24909aebddd1SJeff Kirsher { 24919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24929aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 24939aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 24949aebddd1SJeff Kirsher int status; 24959aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 24969aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 24979aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 24989aebddd1SJeff Kirsher 2499d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2500d98ef50fSSuresh Reddy return -1; 2501d98ef50fSSuresh Reddy 25029aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 25039aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 25049aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 25059aebddd1SJeff Kirsher &attribs_cmd.dma); 25069aebddd1SJeff Kirsher if (!attribs_cmd.va) { 25079aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 25089aebddd1SJeff Kirsher "Memory allocation failure\n"); 2509d98ef50fSSuresh Reddy status = -ENOMEM; 2510d98ef50fSSuresh Reddy goto err; 25119aebddd1SJeff Kirsher } 25129aebddd1SJeff Kirsher 25139aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25149aebddd1SJeff Kirsher if (!wrb) { 25159aebddd1SJeff Kirsher status = -EBUSY; 25169aebddd1SJeff Kirsher goto err; 25179aebddd1SJeff Kirsher } 25189aebddd1SJeff Kirsher req = attribs_cmd.va; 25199aebddd1SJeff Kirsher 2520106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2521106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2522106df1e3SSomnath Kotur &attribs_cmd); 25239aebddd1SJeff Kirsher 25249aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25259aebddd1SJeff Kirsher if (!status) { 25269aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 25279aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 25289aebddd1SJeff Kirsher } 25299aebddd1SJeff Kirsher 25309aebddd1SJeff Kirsher err: 25319aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2532d98ef50fSSuresh Reddy if (attribs_cmd.va) 2533d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2534d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 25359aebddd1SJeff Kirsher return status; 25369aebddd1SJeff Kirsher } 25379aebddd1SJeff Kirsher 25389aebddd1SJeff Kirsher /* Uses mbox */ 25399aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 25409aebddd1SJeff Kirsher { 25419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25429aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 25439aebddd1SJeff Kirsher int status; 25449aebddd1SJeff Kirsher 25459aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 25469aebddd1SJeff Kirsher return -1; 25479aebddd1SJeff Kirsher 25489aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25499aebddd1SJeff Kirsher if (!wrb) { 25509aebddd1SJeff Kirsher status = -EBUSY; 25519aebddd1SJeff Kirsher goto err; 25529aebddd1SJeff Kirsher } 25539aebddd1SJeff Kirsher 25549aebddd1SJeff Kirsher req = embedded_payload(wrb); 25559aebddd1SJeff Kirsher 2556106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2557106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 25589aebddd1SJeff Kirsher 25599aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 25609aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 25619aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 25629aebddd1SJeff Kirsher 25639aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25649aebddd1SJeff Kirsher if (!status) { 25659aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 25669aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 25679aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2568d379142bSSathya Perla if (!adapter->be3_native) 2569d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2570d379142bSSathya Perla "adapter not in advanced mode\n"); 25719aebddd1SJeff Kirsher } 25729aebddd1SJeff Kirsher err: 25739aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 25749aebddd1SJeff Kirsher return status; 25759aebddd1SJeff Kirsher } 2576590c391dSPadmanabh Ratnakar 2577f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2578f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2579f25b119cSPadmanabh Ratnakar u32 domain) 2580f25b119cSPadmanabh Ratnakar { 2581f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2582f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2583f25b119cSPadmanabh Ratnakar int status; 2584f25b119cSPadmanabh Ratnakar 2585f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2586f25b119cSPadmanabh Ratnakar 2587f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2588f25b119cSPadmanabh Ratnakar if (!wrb) { 2589f25b119cSPadmanabh Ratnakar status = -EBUSY; 2590f25b119cSPadmanabh Ratnakar goto err; 2591f25b119cSPadmanabh Ratnakar } 2592f25b119cSPadmanabh Ratnakar 2593f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2594f25b119cSPadmanabh Ratnakar 2595f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2596f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2597f25b119cSPadmanabh Ratnakar wrb, NULL); 2598f25b119cSPadmanabh Ratnakar 2599f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2600f25b119cSPadmanabh Ratnakar 2601f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2602f25b119cSPadmanabh Ratnakar if (!status) { 2603f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2604f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2605f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 2606f25b119cSPadmanabh Ratnakar } 2607f25b119cSPadmanabh Ratnakar 2608f25b119cSPadmanabh Ratnakar err: 2609f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2610f25b119cSPadmanabh Ratnakar return status; 2611f25b119cSPadmanabh Ratnakar } 2612f25b119cSPadmanabh Ratnakar 261304a06028SSathya Perla /* Set privilege(s) for a function */ 261404a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 261504a06028SSathya Perla u32 domain) 261604a06028SSathya Perla { 261704a06028SSathya Perla struct be_mcc_wrb *wrb; 261804a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 261904a06028SSathya Perla int status; 262004a06028SSathya Perla 262104a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 262204a06028SSathya Perla 262304a06028SSathya Perla wrb = wrb_from_mccq(adapter); 262404a06028SSathya Perla if (!wrb) { 262504a06028SSathya Perla status = -EBUSY; 262604a06028SSathya Perla goto err; 262704a06028SSathya Perla } 262804a06028SSathya Perla 262904a06028SSathya Perla req = embedded_payload(wrb); 263004a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 263104a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 263204a06028SSathya Perla wrb, NULL); 263304a06028SSathya Perla req->hdr.domain = domain; 263404a06028SSathya Perla if (lancer_chip(adapter)) 263504a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 263604a06028SSathya Perla else 263704a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 263804a06028SSathya Perla 263904a06028SSathya Perla status = be_mcc_notify_wait(adapter); 264004a06028SSathya Perla err: 264104a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 264204a06028SSathya Perla return status; 264304a06028SSathya Perla } 264404a06028SSathya Perla 26455a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 26465a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 26475a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 26485a712c13SSathya Perla */ 26491578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 26505a712c13SSathya Perla bool *pmac_id_valid, u32 *pmac_id, u8 domain) 2651590c391dSPadmanabh Ratnakar { 2652590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2653590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2654590c391dSPadmanabh Ratnakar int status; 2655590c391dSPadmanabh Ratnakar int mac_count; 2656e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2657e5e1ee89SPadmanabh Ratnakar int i; 2658e5e1ee89SPadmanabh Ratnakar 2659e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2660e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2661e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2662e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2663e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2664e5e1ee89SPadmanabh Ratnakar 2665e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2666e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2667e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2668e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2669e5e1ee89SPadmanabh Ratnakar } 2670590c391dSPadmanabh Ratnakar 2671590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2672590c391dSPadmanabh Ratnakar 2673590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2674590c391dSPadmanabh Ratnakar if (!wrb) { 2675590c391dSPadmanabh Ratnakar status = -EBUSY; 2676e5e1ee89SPadmanabh Ratnakar goto out; 2677590c391dSPadmanabh Ratnakar } 2678e5e1ee89SPadmanabh Ratnakar 2679e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2680590c391dSPadmanabh Ratnakar 2681590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2682bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2683bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2684590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2685e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 26865a712c13SSathya Perla if (*pmac_id_valid) { 26875a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 26885a712c13SSathya Perla req->iface_id = cpu_to_le16(adapter->if_handle); 26895a712c13SSathya Perla req->perm_override = 0; 26905a712c13SSathya Perla } else { 2691e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 26925a712c13SSathya Perla } 2693590c391dSPadmanabh Ratnakar 2694590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2695590c391dSPadmanabh Ratnakar if (!status) { 2696590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2697e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 26985a712c13SSathya Perla 26995a712c13SSathya Perla if (*pmac_id_valid) { 27005a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 27015a712c13SSathya Perla ETH_ALEN); 27025a712c13SSathya Perla goto out; 27035a712c13SSathya Perla } 27045a712c13SSathya Perla 2705e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2706e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 27071578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 27081578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 27091578e777SPadmanabh Ratnakar * found. 2710e5e1ee89SPadmanabh Ratnakar */ 2711590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2712e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2713e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2714e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2715e5e1ee89SPadmanabh Ratnakar 2716e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2717e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2718e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2719e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2720e5e1ee89SPadmanabh Ratnakar */ 2721e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 27225a712c13SSathya Perla *pmac_id_valid = true; 2723e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2724e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2725e5e1ee89SPadmanabh Ratnakar goto out; 2726590c391dSPadmanabh Ratnakar } 2727590c391dSPadmanabh Ratnakar } 27281578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 27295a712c13SSathya Perla *pmac_id_valid = false; 2730e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2731e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2732590c391dSPadmanabh Ratnakar } 2733590c391dSPadmanabh Ratnakar 2734e5e1ee89SPadmanabh Ratnakar out: 2735590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2736e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2737e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2738590c391dSPadmanabh Ratnakar return status; 2739590c391dSPadmanabh Ratnakar } 2740590c391dSPadmanabh Ratnakar 27415a712c13SSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac) 27425a712c13SSathya Perla { 27435a712c13SSathya Perla int status; 27445a712c13SSathya Perla bool active = true; 27455a712c13SSathya Perla 27465a712c13SSathya Perla /* When SH FW is ready, SH should use Lancer path too */ 27475a712c13SSathya Perla if (lancer_chip(adapter)) { 27485a712c13SSathya Perla /* Fetch the MAC address using pmac_id */ 27495a712c13SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &active, 27505a712c13SSathya Perla &curr_pmac_id, 0); 27515a712c13SSathya Perla return status; 27525a712c13SSathya Perla } else { 27535a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 27545a712c13SSathya Perla adapter->if_handle, curr_pmac_id); 27555a712c13SSathya Perla } 27565a712c13SSathya Perla } 27575a712c13SSathya Perla 275895046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 275995046b92SSathya Perla { 276095046b92SSathya Perla int status; 276195046b92SSathya Perla bool pmac_valid = false; 276295046b92SSathya Perla 276395046b92SSathya Perla memset(mac, 0, ETH_ALEN); 276495046b92SSathya Perla 276595046b92SSathya Perla if (lancer_chip(adapter)) 276695046b92SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 276795046b92SSathya Perla NULL, 0); 276895046b92SSathya Perla else if (be_physfn(adapter)) 276995046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 0); 277095046b92SSathya Perla else 277195046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 277295046b92SSathya Perla adapter->if_handle, 0); 277395046b92SSathya Perla return status; 277495046b92SSathya Perla } 277595046b92SSathya Perla 2776590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2777590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2778590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2779590c391dSPadmanabh Ratnakar { 2780590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2781590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2782590c391dSPadmanabh Ratnakar int status; 2783590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2784590c391dSPadmanabh Ratnakar 2785590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2786590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2787590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2788590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2789d0320f75SJoe Perches if (!cmd.va) 2790590c391dSPadmanabh Ratnakar return -ENOMEM; 2791590c391dSPadmanabh Ratnakar 2792590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2793590c391dSPadmanabh Ratnakar 2794590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2795590c391dSPadmanabh Ratnakar if (!wrb) { 2796590c391dSPadmanabh Ratnakar status = -EBUSY; 2797590c391dSPadmanabh Ratnakar goto err; 2798590c391dSPadmanabh Ratnakar } 2799590c391dSPadmanabh Ratnakar 2800590c391dSPadmanabh Ratnakar req = cmd.va; 2801590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2802590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2803590c391dSPadmanabh Ratnakar wrb, &cmd); 2804590c391dSPadmanabh Ratnakar 2805590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2806590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2807590c391dSPadmanabh Ratnakar if (mac_count) 2808590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2809590c391dSPadmanabh Ratnakar 2810590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2811590c391dSPadmanabh Ratnakar 2812590c391dSPadmanabh Ratnakar err: 2813590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2814590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2815590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2816590c391dSPadmanabh Ratnakar return status; 2817590c391dSPadmanabh Ratnakar } 28184762f6ceSAjit Khaparde 2819f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2820f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2821f1f3ee1bSAjit Khaparde { 2822f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2823f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2824f1f3ee1bSAjit Khaparde void *ctxt; 2825f1f3ee1bSAjit Khaparde int status; 2826f1f3ee1bSAjit Khaparde 2827f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2828f1f3ee1bSAjit Khaparde 2829f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2830f1f3ee1bSAjit Khaparde if (!wrb) { 2831f1f3ee1bSAjit Khaparde status = -EBUSY; 2832f1f3ee1bSAjit Khaparde goto err; 2833f1f3ee1bSAjit Khaparde } 2834f1f3ee1bSAjit Khaparde 2835f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2836f1f3ee1bSAjit Khaparde ctxt = &req->context; 2837f1f3ee1bSAjit Khaparde 2838f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2839f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2840f1f3ee1bSAjit Khaparde 2841f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2842f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2843f1f3ee1bSAjit Khaparde if (pvid) { 2844f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2845f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2846f1f3ee1bSAjit Khaparde } 2847f1f3ee1bSAjit Khaparde 2848f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2849f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2850f1f3ee1bSAjit Khaparde 2851f1f3ee1bSAjit Khaparde err: 2852f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2853f1f3ee1bSAjit Khaparde return status; 2854f1f3ee1bSAjit Khaparde } 2855f1f3ee1bSAjit Khaparde 2856f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2857f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2858f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2859f1f3ee1bSAjit Khaparde { 2860f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2861f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2862f1f3ee1bSAjit Khaparde void *ctxt; 2863f1f3ee1bSAjit Khaparde int status; 2864f1f3ee1bSAjit Khaparde u16 vid; 2865f1f3ee1bSAjit Khaparde 2866f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2867f1f3ee1bSAjit Khaparde 2868f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2869f1f3ee1bSAjit Khaparde if (!wrb) { 2870f1f3ee1bSAjit Khaparde status = -EBUSY; 2871f1f3ee1bSAjit Khaparde goto err; 2872f1f3ee1bSAjit Khaparde } 2873f1f3ee1bSAjit Khaparde 2874f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2875f1f3ee1bSAjit Khaparde ctxt = &req->context; 2876f1f3ee1bSAjit Khaparde 2877f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2878f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2879f1f3ee1bSAjit Khaparde 2880f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2881f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, ctxt, 2882f1f3ee1bSAjit Khaparde intf_id); 2883f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2884f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2885f1f3ee1bSAjit Khaparde 2886f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2887f1f3ee1bSAjit Khaparde if (!status) { 2888f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 2889f1f3ee1bSAjit Khaparde embedded_payload(wrb); 2890f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 2891f1f3ee1bSAjit Khaparde sizeof(resp->context)); 2892f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2893f1f3ee1bSAjit Khaparde pvid, &resp->context); 2894f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 2895f1f3ee1bSAjit Khaparde } 2896f1f3ee1bSAjit Khaparde 2897f1f3ee1bSAjit Khaparde err: 2898f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2899f1f3ee1bSAjit Khaparde return status; 2900f1f3ee1bSAjit Khaparde } 2901f1f3ee1bSAjit Khaparde 29024762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 29034762f6ceSAjit Khaparde { 29044762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 29054762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 29064762f6ceSAjit Khaparde int status; 29074762f6ceSAjit Khaparde int payload_len = sizeof(*req); 29084762f6ceSAjit Khaparde struct be_dma_mem cmd; 29094762f6ceSAjit Khaparde 2910f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 2911f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 2912f25b119cSPadmanabh Ratnakar return -EPERM; 2913f25b119cSPadmanabh Ratnakar 2914d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2915d98ef50fSSuresh Reddy return -1; 2916d98ef50fSSuresh Reddy 29174762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 29184762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 29194762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 29204762f6ceSAjit Khaparde &cmd.dma); 29214762f6ceSAjit Khaparde if (!cmd.va) { 29224762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 29234762f6ceSAjit Khaparde "Memory allocation failure\n"); 2924d98ef50fSSuresh Reddy status = -ENOMEM; 2925d98ef50fSSuresh Reddy goto err; 29264762f6ceSAjit Khaparde } 29274762f6ceSAjit Khaparde 29284762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 29294762f6ceSAjit Khaparde if (!wrb) { 29304762f6ceSAjit Khaparde status = -EBUSY; 29314762f6ceSAjit Khaparde goto err; 29324762f6ceSAjit Khaparde } 29334762f6ceSAjit Khaparde 29344762f6ceSAjit Khaparde req = cmd.va; 29354762f6ceSAjit Khaparde 29364762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 29374762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 29384762f6ceSAjit Khaparde payload_len, wrb, &cmd); 29394762f6ceSAjit Khaparde 29404762f6ceSAjit Khaparde req->hdr.version = 1; 29414762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 29424762f6ceSAjit Khaparde 29434762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 29444762f6ceSAjit Khaparde if (!status) { 29454762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 29464762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 29474762f6ceSAjit Khaparde 29484762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 29494762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 29504762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 29514762f6ceSAjit Khaparde status = -1; 29524762f6ceSAjit Khaparde goto err; 29534762f6ceSAjit Khaparde } 29544762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 29554762f6ceSAjit Khaparde } 29564762f6ceSAjit Khaparde err: 29574762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 2958d98ef50fSSuresh Reddy if (cmd.va) 29594762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 29604762f6ceSAjit Khaparde return status; 2961941a77d5SSomnath Kotur 2962941a77d5SSomnath Kotur } 2963941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 2964941a77d5SSomnath Kotur struct be_dma_mem *cmd) 2965941a77d5SSomnath Kotur { 2966941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 2967941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 2968941a77d5SSomnath Kotur int status; 2969941a77d5SSomnath Kotur 2970941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 2971941a77d5SSomnath Kotur return -1; 2972941a77d5SSomnath Kotur 2973941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 2974941a77d5SSomnath Kotur if (!wrb) { 2975941a77d5SSomnath Kotur status = -EBUSY; 2976941a77d5SSomnath Kotur goto err; 2977941a77d5SSomnath Kotur } 2978941a77d5SSomnath Kotur 2979941a77d5SSomnath Kotur req = cmd->va; 2980941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2981941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 2982941a77d5SSomnath Kotur cmd->size, wrb, cmd); 2983941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 2984941a77d5SSomnath Kotur 2985941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 2986941a77d5SSomnath Kotur err: 2987941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 2988941a77d5SSomnath Kotur return status; 2989941a77d5SSomnath Kotur } 2990941a77d5SSomnath Kotur 2991941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 2992941a77d5SSomnath Kotur struct be_dma_mem *cmd, 2993941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 2994941a77d5SSomnath Kotur { 2995941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 2996941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 2997941a77d5SSomnath Kotur int status; 2998941a77d5SSomnath Kotur 2999941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3000941a77d5SSomnath Kotur 3001941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3002941a77d5SSomnath Kotur if (!wrb) { 3003941a77d5SSomnath Kotur status = -EBUSY; 3004941a77d5SSomnath Kotur goto err; 3005941a77d5SSomnath Kotur } 3006941a77d5SSomnath Kotur 3007941a77d5SSomnath Kotur req = cmd->va; 3008941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3009941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3010941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3011941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3012941a77d5SSomnath Kotur 3013941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3014941a77d5SSomnath Kotur err: 3015941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3016941a77d5SSomnath Kotur return status; 30174762f6ceSAjit Khaparde } 30186a4ab669SParav Pandit 3019b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3020b4e32a71SPadmanabh Ratnakar { 3021b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3022b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3023b4e32a71SPadmanabh Ratnakar int status; 3024b4e32a71SPadmanabh Ratnakar 3025b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3026b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3027b4e32a71SPadmanabh Ratnakar return 0; 3028b4e32a71SPadmanabh Ratnakar } 3029b4e32a71SPadmanabh Ratnakar 3030b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3031b4e32a71SPadmanabh Ratnakar 3032b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3033b4e32a71SPadmanabh Ratnakar if (!wrb) { 3034b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3035b4e32a71SPadmanabh Ratnakar goto err; 3036b4e32a71SPadmanabh Ratnakar } 3037b4e32a71SPadmanabh Ratnakar 3038b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3039b4e32a71SPadmanabh Ratnakar 3040b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3041b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3042b4e32a71SPadmanabh Ratnakar NULL); 3043b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3044b4e32a71SPadmanabh Ratnakar 3045b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3046b4e32a71SPadmanabh Ratnakar if (!status) { 3047b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3048b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3049b4e32a71SPadmanabh Ratnakar } else { 3050b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3051b4e32a71SPadmanabh Ratnakar } 3052b4e32a71SPadmanabh Ratnakar err: 3053b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3054b4e32a71SPadmanabh Ratnakar return status; 3055b4e32a71SPadmanabh Ratnakar } 3056b4e32a71SPadmanabh Ratnakar 3057abb93951SPadmanabh Ratnakar static struct be_nic_resource_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 3058abb93951SPadmanabh Ratnakar u32 max_buf_size) 3059abb93951SPadmanabh Ratnakar { 3060abb93951SPadmanabh Ratnakar struct be_nic_resource_desc *desc = (struct be_nic_resource_desc *)buf; 3061abb93951SPadmanabh Ratnakar int i; 3062abb93951SPadmanabh Ratnakar 3063abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 306428710c55SKalesh AP desc->desc_len = desc->desc_len ? : RESOURCE_DESC_SIZE; 3065abb93951SPadmanabh Ratnakar if (((void *)desc + desc->desc_len) > 3066950e2958SWei Yang (void *)(buf + max_buf_size)) 3067950e2958SWei Yang return NULL; 3068abb93951SPadmanabh Ratnakar 3069a05f99dbSVasundhara Volam if (desc->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3070a05f99dbSVasundhara Volam desc->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3071950e2958SWei Yang return desc; 3072abb93951SPadmanabh Ratnakar 3073abb93951SPadmanabh Ratnakar desc = (void *)desc + desc->desc_len; 3074abb93951SPadmanabh Ratnakar } 3075abb93951SPadmanabh Ratnakar 3076abb93951SPadmanabh Ratnakar return NULL; 3077abb93951SPadmanabh Ratnakar } 3078abb93951SPadmanabh Ratnakar 3079abb93951SPadmanabh Ratnakar /* Uses Mbox */ 3080abb93951SPadmanabh Ratnakar int be_cmd_get_func_config(struct be_adapter *adapter) 3081abb93951SPadmanabh Ratnakar { 3082abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3083abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3084abb93951SPadmanabh Ratnakar int status; 3085abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3086abb93951SPadmanabh Ratnakar 3087d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3088d98ef50fSSuresh Reddy return -1; 3089d98ef50fSSuresh Reddy 3090abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3091abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3092abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3093abb93951SPadmanabh Ratnakar &cmd.dma); 3094abb93951SPadmanabh Ratnakar if (!cmd.va) { 3095abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3096d98ef50fSSuresh Reddy status = -ENOMEM; 3097d98ef50fSSuresh Reddy goto err; 3098abb93951SPadmanabh Ratnakar } 3099abb93951SPadmanabh Ratnakar 3100abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3101abb93951SPadmanabh Ratnakar if (!wrb) { 3102abb93951SPadmanabh Ratnakar status = -EBUSY; 3103abb93951SPadmanabh Ratnakar goto err; 3104abb93951SPadmanabh Ratnakar } 3105abb93951SPadmanabh Ratnakar 3106abb93951SPadmanabh Ratnakar req = cmd.va; 3107abb93951SPadmanabh Ratnakar 3108abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3109abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3110abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3111abb93951SPadmanabh Ratnakar 311228710c55SKalesh AP if (skyhawk_chip(adapter)) 311328710c55SKalesh AP req->hdr.version = 1; 311428710c55SKalesh AP 3115abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3116abb93951SPadmanabh Ratnakar if (!status) { 3117abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3118abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3119abb93951SPadmanabh Ratnakar struct be_nic_resource_desc *desc; 3120abb93951SPadmanabh Ratnakar 3121abb93951SPadmanabh Ratnakar desc = be_get_nic_desc(resp->func_param, desc_count, 3122abb93951SPadmanabh Ratnakar sizeof(resp->func_param)); 3123abb93951SPadmanabh Ratnakar if (!desc) { 3124abb93951SPadmanabh Ratnakar status = -EINVAL; 3125abb93951SPadmanabh Ratnakar goto err; 3126abb93951SPadmanabh Ratnakar } 3127abb93951SPadmanabh Ratnakar 3128d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 3129abb93951SPadmanabh Ratnakar adapter->max_pmac_cnt = le16_to_cpu(desc->unicast_mac_count); 3130abb93951SPadmanabh Ratnakar adapter->max_vlans = le16_to_cpu(desc->vlan_count); 3131abb93951SPadmanabh Ratnakar adapter->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 3132abb93951SPadmanabh Ratnakar adapter->max_tx_queues = le16_to_cpu(desc->txq_count); 3133abb93951SPadmanabh Ratnakar adapter->max_rss_queues = le16_to_cpu(desc->rssq_count); 3134abb93951SPadmanabh Ratnakar adapter->max_rx_queues = le16_to_cpu(desc->rq_count); 3135abb93951SPadmanabh Ratnakar 3136abb93951SPadmanabh Ratnakar adapter->max_event_queues = le16_to_cpu(desc->eq_count); 3137abb93951SPadmanabh Ratnakar adapter->if_cap_flags = le32_to_cpu(desc->cap_flags); 3138abb93951SPadmanabh Ratnakar } 3139abb93951SPadmanabh Ratnakar err: 3140abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3141d98ef50fSSuresh Reddy if (cmd.va) 3142d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3143abb93951SPadmanabh Ratnakar return status; 3144abb93951SPadmanabh Ratnakar } 3145abb93951SPadmanabh Ratnakar 3146a05f99dbSVasundhara Volam /* Uses mbox */ 3147a05f99dbSVasundhara Volam int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3148a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3149abb93951SPadmanabh Ratnakar { 3150abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3151abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3152abb93951SPadmanabh Ratnakar int status; 3153abb93951SPadmanabh Ratnakar 3154a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3155a05f99dbSVasundhara Volam return -1; 3156a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3157a05f99dbSVasundhara Volam 3158a05f99dbSVasundhara Volam req = cmd->va; 3159a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3160a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3161a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3162a05f99dbSVasundhara Volam 3163a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3164a05f99dbSVasundhara Volam req->hdr.domain = domain; 3165a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3166a05f99dbSVasundhara Volam req->hdr.version = 1; 3167a05f99dbSVasundhara Volam 3168a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3169a05f99dbSVasundhara Volam 3170a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3171a05f99dbSVasundhara Volam return status; 3172abb93951SPadmanabh Ratnakar } 3173abb93951SPadmanabh Ratnakar 3174a05f99dbSVasundhara Volam /* Uses sync mcc */ 3175a05f99dbSVasundhara Volam int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3176a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3177a05f99dbSVasundhara Volam { 3178a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3179a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3180a05f99dbSVasundhara Volam int status; 3181a05f99dbSVasundhara Volam 3182abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3183abb93951SPadmanabh Ratnakar 3184abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3185abb93951SPadmanabh Ratnakar if (!wrb) { 3186abb93951SPadmanabh Ratnakar status = -EBUSY; 3187abb93951SPadmanabh Ratnakar goto err; 3188abb93951SPadmanabh Ratnakar } 3189abb93951SPadmanabh Ratnakar 3190a05f99dbSVasundhara Volam req = cmd->va; 3191abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3192abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3193a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3194abb93951SPadmanabh Ratnakar 3195abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3196abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3197a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3198a05f99dbSVasundhara Volam req->hdr.version = 1; 3199abb93951SPadmanabh Ratnakar 3200abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3201a05f99dbSVasundhara Volam 3202a05f99dbSVasundhara Volam err: 3203a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3204a05f99dbSVasundhara Volam return status; 3205a05f99dbSVasundhara Volam } 3206a05f99dbSVasundhara Volam 3207a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 3208a05f99dbSVasundhara Volam int be_cmd_get_profile_config(struct be_adapter *adapter, u32 *cap_flags, 3209a05f99dbSVasundhara Volam u16 *txq_count, u8 domain) 3210a05f99dbSVasundhara Volam { 3211a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3212a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3213a05f99dbSVasundhara Volam int status; 3214a05f99dbSVasundhara Volam 3215a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3216a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3217a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config_v1); 3218a05f99dbSVasundhara Volam else 3219a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3220a05f99dbSVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3221a05f99dbSVasundhara Volam &cmd.dma); 3222a05f99dbSVasundhara Volam if (!cmd.va) { 3223a05f99dbSVasundhara Volam dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3224a05f99dbSVasundhara Volam return -ENOMEM; 3225a05f99dbSVasundhara Volam } 3226a05f99dbSVasundhara Volam 3227a05f99dbSVasundhara Volam if (!mccq->created) 3228a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3229a05f99dbSVasundhara Volam else 3230a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3231abb93951SPadmanabh Ratnakar if (!status) { 3232abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_profile_config *resp = cmd.va; 3233abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3234abb93951SPadmanabh Ratnakar struct be_nic_resource_desc *desc; 3235abb93951SPadmanabh Ratnakar 3236abb93951SPadmanabh Ratnakar desc = be_get_nic_desc(resp->func_param, desc_count, 3237abb93951SPadmanabh Ratnakar sizeof(resp->func_param)); 3238abb93951SPadmanabh Ratnakar 3239abb93951SPadmanabh Ratnakar if (!desc) { 3240abb93951SPadmanabh Ratnakar status = -EINVAL; 3241abb93951SPadmanabh Ratnakar goto err; 3242abb93951SPadmanabh Ratnakar } 3243a05f99dbSVasundhara Volam if (cap_flags) 3244abb93951SPadmanabh Ratnakar *cap_flags = le32_to_cpu(desc->cap_flags); 3245a05f99dbSVasundhara Volam if (txq_count) 3246a05f99dbSVasundhara Volam *txq_count = le32_to_cpu(desc->txq_count); 3247abb93951SPadmanabh Ratnakar } 3248abb93951SPadmanabh Ratnakar err: 3249a05f99dbSVasundhara Volam if (cmd.va) 3250abb93951SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, cmd.size, 3251abb93951SPadmanabh Ratnakar cmd.va, cmd.dma); 3252abb93951SPadmanabh Ratnakar return status; 3253abb93951SPadmanabh Ratnakar } 3254abb93951SPadmanabh Ratnakar 3255d5c18473SPadmanabh Ratnakar /* Uses sync mcc */ 3256d5c18473SPadmanabh Ratnakar int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, 3257d5c18473SPadmanabh Ratnakar u8 domain) 3258d5c18473SPadmanabh Ratnakar { 3259d5c18473SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3260d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3261d5c18473SPadmanabh Ratnakar int status; 3262d5c18473SPadmanabh Ratnakar 3263d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3264d5c18473SPadmanabh Ratnakar 3265d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3266d5c18473SPadmanabh Ratnakar if (!wrb) { 3267d5c18473SPadmanabh Ratnakar status = -EBUSY; 3268d5c18473SPadmanabh Ratnakar goto err; 3269d5c18473SPadmanabh Ratnakar } 3270d5c18473SPadmanabh Ratnakar 3271d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3272d5c18473SPadmanabh Ratnakar 3273d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3274d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3275d5c18473SPadmanabh Ratnakar wrb, NULL); 3276d5c18473SPadmanabh Ratnakar 3277d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3278d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3279d5c18473SPadmanabh Ratnakar 3280a05f99dbSVasundhara Volam req->nic_desc.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3281d5c18473SPadmanabh Ratnakar req->nic_desc.desc_len = RESOURCE_DESC_SIZE; 3282d5c18473SPadmanabh Ratnakar req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV); 3283d5c18473SPadmanabh Ratnakar req->nic_desc.pf_num = adapter->pf_number; 3284d5c18473SPadmanabh Ratnakar req->nic_desc.vf_num = domain; 3285d5c18473SPadmanabh Ratnakar 3286d5c18473SPadmanabh Ratnakar /* Mark fields invalid */ 3287d5c18473SPadmanabh Ratnakar req->nic_desc.unicast_mac_count = 0xFFFF; 3288d5c18473SPadmanabh Ratnakar req->nic_desc.mcc_count = 0xFFFF; 3289d5c18473SPadmanabh Ratnakar req->nic_desc.vlan_count = 0xFFFF; 3290d5c18473SPadmanabh Ratnakar req->nic_desc.mcast_mac_count = 0xFFFF; 3291d5c18473SPadmanabh Ratnakar req->nic_desc.txq_count = 0xFFFF; 3292d5c18473SPadmanabh Ratnakar req->nic_desc.rq_count = 0xFFFF; 3293d5c18473SPadmanabh Ratnakar req->nic_desc.rssq_count = 0xFFFF; 3294d5c18473SPadmanabh Ratnakar req->nic_desc.lro_count = 0xFFFF; 3295d5c18473SPadmanabh Ratnakar req->nic_desc.cq_count = 0xFFFF; 3296d5c18473SPadmanabh Ratnakar req->nic_desc.toe_conn_count = 0xFFFF; 3297d5c18473SPadmanabh Ratnakar req->nic_desc.eq_count = 0xFFFF; 3298d5c18473SPadmanabh Ratnakar req->nic_desc.link_param = 0xFF; 3299d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = 0xFFFFFFFF; 3300d5c18473SPadmanabh Ratnakar req->nic_desc.acpi_params = 0xFF; 3301d5c18473SPadmanabh Ratnakar req->nic_desc.wol_param = 0x0F; 3302d5c18473SPadmanabh Ratnakar 3303d5c18473SPadmanabh Ratnakar /* Change BW */ 3304d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = cpu_to_le32(bps); 3305d5c18473SPadmanabh Ratnakar req->nic_desc.bw_max = cpu_to_le32(bps); 3306d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3307d5c18473SPadmanabh Ratnakar err: 3308d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3309d5c18473SPadmanabh Ratnakar return status; 3310d5c18473SPadmanabh Ratnakar } 3311d5c18473SPadmanabh Ratnakar 33124c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 33134c876616SSathya Perla int vf_num) 33144c876616SSathya Perla { 33154c876616SSathya Perla struct be_mcc_wrb *wrb; 33164c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 33174c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 33184c876616SSathya Perla int status; 33194c876616SSathya Perla 33204c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 33214c876616SSathya Perla 33224c876616SSathya Perla wrb = wrb_from_mccq(adapter); 33234c876616SSathya Perla if (!wrb) { 33244c876616SSathya Perla status = -EBUSY; 33254c876616SSathya Perla goto err; 33264c876616SSathya Perla } 33274c876616SSathya Perla req = embedded_payload(wrb); 33284c876616SSathya Perla 33294c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 33304c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 33314c876616SSathya Perla wrb, NULL); 33324c876616SSathya Perla req->hdr.domain = vf_num + 1; 33334c876616SSathya Perla 33344c876616SSathya Perla status = be_mcc_notify_wait(adapter); 33354c876616SSathya Perla if (!status) { 33364c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 33374c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 33384c876616SSathya Perla } 33394c876616SSathya Perla 33404c876616SSathya Perla err: 33414c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 33424c876616SSathya Perla return status; 33434c876616SSathya Perla } 33444c876616SSathya Perla 33455c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 33465c510811SSomnath Kotur { 33475c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 33485c510811SSomnath Kotur u32 reg_val; 33495c510811SSomnath Kotur int status = 0, i; 33505c510811SSomnath Kotur 33515c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 33525c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 33535c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 33545c510811SSomnath Kotur break; 33555c510811SSomnath Kotur 33565c510811SSomnath Kotur ssleep(1); 33575c510811SSomnath Kotur } 33585c510811SSomnath Kotur 33595c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 33605c510811SSomnath Kotur status = -1; 33615c510811SSomnath Kotur 33625c510811SSomnath Kotur return status; 33635c510811SSomnath Kotur } 33645c510811SSomnath Kotur 33655c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 33665c510811SSomnath Kotur { 33675c510811SSomnath Kotur int status = 0; 33685c510811SSomnath Kotur 33695c510811SSomnath Kotur status = lancer_wait_idle(adapter); 33705c510811SSomnath Kotur if (status) 33715c510811SSomnath Kotur return status; 33725c510811SSomnath Kotur 33735c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 33745c510811SSomnath Kotur 33755c510811SSomnath Kotur return status; 33765c510811SSomnath Kotur } 33775c510811SSomnath Kotur 33785c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 33795c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 33805c510811SSomnath Kotur { 33815c510811SSomnath Kotur u32 sliport_status = 0; 33825c510811SSomnath Kotur 33835c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 33845c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 33855c510811SSomnath Kotur } 33865c510811SSomnath Kotur 33875c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 33885c510811SSomnath Kotur { 33895c510811SSomnath Kotur int status; 33905c510811SSomnath Kotur 33915c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 33925c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 33935c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 33945c510811SSomnath Kotur if (status < 0) { 33955c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 33965c510811SSomnath Kotur return status; 33975c510811SSomnath Kotur } 33985c510811SSomnath Kotur 33995c510811SSomnath Kotur status = lancer_wait_idle(adapter); 34005c510811SSomnath Kotur if (status) 34015c510811SSomnath Kotur return status; 34025c510811SSomnath Kotur 34035c510811SSomnath Kotur if (!dump_present(adapter)) { 34045c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 34055c510811SSomnath Kotur return -1; 34065c510811SSomnath Kotur } 34075c510811SSomnath Kotur 34085c510811SSomnath Kotur return 0; 34095c510811SSomnath Kotur } 34105c510811SSomnath Kotur 3411dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3412dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3413dcf7ebbaSPadmanabh Ratnakar { 3414dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3415dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3416dcf7ebbaSPadmanabh Ratnakar int status; 3417dcf7ebbaSPadmanabh Ratnakar 3418dcf7ebbaSPadmanabh Ratnakar if (!lancer_chip(adapter)) 3419dcf7ebbaSPadmanabh Ratnakar return 0; 3420dcf7ebbaSPadmanabh Ratnakar 3421dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3422dcf7ebbaSPadmanabh Ratnakar 3423dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3424dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3425dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3426dcf7ebbaSPadmanabh Ratnakar goto err; 3427dcf7ebbaSPadmanabh Ratnakar } 3428dcf7ebbaSPadmanabh Ratnakar 3429dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3430dcf7ebbaSPadmanabh Ratnakar 3431dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3432dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3433dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3434dcf7ebbaSPadmanabh Ratnakar 3435dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3436dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3437dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3438dcf7ebbaSPadmanabh Ratnakar err: 3439dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3440dcf7ebbaSPadmanabh Ratnakar return status; 3441dcf7ebbaSPadmanabh Ratnakar } 3442dcf7ebbaSPadmanabh Ratnakar 344368c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 344468c45a2dSSomnath Kotur { 344568c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 344668c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 344768c45a2dSSomnath Kotur int status; 344868c45a2dSSomnath Kotur 344968c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 345068c45a2dSSomnath Kotur return -1; 345168c45a2dSSomnath Kotur 345268c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 345368c45a2dSSomnath Kotur 345468c45a2dSSomnath Kotur req = embedded_payload(wrb); 345568c45a2dSSomnath Kotur 345668c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 345768c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 345868c45a2dSSomnath Kotur wrb, NULL); 345968c45a2dSSomnath Kotur 346068c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 346168c45a2dSSomnath Kotur 346268c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 346368c45a2dSSomnath Kotur 346468c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 346568c45a2dSSomnath Kotur return status; 346668c45a2dSSomnath Kotur } 346768c45a2dSSomnath Kotur 34686a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 34696a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 34706a4ab669SParav Pandit { 34716a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 34726a4ab669SParav Pandit struct be_mcc_wrb *wrb; 34736a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 34746a4ab669SParav Pandit struct be_cmd_req_hdr *req; 34756a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 34766a4ab669SParav Pandit int status; 34776a4ab669SParav Pandit 34786a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 34796a4ab669SParav Pandit 34806a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 34816a4ab669SParav Pandit if (!wrb) { 34826a4ab669SParav Pandit status = -EBUSY; 34836a4ab669SParav Pandit goto err; 34846a4ab669SParav Pandit } 34856a4ab669SParav Pandit req = embedded_payload(wrb); 34866a4ab669SParav Pandit resp = embedded_payload(wrb); 34876a4ab669SParav Pandit 34886a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 34896a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 34906a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 34916a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 34926a4ab669SParav Pandit 34936a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 34946a4ab669SParav Pandit if (cmd_status) 34956a4ab669SParav Pandit *cmd_status = (status & 0xffff); 34966a4ab669SParav Pandit if (ext_status) 34976a4ab669SParav Pandit *ext_status = 0; 34986a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 34996a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 35006a4ab669SParav Pandit err: 35016a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 35026a4ab669SParav Pandit return status; 35036a4ab669SParav Pandit } 35046a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3505