19aebddd1SJeff Kirsher /* 27dfbe7d7SSomnath Kotur * Copyright (C) 2005 - 2016 Broadcom 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22262c9740SHernán Gonzalez const char * const be_misconfig_evt_port_state[] = { 2351d1f98aSAjit Khaparde "Physical Link is functional", 2451d1f98aSAjit Khaparde "Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replace.", 2551d1f98aSAjit Khaparde "Optics of two types installed – Remove one optic or install matching pair of optics.", 2651d1f98aSAjit Khaparde "Incompatible optics – Replace with compatible optics for card to function.", 2751d1f98aSAjit Khaparde "Unqualified optics – Replace with Avago optics for Warranty and Technical Support.", 2851d1f98aSAjit Khaparde "Uncertified optics – Replace with Avago-certified optics to enable link operation." 2921252377SVasundhara Volam }; 3021252377SVasundhara Volam 3151d1f98aSAjit Khaparde static char *be_port_misconfig_evt_severity[] = { 3251d1f98aSAjit Khaparde "KERN_WARN", 3351d1f98aSAjit Khaparde "KERN_INFO", 3451d1f98aSAjit Khaparde "KERN_ERR", 3551d1f98aSAjit Khaparde "KERN_WARN" 3651d1f98aSAjit Khaparde }; 3751d1f98aSAjit Khaparde 3851d1f98aSAjit Khaparde static char *phy_state_oper_desc[] = { 3951d1f98aSAjit Khaparde "Link is non-operational", 4051d1f98aSAjit Khaparde "Link is operational", 4121252377SVasundhara Volam "" 4221252377SVasundhara Volam }; 4321252377SVasundhara Volam 44f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 45f25b119cSPadmanabh Ratnakar { 46f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 47f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 48f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 49f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 50f25b119cSPadmanabh Ratnakar }, 51f25b119cSPadmanabh Ratnakar { 52f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 53f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 54f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 55f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 56f25b119cSPadmanabh Ratnakar }, 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 59f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 60f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 61f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 62f25b119cSPadmanabh Ratnakar }, 63f25b119cSPadmanabh Ratnakar { 64f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 65f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 66f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 67f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 68f25b119cSPadmanabh Ratnakar }, 69f25b119cSPadmanabh Ratnakar { 70f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 71f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 72f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 73f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 742e365b1bSSomnath Kotur }, 752e365b1bSSomnath Kotur { 762e365b1bSSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, 772e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 782e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 792e365b1bSSomnath Kotur }, 802e365b1bSSomnath Kotur { 812e365b1bSSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, 822e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 832e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 842e365b1bSSomnath Kotur }, 852e365b1bSSomnath Kotur { 862e365b1bSSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 872e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 882e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 892e365b1bSSomnath Kotur }, 90884476beSSomnath Kotur { 91884476beSSomnath Kotur OPCODE_COMMON_SET_HSW_CONFIG, 92884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON, 93d14584d9SVenkat Duvvuru BE_PRIV_DEVCFG | BE_PRIV_VHADM | 94d14584d9SVenkat Duvvuru BE_PRIV_DEVSEC 95884476beSSomnath Kotur }, 9662259ac4SSomnath Kotur { 9762259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 9862259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON, 9962259ac4SSomnath Kotur BE_PRIV_DEVCFG 10062259ac4SSomnath Kotur } 101f25b119cSPadmanabh Ratnakar }; 102f25b119cSPadmanabh Ratnakar 103a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 104f25b119cSPadmanabh Ratnakar { 105f25b119cSPadmanabh Ratnakar int i; 1062b1eaa66SColin Ian King int num_entries = ARRAY_SIZE(cmd_priv_map); 107f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 108f25b119cSPadmanabh Ratnakar 109f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 110f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 111f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 112f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 113f25b119cSPadmanabh Ratnakar return false; 114f25b119cSPadmanabh Ratnakar 115f25b119cSPadmanabh Ratnakar return true; 116f25b119cSPadmanabh Ratnakar } 117f25b119cSPadmanabh Ratnakar 1183de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 1193de09455SSomnath Kotur { 1203de09455SSomnath Kotur return wrb->payload.embedded_payload; 1213de09455SSomnath Kotur } 1229aebddd1SJeff Kirsher 123efaa408eSSuresh Reddy static int be_mcc_notify(struct be_adapter *adapter) 1249aebddd1SJeff Kirsher { 1259aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 1269aebddd1SJeff Kirsher u32 val = 0; 1279aebddd1SJeff Kirsher 128954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 129efaa408eSSuresh Reddy return -EIO; 1309aebddd1SJeff Kirsher 1319aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 1329aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher wmb(); 1359aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 136efaa408eSSuresh Reddy 137efaa408eSSuresh Reddy return 0; 1389aebddd1SJeff Kirsher } 1399aebddd1SJeff Kirsher 1409aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 1419aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 1429aebddd1SJeff Kirsher * little endian) */ 1439aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 1449aebddd1SJeff Kirsher { 1459e9ff4b7SSathya Perla u32 flags; 1469e9ff4b7SSathya Perla 1479aebddd1SJeff Kirsher if (compl->flags != 0) { 1489e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1499e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1509e9ff4b7SSathya Perla compl->flags = flags; 1519aebddd1SJeff Kirsher return true; 1529aebddd1SJeff Kirsher } 1539aebddd1SJeff Kirsher } 1549e9ff4b7SSathya Perla return false; 1559e9ff4b7SSathya Perla } 1569aebddd1SJeff Kirsher 1579aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1589aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1599aebddd1SJeff Kirsher { 1609aebddd1SJeff Kirsher compl->flags = 0; 1619aebddd1SJeff Kirsher } 1629aebddd1SJeff Kirsher 163652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 164652bf646SPadmanabh Ratnakar { 165652bf646SPadmanabh Ratnakar unsigned long addr; 166652bf646SPadmanabh Ratnakar 167652bf646SPadmanabh Ratnakar addr = tag1; 168652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 169652bf646SPadmanabh Ratnakar return (void *)addr; 170652bf646SPadmanabh Ratnakar } 171652bf646SPadmanabh Ratnakar 1724c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1734c60005fSKalesh AP { 1744c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1754c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1764c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 17777be8c1cSKalesh AP addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS || 1784c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1794c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1804c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1814c60005fSKalesh AP return true; 1824c60005fSKalesh AP else 1834c60005fSKalesh AP return false; 1844c60005fSKalesh AP } 1854c60005fSKalesh AP 186559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 187559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 188559b633fSSathya Perla */ 189559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 190559b633fSSathya Perla struct be_mcc_compl *compl, 191559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 192559b633fSSathya Perla { 193559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 194559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 195559b633fSSathya Perla 196559b633fSSathya Perla if (resp_hdr) { 197559b633fSSathya Perla opcode = resp_hdr->opcode; 198559b633fSSathya Perla subsystem = resp_hdr->subsystem; 199559b633fSSathya Perla } 200559b633fSSathya Perla 201559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 202559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 203559b633fSSathya Perla complete(&adapter->et_cmd_compl); 204559b633fSSathya Perla return; 205559b633fSSathya Perla } 206559b633fSSathya Perla 2079c855975SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE && 2089c855975SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 2099c855975SSuresh Reddy complete(&adapter->et_cmd_compl); 2109c855975SSuresh Reddy return; 2119c855975SSuresh Reddy } 2129c855975SSuresh Reddy 213559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 214559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 215559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 216559b633fSSathya Perla adapter->flash_status = compl->status; 217559b633fSSathya Perla complete(&adapter->et_cmd_compl); 218559b633fSSathya Perla return; 219559b633fSSathya Perla } 220559b633fSSathya Perla 221559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 222559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 223559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 224559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 225559b633fSSathya Perla be_parse_stats(adapter); 226559b633fSSathya Perla adapter->stats_cmd_sent = false; 227559b633fSSathya Perla return; 228559b633fSSathya Perla } 229559b633fSSathya Perla 230559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 231559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 232559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 233559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 234559b633fSSathya Perla (void *)resp_hdr; 23529e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 236559b633fSSathya Perla resp->on_die_temperature; 237559b633fSSathya Perla } else { 238559b633fSSathya Perla adapter->be_get_temp_freq = 0; 23929e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 24029e9122bSVenkata Duvvuru BE_INVALID_DIE_TEMP; 241559b633fSSathya Perla } 242559b633fSSathya Perla return; 243559b633fSSathya Perla } 244559b633fSSathya Perla } 245559b633fSSathya Perla 2469aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 2479aebddd1SJeff Kirsher struct be_mcc_compl *compl) 2489aebddd1SJeff Kirsher { 2494c60005fSKalesh AP enum mcc_base_status base_status; 2504c60005fSKalesh AP enum mcc_addl_status addl_status; 251652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 252652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 2539aebddd1SJeff Kirsher 2549aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 2559aebddd1SJeff Kirsher * from mcc_wrb */ 2569aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 2579aebddd1SJeff Kirsher 2584c60005fSKalesh AP base_status = base_status(compl->status); 2594c60005fSKalesh AP addl_status = addl_status(compl->status); 26096c9b2e4SVasundhara Volam 261652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 262652bf646SPadmanabh Ratnakar if (resp_hdr) { 263652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 264652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 265652bf646SPadmanabh Ratnakar } 266652bf646SPadmanabh Ratnakar 267559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2685eeff635SSuresh Reddy 269559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 270559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 271fa5c867dSSuresh Reddy if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST || 272fa5c867dSSuresh Reddy addl_status == MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES) { 27397f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 274522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 27597f1d8cdSVasundhara Volam opcode, subsystem); 2769aebddd1SJeff Kirsher } else { 27797f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 27897f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2794c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2809aebddd1SJeff Kirsher } 2819aebddd1SJeff Kirsher } 2824c60005fSKalesh AP return compl->status; 2839aebddd1SJeff Kirsher } 2849aebddd1SJeff Kirsher 2859aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2869aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2873acf19d9SSathya Perla struct be_mcc_compl *compl) 2889aebddd1SJeff Kirsher { 2893acf19d9SSathya Perla struct be_async_event_link_state *evt = 2903acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2913acf19d9SSathya Perla 292b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 29342f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 294b236916aSAjit Khaparde 295bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 296bdce2ad7SSuresh Reddy * notification for physical and logical link. 297bdce2ad7SSuresh Reddy * On other chips just process the logical link 298bdce2ad7SSuresh Reddy * status notification 299bdce2ad7SSuresh Reddy */ 300bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 3012e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 3022e177a5cSPadmanabh Ratnakar return; 3032e177a5cSPadmanabh Ratnakar 304b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 305b236916aSAjit Khaparde * it may not be received in some cases. 306b236916aSAjit Khaparde */ 307b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 308bdce2ad7SSuresh Reddy be_link_status_update(adapter, 309bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 3109aebddd1SJeff Kirsher } 3119aebddd1SJeff Kirsher 31221252377SVasundhara Volam static void be_async_port_misconfig_event_process(struct be_adapter *adapter, 31321252377SVasundhara Volam struct be_mcc_compl *compl) 31421252377SVasundhara Volam { 31521252377SVasundhara Volam struct be_async_event_misconfig_port *evt = 31621252377SVasundhara Volam (struct be_async_event_misconfig_port *)compl; 31751d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word1 = le32_to_cpu(evt->event_data_word1); 31851d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word2 = le32_to_cpu(evt->event_data_word2); 31951d1f98aSAjit Khaparde u8 phy_oper_state = PHY_STATE_OPER_MSG_NONE; 32021252377SVasundhara Volam struct device *dev = &adapter->pdev->dev; 32151d1f98aSAjit Khaparde u8 msg_severity = DEFAULT_MSG_SEVERITY; 32251d1f98aSAjit Khaparde u8 phy_state_info; 32351d1f98aSAjit Khaparde u8 new_phy_state; 32421252377SVasundhara Volam 32551d1f98aSAjit Khaparde new_phy_state = 32651d1f98aSAjit Khaparde (sfp_misconfig_evt_word1 >> (adapter->hba_port_num * 8)) & 0xff; 32721252377SVasundhara Volam 32851d1f98aSAjit Khaparde if (new_phy_state == adapter->phy_state) 32951d1f98aSAjit Khaparde return; 33051d1f98aSAjit Khaparde 33151d1f98aSAjit Khaparde adapter->phy_state = new_phy_state; 33251d1f98aSAjit Khaparde 33351d1f98aSAjit Khaparde /* for older fw that doesn't populate link effect data */ 33451d1f98aSAjit Khaparde if (!sfp_misconfig_evt_word2) 33551d1f98aSAjit Khaparde goto log_message; 33651d1f98aSAjit Khaparde 33751d1f98aSAjit Khaparde phy_state_info = 33851d1f98aSAjit Khaparde (sfp_misconfig_evt_word2 >> (adapter->hba_port_num * 8)) & 0xff; 33951d1f98aSAjit Khaparde 34051d1f98aSAjit Khaparde if (phy_state_info & PHY_STATE_INFO_VALID) { 34151d1f98aSAjit Khaparde msg_severity = (phy_state_info & PHY_STATE_MSG_SEVERITY) >> 1; 34251d1f98aSAjit Khaparde 34351d1f98aSAjit Khaparde if (be_phy_unqualified(new_phy_state)) 34451d1f98aSAjit Khaparde phy_oper_state = (phy_state_info & PHY_STATE_OPER); 34551d1f98aSAjit Khaparde } 34651d1f98aSAjit Khaparde 34751d1f98aSAjit Khaparde log_message: 34821252377SVasundhara Volam /* Log an error message that would allow a user to determine 34921252377SVasundhara Volam * whether the SFPs have an issue 35021252377SVasundhara Volam */ 35151d1f98aSAjit Khaparde if (be_phy_state_unknown(new_phy_state)) 35251d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35351d1f98aSAjit Khaparde "Port %c: Unrecognized Optics state: 0x%x. %s", 35451d1f98aSAjit Khaparde adapter->port_name, 35551d1f98aSAjit Khaparde new_phy_state, 35651d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35751d1f98aSAjit Khaparde else 35851d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35951d1f98aSAjit Khaparde "Port %c: %s %s", 36051d1f98aSAjit Khaparde adapter->port_name, 36151d1f98aSAjit Khaparde be_misconfig_evt_port_state[new_phy_state], 36251d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 36321252377SVasundhara Volam 36451d1f98aSAjit Khaparde /* Log Vendor name and part no. if a misconfigured SFP is detected */ 36551d1f98aSAjit Khaparde if (be_phy_misconfigured(new_phy_state)) 36651d1f98aSAjit Khaparde adapter->flags |= BE_FLAGS_PHY_MISCONFIGURED; 36721252377SVasundhara Volam } 36821252377SVasundhara Volam 3699aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 3709aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 3713acf19d9SSathya Perla struct be_mcc_compl *compl) 3729aebddd1SJeff Kirsher { 3733acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 3743acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 3753acf19d9SSathya Perla 3769aebddd1SJeff Kirsher if (evt->valid) { 3779aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 378fdf81bfbSSathya Perla adapter->recommended_prio_bits = 3799aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 3809aebddd1SJeff Kirsher } 3819aebddd1SJeff Kirsher } 3829aebddd1SJeff Kirsher 383323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 3849aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 3853acf19d9SSathya Perla struct be_mcc_compl *compl) 3869aebddd1SJeff Kirsher { 3873acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 3883acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 3893acf19d9SSathya Perla 390323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 391323ff71eSSathya Perla evt->physical_port == adapter->port_num) 392323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 3939aebddd1SJeff Kirsher } 3949aebddd1SJeff Kirsher 3959aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 3969aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 3973acf19d9SSathya Perla struct be_mcc_compl *compl) 3989aebddd1SJeff Kirsher { 3993acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 4003acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 4013acf19d9SSathya Perla 402bdac85b5SRavikumar Nelavelli if (evt->enabled) { 403939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 404bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 405bdac85b5SRavikumar Nelavelli } else { 4069aebddd1SJeff Kirsher adapter->pvid = 0; 4079aebddd1SJeff Kirsher } 408bdac85b5SRavikumar Nelavelli } 4099aebddd1SJeff Kirsher 410760c295eSVenkata Duvvuru #define MGMT_ENABLE_MASK 0x4 411760c295eSVenkata Duvvuru static void be_async_grp5_fw_control_process(struct be_adapter *adapter, 412760c295eSVenkata Duvvuru struct be_mcc_compl *compl) 413760c295eSVenkata Duvvuru { 414760c295eSVenkata Duvvuru struct be_async_fw_control *evt = (struct be_async_fw_control *)compl; 415760c295eSVenkata Duvvuru u32 evt_dw1 = le32_to_cpu(evt->event_data_word1); 416760c295eSVenkata Duvvuru 417760c295eSVenkata Duvvuru if (evt_dw1 & MGMT_ENABLE_MASK) { 418760c295eSVenkata Duvvuru adapter->flags |= BE_FLAGS_OS2BMC; 419760c295eSVenkata Duvvuru adapter->bmc_filt_mask = le32_to_cpu(evt->event_data_word2); 420760c295eSVenkata Duvvuru } else { 421760c295eSVenkata Duvvuru adapter->flags &= ~BE_FLAGS_OS2BMC; 422760c295eSVenkata Duvvuru } 423760c295eSVenkata Duvvuru } 424760c295eSVenkata Duvvuru 4259aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 4263acf19d9SSathya Perla struct be_mcc_compl *compl) 4279aebddd1SJeff Kirsher { 4283acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4293acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 4309aebddd1SJeff Kirsher 4319aebddd1SJeff Kirsher switch (event_type) { 4329aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 4333acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 4349aebddd1SJeff Kirsher break; 4359aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 4363acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 4379aebddd1SJeff Kirsher break; 4389aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 4393acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 4409aebddd1SJeff Kirsher break; 441760c295eSVenkata Duvvuru /* Async event to disable/enable os2bmc and/or mac-learning */ 442760c295eSVenkata Duvvuru case ASYNC_EVENT_FW_CONTROL: 443760c295eSVenkata Duvvuru be_async_grp5_fw_control_process(adapter, compl); 444760c295eSVenkata Duvvuru break; 4459aebddd1SJeff Kirsher default: 4469aebddd1SJeff Kirsher break; 4479aebddd1SJeff Kirsher } 4489aebddd1SJeff Kirsher } 4499aebddd1SJeff Kirsher 450bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 4513acf19d9SSathya Perla struct be_mcc_compl *cmp) 452bc0c3405SAjit Khaparde { 453bc0c3405SAjit Khaparde u8 event_type = 0; 454bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 455bc0c3405SAjit Khaparde 4563acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4573acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 458bc0c3405SAjit Khaparde 459bc0c3405SAjit Khaparde switch (event_type) { 460bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 461bc0c3405SAjit Khaparde if (evt->valid) 462bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 463bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 464bc0c3405SAjit Khaparde break; 465bc0c3405SAjit Khaparde default: 46605ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 46705ccaa2bSVasundhara Volam event_type); 468bc0c3405SAjit Khaparde break; 469bc0c3405SAjit Khaparde } 470bc0c3405SAjit Khaparde } 471bc0c3405SAjit Khaparde 47221252377SVasundhara Volam static void be_async_sliport_evt_process(struct be_adapter *adapter, 47321252377SVasundhara Volam struct be_mcc_compl *cmp) 47421252377SVasundhara Volam { 47521252377SVasundhara Volam u8 event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 47621252377SVasundhara Volam ASYNC_EVENT_TYPE_MASK; 47721252377SVasundhara Volam 47821252377SVasundhara Volam if (event_type == ASYNC_EVENT_PORT_MISCONFIG) 47921252377SVasundhara Volam be_async_port_misconfig_event_process(adapter, cmp); 48021252377SVasundhara Volam } 48121252377SVasundhara Volam 4823acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 4839aebddd1SJeff Kirsher { 4843acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4859aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 4869aebddd1SJeff Kirsher } 4879aebddd1SJeff Kirsher 4883acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 4899aebddd1SJeff Kirsher { 4903acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4913acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 4929aebddd1SJeff Kirsher } 4939aebddd1SJeff Kirsher 4943acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 495bc0c3405SAjit Khaparde { 4963acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4973acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 4983acf19d9SSathya Perla } 4993acf19d9SSathya Perla 50021252377SVasundhara Volam static inline bool is_sliport_evt(u32 flags) 50121252377SVasundhara Volam { 50221252377SVasundhara Volam return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 50321252377SVasundhara Volam ASYNC_EVENT_CODE_SLIPORT; 50421252377SVasundhara Volam } 50521252377SVasundhara Volam 5063acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 5073acf19d9SSathya Perla struct be_mcc_compl *compl) 5083acf19d9SSathya Perla { 5093acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 5103acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 5113acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 5123acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 5133acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 5143acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 51521252377SVasundhara Volam else if (is_sliport_evt(compl->flags)) 51621252377SVasundhara Volam be_async_sliport_evt_process(adapter, compl); 517bc0c3405SAjit Khaparde } 518bc0c3405SAjit Khaparde 5199aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 5209aebddd1SJeff Kirsher { 5219aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 5229aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 5239aebddd1SJeff Kirsher 5249aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5259aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 5269aebddd1SJeff Kirsher return compl; 5279aebddd1SJeff Kirsher } 5289aebddd1SJeff Kirsher return NULL; 5299aebddd1SJeff Kirsher } 5309aebddd1SJeff Kirsher 5319aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 5329aebddd1SJeff Kirsher { 5339aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 5349aebddd1SJeff Kirsher 5359aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 5369aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 5379aebddd1SJeff Kirsher 5389aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 5399aebddd1SJeff Kirsher } 5409aebddd1SJeff Kirsher 5419aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 5429aebddd1SJeff Kirsher { 543a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 544a323d9bfSSathya Perla 5459aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 546a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 547a323d9bfSSathya Perla 548a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 5499aebddd1SJeff Kirsher } 5509aebddd1SJeff Kirsher 55110ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 5529aebddd1SJeff Kirsher { 5539aebddd1SJeff Kirsher struct be_mcc_compl *compl; 55410ef9ab4SSathya Perla int num = 0, status = 0; 5559aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5569aebddd1SJeff Kirsher 557072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 5583acf19d9SSathya Perla 5599aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 5609aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 5613acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 5629aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 56310ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 5649aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 5659aebddd1SJeff Kirsher } 5669aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5679aebddd1SJeff Kirsher num++; 5689aebddd1SJeff Kirsher } 5699aebddd1SJeff Kirsher 57010ef9ab4SSathya Perla if (num) 57110ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 57210ef9ab4SSathya Perla 573072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 57410ef9ab4SSathya Perla return status; 5759aebddd1SJeff Kirsher } 5769aebddd1SJeff Kirsher 5779aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 5789aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 5799aebddd1SJeff Kirsher { 580b7172414SSathya Perla #define mcc_timeout 12000 /* 12s timeout */ 58110ef9ab4SSathya Perla int i, status = 0; 5829aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5839aebddd1SJeff Kirsher 5846589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 585954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 5869aebddd1SJeff Kirsher return -EIO; 5879aebddd1SJeff Kirsher 588072a9c48SAmerigo Wang local_bh_disable(); 58910ef9ab4SSathya Perla status = be_process_mcc(adapter); 590072a9c48SAmerigo Wang local_bh_enable(); 5919aebddd1SJeff Kirsher 5929aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 5939aebddd1SJeff Kirsher break; 594b7172414SSathya Perla usleep_range(500, 1000); 5959aebddd1SJeff Kirsher } 5969aebddd1SJeff Kirsher if (i == mcc_timeout) { 5976589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 598954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 599652bf646SPadmanabh Ratnakar return -EIO; 6009aebddd1SJeff Kirsher } 6019aebddd1SJeff Kirsher return status; 6029aebddd1SJeff Kirsher } 6039aebddd1SJeff Kirsher 6049aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 6059aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 6069aebddd1SJeff Kirsher { 607652bf646SPadmanabh Ratnakar int status; 608652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 609652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 610b0fd2eb2Sajit.khaparde@broadcom.com u32 index = mcc_obj->q.head; 611652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 612652bf646SPadmanabh Ratnakar 613652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 614652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 615652bf646SPadmanabh Ratnakar 616652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 617652bf646SPadmanabh Ratnakar 618efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 619efaa408eSSuresh Reddy if (status) 620efaa408eSSuresh Reddy goto out; 621652bf646SPadmanabh Ratnakar 622652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 623652bf646SPadmanabh Ratnakar if (status == -EIO) 624652bf646SPadmanabh Ratnakar goto out; 625652bf646SPadmanabh Ratnakar 6264c60005fSKalesh AP status = (resp->base_status | 6274c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 6284c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 629652bf646SPadmanabh Ratnakar out: 630652bf646SPadmanabh Ratnakar return status; 6319aebddd1SJeff Kirsher } 6329aebddd1SJeff Kirsher 6339aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 6349aebddd1SJeff Kirsher { 6359aebddd1SJeff Kirsher int msecs = 0; 6369aebddd1SJeff Kirsher u32 ready; 6379aebddd1SJeff Kirsher 6386589ade0SSathya Perla do { 639954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 6409aebddd1SJeff Kirsher return -EIO; 6419aebddd1SJeff Kirsher 6429aebddd1SJeff Kirsher ready = ioread32(db); 643434b3648SSathya Perla if (ready == 0xffffffff) 6449aebddd1SJeff Kirsher return -1; 6459aebddd1SJeff Kirsher 6469aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 6479aebddd1SJeff Kirsher if (ready) 6489aebddd1SJeff Kirsher break; 6499aebddd1SJeff Kirsher 6509aebddd1SJeff Kirsher if (msecs > 4000) { 6516589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 652954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 653f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 6549aebddd1SJeff Kirsher return -1; 6559aebddd1SJeff Kirsher } 6569aebddd1SJeff Kirsher 6579aebddd1SJeff Kirsher msleep(1); 6589aebddd1SJeff Kirsher msecs++; 6599aebddd1SJeff Kirsher } while (true); 6609aebddd1SJeff Kirsher 6619aebddd1SJeff Kirsher return 0; 6629aebddd1SJeff Kirsher } 6639aebddd1SJeff Kirsher 6649aebddd1SJeff Kirsher /* 6659aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 6669aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 6679aebddd1SJeff Kirsher */ 6689aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 6699aebddd1SJeff Kirsher { 6709aebddd1SJeff Kirsher int status; 6719aebddd1SJeff Kirsher u32 val = 0; 6729aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 6739aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6749aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 6759aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 6769aebddd1SJeff Kirsher 6779aebddd1SJeff Kirsher /* wait for ready to be set */ 6789aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6799aebddd1SJeff Kirsher if (status != 0) 6809aebddd1SJeff Kirsher return status; 6819aebddd1SJeff Kirsher 6829aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 6839aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 6849aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 6859aebddd1SJeff Kirsher iowrite32(val, db); 6869aebddd1SJeff Kirsher 6879aebddd1SJeff Kirsher /* wait for ready to be set */ 6889aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6899aebddd1SJeff Kirsher if (status != 0) 6909aebddd1SJeff Kirsher return status; 6919aebddd1SJeff Kirsher 6929aebddd1SJeff Kirsher val = 0; 6939aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 6949aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 6959aebddd1SJeff Kirsher iowrite32(val, db); 6969aebddd1SJeff Kirsher 6979aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6989aebddd1SJeff Kirsher if (status != 0) 6999aebddd1SJeff Kirsher return status; 7009aebddd1SJeff Kirsher 7019aebddd1SJeff Kirsher /* A cq entry has been made now */ 7029aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 7039aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 7049aebddd1SJeff Kirsher be_mcc_compl_use(compl); 7059aebddd1SJeff Kirsher if (status) 7069aebddd1SJeff Kirsher return status; 7079aebddd1SJeff Kirsher } else { 7089aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 7099aebddd1SJeff Kirsher return -1; 7109aebddd1SJeff Kirsher } 7119aebddd1SJeff Kirsher return 0; 7129aebddd1SJeff Kirsher } 7139aebddd1SJeff Kirsher 714710f3e59SSriharsha Basavapatna u16 be_POST_stage_get(struct be_adapter *adapter) 7159aebddd1SJeff Kirsher { 7169aebddd1SJeff Kirsher u32 sem; 7179aebddd1SJeff Kirsher 718c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 719c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 7209aebddd1SJeff Kirsher else 721c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 722c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 723c5b3ad4cSSathya Perla 724c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 7259aebddd1SJeff Kirsher } 7269aebddd1SJeff Kirsher 72787f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 728bf99e50dSPadmanabh Ratnakar { 729bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 730bf99e50dSPadmanabh Ratnakar u32 sliport_status; 731e673244aSKalesh AP int i; 732bf99e50dSPadmanabh Ratnakar 733bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 734bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 735bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 7369fa465c0SSathya Perla return 0; 7379fa465c0SSathya Perla 7389fa465c0SSathya Perla if (sliport_status & SLIPORT_STATUS_ERR_MASK && 7399fa465c0SSathya Perla !(sliport_status & SLIPORT_STATUS_RN_MASK)) 7409fa465c0SSathya Perla return -EIO; 741bf99e50dSPadmanabh Ratnakar 742bf99e50dSPadmanabh Ratnakar msleep(1000); 743bf99e50dSPadmanabh Ratnakar } 744bf99e50dSPadmanabh Ratnakar 745e673244aSKalesh AP return sliport_status ? : -1; 746bf99e50dSPadmanabh Ratnakar } 747bf99e50dSPadmanabh Ratnakar 748bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 7499aebddd1SJeff Kirsher { 7509aebddd1SJeff Kirsher u16 stage; 7519aebddd1SJeff Kirsher int status, timeout = 0; 7529aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 7539aebddd1SJeff Kirsher 754bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 755bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 756e673244aSKalesh AP if (status) { 757e673244aSKalesh AP stage = status; 758e673244aSKalesh AP goto err; 759e673244aSKalesh AP } 760e673244aSKalesh AP return 0; 761bf99e50dSPadmanabh Ratnakar } 762bf99e50dSPadmanabh Ratnakar 7639aebddd1SJeff Kirsher do { 764ca3de6b2SSathya Perla /* There's no means to poll POST state on BE2/3 VFs */ 765ca3de6b2SSathya Perla if (BEx_chip(adapter) && be_virtfn(adapter)) 766ca3de6b2SSathya Perla return 0; 767ca3de6b2SSathya Perla 768c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 76966d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 77066d29cbcSGavin Shan return 0; 77166d29cbcSGavin Shan 772a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 7739aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 7749aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 7759aebddd1SJeff Kirsher return -EINTR; 7769aebddd1SJeff Kirsher } 7779aebddd1SJeff Kirsher timeout += 2; 7783ab81b5fSSomnath Kotur } while (timeout < 60); 7799aebddd1SJeff Kirsher 780e673244aSKalesh AP err: 781e673244aSKalesh AP dev_err(dev, "POST timeout; stage=%#x\n", stage); 7829fa465c0SSathya Perla return -ETIMEDOUT; 7839aebddd1SJeff Kirsher } 7849aebddd1SJeff Kirsher 7859aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 7869aebddd1SJeff Kirsher { 7879aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 7889aebddd1SJeff Kirsher } 7899aebddd1SJeff Kirsher 790a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 791bea50988SSathya Perla { 792bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 793bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 794bea50988SSathya Perla } 7959aebddd1SJeff Kirsher 7969aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 797106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 798106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 799106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 800a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 801a2cc4e0bSSathya Perla struct be_dma_mem *mem) 8029aebddd1SJeff Kirsher { 803106df1e3SSomnath Kotur struct be_sge *sge; 804106df1e3SSomnath Kotur 8059aebddd1SJeff Kirsher req_hdr->opcode = opcode; 8069aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 8079aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 8089aebddd1SJeff Kirsher req_hdr->version = 0; 809bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 810106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 811106df1e3SSomnath Kotur if (mem) { 812106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 813106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 814106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 815106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 816106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 817106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 818106df1e3SSomnath Kotur } else 819106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 820106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 8219aebddd1SJeff Kirsher } 8229aebddd1SJeff Kirsher 8239aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 8249aebddd1SJeff Kirsher struct be_dma_mem *mem) 8259aebddd1SJeff Kirsher { 8269aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 8279aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 8289aebddd1SJeff Kirsher 8299aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 8309aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 8319aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 8329aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 8339aebddd1SJeff Kirsher } 8349aebddd1SJeff Kirsher } 8359aebddd1SJeff Kirsher 8369aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 8379aebddd1SJeff Kirsher { 8389aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 8399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 8409aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 8419aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8429aebddd1SJeff Kirsher return wrb; 8439aebddd1SJeff Kirsher } 8449aebddd1SJeff Kirsher 8459aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 8469aebddd1SJeff Kirsher { 8479aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 8489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8499aebddd1SJeff Kirsher 850aa790db9SPadmanabh Ratnakar if (!mccq->created) 851aa790db9SPadmanabh Ratnakar return NULL; 852aa790db9SPadmanabh Ratnakar 8534d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 8549aebddd1SJeff Kirsher return NULL; 8559aebddd1SJeff Kirsher 8569aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 8579aebddd1SJeff Kirsher queue_head_inc(mccq); 8589aebddd1SJeff Kirsher atomic_inc(&mccq->used); 8599aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8609aebddd1SJeff Kirsher return wrb; 8619aebddd1SJeff Kirsher } 8629aebddd1SJeff Kirsher 863bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 864bea50988SSathya Perla { 865bea50988SSathya Perla return adapter->mcc_obj.q.created; 866bea50988SSathya Perla } 867bea50988SSathya Perla 868bea50988SSathya Perla /* Must be used only in process context */ 869bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 870bea50988SSathya Perla { 871bea50988SSathya Perla if (use_mcc(adapter)) { 872b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 873bea50988SSathya Perla return 0; 874bea50988SSathya Perla } else { 875bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 876bea50988SSathya Perla } 877bea50988SSathya Perla } 878bea50988SSathya Perla 879bea50988SSathya Perla /* Must be used only in process context */ 880bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 881bea50988SSathya Perla { 882bea50988SSathya Perla if (use_mcc(adapter)) 883b7172414SSathya Perla return mutex_unlock(&adapter->mcc_lock); 884bea50988SSathya Perla else 885bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 886bea50988SSathya Perla } 887bea50988SSathya Perla 888bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 889bea50988SSathya Perla struct be_mcc_wrb *wrb) 890bea50988SSathya Perla { 891bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 892bea50988SSathya Perla 893bea50988SSathya Perla if (use_mcc(adapter)) { 894bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 895bea50988SSathya Perla if (!dest_wrb) 896bea50988SSathya Perla return NULL; 897bea50988SSathya Perla } else { 898bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 899bea50988SSathya Perla } 900bea50988SSathya Perla 901bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 902bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 903bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 904bea50988SSathya Perla 905bea50988SSathya Perla return dest_wrb; 906bea50988SSathya Perla } 907bea50988SSathya Perla 908bea50988SSathya Perla /* Must be used only in process context */ 909bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 910bea50988SSathya Perla struct be_mcc_wrb *wrb) 911bea50988SSathya Perla { 912bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 913bea50988SSathya Perla int status; 914bea50988SSathya Perla 915bea50988SSathya Perla status = be_cmd_lock(adapter); 916bea50988SSathya Perla if (status) 917bea50988SSathya Perla return status; 918bea50988SSathya Perla 919bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 9200c884567SSuresh Reddy if (!dest_wrb) { 9210c884567SSuresh Reddy status = -EBUSY; 9220c884567SSuresh Reddy goto unlock; 9230c884567SSuresh Reddy } 924bea50988SSathya Perla 925bea50988SSathya Perla if (use_mcc(adapter)) 926bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 927bea50988SSathya Perla else 928bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 929bea50988SSathya Perla 930bea50988SSathya Perla if (!status) 931bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 932bea50988SSathya Perla 9330c884567SSuresh Reddy unlock: 934bea50988SSathya Perla be_cmd_unlock(adapter); 935bea50988SSathya Perla return status; 936bea50988SSathya Perla } 937bea50988SSathya Perla 9389aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 9399aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9409aebddd1SJeff Kirsher */ 9419aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 9429aebddd1SJeff Kirsher { 9439aebddd1SJeff Kirsher u8 *wrb; 9449aebddd1SJeff Kirsher int status; 9459aebddd1SJeff Kirsher 946bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 947bf99e50dSPadmanabh Ratnakar return 0; 948bf99e50dSPadmanabh Ratnakar 9499aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9509aebddd1SJeff Kirsher return -1; 9519aebddd1SJeff Kirsher 9529aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9539aebddd1SJeff Kirsher *wrb++ = 0xFF; 9549aebddd1SJeff Kirsher *wrb++ = 0x12; 9559aebddd1SJeff Kirsher *wrb++ = 0x34; 9569aebddd1SJeff Kirsher *wrb++ = 0xFF; 9579aebddd1SJeff Kirsher *wrb++ = 0xFF; 9589aebddd1SJeff Kirsher *wrb++ = 0x56; 9599aebddd1SJeff Kirsher *wrb++ = 0x78; 9609aebddd1SJeff Kirsher *wrb = 0xFF; 9619aebddd1SJeff Kirsher 9629aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9639aebddd1SJeff Kirsher 9649aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9659aebddd1SJeff Kirsher return status; 9669aebddd1SJeff Kirsher } 9679aebddd1SJeff Kirsher 9689aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 9699aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9709aebddd1SJeff Kirsher */ 9719aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 9729aebddd1SJeff Kirsher { 9739aebddd1SJeff Kirsher u8 *wrb; 9749aebddd1SJeff Kirsher int status; 9759aebddd1SJeff Kirsher 976bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 977bf99e50dSPadmanabh Ratnakar return 0; 978bf99e50dSPadmanabh Ratnakar 9799aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9809aebddd1SJeff Kirsher return -1; 9819aebddd1SJeff Kirsher 9829aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9839aebddd1SJeff Kirsher *wrb++ = 0xFF; 9849aebddd1SJeff Kirsher *wrb++ = 0xAA; 9859aebddd1SJeff Kirsher *wrb++ = 0xBB; 9869aebddd1SJeff Kirsher *wrb++ = 0xFF; 9879aebddd1SJeff Kirsher *wrb++ = 0xFF; 9889aebddd1SJeff Kirsher *wrb++ = 0xCC; 9899aebddd1SJeff Kirsher *wrb++ = 0xDD; 9909aebddd1SJeff Kirsher *wrb = 0xFF; 9919aebddd1SJeff Kirsher 9929aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9939aebddd1SJeff Kirsher 9949aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9959aebddd1SJeff Kirsher return status; 9969aebddd1SJeff Kirsher } 997bf99e50dSPadmanabh Ratnakar 998f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 9999aebddd1SJeff Kirsher { 10009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10019aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 1002f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 1003f2f781a7SSathya Perla int status, ver = 0; 10049aebddd1SJeff Kirsher 10059aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10069aebddd1SJeff Kirsher return -1; 10079aebddd1SJeff Kirsher 10089aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10099aebddd1SJeff Kirsher req = embedded_payload(wrb); 10109aebddd1SJeff Kirsher 1011106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1012a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 1013a2cc4e0bSSathya Perla NULL); 10149aebddd1SJeff Kirsher 1015f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 1016f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 1017f2f781a7SSathya Perla ver = 2; 1018f2f781a7SSathya Perla 1019f2f781a7SSathya Perla req->hdr.version = ver; 10209aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10219aebddd1SJeff Kirsher 10229aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 10239aebddd1SJeff Kirsher /* 4byte eqe*/ 10249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 10259aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 1026f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 10279aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 10289aebddd1SJeff Kirsher 10299aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10309aebddd1SJeff Kirsher 10319aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10329aebddd1SJeff Kirsher if (!status) { 10339aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 103403d28ffeSKalesh AP 1035f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 1036f2f781a7SSathya Perla eqo->msix_idx = 1037f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 1038f2f781a7SSathya Perla eqo->q.created = true; 10399aebddd1SJeff Kirsher } 10409aebddd1SJeff Kirsher 10419aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10429aebddd1SJeff Kirsher return status; 10439aebddd1SJeff Kirsher } 10449aebddd1SJeff Kirsher 1045f9449ab7SSathya Perla /* Use MCC */ 10469aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 10475ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 10489aebddd1SJeff Kirsher { 10499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10509aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 10519aebddd1SJeff Kirsher int status; 10529aebddd1SJeff Kirsher 1053b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10549aebddd1SJeff Kirsher 1055f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1056f9449ab7SSathya Perla if (!wrb) { 1057f9449ab7SSathya Perla status = -EBUSY; 1058f9449ab7SSathya Perla goto err; 1059f9449ab7SSathya Perla } 10609aebddd1SJeff Kirsher req = embedded_payload(wrb); 10619aebddd1SJeff Kirsher 1062106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1063a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 1064a2cc4e0bSSathya Perla NULL); 10655ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 10669aebddd1SJeff Kirsher if (permanent) { 10679aebddd1SJeff Kirsher req->permanent = 1; 10689aebddd1SJeff Kirsher } else { 10699aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 1070590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 10719aebddd1SJeff Kirsher req->permanent = 0; 10729aebddd1SJeff Kirsher } 10739aebddd1SJeff Kirsher 1074f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 10759aebddd1SJeff Kirsher if (!status) { 10769aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 107703d28ffeSKalesh AP 10789aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 10799aebddd1SJeff Kirsher } 10809aebddd1SJeff Kirsher 1081f9449ab7SSathya Perla err: 1082b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 10839aebddd1SJeff Kirsher return status; 10849aebddd1SJeff Kirsher } 10859aebddd1SJeff Kirsher 10869aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 10879aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 10889aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 10899aebddd1SJeff Kirsher { 10909aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10919aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 10929aebddd1SJeff Kirsher int status; 10939aebddd1SJeff Kirsher 1094b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10959aebddd1SJeff Kirsher 10969aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10979aebddd1SJeff Kirsher if (!wrb) { 10989aebddd1SJeff Kirsher status = -EBUSY; 10999aebddd1SJeff Kirsher goto err; 11009aebddd1SJeff Kirsher } 11019aebddd1SJeff Kirsher req = embedded_payload(wrb); 11029aebddd1SJeff Kirsher 1103106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1104a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 1105a2cc4e0bSSathya Perla NULL); 11069aebddd1SJeff Kirsher 11079aebddd1SJeff Kirsher req->hdr.domain = domain; 11089aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11099aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 11109aebddd1SJeff Kirsher 11119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11129aebddd1SJeff Kirsher if (!status) { 11139aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 111403d28ffeSKalesh AP 11159aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11169aebddd1SJeff Kirsher } 11179aebddd1SJeff Kirsher 11189aebddd1SJeff Kirsher err: 1119b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1120e3a7ae2cSSomnath Kotur 1121fe68d8bfSIvan Vecera if (base_status(status) == MCC_STATUS_UNAUTHORIZED_REQUEST) 1122e3a7ae2cSSomnath Kotur status = -EPERM; 1123e3a7ae2cSSomnath Kotur 11249aebddd1SJeff Kirsher return status; 11259aebddd1SJeff Kirsher } 11269aebddd1SJeff Kirsher 11279aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 112830128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 11299aebddd1SJeff Kirsher { 11309aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11319aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 11329aebddd1SJeff Kirsher int status; 11339aebddd1SJeff Kirsher 113430128031SSathya Perla if (pmac_id == -1) 113530128031SSathya Perla return 0; 113630128031SSathya Perla 1137b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 11389aebddd1SJeff Kirsher 11399aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11409aebddd1SJeff Kirsher if (!wrb) { 11419aebddd1SJeff Kirsher status = -EBUSY; 11429aebddd1SJeff Kirsher goto err; 11439aebddd1SJeff Kirsher } 11449aebddd1SJeff Kirsher req = embedded_payload(wrb); 11459aebddd1SJeff Kirsher 1146106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1147cd3307aaSKalesh AP OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), 1148cd3307aaSKalesh AP wrb, NULL); 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher req->hdr.domain = dom; 11519aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11529aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 11539aebddd1SJeff Kirsher 11549aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11559aebddd1SJeff Kirsher 11569aebddd1SJeff Kirsher err: 1157b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 11589aebddd1SJeff Kirsher return status; 11599aebddd1SJeff Kirsher } 11609aebddd1SJeff Kirsher 11619aebddd1SJeff Kirsher /* Uses Mbox */ 116210ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 116310ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 11649aebddd1SJeff Kirsher { 11659aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11669aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 11679aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 11689aebddd1SJeff Kirsher void *ctxt; 11699aebddd1SJeff Kirsher int status; 11709aebddd1SJeff Kirsher 11719aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11729aebddd1SJeff Kirsher return -1; 11739aebddd1SJeff Kirsher 11749aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11759aebddd1SJeff Kirsher req = embedded_payload(wrb); 11769aebddd1SJeff Kirsher ctxt = &req->context; 11779aebddd1SJeff Kirsher 1178106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1179a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1180a2cc4e0bSSathya Perla NULL); 11819aebddd1SJeff Kirsher 11829aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1183bbdc42f8SAjit Khaparde 1184bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 11859aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 11869aebddd1SJeff Kirsher coalesce_wm); 11879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 11889aebddd1SJeff Kirsher ctxt, no_delay); 11899aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 11909aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 11919aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 11929aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 11939aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1194bbdc42f8SAjit Khaparde } else { 1195bbdc42f8SAjit Khaparde req->hdr.version = 2; 1196bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 119709e83a9dSAjit Khaparde 119809e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 119909e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 120009e83a9dSAjit Khaparde */ 120109e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 120209e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 120309e83a9dSAjit Khaparde ctxt, coalesce_wm); 1204bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1205bbdc42f8SAjit Khaparde no_delay); 1206bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1207bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1208bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1209a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1210a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 12119aebddd1SJeff Kirsher } 12129aebddd1SJeff Kirsher 12139aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12149aebddd1SJeff Kirsher 12159aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12169aebddd1SJeff Kirsher 12179aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12189aebddd1SJeff Kirsher if (!status) { 12199aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 122003d28ffeSKalesh AP 12219aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 12229aebddd1SJeff Kirsher cq->created = true; 12239aebddd1SJeff Kirsher } 12249aebddd1SJeff Kirsher 12259aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12269aebddd1SJeff Kirsher 12279aebddd1SJeff Kirsher return status; 12289aebddd1SJeff Kirsher } 12299aebddd1SJeff Kirsher 12309aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 12319aebddd1SJeff Kirsher { 12329aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 123303d28ffeSKalesh AP 12349aebddd1SJeff Kirsher if (len_encoded == 16) 12359aebddd1SJeff Kirsher len_encoded = 0; 12369aebddd1SJeff Kirsher return len_encoded; 12379aebddd1SJeff Kirsher } 12389aebddd1SJeff Kirsher 12394188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 12409aebddd1SJeff Kirsher struct be_queue_info *mccq, 12419aebddd1SJeff Kirsher struct be_queue_info *cq) 12429aebddd1SJeff Kirsher { 12439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12449aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 12459aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 12469aebddd1SJeff Kirsher void *ctxt; 12479aebddd1SJeff Kirsher int status; 12489aebddd1SJeff Kirsher 12499aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12509aebddd1SJeff Kirsher return -1; 12519aebddd1SJeff Kirsher 12529aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12539aebddd1SJeff Kirsher req = embedded_payload(wrb); 12549aebddd1SJeff Kirsher ctxt = &req->context; 12559aebddd1SJeff Kirsher 1256106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1257a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1258a2cc4e0bSSathya Perla NULL); 12599aebddd1SJeff Kirsher 12609aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1261666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 12629aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12639aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12649aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12659aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1266666d39c7SVasundhara Volam } else { 1267666d39c7SVasundhara Volam req->hdr.version = 1; 1268666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1269666d39c7SVasundhara Volam 1270666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1271666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1272666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1273666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1274666d39c7SVasundhara Volam ctxt, cq->id); 1275666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1276666d39c7SVasundhara Volam ctxt, 1); 12779aebddd1SJeff Kirsher } 12789aebddd1SJeff Kirsher 127921252377SVasundhara Volam /* Subscribe to Link State, Sliport Event and Group 5 Events 128021252377SVasundhara Volam * (bits 1, 5 and 17 set) 128121252377SVasundhara Volam */ 128221252377SVasundhara Volam req->async_event_bitmap[0] = 128321252377SVasundhara Volam cpu_to_le32(BIT(ASYNC_EVENT_CODE_LINK_STATE) | 128421252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_GRP_5) | 128521252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_QNQ) | 128621252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_SLIPORT)); 128721252377SVasundhara Volam 12889aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12899aebddd1SJeff Kirsher 12909aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12919aebddd1SJeff Kirsher 12929aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12939aebddd1SJeff Kirsher if (!status) { 12949aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 129503d28ffeSKalesh AP 12969aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12979aebddd1SJeff Kirsher mccq->created = true; 12989aebddd1SJeff Kirsher } 12999aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13009aebddd1SJeff Kirsher 13019aebddd1SJeff Kirsher return status; 13029aebddd1SJeff Kirsher } 13039aebddd1SJeff Kirsher 13044188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 13059aebddd1SJeff Kirsher struct be_queue_info *mccq, 13069aebddd1SJeff Kirsher struct be_queue_info *cq) 13079aebddd1SJeff Kirsher { 13089aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13099aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 13109aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 13119aebddd1SJeff Kirsher void *ctxt; 13129aebddd1SJeff Kirsher int status; 13139aebddd1SJeff Kirsher 13149aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13159aebddd1SJeff Kirsher return -1; 13169aebddd1SJeff Kirsher 13179aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13189aebddd1SJeff Kirsher req = embedded_payload(wrb); 13199aebddd1SJeff Kirsher ctxt = &req->context; 13209aebddd1SJeff Kirsher 1321106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1322a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1323a2cc4e0bSSathya Perla NULL); 13249aebddd1SJeff Kirsher 13259aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 13269aebddd1SJeff Kirsher 13279aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 13289aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 13299aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 13309aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 13319aebddd1SJeff Kirsher 13329aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 13339aebddd1SJeff Kirsher 13349aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13359aebddd1SJeff Kirsher 13369aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13379aebddd1SJeff Kirsher if (!status) { 13389aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 133903d28ffeSKalesh AP 13409aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 13419aebddd1SJeff Kirsher mccq->created = true; 13429aebddd1SJeff Kirsher } 13439aebddd1SJeff Kirsher 13449aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13459aebddd1SJeff Kirsher return status; 13469aebddd1SJeff Kirsher } 13479aebddd1SJeff Kirsher 13489aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1349a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 13509aebddd1SJeff Kirsher { 13519aebddd1SJeff Kirsher int status; 13529aebddd1SJeff Kirsher 13539aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1354666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 13559aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 13569aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 13579aebddd1SJeff Kirsher "and FCoE traffic"); 13589aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 13599aebddd1SJeff Kirsher } 13609aebddd1SJeff Kirsher return status; 13619aebddd1SJeff Kirsher } 13629aebddd1SJeff Kirsher 136394d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 13649aebddd1SJeff Kirsher { 13657707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 13669aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 136794d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 136894d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 13699aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 137094d73aaaSVasundhara Volam int status, ver = 0; 13719aebddd1SJeff Kirsher 13727707133cSSathya Perla req = embedded_payload(&wrb); 1373106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 13747707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 13759aebddd1SJeff Kirsher 13769aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 13779aebddd1SJeff Kirsher req->hdr.version = 1; 137894d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 137994d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 138094d73aaaSVasundhara Volam req->hdr.version = 2; 138194d73aaaSVasundhara Volam } else { /* For SH */ 138294d73aaaSVasundhara Volam req->hdr.version = 2; 13839aebddd1SJeff Kirsher } 13849aebddd1SJeff Kirsher 138581b02655SVasundhara Volam if (req->hdr.version > 0) 138681b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 13879aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 13889aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 13899aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 139094d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 139194d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 13929aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 139394d73aaaSVasundhara Volam ver = req->hdr.version; 139494d73aaaSVasundhara Volam 13957707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13969aebddd1SJeff Kirsher if (!status) { 13977707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 139803d28ffeSKalesh AP 13999aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 140094d73aaaSVasundhara Volam if (ver == 2) 140194d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 140294d73aaaSVasundhara Volam else 140394d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 14049aebddd1SJeff Kirsher txq->created = true; 14059aebddd1SJeff Kirsher } 14069aebddd1SJeff Kirsher 14079aebddd1SJeff Kirsher return status; 14089aebddd1SJeff Kirsher } 14099aebddd1SJeff Kirsher 14109aebddd1SJeff Kirsher /* Uses MCC */ 14119aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 14129aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 141310ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 14149aebddd1SJeff Kirsher { 14159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14169aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 14179aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 14189aebddd1SJeff Kirsher int status; 14199aebddd1SJeff Kirsher 1420b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 14219aebddd1SJeff Kirsher 14229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14239aebddd1SJeff Kirsher if (!wrb) { 14249aebddd1SJeff Kirsher status = -EBUSY; 14259aebddd1SJeff Kirsher goto err; 14269aebddd1SJeff Kirsher } 14279aebddd1SJeff Kirsher req = embedded_payload(wrb); 14289aebddd1SJeff Kirsher 1429106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1430106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 14319aebddd1SJeff Kirsher 14329aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 14339aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 14349aebddd1SJeff Kirsher req->num_pages = 2; 14359aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 14369aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 143710ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 14389aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 14399aebddd1SJeff Kirsher 14409aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14419aebddd1SJeff Kirsher if (!status) { 14429aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 144303d28ffeSKalesh AP 14449aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 14459aebddd1SJeff Kirsher rxq->created = true; 14469aebddd1SJeff Kirsher *rss_id = resp->rss_id; 14479aebddd1SJeff Kirsher } 14489aebddd1SJeff Kirsher 14499aebddd1SJeff Kirsher err: 1450b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 14519aebddd1SJeff Kirsher return status; 14529aebddd1SJeff Kirsher } 14539aebddd1SJeff Kirsher 14549aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 14559aebddd1SJeff Kirsher * Uses Mbox 14569aebddd1SJeff Kirsher */ 14579aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 14589aebddd1SJeff Kirsher int queue_type) 14599aebddd1SJeff Kirsher { 14609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14619aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 14629aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 14639aebddd1SJeff Kirsher int status; 14649aebddd1SJeff Kirsher 14659aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 14669aebddd1SJeff Kirsher return -1; 14679aebddd1SJeff Kirsher 14689aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 14699aebddd1SJeff Kirsher req = embedded_payload(wrb); 14709aebddd1SJeff Kirsher 14719aebddd1SJeff Kirsher switch (queue_type) { 14729aebddd1SJeff Kirsher case QTYPE_EQ: 14739aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14749aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 14759aebddd1SJeff Kirsher break; 14769aebddd1SJeff Kirsher case QTYPE_CQ: 14779aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14789aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 14799aebddd1SJeff Kirsher break; 14809aebddd1SJeff Kirsher case QTYPE_TXQ: 14819aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14829aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 14839aebddd1SJeff Kirsher break; 14849aebddd1SJeff Kirsher case QTYPE_RXQ: 14859aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14869aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 14879aebddd1SJeff Kirsher break; 14889aebddd1SJeff Kirsher case QTYPE_MCCQ: 14899aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14909aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 14919aebddd1SJeff Kirsher break; 14929aebddd1SJeff Kirsher default: 14939aebddd1SJeff Kirsher BUG(); 14949aebddd1SJeff Kirsher } 14959aebddd1SJeff Kirsher 1496106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1497106df1e3SSomnath Kotur NULL); 14989aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14999aebddd1SJeff Kirsher 15009aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 15019aebddd1SJeff Kirsher q->created = false; 15029aebddd1SJeff Kirsher 15039aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 15049aebddd1SJeff Kirsher return status; 15059aebddd1SJeff Kirsher } 15069aebddd1SJeff Kirsher 15079aebddd1SJeff Kirsher /* Uses MCC */ 15089aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 15099aebddd1SJeff Kirsher { 15109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15119aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 15129aebddd1SJeff Kirsher int status; 15139aebddd1SJeff Kirsher 1514b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15159aebddd1SJeff Kirsher 15169aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15179aebddd1SJeff Kirsher if (!wrb) { 15189aebddd1SJeff Kirsher status = -EBUSY; 15199aebddd1SJeff Kirsher goto err; 15209aebddd1SJeff Kirsher } 15219aebddd1SJeff Kirsher req = embedded_payload(wrb); 15229aebddd1SJeff Kirsher 1523106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1524106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 15259aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 15269aebddd1SJeff Kirsher 15279aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15289aebddd1SJeff Kirsher q->created = false; 15299aebddd1SJeff Kirsher 15309aebddd1SJeff Kirsher err: 1531b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 15329aebddd1SJeff Kirsher return status; 15339aebddd1SJeff Kirsher } 15349aebddd1SJeff Kirsher 15359aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1536bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 15379aebddd1SJeff Kirsher */ 15389aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 15391578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 15409aebddd1SJeff Kirsher { 1541bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 15429aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 15439aebddd1SJeff Kirsher int status; 15449aebddd1SJeff Kirsher 1545bea50988SSathya Perla req = embedded_payload(&wrb); 1546106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1547a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1548a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 15499aebddd1SJeff Kirsher req->hdr.domain = domain; 15509aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 15519aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1552f9449ab7SSathya Perla req->pmac_invalid = true; 15539aebddd1SJeff Kirsher 1554bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 15559aebddd1SJeff Kirsher if (!status) { 1556bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 155703d28ffeSKalesh AP 15589aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1559b5bb9776SSathya Perla 1560b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 156118c57c74SKalesh AP if (BE3_chip(adapter) && be_virtfn(adapter)) 1562b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 15639aebddd1SJeff Kirsher } 15649aebddd1SJeff Kirsher return status; 15659aebddd1SJeff Kirsher } 15669aebddd1SJeff Kirsher 156762219066SAjit Khaparde /* Uses MCCQ if available else MBOX */ 156830128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 15699aebddd1SJeff Kirsher { 157062219066SAjit Khaparde struct be_mcc_wrb wrb = {0}; 15719aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 15729aebddd1SJeff Kirsher int status; 15739aebddd1SJeff Kirsher 157430128031SSathya Perla if (interface_id == -1) 1575f9449ab7SSathya Perla return 0; 15769aebddd1SJeff Kirsher 157762219066SAjit Khaparde req = embedded_payload(&wrb); 15789aebddd1SJeff Kirsher 1579106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1580a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 158162219066SAjit Khaparde sizeof(*req), &wrb, NULL); 15829aebddd1SJeff Kirsher req->hdr.domain = domain; 15839aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 15849aebddd1SJeff Kirsher 158562219066SAjit Khaparde status = be_cmd_notify_wait(adapter, &wrb); 15869aebddd1SJeff Kirsher return status; 15879aebddd1SJeff Kirsher } 15889aebddd1SJeff Kirsher 15899aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 15909aebddd1SJeff Kirsher * WRB but is a separate dma memory block 15919aebddd1SJeff Kirsher * Uses asynchronous MCC 15929aebddd1SJeff Kirsher */ 15939aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 15949aebddd1SJeff Kirsher { 15959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15969aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 15979aebddd1SJeff Kirsher int status = 0; 15989aebddd1SJeff Kirsher 1599b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16009aebddd1SJeff Kirsher 16019aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16029aebddd1SJeff Kirsher if (!wrb) { 16039aebddd1SJeff Kirsher status = -EBUSY; 16049aebddd1SJeff Kirsher goto err; 16059aebddd1SJeff Kirsher } 16069aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 16079aebddd1SJeff Kirsher 1608106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1609a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1610a2cc4e0bSSathya Perla nonemb_cmd); 16119aebddd1SJeff Kirsher 1612ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 161361000861SAjit Khaparde if (BE2_chip(adapter)) 161461000861SAjit Khaparde hdr->version = 0; 161561000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 16169aebddd1SJeff Kirsher hdr->version = 1; 161761000861SAjit Khaparde else 161861000861SAjit Khaparde hdr->version = 2; 16199aebddd1SJeff Kirsher 1620efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1621efaa408eSSuresh Reddy if (status) 1622efaa408eSSuresh Reddy goto err; 1623efaa408eSSuresh Reddy 16249aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16259aebddd1SJeff Kirsher 16269aebddd1SJeff Kirsher err: 1627b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16289aebddd1SJeff Kirsher return status; 16299aebddd1SJeff Kirsher } 16309aebddd1SJeff Kirsher 16319aebddd1SJeff Kirsher /* Lancer Stats */ 16329aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 16339aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 16349aebddd1SJeff Kirsher { 16359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16369aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 16379aebddd1SJeff Kirsher int status = 0; 16389aebddd1SJeff Kirsher 1639f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1640f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1641f25b119cSPadmanabh Ratnakar return -EPERM; 1642f25b119cSPadmanabh Ratnakar 1643b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16449aebddd1SJeff Kirsher 16459aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16469aebddd1SJeff Kirsher if (!wrb) { 16479aebddd1SJeff Kirsher status = -EBUSY; 16489aebddd1SJeff Kirsher goto err; 16499aebddd1SJeff Kirsher } 16509aebddd1SJeff Kirsher req = nonemb_cmd->va; 16519aebddd1SJeff Kirsher 1652106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1653a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1654a2cc4e0bSSathya Perla wrb, nonemb_cmd); 16559aebddd1SJeff Kirsher 1656d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 16579aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 16589aebddd1SJeff Kirsher 1659efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1660efaa408eSSuresh Reddy if (status) 1661efaa408eSSuresh Reddy goto err; 1662efaa408eSSuresh Reddy 16639aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16649aebddd1SJeff Kirsher 16659aebddd1SJeff Kirsher err: 1666b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16679aebddd1SJeff Kirsher return status; 16689aebddd1SJeff Kirsher } 16699aebddd1SJeff Kirsher 1670323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1671323ff71eSSathya Perla { 1672323ff71eSSathya Perla switch (mac_speed) { 1673323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1674323ff71eSSathya Perla return 0; 1675323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1676323ff71eSSathya Perla return 10; 1677323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1678323ff71eSSathya Perla return 100; 1679323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1680323ff71eSSathya Perla return 1000; 1681323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1682323ff71eSSathya Perla return 10000; 1683b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1684b971f847SVasundhara Volam return 20000; 1685b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1686b971f847SVasundhara Volam return 25000; 1687b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1688b971f847SVasundhara Volam return 40000; 1689323ff71eSSathya Perla } 1690323ff71eSSathya Perla return 0; 1691323ff71eSSathya Perla } 1692323ff71eSSathya Perla 1693323ff71eSSathya Perla /* Uses synchronous mcc 1694323ff71eSSathya Perla * Returns link_speed in Mbps 1695323ff71eSSathya Perla */ 1696323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1697323ff71eSSathya Perla u8 *link_status, u32 dom) 16989aebddd1SJeff Kirsher { 16999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17009aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 17019aebddd1SJeff Kirsher int status; 17029aebddd1SJeff Kirsher 1703b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17049aebddd1SJeff Kirsher 1705b236916aSAjit Khaparde if (link_status) 1706b236916aSAjit Khaparde *link_status = LINK_DOWN; 1707b236916aSAjit Khaparde 17089aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17099aebddd1SJeff Kirsher if (!wrb) { 17109aebddd1SJeff Kirsher status = -EBUSY; 17119aebddd1SJeff Kirsher goto err; 17129aebddd1SJeff Kirsher } 17139aebddd1SJeff Kirsher req = embedded_payload(wrb); 17149aebddd1SJeff Kirsher 171557cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1716a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1717a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 171857cd80d4SPadmanabh Ratnakar 1719ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1720ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1721daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1722daad6167SPadmanabh Ratnakar 172357cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 17249aebddd1SJeff Kirsher 17259aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17269aebddd1SJeff Kirsher if (!status) { 17279aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 172803d28ffeSKalesh AP 1729323ff71eSSathya Perla if (link_speed) { 1730323ff71eSSathya Perla *link_speed = resp->link_speed ? 1731323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1732323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1733323ff71eSSathya Perla 1734323ff71eSSathya Perla if (!resp->logical_link_status) 1735323ff71eSSathya Perla *link_speed = 0; 17369aebddd1SJeff Kirsher } 1737b236916aSAjit Khaparde if (link_status) 1738b236916aSAjit Khaparde *link_status = resp->logical_link_status; 17399aebddd1SJeff Kirsher } 17409aebddd1SJeff Kirsher 17419aebddd1SJeff Kirsher err: 1742b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17439aebddd1SJeff Kirsher return status; 17449aebddd1SJeff Kirsher } 17459aebddd1SJeff Kirsher 17469aebddd1SJeff Kirsher /* Uses synchronous mcc */ 17479aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 17489aebddd1SJeff Kirsher { 17499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17509aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1751117affe3SVasundhara Volam int status = 0; 17529aebddd1SJeff Kirsher 1753b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17549aebddd1SJeff Kirsher 17559aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17569aebddd1SJeff Kirsher if (!wrb) { 17579aebddd1SJeff Kirsher status = -EBUSY; 17589aebddd1SJeff Kirsher goto err; 17599aebddd1SJeff Kirsher } 17609aebddd1SJeff Kirsher req = embedded_payload(wrb); 17619aebddd1SJeff Kirsher 1762106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1763a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1764a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 17659aebddd1SJeff Kirsher 1766efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 17679aebddd1SJeff Kirsher err: 1768b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17699aebddd1SJeff Kirsher return status; 17709aebddd1SJeff Kirsher } 17719aebddd1SJeff Kirsher 17729aebddd1SJeff Kirsher /* Uses synchronous mcc */ 1773fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size) 17749aebddd1SJeff Kirsher { 1775fd7ff6f0SVenkat Duvvuru struct be_mcc_wrb wrb = {0}; 17769aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17779aebddd1SJeff Kirsher int status; 17789aebddd1SJeff Kirsher 1779fd7ff6f0SVenkat Duvvuru req = embedded_payload(&wrb); 17809aebddd1SJeff Kirsher 1781106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1782fd7ff6f0SVenkat Duvvuru OPCODE_COMMON_MANAGE_FAT, sizeof(*req), 1783fd7ff6f0SVenkat Duvvuru &wrb, NULL); 17849aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 1785fd7ff6f0SVenkat Duvvuru status = be_cmd_notify_wait(adapter, &wrb); 17869aebddd1SJeff Kirsher if (!status) { 1787fd7ff6f0SVenkat Duvvuru struct be_cmd_resp_get_fat *resp = embedded_payload(&wrb); 178803d28ffeSKalesh AP 1789fd7ff6f0SVenkat Duvvuru if (dump_size && resp->log_size) 1790fd7ff6f0SVenkat Duvvuru *dump_size = le32_to_cpu(resp->log_size) - 17919aebddd1SJeff Kirsher sizeof(u32); 17929aebddd1SJeff Kirsher } 17939aebddd1SJeff Kirsher return status; 17949aebddd1SJeff Kirsher } 17959aebddd1SJeff Kirsher 1796fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf) 17979aebddd1SJeff Kirsher { 17989aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 17999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18009aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 18019aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 18029aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1803fd7ff6f0SVenkat Duvvuru int status; 18049aebddd1SJeff Kirsher 18059aebddd1SJeff Kirsher if (buf_len == 0) 1806fd7ff6f0SVenkat Duvvuru return 0; 18079aebddd1SJeff Kirsher 18089aebddd1SJeff Kirsher total_size = buf_len; 18099aebddd1SJeff Kirsher 18109aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1811750afb08SLuis Chamberlain get_fat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 18129aebddd1SJeff Kirsher get_fat_cmd.size, 1813e51000dbSSriharsha Basavapatna &get_fat_cmd.dma, GFP_ATOMIC); 1814fd7ff6f0SVenkat Duvvuru if (!get_fat_cmd.va) 1815c5f156deSVasundhara Volam return -ENOMEM; 18169aebddd1SJeff Kirsher 1817b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18189aebddd1SJeff Kirsher 18199aebddd1SJeff Kirsher while (total_size) { 18209aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 18219aebddd1SJeff Kirsher total_size -= buf_size; 18229aebddd1SJeff Kirsher 18239aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18249aebddd1SJeff Kirsher if (!wrb) { 18259aebddd1SJeff Kirsher status = -EBUSY; 18269aebddd1SJeff Kirsher goto err; 18279aebddd1SJeff Kirsher } 18289aebddd1SJeff Kirsher req = get_fat_cmd.va; 18299aebddd1SJeff Kirsher 18309aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1831106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1832a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1833a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 18349aebddd1SJeff Kirsher 18359aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 18369aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 18379aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 18389aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 18399aebddd1SJeff Kirsher 18409aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18419aebddd1SJeff Kirsher if (!status) { 18429aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 184303d28ffeSKalesh AP 18449aebddd1SJeff Kirsher memcpy(buf + offset, 18459aebddd1SJeff Kirsher resp->data_buffer, 184692aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 18479aebddd1SJeff Kirsher } else { 18489aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 18499aebddd1SJeff Kirsher goto err; 18509aebddd1SJeff Kirsher } 18519aebddd1SJeff Kirsher offset += buf_size; 18529aebddd1SJeff Kirsher log_offset += buf_size; 18539aebddd1SJeff Kirsher } 18549aebddd1SJeff Kirsher err: 1855e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_fat_cmd.size, 1856a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 1857b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1858c5f156deSVasundhara Volam return status; 18599aebddd1SJeff Kirsher } 18609aebddd1SJeff Kirsher 186104b71175SSathya Perla /* Uses synchronous mcc */ 1862e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 18639aebddd1SJeff Kirsher { 18649aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18659aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 18669aebddd1SJeff Kirsher int status; 18679aebddd1SJeff Kirsher 1868b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18699aebddd1SJeff Kirsher 187004b71175SSathya Perla wrb = wrb_from_mccq(adapter); 187104b71175SSathya Perla if (!wrb) { 187204b71175SSathya Perla status = -EBUSY; 187304b71175SSathya Perla goto err; 187404b71175SSathya Perla } 187504b71175SSathya Perla 18769aebddd1SJeff Kirsher req = embedded_payload(wrb); 18779aebddd1SJeff Kirsher 1878106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1879a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1880a2cc4e0bSSathya Perla NULL); 188104b71175SSathya Perla status = be_mcc_notify_wait(adapter); 18829aebddd1SJeff Kirsher if (!status) { 18839aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1884acbafeb1SSathya Perla 1885242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1886242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1887242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1888242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 18899aebddd1SJeff Kirsher } 189004b71175SSathya Perla err: 1891b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 18929aebddd1SJeff Kirsher return status; 18939aebddd1SJeff Kirsher } 18949aebddd1SJeff Kirsher 18959aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 18969aebddd1SJeff Kirsher * Uses async mcc 18979aebddd1SJeff Kirsher */ 1898b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1899b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 19009aebddd1SJeff Kirsher { 19019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19029aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 19032632bafdSSathya Perla int status = 0, i; 19049aebddd1SJeff Kirsher 1905b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19069aebddd1SJeff Kirsher 19079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19089aebddd1SJeff Kirsher if (!wrb) { 19099aebddd1SJeff Kirsher status = -EBUSY; 19109aebddd1SJeff Kirsher goto err; 19119aebddd1SJeff Kirsher } 19129aebddd1SJeff Kirsher req = embedded_payload(wrb); 19139aebddd1SJeff Kirsher 1914106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1915a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1916a2cc4e0bSSathya Perla NULL); 19179aebddd1SJeff Kirsher 19182632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 19192632bafdSSathya Perla for (i = 0; i < num; i++) { 19202632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 19212632bafdSSathya Perla req->set_eqd[i].phase = 0; 19222632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 19232632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 19242632bafdSSathya Perla } 19259aebddd1SJeff Kirsher 1926efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 19279aebddd1SJeff Kirsher err: 1928b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19299aebddd1SJeff Kirsher return status; 19309aebddd1SJeff Kirsher } 19319aebddd1SJeff Kirsher 193293676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 193393676703SKalesh AP int num) 193493676703SKalesh AP { 193593676703SKalesh AP int num_eqs, i = 0; 193693676703SKalesh AP 193793676703SKalesh AP while (num) { 193893676703SKalesh AP num_eqs = min(num, 8); 193993676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 194093676703SKalesh AP i += num_eqs; 194193676703SKalesh AP num -= num_eqs; 194293676703SKalesh AP } 194393676703SKalesh AP 194493676703SKalesh AP return 0; 194593676703SKalesh AP } 194693676703SKalesh AP 19479aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 19489aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1949435452aaSVasundhara Volam u32 num, u32 domain) 19509aebddd1SJeff Kirsher { 19519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19529aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 19539aebddd1SJeff Kirsher int status; 19549aebddd1SJeff Kirsher 1955b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19569aebddd1SJeff Kirsher 19579aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19589aebddd1SJeff Kirsher if (!wrb) { 19599aebddd1SJeff Kirsher status = -EBUSY; 19609aebddd1SJeff Kirsher goto err; 19619aebddd1SJeff Kirsher } 19629aebddd1SJeff Kirsher req = embedded_payload(wrb); 19639aebddd1SJeff Kirsher 1964106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1965a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1966a2cc4e0bSSathya Perla wrb, NULL); 1967435452aaSVasundhara Volam req->hdr.domain = domain; 19689aebddd1SJeff Kirsher 19699aebddd1SJeff Kirsher req->interface_id = if_id; 1970012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 19719aebddd1SJeff Kirsher req->num_vlan = num; 19729aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 19739aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 19749aebddd1SJeff Kirsher 19759aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19769aebddd1SJeff Kirsher err: 1977b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19789aebddd1SJeff Kirsher return status; 19799aebddd1SJeff Kirsher } 19809aebddd1SJeff Kirsher 1981ac34b743SSathya Perla static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 19829aebddd1SJeff Kirsher { 19839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19849aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 19859aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 19869aebddd1SJeff Kirsher int status; 19879aebddd1SJeff Kirsher 1988b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19899aebddd1SJeff Kirsher 19909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19919aebddd1SJeff Kirsher if (!wrb) { 19929aebddd1SJeff Kirsher status = -EBUSY; 19939aebddd1SJeff Kirsher goto err; 19949aebddd1SJeff Kirsher } 19959aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1996106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1997106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1998106df1e3SSomnath Kotur wrb, mem); 19999aebddd1SJeff Kirsher 20009aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2001ac34b743SSathya Perla req->if_flags_mask = cpu_to_le32(flags); 2002ac34b743SSathya Perla req->if_flags = (value == ON) ? req->if_flags_mask : 0; 2003d9d604f8SAjit Khaparde 2004ac34b743SSathya Perla if (flags & BE_IF_FLAGS_MULTICAST) { 2005b7172414SSathya Perla int i; 20069aebddd1SJeff Kirsher 20071610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 20081610c79fSPadmanabh Ratnakar * and not setting flags field 20091610c79fSPadmanabh Ratnakar */ 20101610c79fSPadmanabh Ratnakar req->if_flags_mask |= 2011abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 201292bf14abSSathya Perla be_if_cap_flags(adapter)); 2013b7172414SSathya Perla req->mcast_num = cpu_to_le32(adapter->mc_count); 2014b7172414SSathya Perla for (i = 0; i < adapter->mc_count; i++) 2015b7172414SSathya Perla ether_addr_copy(req->mcast_mac[i].byte, 2016b7172414SSathya Perla adapter->mc_list[i].mac); 20179aebddd1SJeff Kirsher } 20189aebddd1SJeff Kirsher 2019b6588879SSathya Perla status = be_mcc_notify_wait(adapter); 20209aebddd1SJeff Kirsher err: 2021b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 20229aebddd1SJeff Kirsher return status; 20239aebddd1SJeff Kirsher } 20249aebddd1SJeff Kirsher 2025ac34b743SSathya Perla int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 2026ac34b743SSathya Perla { 2027ac34b743SSathya Perla struct device *dev = &adapter->pdev->dev; 2028ac34b743SSathya Perla 2029ac34b743SSathya Perla if ((flags & be_if_cap_flags(adapter)) != flags) { 2030ac34b743SSathya Perla dev_warn(dev, "Cannot set rx filter flags 0x%x\n", flags); 2031ac34b743SSathya Perla dev_warn(dev, "Interface is capable of 0x%x flags only\n", 2032ac34b743SSathya Perla be_if_cap_flags(adapter)); 2033ac34b743SSathya Perla } 2034ac34b743SSathya Perla flags &= be_if_cap_flags(adapter); 2035196e3735SKalesh AP if (!flags) 2036196e3735SKalesh AP return -ENOTSUPP; 2037ac34b743SSathya Perla 2038ac34b743SSathya Perla return __be_cmd_rx_filter(adapter, flags, value); 2039ac34b743SSathya Perla } 2040ac34b743SSathya Perla 20419aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 20429aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 20439aebddd1SJeff Kirsher { 20449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20459aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 20469aebddd1SJeff Kirsher int status; 20479aebddd1SJeff Kirsher 2048f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 2049f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2050f25b119cSPadmanabh Ratnakar return -EPERM; 2051f25b119cSPadmanabh Ratnakar 2052b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20539aebddd1SJeff Kirsher 20549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20559aebddd1SJeff Kirsher if (!wrb) { 20569aebddd1SJeff Kirsher status = -EBUSY; 20579aebddd1SJeff Kirsher goto err; 20589aebddd1SJeff Kirsher } 20599aebddd1SJeff Kirsher req = embedded_payload(wrb); 20609aebddd1SJeff Kirsher 2061106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2062a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 2063a2cc4e0bSSathya Perla wrb, NULL); 20649aebddd1SJeff Kirsher 2065b29812c1SSuresh Reddy req->hdr.version = 1; 20669aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 20679aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 20689aebddd1SJeff Kirsher 20699aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20709aebddd1SJeff Kirsher 20719aebddd1SJeff Kirsher err: 2072b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2073b29812c1SSuresh Reddy 2074b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 2075b29812c1SSuresh Reddy return -EOPNOTSUPP; 2076b29812c1SSuresh Reddy 20779aebddd1SJeff Kirsher return status; 20789aebddd1SJeff Kirsher } 20799aebddd1SJeff Kirsher 20809aebddd1SJeff Kirsher /* Uses sycn mcc */ 20819aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 20829aebddd1SJeff Kirsher { 20839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20849aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20859aebddd1SJeff Kirsher int status; 20869aebddd1SJeff Kirsher 2087f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2088f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2089f25b119cSPadmanabh Ratnakar return -EPERM; 2090f25b119cSPadmanabh Ratnakar 2091b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20949aebddd1SJeff Kirsher if (!wrb) { 20959aebddd1SJeff Kirsher status = -EBUSY; 20969aebddd1SJeff Kirsher goto err; 20979aebddd1SJeff Kirsher } 20989aebddd1SJeff Kirsher req = embedded_payload(wrb); 20999aebddd1SJeff Kirsher 2100106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2101a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2102a2cc4e0bSSathya Perla wrb, NULL); 21039aebddd1SJeff Kirsher 21049aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21059aebddd1SJeff Kirsher if (!status) { 21069aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 21079aebddd1SJeff Kirsher embedded_payload(wrb); 210803d28ffeSKalesh AP 21099aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 21109aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 21119aebddd1SJeff Kirsher } 21129aebddd1SJeff Kirsher 21139aebddd1SJeff Kirsher err: 2114b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 21159aebddd1SJeff Kirsher return status; 21169aebddd1SJeff Kirsher } 21179aebddd1SJeff Kirsher 21189aebddd1SJeff Kirsher /* Uses mbox */ 2119e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 21209aebddd1SJeff Kirsher { 21219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21229aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 21239aebddd1SJeff Kirsher int status; 21249aebddd1SJeff Kirsher 21259aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21269aebddd1SJeff Kirsher return -1; 21279aebddd1SJeff Kirsher 21289aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21299aebddd1SJeff Kirsher req = embedded_payload(wrb); 21309aebddd1SJeff Kirsher 2131106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2132a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2133a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21349aebddd1SJeff Kirsher 21359aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21369aebddd1SJeff Kirsher if (!status) { 21379aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 213803d28ffeSKalesh AP 2139e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2140e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2141e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2142e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2143acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2144acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2145acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 21469aebddd1SJeff Kirsher } 21479aebddd1SJeff Kirsher 21489aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21499aebddd1SJeff Kirsher return status; 21509aebddd1SJeff Kirsher } 21519aebddd1SJeff Kirsher 21529aebddd1SJeff Kirsher /* Uses mbox */ 21539aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 21549aebddd1SJeff Kirsher { 21559aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21569aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 21579aebddd1SJeff Kirsher int status; 21589aebddd1SJeff Kirsher 2159bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2160bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2161bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 21629fa465c0SSathya Perla status = lancer_wait_ready(adapter); 21639fa465c0SSathya Perla if (status) 2164bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2165bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2166bf99e50dSPadmanabh Ratnakar return status; 2167bf99e50dSPadmanabh Ratnakar } 2168bf99e50dSPadmanabh Ratnakar 21699aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21709aebddd1SJeff Kirsher return -1; 21719aebddd1SJeff Kirsher 21729aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21739aebddd1SJeff Kirsher req = embedded_payload(wrb); 21749aebddd1SJeff Kirsher 2175106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2176a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2177a2cc4e0bSSathya Perla NULL); 21789aebddd1SJeff Kirsher 21799aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21809aebddd1SJeff Kirsher 21819aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21829aebddd1SJeff Kirsher return status; 21839aebddd1SJeff Kirsher } 21849aebddd1SJeff Kirsher 2185594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 218633cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21879aebddd1SJeff Kirsher { 21889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21899aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21909aebddd1SJeff Kirsher int status; 21919aebddd1SJeff Kirsher 2192da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2193da1388d6SVasundhara Volam return 0; 2194da1388d6SVasundhara Volam 2195b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 21969aebddd1SJeff Kirsher 2197b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2198b51aa367SKalesh AP if (!wrb) { 2199b51aa367SKalesh AP status = -EBUSY; 2200b51aa367SKalesh AP goto err; 2201b51aa367SKalesh AP } 22029aebddd1SJeff Kirsher req = embedded_payload(wrb); 22039aebddd1SJeff Kirsher 2204106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2205106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 22069aebddd1SJeff Kirsher 22079aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2208594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 22099aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2210594ad54aSSuresh Reddy 2211b51aa367SKalesh AP if (!BEx_chip(adapter)) 2212594ad54aSSuresh Reddy req->hdr.version = 1; 2213594ad54aSSuresh Reddy 22149aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2215e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 22169aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 22179aebddd1SJeff Kirsher 2218b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2219b51aa367SKalesh AP err: 2220b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22219aebddd1SJeff Kirsher return status; 22229aebddd1SJeff Kirsher } 22239aebddd1SJeff Kirsher 22249aebddd1SJeff Kirsher /* Uses sync mcc */ 22259aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 22269aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 22279aebddd1SJeff Kirsher { 22289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22299aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 22309aebddd1SJeff Kirsher int status; 22319aebddd1SJeff Kirsher 2232b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22339aebddd1SJeff Kirsher 22349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22359aebddd1SJeff Kirsher if (!wrb) { 22369aebddd1SJeff Kirsher status = -EBUSY; 22379aebddd1SJeff Kirsher goto err; 22389aebddd1SJeff Kirsher } 22399aebddd1SJeff Kirsher req = embedded_payload(wrb); 22409aebddd1SJeff Kirsher 2241106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2242a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2243a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 22449aebddd1SJeff Kirsher 22459aebddd1SJeff Kirsher req->port_num = port_num; 22469aebddd1SJeff Kirsher req->beacon_state = state; 22479aebddd1SJeff Kirsher req->beacon_duration = bcn; 22489aebddd1SJeff Kirsher req->status_duration = sts; 22499aebddd1SJeff Kirsher 22509aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22519aebddd1SJeff Kirsher 22529aebddd1SJeff Kirsher err: 2253b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22549aebddd1SJeff Kirsher return status; 22559aebddd1SJeff Kirsher } 22569aebddd1SJeff Kirsher 22579aebddd1SJeff Kirsher /* Uses sync mcc */ 22589aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 22599aebddd1SJeff Kirsher { 22609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22619aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 22629aebddd1SJeff Kirsher int status; 22639aebddd1SJeff Kirsher 2264b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22659aebddd1SJeff Kirsher 22669aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22679aebddd1SJeff Kirsher if (!wrb) { 22689aebddd1SJeff Kirsher status = -EBUSY; 22699aebddd1SJeff Kirsher goto err; 22709aebddd1SJeff Kirsher } 22719aebddd1SJeff Kirsher req = embedded_payload(wrb); 22729aebddd1SJeff Kirsher 2273106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2274a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2275a2cc4e0bSSathya Perla wrb, NULL); 22769aebddd1SJeff Kirsher 22779aebddd1SJeff Kirsher req->port_num = port_num; 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22809aebddd1SJeff Kirsher if (!status) { 22819aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22829aebddd1SJeff Kirsher embedded_payload(wrb); 228303d28ffeSKalesh AP 22849aebddd1SJeff Kirsher *state = resp->beacon_state; 22859aebddd1SJeff Kirsher } 22869aebddd1SJeff Kirsher 22879aebddd1SJeff Kirsher err: 2288b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22899aebddd1SJeff Kirsher return status; 22909aebddd1SJeff Kirsher } 22919aebddd1SJeff Kirsher 2292e36edd9dSMark Leonard /* Uses sync mcc */ 2293e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2294e36edd9dSMark Leonard u8 page_num, u8 *data) 2295e36edd9dSMark Leonard { 2296e36edd9dSMark Leonard struct be_dma_mem cmd; 2297e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2298e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2299e36edd9dSMark Leonard int status; 2300e36edd9dSMark Leonard 2301e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2302e36edd9dSMark Leonard return -EINVAL; 2303e36edd9dSMark Leonard 2304e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2305750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 2306e51000dbSSriharsha Basavapatna GFP_ATOMIC); 2307e36edd9dSMark Leonard if (!cmd.va) { 2308e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2309e36edd9dSMark Leonard return -ENOMEM; 2310e36edd9dSMark Leonard } 2311e36edd9dSMark Leonard 2312b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2313e36edd9dSMark Leonard 2314e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2315e36edd9dSMark Leonard if (!wrb) { 2316e36edd9dSMark Leonard status = -EBUSY; 2317e36edd9dSMark Leonard goto err; 2318e36edd9dSMark Leonard } 2319e36edd9dSMark Leonard req = cmd.va; 2320e36edd9dSMark Leonard 2321e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2322e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2323e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2324e36edd9dSMark Leonard 2325e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2326e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2327e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2328e36edd9dSMark Leonard if (!status) { 2329e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2330e36edd9dSMark Leonard 2331e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2332e36edd9dSMark Leonard } 2333e36edd9dSMark Leonard err: 2334b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2335e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2336e36edd9dSMark Leonard return status; 2337e36edd9dSMark Leonard } 2338e36edd9dSMark Leonard 2339a23113b5SSuresh Reddy static int lancer_cmd_write_object(struct be_adapter *adapter, 2340a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 data_size, 2341a23113b5SSuresh Reddy u32 data_offset, const char *obj_name, 2342a23113b5SSuresh Reddy u32 *data_written, u8 *change_status, 2343a23113b5SSuresh Reddy u8 *addn_status) 23449aebddd1SJeff Kirsher { 23459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23469aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 23479aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 23489aebddd1SJeff Kirsher void *ctxt = NULL; 23499aebddd1SJeff Kirsher int status; 23509aebddd1SJeff Kirsher 2351b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 23529aebddd1SJeff Kirsher adapter->flash_status = 0; 23539aebddd1SJeff Kirsher 23549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23559aebddd1SJeff Kirsher if (!wrb) { 23569aebddd1SJeff Kirsher status = -EBUSY; 23579aebddd1SJeff Kirsher goto err_unlock; 23589aebddd1SJeff Kirsher } 23599aebddd1SJeff Kirsher 23609aebddd1SJeff Kirsher req = embedded_payload(wrb); 23619aebddd1SJeff Kirsher 2362106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 23639aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2364106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2365106df1e3SSomnath Kotur NULL); 23669aebddd1SJeff Kirsher 23679aebddd1SJeff Kirsher ctxt = &req->context; 23689aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23699aebddd1SJeff Kirsher write_length, ctxt, data_size); 23709aebddd1SJeff Kirsher 23719aebddd1SJeff Kirsher if (data_size == 0) 23729aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23739aebddd1SJeff Kirsher eof, ctxt, 1); 23749aebddd1SJeff Kirsher else 23759aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23769aebddd1SJeff Kirsher eof, ctxt, 0); 23779aebddd1SJeff Kirsher 23789aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 23799aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2380242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23819aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23829aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23839aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23849aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23859aebddd1SJeff Kirsher & 0xFFFFFFFF); 23869aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23879aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23889aebddd1SJeff Kirsher 2389efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2390efaa408eSSuresh Reddy if (status) 2391efaa408eSSuresh Reddy goto err_unlock; 2392efaa408eSSuresh Reddy 2393b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 23949aebddd1SJeff Kirsher 23955eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2396701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2397fd45160cSKalesh AP status = -ETIMEDOUT; 23989aebddd1SJeff Kirsher else 23999aebddd1SJeff Kirsher status = adapter->flash_status; 24009aebddd1SJeff Kirsher 24019aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2402f67ef7baSPadmanabh Ratnakar if (!status) { 24039aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2404f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2405f67ef7baSPadmanabh Ratnakar } else { 24069aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2407f67ef7baSPadmanabh Ratnakar } 24089aebddd1SJeff Kirsher 24099aebddd1SJeff Kirsher return status; 24109aebddd1SJeff Kirsher 24119aebddd1SJeff Kirsher err_unlock: 2412b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 24139aebddd1SJeff Kirsher return status; 24149aebddd1SJeff Kirsher } 24159aebddd1SJeff Kirsher 24166809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 24176809cee0SRavikumar Nelavelli { 24186809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 24196809cee0SRavikumar Nelavelli int status; 24206809cee0SRavikumar Nelavelli 24216809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 24226809cee0SRavikumar Nelavelli page_data); 24236809cee0SRavikumar Nelavelli if (!status) { 24246809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 24256809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 24266809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24276809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 24286809cee0SRavikumar Nelavelli break; 24296809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 24306809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24316809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 24326809cee0SRavikumar Nelavelli break; 24336809cee0SRavikumar Nelavelli default: 24346809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 24356809cee0SRavikumar Nelavelli break; 24366809cee0SRavikumar Nelavelli } 24376809cee0SRavikumar Nelavelli } 24386809cee0SRavikumar Nelavelli return status; 24396809cee0SRavikumar Nelavelli } 24406809cee0SRavikumar Nelavelli 244121252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter) 244221252377SVasundhara Volam { 244321252377SVasundhara Volam u8 page_data[PAGE_DATA_LEN]; 244421252377SVasundhara Volam int status; 244521252377SVasundhara Volam 244621252377SVasundhara Volam status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 244721252377SVasundhara Volam page_data); 244821252377SVasundhara Volam if (!status) { 244921252377SVasundhara Volam strlcpy(adapter->phy.vendor_name, page_data + 245021252377SVasundhara Volam SFP_VENDOR_NAME_OFFSET, SFP_VENDOR_NAME_LEN - 1); 245121252377SVasundhara Volam strlcpy(adapter->phy.vendor_pn, 245221252377SVasundhara Volam page_data + SFP_VENDOR_PN_OFFSET, 245321252377SVasundhara Volam SFP_VENDOR_NAME_LEN - 1); 245421252377SVasundhara Volam } 245521252377SVasundhara Volam 245621252377SVasundhara Volam return status; 245721252377SVasundhara Volam } 245821252377SVasundhara Volam 2459a23113b5SSuresh Reddy static int lancer_cmd_delete_object(struct be_adapter *adapter, 2460a23113b5SSuresh Reddy const char *obj_name) 2461f0613380SKalesh AP { 2462f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2463f0613380SKalesh AP struct be_mcc_wrb *wrb; 2464f0613380SKalesh AP int status; 2465f0613380SKalesh AP 2466b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2467f0613380SKalesh AP 2468f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2469f0613380SKalesh AP if (!wrb) { 2470f0613380SKalesh AP status = -EBUSY; 2471f0613380SKalesh AP goto err; 2472f0613380SKalesh AP } 2473f0613380SKalesh AP 2474f0613380SKalesh AP req = embedded_payload(wrb); 2475f0613380SKalesh AP 2476f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2477f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2478f0613380SKalesh AP sizeof(*req), wrb, NULL); 2479f0613380SKalesh AP 2480242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2481f0613380SKalesh AP 2482f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2483f0613380SKalesh AP err: 2484b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2485f0613380SKalesh AP return status; 2486f0613380SKalesh AP } 2487f0613380SKalesh AP 2488de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2489de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2490de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2491de49bd5aSPadmanabh Ratnakar { 2492de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2493de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2494de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2495de49bd5aSPadmanabh Ratnakar int status; 2496de49bd5aSPadmanabh Ratnakar 2497b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2498de49bd5aSPadmanabh Ratnakar 2499de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2500de49bd5aSPadmanabh Ratnakar if (!wrb) { 2501de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2502de49bd5aSPadmanabh Ratnakar goto err_unlock; 2503de49bd5aSPadmanabh Ratnakar } 2504de49bd5aSPadmanabh Ratnakar 2505de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2506de49bd5aSPadmanabh Ratnakar 2507de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2508de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2509de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2510de49bd5aSPadmanabh Ratnakar NULL); 2511de49bd5aSPadmanabh Ratnakar 2512de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2513de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2514de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2515de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2516de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2517de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2518de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2519de49bd5aSPadmanabh Ratnakar 2520de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2521de49bd5aSPadmanabh Ratnakar 2522de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2523de49bd5aSPadmanabh Ratnakar if (!status) { 2524de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2525de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2526de49bd5aSPadmanabh Ratnakar } else { 2527de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2528de49bd5aSPadmanabh Ratnakar } 2529de49bd5aSPadmanabh Ratnakar 2530de49bd5aSPadmanabh Ratnakar err_unlock: 2531b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2532de49bd5aSPadmanabh Ratnakar return status; 2533de49bd5aSPadmanabh Ratnakar } 2534de49bd5aSPadmanabh Ratnakar 2535a23113b5SSuresh Reddy static int be_cmd_write_flashrom(struct be_adapter *adapter, 2536a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 flash_type, 2537a23113b5SSuresh Reddy u32 flash_opcode, u32 img_offset, u32 buf_size) 25389aebddd1SJeff Kirsher { 25399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25409aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 25419aebddd1SJeff Kirsher int status; 25429aebddd1SJeff Kirsher 2543b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25449aebddd1SJeff Kirsher adapter->flash_status = 0; 25459aebddd1SJeff Kirsher 25469aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25479aebddd1SJeff Kirsher if (!wrb) { 25489aebddd1SJeff Kirsher status = -EBUSY; 25499aebddd1SJeff Kirsher goto err_unlock; 25509aebddd1SJeff Kirsher } 25519aebddd1SJeff Kirsher req = cmd->va; 25529aebddd1SJeff Kirsher 2553106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2554a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2555a2cc4e0bSSathya Perla cmd); 25569aebddd1SJeff Kirsher 25579aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 255870a7b525SVasundhara Volam if (flash_type == OPTYPE_OFFSET_SPECIFIED) 255970a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset); 256070a7b525SVasundhara Volam 25619aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 25629aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 25639aebddd1SJeff Kirsher 2564efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2565efaa408eSSuresh Reddy if (status) 2566efaa408eSSuresh Reddy goto err_unlock; 2567efaa408eSSuresh Reddy 2568b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25699aebddd1SJeff Kirsher 25705eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2571e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2572fd45160cSKalesh AP status = -ETIMEDOUT; 25739aebddd1SJeff Kirsher else 25749aebddd1SJeff Kirsher status = adapter->flash_status; 25759aebddd1SJeff Kirsher 25769aebddd1SJeff Kirsher return status; 25779aebddd1SJeff Kirsher 25789aebddd1SJeff Kirsher err_unlock: 2579b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25809aebddd1SJeff Kirsher return status; 25819aebddd1SJeff Kirsher } 25829aebddd1SJeff Kirsher 2583a23113b5SSuresh Reddy static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 258470a7b525SVasundhara Volam u16 img_optype, u32 img_offset, u32 crc_offset) 25859aebddd1SJeff Kirsher { 2586be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 258770a7b525SVasundhara Volam struct be_mcc_wrb *wrb; 25889aebddd1SJeff Kirsher int status; 25899aebddd1SJeff Kirsher 2590b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25919aebddd1SJeff Kirsher 25929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25939aebddd1SJeff Kirsher if (!wrb) { 25949aebddd1SJeff Kirsher status = -EBUSY; 25959aebddd1SJeff Kirsher goto err; 25969aebddd1SJeff Kirsher } 25979aebddd1SJeff Kirsher req = embedded_payload(wrb); 25989aebddd1SJeff Kirsher 2599106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2600be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2601be716446SPadmanabh Ratnakar wrb, NULL); 26029aebddd1SJeff Kirsher 260370a7b525SVasundhara Volam req->params.op_type = cpu_to_le32(img_optype); 260470a7b525SVasundhara Volam if (img_optype == OPTYPE_OFFSET_SPECIFIED) 260570a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset + crc_offset); 260670a7b525SVasundhara Volam else 260770a7b525SVasundhara Volam req->params.offset = cpu_to_le32(crc_offset); 260870a7b525SVasundhara Volam 26099aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 26109aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 26119aebddd1SJeff Kirsher 26129aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26139aebddd1SJeff Kirsher if (!status) 2614be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 26159aebddd1SJeff Kirsher 26169aebddd1SJeff Kirsher err: 2617b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 26189aebddd1SJeff Kirsher return status; 26199aebddd1SJeff Kirsher } 26209aebddd1SJeff Kirsher 2621a23113b5SSuresh Reddy static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; 2622a23113b5SSuresh Reddy 2623a23113b5SSuresh Reddy static bool phy_flashing_required(struct be_adapter *adapter) 2624a23113b5SSuresh Reddy { 2625a23113b5SSuresh Reddy return (adapter->phy.phy_type == PHY_TYPE_TN_8022 && 2626a23113b5SSuresh Reddy adapter->phy.interface_type == PHY_TYPE_BASET_10GB); 2627a23113b5SSuresh Reddy } 2628a23113b5SSuresh Reddy 2629a23113b5SSuresh Reddy static bool is_comp_in_ufi(struct be_adapter *adapter, 2630a23113b5SSuresh Reddy struct flash_section_info *fsec, int type) 2631a23113b5SSuresh Reddy { 2632a23113b5SSuresh Reddy int i = 0, img_type = 0; 2633a23113b5SSuresh Reddy struct flash_section_info_g2 *fsec_g2 = NULL; 2634a23113b5SSuresh Reddy 2635a23113b5SSuresh Reddy if (BE2_chip(adapter)) 2636a23113b5SSuresh Reddy fsec_g2 = (struct flash_section_info_g2 *)fsec; 2637a23113b5SSuresh Reddy 2638a23113b5SSuresh Reddy for (i = 0; i < MAX_FLASH_COMP; i++) { 2639a23113b5SSuresh Reddy if (fsec_g2) 2640a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); 2641a23113b5SSuresh Reddy else 2642a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2643a23113b5SSuresh Reddy 2644a23113b5SSuresh Reddy if (img_type == type) 2645a23113b5SSuresh Reddy return true; 2646a23113b5SSuresh Reddy } 2647a23113b5SSuresh Reddy return false; 2648a23113b5SSuresh Reddy } 2649a23113b5SSuresh Reddy 2650a23113b5SSuresh Reddy static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, 2651a23113b5SSuresh Reddy int header_size, 2652a23113b5SSuresh Reddy const struct firmware *fw) 2653a23113b5SSuresh Reddy { 2654a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2655a23113b5SSuresh Reddy const u8 *p = fw->data; 2656a23113b5SSuresh Reddy 2657a23113b5SSuresh Reddy p += header_size; 2658a23113b5SSuresh Reddy while (p < (fw->data + fw->size)) { 2659a23113b5SSuresh Reddy fsec = (struct flash_section_info *)p; 2660a23113b5SSuresh Reddy if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) 2661a23113b5SSuresh Reddy return fsec; 2662a23113b5SSuresh Reddy p += 32; 2663a23113b5SSuresh Reddy } 2664a23113b5SSuresh Reddy return NULL; 2665a23113b5SSuresh Reddy } 2666a23113b5SSuresh Reddy 2667a23113b5SSuresh Reddy static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p, 2668a23113b5SSuresh Reddy u32 img_offset, u32 img_size, int hdr_size, 2669a23113b5SSuresh Reddy u16 img_optype, bool *crc_match) 2670a23113b5SSuresh Reddy { 2671a23113b5SSuresh Reddy u32 crc_offset; 2672a23113b5SSuresh Reddy int status; 2673a23113b5SSuresh Reddy u8 crc[4]; 2674a23113b5SSuresh Reddy 2675a23113b5SSuresh Reddy status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset, 2676a23113b5SSuresh Reddy img_size - 4); 2677a23113b5SSuresh Reddy if (status) 2678a23113b5SSuresh Reddy return status; 2679a23113b5SSuresh Reddy 2680a23113b5SSuresh Reddy crc_offset = hdr_size + img_offset + img_size - 4; 2681a23113b5SSuresh Reddy 2682a23113b5SSuresh Reddy /* Skip flashing, if crc of flashed region matches */ 2683a23113b5SSuresh Reddy if (!memcmp(crc, p + crc_offset, 4)) 2684a23113b5SSuresh Reddy *crc_match = true; 2685a23113b5SSuresh Reddy else 2686a23113b5SSuresh Reddy *crc_match = false; 2687a23113b5SSuresh Reddy 2688a23113b5SSuresh Reddy return status; 2689a23113b5SSuresh Reddy } 2690a23113b5SSuresh Reddy 2691a23113b5SSuresh Reddy static int be_flash(struct be_adapter *adapter, const u8 *img, 2692a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int optype, int img_size, 2693a23113b5SSuresh Reddy u32 img_offset) 2694a23113b5SSuresh Reddy { 2695a23113b5SSuresh Reddy u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0; 2696a23113b5SSuresh Reddy struct be_cmd_write_flashrom *req = flash_cmd->va; 2697a23113b5SSuresh Reddy int status; 2698a23113b5SSuresh Reddy 2699a23113b5SSuresh Reddy while (total_bytes) { 2700a23113b5SSuresh Reddy num_bytes = min_t(u32, 32 * 1024, total_bytes); 2701a23113b5SSuresh Reddy 2702a23113b5SSuresh Reddy total_bytes -= num_bytes; 2703a23113b5SSuresh Reddy 2704a23113b5SSuresh Reddy if (!total_bytes) { 2705a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2706a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_FLASH; 2707a23113b5SSuresh Reddy else 2708a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_FLASH; 2709a23113b5SSuresh Reddy } else { 2710a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2711a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_SAVE; 2712a23113b5SSuresh Reddy else 2713a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_SAVE; 2714a23113b5SSuresh Reddy } 2715a23113b5SSuresh Reddy 2716a23113b5SSuresh Reddy memcpy(req->data_buf, img, num_bytes); 2717a23113b5SSuresh Reddy img += num_bytes; 2718a23113b5SSuresh Reddy status = be_cmd_write_flashrom(adapter, flash_cmd, optype, 2719a23113b5SSuresh Reddy flash_op, img_offset + 2720a23113b5SSuresh Reddy bytes_sent, num_bytes); 2721a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST && 2722a23113b5SSuresh Reddy optype == OPTYPE_PHY_FW) 2723a23113b5SSuresh Reddy break; 2724a23113b5SSuresh Reddy else if (status) 2725a23113b5SSuresh Reddy return status; 2726a23113b5SSuresh Reddy 2727a23113b5SSuresh Reddy bytes_sent += num_bytes; 2728a23113b5SSuresh Reddy } 2729a23113b5SSuresh Reddy return 0; 2730a23113b5SSuresh Reddy } 2731a23113b5SSuresh Reddy 2732f5ef017eSSriharsha Basavapatna #define NCSI_UPDATE_LOG "NCSI section update is not supported in FW ver %s\n" 2733f5ef017eSSriharsha Basavapatna static bool be_fw_ncsi_supported(char *ver) 2734f5ef017eSSriharsha Basavapatna { 2735f5ef017eSSriharsha Basavapatna int v1[4] = {3, 102, 148, 0}; /* Min ver that supports NCSI FW */ 2736f5ef017eSSriharsha Basavapatna int v2[4]; 2737f5ef017eSSriharsha Basavapatna int i; 2738f5ef017eSSriharsha Basavapatna 2739f5ef017eSSriharsha Basavapatna if (sscanf(ver, "%d.%d.%d.%d", &v2[0], &v2[1], &v2[2], &v2[3]) != 4) 2740f5ef017eSSriharsha Basavapatna return false; 2741f5ef017eSSriharsha Basavapatna 2742f5ef017eSSriharsha Basavapatna for (i = 0; i < 4; i++) { 2743f5ef017eSSriharsha Basavapatna if (v1[i] < v2[i]) 2744f5ef017eSSriharsha Basavapatna return true; 2745f5ef017eSSriharsha Basavapatna else if (v1[i] > v2[i]) 2746f5ef017eSSriharsha Basavapatna return false; 2747f5ef017eSSriharsha Basavapatna } 2748f5ef017eSSriharsha Basavapatna 2749f5ef017eSSriharsha Basavapatna return true; 2750f5ef017eSSriharsha Basavapatna } 2751f5ef017eSSriharsha Basavapatna 2752a23113b5SSuresh Reddy /* For BE2, BE3 and BE3-R */ 2753a23113b5SSuresh Reddy static int be_flash_BEx(struct be_adapter *adapter, 2754a23113b5SSuresh Reddy const struct firmware *fw, 2755a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2756a23113b5SSuresh Reddy { 2757a23113b5SSuresh Reddy int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); 2758a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2759a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2760a23113b5SSuresh Reddy int status, i, filehdr_size, num_comp; 2761a23113b5SSuresh Reddy const struct flash_comp *pflashcomp; 2762a23113b5SSuresh Reddy bool crc_match; 2763a23113b5SSuresh Reddy const u8 *p; 2764a23113b5SSuresh Reddy 2765a23113b5SSuresh Reddy struct flash_comp gen3_flash_types[] = { 2766a23113b5SSuresh Reddy { BE3_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2767a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2768a23113b5SSuresh Reddy { BE3_REDBOOT_START, OPTYPE_REDBOOT, 2769a23113b5SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2770a23113b5SSuresh Reddy { BE3_ISCSI_BIOS_START, OPTYPE_BIOS, 2771a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2772a23113b5SSuresh Reddy { BE3_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2773a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2774a23113b5SSuresh Reddy { BE3_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2775a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2776a23113b5SSuresh Reddy { BE3_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2777a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2778a23113b5SSuresh Reddy { BE3_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2779a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2780a23113b5SSuresh Reddy { BE3_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2781a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE}, 2782a23113b5SSuresh Reddy { BE3_NCSI_START, OPTYPE_NCSI_FW, 2783a23113b5SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE, IMAGE_NCSI}, 2784a23113b5SSuresh Reddy { BE3_PHY_FW_START, OPTYPE_PHY_FW, 2785a23113b5SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE, IMAGE_FIRMWARE_PHY} 2786a23113b5SSuresh Reddy }; 2787a23113b5SSuresh Reddy 2788a23113b5SSuresh Reddy struct flash_comp gen2_flash_types[] = { 2789a23113b5SSuresh Reddy { BE2_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2790a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2791a23113b5SSuresh Reddy { BE2_REDBOOT_START, OPTYPE_REDBOOT, 2792a23113b5SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2793a23113b5SSuresh Reddy { BE2_ISCSI_BIOS_START, OPTYPE_BIOS, 2794a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2795a23113b5SSuresh Reddy { BE2_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2796a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2797a23113b5SSuresh Reddy { BE2_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2798a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2799a23113b5SSuresh Reddy { BE2_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2800a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2801a23113b5SSuresh Reddy { BE2_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2802a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2803a23113b5SSuresh Reddy { BE2_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2804a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE} 2805a23113b5SSuresh Reddy }; 2806a23113b5SSuresh Reddy 2807a23113b5SSuresh Reddy if (BE3_chip(adapter)) { 2808a23113b5SSuresh Reddy pflashcomp = gen3_flash_types; 2809a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2810a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen3_flash_types); 2811a23113b5SSuresh Reddy } else { 2812a23113b5SSuresh Reddy pflashcomp = gen2_flash_types; 2813a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g2); 2814a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen2_flash_types); 2815a23113b5SSuresh Reddy img_hdrs_size = 0; 2816a23113b5SSuresh Reddy } 2817a23113b5SSuresh Reddy 2818a23113b5SSuresh Reddy /* Get flash section info*/ 2819a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2820a23113b5SSuresh Reddy if (!fsec) { 2821a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2822a23113b5SSuresh Reddy return -1; 2823a23113b5SSuresh Reddy } 2824a23113b5SSuresh Reddy for (i = 0; i < num_comp; i++) { 2825a23113b5SSuresh Reddy if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) 2826a23113b5SSuresh Reddy continue; 2827a23113b5SSuresh Reddy 2828a23113b5SSuresh Reddy if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && 2829f5ef017eSSriharsha Basavapatna !be_fw_ncsi_supported(adapter->fw_ver)) { 2830f5ef017eSSriharsha Basavapatna dev_info(dev, NCSI_UPDATE_LOG, adapter->fw_ver); 2831a23113b5SSuresh Reddy continue; 2832f5ef017eSSriharsha Basavapatna } 2833a23113b5SSuresh Reddy 2834a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_PHY_FW && 2835a23113b5SSuresh Reddy !phy_flashing_required(adapter)) 2836a23113b5SSuresh Reddy continue; 2837a23113b5SSuresh Reddy 2838a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_REDBOOT) { 2839a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, 2840a23113b5SSuresh Reddy pflashcomp[i].offset, 2841a23113b5SSuresh Reddy pflashcomp[i].size, 2842a23113b5SSuresh Reddy filehdr_size + 2843a23113b5SSuresh Reddy img_hdrs_size, 2844a23113b5SSuresh Reddy OPTYPE_REDBOOT, &crc_match); 2845a23113b5SSuresh Reddy if (status) { 2846a23113b5SSuresh Reddy dev_err(dev, 2847a23113b5SSuresh Reddy "Could not get CRC for 0x%x region\n", 2848a23113b5SSuresh Reddy pflashcomp[i].optype); 2849a23113b5SSuresh Reddy continue; 2850a23113b5SSuresh Reddy } 2851a23113b5SSuresh Reddy 2852a23113b5SSuresh Reddy if (crc_match) 2853a23113b5SSuresh Reddy continue; 2854a23113b5SSuresh Reddy } 2855a23113b5SSuresh Reddy 2856a23113b5SSuresh Reddy p = fw->data + filehdr_size + pflashcomp[i].offset + 2857a23113b5SSuresh Reddy img_hdrs_size; 2858a23113b5SSuresh Reddy if (p + pflashcomp[i].size > fw->data + fw->size) 2859a23113b5SSuresh Reddy return -1; 2860a23113b5SSuresh Reddy 2861a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, 2862a23113b5SSuresh Reddy pflashcomp[i].size, 0); 2863a23113b5SSuresh Reddy if (status) { 2864a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2865a23113b5SSuresh Reddy pflashcomp[i].img_type); 2866a23113b5SSuresh Reddy return status; 2867a23113b5SSuresh Reddy } 2868a23113b5SSuresh Reddy } 2869a23113b5SSuresh Reddy return 0; 2870a23113b5SSuresh Reddy } 2871a23113b5SSuresh Reddy 2872a23113b5SSuresh Reddy static u16 be_get_img_optype(struct flash_section_entry fsec_entry) 2873a23113b5SSuresh Reddy { 2874a23113b5SSuresh Reddy u32 img_type = le32_to_cpu(fsec_entry.type); 2875a23113b5SSuresh Reddy u16 img_optype = le16_to_cpu(fsec_entry.optype); 2876a23113b5SSuresh Reddy 2877a23113b5SSuresh Reddy if (img_optype != 0xFFFF) 2878a23113b5SSuresh Reddy return img_optype; 2879a23113b5SSuresh Reddy 2880a23113b5SSuresh Reddy switch (img_type) { 2881a23113b5SSuresh Reddy case IMAGE_FIRMWARE_ISCSI: 2882a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_ACTIVE; 2883a23113b5SSuresh Reddy break; 2884a23113b5SSuresh Reddy case IMAGE_BOOT_CODE: 2885a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT; 2886a23113b5SSuresh Reddy break; 2887a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_ISCSI: 2888a23113b5SSuresh Reddy img_optype = OPTYPE_BIOS; 2889a23113b5SSuresh Reddy break; 2890a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_PXE: 2891a23113b5SSuresh Reddy img_optype = OPTYPE_PXE_BIOS; 2892a23113b5SSuresh Reddy break; 2893a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_FCOE: 2894a23113b5SSuresh Reddy img_optype = OPTYPE_FCOE_BIOS; 2895a23113b5SSuresh Reddy break; 2896a23113b5SSuresh Reddy case IMAGE_FIRMWARE_BACKUP_ISCSI: 2897a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_BACKUP; 2898a23113b5SSuresh Reddy break; 2899a23113b5SSuresh Reddy case IMAGE_NCSI: 2900a23113b5SSuresh Reddy img_optype = OPTYPE_NCSI_FW; 2901a23113b5SSuresh Reddy break; 2902a23113b5SSuresh Reddy case IMAGE_FLASHISM_JUMPVECTOR: 2903a23113b5SSuresh Reddy img_optype = OPTYPE_FLASHISM_JUMPVECTOR; 2904a23113b5SSuresh Reddy break; 2905a23113b5SSuresh Reddy case IMAGE_FIRMWARE_PHY: 2906a23113b5SSuresh Reddy img_optype = OPTYPE_SH_PHY_FW; 2907a23113b5SSuresh Reddy break; 2908a23113b5SSuresh Reddy case IMAGE_REDBOOT_DIR: 2909a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_DIR; 2910a23113b5SSuresh Reddy break; 2911a23113b5SSuresh Reddy case IMAGE_REDBOOT_CONFIG: 2912a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_CONFIG; 2913a23113b5SSuresh Reddy break; 2914a23113b5SSuresh Reddy case IMAGE_UFI_DIR: 2915a23113b5SSuresh Reddy img_optype = OPTYPE_UFI_DIR; 2916a23113b5SSuresh Reddy break; 2917a23113b5SSuresh Reddy default: 2918a23113b5SSuresh Reddy break; 2919a23113b5SSuresh Reddy } 2920a23113b5SSuresh Reddy 2921a23113b5SSuresh Reddy return img_optype; 2922a23113b5SSuresh Reddy } 2923a23113b5SSuresh Reddy 2924a23113b5SSuresh Reddy static int be_flash_skyhawk(struct be_adapter *adapter, 2925a23113b5SSuresh Reddy const struct firmware *fw, 2926a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2927a23113b5SSuresh Reddy { 2928a23113b5SSuresh Reddy int img_hdrs_size = num_of_images * sizeof(struct image_hdr); 2929a23113b5SSuresh Reddy bool crc_match, old_fw_img, flash_offset_support = true; 2930a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2931a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2932a23113b5SSuresh Reddy u32 img_offset, img_size, img_type; 2933a23113b5SSuresh Reddy u16 img_optype, flash_optype; 2934a23113b5SSuresh Reddy int status, i, filehdr_size; 2935a23113b5SSuresh Reddy const u8 *p; 2936a23113b5SSuresh Reddy 2937a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2938a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2939a23113b5SSuresh Reddy if (!fsec) { 2940a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2941a23113b5SSuresh Reddy return -EINVAL; 2942a23113b5SSuresh Reddy } 2943a23113b5SSuresh Reddy 2944a23113b5SSuresh Reddy retry_flash: 2945a23113b5SSuresh Reddy for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { 2946a23113b5SSuresh Reddy img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); 2947a23113b5SSuresh Reddy img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); 2948a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2949a23113b5SSuresh Reddy img_optype = be_get_img_optype(fsec->fsec_entry[i]); 2950a23113b5SSuresh Reddy old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF; 2951a23113b5SSuresh Reddy 2952a23113b5SSuresh Reddy if (img_optype == 0xFFFF) 2953a23113b5SSuresh Reddy continue; 2954a23113b5SSuresh Reddy 2955a23113b5SSuresh Reddy if (flash_offset_support) 2956a23113b5SSuresh Reddy flash_optype = OPTYPE_OFFSET_SPECIFIED; 2957a23113b5SSuresh Reddy else 2958a23113b5SSuresh Reddy flash_optype = img_optype; 2959a23113b5SSuresh Reddy 2960a23113b5SSuresh Reddy /* Don't bother verifying CRC if an old FW image is being 2961a23113b5SSuresh Reddy * flashed 2962a23113b5SSuresh Reddy */ 2963a23113b5SSuresh Reddy if (old_fw_img) 2964a23113b5SSuresh Reddy goto flash; 2965a23113b5SSuresh Reddy 2966a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, img_offset, 2967a23113b5SSuresh Reddy img_size, filehdr_size + 2968a23113b5SSuresh Reddy img_hdrs_size, flash_optype, 2969a23113b5SSuresh Reddy &crc_match); 2970a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 2971a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_ILLEGAL_FIELD) { 2972a23113b5SSuresh Reddy /* The current FW image on the card does not support 2973a23113b5SSuresh Reddy * OFFSET based flashing. Retry using older mechanism 2974a23113b5SSuresh Reddy * of OPTYPE based flashing 2975a23113b5SSuresh Reddy */ 2976a23113b5SSuresh Reddy if (flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2977a23113b5SSuresh Reddy flash_offset_support = false; 2978a23113b5SSuresh Reddy goto retry_flash; 2979a23113b5SSuresh Reddy } 2980a23113b5SSuresh Reddy 2981a23113b5SSuresh Reddy /* The current FW image on the card does not recognize 2982a23113b5SSuresh Reddy * the new FLASH op_type. The FW download is partially 2983a23113b5SSuresh Reddy * complete. Reboot the server now to enable FW image 2984a23113b5SSuresh Reddy * to recognize the new FLASH op_type. To complete the 2985a23113b5SSuresh Reddy * remaining process, download the same FW again after 2986a23113b5SSuresh Reddy * the reboot. 2987a23113b5SSuresh Reddy */ 2988a23113b5SSuresh Reddy dev_err(dev, "Flash incomplete. Reset the server\n"); 2989a23113b5SSuresh Reddy dev_err(dev, "Download FW image again after reset\n"); 2990a23113b5SSuresh Reddy return -EAGAIN; 2991a23113b5SSuresh Reddy } else if (status) { 2992a23113b5SSuresh Reddy dev_err(dev, "Could not get CRC for 0x%x region\n", 2993a23113b5SSuresh Reddy img_optype); 2994a23113b5SSuresh Reddy return -EFAULT; 2995a23113b5SSuresh Reddy } 2996a23113b5SSuresh Reddy 2997a23113b5SSuresh Reddy if (crc_match) 2998a23113b5SSuresh Reddy continue; 2999a23113b5SSuresh Reddy 3000a23113b5SSuresh Reddy flash: 3001a23113b5SSuresh Reddy p = fw->data + filehdr_size + img_offset + img_hdrs_size; 3002a23113b5SSuresh Reddy if (p + img_size > fw->data + fw->size) 3003a23113b5SSuresh Reddy return -1; 3004a23113b5SSuresh Reddy 3005a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, flash_optype, img_size, 3006a23113b5SSuresh Reddy img_offset); 3007a23113b5SSuresh Reddy 3008a23113b5SSuresh Reddy /* The current FW image on the card does not support OFFSET 3009a23113b5SSuresh Reddy * based flashing. Retry using older mechanism of OPTYPE based 3010a23113b5SSuresh Reddy * flashing 3011a23113b5SSuresh Reddy */ 3012a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD && 3013a23113b5SSuresh Reddy flash_optype == OPTYPE_OFFSET_SPECIFIED) { 3014a23113b5SSuresh Reddy flash_offset_support = false; 3015a23113b5SSuresh Reddy goto retry_flash; 3016a23113b5SSuresh Reddy } 3017a23113b5SSuresh Reddy 3018a23113b5SSuresh Reddy /* For old FW images ignore ILLEGAL_FIELD error or errors on 3019a23113b5SSuresh Reddy * UFI_DIR region 3020a23113b5SSuresh Reddy */ 3021a23113b5SSuresh Reddy if (old_fw_img && 3022a23113b5SSuresh Reddy (base_status(status) == MCC_STATUS_ILLEGAL_FIELD || 3023a23113b5SSuresh Reddy (img_optype == OPTYPE_UFI_DIR && 3024a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_FAILED))) { 3025a23113b5SSuresh Reddy continue; 3026a23113b5SSuresh Reddy } else if (status) { 3027a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 3028a23113b5SSuresh Reddy img_type); 30296b525782SSuresh Reddy 30306b525782SSuresh Reddy switch (addl_status(status)) { 30316b525782SSuresh Reddy case MCC_ADDL_STATUS_MISSING_SIGNATURE: 30326b525782SSuresh Reddy dev_err(dev, 30336b525782SSuresh Reddy "Digital signature missing in FW\n"); 30346b525782SSuresh Reddy return -EINVAL; 30356b525782SSuresh Reddy case MCC_ADDL_STATUS_INVALID_SIGNATURE: 30366b525782SSuresh Reddy dev_err(dev, 30376b525782SSuresh Reddy "Invalid digital signature in FW\n"); 30386b525782SSuresh Reddy return -EINVAL; 30396b525782SSuresh Reddy default: 3040a23113b5SSuresh Reddy return -EFAULT; 3041a23113b5SSuresh Reddy } 3042a23113b5SSuresh Reddy } 30436b525782SSuresh Reddy } 3044a23113b5SSuresh Reddy return 0; 3045a23113b5SSuresh Reddy } 3046a23113b5SSuresh Reddy 3047a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, 3048a23113b5SSuresh Reddy const struct firmware *fw) 3049a23113b5SSuresh Reddy { 3050a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3051a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3052a23113b5SSuresh Reddy const u8 *data_ptr = NULL; 3053a23113b5SSuresh Reddy u8 *dest_image_ptr = NULL; 3054a23113b5SSuresh Reddy size_t image_size = 0; 3055a23113b5SSuresh Reddy u32 chunk_size = 0; 3056a23113b5SSuresh Reddy u32 data_written = 0; 3057a23113b5SSuresh Reddy u32 offset = 0; 3058a23113b5SSuresh Reddy int status = 0; 3059a23113b5SSuresh Reddy u8 add_status = 0; 3060a23113b5SSuresh Reddy u8 change_status; 3061a23113b5SSuresh Reddy 3062a23113b5SSuresh Reddy if (!IS_ALIGNED(fw->size, sizeof(u32))) { 3063a23113b5SSuresh Reddy dev_err(dev, "FW image size should be multiple of 4\n"); 3064a23113b5SSuresh Reddy return -EINVAL; 3065a23113b5SSuresh Reddy } 3066a23113b5SSuresh Reddy 3067a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) 3068a23113b5SSuresh Reddy + LANCER_FW_DOWNLOAD_CHUNK; 3069750afb08SLuis Chamberlain flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3070750afb08SLuis Chamberlain GFP_KERNEL); 3071a23113b5SSuresh Reddy if (!flash_cmd.va) 3072a23113b5SSuresh Reddy return -ENOMEM; 3073a23113b5SSuresh Reddy 3074a23113b5SSuresh Reddy dest_image_ptr = flash_cmd.va + 3075a23113b5SSuresh Reddy sizeof(struct lancer_cmd_req_write_object); 3076a23113b5SSuresh Reddy image_size = fw->size; 3077a23113b5SSuresh Reddy data_ptr = fw->data; 3078a23113b5SSuresh Reddy 3079a23113b5SSuresh Reddy while (image_size) { 3080a23113b5SSuresh Reddy chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); 3081a23113b5SSuresh Reddy 3082a23113b5SSuresh Reddy /* Copy the image chunk content. */ 3083a23113b5SSuresh Reddy memcpy(dest_image_ptr, data_ptr, chunk_size); 3084a23113b5SSuresh Reddy 3085a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3086a23113b5SSuresh Reddy chunk_size, offset, 3087a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3088a23113b5SSuresh Reddy &data_written, &change_status, 3089a23113b5SSuresh Reddy &add_status); 3090a23113b5SSuresh Reddy if (status) 3091a23113b5SSuresh Reddy break; 3092a23113b5SSuresh Reddy 3093a23113b5SSuresh Reddy offset += data_written; 3094a23113b5SSuresh Reddy data_ptr += data_written; 3095a23113b5SSuresh Reddy image_size -= data_written; 3096a23113b5SSuresh Reddy } 3097a23113b5SSuresh Reddy 3098a23113b5SSuresh Reddy if (!status) { 3099a23113b5SSuresh Reddy /* Commit the FW written */ 3100a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3101a23113b5SSuresh Reddy 0, offset, 3102a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3103a23113b5SSuresh Reddy &data_written, &change_status, 3104a23113b5SSuresh Reddy &add_status); 3105a23113b5SSuresh Reddy } 3106a23113b5SSuresh Reddy 3107a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3108a23113b5SSuresh Reddy if (status) { 3109a23113b5SSuresh Reddy dev_err(dev, "Firmware load error\n"); 3110a23113b5SSuresh Reddy return be_cmd_status(status); 3111a23113b5SSuresh Reddy } 3112a23113b5SSuresh Reddy 3113a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3114a23113b5SSuresh Reddy 3115a23113b5SSuresh Reddy if (change_status == LANCER_FW_RESET_NEEDED) { 3116a23113b5SSuresh Reddy dev_info(dev, "Resetting adapter to activate new FW\n"); 3117a23113b5SSuresh Reddy status = lancer_physdev_ctrl(adapter, 3118a23113b5SSuresh Reddy PHYSDEV_CONTROL_FW_RESET_MASK); 3119a23113b5SSuresh Reddy if (status) { 3120a23113b5SSuresh Reddy dev_err(dev, "Adapter busy, could not reset FW\n"); 3121a23113b5SSuresh Reddy dev_err(dev, "Reboot server to activate new FW\n"); 3122a23113b5SSuresh Reddy } 3123a23113b5SSuresh Reddy } else if (change_status != LANCER_NO_RESET_NEEDED) { 3124a23113b5SSuresh Reddy dev_info(dev, "Reboot server to activate new FW\n"); 3125a23113b5SSuresh Reddy } 3126a23113b5SSuresh Reddy 3127a23113b5SSuresh Reddy return 0; 3128a23113b5SSuresh Reddy } 3129a23113b5SSuresh Reddy 3130a23113b5SSuresh Reddy /* Check if the flash image file is compatible with the adapter that 3131a23113b5SSuresh Reddy * is being flashed. 3132a23113b5SSuresh Reddy */ 3133a23113b5SSuresh Reddy static bool be_check_ufi_compatibility(struct be_adapter *adapter, 3134a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr) 3135a23113b5SSuresh Reddy { 3136a23113b5SSuresh Reddy if (!fhdr) { 3137a23113b5SSuresh Reddy dev_err(&adapter->pdev->dev, "Invalid FW UFI file"); 3138a23113b5SSuresh Reddy return false; 3139a23113b5SSuresh Reddy } 3140a23113b5SSuresh Reddy 3141a23113b5SSuresh Reddy /* First letter of the build version is used to identify 3142a23113b5SSuresh Reddy * which chip this image file is meant for. 3143a23113b5SSuresh Reddy */ 3144a23113b5SSuresh Reddy switch (fhdr->build[0]) { 3145a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_SH: 3146a23113b5SSuresh Reddy if (!skyhawk_chip(adapter)) 3147a23113b5SSuresh Reddy return false; 3148a23113b5SSuresh Reddy break; 3149a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE3: 3150a23113b5SSuresh Reddy if (!BE3_chip(adapter)) 3151a23113b5SSuresh Reddy return false; 3152a23113b5SSuresh Reddy break; 3153a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE2: 3154a23113b5SSuresh Reddy if (!BE2_chip(adapter)) 3155a23113b5SSuresh Reddy return false; 3156a23113b5SSuresh Reddy break; 3157a23113b5SSuresh Reddy default: 3158a23113b5SSuresh Reddy return false; 3159a23113b5SSuresh Reddy } 3160a23113b5SSuresh Reddy 3161a23113b5SSuresh Reddy /* In BE3 FW images the "asic_type_rev" field doesn't track the 3162a23113b5SSuresh Reddy * asic_rev of the chips it is compatible with. 3163a23113b5SSuresh Reddy * When asic_type_rev is 0 the image is compatible only with 3164a23113b5SSuresh Reddy * pre-BE3-R chips (asic_rev < 0x10) 3165a23113b5SSuresh Reddy */ 3166a23113b5SSuresh Reddy if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) 3167a23113b5SSuresh Reddy return adapter->asic_rev < 0x10; 3168a23113b5SSuresh Reddy else 3169a23113b5SSuresh Reddy return (fhdr->asic_type_rev >= adapter->asic_rev); 3170a23113b5SSuresh Reddy } 3171a23113b5SSuresh Reddy 3172a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw) 3173a23113b5SSuresh Reddy { 3174a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3175a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr3; 3176a23113b5SSuresh Reddy struct image_hdr *img_hdr_ptr; 3177a23113b5SSuresh Reddy int status = 0, i, num_imgs; 3178a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3179a23113b5SSuresh Reddy 3180a23113b5SSuresh Reddy fhdr3 = (struct flash_file_hdr_g3 *)fw->data; 3181a23113b5SSuresh Reddy if (!be_check_ufi_compatibility(adapter, fhdr3)) { 3182a23113b5SSuresh Reddy dev_err(dev, "Flash image is not compatible with adapter\n"); 3183a23113b5SSuresh Reddy return -EINVAL; 3184a23113b5SSuresh Reddy } 3185a23113b5SSuresh Reddy 3186a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct be_cmd_write_flashrom); 3187750afb08SLuis Chamberlain flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3188a23113b5SSuresh Reddy GFP_KERNEL); 3189a23113b5SSuresh Reddy if (!flash_cmd.va) 3190a23113b5SSuresh Reddy return -ENOMEM; 3191a23113b5SSuresh Reddy 3192a23113b5SSuresh Reddy num_imgs = le32_to_cpu(fhdr3->num_imgs); 3193a23113b5SSuresh Reddy for (i = 0; i < num_imgs; i++) { 3194a23113b5SSuresh Reddy img_hdr_ptr = (struct image_hdr *)(fw->data + 3195a23113b5SSuresh Reddy (sizeof(struct flash_file_hdr_g3) + 3196a23113b5SSuresh Reddy i * sizeof(struct image_hdr))); 3197a23113b5SSuresh Reddy if (!BE2_chip(adapter) && 3198a23113b5SSuresh Reddy le32_to_cpu(img_hdr_ptr->imageid) != 1) 3199a23113b5SSuresh Reddy continue; 3200a23113b5SSuresh Reddy 3201a23113b5SSuresh Reddy if (skyhawk_chip(adapter)) 3202a23113b5SSuresh Reddy status = be_flash_skyhawk(adapter, fw, &flash_cmd, 3203a23113b5SSuresh Reddy num_imgs); 3204a23113b5SSuresh Reddy else 3205a23113b5SSuresh Reddy status = be_flash_BEx(adapter, fw, &flash_cmd, 3206a23113b5SSuresh Reddy num_imgs); 3207a23113b5SSuresh Reddy } 3208a23113b5SSuresh Reddy 3209a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3210a23113b5SSuresh Reddy if (!status) 3211a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3212a23113b5SSuresh Reddy 3213a23113b5SSuresh Reddy return status; 3214a23113b5SSuresh Reddy } 3215a23113b5SSuresh Reddy 32169aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 32179aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 32189aebddd1SJeff Kirsher { 32199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32209aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 32219aebddd1SJeff Kirsher int status; 32229aebddd1SJeff Kirsher 3223b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32249aebddd1SJeff Kirsher 32259aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32269aebddd1SJeff Kirsher if (!wrb) { 32279aebddd1SJeff Kirsher status = -EBUSY; 32289aebddd1SJeff Kirsher goto err; 32299aebddd1SJeff Kirsher } 32309aebddd1SJeff Kirsher req = nonemb_cmd->va; 32319aebddd1SJeff Kirsher 3232106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 3233a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 3234a2cc4e0bSSathya Perla wrb, nonemb_cmd); 32359aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 32369aebddd1SJeff Kirsher 32379aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 32389aebddd1SJeff Kirsher 32399aebddd1SJeff Kirsher err: 3240b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32419aebddd1SJeff Kirsher return status; 32429aebddd1SJeff Kirsher } 32439aebddd1SJeff Kirsher 32449aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 32459aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 32469aebddd1SJeff Kirsher { 32479aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32489aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 32499aebddd1SJeff Kirsher int status; 32509aebddd1SJeff Kirsher 32512e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 32522e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32532e365b1bSSomnath Kotur return -EPERM; 32542e365b1bSSomnath Kotur 3255b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32569aebddd1SJeff Kirsher 32579aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32589aebddd1SJeff Kirsher if (!wrb) { 32599aebddd1SJeff Kirsher status = -EBUSY; 32609c855975SSuresh Reddy goto err_unlock; 32619aebddd1SJeff Kirsher } 32629aebddd1SJeff Kirsher 32639aebddd1SJeff Kirsher req = embedded_payload(wrb); 32649aebddd1SJeff Kirsher 3265106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3266a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 3267a2cc4e0bSSathya Perla wrb, NULL); 32689aebddd1SJeff Kirsher 32699aebddd1SJeff Kirsher req->src_port = port_num; 32709aebddd1SJeff Kirsher req->dest_port = port_num; 32719aebddd1SJeff Kirsher req->loopback_type = loopback_type; 32729aebddd1SJeff Kirsher req->loopback_state = enable; 32739aebddd1SJeff Kirsher 32749c855975SSuresh Reddy status = be_mcc_notify(adapter); 32759c855975SSuresh Reddy if (status) 32769c855975SSuresh Reddy goto err_unlock; 32779c855975SSuresh Reddy 3278b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32799c855975SSuresh Reddy 32809c855975SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 32819c855975SSuresh Reddy msecs_to_jiffies(SET_LB_MODE_TIMEOUT))) 32829c855975SSuresh Reddy status = -ETIMEDOUT; 32839c855975SSuresh Reddy 32849c855975SSuresh Reddy return status; 32859c855975SSuresh Reddy 32869c855975SSuresh Reddy err_unlock: 3287b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32889aebddd1SJeff Kirsher return status; 32899aebddd1SJeff Kirsher } 32909aebddd1SJeff Kirsher 32919aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 3292a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 3293a2cc4e0bSSathya Perla u64 pattern) 32949aebddd1SJeff Kirsher { 32959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32969aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 32975eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 32989aebddd1SJeff Kirsher int status; 32999aebddd1SJeff Kirsher 33002e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_LOOPBACK_TEST, 33012e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33022e365b1bSSomnath Kotur return -EPERM; 33032e365b1bSSomnath Kotur 3304b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33059aebddd1SJeff Kirsher 33069aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33079aebddd1SJeff Kirsher if (!wrb) { 33089aebddd1SJeff Kirsher status = -EBUSY; 33099aebddd1SJeff Kirsher goto err; 33109aebddd1SJeff Kirsher } 33119aebddd1SJeff Kirsher 33129aebddd1SJeff Kirsher req = embedded_payload(wrb); 33139aebddd1SJeff Kirsher 3314106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3315a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 3316a2cc4e0bSSathya Perla NULL); 33179aebddd1SJeff Kirsher 33185eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 33199aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33209aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 33219aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 33229aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 33239aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 33249aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 33259aebddd1SJeff Kirsher 3326efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 3327efaa408eSSuresh Reddy if (status) 3328efaa408eSSuresh Reddy goto err; 33299aebddd1SJeff Kirsher 3330b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33315eeff635SSuresh Reddy 33325eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 33335eeff635SSuresh Reddy resp = embedded_payload(wrb); 33345eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 33355eeff635SSuresh Reddy 33365eeff635SSuresh Reddy return status; 33379aebddd1SJeff Kirsher err: 3338b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33399aebddd1SJeff Kirsher return status; 33409aebddd1SJeff Kirsher } 33419aebddd1SJeff Kirsher 33429aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 33439aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 33449aebddd1SJeff Kirsher { 33459aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33469aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 33479aebddd1SJeff Kirsher int status; 33489aebddd1SJeff Kirsher int i, j = 0; 33499aebddd1SJeff Kirsher 33502e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_HOST_DDR_DMA, 33512e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33522e365b1bSSomnath Kotur return -EPERM; 33532e365b1bSSomnath Kotur 3354b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33559aebddd1SJeff Kirsher 33569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33579aebddd1SJeff Kirsher if (!wrb) { 33589aebddd1SJeff Kirsher status = -EBUSY; 33599aebddd1SJeff Kirsher goto err; 33609aebddd1SJeff Kirsher } 33619aebddd1SJeff Kirsher req = cmd->va; 3362106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3363a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 3364a2cc4e0bSSathya Perla cmd); 33659aebddd1SJeff Kirsher 33669aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33679aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 33689aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 33699aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 33709aebddd1SJeff Kirsher j++; 33719aebddd1SJeff Kirsher if (j > 7) 33729aebddd1SJeff Kirsher j = 0; 33739aebddd1SJeff Kirsher } 33749aebddd1SJeff Kirsher 33759aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33769aebddd1SJeff Kirsher 33779aebddd1SJeff Kirsher if (!status) { 33789aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 337903d28ffeSKalesh AP 33809aebddd1SJeff Kirsher resp = cmd->va; 33819aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 33829aebddd1SJeff Kirsher resp->snd_err) { 33839aebddd1SJeff Kirsher status = -1; 33849aebddd1SJeff Kirsher } 33859aebddd1SJeff Kirsher } 33869aebddd1SJeff Kirsher 33879aebddd1SJeff Kirsher err: 3388b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33899aebddd1SJeff Kirsher return status; 33909aebddd1SJeff Kirsher } 33919aebddd1SJeff Kirsher 33929aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 33939aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 33949aebddd1SJeff Kirsher { 33959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33969aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 33979aebddd1SJeff Kirsher int status; 33989aebddd1SJeff Kirsher 3399b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34009aebddd1SJeff Kirsher 34019aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34029aebddd1SJeff Kirsher if (!wrb) { 34039aebddd1SJeff Kirsher status = -EBUSY; 34049aebddd1SJeff Kirsher goto err; 34059aebddd1SJeff Kirsher } 34069aebddd1SJeff Kirsher req = nonemb_cmd->va; 34079aebddd1SJeff Kirsher 3408106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3409106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 3410106df1e3SSomnath Kotur nonemb_cmd); 34119aebddd1SJeff Kirsher 34129aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34139aebddd1SJeff Kirsher 34149aebddd1SJeff Kirsher err: 3415b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34169aebddd1SJeff Kirsher return status; 34179aebddd1SJeff Kirsher } 34189aebddd1SJeff Kirsher 341942f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 34209aebddd1SJeff Kirsher { 34219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34229aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 34239aebddd1SJeff Kirsher struct be_dma_mem cmd; 34249aebddd1SJeff Kirsher int status; 34259aebddd1SJeff Kirsher 3426f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 3427f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 3428f25b119cSPadmanabh Ratnakar return -EPERM; 3429f25b119cSPadmanabh Ratnakar 3430b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34319aebddd1SJeff Kirsher 34329aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34339aebddd1SJeff Kirsher if (!wrb) { 34349aebddd1SJeff Kirsher status = -EBUSY; 34359aebddd1SJeff Kirsher goto err; 34369aebddd1SJeff Kirsher } 34379aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 3438750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3439e51000dbSSriharsha Basavapatna GFP_ATOMIC); 34409aebddd1SJeff Kirsher if (!cmd.va) { 34419aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 34429aebddd1SJeff Kirsher status = -ENOMEM; 34439aebddd1SJeff Kirsher goto err; 34449aebddd1SJeff Kirsher } 34459aebddd1SJeff Kirsher 34469aebddd1SJeff Kirsher req = cmd.va; 34479aebddd1SJeff Kirsher 3448106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3449106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 3450106df1e3SSomnath Kotur wrb, &cmd); 34519aebddd1SJeff Kirsher 34529aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34539aebddd1SJeff Kirsher if (!status) { 34549aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 34559aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 345603d28ffeSKalesh AP 345742f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 345842f11cf2SAjit Khaparde adapter->phy.interface_type = 34599aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 346042f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 346142f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 346242f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 346342f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 346442f11cf2SAjit Khaparde adapter->phy.misc_params = 346542f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 346668cb7e47SVasundhara Volam 346768cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 346868cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 346968cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 347068cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 347168cb7e47SVasundhara Volam } 34729aebddd1SJeff Kirsher } 3473e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 34749aebddd1SJeff Kirsher err: 3475b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34769aebddd1SJeff Kirsher return status; 34779aebddd1SJeff Kirsher } 34789aebddd1SJeff Kirsher 3479bc0ee163SLad, Prabhakar static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 34809aebddd1SJeff Kirsher { 34819aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34829aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 34839aebddd1SJeff Kirsher int status; 34849aebddd1SJeff Kirsher 3485b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34869aebddd1SJeff Kirsher 34879aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34889aebddd1SJeff Kirsher if (!wrb) { 34899aebddd1SJeff Kirsher status = -EBUSY; 34909aebddd1SJeff Kirsher goto err; 34919aebddd1SJeff Kirsher } 34929aebddd1SJeff Kirsher 34939aebddd1SJeff Kirsher req = embedded_payload(wrb); 34949aebddd1SJeff Kirsher 3495106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3496106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 34979aebddd1SJeff Kirsher 34989aebddd1SJeff Kirsher req->hdr.domain = domain; 34999aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 35009aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 35019aebddd1SJeff Kirsher 35029aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 35039aebddd1SJeff Kirsher 35049aebddd1SJeff Kirsher err: 3505b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 35069aebddd1SJeff Kirsher return status; 35079aebddd1SJeff Kirsher } 35089aebddd1SJeff Kirsher 35099aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 35109aebddd1SJeff Kirsher { 35119aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35129aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 35139aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 3514a155a5dbSSriharsha Basavapatna int status, i; 35159aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 35169aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 35179aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 3518a155a5dbSSriharsha Basavapatna u32 *serial_num; 35199aebddd1SJeff Kirsher 3520d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3521d98ef50fSSuresh Reddy return -1; 3522d98ef50fSSuresh Reddy 35239aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 35249aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 3525750afb08SLuis Chamberlain attribs_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 3526e51000dbSSriharsha Basavapatna attribs_cmd.size, 3527e51000dbSSriharsha Basavapatna &attribs_cmd.dma, GFP_ATOMIC); 35289aebddd1SJeff Kirsher if (!attribs_cmd.va) { 3529a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3530d98ef50fSSuresh Reddy status = -ENOMEM; 3531d98ef50fSSuresh Reddy goto err; 35329aebddd1SJeff Kirsher } 35339aebddd1SJeff Kirsher 35349aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35359aebddd1SJeff Kirsher if (!wrb) { 35369aebddd1SJeff Kirsher status = -EBUSY; 35379aebddd1SJeff Kirsher goto err; 35389aebddd1SJeff Kirsher } 35399aebddd1SJeff Kirsher req = attribs_cmd.va; 35409aebddd1SJeff Kirsher 3541106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3542a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 3543a2cc4e0bSSathya Perla wrb, &attribs_cmd); 35449aebddd1SJeff Kirsher 35459aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35469aebddd1SJeff Kirsher if (!status) { 35479aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 35489aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 3549a155a5dbSSriharsha Basavapatna serial_num = attribs->hba_attribs.controller_serial_number; 3550a155a5dbSSriharsha Basavapatna for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) 3551a155a5dbSSriharsha Basavapatna adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & 3552a155a5dbSSriharsha Basavapatna (BIT_MASK(16) - 1); 35536ee080bbSSriharsha Basavapatna /* For BEx, since GET_FUNC_CONFIG command is not 35546ee080bbSSriharsha Basavapatna * supported, we read funcnum here as a workaround. 35556ee080bbSSriharsha Basavapatna */ 35566ee080bbSSriharsha Basavapatna if (BEx_chip(adapter)) 35576ee080bbSSriharsha Basavapatna adapter->pf_num = attribs->hba_attribs.pci_funcnum; 35589aebddd1SJeff Kirsher } 35599aebddd1SJeff Kirsher 35609aebddd1SJeff Kirsher err: 35619aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 3562d98ef50fSSuresh Reddy if (attribs_cmd.va) 3563e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, attribs_cmd.size, 3564d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 35659aebddd1SJeff Kirsher return status; 35669aebddd1SJeff Kirsher } 35679aebddd1SJeff Kirsher 35689aebddd1SJeff Kirsher /* Uses mbox */ 35699aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 35709aebddd1SJeff Kirsher { 35719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35729aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 35739aebddd1SJeff Kirsher int status; 35749aebddd1SJeff Kirsher 35759aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 35769aebddd1SJeff Kirsher return -1; 35779aebddd1SJeff Kirsher 35789aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35799aebddd1SJeff Kirsher if (!wrb) { 35809aebddd1SJeff Kirsher status = -EBUSY; 35819aebddd1SJeff Kirsher goto err; 35829aebddd1SJeff Kirsher } 35839aebddd1SJeff Kirsher 35849aebddd1SJeff Kirsher req = embedded_payload(wrb); 35859aebddd1SJeff Kirsher 3586106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3587a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 3588a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 35899aebddd1SJeff Kirsher 35909aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 35919aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 35929aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 35939aebddd1SJeff Kirsher 35949aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35959aebddd1SJeff Kirsher if (!status) { 35969aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 359703d28ffeSKalesh AP 35989aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 35999aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 3600d379142bSSathya Perla if (!adapter->be3_native) 3601d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 3602d379142bSSathya Perla "adapter not in advanced mode\n"); 36039aebddd1SJeff Kirsher } 36049aebddd1SJeff Kirsher err: 36059aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 36069aebddd1SJeff Kirsher return status; 36079aebddd1SJeff Kirsher } 3608590c391dSPadmanabh Ratnakar 3609f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 3610f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 3611f25b119cSPadmanabh Ratnakar u32 domain) 3612f25b119cSPadmanabh Ratnakar { 3613f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3614f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 3615f25b119cSPadmanabh Ratnakar int status; 3616f25b119cSPadmanabh Ratnakar 3617b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3618f25b119cSPadmanabh Ratnakar 3619f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3620f25b119cSPadmanabh Ratnakar if (!wrb) { 3621f25b119cSPadmanabh Ratnakar status = -EBUSY; 3622f25b119cSPadmanabh Ratnakar goto err; 3623f25b119cSPadmanabh Ratnakar } 3624f25b119cSPadmanabh Ratnakar 3625f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 3626f25b119cSPadmanabh Ratnakar 3627f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3628f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 3629f25b119cSPadmanabh Ratnakar wrb, NULL); 3630f25b119cSPadmanabh Ratnakar 3631f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 3632f25b119cSPadmanabh Ratnakar 3633f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3634f25b119cSPadmanabh Ratnakar if (!status) { 3635f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 3636f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 363703d28ffeSKalesh AP 3638f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 363902308d74SSuresh Reddy 364002308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 364102308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 364202308d74SSuresh Reddy */ 364302308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 364402308d74SSuresh Reddy be_physfn(adapter)) 364502308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 3646f25b119cSPadmanabh Ratnakar } 3647f25b119cSPadmanabh Ratnakar 3648f25b119cSPadmanabh Ratnakar err: 3649b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3650f25b119cSPadmanabh Ratnakar return status; 3651f25b119cSPadmanabh Ratnakar } 3652f25b119cSPadmanabh Ratnakar 365304a06028SSathya Perla /* Set privilege(s) for a function */ 365404a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 365504a06028SSathya Perla u32 domain) 365604a06028SSathya Perla { 365704a06028SSathya Perla struct be_mcc_wrb *wrb; 365804a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 365904a06028SSathya Perla int status; 366004a06028SSathya Perla 3661b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 366204a06028SSathya Perla 366304a06028SSathya Perla wrb = wrb_from_mccq(adapter); 366404a06028SSathya Perla if (!wrb) { 366504a06028SSathya Perla status = -EBUSY; 366604a06028SSathya Perla goto err; 366704a06028SSathya Perla } 366804a06028SSathya Perla 366904a06028SSathya Perla req = embedded_payload(wrb); 367004a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 367104a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 367204a06028SSathya Perla wrb, NULL); 367304a06028SSathya Perla req->hdr.domain = domain; 367404a06028SSathya Perla if (lancer_chip(adapter)) 367504a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 367604a06028SSathya Perla else 367704a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 367804a06028SSathya Perla 367904a06028SSathya Perla status = be_mcc_notify_wait(adapter); 368004a06028SSathya Perla err: 3681b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 368204a06028SSathya Perla return status; 368304a06028SSathya Perla } 368404a06028SSathya Perla 36855a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 36865a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 36875a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 36885a712c13SSathya Perla */ 36891578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 3690b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 3691b188f090SSuresh Reddy u8 domain) 3692590c391dSPadmanabh Ratnakar { 3693590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3694590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 3695590c391dSPadmanabh Ratnakar int status; 3696590c391dSPadmanabh Ratnakar int mac_count; 3697e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 3698e5e1ee89SPadmanabh Ratnakar int i; 3699e5e1ee89SPadmanabh Ratnakar 3700e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 3701e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 3702750afb08SLuis Chamberlain get_mac_list_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 3703e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 3704e51000dbSSriharsha Basavapatna &get_mac_list_cmd.dma, 3705e51000dbSSriharsha Basavapatna GFP_ATOMIC); 3706e5e1ee89SPadmanabh Ratnakar 3707e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 3708e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 3709e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 3710e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 3711e5e1ee89SPadmanabh Ratnakar } 3712590c391dSPadmanabh Ratnakar 3713b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3714590c391dSPadmanabh Ratnakar 3715590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3716590c391dSPadmanabh Ratnakar if (!wrb) { 3717590c391dSPadmanabh Ratnakar status = -EBUSY; 3718e5e1ee89SPadmanabh Ratnakar goto out; 3719590c391dSPadmanabh Ratnakar } 3720e5e1ee89SPadmanabh Ratnakar 3721e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 3722590c391dSPadmanabh Ratnakar 3723590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3724bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 3725bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 3726590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3727e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 37285a712c13SSathya Perla if (*pmac_id_valid) { 37295a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 3730b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 37315a712c13SSathya Perla req->perm_override = 0; 37325a712c13SSathya Perla } else { 3733e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 37345a712c13SSathya Perla } 3735590c391dSPadmanabh Ratnakar 3736590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3737590c391dSPadmanabh Ratnakar if (!status) { 3738590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 3739e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 37405a712c13SSathya Perla 37415a712c13SSathya Perla if (*pmac_id_valid) { 37425a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 37435a712c13SSathya Perla ETH_ALEN); 37445a712c13SSathya Perla goto out; 37455a712c13SSathya Perla } 37465a712c13SSathya Perla 3747e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3748e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 3749dbedd44eSJoe Perches * or one or more true or pseudo permanent mac addresses. 37501578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 37511578e777SPadmanabh Ratnakar * found. 3752e5e1ee89SPadmanabh Ratnakar */ 3753590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3754e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3755e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3756e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3757e5e1ee89SPadmanabh Ratnakar 3758e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3759e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3760e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3761e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3762e5e1ee89SPadmanabh Ratnakar */ 3763e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 37645a712c13SSathya Perla *pmac_id_valid = true; 3765e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3766e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3767e5e1ee89SPadmanabh Ratnakar goto out; 3768590c391dSPadmanabh Ratnakar } 3769590c391dSPadmanabh Ratnakar } 37701578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 37715a712c13SSathya Perla *pmac_id_valid = false; 3772e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3773e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3774590c391dSPadmanabh Ratnakar } 3775590c391dSPadmanabh Ratnakar 3776e5e1ee89SPadmanabh Ratnakar out: 3777b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3778e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_mac_list_cmd.size, 3779e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3780590c391dSPadmanabh Ratnakar return status; 3781590c391dSPadmanabh Ratnakar } 3782590c391dSPadmanabh Ratnakar 3783a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3784a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 37855a712c13SSathya Perla { 3786b188f090SSuresh Reddy if (!active) 3787b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3788b188f090SSuresh Reddy if_handle, domain); 37893175d8c2SSathya Perla if (BEx_chip(adapter)) 37905a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3791b188f090SSuresh Reddy if_handle, curr_pmac_id); 37923175d8c2SSathya Perla else 37933175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 37943175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3795b188f090SSuresh Reddy &curr_pmac_id, 3796b188f090SSuresh Reddy if_handle, domain); 37975a712c13SSathya Perla } 37985a712c13SSathya Perla 379995046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 380095046b92SSathya Perla { 380195046b92SSathya Perla int status; 380295046b92SSathya Perla bool pmac_valid = false; 380395046b92SSathya Perla 3804c7bf7169SJoe Perches eth_zero_addr(mac); 380595046b92SSathya Perla 38063175d8c2SSathya Perla if (BEx_chip(adapter)) { 38073175d8c2SSathya Perla if (be_physfn(adapter)) 38083175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 38093175d8c2SSathya Perla 0); 381095046b92SSathya Perla else 381195046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 381295046b92SSathya Perla adapter->if_handle, 0); 38133175d8c2SSathya Perla } else { 38143175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3815b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 38163175d8c2SSathya Perla } 38173175d8c2SSathya Perla 381895046b92SSathya Perla return status; 381995046b92SSathya Perla } 382095046b92SSathya Perla 3821590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3822590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3823590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3824590c391dSPadmanabh Ratnakar { 3825590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3826590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3827590c391dSPadmanabh Ratnakar int status; 3828590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3829590c391dSPadmanabh Ratnakar 3830590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3831590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3832750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3833e51000dbSSriharsha Basavapatna GFP_KERNEL); 3834d0320f75SJoe Perches if (!cmd.va) 3835590c391dSPadmanabh Ratnakar return -ENOMEM; 3836590c391dSPadmanabh Ratnakar 3837b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3838590c391dSPadmanabh Ratnakar 3839590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3840590c391dSPadmanabh Ratnakar if (!wrb) { 3841590c391dSPadmanabh Ratnakar status = -EBUSY; 3842590c391dSPadmanabh Ratnakar goto err; 3843590c391dSPadmanabh Ratnakar } 3844590c391dSPadmanabh Ratnakar 3845590c391dSPadmanabh Ratnakar req = cmd.va; 3846590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3847590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3848590c391dSPadmanabh Ratnakar wrb, &cmd); 3849590c391dSPadmanabh Ratnakar 3850590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3851590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3852590c391dSPadmanabh Ratnakar if (mac_count) 3853590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3854590c391dSPadmanabh Ratnakar 3855590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3856590c391dSPadmanabh Ratnakar 3857590c391dSPadmanabh Ratnakar err: 3858a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3859b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3860590c391dSPadmanabh Ratnakar return status; 3861590c391dSPadmanabh Ratnakar } 38624762f6ceSAjit Khaparde 38633175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 38643175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 38653175d8c2SSathya Perla * current list are active. 38663175d8c2SSathya Perla */ 38673175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 38683175d8c2SSathya Perla { 38693175d8c2SSathya Perla bool active_mac = false; 38703175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 38713175d8c2SSathya Perla u32 pmac_id; 38723175d8c2SSathya Perla int status; 38733175d8c2SSathya Perla 38743175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3875b188f090SSuresh Reddy &pmac_id, if_id, dom); 3876b188f090SSuresh Reddy 38773175d8c2SSathya Perla if (!status && active_mac) 38783175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 38793175d8c2SSathya Perla 38803175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 38813175d8c2SSathya Perla } 38823175d8c2SSathya Perla 3883f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3884e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u16 hsw_mode, u8 spoofchk) 3885f1f3ee1bSAjit Khaparde { 3886f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3887f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3888f1f3ee1bSAjit Khaparde void *ctxt; 3889f1f3ee1bSAjit Khaparde int status; 3890f1f3ee1bSAjit Khaparde 3891884476beSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_HSW_CONFIG, 3892884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON)) 3893884476beSSomnath Kotur return -EPERM; 3894884476beSSomnath Kotur 3895b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3896f1f3ee1bSAjit Khaparde 3897f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3898f1f3ee1bSAjit Khaparde if (!wrb) { 3899f1f3ee1bSAjit Khaparde status = -EBUSY; 3900f1f3ee1bSAjit Khaparde goto err; 3901f1f3ee1bSAjit Khaparde } 3902f1f3ee1bSAjit Khaparde 3903f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3904f1f3ee1bSAjit Khaparde ctxt = &req->context; 3905f1f3ee1bSAjit Khaparde 3906f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3907a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3908a2cc4e0bSSathya Perla NULL); 3909f1f3ee1bSAjit Khaparde 3910f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3911f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3912f1f3ee1bSAjit Khaparde if (pvid) { 3913f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3914f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3915f1f3ee1bSAjit Khaparde } 3916884476beSSomnath Kotur if (hsw_mode) { 3917a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3918a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3919a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3920a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3921a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3922a77dcb8cSAjit Khaparde } 3923f1f3ee1bSAjit Khaparde 3924e7bcbd7bSKalesh AP /* Enable/disable both mac and vlan spoof checking */ 3925e7bcbd7bSKalesh AP if (!BEx_chip(adapter) && spoofchk) { 3926e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, mac_spoofchk, 3927e7bcbd7bSKalesh AP ctxt, spoofchk); 3928e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, vlan_spoofchk, 3929e7bcbd7bSKalesh AP ctxt, spoofchk); 3930e7bcbd7bSKalesh AP } 3931e7bcbd7bSKalesh AP 3932f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3933f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3934f1f3ee1bSAjit Khaparde 3935f1f3ee1bSAjit Khaparde err: 3936b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3937f1f3ee1bSAjit Khaparde return status; 3938f1f3ee1bSAjit Khaparde } 3939f1f3ee1bSAjit Khaparde 3940f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3941f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3942e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u8 *mode, bool *spoofchk) 3943f1f3ee1bSAjit Khaparde { 3944f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3945f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3946f1f3ee1bSAjit Khaparde void *ctxt; 3947f1f3ee1bSAjit Khaparde int status; 3948f1f3ee1bSAjit Khaparde u16 vid; 3949f1f3ee1bSAjit Khaparde 3950b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3951f1f3ee1bSAjit Khaparde 3952f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3953f1f3ee1bSAjit Khaparde if (!wrb) { 3954f1f3ee1bSAjit Khaparde status = -EBUSY; 3955f1f3ee1bSAjit Khaparde goto err; 3956f1f3ee1bSAjit Khaparde } 3957f1f3ee1bSAjit Khaparde 3958f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3959f1f3ee1bSAjit Khaparde ctxt = &req->context; 3960f1f3ee1bSAjit Khaparde 3961f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3962a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3963a2cc4e0bSSathya Perla NULL); 3964f1f3ee1bSAjit Khaparde 3965f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3966a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3967a77dcb8cSAjit Khaparde ctxt, intf_id); 3968f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3969a77dcb8cSAjit Khaparde 39702c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3971a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3972a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3973a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3974a77dcb8cSAjit Khaparde } 3975f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3976f1f3ee1bSAjit Khaparde 3977f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3978f1f3ee1bSAjit Khaparde if (!status) { 3979f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3980f1f3ee1bSAjit Khaparde embedded_payload(wrb); 398103d28ffeSKalesh AP 3982a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3983f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3984f1f3ee1bSAjit Khaparde pvid, &resp->context); 3985a77dcb8cSAjit Khaparde if (pvid) 3986f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3987a77dcb8cSAjit Khaparde if (mode) 3988a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3989a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3990e7bcbd7bSKalesh AP if (spoofchk) 3991e7bcbd7bSKalesh AP *spoofchk = 3992e7bcbd7bSKalesh AP AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3993e7bcbd7bSKalesh AP spoofchk, &resp->context); 3994f1f3ee1bSAjit Khaparde } 3995f1f3ee1bSAjit Khaparde 3996f1f3ee1bSAjit Khaparde err: 3997b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3998f1f3ee1bSAjit Khaparde return status; 3999f1f3ee1bSAjit Khaparde } 4000f1f3ee1bSAjit Khaparde 4001f7062ee5SSathya Perla static bool be_is_wol_excluded(struct be_adapter *adapter) 4002f7062ee5SSathya Perla { 4003f7062ee5SSathya Perla struct pci_dev *pdev = adapter->pdev; 4004f7062ee5SSathya Perla 400518c57c74SKalesh AP if (be_virtfn(adapter)) 4006f7062ee5SSathya Perla return true; 4007f7062ee5SSathya Perla 4008f7062ee5SSathya Perla switch (pdev->subsystem_device) { 4009f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID1: 4010f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID2: 4011f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID3: 4012f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID4: 4013f7062ee5SSathya Perla return true; 4014f7062ee5SSathya Perla default: 4015f7062ee5SSathya Perla return false; 4016f7062ee5SSathya Perla } 4017f7062ee5SSathya Perla } 4018f7062ee5SSathya Perla 40194762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 40204762f6ceSAjit Khaparde { 40214762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 40224762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 402376a9e08eSSuresh Reddy int status = 0; 40244762f6ceSAjit Khaparde struct be_dma_mem cmd; 40254762f6ceSAjit Khaparde 4026f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 4027f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 4028f25b119cSPadmanabh Ratnakar return -EPERM; 4029f25b119cSPadmanabh Ratnakar 403076a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 403176a9e08eSSuresh Reddy return status; 403276a9e08eSSuresh Reddy 4033d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4034d98ef50fSSuresh Reddy return -1; 4035d98ef50fSSuresh Reddy 40364762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 40374762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 4038750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4039e51000dbSSriharsha Basavapatna GFP_ATOMIC); 40404762f6ceSAjit Khaparde if (!cmd.va) { 4041a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 4042d98ef50fSSuresh Reddy status = -ENOMEM; 4043d98ef50fSSuresh Reddy goto err; 40444762f6ceSAjit Khaparde } 40454762f6ceSAjit Khaparde 40464762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 40474762f6ceSAjit Khaparde if (!wrb) { 40484762f6ceSAjit Khaparde status = -EBUSY; 40494762f6ceSAjit Khaparde goto err; 40504762f6ceSAjit Khaparde } 40514762f6ceSAjit Khaparde 40524762f6ceSAjit Khaparde req = cmd.va; 40534762f6ceSAjit Khaparde 40544762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 40554762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 405676a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 40574762f6ceSAjit Khaparde 40584762f6ceSAjit Khaparde req->hdr.version = 1; 40594762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 40604762f6ceSAjit Khaparde 40614762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 40624762f6ceSAjit Khaparde if (!status) { 40634762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 406403d28ffeSKalesh AP 40654762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 40664762f6ceSAjit Khaparde 40674762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 406845f13df7SSriharsha Basavapatna 406945f13df7SSriharsha Basavapatna /* Non-zero macaddr indicates WOL is enabled */ 407045f13df7SSriharsha Basavapatna if (adapter->wol_cap & BE_WOL_CAP && 407145f13df7SSriharsha Basavapatna !is_zero_ether_addr(resp->magic_mac)) 407276a9e08eSSuresh Reddy adapter->wol_en = true; 40734762f6ceSAjit Khaparde } 40744762f6ceSAjit Khaparde err: 40754762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 4076d98ef50fSSuresh Reddy if (cmd.va) 4077e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4078e51000dbSSriharsha Basavapatna cmd.dma); 40794762f6ceSAjit Khaparde return status; 4080941a77d5SSomnath Kotur 4081941a77d5SSomnath Kotur } 4082baaa08d1SVasundhara Volam 4083baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 4084baaa08d1SVasundhara Volam { 4085baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4086baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4087baaa08d1SVasundhara Volam int status; 4088baaa08d1SVasundhara Volam int i, j; 4089baaa08d1SVasundhara Volam 4090baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4091baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4092750afb08SLuis Chamberlain extfat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 4093e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4094e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4095baaa08d1SVasundhara Volam if (!extfat_cmd.va) 4096baaa08d1SVasundhara Volam return -ENOMEM; 4097baaa08d1SVasundhara Volam 4098baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4099baaa08d1SVasundhara Volam if (status) 4100baaa08d1SVasundhara Volam goto err; 4101baaa08d1SVasundhara Volam 4102baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 4103baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 4104baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 4105baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 410603d28ffeSKalesh AP 4107baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 4108baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 4109baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 4110baaa08d1SVasundhara Volam cpu_to_le32(level); 4111baaa08d1SVasundhara Volam } 4112baaa08d1SVasundhara Volam } 4113baaa08d1SVasundhara Volam 4114baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 4115baaa08d1SVasundhara Volam err: 4116e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4117baaa08d1SVasundhara Volam extfat_cmd.dma); 4118baaa08d1SVasundhara Volam return status; 4119baaa08d1SVasundhara Volam } 4120baaa08d1SVasundhara Volam 4121baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 4122baaa08d1SVasundhara Volam { 4123baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4124baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4125baaa08d1SVasundhara Volam int status, j; 4126baaa08d1SVasundhara Volam int level = 0; 4127baaa08d1SVasundhara Volam 4128baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4129baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4130750afb08SLuis Chamberlain extfat_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, 4131e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4132e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4133baaa08d1SVasundhara Volam 4134baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 4135baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 4136baaa08d1SVasundhara Volam __func__); 4137baaa08d1SVasundhara Volam goto err; 4138baaa08d1SVasundhara Volam } 4139baaa08d1SVasundhara Volam 4140baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4141baaa08d1SVasundhara Volam if (!status) { 4142baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 4143baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 414403d28ffeSKalesh AP 4145baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 4146baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 4147baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 4148baaa08d1SVasundhara Volam } 4149baaa08d1SVasundhara Volam } 4150e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4151baaa08d1SVasundhara Volam extfat_cmd.dma); 4152baaa08d1SVasundhara Volam err: 4153baaa08d1SVasundhara Volam return level; 4154baaa08d1SVasundhara Volam } 4155baaa08d1SVasundhara Volam 4156941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 4157941a77d5SSomnath Kotur struct be_dma_mem *cmd) 4158941a77d5SSomnath Kotur { 4159941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4160941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 4161941a77d5SSomnath Kotur int status; 4162941a77d5SSomnath Kotur 416362259ac4SSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 416462259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON)) 416562259ac4SSomnath Kotur return -EPERM; 416662259ac4SSomnath Kotur 4167941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 4168941a77d5SSomnath Kotur return -1; 4169941a77d5SSomnath Kotur 4170941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 4171941a77d5SSomnath Kotur if (!wrb) { 4172941a77d5SSomnath Kotur status = -EBUSY; 4173941a77d5SSomnath Kotur goto err; 4174941a77d5SSomnath Kotur } 4175941a77d5SSomnath Kotur 4176941a77d5SSomnath Kotur req = cmd->va; 4177941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 417862259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 4179941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4180941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 4181941a77d5SSomnath Kotur 4182941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 4183941a77d5SSomnath Kotur err: 4184941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 4185941a77d5SSomnath Kotur return status; 4186941a77d5SSomnath Kotur } 4187941a77d5SSomnath Kotur 4188941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 4189941a77d5SSomnath Kotur struct be_dma_mem *cmd, 4190941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 4191941a77d5SSomnath Kotur { 4192941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4193941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 4194941a77d5SSomnath Kotur int status; 4195941a77d5SSomnath Kotur 4196b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4197941a77d5SSomnath Kotur 4198941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 4199941a77d5SSomnath Kotur if (!wrb) { 4200941a77d5SSomnath Kotur status = -EBUSY; 4201941a77d5SSomnath Kotur goto err; 4202941a77d5SSomnath Kotur } 4203941a77d5SSomnath Kotur 4204941a77d5SSomnath Kotur req = cmd->va; 4205941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 4206941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 420762259ac4SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITIES, 4208941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4209941a77d5SSomnath Kotur 4210941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 4211941a77d5SSomnath Kotur err: 4212b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4213941a77d5SSomnath Kotur return status; 42144762f6ceSAjit Khaparde } 42156a4ab669SParav Pandit 421621252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter) 4217b4e32a71SPadmanabh Ratnakar { 4218b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 421921252377SVasundhara Volam struct be_mcc_wrb *wrb; 4220b4e32a71SPadmanabh Ratnakar int status; 4221b4e32a71SPadmanabh Ratnakar 422221252377SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 422321252377SVasundhara Volam return -1; 4224b4e32a71SPadmanabh Ratnakar 422521252377SVasundhara Volam wrb = wrb_from_mbox(adapter); 4226b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 4227b4e32a71SPadmanabh Ratnakar 4228b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4229b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 4230b4e32a71SPadmanabh Ratnakar NULL); 423121252377SVasundhara Volam if (!BEx_chip(adapter)) 4232b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 4233b4e32a71SPadmanabh Ratnakar 423421252377SVasundhara Volam status = be_mbox_notify_wait(adapter); 4235b4e32a71SPadmanabh Ratnakar if (!status) { 4236b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 423703d28ffeSKalesh AP 423821252377SVasundhara Volam adapter->port_name = resp->port_name[adapter->hba_port_num]; 4239b4e32a71SPadmanabh Ratnakar } else { 424021252377SVasundhara Volam adapter->port_name = adapter->hba_port_num + '0'; 4241b4e32a71SPadmanabh Ratnakar } 424221252377SVasundhara Volam 424321252377SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4244b4e32a71SPadmanabh Ratnakar return status; 4245b4e32a71SPadmanabh Ratnakar } 4246b4e32a71SPadmanabh Ratnakar 4247980df249SSuresh Reddy /* When more than 1 NIC descriptor is present in the descriptor list, 4248980df249SSuresh Reddy * the caller must specify the pf_num to obtain the NIC descriptor 4249980df249SSuresh Reddy * corresponding to its pci function. 4250980df249SSuresh Reddy * get_vft must be true when the caller wants the VF-template desc of the 4251980df249SSuresh Reddy * PF-pool. 4252980df249SSuresh Reddy * The pf_num should be set to PF_NUM_IGNORE when the caller knows 4253980df249SSuresh Reddy * that only it's NIC descriptor is present in the descriptor list. 4254980df249SSuresh Reddy */ 425510cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 4256980df249SSuresh Reddy bool get_vft, u8 pf_num) 4257abb93951SPadmanabh Ratnakar { 4258150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 425910cccf60SVasundhara Volam struct be_nic_res_desc *nic; 4260abb93951SPadmanabh Ratnakar int i; 4261abb93951SPadmanabh Ratnakar 4262abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 4263150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 426410cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 426510cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 4266980df249SSuresh Reddy 4267980df249SSuresh Reddy if ((pf_num == PF_NUM_IGNORE || 4268980df249SSuresh Reddy nic->pf_num == pf_num) && 4269980df249SSuresh Reddy (!get_vft || nic->flags & BIT(VFT_SHIFT))) 427010cccf60SVasundhara Volam return nic; 427110cccf60SVasundhara Volam } 4272150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4273150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4274150d58c7SVasundhara Volam } 4275950e2958SWei Yang return NULL; 4276abb93951SPadmanabh Ratnakar } 4277abb93951SPadmanabh Ratnakar 4278980df249SSuresh Reddy static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count, 4279980df249SSuresh Reddy u8 pf_num) 428010cccf60SVasundhara Volam { 4281980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, true, pf_num); 428210cccf60SVasundhara Volam } 428310cccf60SVasundhara Volam 4284980df249SSuresh Reddy static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count, 4285980df249SSuresh Reddy u8 pf_num) 428610cccf60SVasundhara Volam { 4287980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, false, pf_num); 428810cccf60SVasundhara Volam } 428910cccf60SVasundhara Volam 4290980df249SSuresh Reddy static struct be_pcie_res_desc *be_get_pcie_desc(u8 *buf, u32 desc_count, 4291980df249SSuresh Reddy u8 pf_num) 4292150d58c7SVasundhara Volam { 4293150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4294150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4295150d58c7SVasundhara Volam int i; 4296150d58c7SVasundhara Volam 4297150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 4298980df249SSuresh Reddy if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4299980df249SSuresh Reddy hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4300150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 4301980df249SSuresh Reddy if (pcie->pf_num == pf_num) 4302150d58c7SVasundhara Volam return pcie; 4303150d58c7SVasundhara Volam } 4304150d58c7SVasundhara Volam 4305150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4306150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4307150d58c7SVasundhara Volam } 4308abb93951SPadmanabh Ratnakar return NULL; 4309abb93951SPadmanabh Ratnakar } 4310abb93951SPadmanabh Ratnakar 4311f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 4312f93f160bSVasundhara Volam { 4313f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4314f93f160bSVasundhara Volam int i; 4315f93f160bSVasundhara Volam 4316f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 4317f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 4318f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 4319f93f160bSVasundhara Volam 4320f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4321f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4322f93f160bSVasundhara Volam } 4323f93f160bSVasundhara Volam return NULL; 4324f93f160bSVasundhara Volam } 4325f93f160bSVasundhara Volam 432692bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 432792bf14abSSathya Perla struct be_nic_res_desc *desc) 432892bf14abSSathya Perla { 432992bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 433092bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 433192bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 433292bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 433392bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 433492bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 433592bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 4336f2858738SVasundhara Volam res->max_cq_count = le16_to_cpu(desc->cq_count); 4337f2858738SVasundhara Volam res->max_iface_count = le16_to_cpu(desc->iface_count); 4338f2858738SVasundhara Volam res->max_mcc_count = le16_to_cpu(desc->mcc_count); 433992bf14abSSathya Perla /* Clear flags that driver is not interested in */ 434092bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 434192bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 434292bf14abSSathya Perla } 434392bf14abSSathya Perla 4344abb93951SPadmanabh Ratnakar /* Uses Mbox */ 434592bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 4346abb93951SPadmanabh Ratnakar { 4347abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4348abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 4349abb93951SPadmanabh Ratnakar int status; 4350abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 4351abb93951SPadmanabh Ratnakar 4352d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4353d98ef50fSSuresh Reddy return -1; 4354d98ef50fSSuresh Reddy 4355abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 4356abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 4357750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4358e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4359abb93951SPadmanabh Ratnakar if (!cmd.va) { 4360abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 4361d98ef50fSSuresh Reddy status = -ENOMEM; 4362d98ef50fSSuresh Reddy goto err; 4363abb93951SPadmanabh Ratnakar } 4364abb93951SPadmanabh Ratnakar 4365abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 4366abb93951SPadmanabh Ratnakar if (!wrb) { 4367abb93951SPadmanabh Ratnakar status = -EBUSY; 4368abb93951SPadmanabh Ratnakar goto err; 4369abb93951SPadmanabh Ratnakar } 4370abb93951SPadmanabh Ratnakar 4371abb93951SPadmanabh Ratnakar req = cmd.va; 4372abb93951SPadmanabh Ratnakar 4373abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4374abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 4375abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 4376abb93951SPadmanabh Ratnakar 437728710c55SKalesh AP if (skyhawk_chip(adapter)) 437828710c55SKalesh AP req->hdr.version = 1; 437928710c55SKalesh AP 4380abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 4381abb93951SPadmanabh Ratnakar if (!status) { 4382abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 4383abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 4384150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 4385abb93951SPadmanabh Ratnakar 4386980df249SSuresh Reddy /* GET_FUNC_CONFIG returns resource descriptors of the 4387980df249SSuresh Reddy * current function only. So, pf_num should be set to 4388980df249SSuresh Reddy * PF_NUM_IGNORE. 4389980df249SSuresh Reddy */ 4390980df249SSuresh Reddy desc = be_get_func_nic_desc(resp->func_param, desc_count, 4391980df249SSuresh Reddy PF_NUM_IGNORE); 4392abb93951SPadmanabh Ratnakar if (!desc) { 4393abb93951SPadmanabh Ratnakar status = -EINVAL; 4394abb93951SPadmanabh Ratnakar goto err; 4395abb93951SPadmanabh Ratnakar } 4396980df249SSuresh Reddy 4397980df249SSuresh Reddy /* Store pf_num & vf_num for later use in GET_PROFILE_CONFIG */ 4398980df249SSuresh Reddy adapter->pf_num = desc->pf_num; 4399980df249SSuresh Reddy adapter->vf_num = desc->vf_num; 4400980df249SSuresh Reddy 4401980df249SSuresh Reddy if (res) 440292bf14abSSathya Perla be_copy_nic_desc(res, desc); 4403abb93951SPadmanabh Ratnakar } 4404abb93951SPadmanabh Ratnakar err: 4405abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 4406d98ef50fSSuresh Reddy if (cmd.va) 4407e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4408e51000dbSSriharsha Basavapatna cmd.dma); 4409abb93951SPadmanabh Ratnakar return status; 4410abb93951SPadmanabh Ratnakar } 4411abb93951SPadmanabh Ratnakar 4412de2b1e03SSomnath Kotur /* This routine returns a list of all the NIC PF_nums in the adapter */ 4413d766e7e6SBaoyou Xie static u16 be_get_nic_pf_num_list(u8 *buf, u32 desc_count, u16 *nic_pf_nums) 4414de2b1e03SSomnath Kotur { 4415de2b1e03SSomnath Kotur struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4416de2b1e03SSomnath Kotur struct be_pcie_res_desc *pcie = NULL; 4417de2b1e03SSomnath Kotur int i; 4418de2b1e03SSomnath Kotur u16 nic_pf_count = 0; 4419de2b1e03SSomnath Kotur 4420de2b1e03SSomnath Kotur for (i = 0; i < desc_count; i++) { 4421de2b1e03SSomnath Kotur if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4422de2b1e03SSomnath Kotur hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4423de2b1e03SSomnath Kotur pcie = (struct be_pcie_res_desc *)hdr; 4424de2b1e03SSomnath Kotur if (pcie->pf_state && (pcie->pf_type == MISSION_NIC || 4425de2b1e03SSomnath Kotur pcie->pf_type == MISSION_RDMA)) { 4426de2b1e03SSomnath Kotur nic_pf_nums[nic_pf_count++] = pcie->pf_num; 4427de2b1e03SSomnath Kotur } 4428de2b1e03SSomnath Kotur } 4429de2b1e03SSomnath Kotur 4430de2b1e03SSomnath Kotur hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4431de2b1e03SSomnath Kotur hdr = (void *)hdr + hdr->desc_len; 4432de2b1e03SSomnath Kotur } 4433de2b1e03SSomnath Kotur return nic_pf_count; 4434de2b1e03SSomnath Kotur } 4435de2b1e03SSomnath Kotur 4436980df249SSuresh Reddy /* Will use MBOX only if MCCQ has not been created */ 443792bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 4438de2b1e03SSomnath Kotur struct be_resources *res, 4439de2b1e03SSomnath Kotur struct be_port_resources *port_res, 4440de2b1e03SSomnath Kotur u8 profile_type, u8 query, u8 domain) 4441a05f99dbSVasundhara Volam { 4442150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 4443ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 444410cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 4445150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4446f93f160bSVasundhara Volam struct be_port_res_desc *port; 4447150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 4448ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 4449a05f99dbSVasundhara Volam struct be_dma_mem cmd; 4450f2858738SVasundhara Volam u16 desc_count; 4451a05f99dbSVasundhara Volam int status; 4452a05f99dbSVasundhara Volam 4453a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4454a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 4455750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4456e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4457150d58c7SVasundhara Volam if (!cmd.va) 4458a05f99dbSVasundhara Volam return -ENOMEM; 4459a05f99dbSVasundhara Volam 4460ba48c0c9SVasundhara Volam req = cmd.va; 4461ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4462ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 4463ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 4464ba48c0c9SVasundhara Volam 4465ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 4466ba48c0c9SVasundhara Volam req->hdr.version = 1; 4467de2b1e03SSomnath Kotur req->type = profile_type; 446872ef3a88SSomnath Kotur req->hdr.domain = domain; 4469ba48c0c9SVasundhara Volam 4470f2858738SVasundhara Volam /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the 4471f2858738SVasundhara Volam * descriptors with all bits set to "1" for the fields which can be 4472f2858738SVasundhara Volam * modified using SET_PROFILE_CONFIG cmd. 4473f2858738SVasundhara Volam */ 4474f2858738SVasundhara Volam if (query == RESOURCE_MODIFIABLE) 4475f2858738SVasundhara Volam req->type |= QUERY_MODIFIABLE_FIELDS_TYPE; 4476f2858738SVasundhara Volam 4477ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4478150d58c7SVasundhara Volam if (status) 4479abb93951SPadmanabh Ratnakar goto err; 4480150d58c7SVasundhara Volam 4481150d58c7SVasundhara Volam resp = cmd.va; 4482f2858738SVasundhara Volam desc_count = le16_to_cpu(resp->desc_count); 4483150d58c7SVasundhara Volam 4484de2b1e03SSomnath Kotur if (port_res) { 4485de2b1e03SSomnath Kotur u16 nic_pf_cnt = 0, i; 4486de2b1e03SSomnath Kotur u16 nic_pf_num_list[MAX_NIC_FUNCS]; 4487de2b1e03SSomnath Kotur 4488de2b1e03SSomnath Kotur nic_pf_cnt = be_get_nic_pf_num_list(resp->func_param, 4489de2b1e03SSomnath Kotur desc_count, 4490de2b1e03SSomnath Kotur nic_pf_num_list); 4491de2b1e03SSomnath Kotur 4492de2b1e03SSomnath Kotur for (i = 0; i < nic_pf_cnt; i++) { 4493de2b1e03SSomnath Kotur nic = be_get_func_nic_desc(resp->func_param, desc_count, 4494de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4495de2b1e03SSomnath Kotur if (nic->link_param == adapter->port_num) { 4496de2b1e03SSomnath Kotur port_res->nic_pfs++; 4497de2b1e03SSomnath Kotur pcie = be_get_pcie_desc(resp->func_param, 4498de2b1e03SSomnath Kotur desc_count, 4499de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4500de2b1e03SSomnath Kotur port_res->max_vfs += le16_to_cpu(pcie->num_vfs); 4501de2b1e03SSomnath Kotur } 4502de2b1e03SSomnath Kotur } 45039d7f19dcSPetr Oros goto err; 4504de2b1e03SSomnath Kotur } 4505de2b1e03SSomnath Kotur 4506980df249SSuresh Reddy pcie = be_get_pcie_desc(resp->func_param, desc_count, 4507980df249SSuresh Reddy adapter->pf_num); 4508150d58c7SVasundhara Volam if (pcie) 450992bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 4510150d58c7SVasundhara Volam 4511f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 4512f93f160bSVasundhara Volam if (port) 4513f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 4514f93f160bSVasundhara Volam 4515980df249SSuresh Reddy nic = be_get_func_nic_desc(resp->func_param, desc_count, 4516980df249SSuresh Reddy adapter->pf_num); 451792bf14abSSathya Perla if (nic) 451892bf14abSSathya Perla be_copy_nic_desc(res, nic); 451992bf14abSSathya Perla 4520980df249SSuresh Reddy vf_res = be_get_vft_desc(resp->func_param, desc_count, 4521980df249SSuresh Reddy adapter->pf_num); 452210cccf60SVasundhara Volam if (vf_res) 452310cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 4524abb93951SPadmanabh Ratnakar err: 4525a05f99dbSVasundhara Volam if (cmd.va) 4526e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4527e51000dbSSriharsha Basavapatna cmd.dma); 4528abb93951SPadmanabh Ratnakar return status; 4529abb93951SPadmanabh Ratnakar } 4530abb93951SPadmanabh Ratnakar 4531bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 4532bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 4533bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 4534d5c18473SPadmanabh Ratnakar { 4535d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 4536bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 4537bec84e6bSVasundhara Volam struct be_dma_mem cmd; 4538d5c18473SPadmanabh Ratnakar int status; 4539d5c18473SPadmanabh Ratnakar 4540bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4541bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 4542750afb08SLuis Chamberlain cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4543e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4544bec84e6bSVasundhara Volam if (!cmd.va) 4545bec84e6bSVasundhara Volam return -ENOMEM; 4546d5c18473SPadmanabh Ratnakar 4547bec84e6bSVasundhara Volam req = cmd.va; 4548d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4549bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 4550bec84e6bSVasundhara Volam &wrb, &cmd); 4551a401801cSSathya Perla req->hdr.version = version; 4552d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 4553bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 4554a401801cSSathya Perla memcpy(req->desc, desc, size); 4555d5c18473SPadmanabh Ratnakar 4556bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4557bec84e6bSVasundhara Volam 4558bec84e6bSVasundhara Volam if (cmd.va) 4559e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4560e51000dbSSriharsha Basavapatna cmd.dma); 4561d5c18473SPadmanabh Ratnakar return status; 4562d5c18473SPadmanabh Ratnakar } 4563d5c18473SPadmanabh Ratnakar 4564a401801cSSathya Perla /* Mark all fields invalid */ 4565d766e7e6SBaoyou Xie static void be_reset_nic_desc(struct be_nic_res_desc *nic) 4566a401801cSSathya Perla { 4567a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 4568a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 4569a401801cSSathya Perla nic->mcc_count = 0xFFFF; 4570a401801cSSathya Perla nic->vlan_count = 0xFFFF; 4571a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 4572a401801cSSathya Perla nic->txq_count = 0xFFFF; 4573a401801cSSathya Perla nic->rq_count = 0xFFFF; 4574a401801cSSathya Perla nic->rssq_count = 0xFFFF; 4575a401801cSSathya Perla nic->lro_count = 0xFFFF; 4576a401801cSSathya Perla nic->cq_count = 0xFFFF; 4577a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 4578a401801cSSathya Perla nic->eq_count = 0xFFFF; 45790f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 4580a401801cSSathya Perla nic->link_param = 0xFF; 45810f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 4582a401801cSSathya Perla nic->acpi_params = 0xFF; 4583a401801cSSathya Perla nic->wol_param = 0x0F; 45840f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 45850f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 4586bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 4587a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 4588a401801cSSathya Perla } 4589a401801cSSathya Perla 4590bec84e6bSVasundhara Volam /* Mark all fields invalid */ 4591bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 4592bec84e6bSVasundhara Volam { 4593bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 4594bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 4595bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 4596bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 4597bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 4598bec84e6bSVasundhara Volam } 4599bec84e6bSVasundhara Volam 46000f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 46010f77ba73SRavikumar Nelavelli u8 domain) 4602a401801cSSathya Perla { 4603a401801cSSathya Perla struct be_nic_res_desc nic_desc; 46040f77ba73SRavikumar Nelavelli u32 bw_percent; 46050f77ba73SRavikumar Nelavelli u16 version = 0; 46060f77ba73SRavikumar Nelavelli 46070f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 46080f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 4609a401801cSSathya Perla 4610a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 4611980df249SSuresh Reddy nic_desc.pf_num = adapter->pf_num; 46120f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 461358bdeaa6SKalesh AP nic_desc.bw_min = 0; 46140f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 4615a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 4616a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 4617a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 4618a401801cSSathya Perla (1 << NOSV_SHIFT); 46190f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 46200f77ba73SRavikumar Nelavelli } else { 46210f77ba73SRavikumar Nelavelli version = 1; 46220f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 46230f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 46240f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 46250f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 46260f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 46270f77ba73SRavikumar Nelavelli } 4628a401801cSSathya Perla 4629a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 46300f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 4631bec84e6bSVasundhara Volam 1, version, domain); 4632bec84e6bSVasundhara Volam } 4633bec84e6bSVasundhara Volam 4634bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 4635f2858738SVasundhara Volam struct be_resources pool_res, u16 num_vfs, 4636b9263cbfSSuresh Reddy struct be_resources *vft_res) 4637bec84e6bSVasundhara Volam { 4638bec84e6bSVasundhara Volam struct { 4639bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 4640bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 4641bec84e6bSVasundhara Volam } __packed desc; 4642bec84e6bSVasundhara Volam 4643bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 4644bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 4645bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 4646bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4647f2858738SVasundhara Volam desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4648bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 4649bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 4650bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 4651bec84e6bSVasundhara Volam 4652bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 4653bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 4654bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 4655bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4656b9263cbfSSuresh Reddy desc.nic_vft.flags = vft_res->flags | BIT(VFT_SHIFT) | 4657b9263cbfSSuresh Reddy BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4658bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 4659bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 4660b9263cbfSSuresh Reddy desc.nic_vft.cap_flags = cpu_to_le32(vft_res->vf_if_cap_flags); 4661b9263cbfSSuresh Reddy desc.nic_vft.rq_count = cpu_to_le16(vft_res->max_rx_qs); 4662b9263cbfSSuresh Reddy desc.nic_vft.txq_count = cpu_to_le16(vft_res->max_tx_qs); 4663b9263cbfSSuresh Reddy desc.nic_vft.rssq_count = cpu_to_le16(vft_res->max_rss_qs); 4664b9263cbfSSuresh Reddy desc.nic_vft.cq_count = cpu_to_le16(vft_res->max_cq_count); 4665bec84e6bSVasundhara Volam 4666b9263cbfSSuresh Reddy if (vft_res->max_uc_mac) 4667b9263cbfSSuresh Reddy desc.nic_vft.unicast_mac_count = 4668b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_uc_mac); 4669b9263cbfSSuresh Reddy if (vft_res->max_vlans) 4670b9263cbfSSuresh Reddy desc.nic_vft.vlan_count = cpu_to_le16(vft_res->max_vlans); 4671b9263cbfSSuresh Reddy if (vft_res->max_iface_count) 4672b9263cbfSSuresh Reddy desc.nic_vft.iface_count = 4673b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_iface_count); 4674b9263cbfSSuresh Reddy if (vft_res->max_mcc_count) 4675b9263cbfSSuresh Reddy desc.nic_vft.mcc_count = cpu_to_le16(vft_res->max_mcc_count); 4676bec84e6bSVasundhara Volam 4677bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 4678bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 4679a401801cSSathya Perla } 4680a401801cSSathya Perla 4681a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 4682a401801cSSathya Perla { 4683a401801cSSathya Perla struct be_mcc_wrb *wrb; 4684a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 4685a401801cSSathya Perla int status; 4686a401801cSSathya Perla 4687a401801cSSathya Perla if (iface == 0xFFFFFFFF) 4688a401801cSSathya Perla return -1; 4689a401801cSSathya Perla 4690b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4691a401801cSSathya Perla 4692a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 4693a401801cSSathya Perla if (!wrb) { 4694a401801cSSathya Perla status = -EBUSY; 4695a401801cSSathya Perla goto err; 4696a401801cSSathya Perla } 4697a401801cSSathya Perla req = embedded_payload(wrb); 4698a401801cSSathya Perla 4699a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4700a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 4701a401801cSSathya Perla wrb, NULL); 4702a401801cSSathya Perla req->op = op; 4703a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 4704a401801cSSathya Perla 4705a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 4706a401801cSSathya Perla err: 4707b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4708a401801cSSathya Perla return status; 4709a401801cSSathya Perla } 4710a401801cSSathya Perla 4711a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 4712a401801cSSathya Perla { 4713a401801cSSathya Perla struct be_port_res_desc port_desc; 4714a401801cSSathya Perla 4715a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 4716a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 4717a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4718a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 4719a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 4720a401801cSSathya Perla if (port) { 4721a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 4722a401801cSSathya Perla (1 << RCVID_SHIFT); 4723a401801cSSathya Perla port_desc.nv_port = swab16(port); 4724a401801cSSathya Perla } else { 4725a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 4726a401801cSSathya Perla port_desc.nv_port = 0; 4727a401801cSSathya Perla } 4728a401801cSSathya Perla 4729a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 4730bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 4731a401801cSSathya Perla } 4732a401801cSSathya Perla 47334c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 47344c876616SSathya Perla int vf_num) 47354c876616SSathya Perla { 47364c876616SSathya Perla struct be_mcc_wrb *wrb; 47374c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 47384c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 47394c876616SSathya Perla int status; 47404c876616SSathya Perla 4741b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 47424c876616SSathya Perla 47434c876616SSathya Perla wrb = wrb_from_mccq(adapter); 47444c876616SSathya Perla if (!wrb) { 47454c876616SSathya Perla status = -EBUSY; 47464c876616SSathya Perla goto err; 47474c876616SSathya Perla } 47484c876616SSathya Perla req = embedded_payload(wrb); 47494c876616SSathya Perla 47504c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 47514c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 47524c876616SSathya Perla wrb, NULL); 47534c876616SSathya Perla req->hdr.domain = vf_num + 1; 47544c876616SSathya Perla 47554c876616SSathya Perla status = be_mcc_notify_wait(adapter); 47564c876616SSathya Perla if (!status) { 47574c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 47584c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 47594c876616SSathya Perla } 47604c876616SSathya Perla 47614c876616SSathya Perla err: 4762b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 47634c876616SSathya Perla return status; 47644c876616SSathya Perla } 47654c876616SSathya Perla 47665c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 47675c510811SSomnath Kotur { 47685c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 47695c510811SSomnath Kotur u32 reg_val; 47705c510811SSomnath Kotur int status = 0, i; 47715c510811SSomnath Kotur 47725c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 47735c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 47745c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 47755c510811SSomnath Kotur break; 47765c510811SSomnath Kotur 47775c510811SSomnath Kotur ssleep(1); 47785c510811SSomnath Kotur } 47795c510811SSomnath Kotur 47805c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 47815c510811SSomnath Kotur status = -1; 47825c510811SSomnath Kotur 47835c510811SSomnath Kotur return status; 47845c510811SSomnath Kotur } 47855c510811SSomnath Kotur 47865c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 47875c510811SSomnath Kotur { 47885c510811SSomnath Kotur int status = 0; 47895c510811SSomnath Kotur 47905c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47915c510811SSomnath Kotur if (status) 47925c510811SSomnath Kotur return status; 47935c510811SSomnath Kotur 47945c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 47955c510811SSomnath Kotur 47965c510811SSomnath Kotur return status; 47975c510811SSomnath Kotur } 47985c510811SSomnath Kotur 47995c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 48005c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 48015c510811SSomnath Kotur { 48025c510811SSomnath Kotur u32 sliport_status = 0; 48035c510811SSomnath Kotur 48045c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 48055c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 48065c510811SSomnath Kotur } 48075c510811SSomnath Kotur 48085c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 48095c510811SSomnath Kotur { 4810f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 48115c510811SSomnath Kotur int status; 48125c510811SSomnath Kotur 4813f0613380SKalesh AP if (dump_present(adapter)) { 4814f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 4815f0613380SKalesh AP return -EEXIST; 4816f0613380SKalesh AP } 4817f0613380SKalesh AP 48185c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 48195c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 48205c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 48215c510811SSomnath Kotur if (status < 0) { 4822f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 48235c510811SSomnath Kotur return status; 48245c510811SSomnath Kotur } 48255c510811SSomnath Kotur 48265c510811SSomnath Kotur status = lancer_wait_idle(adapter); 48275c510811SSomnath Kotur if (status) 48285c510811SSomnath Kotur return status; 48295c510811SSomnath Kotur 48305c510811SSomnath Kotur if (!dump_present(adapter)) { 4831f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 4832f0613380SKalesh AP return -EIO; 48335c510811SSomnath Kotur } 48345c510811SSomnath Kotur 48355c510811SSomnath Kotur return 0; 48365c510811SSomnath Kotur } 48375c510811SSomnath Kotur 4838f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 4839f0613380SKalesh AP { 4840f0613380SKalesh AP int status; 4841f0613380SKalesh AP 4842f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 4843f0613380SKalesh AP return be_cmd_status(status); 4844f0613380SKalesh AP } 4845f0613380SKalesh AP 4846dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 4847dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 4848dcf7ebbaSPadmanabh Ratnakar { 4849dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4850dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 4851dcf7ebbaSPadmanabh Ratnakar int status; 4852dcf7ebbaSPadmanabh Ratnakar 48530599863dSVasundhara Volam if (BEx_chip(adapter)) 4854dcf7ebbaSPadmanabh Ratnakar return 0; 4855dcf7ebbaSPadmanabh Ratnakar 4856b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4857dcf7ebbaSPadmanabh Ratnakar 4858dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4859dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4860dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4861dcf7ebbaSPadmanabh Ratnakar goto err; 4862dcf7ebbaSPadmanabh Ratnakar } 4863dcf7ebbaSPadmanabh Ratnakar 4864dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4865dcf7ebbaSPadmanabh Ratnakar 4866dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4867dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4868dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4869dcf7ebbaSPadmanabh Ratnakar 4870dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4871dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4872dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4873dcf7ebbaSPadmanabh Ratnakar err: 4874b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4875dcf7ebbaSPadmanabh Ratnakar return status; 4876dcf7ebbaSPadmanabh Ratnakar } 4877dcf7ebbaSPadmanabh Ratnakar 487868c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 487968c45a2dSSomnath Kotur { 488068c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 488168c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 488268c45a2dSSomnath Kotur int status; 488368c45a2dSSomnath Kotur 488468c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 488568c45a2dSSomnath Kotur return -1; 488668c45a2dSSomnath Kotur 488768c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 488868c45a2dSSomnath Kotur 488968c45a2dSSomnath Kotur req = embedded_payload(wrb); 489068c45a2dSSomnath Kotur 489168c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 489268c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 489368c45a2dSSomnath Kotur wrb, NULL); 489468c45a2dSSomnath Kotur 489568c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 489668c45a2dSSomnath Kotur 489768c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 489868c45a2dSSomnath Kotur 489968c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 490068c45a2dSSomnath Kotur return status; 490168c45a2dSSomnath Kotur } 490268c45a2dSSomnath Kotur 4903542963b7SVasundhara Volam /* Uses MBOX */ 4904542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4905542963b7SVasundhara Volam { 4906542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4907542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4908542963b7SVasundhara Volam int status; 4909542963b7SVasundhara Volam 4910542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4911542963b7SVasundhara Volam return -1; 4912542963b7SVasundhara Volam 4913542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4914542963b7SVasundhara Volam if (!wrb) { 4915542963b7SVasundhara Volam status = -EBUSY; 4916542963b7SVasundhara Volam goto err; 4917542963b7SVasundhara Volam } 4918542963b7SVasundhara Volam 4919542963b7SVasundhara Volam req = embedded_payload(wrb); 4920542963b7SVasundhara Volam 4921542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4922542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4923542963b7SVasundhara Volam wrb, NULL); 4924542963b7SVasundhara Volam 4925542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4926542963b7SVasundhara Volam if (!status) { 4927542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4928542963b7SVasundhara Volam embedded_payload(wrb); 492903d28ffeSKalesh AP 4930542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4931542963b7SVasundhara Volam } 4932542963b7SVasundhara Volam 4933542963b7SVasundhara Volam err: 4934542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4935542963b7SVasundhara Volam return status; 4936542963b7SVasundhara Volam } 4937542963b7SVasundhara Volam 4938d766e7e6SBaoyou Xie static int 4939d766e7e6SBaoyou Xie __be_cmd_set_logical_link_config(struct be_adapter *adapter, 4940d9d426afSSuresh Reddy int link_state, int version, u8 domain) 4941bdce2ad7SSuresh Reddy { 4942bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 49430b98ca2aSSuresh Reddy struct be_mcc_wrb *wrb; 49440b98ca2aSSuresh Reddy u32 link_config = 0; 4945bdce2ad7SSuresh Reddy int status; 4946bdce2ad7SSuresh Reddy 4947b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4948bdce2ad7SSuresh Reddy 4949bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4950bdce2ad7SSuresh Reddy if (!wrb) { 4951bdce2ad7SSuresh Reddy status = -EBUSY; 4952bdce2ad7SSuresh Reddy goto err; 4953bdce2ad7SSuresh Reddy } 4954bdce2ad7SSuresh Reddy 4955bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4956bdce2ad7SSuresh Reddy 4957bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4958bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4959bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4960bdce2ad7SSuresh Reddy 4961d9d426afSSuresh Reddy req->hdr.version = version; 4962bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4963bdce2ad7SSuresh Reddy 4964d9d426afSSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE || 4965d9d426afSSuresh Reddy link_state == IFLA_VF_LINK_STATE_AUTO) 49660b98ca2aSSuresh Reddy link_config |= PLINK_ENABLE; 4967bdce2ad7SSuresh Reddy 4968bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 49690b98ca2aSSuresh Reddy link_config |= PLINK_TRACK; 49700b98ca2aSSuresh Reddy 49710b98ca2aSSuresh Reddy req->link_config = cpu_to_le32(link_config); 4972bdce2ad7SSuresh Reddy 4973bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4974bdce2ad7SSuresh Reddy err: 4975b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4976bdce2ad7SSuresh Reddy return status; 4977bdce2ad7SSuresh Reddy } 4978bdce2ad7SSuresh Reddy 4979d9d426afSSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4980d9d426afSSuresh Reddy int link_state, u8 domain) 4981d9d426afSSuresh Reddy { 4982d9d426afSSuresh Reddy int status; 4983d9d426afSSuresh Reddy 4984dc6e8511SSuresh Reddy if (BE2_chip(adapter)) 4985d9d426afSSuresh Reddy return -EOPNOTSUPP; 4986d9d426afSSuresh Reddy 4987d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4988d9d426afSSuresh Reddy 2, domain); 4989d9d426afSSuresh Reddy 4990d9d426afSSuresh Reddy /* Version 2 of the command will not be recognized by older FW. 4991d9d426afSSuresh Reddy * On such a failure issue version 1 of the command. 4992d9d426afSSuresh Reddy */ 4993d9d426afSSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST) 4994d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4995d9d426afSSuresh Reddy 1, domain); 4996d9d426afSSuresh Reddy return status; 4997d9d426afSSuresh Reddy } 4998710f3e59SSriharsha Basavapatna 4999710f3e59SSriharsha Basavapatna int be_cmd_set_features(struct be_adapter *adapter) 5000710f3e59SSriharsha Basavapatna { 5001710f3e59SSriharsha Basavapatna struct be_cmd_resp_set_features *resp; 5002710f3e59SSriharsha Basavapatna struct be_cmd_req_set_features *req; 5003710f3e59SSriharsha Basavapatna struct be_mcc_wrb *wrb; 5004710f3e59SSriharsha Basavapatna int status; 5005710f3e59SSriharsha Basavapatna 5006710f3e59SSriharsha Basavapatna if (mutex_lock_interruptible(&adapter->mcc_lock)) 5007710f3e59SSriharsha Basavapatna return -1; 5008710f3e59SSriharsha Basavapatna 5009710f3e59SSriharsha Basavapatna wrb = wrb_from_mccq(adapter); 5010710f3e59SSriharsha Basavapatna if (!wrb) { 5011710f3e59SSriharsha Basavapatna status = -EBUSY; 5012710f3e59SSriharsha Basavapatna goto err; 5013710f3e59SSriharsha Basavapatna } 5014710f3e59SSriharsha Basavapatna 5015710f3e59SSriharsha Basavapatna req = embedded_payload(wrb); 5016710f3e59SSriharsha Basavapatna 5017710f3e59SSriharsha Basavapatna be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 5018710f3e59SSriharsha Basavapatna OPCODE_COMMON_SET_FEATURES, 5019710f3e59SSriharsha Basavapatna sizeof(*req), wrb, NULL); 5020710f3e59SSriharsha Basavapatna 5021710f3e59SSriharsha Basavapatna req->features = cpu_to_le32(BE_FEATURE_UE_RECOVERY); 5022710f3e59SSriharsha Basavapatna req->parameter_len = cpu_to_le32(sizeof(struct be_req_ue_recovery)); 5023710f3e59SSriharsha Basavapatna req->parameter.req.uer = cpu_to_le32(BE_UE_RECOVERY_UER_MASK); 5024710f3e59SSriharsha Basavapatna 5025710f3e59SSriharsha Basavapatna status = be_mcc_notify_wait(adapter); 5026710f3e59SSriharsha Basavapatna if (status) 5027710f3e59SSriharsha Basavapatna goto err; 5028710f3e59SSriharsha Basavapatna 5029710f3e59SSriharsha Basavapatna resp = embedded_payload(wrb); 5030710f3e59SSriharsha Basavapatna 5031710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_poll_time = 5032710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2rp); 5033710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_reset_time = 5034710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2sr); 5035710f3e59SSriharsha Basavapatna adapter->error_recovery.recovery_supported = true; 5036710f3e59SSriharsha Basavapatna err: 5037710f3e59SSriharsha Basavapatna /* Checking "MCC_STATUS_INVALID_LENGTH" for SKH as FW 5038710f3e59SSriharsha Basavapatna * returns this error in older firmware versions 5039710f3e59SSriharsha Basavapatna */ 5040710f3e59SSriharsha Basavapatna if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 5041710f3e59SSriharsha Basavapatna base_status(status) == MCC_STATUS_INVALID_LENGTH) 5042710f3e59SSriharsha Basavapatna dev_info(&adapter->pdev->dev, 5043710f3e59SSriharsha Basavapatna "Adapter does not support HW error recovery\n"); 5044710f3e59SSriharsha Basavapatna 5045710f3e59SSriharsha Basavapatna mutex_unlock(&adapter->mcc_lock); 5046710f3e59SSriharsha Basavapatna return status; 5047710f3e59SSriharsha Basavapatna } 5048710f3e59SSriharsha Basavapatna 50496a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 50506a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 50516a4ab669SParav Pandit { 50526a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 50536a4ab669SParav Pandit struct be_mcc_wrb *wrb; 50546a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 50556a4ab669SParav Pandit struct be_cmd_req_hdr *req; 50566a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 50576a4ab669SParav Pandit int status; 50586a4ab669SParav Pandit 5059b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 50606a4ab669SParav Pandit 50616a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 50626a4ab669SParav Pandit if (!wrb) { 50636a4ab669SParav Pandit status = -EBUSY; 50646a4ab669SParav Pandit goto err; 50656a4ab669SParav Pandit } 50666a4ab669SParav Pandit req = embedded_payload(wrb); 50676a4ab669SParav Pandit resp = embedded_payload(wrb); 50686a4ab669SParav Pandit 50696a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 50706a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 50716a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 50726a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 50736a4ab669SParav Pandit 50746a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 50756a4ab669SParav Pandit if (cmd_status) 50766a4ab669SParav Pandit *cmd_status = (status & 0xffff); 50776a4ab669SParav Pandit if (ext_status) 50786a4ab669SParav Pandit *ext_status = 0; 50796a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 50806a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 50816a4ab669SParav Pandit err: 5082b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 50836a4ab669SParav Pandit return status; 50846a4ab669SParav Pandit } 50856a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 5086