19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 1445eeff635SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 1455eeff635SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 1465eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1475eeff635SSuresh Reddy return 0; 1485eeff635SSuresh Reddy } 1495eeff635SSuresh Reddy 150652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 151652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 152652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1539aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1545eeff635SSuresh Reddy complete(&adapter->et_cmd_compl); 1559aebddd1SJeff Kirsher } 1569aebddd1SJeff Kirsher 1579aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 158652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 159652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 160652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1619aebddd1SJeff Kirsher be_parse_stats(adapter); 1629aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1639aebddd1SJeff Kirsher } 164652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 165652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1663de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 167652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1683de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1693de09455SSomnath Kotur resp->on_die_temperature; 1703de09455SSomnath Kotur } 1719aebddd1SJeff Kirsher } else { 172652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1737aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1743de09455SSomnath Kotur 1759aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1769aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1779aebddd1SJeff Kirsher goto done; 1789aebddd1SJeff Kirsher 1799aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 18097f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 181522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem); 1839aebddd1SJeff Kirsher } else { 1849aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1859aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18697f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18797f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18897f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 189d9d604f8SAjit Khaparde 190d9d604f8SAjit Khaparde if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) 191d9d604f8SAjit Khaparde return extd_status; 1929aebddd1SJeff Kirsher } 1939aebddd1SJeff Kirsher } 1949aebddd1SJeff Kirsher done: 1959aebddd1SJeff Kirsher return compl_status; 1969aebddd1SJeff Kirsher } 1979aebddd1SJeff Kirsher 1989aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1999aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2009aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 2019aebddd1SJeff Kirsher { 202b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 20342f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 204b236916aSAjit Khaparde 2052e177a5cSPadmanabh Ratnakar /* Ignore physical link event */ 2062e177a5cSPadmanabh Ratnakar if (lancer_chip(adapter) && 2072e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2082e177a5cSPadmanabh Ratnakar return; 2092e177a5cSPadmanabh Ratnakar 210b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 211b236916aSAjit Khaparde * it may not be received in some cases. 212b236916aSAjit Khaparde */ 213b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 2149aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 2159aebddd1SJeff Kirsher } 2169aebddd1SJeff Kirsher 2179aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2189aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2199aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2209aebddd1SJeff Kirsher { 2219aebddd1SJeff Kirsher if (evt->valid) { 2229aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2239aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2249aebddd1SJeff Kirsher adapter->recommended_prio = 2259aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2269aebddd1SJeff Kirsher } 2279aebddd1SJeff Kirsher } 2289aebddd1SJeff Kirsher 229323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2309aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2319aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2329aebddd1SJeff Kirsher { 233323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 234323ff71eSSathya Perla evt->physical_port == adapter->port_num) 235323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2369aebddd1SJeff Kirsher } 2379aebddd1SJeff Kirsher 2389aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2399aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2409aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2419aebddd1SJeff Kirsher { 2429aebddd1SJeff Kirsher if (evt->enabled) 243939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 2449aebddd1SJeff Kirsher else 2459aebddd1SJeff Kirsher adapter->pvid = 0; 2469aebddd1SJeff Kirsher } 2479aebddd1SJeff Kirsher 2489aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2499aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2509aebddd1SJeff Kirsher { 2519aebddd1SJeff Kirsher u8 event_type = 0; 2529aebddd1SJeff Kirsher 2539aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2549aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2559aebddd1SJeff Kirsher 2569aebddd1SJeff Kirsher switch (event_type) { 2579aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2589aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2599aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2609aebddd1SJeff Kirsher break; 2619aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2629aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2639aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2649aebddd1SJeff Kirsher break; 2659aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2669aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2679aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2689aebddd1SJeff Kirsher break; 2699aebddd1SJeff Kirsher default: 27005ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 27105ccaa2bSVasundhara Volam event_type); 2729aebddd1SJeff Kirsher break; 2739aebddd1SJeff Kirsher } 2749aebddd1SJeff Kirsher } 2759aebddd1SJeff Kirsher 276bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 277bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 278bc0c3405SAjit Khaparde { 279bc0c3405SAjit Khaparde u8 event_type = 0; 280bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 281bc0c3405SAjit Khaparde 282bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 283bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 284bc0c3405SAjit Khaparde 285bc0c3405SAjit Khaparde switch (event_type) { 286bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 287bc0c3405SAjit Khaparde if (evt->valid) 288bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 289bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 290bc0c3405SAjit Khaparde break; 291bc0c3405SAjit Khaparde default: 29205ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 29305ccaa2bSVasundhara Volam event_type); 294bc0c3405SAjit Khaparde break; 295bc0c3405SAjit Khaparde } 296bc0c3405SAjit Khaparde } 297bc0c3405SAjit Khaparde 2989aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 2999aebddd1SJeff Kirsher { 3009aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3019aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3029aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 3039aebddd1SJeff Kirsher } 3049aebddd1SJeff Kirsher 3059aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 3069aebddd1SJeff Kirsher { 3079aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3089aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3099aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3109aebddd1SJeff Kirsher } 3119aebddd1SJeff Kirsher 312bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 313bc0c3405SAjit Khaparde { 314bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 315bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 316bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 317bc0c3405SAjit Khaparde } 318bc0c3405SAjit Khaparde 3199aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3209aebddd1SJeff Kirsher { 3219aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3229aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3239aebddd1SJeff Kirsher 3249aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3259aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3269aebddd1SJeff Kirsher return compl; 3279aebddd1SJeff Kirsher } 3289aebddd1SJeff Kirsher return NULL; 3299aebddd1SJeff Kirsher } 3309aebddd1SJeff Kirsher 3319aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3329aebddd1SJeff Kirsher { 3339aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3349aebddd1SJeff Kirsher 3359aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3369aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3379aebddd1SJeff Kirsher 3389aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3399aebddd1SJeff Kirsher } 3409aebddd1SJeff Kirsher 3419aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3429aebddd1SJeff Kirsher { 343a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 344a323d9bfSSathya Perla 3459aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 346a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 347a323d9bfSSathya Perla 348a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3499aebddd1SJeff Kirsher } 3509aebddd1SJeff Kirsher 35110ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3529aebddd1SJeff Kirsher { 3539aebddd1SJeff Kirsher struct be_mcc_compl *compl; 35410ef9ab4SSathya Perla int num = 0, status = 0; 3559aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3569aebddd1SJeff Kirsher 357072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3589aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3599aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3609aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3619aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3629aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3639aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3649aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3659aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3669aebddd1SJeff Kirsher compl->flags, compl); 367bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 368bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 369bc0c3405SAjit Khaparde compl->flags, compl); 3709aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 37110ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3729aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3739aebddd1SJeff Kirsher } 3749aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3759aebddd1SJeff Kirsher num++; 3769aebddd1SJeff Kirsher } 3779aebddd1SJeff Kirsher 37810ef9ab4SSathya Perla if (num) 37910ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 38010ef9ab4SSathya Perla 381072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 38210ef9ab4SSathya Perla return status; 3839aebddd1SJeff Kirsher } 3849aebddd1SJeff Kirsher 3859aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3869aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3879aebddd1SJeff Kirsher { 3889aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 38910ef9ab4SSathya Perla int i, status = 0; 3909aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3919aebddd1SJeff Kirsher 3926589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 3936589ade0SSathya Perla if (be_error(adapter)) 3949aebddd1SJeff Kirsher return -EIO; 3959aebddd1SJeff Kirsher 396072a9c48SAmerigo Wang local_bh_disable(); 39710ef9ab4SSathya Perla status = be_process_mcc(adapter); 398072a9c48SAmerigo Wang local_bh_enable(); 3999aebddd1SJeff Kirsher 4009aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 4019aebddd1SJeff Kirsher break; 4029aebddd1SJeff Kirsher udelay(100); 4039aebddd1SJeff Kirsher } 4049aebddd1SJeff Kirsher if (i == mcc_timeout) { 4056589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4066589ade0SSathya Perla adapter->fw_timeout = true; 407652bf646SPadmanabh Ratnakar return -EIO; 4089aebddd1SJeff Kirsher } 4099aebddd1SJeff Kirsher return status; 4109aebddd1SJeff Kirsher } 4119aebddd1SJeff Kirsher 4129aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4139aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4149aebddd1SJeff Kirsher { 415652bf646SPadmanabh Ratnakar int status; 416652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 417652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 418652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 419652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 420652bf646SPadmanabh Ratnakar 421652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 422652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 423652bf646SPadmanabh Ratnakar 424652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 425652bf646SPadmanabh Ratnakar 4269aebddd1SJeff Kirsher be_mcc_notify(adapter); 427652bf646SPadmanabh Ratnakar 428652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 429652bf646SPadmanabh Ratnakar if (status == -EIO) 430652bf646SPadmanabh Ratnakar goto out; 431652bf646SPadmanabh Ratnakar 432652bf646SPadmanabh Ratnakar status = resp->status; 433652bf646SPadmanabh Ratnakar out: 434652bf646SPadmanabh Ratnakar return status; 4359aebddd1SJeff Kirsher } 4369aebddd1SJeff Kirsher 4379aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4389aebddd1SJeff Kirsher { 4399aebddd1SJeff Kirsher int msecs = 0; 4409aebddd1SJeff Kirsher u32 ready; 4419aebddd1SJeff Kirsher 4426589ade0SSathya Perla do { 4436589ade0SSathya Perla if (be_error(adapter)) 4449aebddd1SJeff Kirsher return -EIO; 4459aebddd1SJeff Kirsher 4469aebddd1SJeff Kirsher ready = ioread32(db); 447434b3648SSathya Perla if (ready == 0xffffffff) 4489aebddd1SJeff Kirsher return -1; 4499aebddd1SJeff Kirsher 4509aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4519aebddd1SJeff Kirsher if (ready) 4529aebddd1SJeff Kirsher break; 4539aebddd1SJeff Kirsher 4549aebddd1SJeff Kirsher if (msecs > 4000) { 4556589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4566589ade0SSathya Perla adapter->fw_timeout = true; 457f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4589aebddd1SJeff Kirsher return -1; 4599aebddd1SJeff Kirsher } 4609aebddd1SJeff Kirsher 4619aebddd1SJeff Kirsher msleep(1); 4629aebddd1SJeff Kirsher msecs++; 4639aebddd1SJeff Kirsher } while (true); 4649aebddd1SJeff Kirsher 4659aebddd1SJeff Kirsher return 0; 4669aebddd1SJeff Kirsher } 4679aebddd1SJeff Kirsher 4689aebddd1SJeff Kirsher /* 4699aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4709aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4719aebddd1SJeff Kirsher */ 4729aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4739aebddd1SJeff Kirsher { 4749aebddd1SJeff Kirsher int status; 4759aebddd1SJeff Kirsher u32 val = 0; 4769aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4779aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4789aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4799aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4809aebddd1SJeff Kirsher 4819aebddd1SJeff Kirsher /* wait for ready to be set */ 4829aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4839aebddd1SJeff Kirsher if (status != 0) 4849aebddd1SJeff Kirsher return status; 4859aebddd1SJeff Kirsher 4869aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4879aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4889aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4899aebddd1SJeff Kirsher iowrite32(val, db); 4909aebddd1SJeff Kirsher 4919aebddd1SJeff Kirsher /* wait for ready to be set */ 4929aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4939aebddd1SJeff Kirsher if (status != 0) 4949aebddd1SJeff Kirsher return status; 4959aebddd1SJeff Kirsher 4969aebddd1SJeff Kirsher val = 0; 4979aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 4989aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 4999aebddd1SJeff Kirsher iowrite32(val, db); 5009aebddd1SJeff Kirsher 5019aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5029aebddd1SJeff Kirsher if (status != 0) 5039aebddd1SJeff Kirsher return status; 5049aebddd1SJeff Kirsher 5059aebddd1SJeff Kirsher /* A cq entry has been made now */ 5069aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5079aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5089aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5099aebddd1SJeff Kirsher if (status) 5109aebddd1SJeff Kirsher return status; 5119aebddd1SJeff Kirsher } else { 5129aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5139aebddd1SJeff Kirsher return -1; 5149aebddd1SJeff Kirsher } 5159aebddd1SJeff Kirsher return 0; 5169aebddd1SJeff Kirsher } 5179aebddd1SJeff Kirsher 518c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5199aebddd1SJeff Kirsher { 5209aebddd1SJeff Kirsher u32 sem; 5219aebddd1SJeff Kirsher 522c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 523c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5249aebddd1SJeff Kirsher else 525c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 526c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 527c5b3ad4cSSathya Perla 528c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5299aebddd1SJeff Kirsher } 5309aebddd1SJeff Kirsher 53187f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 532bf99e50dSPadmanabh Ratnakar { 533bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 534bf99e50dSPadmanabh Ratnakar u32 sliport_status; 535bf99e50dSPadmanabh Ratnakar int status = 0, i; 536bf99e50dSPadmanabh Ratnakar 537bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 538bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 539bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 540bf99e50dSPadmanabh Ratnakar break; 541bf99e50dSPadmanabh Ratnakar 542bf99e50dSPadmanabh Ratnakar msleep(1000); 543bf99e50dSPadmanabh Ratnakar } 544bf99e50dSPadmanabh Ratnakar 545bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 546bf99e50dSPadmanabh Ratnakar status = -1; 547bf99e50dSPadmanabh Ratnakar 548bf99e50dSPadmanabh Ratnakar return status; 549bf99e50dSPadmanabh Ratnakar } 550bf99e50dSPadmanabh Ratnakar 55167297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 55267297ad8SPadmanabh Ratnakar { 55367297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 55467297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 55567297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 55667297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 55767297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 55867297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 55967297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 56067297ad8SPadmanabh Ratnakar 56167297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 56267297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 56367297ad8SPadmanabh Ratnakar return true; 56467297ad8SPadmanabh Ratnakar } 56567297ad8SPadmanabh Ratnakar return false; 56667297ad8SPadmanabh Ratnakar } 56767297ad8SPadmanabh Ratnakar 568bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 569bf99e50dSPadmanabh Ratnakar { 570bf99e50dSPadmanabh Ratnakar int status; 571bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 57267297ad8SPadmanabh Ratnakar bool resource_error; 57367297ad8SPadmanabh Ratnakar 57467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 57567297ad8SPadmanabh Ratnakar if (resource_error) 57601e5b2c4SSomnath Kotur return -EAGAIN; 57767297ad8SPadmanabh Ratnakar 578bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 579bf99e50dSPadmanabh Ratnakar if (!status) { 580bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 581bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 582bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 583bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 584bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 585bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 586bf99e50dSPadmanabh Ratnakar 587bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 588bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 589bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 590bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 591bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 592bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 593bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 594bf99e50dSPadmanabh Ratnakar status = -1; 595bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 596bf99e50dSPadmanabh Ratnakar status = -1; 597bf99e50dSPadmanabh Ratnakar } 598bf99e50dSPadmanabh Ratnakar } 59967297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 60067297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 60167297ad8SPadmanabh Ratnakar * when PF provisions resources. 60267297ad8SPadmanabh Ratnakar */ 60367297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 60401e5b2c4SSomnath Kotur if (resource_error) 60501e5b2c4SSomnath Kotur status = -EAGAIN; 60667297ad8SPadmanabh Ratnakar 607bf99e50dSPadmanabh Ratnakar return status; 608bf99e50dSPadmanabh Ratnakar } 609bf99e50dSPadmanabh Ratnakar 610bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6119aebddd1SJeff Kirsher { 6129aebddd1SJeff Kirsher u16 stage; 6139aebddd1SJeff Kirsher int status, timeout = 0; 6149aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6159aebddd1SJeff Kirsher 616bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 617bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 618bf99e50dSPadmanabh Ratnakar return status; 619bf99e50dSPadmanabh Ratnakar } 620bf99e50dSPadmanabh Ratnakar 6219aebddd1SJeff Kirsher do { 622c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 62366d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 62466d29cbcSGavin Shan return 0; 62566d29cbcSGavin Shan 62666d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 62766d29cbcSGavin Shan timeout); 6289aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6299aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6309aebddd1SJeff Kirsher return -EINTR; 6319aebddd1SJeff Kirsher } 6329aebddd1SJeff Kirsher timeout += 2; 6333ab81b5fSSomnath Kotur } while (timeout < 60); 6349aebddd1SJeff Kirsher 6359aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6369aebddd1SJeff Kirsher return -1; 6379aebddd1SJeff Kirsher } 6389aebddd1SJeff Kirsher 6399aebddd1SJeff Kirsher 6409aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6419aebddd1SJeff Kirsher { 6429aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6439aebddd1SJeff Kirsher } 6449aebddd1SJeff Kirsher 645bea50988SSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, 646bea50988SSathya Perla unsigned long addr) 647bea50988SSathya Perla { 648bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 649bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 650bea50988SSathya Perla } 6519aebddd1SJeff Kirsher 6529aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 653106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 654106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 655106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 656106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6579aebddd1SJeff Kirsher { 658106df1e3SSomnath Kotur struct be_sge *sge; 659106df1e3SSomnath Kotur 6609aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6619aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6629aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6639aebddd1SJeff Kirsher req_hdr->version = 0; 664bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 665106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 666106df1e3SSomnath Kotur if (mem) { 667106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 668106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 669106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 670106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 671106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 672106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 673106df1e3SSomnath Kotur } else 674106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 675106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6769aebddd1SJeff Kirsher } 6779aebddd1SJeff Kirsher 6789aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6799aebddd1SJeff Kirsher struct be_dma_mem *mem) 6809aebddd1SJeff Kirsher { 6819aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6829aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6839aebddd1SJeff Kirsher 6849aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6859aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6869aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6879aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6889aebddd1SJeff Kirsher } 6899aebddd1SJeff Kirsher } 6909aebddd1SJeff Kirsher 6919aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 6929aebddd1SJeff Kirsher { 6939aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 6959aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 6969aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 6979aebddd1SJeff Kirsher return wrb; 6989aebddd1SJeff Kirsher } 6999aebddd1SJeff Kirsher 7009aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7019aebddd1SJeff Kirsher { 7029aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7039aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7049aebddd1SJeff Kirsher 705aa790db9SPadmanabh Ratnakar if (!mccq->created) 706aa790db9SPadmanabh Ratnakar return NULL; 707aa790db9SPadmanabh Ratnakar 7084d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7099aebddd1SJeff Kirsher return NULL; 7109aebddd1SJeff Kirsher 7119aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7129aebddd1SJeff Kirsher queue_head_inc(mccq); 7139aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7149aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7159aebddd1SJeff Kirsher return wrb; 7169aebddd1SJeff Kirsher } 7179aebddd1SJeff Kirsher 718bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 719bea50988SSathya Perla { 720bea50988SSathya Perla return adapter->mcc_obj.q.created; 721bea50988SSathya Perla } 722bea50988SSathya Perla 723bea50988SSathya Perla /* Must be used only in process context */ 724bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 725bea50988SSathya Perla { 726bea50988SSathya Perla if (use_mcc(adapter)) { 727bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 728bea50988SSathya Perla return 0; 729bea50988SSathya Perla } else { 730bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 731bea50988SSathya Perla } 732bea50988SSathya Perla } 733bea50988SSathya Perla 734bea50988SSathya Perla /* Must be used only in process context */ 735bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 736bea50988SSathya Perla { 737bea50988SSathya Perla if (use_mcc(adapter)) 738bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 739bea50988SSathya Perla else 740bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 741bea50988SSathya Perla } 742bea50988SSathya Perla 743bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 744bea50988SSathya Perla struct be_mcc_wrb *wrb) 745bea50988SSathya Perla { 746bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 747bea50988SSathya Perla 748bea50988SSathya Perla if (use_mcc(adapter)) { 749bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 750bea50988SSathya Perla if (!dest_wrb) 751bea50988SSathya Perla return NULL; 752bea50988SSathya Perla } else { 753bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 754bea50988SSathya Perla } 755bea50988SSathya Perla 756bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 757bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 758bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 759bea50988SSathya Perla 760bea50988SSathya Perla return dest_wrb; 761bea50988SSathya Perla } 762bea50988SSathya Perla 763bea50988SSathya Perla /* Must be used only in process context */ 764bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 765bea50988SSathya Perla struct be_mcc_wrb *wrb) 766bea50988SSathya Perla { 767bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 768bea50988SSathya Perla int status; 769bea50988SSathya Perla 770bea50988SSathya Perla status = be_cmd_lock(adapter); 771bea50988SSathya Perla if (status) 772bea50988SSathya Perla return status; 773bea50988SSathya Perla 774bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 775bea50988SSathya Perla if (!dest_wrb) 776bea50988SSathya Perla return -EBUSY; 777bea50988SSathya Perla 778bea50988SSathya Perla if (use_mcc(adapter)) 779bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 780bea50988SSathya Perla else 781bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 782bea50988SSathya Perla 783bea50988SSathya Perla if (!status) 784bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 785bea50988SSathya Perla 786bea50988SSathya Perla be_cmd_unlock(adapter); 787bea50988SSathya Perla return status; 788bea50988SSathya Perla } 789bea50988SSathya Perla 7909aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7919aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7929aebddd1SJeff Kirsher */ 7939aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 7949aebddd1SJeff Kirsher { 7959aebddd1SJeff Kirsher u8 *wrb; 7969aebddd1SJeff Kirsher int status; 7979aebddd1SJeff Kirsher 798bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 799bf99e50dSPadmanabh Ratnakar return 0; 800bf99e50dSPadmanabh Ratnakar 8019aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8029aebddd1SJeff Kirsher return -1; 8039aebddd1SJeff Kirsher 8049aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8059aebddd1SJeff Kirsher *wrb++ = 0xFF; 8069aebddd1SJeff Kirsher *wrb++ = 0x12; 8079aebddd1SJeff Kirsher *wrb++ = 0x34; 8089aebddd1SJeff Kirsher *wrb++ = 0xFF; 8099aebddd1SJeff Kirsher *wrb++ = 0xFF; 8109aebddd1SJeff Kirsher *wrb++ = 0x56; 8119aebddd1SJeff Kirsher *wrb++ = 0x78; 8129aebddd1SJeff Kirsher *wrb = 0xFF; 8139aebddd1SJeff Kirsher 8149aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8159aebddd1SJeff Kirsher 8169aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8179aebddd1SJeff Kirsher return status; 8189aebddd1SJeff Kirsher } 8199aebddd1SJeff Kirsher 8209aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8219aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8229aebddd1SJeff Kirsher */ 8239aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8249aebddd1SJeff Kirsher { 8259aebddd1SJeff Kirsher u8 *wrb; 8269aebddd1SJeff Kirsher int status; 8279aebddd1SJeff Kirsher 828bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 829bf99e50dSPadmanabh Ratnakar return 0; 830bf99e50dSPadmanabh Ratnakar 8319aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8329aebddd1SJeff Kirsher return -1; 8339aebddd1SJeff Kirsher 8349aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8359aebddd1SJeff Kirsher *wrb++ = 0xFF; 8369aebddd1SJeff Kirsher *wrb++ = 0xAA; 8379aebddd1SJeff Kirsher *wrb++ = 0xBB; 8389aebddd1SJeff Kirsher *wrb++ = 0xFF; 8399aebddd1SJeff Kirsher *wrb++ = 0xFF; 8409aebddd1SJeff Kirsher *wrb++ = 0xCC; 8419aebddd1SJeff Kirsher *wrb++ = 0xDD; 8429aebddd1SJeff Kirsher *wrb = 0xFF; 8439aebddd1SJeff Kirsher 8449aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8459aebddd1SJeff Kirsher 8469aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8479aebddd1SJeff Kirsher return status; 8489aebddd1SJeff Kirsher } 849bf99e50dSPadmanabh Ratnakar 850f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8519aebddd1SJeff Kirsher { 8529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8539aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 854f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 855f2f781a7SSathya Perla int status, ver = 0; 8569aebddd1SJeff Kirsher 8579aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8589aebddd1SJeff Kirsher return -1; 8599aebddd1SJeff Kirsher 8609aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8619aebddd1SJeff Kirsher req = embedded_payload(wrb); 8629aebddd1SJeff Kirsher 863106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 864106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 8659aebddd1SJeff Kirsher 866f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 867f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 868f2f781a7SSathya Perla ver = 2; 869f2f781a7SSathya Perla 870f2f781a7SSathya Perla req->hdr.version = ver; 8719aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8729aebddd1SJeff Kirsher 8739aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8749aebddd1SJeff Kirsher /* 4byte eqe*/ 8759aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 877f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 8789aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 8799aebddd1SJeff Kirsher 8809aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8819aebddd1SJeff Kirsher 8829aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8839aebddd1SJeff Kirsher if (!status) { 8849aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 885f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 886f2f781a7SSathya Perla eqo->msix_idx = 887f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 888f2f781a7SSathya Perla eqo->q.created = true; 8899aebddd1SJeff Kirsher } 8909aebddd1SJeff Kirsher 8919aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8929aebddd1SJeff Kirsher return status; 8939aebddd1SJeff Kirsher } 8949aebddd1SJeff Kirsher 895f9449ab7SSathya Perla /* Use MCC */ 8969aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 8975ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 8989aebddd1SJeff Kirsher { 8999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9009aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 9019aebddd1SJeff Kirsher int status; 9029aebddd1SJeff Kirsher 903f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 9049aebddd1SJeff Kirsher 905f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 906f9449ab7SSathya Perla if (!wrb) { 907f9449ab7SSathya Perla status = -EBUSY; 908f9449ab7SSathya Perla goto err; 909f9449ab7SSathya Perla } 9109aebddd1SJeff Kirsher req = embedded_payload(wrb); 9119aebddd1SJeff Kirsher 912106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 913106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 9145ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9159aebddd1SJeff Kirsher if (permanent) { 9169aebddd1SJeff Kirsher req->permanent = 1; 9179aebddd1SJeff Kirsher } else { 9189aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 919590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9209aebddd1SJeff Kirsher req->permanent = 0; 9219aebddd1SJeff Kirsher } 9229aebddd1SJeff Kirsher 923f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9249aebddd1SJeff Kirsher if (!status) { 9259aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9269aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9279aebddd1SJeff Kirsher } 9289aebddd1SJeff Kirsher 929f9449ab7SSathya Perla err: 930f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9319aebddd1SJeff Kirsher return status; 9329aebddd1SJeff Kirsher } 9339aebddd1SJeff Kirsher 9349aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9359aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9369aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9379aebddd1SJeff Kirsher { 9389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9399aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9409aebddd1SJeff Kirsher int status; 9419aebddd1SJeff Kirsher 9429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9439aebddd1SJeff Kirsher 9449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9459aebddd1SJeff Kirsher if (!wrb) { 9469aebddd1SJeff Kirsher status = -EBUSY; 9479aebddd1SJeff Kirsher goto err; 9489aebddd1SJeff Kirsher } 9499aebddd1SJeff Kirsher req = embedded_payload(wrb); 9509aebddd1SJeff Kirsher 951106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 952106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 9539aebddd1SJeff Kirsher 9549aebddd1SJeff Kirsher req->hdr.domain = domain; 9559aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9569aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9579aebddd1SJeff Kirsher 9589aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9599aebddd1SJeff Kirsher if (!status) { 9609aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 9619aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 9629aebddd1SJeff Kirsher } 9639aebddd1SJeff Kirsher 9649aebddd1SJeff Kirsher err: 9659aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 966e3a7ae2cSSomnath Kotur 967e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 968e3a7ae2cSSomnath Kotur status = -EPERM; 969e3a7ae2cSSomnath Kotur 9709aebddd1SJeff Kirsher return status; 9719aebddd1SJeff Kirsher } 9729aebddd1SJeff Kirsher 9739aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 97430128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9759aebddd1SJeff Kirsher { 9769aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9779aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 9789aebddd1SJeff Kirsher int status; 9799aebddd1SJeff Kirsher 98030128031SSathya Perla if (pmac_id == -1) 98130128031SSathya Perla return 0; 98230128031SSathya Perla 9839aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9849aebddd1SJeff Kirsher 9859aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9869aebddd1SJeff Kirsher if (!wrb) { 9879aebddd1SJeff Kirsher status = -EBUSY; 9889aebddd1SJeff Kirsher goto err; 9899aebddd1SJeff Kirsher } 9909aebddd1SJeff Kirsher req = embedded_payload(wrb); 9919aebddd1SJeff Kirsher 992106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 993106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 9949aebddd1SJeff Kirsher 9959aebddd1SJeff Kirsher req->hdr.domain = dom; 9969aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9979aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 9989aebddd1SJeff Kirsher 9999aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10009aebddd1SJeff Kirsher 10019aebddd1SJeff Kirsher err: 10029aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10039aebddd1SJeff Kirsher return status; 10049aebddd1SJeff Kirsher } 10059aebddd1SJeff Kirsher 10069aebddd1SJeff Kirsher /* Uses Mbox */ 100710ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 100810ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10099aebddd1SJeff Kirsher { 10109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10119aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10129aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10139aebddd1SJeff Kirsher void *ctxt; 10149aebddd1SJeff Kirsher int status; 10159aebddd1SJeff Kirsher 10169aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10179aebddd1SJeff Kirsher return -1; 10189aebddd1SJeff Kirsher 10199aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10209aebddd1SJeff Kirsher req = embedded_payload(wrb); 10219aebddd1SJeff Kirsher ctxt = &req->context; 10229aebddd1SJeff Kirsher 1023106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1024106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 10259aebddd1SJeff Kirsher 10269aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1027bbdc42f8SAjit Khaparde 1028bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10299aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10309aebddd1SJeff Kirsher coalesce_wm); 10319aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10329aebddd1SJeff Kirsher ctxt, no_delay); 10339aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10349aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 10359aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10369aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10379aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1038bbdc42f8SAjit Khaparde } else { 1039bbdc42f8SAjit Khaparde req->hdr.version = 2; 1040bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 104109e83a9dSAjit Khaparde 104209e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 104309e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 104409e83a9dSAjit Khaparde */ 104509e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 104609e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 104709e83a9dSAjit Khaparde ctxt, coalesce_wm); 1048bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1049bbdc42f8SAjit Khaparde no_delay); 1050bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1051bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 1052bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1053bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 1054bbdc42f8SAjit Khaparde ctxt, 1); 1055bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 1056bbdc42f8SAjit Khaparde ctxt, eq->id); 10579aebddd1SJeff Kirsher } 10589aebddd1SJeff Kirsher 10599aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10609aebddd1SJeff Kirsher 10619aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10629aebddd1SJeff Kirsher 10639aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10649aebddd1SJeff Kirsher if (!status) { 10659aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 10669aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 10679aebddd1SJeff Kirsher cq->created = true; 10689aebddd1SJeff Kirsher } 10699aebddd1SJeff Kirsher 10709aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10719aebddd1SJeff Kirsher 10729aebddd1SJeff Kirsher return status; 10739aebddd1SJeff Kirsher } 10749aebddd1SJeff Kirsher 10759aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10769aebddd1SJeff Kirsher { 10779aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 10789aebddd1SJeff Kirsher if (len_encoded == 16) 10799aebddd1SJeff Kirsher len_encoded = 0; 10809aebddd1SJeff Kirsher return len_encoded; 10819aebddd1SJeff Kirsher } 10829aebddd1SJeff Kirsher 10834188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 10849aebddd1SJeff Kirsher struct be_queue_info *mccq, 10859aebddd1SJeff Kirsher struct be_queue_info *cq) 10869aebddd1SJeff Kirsher { 10879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10889aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10899aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10909aebddd1SJeff Kirsher void *ctxt; 10919aebddd1SJeff Kirsher int status; 10929aebddd1SJeff Kirsher 10939aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10949aebddd1SJeff Kirsher return -1; 10959aebddd1SJeff Kirsher 10969aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10979aebddd1SJeff Kirsher req = embedded_payload(wrb); 10989aebddd1SJeff Kirsher ctxt = &req->context; 10999aebddd1SJeff Kirsher 1100106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1101106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 11029aebddd1SJeff Kirsher 11039aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1104666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 11059aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11069aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11079aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11089aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1109666d39c7SVasundhara Volam } else { 1110666d39c7SVasundhara Volam req->hdr.version = 1; 1111666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1112666d39c7SVasundhara Volam 1113666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1114666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1115666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1116666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1117666d39c7SVasundhara Volam ctxt, cq->id); 1118666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1119666d39c7SVasundhara Volam ctxt, 1); 11209aebddd1SJeff Kirsher } 11219aebddd1SJeff Kirsher 11229aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11239aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1124bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11259aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11269aebddd1SJeff Kirsher 11279aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11289aebddd1SJeff Kirsher 11299aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11309aebddd1SJeff Kirsher if (!status) { 11319aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11329aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11339aebddd1SJeff Kirsher mccq->created = true; 11349aebddd1SJeff Kirsher } 11359aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11369aebddd1SJeff Kirsher 11379aebddd1SJeff Kirsher return status; 11389aebddd1SJeff Kirsher } 11399aebddd1SJeff Kirsher 11404188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11419aebddd1SJeff Kirsher struct be_queue_info *mccq, 11429aebddd1SJeff Kirsher struct be_queue_info *cq) 11439aebddd1SJeff Kirsher { 11449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11459aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11469aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11479aebddd1SJeff Kirsher void *ctxt; 11489aebddd1SJeff Kirsher int status; 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11519aebddd1SJeff Kirsher return -1; 11529aebddd1SJeff Kirsher 11539aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11549aebddd1SJeff Kirsher req = embedded_payload(wrb); 11559aebddd1SJeff Kirsher ctxt = &req->context; 11569aebddd1SJeff Kirsher 1157106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1158106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 11599aebddd1SJeff Kirsher 11609aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 11619aebddd1SJeff Kirsher 11629aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11639aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11649aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11659aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11669aebddd1SJeff Kirsher 11679aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11689aebddd1SJeff Kirsher 11699aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11709aebddd1SJeff Kirsher 11719aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11729aebddd1SJeff Kirsher if (!status) { 11739aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11749aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11759aebddd1SJeff Kirsher mccq->created = true; 11769aebddd1SJeff Kirsher } 11779aebddd1SJeff Kirsher 11789aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11799aebddd1SJeff Kirsher return status; 11809aebddd1SJeff Kirsher } 11819aebddd1SJeff Kirsher 11829aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 11839aebddd1SJeff Kirsher struct be_queue_info *mccq, 11849aebddd1SJeff Kirsher struct be_queue_info *cq) 11859aebddd1SJeff Kirsher { 11869aebddd1SJeff Kirsher int status; 11879aebddd1SJeff Kirsher 11889aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1189666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 11909aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11919aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11929aebddd1SJeff Kirsher "and FCoE traffic"); 11939aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 11949aebddd1SJeff Kirsher } 11959aebddd1SJeff Kirsher return status; 11969aebddd1SJeff Kirsher } 11979aebddd1SJeff Kirsher 119894d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 11999aebddd1SJeff Kirsher { 12007707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 12019aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 120294d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 120394d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 12049aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 120594d73aaaSVasundhara Volam int status, ver = 0; 12069aebddd1SJeff Kirsher 12077707133cSSathya Perla req = embedded_payload(&wrb); 1208106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 12097707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12129aebddd1SJeff Kirsher req->hdr.version = 1; 121394d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 121494d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 121594d73aaaSVasundhara Volam req->hdr.version = 2; 121694d73aaaSVasundhara Volam } else { /* For SH */ 121794d73aaaSVasundhara Volam req->hdr.version = 2; 12189aebddd1SJeff Kirsher } 12199aebddd1SJeff Kirsher 122081b02655SVasundhara Volam if (req->hdr.version > 0) 122181b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12229aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12239aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12249aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 122594d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 122694d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12279aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 122894d73aaaSVasundhara Volam ver = req->hdr.version; 122994d73aaaSVasundhara Volam 12307707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12319aebddd1SJeff Kirsher if (!status) { 12327707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12339aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 123494d73aaaSVasundhara Volam if (ver == 2) 123594d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 123694d73aaaSVasundhara Volam else 123794d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12389aebddd1SJeff Kirsher txq->created = true; 12399aebddd1SJeff Kirsher } 12409aebddd1SJeff Kirsher 12419aebddd1SJeff Kirsher return status; 12429aebddd1SJeff Kirsher } 12439aebddd1SJeff Kirsher 12449aebddd1SJeff Kirsher /* Uses MCC */ 12459aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12469aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 124710ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12489aebddd1SJeff Kirsher { 12499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12509aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12519aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12529aebddd1SJeff Kirsher int status; 12539aebddd1SJeff Kirsher 12549aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12559aebddd1SJeff Kirsher 12569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12579aebddd1SJeff Kirsher if (!wrb) { 12589aebddd1SJeff Kirsher status = -EBUSY; 12599aebddd1SJeff Kirsher goto err; 12609aebddd1SJeff Kirsher } 12619aebddd1SJeff Kirsher req = embedded_payload(wrb); 12629aebddd1SJeff Kirsher 1263106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1264106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12659aebddd1SJeff Kirsher 12669aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12679aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12689aebddd1SJeff Kirsher req->num_pages = 2; 12699aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12709aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 127110ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12729aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12739aebddd1SJeff Kirsher 12749aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12759aebddd1SJeff Kirsher if (!status) { 12769aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12779aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12789aebddd1SJeff Kirsher rxq->created = true; 12799aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12809aebddd1SJeff Kirsher } 12819aebddd1SJeff Kirsher 12829aebddd1SJeff Kirsher err: 12839aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12849aebddd1SJeff Kirsher return status; 12859aebddd1SJeff Kirsher } 12869aebddd1SJeff Kirsher 12879aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12889aebddd1SJeff Kirsher * Uses Mbox 12899aebddd1SJeff Kirsher */ 12909aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12919aebddd1SJeff Kirsher int queue_type) 12929aebddd1SJeff Kirsher { 12939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12949aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12959aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 12969aebddd1SJeff Kirsher int status; 12979aebddd1SJeff Kirsher 12989aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12999aebddd1SJeff Kirsher return -1; 13009aebddd1SJeff Kirsher 13019aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13029aebddd1SJeff Kirsher req = embedded_payload(wrb); 13039aebddd1SJeff Kirsher 13049aebddd1SJeff Kirsher switch (queue_type) { 13059aebddd1SJeff Kirsher case QTYPE_EQ: 13069aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13079aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 13089aebddd1SJeff Kirsher break; 13099aebddd1SJeff Kirsher case QTYPE_CQ: 13109aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13119aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13129aebddd1SJeff Kirsher break; 13139aebddd1SJeff Kirsher case QTYPE_TXQ: 13149aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13159aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13169aebddd1SJeff Kirsher break; 13179aebddd1SJeff Kirsher case QTYPE_RXQ: 13189aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13199aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13209aebddd1SJeff Kirsher break; 13219aebddd1SJeff Kirsher case QTYPE_MCCQ: 13229aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13239aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13249aebddd1SJeff Kirsher break; 13259aebddd1SJeff Kirsher default: 13269aebddd1SJeff Kirsher BUG(); 13279aebddd1SJeff Kirsher } 13289aebddd1SJeff Kirsher 1329106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1330106df1e3SSomnath Kotur NULL); 13319aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13329aebddd1SJeff Kirsher 13339aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13349aebddd1SJeff Kirsher q->created = false; 13359aebddd1SJeff Kirsher 13369aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13379aebddd1SJeff Kirsher return status; 13389aebddd1SJeff Kirsher } 13399aebddd1SJeff Kirsher 13409aebddd1SJeff Kirsher /* Uses MCC */ 13419aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13429aebddd1SJeff Kirsher { 13439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13449aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13459aebddd1SJeff Kirsher int status; 13469aebddd1SJeff Kirsher 13479aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13489aebddd1SJeff Kirsher 13499aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13509aebddd1SJeff Kirsher if (!wrb) { 13519aebddd1SJeff Kirsher status = -EBUSY; 13529aebddd1SJeff Kirsher goto err; 13539aebddd1SJeff Kirsher } 13549aebddd1SJeff Kirsher req = embedded_payload(wrb); 13559aebddd1SJeff Kirsher 1356106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1357106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13589aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13599aebddd1SJeff Kirsher 13609aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13619aebddd1SJeff Kirsher q->created = false; 13629aebddd1SJeff Kirsher 13639aebddd1SJeff Kirsher err: 13649aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13659aebddd1SJeff Kirsher return status; 13669aebddd1SJeff Kirsher } 13679aebddd1SJeff Kirsher 13689aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1369bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 13709aebddd1SJeff Kirsher */ 13719aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13721578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13739aebddd1SJeff Kirsher { 1374bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 13759aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13769aebddd1SJeff Kirsher int status; 13779aebddd1SJeff Kirsher 1378bea50988SSathya Perla req = embedded_payload(&wrb); 1379106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1380bea50988SSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL); 13819aebddd1SJeff Kirsher req->hdr.domain = domain; 13829aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13839aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1384f9449ab7SSathya Perla req->pmac_invalid = true; 13859aebddd1SJeff Kirsher 1386bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13879aebddd1SJeff Kirsher if (!status) { 1388bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 13899aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1390b5bb9776SSathya Perla 1391b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1392b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1393b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 13949aebddd1SJeff Kirsher } 13959aebddd1SJeff Kirsher return status; 13969aebddd1SJeff Kirsher } 13979aebddd1SJeff Kirsher 1398f9449ab7SSathya Perla /* Uses MCCQ */ 139930128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 14009aebddd1SJeff Kirsher { 14019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14029aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 14039aebddd1SJeff Kirsher int status; 14049aebddd1SJeff Kirsher 140530128031SSathya Perla if (interface_id == -1) 1406f9449ab7SSathya Perla return 0; 14079aebddd1SJeff Kirsher 1408f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1409f9449ab7SSathya Perla 1410f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1411f9449ab7SSathya Perla if (!wrb) { 1412f9449ab7SSathya Perla status = -EBUSY; 1413f9449ab7SSathya Perla goto err; 1414f9449ab7SSathya Perla } 14159aebddd1SJeff Kirsher req = embedded_payload(wrb); 14169aebddd1SJeff Kirsher 1417106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1418106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 14199aebddd1SJeff Kirsher req->hdr.domain = domain; 14209aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14219aebddd1SJeff Kirsher 1422f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1423f9449ab7SSathya Perla err: 1424f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14259aebddd1SJeff Kirsher return status; 14269aebddd1SJeff Kirsher } 14279aebddd1SJeff Kirsher 14289aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14299aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14309aebddd1SJeff Kirsher * Uses asynchronous MCC 14319aebddd1SJeff Kirsher */ 14329aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14339aebddd1SJeff Kirsher { 14349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14359aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14369aebddd1SJeff Kirsher int status = 0; 14379aebddd1SJeff Kirsher 14389aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14399aebddd1SJeff Kirsher 14409aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14419aebddd1SJeff Kirsher if (!wrb) { 14429aebddd1SJeff Kirsher status = -EBUSY; 14439aebddd1SJeff Kirsher goto err; 14449aebddd1SJeff Kirsher } 14459aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14469aebddd1SJeff Kirsher 1447106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1448106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 14499aebddd1SJeff Kirsher 1450ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 145161000861SAjit Khaparde if (BE2_chip(adapter)) 145261000861SAjit Khaparde hdr->version = 0; 145361000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 14549aebddd1SJeff Kirsher hdr->version = 1; 145561000861SAjit Khaparde else 145661000861SAjit Khaparde hdr->version = 2; 14579aebddd1SJeff Kirsher 14589aebddd1SJeff Kirsher be_mcc_notify(adapter); 14599aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14609aebddd1SJeff Kirsher 14619aebddd1SJeff Kirsher err: 14629aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14639aebddd1SJeff Kirsher return status; 14649aebddd1SJeff Kirsher } 14659aebddd1SJeff Kirsher 14669aebddd1SJeff Kirsher /* Lancer Stats */ 14679aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14689aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14699aebddd1SJeff Kirsher { 14709aebddd1SJeff Kirsher 14719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14729aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14739aebddd1SJeff Kirsher int status = 0; 14749aebddd1SJeff Kirsher 1475f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1476f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1477f25b119cSPadmanabh Ratnakar return -EPERM; 1478f25b119cSPadmanabh Ratnakar 14799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14809aebddd1SJeff Kirsher 14819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14829aebddd1SJeff Kirsher if (!wrb) { 14839aebddd1SJeff Kirsher status = -EBUSY; 14849aebddd1SJeff Kirsher goto err; 14859aebddd1SJeff Kirsher } 14869aebddd1SJeff Kirsher req = nonemb_cmd->va; 14879aebddd1SJeff Kirsher 1488106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1489106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1490106df1e3SSomnath Kotur nonemb_cmd); 14919aebddd1SJeff Kirsher 1492d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 14939aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 14949aebddd1SJeff Kirsher 14959aebddd1SJeff Kirsher be_mcc_notify(adapter); 14969aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14979aebddd1SJeff Kirsher 14989aebddd1SJeff Kirsher err: 14999aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15009aebddd1SJeff Kirsher return status; 15019aebddd1SJeff Kirsher } 15029aebddd1SJeff Kirsher 1503323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1504323ff71eSSathya Perla { 1505323ff71eSSathya Perla switch (mac_speed) { 1506323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1507323ff71eSSathya Perla return 0; 1508323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1509323ff71eSSathya Perla return 10; 1510323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1511323ff71eSSathya Perla return 100; 1512323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1513323ff71eSSathya Perla return 1000; 1514323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1515323ff71eSSathya Perla return 10000; 1516b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1517b971f847SVasundhara Volam return 20000; 1518b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1519b971f847SVasundhara Volam return 25000; 1520b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1521b971f847SVasundhara Volam return 40000; 1522323ff71eSSathya Perla } 1523323ff71eSSathya Perla return 0; 1524323ff71eSSathya Perla } 1525323ff71eSSathya Perla 1526323ff71eSSathya Perla /* Uses synchronous mcc 1527323ff71eSSathya Perla * Returns link_speed in Mbps 1528323ff71eSSathya Perla */ 1529323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1530323ff71eSSathya Perla u8 *link_status, u32 dom) 15319aebddd1SJeff Kirsher { 15329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15339aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15349aebddd1SJeff Kirsher int status; 15359aebddd1SJeff Kirsher 15369aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15379aebddd1SJeff Kirsher 1538b236916aSAjit Khaparde if (link_status) 1539b236916aSAjit Khaparde *link_status = LINK_DOWN; 1540b236916aSAjit Khaparde 15419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15429aebddd1SJeff Kirsher if (!wrb) { 15439aebddd1SJeff Kirsher status = -EBUSY; 15449aebddd1SJeff Kirsher goto err; 15459aebddd1SJeff Kirsher } 15469aebddd1SJeff Kirsher req = embedded_payload(wrb); 15479aebddd1SJeff Kirsher 154857cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 154957cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 155057cd80d4SPadmanabh Ratnakar 1551ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1552ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1553daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1554daad6167SPadmanabh Ratnakar 155557cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15569aebddd1SJeff Kirsher 15579aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15589aebddd1SJeff Kirsher if (!status) { 15599aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1560323ff71eSSathya Perla if (link_speed) { 1561323ff71eSSathya Perla *link_speed = resp->link_speed ? 1562323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1563323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1564323ff71eSSathya Perla 1565323ff71eSSathya Perla if (!resp->logical_link_status) 1566323ff71eSSathya Perla *link_speed = 0; 15679aebddd1SJeff Kirsher } 1568b236916aSAjit Khaparde if (link_status) 1569b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15709aebddd1SJeff Kirsher } 15719aebddd1SJeff Kirsher 15729aebddd1SJeff Kirsher err: 15739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15749aebddd1SJeff Kirsher return status; 15759aebddd1SJeff Kirsher } 15769aebddd1SJeff Kirsher 15779aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15789aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15799aebddd1SJeff Kirsher { 15809aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15819aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1582117affe3SVasundhara Volam int status = 0; 15839aebddd1SJeff Kirsher 15849aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15859aebddd1SJeff Kirsher 15869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15879aebddd1SJeff Kirsher if (!wrb) { 15889aebddd1SJeff Kirsher status = -EBUSY; 15899aebddd1SJeff Kirsher goto err; 15909aebddd1SJeff Kirsher } 15919aebddd1SJeff Kirsher req = embedded_payload(wrb); 15929aebddd1SJeff Kirsher 1593106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1594106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1595106df1e3SSomnath Kotur wrb, NULL); 15969aebddd1SJeff Kirsher 15973de09455SSomnath Kotur be_mcc_notify(adapter); 15989aebddd1SJeff Kirsher 15999aebddd1SJeff Kirsher err: 16009aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16019aebddd1SJeff Kirsher return status; 16029aebddd1SJeff Kirsher } 16039aebddd1SJeff Kirsher 16049aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16059aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 16069aebddd1SJeff Kirsher { 16079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16089aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16099aebddd1SJeff Kirsher int status; 16109aebddd1SJeff Kirsher 16119aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16129aebddd1SJeff Kirsher 16139aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16149aebddd1SJeff Kirsher if (!wrb) { 16159aebddd1SJeff Kirsher status = -EBUSY; 16169aebddd1SJeff Kirsher goto err; 16179aebddd1SJeff Kirsher } 16189aebddd1SJeff Kirsher req = embedded_payload(wrb); 16199aebddd1SJeff Kirsher 1620106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1621106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 16229aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16239aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16249aebddd1SJeff Kirsher if (!status) { 16259aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16269aebddd1SJeff Kirsher if (log_size && resp->log_size) 16279aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16289aebddd1SJeff Kirsher sizeof(u32); 16299aebddd1SJeff Kirsher } 16309aebddd1SJeff Kirsher err: 16319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16329aebddd1SJeff Kirsher return status; 16339aebddd1SJeff Kirsher } 16349aebddd1SJeff Kirsher 16359aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16369aebddd1SJeff Kirsher { 16379aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16399aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16409aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16419aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 16429aebddd1SJeff Kirsher int status; 16439aebddd1SJeff Kirsher 16449aebddd1SJeff Kirsher if (buf_len == 0) 16459aebddd1SJeff Kirsher return; 16469aebddd1SJeff Kirsher 16479aebddd1SJeff Kirsher total_size = buf_len; 16489aebddd1SJeff Kirsher 16499aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16509aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16519aebddd1SJeff Kirsher get_fat_cmd.size, 16529aebddd1SJeff Kirsher &get_fat_cmd.dma); 16539aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 16549aebddd1SJeff Kirsher status = -ENOMEM; 16559aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16569aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16579aebddd1SJeff Kirsher return; 16589aebddd1SJeff Kirsher } 16599aebddd1SJeff Kirsher 16609aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16619aebddd1SJeff Kirsher 16629aebddd1SJeff Kirsher while (total_size) { 16639aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16649aebddd1SJeff Kirsher total_size -= buf_size; 16659aebddd1SJeff Kirsher 16669aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16679aebddd1SJeff Kirsher if (!wrb) { 16689aebddd1SJeff Kirsher status = -EBUSY; 16699aebddd1SJeff Kirsher goto err; 16709aebddd1SJeff Kirsher } 16719aebddd1SJeff Kirsher req = get_fat_cmd.va; 16729aebddd1SJeff Kirsher 16739aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1674106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1675106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1676106df1e3SSomnath Kotur &get_fat_cmd); 16779aebddd1SJeff Kirsher 16789aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16799aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16809aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16819aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16829aebddd1SJeff Kirsher 16839aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16849aebddd1SJeff Kirsher if (!status) { 16859aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16869aebddd1SJeff Kirsher memcpy(buf + offset, 16879aebddd1SJeff Kirsher resp->data_buffer, 168892aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16899aebddd1SJeff Kirsher } else { 16909aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16919aebddd1SJeff Kirsher goto err; 16929aebddd1SJeff Kirsher } 16939aebddd1SJeff Kirsher offset += buf_size; 16949aebddd1SJeff Kirsher log_offset += buf_size; 16959aebddd1SJeff Kirsher } 16969aebddd1SJeff Kirsher err: 16979aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 16989aebddd1SJeff Kirsher get_fat_cmd.va, 16999aebddd1SJeff Kirsher get_fat_cmd.dma); 17009aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17019aebddd1SJeff Kirsher } 17029aebddd1SJeff Kirsher 170304b71175SSathya Perla /* Uses synchronous mcc */ 170404b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 170504b71175SSathya Perla char *fw_on_flash) 17069aebddd1SJeff Kirsher { 17079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17089aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 17099aebddd1SJeff Kirsher int status; 17109aebddd1SJeff Kirsher 171104b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17129aebddd1SJeff Kirsher 171304b71175SSathya Perla wrb = wrb_from_mccq(adapter); 171404b71175SSathya Perla if (!wrb) { 171504b71175SSathya Perla status = -EBUSY; 171604b71175SSathya Perla goto err; 171704b71175SSathya Perla } 171804b71175SSathya Perla 17199aebddd1SJeff Kirsher req = embedded_payload(wrb); 17209aebddd1SJeff Kirsher 1721106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1722106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 172304b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17249aebddd1SJeff Kirsher if (!status) { 17259aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 172604b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 172704b71175SSathya Perla if (fw_on_flash) 172804b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 17299aebddd1SJeff Kirsher } 173004b71175SSathya Perla err: 173104b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17329aebddd1SJeff Kirsher return status; 17339aebddd1SJeff Kirsher } 17349aebddd1SJeff Kirsher 17359aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17369aebddd1SJeff Kirsher * Uses async mcc 17379aebddd1SJeff Kirsher */ 17382632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 17392632bafdSSathya Perla int num) 17409aebddd1SJeff Kirsher { 17419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17429aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17432632bafdSSathya Perla int status = 0, i; 17449aebddd1SJeff Kirsher 17459aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17469aebddd1SJeff Kirsher 17479aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17489aebddd1SJeff Kirsher if (!wrb) { 17499aebddd1SJeff Kirsher status = -EBUSY; 17509aebddd1SJeff Kirsher goto err; 17519aebddd1SJeff Kirsher } 17529aebddd1SJeff Kirsher req = embedded_payload(wrb); 17539aebddd1SJeff Kirsher 1754106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1755106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 17569aebddd1SJeff Kirsher 17572632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 17582632bafdSSathya Perla for (i = 0; i < num; i++) { 17592632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 17602632bafdSSathya Perla req->set_eqd[i].phase = 0; 17612632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 17622632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 17632632bafdSSathya Perla } 17649aebddd1SJeff Kirsher 17659aebddd1SJeff Kirsher be_mcc_notify(adapter); 17669aebddd1SJeff Kirsher err: 17679aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17689aebddd1SJeff Kirsher return status; 17699aebddd1SJeff Kirsher } 17709aebddd1SJeff Kirsher 17719aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17729aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1773012bd387SAjit Khaparde u32 num, bool promiscuous) 17749aebddd1SJeff Kirsher { 17759aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17769aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17779aebddd1SJeff Kirsher int status; 17789aebddd1SJeff Kirsher 17799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17809aebddd1SJeff Kirsher 17819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17829aebddd1SJeff Kirsher if (!wrb) { 17839aebddd1SJeff Kirsher status = -EBUSY; 17849aebddd1SJeff Kirsher goto err; 17859aebddd1SJeff Kirsher } 17869aebddd1SJeff Kirsher req = embedded_payload(wrb); 17879aebddd1SJeff Kirsher 1788106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1789106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17909aebddd1SJeff Kirsher 17919aebddd1SJeff Kirsher req->interface_id = if_id; 17929aebddd1SJeff Kirsher req->promiscuous = promiscuous; 1793012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 17949aebddd1SJeff Kirsher req->num_vlan = num; 17959aebddd1SJeff Kirsher if (!promiscuous) { 17969aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 17979aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 17989aebddd1SJeff Kirsher } 17999aebddd1SJeff Kirsher 18009aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18019aebddd1SJeff Kirsher 18029aebddd1SJeff Kirsher err: 18039aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18049aebddd1SJeff Kirsher return status; 18059aebddd1SJeff Kirsher } 18069aebddd1SJeff Kirsher 18079aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 18089aebddd1SJeff Kirsher { 18099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18109aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 18119aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18129aebddd1SJeff Kirsher int status; 18139aebddd1SJeff Kirsher 18149aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18159aebddd1SJeff Kirsher 18169aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18179aebddd1SJeff Kirsher if (!wrb) { 18189aebddd1SJeff Kirsher status = -EBUSY; 18199aebddd1SJeff Kirsher goto err; 18209aebddd1SJeff Kirsher } 18219aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1822106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1823106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1824106df1e3SSomnath Kotur wrb, mem); 18259aebddd1SJeff Kirsher 18269aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18279aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18289aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1829c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1830c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18319aebddd1SJeff Kirsher if (value == ON) 18329aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1833c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1834c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18359aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 18369aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 18379aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1838d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1839d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1840d9d604f8SAjit Khaparde 1841d9d604f8SAjit Khaparde if (value == ON) 1842d9d604f8SAjit Khaparde req->if_flags = 1843d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 18449aebddd1SJeff Kirsher } else { 18459aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 18469aebddd1SJeff Kirsher int i = 0; 18479aebddd1SJeff Kirsher 18488e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 18498e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 18501610c79fSPadmanabh Ratnakar 18511610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 18521610c79fSPadmanabh Ratnakar * and not setting flags field 18531610c79fSPadmanabh Ratnakar */ 18541610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1855abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 185692bf14abSSathya Perla be_if_cap_flags(adapter)); 1857016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 18589aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 18599aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 18609aebddd1SJeff Kirsher } 18619aebddd1SJeff Kirsher 1862012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1863012bd387SAjit Khaparde req->if_flags_mask) { 1864012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1865012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1866012bd387SAjit Khaparde req->if_flags_mask); 1867012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1868012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1869012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1870012bd387SAjit Khaparde } 1871012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1872012bd387SAjit Khaparde 18739aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1874012bd387SAjit Khaparde 18759aebddd1SJeff Kirsher err: 18769aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18779aebddd1SJeff Kirsher return status; 18789aebddd1SJeff Kirsher } 18799aebddd1SJeff Kirsher 18809aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 18819aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 18829aebddd1SJeff Kirsher { 18839aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18849aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 18859aebddd1SJeff Kirsher int status; 18869aebddd1SJeff Kirsher 1887f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1888f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1889f25b119cSPadmanabh Ratnakar return -EPERM; 1890f25b119cSPadmanabh Ratnakar 18919aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18929aebddd1SJeff Kirsher 18939aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18949aebddd1SJeff Kirsher if (!wrb) { 18959aebddd1SJeff Kirsher status = -EBUSY; 18969aebddd1SJeff Kirsher goto err; 18979aebddd1SJeff Kirsher } 18989aebddd1SJeff Kirsher req = embedded_payload(wrb); 18999aebddd1SJeff Kirsher 1900106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1901106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 19029aebddd1SJeff Kirsher 19039aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 19049aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 19059aebddd1SJeff Kirsher 19069aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19079aebddd1SJeff Kirsher 19089aebddd1SJeff Kirsher err: 19099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19109aebddd1SJeff Kirsher return status; 19119aebddd1SJeff Kirsher } 19129aebddd1SJeff Kirsher 19139aebddd1SJeff Kirsher /* Uses sycn mcc */ 19149aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19159aebddd1SJeff Kirsher { 19169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19179aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 19189aebddd1SJeff Kirsher int status; 19199aebddd1SJeff Kirsher 1920f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1921f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1922f25b119cSPadmanabh Ratnakar return -EPERM; 1923f25b119cSPadmanabh Ratnakar 19249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19259aebddd1SJeff Kirsher 19269aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19279aebddd1SJeff Kirsher if (!wrb) { 19289aebddd1SJeff Kirsher status = -EBUSY; 19299aebddd1SJeff Kirsher goto err; 19309aebddd1SJeff Kirsher } 19319aebddd1SJeff Kirsher req = embedded_payload(wrb); 19329aebddd1SJeff Kirsher 1933106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1934106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 19359aebddd1SJeff Kirsher 19369aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19379aebddd1SJeff Kirsher if (!status) { 19389aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 19399aebddd1SJeff Kirsher embedded_payload(wrb); 19409aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 19419aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 19429aebddd1SJeff Kirsher } 19439aebddd1SJeff Kirsher 19449aebddd1SJeff Kirsher err: 19459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19469aebddd1SJeff Kirsher return status; 19479aebddd1SJeff Kirsher } 19489aebddd1SJeff Kirsher 19499aebddd1SJeff Kirsher /* Uses mbox */ 19509aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19510ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 19529aebddd1SJeff Kirsher { 19539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19549aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 19559aebddd1SJeff Kirsher int status; 19569aebddd1SJeff Kirsher 19579aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19589aebddd1SJeff Kirsher return -1; 19599aebddd1SJeff Kirsher 19609aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19619aebddd1SJeff Kirsher req = embedded_payload(wrb); 19629aebddd1SJeff Kirsher 1963106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1964106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 19659aebddd1SJeff Kirsher 19669aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19679aebddd1SJeff Kirsher if (!status) { 19689aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 19699aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 19709aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 19719aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 19720ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 19739aebddd1SJeff Kirsher } 19749aebddd1SJeff Kirsher 19759aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19769aebddd1SJeff Kirsher return status; 19779aebddd1SJeff Kirsher } 19789aebddd1SJeff Kirsher 19799aebddd1SJeff Kirsher /* Uses mbox */ 19809aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 19819aebddd1SJeff Kirsher { 19829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19839aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 19849aebddd1SJeff Kirsher int status; 19859aebddd1SJeff Kirsher 1986bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1987bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1988bf99e50dSPadmanabh Ratnakar if (!status) { 1989bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1990bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1991bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1992bf99e50dSPadmanabh Ratnakar } 1993bf99e50dSPadmanabh Ratnakar if (status) { 1994bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 1995bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 1996bf99e50dSPadmanabh Ratnakar } 1997bf99e50dSPadmanabh Ratnakar return status; 1998bf99e50dSPadmanabh Ratnakar } 1999bf99e50dSPadmanabh Ratnakar 20009aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20019aebddd1SJeff Kirsher return -1; 20029aebddd1SJeff Kirsher 20039aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20049aebddd1SJeff Kirsher req = embedded_payload(wrb); 20059aebddd1SJeff Kirsher 2006106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2007106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 20089aebddd1SJeff Kirsher 20099aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20109aebddd1SJeff Kirsher 20119aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20129aebddd1SJeff Kirsher return status; 20139aebddd1SJeff Kirsher } 20149aebddd1SJeff Kirsher 2015594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2016594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 20179aebddd1SJeff Kirsher { 20189aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20199aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 202065f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 202165f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 202265f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 20239aebddd1SJeff Kirsher int status; 20249aebddd1SJeff Kirsher 2025da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2026da1388d6SVasundhara Volam return 0; 2027da1388d6SVasundhara Volam 20289aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20299aebddd1SJeff Kirsher return -1; 20309aebddd1SJeff Kirsher 20319aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20329aebddd1SJeff Kirsher req = embedded_payload(wrb); 20339aebddd1SJeff Kirsher 2034106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2035106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 20369aebddd1SJeff Kirsher 20379aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2038594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 20399aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2040594ad54aSSuresh Reddy 2041594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 2042594ad54aSSuresh Reddy req->hdr.version = 1; 2043594ad54aSSuresh Reddy 20449aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 20459aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 20469aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 20479aebddd1SJeff Kirsher 20489aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20499aebddd1SJeff Kirsher 20509aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20519aebddd1SJeff Kirsher return status; 20529aebddd1SJeff Kirsher } 20539aebddd1SJeff Kirsher 20549aebddd1SJeff Kirsher /* Uses sync mcc */ 20559aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 20569aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 20579aebddd1SJeff Kirsher { 20589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20599aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 20609aebddd1SJeff Kirsher int status; 20619aebddd1SJeff Kirsher 20629aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20639aebddd1SJeff Kirsher 20649aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20659aebddd1SJeff Kirsher if (!wrb) { 20669aebddd1SJeff Kirsher status = -EBUSY; 20679aebddd1SJeff Kirsher goto err; 20689aebddd1SJeff Kirsher } 20699aebddd1SJeff Kirsher req = embedded_payload(wrb); 20709aebddd1SJeff Kirsher 2071106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2072106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 20739aebddd1SJeff Kirsher 20749aebddd1SJeff Kirsher req->port_num = port_num; 20759aebddd1SJeff Kirsher req->beacon_state = state; 20769aebddd1SJeff Kirsher req->beacon_duration = bcn; 20779aebddd1SJeff Kirsher req->status_duration = sts; 20789aebddd1SJeff Kirsher 20799aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20809aebddd1SJeff Kirsher 20819aebddd1SJeff Kirsher err: 20829aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20839aebddd1SJeff Kirsher return status; 20849aebddd1SJeff Kirsher } 20859aebddd1SJeff Kirsher 20869aebddd1SJeff Kirsher /* Uses sync mcc */ 20879aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 20889aebddd1SJeff Kirsher { 20899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20909aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20919aebddd1SJeff Kirsher int status; 20929aebddd1SJeff Kirsher 20939aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20949aebddd1SJeff Kirsher 20959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20969aebddd1SJeff Kirsher if (!wrb) { 20979aebddd1SJeff Kirsher status = -EBUSY; 20989aebddd1SJeff Kirsher goto err; 20999aebddd1SJeff Kirsher } 21009aebddd1SJeff Kirsher req = embedded_payload(wrb); 21019aebddd1SJeff Kirsher 2102106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2103106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 21049aebddd1SJeff Kirsher 21059aebddd1SJeff Kirsher req->port_num = port_num; 21069aebddd1SJeff Kirsher 21079aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21089aebddd1SJeff Kirsher if (!status) { 21099aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 21109aebddd1SJeff Kirsher embedded_payload(wrb); 21119aebddd1SJeff Kirsher *state = resp->beacon_state; 21129aebddd1SJeff Kirsher } 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher err: 21159aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21169aebddd1SJeff Kirsher return status; 21179aebddd1SJeff Kirsher } 21189aebddd1SJeff Kirsher 21199aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2120f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2121f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2122f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 21239aebddd1SJeff Kirsher { 21249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21259aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 21269aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 21279aebddd1SJeff Kirsher void *ctxt = NULL; 21289aebddd1SJeff Kirsher int status; 21299aebddd1SJeff Kirsher 21309aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21319aebddd1SJeff Kirsher adapter->flash_status = 0; 21329aebddd1SJeff Kirsher 21339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21349aebddd1SJeff Kirsher if (!wrb) { 21359aebddd1SJeff Kirsher status = -EBUSY; 21369aebddd1SJeff Kirsher goto err_unlock; 21379aebddd1SJeff Kirsher } 21389aebddd1SJeff Kirsher 21399aebddd1SJeff Kirsher req = embedded_payload(wrb); 21409aebddd1SJeff Kirsher 2141106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 21429aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2143106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2144106df1e3SSomnath Kotur NULL); 21459aebddd1SJeff Kirsher 21469aebddd1SJeff Kirsher ctxt = &req->context; 21479aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21489aebddd1SJeff Kirsher write_length, ctxt, data_size); 21499aebddd1SJeff Kirsher 21509aebddd1SJeff Kirsher if (data_size == 0) 21519aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21529aebddd1SJeff Kirsher eof, ctxt, 1); 21539aebddd1SJeff Kirsher else 21549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21559aebddd1SJeff Kirsher eof, ctxt, 0); 21569aebddd1SJeff Kirsher 21579aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 21589aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 21599aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 21609aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 21619aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 21629aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 21639aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 21649aebddd1SJeff Kirsher & 0xFFFFFFFF); 21659aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 21669aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 21679aebddd1SJeff Kirsher 21689aebddd1SJeff Kirsher be_mcc_notify(adapter); 21699aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21709aebddd1SJeff Kirsher 21715eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2172701962d0SSomnath Kotur msecs_to_jiffies(60000))) 21739aebddd1SJeff Kirsher status = -1; 21749aebddd1SJeff Kirsher else 21759aebddd1SJeff Kirsher status = adapter->flash_status; 21769aebddd1SJeff Kirsher 21779aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2178f67ef7baSPadmanabh Ratnakar if (!status) { 21799aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2180f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2181f67ef7baSPadmanabh Ratnakar } else { 21829aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2183f67ef7baSPadmanabh Ratnakar } 21849aebddd1SJeff Kirsher 21859aebddd1SJeff Kirsher return status; 21869aebddd1SJeff Kirsher 21879aebddd1SJeff Kirsher err_unlock: 21889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21899aebddd1SJeff Kirsher return status; 21909aebddd1SJeff Kirsher } 21919aebddd1SJeff Kirsher 2192de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2193de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2194de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2195de49bd5aSPadmanabh Ratnakar { 2196de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2197de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2198de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2199de49bd5aSPadmanabh Ratnakar int status; 2200de49bd5aSPadmanabh Ratnakar 2201de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2202de49bd5aSPadmanabh Ratnakar 2203de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2204de49bd5aSPadmanabh Ratnakar if (!wrb) { 2205de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2206de49bd5aSPadmanabh Ratnakar goto err_unlock; 2207de49bd5aSPadmanabh Ratnakar } 2208de49bd5aSPadmanabh Ratnakar 2209de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2210de49bd5aSPadmanabh Ratnakar 2211de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2212de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2213de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2214de49bd5aSPadmanabh Ratnakar NULL); 2215de49bd5aSPadmanabh Ratnakar 2216de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2217de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2218de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2219de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2220de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2221de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2222de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2223de49bd5aSPadmanabh Ratnakar 2224de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2225de49bd5aSPadmanabh Ratnakar 2226de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2227de49bd5aSPadmanabh Ratnakar if (!status) { 2228de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2229de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2230de49bd5aSPadmanabh Ratnakar } else { 2231de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2232de49bd5aSPadmanabh Ratnakar } 2233de49bd5aSPadmanabh Ratnakar 2234de49bd5aSPadmanabh Ratnakar err_unlock: 2235de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2236de49bd5aSPadmanabh Ratnakar return status; 2237de49bd5aSPadmanabh Ratnakar } 2238de49bd5aSPadmanabh Ratnakar 22399aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 22409aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 22419aebddd1SJeff Kirsher { 22429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22439aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 22449aebddd1SJeff Kirsher int status; 22459aebddd1SJeff Kirsher 22469aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22479aebddd1SJeff Kirsher adapter->flash_status = 0; 22489aebddd1SJeff Kirsher 22499aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22509aebddd1SJeff Kirsher if (!wrb) { 22519aebddd1SJeff Kirsher status = -EBUSY; 22529aebddd1SJeff Kirsher goto err_unlock; 22539aebddd1SJeff Kirsher } 22549aebddd1SJeff Kirsher req = cmd->va; 22559aebddd1SJeff Kirsher 2256106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2257106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 22589aebddd1SJeff Kirsher 22599aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 22609aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 22619aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 22629aebddd1SJeff Kirsher 22639aebddd1SJeff Kirsher be_mcc_notify(adapter); 22649aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22659aebddd1SJeff Kirsher 22665eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2267e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 22689aebddd1SJeff Kirsher status = -1; 22699aebddd1SJeff Kirsher else 22709aebddd1SJeff Kirsher status = adapter->flash_status; 22719aebddd1SJeff Kirsher 22729aebddd1SJeff Kirsher return status; 22739aebddd1SJeff Kirsher 22749aebddd1SJeff Kirsher err_unlock: 22759aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22769aebddd1SJeff Kirsher return status; 22779aebddd1SJeff Kirsher } 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 22809aebddd1SJeff Kirsher int offset) 22819aebddd1SJeff Kirsher { 22829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2283be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 22849aebddd1SJeff Kirsher int status; 22859aebddd1SJeff Kirsher 22869aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22879aebddd1SJeff Kirsher 22889aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22899aebddd1SJeff Kirsher if (!wrb) { 22909aebddd1SJeff Kirsher status = -EBUSY; 22919aebddd1SJeff Kirsher goto err; 22929aebddd1SJeff Kirsher } 22939aebddd1SJeff Kirsher req = embedded_payload(wrb); 22949aebddd1SJeff Kirsher 2295106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2296be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2297be716446SPadmanabh Ratnakar wrb, NULL); 22989aebddd1SJeff Kirsher 2299c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 23009aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 23019aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 23029aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 23039aebddd1SJeff Kirsher 23049aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23059aebddd1SJeff Kirsher if (!status) 2306be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 23079aebddd1SJeff Kirsher 23089aebddd1SJeff Kirsher err: 23099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23109aebddd1SJeff Kirsher return status; 23119aebddd1SJeff Kirsher } 23129aebddd1SJeff Kirsher 23139aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 23149aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23159aebddd1SJeff Kirsher { 23169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23179aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 23189aebddd1SJeff Kirsher int status; 23199aebddd1SJeff Kirsher 23209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23219aebddd1SJeff Kirsher 23229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23239aebddd1SJeff Kirsher if (!wrb) { 23249aebddd1SJeff Kirsher status = -EBUSY; 23259aebddd1SJeff Kirsher goto err; 23269aebddd1SJeff Kirsher } 23279aebddd1SJeff Kirsher req = nonemb_cmd->va; 23289aebddd1SJeff Kirsher 2329106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2330106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2331106df1e3SSomnath Kotur nonemb_cmd); 23329aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 23339aebddd1SJeff Kirsher 23349aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23359aebddd1SJeff Kirsher 23369aebddd1SJeff Kirsher err: 23379aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23389aebddd1SJeff Kirsher return status; 23399aebddd1SJeff Kirsher } 23409aebddd1SJeff Kirsher 23419aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 23429aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 23439aebddd1SJeff Kirsher { 23449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23459aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 23469aebddd1SJeff Kirsher int status; 23479aebddd1SJeff Kirsher 23489aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23499aebddd1SJeff Kirsher 23509aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23519aebddd1SJeff Kirsher if (!wrb) { 23529aebddd1SJeff Kirsher status = -EBUSY; 23539aebddd1SJeff Kirsher goto err; 23549aebddd1SJeff Kirsher } 23559aebddd1SJeff Kirsher 23569aebddd1SJeff Kirsher req = embedded_payload(wrb); 23579aebddd1SJeff Kirsher 2358106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2359106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2360106df1e3SSomnath Kotur NULL); 23619aebddd1SJeff Kirsher 23629aebddd1SJeff Kirsher req->src_port = port_num; 23639aebddd1SJeff Kirsher req->dest_port = port_num; 23649aebddd1SJeff Kirsher req->loopback_type = loopback_type; 23659aebddd1SJeff Kirsher req->loopback_state = enable; 23669aebddd1SJeff Kirsher 23679aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23689aebddd1SJeff Kirsher err: 23699aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23709aebddd1SJeff Kirsher return status; 23719aebddd1SJeff Kirsher } 23729aebddd1SJeff Kirsher 23739aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 23749aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 23759aebddd1SJeff Kirsher { 23769aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23779aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 23785eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 23799aebddd1SJeff Kirsher int status; 23809aebddd1SJeff Kirsher 23819aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23829aebddd1SJeff Kirsher 23839aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23849aebddd1SJeff Kirsher if (!wrb) { 23859aebddd1SJeff Kirsher status = -EBUSY; 23869aebddd1SJeff Kirsher goto err; 23879aebddd1SJeff Kirsher } 23889aebddd1SJeff Kirsher 23899aebddd1SJeff Kirsher req = embedded_payload(wrb); 23909aebddd1SJeff Kirsher 2391106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2392106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 23939aebddd1SJeff Kirsher 23945eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 23959aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23969aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 23979aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 23989aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 23999aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 24009aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 24019aebddd1SJeff Kirsher 24025eeff635SSuresh Reddy be_mcc_notify(adapter); 24039aebddd1SJeff Kirsher 24045eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 24055eeff635SSuresh Reddy 24065eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 24075eeff635SSuresh Reddy resp = embedded_payload(wrb); 24085eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 24095eeff635SSuresh Reddy 24105eeff635SSuresh Reddy return status; 24119aebddd1SJeff Kirsher err: 24129aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24139aebddd1SJeff Kirsher return status; 24149aebddd1SJeff Kirsher } 24159aebddd1SJeff Kirsher 24169aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 24179aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 24189aebddd1SJeff Kirsher { 24199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24209aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 24219aebddd1SJeff Kirsher int status; 24229aebddd1SJeff Kirsher int i, j = 0; 24239aebddd1SJeff Kirsher 24249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24259aebddd1SJeff Kirsher 24269aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24279aebddd1SJeff Kirsher if (!wrb) { 24289aebddd1SJeff Kirsher status = -EBUSY; 24299aebddd1SJeff Kirsher goto err; 24309aebddd1SJeff Kirsher } 24319aebddd1SJeff Kirsher req = cmd->va; 2432106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2433106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 24349aebddd1SJeff Kirsher 24359aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24369aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 24379aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 24389aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 24399aebddd1SJeff Kirsher j++; 24409aebddd1SJeff Kirsher if (j > 7) 24419aebddd1SJeff Kirsher j = 0; 24429aebddd1SJeff Kirsher } 24439aebddd1SJeff Kirsher 24449aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24459aebddd1SJeff Kirsher 24469aebddd1SJeff Kirsher if (!status) { 24479aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 24489aebddd1SJeff Kirsher resp = cmd->va; 24499aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 24509aebddd1SJeff Kirsher resp->snd_err) { 24519aebddd1SJeff Kirsher status = -1; 24529aebddd1SJeff Kirsher } 24539aebddd1SJeff Kirsher } 24549aebddd1SJeff Kirsher 24559aebddd1SJeff Kirsher err: 24569aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24579aebddd1SJeff Kirsher return status; 24589aebddd1SJeff Kirsher } 24599aebddd1SJeff Kirsher 24609aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 24619aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24629aebddd1SJeff Kirsher { 24639aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24649aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 24659aebddd1SJeff Kirsher int status; 24669aebddd1SJeff Kirsher 24679aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24689aebddd1SJeff Kirsher 24699aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24709aebddd1SJeff Kirsher if (!wrb) { 24719aebddd1SJeff Kirsher status = -EBUSY; 24729aebddd1SJeff Kirsher goto err; 24739aebddd1SJeff Kirsher } 24749aebddd1SJeff Kirsher req = nonemb_cmd->va; 24759aebddd1SJeff Kirsher 2476106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2477106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2478106df1e3SSomnath Kotur nonemb_cmd); 24799aebddd1SJeff Kirsher 24809aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24819aebddd1SJeff Kirsher 24829aebddd1SJeff Kirsher err: 24839aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24849aebddd1SJeff Kirsher return status; 24859aebddd1SJeff Kirsher } 24869aebddd1SJeff Kirsher 248742f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 24889aebddd1SJeff Kirsher { 24899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24909aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 24919aebddd1SJeff Kirsher struct be_dma_mem cmd; 24929aebddd1SJeff Kirsher int status; 24939aebddd1SJeff Kirsher 2494f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2495f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2496f25b119cSPadmanabh Ratnakar return -EPERM; 2497f25b119cSPadmanabh Ratnakar 24989aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24999aebddd1SJeff Kirsher 25009aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25019aebddd1SJeff Kirsher if (!wrb) { 25029aebddd1SJeff Kirsher status = -EBUSY; 25039aebddd1SJeff Kirsher goto err; 25049aebddd1SJeff Kirsher } 25059aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 25069aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 25079aebddd1SJeff Kirsher &cmd.dma); 25089aebddd1SJeff Kirsher if (!cmd.va) { 25099aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 25109aebddd1SJeff Kirsher status = -ENOMEM; 25119aebddd1SJeff Kirsher goto err; 25129aebddd1SJeff Kirsher } 25139aebddd1SJeff Kirsher 25149aebddd1SJeff Kirsher req = cmd.va; 25159aebddd1SJeff Kirsher 2516106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2517106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2518106df1e3SSomnath Kotur wrb, &cmd); 25199aebddd1SJeff Kirsher 25209aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25219aebddd1SJeff Kirsher if (!status) { 25229aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 25239aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 252442f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 252542f11cf2SAjit Khaparde adapter->phy.interface_type = 25269aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 252742f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 252842f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 252942f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 253042f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 253142f11cf2SAjit Khaparde adapter->phy.misc_params = 253242f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 253368cb7e47SVasundhara Volam 253468cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 253568cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 253668cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 253768cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 253868cb7e47SVasundhara Volam } 25399aebddd1SJeff Kirsher } 25409aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 25419aebddd1SJeff Kirsher cmd.va, cmd.dma); 25429aebddd1SJeff Kirsher err: 25439aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25449aebddd1SJeff Kirsher return status; 25459aebddd1SJeff Kirsher } 25469aebddd1SJeff Kirsher 25479aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 25489aebddd1SJeff Kirsher { 25499aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25509aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 25519aebddd1SJeff Kirsher int status; 25529aebddd1SJeff Kirsher 25539aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25549aebddd1SJeff Kirsher 25559aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25569aebddd1SJeff Kirsher if (!wrb) { 25579aebddd1SJeff Kirsher status = -EBUSY; 25589aebddd1SJeff Kirsher goto err; 25599aebddd1SJeff Kirsher } 25609aebddd1SJeff Kirsher 25619aebddd1SJeff Kirsher req = embedded_payload(wrb); 25629aebddd1SJeff Kirsher 2563106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2564106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 25659aebddd1SJeff Kirsher 25669aebddd1SJeff Kirsher req->hdr.domain = domain; 25679aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 25689aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 25699aebddd1SJeff Kirsher 25709aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25719aebddd1SJeff Kirsher 25729aebddd1SJeff Kirsher err: 25739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25749aebddd1SJeff Kirsher return status; 25759aebddd1SJeff Kirsher } 25769aebddd1SJeff Kirsher 25779aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 25789aebddd1SJeff Kirsher { 25799aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25809aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 25819aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 25829aebddd1SJeff Kirsher int status; 25839aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 25849aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 25859aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 25869aebddd1SJeff Kirsher 2587d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2588d98ef50fSSuresh Reddy return -1; 2589d98ef50fSSuresh Reddy 25909aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 25919aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 25929aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 25939aebddd1SJeff Kirsher &attribs_cmd.dma); 25949aebddd1SJeff Kirsher if (!attribs_cmd.va) { 25959aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 25969aebddd1SJeff Kirsher "Memory allocation failure\n"); 2597d98ef50fSSuresh Reddy status = -ENOMEM; 2598d98ef50fSSuresh Reddy goto err; 25999aebddd1SJeff Kirsher } 26009aebddd1SJeff Kirsher 26019aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26029aebddd1SJeff Kirsher if (!wrb) { 26039aebddd1SJeff Kirsher status = -EBUSY; 26049aebddd1SJeff Kirsher goto err; 26059aebddd1SJeff Kirsher } 26069aebddd1SJeff Kirsher req = attribs_cmd.va; 26079aebddd1SJeff Kirsher 2608106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2609106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2610106df1e3SSomnath Kotur &attribs_cmd); 26119aebddd1SJeff Kirsher 26129aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26139aebddd1SJeff Kirsher if (!status) { 26149aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 26159aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 26169aebddd1SJeff Kirsher } 26179aebddd1SJeff Kirsher 26189aebddd1SJeff Kirsher err: 26199aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2620d98ef50fSSuresh Reddy if (attribs_cmd.va) 2621d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2622d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 26239aebddd1SJeff Kirsher return status; 26249aebddd1SJeff Kirsher } 26259aebddd1SJeff Kirsher 26269aebddd1SJeff Kirsher /* Uses mbox */ 26279aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 26289aebddd1SJeff Kirsher { 26299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26309aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 26319aebddd1SJeff Kirsher int status; 26329aebddd1SJeff Kirsher 26339aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 26349aebddd1SJeff Kirsher return -1; 26359aebddd1SJeff Kirsher 26369aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26379aebddd1SJeff Kirsher if (!wrb) { 26389aebddd1SJeff Kirsher status = -EBUSY; 26399aebddd1SJeff Kirsher goto err; 26409aebddd1SJeff Kirsher } 26419aebddd1SJeff Kirsher 26429aebddd1SJeff Kirsher req = embedded_payload(wrb); 26439aebddd1SJeff Kirsher 2644106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2645106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 26469aebddd1SJeff Kirsher 26479aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 26489aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 26499aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 26509aebddd1SJeff Kirsher 26519aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26529aebddd1SJeff Kirsher if (!status) { 26539aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 26549aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 26559aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2656d379142bSSathya Perla if (!adapter->be3_native) 2657d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2658d379142bSSathya Perla "adapter not in advanced mode\n"); 26599aebddd1SJeff Kirsher } 26609aebddd1SJeff Kirsher err: 26619aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 26629aebddd1SJeff Kirsher return status; 26639aebddd1SJeff Kirsher } 2664590c391dSPadmanabh Ratnakar 2665f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2666f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2667f25b119cSPadmanabh Ratnakar u32 domain) 2668f25b119cSPadmanabh Ratnakar { 2669f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2670f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2671f25b119cSPadmanabh Ratnakar int status; 2672f25b119cSPadmanabh Ratnakar 2673f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2674f25b119cSPadmanabh Ratnakar 2675f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2676f25b119cSPadmanabh Ratnakar if (!wrb) { 2677f25b119cSPadmanabh Ratnakar status = -EBUSY; 2678f25b119cSPadmanabh Ratnakar goto err; 2679f25b119cSPadmanabh Ratnakar } 2680f25b119cSPadmanabh Ratnakar 2681f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2682f25b119cSPadmanabh Ratnakar 2683f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2684f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2685f25b119cSPadmanabh Ratnakar wrb, NULL); 2686f25b119cSPadmanabh Ratnakar 2687f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2688f25b119cSPadmanabh Ratnakar 2689f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2690f25b119cSPadmanabh Ratnakar if (!status) { 2691f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2692f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2693f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 2694f25b119cSPadmanabh Ratnakar } 2695f25b119cSPadmanabh Ratnakar 2696f25b119cSPadmanabh Ratnakar err: 2697f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2698f25b119cSPadmanabh Ratnakar return status; 2699f25b119cSPadmanabh Ratnakar } 2700f25b119cSPadmanabh Ratnakar 270104a06028SSathya Perla /* Set privilege(s) for a function */ 270204a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 270304a06028SSathya Perla u32 domain) 270404a06028SSathya Perla { 270504a06028SSathya Perla struct be_mcc_wrb *wrb; 270604a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 270704a06028SSathya Perla int status; 270804a06028SSathya Perla 270904a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 271004a06028SSathya Perla 271104a06028SSathya Perla wrb = wrb_from_mccq(adapter); 271204a06028SSathya Perla if (!wrb) { 271304a06028SSathya Perla status = -EBUSY; 271404a06028SSathya Perla goto err; 271504a06028SSathya Perla } 271604a06028SSathya Perla 271704a06028SSathya Perla req = embedded_payload(wrb); 271804a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 271904a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 272004a06028SSathya Perla wrb, NULL); 272104a06028SSathya Perla req->hdr.domain = domain; 272204a06028SSathya Perla if (lancer_chip(adapter)) 272304a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 272404a06028SSathya Perla else 272504a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 272604a06028SSathya Perla 272704a06028SSathya Perla status = be_mcc_notify_wait(adapter); 272804a06028SSathya Perla err: 272904a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 273004a06028SSathya Perla return status; 273104a06028SSathya Perla } 273204a06028SSathya Perla 27335a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 27345a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 27355a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 27365a712c13SSathya Perla */ 27371578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 27385a712c13SSathya Perla bool *pmac_id_valid, u32 *pmac_id, u8 domain) 2739590c391dSPadmanabh Ratnakar { 2740590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2741590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2742590c391dSPadmanabh Ratnakar int status; 2743590c391dSPadmanabh Ratnakar int mac_count; 2744e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2745e5e1ee89SPadmanabh Ratnakar int i; 2746e5e1ee89SPadmanabh Ratnakar 2747e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2748e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2749e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2750e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2751e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2752e5e1ee89SPadmanabh Ratnakar 2753e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2754e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2755e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2756e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2757e5e1ee89SPadmanabh Ratnakar } 2758590c391dSPadmanabh Ratnakar 2759590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2760590c391dSPadmanabh Ratnakar 2761590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2762590c391dSPadmanabh Ratnakar if (!wrb) { 2763590c391dSPadmanabh Ratnakar status = -EBUSY; 2764e5e1ee89SPadmanabh Ratnakar goto out; 2765590c391dSPadmanabh Ratnakar } 2766e5e1ee89SPadmanabh Ratnakar 2767e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2768590c391dSPadmanabh Ratnakar 2769590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2770bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2771bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2772590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2773e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 27745a712c13SSathya Perla if (*pmac_id_valid) { 27755a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 27765a712c13SSathya Perla req->iface_id = cpu_to_le16(adapter->if_handle); 27775a712c13SSathya Perla req->perm_override = 0; 27785a712c13SSathya Perla } else { 2779e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 27805a712c13SSathya Perla } 2781590c391dSPadmanabh Ratnakar 2782590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2783590c391dSPadmanabh Ratnakar if (!status) { 2784590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2785e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 27865a712c13SSathya Perla 27875a712c13SSathya Perla if (*pmac_id_valid) { 27885a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 27895a712c13SSathya Perla ETH_ALEN); 27905a712c13SSathya Perla goto out; 27915a712c13SSathya Perla } 27925a712c13SSathya Perla 2793e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2794e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 27951578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 27961578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 27971578e777SPadmanabh Ratnakar * found. 2798e5e1ee89SPadmanabh Ratnakar */ 2799590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2800e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2801e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2802e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2803e5e1ee89SPadmanabh Ratnakar 2804e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2805e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2806e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2807e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2808e5e1ee89SPadmanabh Ratnakar */ 2809e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 28105a712c13SSathya Perla *pmac_id_valid = true; 2811e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2812e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2813e5e1ee89SPadmanabh Ratnakar goto out; 2814590c391dSPadmanabh Ratnakar } 2815590c391dSPadmanabh Ratnakar } 28161578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 28175a712c13SSathya Perla *pmac_id_valid = false; 2818e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2819e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2820590c391dSPadmanabh Ratnakar } 2821590c391dSPadmanabh Ratnakar 2822e5e1ee89SPadmanabh Ratnakar out: 2823590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2824e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2825e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2826590c391dSPadmanabh Ratnakar return status; 2827590c391dSPadmanabh Ratnakar } 2828590c391dSPadmanabh Ratnakar 28295a712c13SSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac) 28305a712c13SSathya Perla { 28315a712c13SSathya Perla bool active = true; 28325a712c13SSathya Perla 28333175d8c2SSathya Perla if (BEx_chip(adapter)) 28345a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 28355a712c13SSathya Perla adapter->if_handle, curr_pmac_id); 28363175d8c2SSathya Perla else 28373175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 28383175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 28393175d8c2SSathya Perla &curr_pmac_id, 0); 28405a712c13SSathya Perla } 28415a712c13SSathya Perla 284295046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 284395046b92SSathya Perla { 284495046b92SSathya Perla int status; 284595046b92SSathya Perla bool pmac_valid = false; 284695046b92SSathya Perla 284795046b92SSathya Perla memset(mac, 0, ETH_ALEN); 284895046b92SSathya Perla 28493175d8c2SSathya Perla if (BEx_chip(adapter)) { 28503175d8c2SSathya Perla if (be_physfn(adapter)) 28513175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 28523175d8c2SSathya Perla 0); 285395046b92SSathya Perla else 285495046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 285595046b92SSathya Perla adapter->if_handle, 0); 28563175d8c2SSathya Perla } else { 28573175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 28583175d8c2SSathya Perla NULL, 0); 28593175d8c2SSathya Perla } 28603175d8c2SSathya Perla 286195046b92SSathya Perla return status; 286295046b92SSathya Perla } 286395046b92SSathya Perla 2864590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2865590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2866590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2867590c391dSPadmanabh Ratnakar { 2868590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2869590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2870590c391dSPadmanabh Ratnakar int status; 2871590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2872590c391dSPadmanabh Ratnakar 2873590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2874590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2875590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2876590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2877d0320f75SJoe Perches if (!cmd.va) 2878590c391dSPadmanabh Ratnakar return -ENOMEM; 2879590c391dSPadmanabh Ratnakar 2880590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2881590c391dSPadmanabh Ratnakar 2882590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2883590c391dSPadmanabh Ratnakar if (!wrb) { 2884590c391dSPadmanabh Ratnakar status = -EBUSY; 2885590c391dSPadmanabh Ratnakar goto err; 2886590c391dSPadmanabh Ratnakar } 2887590c391dSPadmanabh Ratnakar 2888590c391dSPadmanabh Ratnakar req = cmd.va; 2889590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2890590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2891590c391dSPadmanabh Ratnakar wrb, &cmd); 2892590c391dSPadmanabh Ratnakar 2893590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2894590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2895590c391dSPadmanabh Ratnakar if (mac_count) 2896590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2897590c391dSPadmanabh Ratnakar 2898590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2899590c391dSPadmanabh Ratnakar 2900590c391dSPadmanabh Ratnakar err: 2901590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2902590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2903590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2904590c391dSPadmanabh Ratnakar return status; 2905590c391dSPadmanabh Ratnakar } 29064762f6ceSAjit Khaparde 29073175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 29083175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 29093175d8c2SSathya Perla * current list are active. 29103175d8c2SSathya Perla */ 29113175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 29123175d8c2SSathya Perla { 29133175d8c2SSathya Perla bool active_mac = false; 29143175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 29153175d8c2SSathya Perla u32 pmac_id; 29163175d8c2SSathya Perla int status; 29173175d8c2SSathya Perla 29183175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 29193175d8c2SSathya Perla &pmac_id, dom); 29203175d8c2SSathya Perla if (!status && active_mac) 29213175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 29223175d8c2SSathya Perla 29233175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 29243175d8c2SSathya Perla } 29253175d8c2SSathya Perla 2926f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2927a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 2928f1f3ee1bSAjit Khaparde { 2929f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2930f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2931f1f3ee1bSAjit Khaparde void *ctxt; 2932f1f3ee1bSAjit Khaparde int status; 2933f1f3ee1bSAjit Khaparde 2934f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2935f1f3ee1bSAjit Khaparde 2936f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2937f1f3ee1bSAjit Khaparde if (!wrb) { 2938f1f3ee1bSAjit Khaparde status = -EBUSY; 2939f1f3ee1bSAjit Khaparde goto err; 2940f1f3ee1bSAjit Khaparde } 2941f1f3ee1bSAjit Khaparde 2942f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2943f1f3ee1bSAjit Khaparde ctxt = &req->context; 2944f1f3ee1bSAjit Khaparde 2945f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2946f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2947f1f3ee1bSAjit Khaparde 2948f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2949f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2950f1f3ee1bSAjit Khaparde if (pvid) { 2951f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2952f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2953f1f3ee1bSAjit Khaparde } 2954a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 2955a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 2956a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2957a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 2958a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 2959a77dcb8cSAjit Khaparde ctxt, hsw_mode); 2960a77dcb8cSAjit Khaparde } 2961f1f3ee1bSAjit Khaparde 2962f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2963f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2964f1f3ee1bSAjit Khaparde 2965f1f3ee1bSAjit Khaparde err: 2966f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2967f1f3ee1bSAjit Khaparde return status; 2968f1f3ee1bSAjit Khaparde } 2969f1f3ee1bSAjit Khaparde 2970f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2971f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2972a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 2973f1f3ee1bSAjit Khaparde { 2974f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2975f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2976f1f3ee1bSAjit Khaparde void *ctxt; 2977f1f3ee1bSAjit Khaparde int status; 2978f1f3ee1bSAjit Khaparde u16 vid; 2979f1f3ee1bSAjit Khaparde 2980f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2981f1f3ee1bSAjit Khaparde 2982f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2983f1f3ee1bSAjit Khaparde if (!wrb) { 2984f1f3ee1bSAjit Khaparde status = -EBUSY; 2985f1f3ee1bSAjit Khaparde goto err; 2986f1f3ee1bSAjit Khaparde } 2987f1f3ee1bSAjit Khaparde 2988f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2989f1f3ee1bSAjit Khaparde ctxt = &req->context; 2990f1f3ee1bSAjit Khaparde 2991f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2992f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2993f1f3ee1bSAjit Khaparde 2994f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2995a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 2996a77dcb8cSAjit Khaparde ctxt, intf_id); 2997f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2998a77dcb8cSAjit Khaparde 2999a77dcb8cSAjit Khaparde if (!BEx_chip(adapter)) { 3000a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3001a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3002a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3003a77dcb8cSAjit Khaparde } 3004f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3005f1f3ee1bSAjit Khaparde 3006f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3007f1f3ee1bSAjit Khaparde if (!status) { 3008f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3009f1f3ee1bSAjit Khaparde embedded_payload(wrb); 3010f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 3011f1f3ee1bSAjit Khaparde sizeof(resp->context)); 3012f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3013f1f3ee1bSAjit Khaparde pvid, &resp->context); 3014a77dcb8cSAjit Khaparde if (pvid) 3015f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3016a77dcb8cSAjit Khaparde if (mode) 3017a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3018a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3019f1f3ee1bSAjit Khaparde } 3020f1f3ee1bSAjit Khaparde 3021f1f3ee1bSAjit Khaparde err: 3022f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3023f1f3ee1bSAjit Khaparde return status; 3024f1f3ee1bSAjit Khaparde } 3025f1f3ee1bSAjit Khaparde 30264762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 30274762f6ceSAjit Khaparde { 30284762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 30294762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 30304762f6ceSAjit Khaparde int status; 30314762f6ceSAjit Khaparde int payload_len = sizeof(*req); 30324762f6ceSAjit Khaparde struct be_dma_mem cmd; 30334762f6ceSAjit Khaparde 3034f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3035f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3036f25b119cSPadmanabh Ratnakar return -EPERM; 3037f25b119cSPadmanabh Ratnakar 3038d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3039d98ef50fSSuresh Reddy return -1; 3040d98ef50fSSuresh Reddy 30414762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 30424762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 30434762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 30444762f6ceSAjit Khaparde &cmd.dma); 30454762f6ceSAjit Khaparde if (!cmd.va) { 30464762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 30474762f6ceSAjit Khaparde "Memory allocation failure\n"); 3048d98ef50fSSuresh Reddy status = -ENOMEM; 3049d98ef50fSSuresh Reddy goto err; 30504762f6ceSAjit Khaparde } 30514762f6ceSAjit Khaparde 30524762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 30534762f6ceSAjit Khaparde if (!wrb) { 30544762f6ceSAjit Khaparde status = -EBUSY; 30554762f6ceSAjit Khaparde goto err; 30564762f6ceSAjit Khaparde } 30574762f6ceSAjit Khaparde 30584762f6ceSAjit Khaparde req = cmd.va; 30594762f6ceSAjit Khaparde 30604762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 30614762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 30624762f6ceSAjit Khaparde payload_len, wrb, &cmd); 30634762f6ceSAjit Khaparde 30644762f6ceSAjit Khaparde req->hdr.version = 1; 30654762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 30664762f6ceSAjit Khaparde 30674762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 30684762f6ceSAjit Khaparde if (!status) { 30694762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 30704762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 30714762f6ceSAjit Khaparde 30724762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 30734762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 30744762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 30754762f6ceSAjit Khaparde status = -1; 30764762f6ceSAjit Khaparde goto err; 30774762f6ceSAjit Khaparde } 30784762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 30794762f6ceSAjit Khaparde } 30804762f6ceSAjit Khaparde err: 30814762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3082d98ef50fSSuresh Reddy if (cmd.va) 30834762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 30844762f6ceSAjit Khaparde return status; 3085941a77d5SSomnath Kotur 3086941a77d5SSomnath Kotur } 3087941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3088941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3089941a77d5SSomnath Kotur { 3090941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3091941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3092941a77d5SSomnath Kotur int status; 3093941a77d5SSomnath Kotur 3094941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3095941a77d5SSomnath Kotur return -1; 3096941a77d5SSomnath Kotur 3097941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3098941a77d5SSomnath Kotur if (!wrb) { 3099941a77d5SSomnath Kotur status = -EBUSY; 3100941a77d5SSomnath Kotur goto err; 3101941a77d5SSomnath Kotur } 3102941a77d5SSomnath Kotur 3103941a77d5SSomnath Kotur req = cmd->va; 3104941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3105941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3106941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3107941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3108941a77d5SSomnath Kotur 3109941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3110941a77d5SSomnath Kotur err: 3111941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3112941a77d5SSomnath Kotur return status; 3113941a77d5SSomnath Kotur } 3114941a77d5SSomnath Kotur 3115941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3116941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3117941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3118941a77d5SSomnath Kotur { 3119941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3120941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3121941a77d5SSomnath Kotur int status; 3122941a77d5SSomnath Kotur 3123941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3124941a77d5SSomnath Kotur 3125941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3126941a77d5SSomnath Kotur if (!wrb) { 3127941a77d5SSomnath Kotur status = -EBUSY; 3128941a77d5SSomnath Kotur goto err; 3129941a77d5SSomnath Kotur } 3130941a77d5SSomnath Kotur 3131941a77d5SSomnath Kotur req = cmd->va; 3132941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3133941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3134941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3135941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3136941a77d5SSomnath Kotur 3137941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3138941a77d5SSomnath Kotur err: 3139941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3140941a77d5SSomnath Kotur return status; 31414762f6ceSAjit Khaparde } 31426a4ab669SParav Pandit 3143b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3144b4e32a71SPadmanabh Ratnakar { 3145b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3146b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3147b4e32a71SPadmanabh Ratnakar int status; 3148b4e32a71SPadmanabh Ratnakar 3149b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3150b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3151b4e32a71SPadmanabh Ratnakar return 0; 3152b4e32a71SPadmanabh Ratnakar } 3153b4e32a71SPadmanabh Ratnakar 3154b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3155b4e32a71SPadmanabh Ratnakar 3156b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3157b4e32a71SPadmanabh Ratnakar if (!wrb) { 3158b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3159b4e32a71SPadmanabh Ratnakar goto err; 3160b4e32a71SPadmanabh Ratnakar } 3161b4e32a71SPadmanabh Ratnakar 3162b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3163b4e32a71SPadmanabh Ratnakar 3164b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3165b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3166b4e32a71SPadmanabh Ratnakar NULL); 3167b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3168b4e32a71SPadmanabh Ratnakar 3169b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3170b4e32a71SPadmanabh Ratnakar if (!status) { 3171b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3172b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3173b4e32a71SPadmanabh Ratnakar } else { 3174b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3175b4e32a71SPadmanabh Ratnakar } 3176b4e32a71SPadmanabh Ratnakar err: 3177b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3178b4e32a71SPadmanabh Ratnakar return status; 3179b4e32a71SPadmanabh Ratnakar } 3180b4e32a71SPadmanabh Ratnakar 3181150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3182abb93951SPadmanabh Ratnakar { 3183150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3184abb93951SPadmanabh Ratnakar int i; 3185abb93951SPadmanabh Ratnakar 3186abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3187150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3188150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3189150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3190150d58c7SVasundhara Volam 3191150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3192150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3193150d58c7SVasundhara Volam } 3194950e2958SWei Yang return NULL; 3195abb93951SPadmanabh Ratnakar } 3196abb93951SPadmanabh Ratnakar 3197150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3198150d58c7SVasundhara Volam u32 desc_count) 3199150d58c7SVasundhara Volam { 3200150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3201150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3202150d58c7SVasundhara Volam int i; 3203150d58c7SVasundhara Volam 3204150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3205150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3206150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3207150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3208150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3209150d58c7SVasundhara Volam return pcie; 3210150d58c7SVasundhara Volam } 3211150d58c7SVasundhara Volam 3212150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3213150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3214150d58c7SVasundhara Volam } 3215abb93951SPadmanabh Ratnakar return NULL; 3216abb93951SPadmanabh Ratnakar } 3217abb93951SPadmanabh Ratnakar 321892bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 321992bf14abSSathya Perla struct be_nic_res_desc *desc) 322092bf14abSSathya Perla { 322192bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 322292bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 322392bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 322492bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 322592bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 322692bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 322792bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 322892bf14abSSathya Perla /* Clear flags that driver is not interested in */ 322992bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 323092bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 323192bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 323292bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 323392bf14abSSathya Perla res->max_rss_qs -= 1; 323492bf14abSSathya Perla } 323592bf14abSSathya Perla 3236abb93951SPadmanabh Ratnakar /* Uses Mbox */ 323792bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3238abb93951SPadmanabh Ratnakar { 3239abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3240abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3241abb93951SPadmanabh Ratnakar int status; 3242abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3243abb93951SPadmanabh Ratnakar 3244d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3245d98ef50fSSuresh Reddy return -1; 3246d98ef50fSSuresh Reddy 3247abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3248abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3249abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3250abb93951SPadmanabh Ratnakar &cmd.dma); 3251abb93951SPadmanabh Ratnakar if (!cmd.va) { 3252abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3253d98ef50fSSuresh Reddy status = -ENOMEM; 3254d98ef50fSSuresh Reddy goto err; 3255abb93951SPadmanabh Ratnakar } 3256abb93951SPadmanabh Ratnakar 3257abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3258abb93951SPadmanabh Ratnakar if (!wrb) { 3259abb93951SPadmanabh Ratnakar status = -EBUSY; 3260abb93951SPadmanabh Ratnakar goto err; 3261abb93951SPadmanabh Ratnakar } 3262abb93951SPadmanabh Ratnakar 3263abb93951SPadmanabh Ratnakar req = cmd.va; 3264abb93951SPadmanabh Ratnakar 3265abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3266abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3267abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3268abb93951SPadmanabh Ratnakar 326928710c55SKalesh AP if (skyhawk_chip(adapter)) 327028710c55SKalesh AP req->hdr.version = 1; 327128710c55SKalesh AP 3272abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3273abb93951SPadmanabh Ratnakar if (!status) { 3274abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3275abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3276150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3277abb93951SPadmanabh Ratnakar 3278150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3279abb93951SPadmanabh Ratnakar if (!desc) { 3280abb93951SPadmanabh Ratnakar status = -EINVAL; 3281abb93951SPadmanabh Ratnakar goto err; 3282abb93951SPadmanabh Ratnakar } 3283abb93951SPadmanabh Ratnakar 3284d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 328592bf14abSSathya Perla be_copy_nic_desc(res, desc); 3286abb93951SPadmanabh Ratnakar } 3287abb93951SPadmanabh Ratnakar err: 3288abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3289d98ef50fSSuresh Reddy if (cmd.va) 3290d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3291abb93951SPadmanabh Ratnakar return status; 3292abb93951SPadmanabh Ratnakar } 3293abb93951SPadmanabh Ratnakar 3294a05f99dbSVasundhara Volam /* Uses mbox */ 32954188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3296a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3297abb93951SPadmanabh Ratnakar { 3298abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3299abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3300abb93951SPadmanabh Ratnakar int status; 3301abb93951SPadmanabh Ratnakar 3302a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3303a05f99dbSVasundhara Volam return -1; 3304a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3305a05f99dbSVasundhara Volam 3306a05f99dbSVasundhara Volam req = cmd->va; 3307a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3308a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3309a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3310a05f99dbSVasundhara Volam 3311a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3312a05f99dbSVasundhara Volam req->hdr.domain = domain; 3313a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3314a05f99dbSVasundhara Volam req->hdr.version = 1; 3315a05f99dbSVasundhara Volam 3316a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3317a05f99dbSVasundhara Volam 3318a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3319a05f99dbSVasundhara Volam return status; 3320abb93951SPadmanabh Ratnakar } 3321abb93951SPadmanabh Ratnakar 3322a05f99dbSVasundhara Volam /* Uses sync mcc */ 33234188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3324a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3325a05f99dbSVasundhara Volam { 3326a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3327a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3328a05f99dbSVasundhara Volam int status; 3329a05f99dbSVasundhara Volam 3330abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3331abb93951SPadmanabh Ratnakar 3332abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3333abb93951SPadmanabh Ratnakar if (!wrb) { 3334abb93951SPadmanabh Ratnakar status = -EBUSY; 3335abb93951SPadmanabh Ratnakar goto err; 3336abb93951SPadmanabh Ratnakar } 3337abb93951SPadmanabh Ratnakar 3338a05f99dbSVasundhara Volam req = cmd->va; 3339abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3340abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3341a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3342abb93951SPadmanabh Ratnakar 3343abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3344abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3345a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3346a05f99dbSVasundhara Volam req->hdr.version = 1; 3347abb93951SPadmanabh Ratnakar 3348abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3349a05f99dbSVasundhara Volam 3350a05f99dbSVasundhara Volam err: 3351a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3352a05f99dbSVasundhara Volam return status; 3353a05f99dbSVasundhara Volam } 3354a05f99dbSVasundhara Volam 3355a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 335692bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 335792bf14abSSathya Perla struct be_resources *res, u8 domain) 3358a05f99dbSVasundhara Volam { 3359150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3360150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3361150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3362a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3363a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3364150d58c7SVasundhara Volam u32 desc_count; 3365a05f99dbSVasundhara Volam int status; 3366a05f99dbSVasundhara Volam 3367a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3368a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3369150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3370150d58c7SVasundhara Volam if (!cmd.va) 3371a05f99dbSVasundhara Volam return -ENOMEM; 3372a05f99dbSVasundhara Volam 3373a05f99dbSVasundhara Volam if (!mccq->created) 3374a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3375a05f99dbSVasundhara Volam else 3376a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3377150d58c7SVasundhara Volam if (status) 3378abb93951SPadmanabh Ratnakar goto err; 3379150d58c7SVasundhara Volam 3380150d58c7SVasundhara Volam resp = cmd.va; 3381150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3382150d58c7SVasundhara Volam 3383150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3384150d58c7SVasundhara Volam desc_count); 3385150d58c7SVasundhara Volam if (pcie) 338692bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3387150d58c7SVasundhara Volam 3388150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 338992bf14abSSathya Perla if (nic) 339092bf14abSSathya Perla be_copy_nic_desc(res, nic); 339192bf14abSSathya Perla 3392abb93951SPadmanabh Ratnakar err: 3393a05f99dbSVasundhara Volam if (cmd.va) 3394150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3395abb93951SPadmanabh Ratnakar return status; 3396abb93951SPadmanabh Ratnakar } 3397abb93951SPadmanabh Ratnakar 3398150d58c7SVasundhara Volam /* Currently only Lancer uses this command and it supports version 0 only 3399150d58c7SVasundhara Volam * Uses sync mcc 3400150d58c7SVasundhara Volam */ 3401d5c18473SPadmanabh Ratnakar int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, 3402d5c18473SPadmanabh Ratnakar u8 domain) 3403d5c18473SPadmanabh Ratnakar { 3404d5c18473SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3405d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3406d5c18473SPadmanabh Ratnakar int status; 3407d5c18473SPadmanabh Ratnakar 3408d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3409d5c18473SPadmanabh Ratnakar 3410d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3411d5c18473SPadmanabh Ratnakar if (!wrb) { 3412d5c18473SPadmanabh Ratnakar status = -EBUSY; 3413d5c18473SPadmanabh Ratnakar goto err; 3414d5c18473SPadmanabh Ratnakar } 3415d5c18473SPadmanabh Ratnakar 3416d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3417d5c18473SPadmanabh Ratnakar 3418d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3419d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3420d5c18473SPadmanabh Ratnakar wrb, NULL); 3421d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3422d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3423150d58c7SVasundhara Volam req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3424150d58c7SVasundhara Volam req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3425d5c18473SPadmanabh Ratnakar req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV); 3426d5c18473SPadmanabh Ratnakar req->nic_desc.pf_num = adapter->pf_number; 3427d5c18473SPadmanabh Ratnakar req->nic_desc.vf_num = domain; 3428d5c18473SPadmanabh Ratnakar 3429d5c18473SPadmanabh Ratnakar /* Mark fields invalid */ 3430d5c18473SPadmanabh Ratnakar req->nic_desc.unicast_mac_count = 0xFFFF; 3431d5c18473SPadmanabh Ratnakar req->nic_desc.mcc_count = 0xFFFF; 3432d5c18473SPadmanabh Ratnakar req->nic_desc.vlan_count = 0xFFFF; 3433d5c18473SPadmanabh Ratnakar req->nic_desc.mcast_mac_count = 0xFFFF; 3434d5c18473SPadmanabh Ratnakar req->nic_desc.txq_count = 0xFFFF; 3435d5c18473SPadmanabh Ratnakar req->nic_desc.rq_count = 0xFFFF; 3436d5c18473SPadmanabh Ratnakar req->nic_desc.rssq_count = 0xFFFF; 3437d5c18473SPadmanabh Ratnakar req->nic_desc.lro_count = 0xFFFF; 3438d5c18473SPadmanabh Ratnakar req->nic_desc.cq_count = 0xFFFF; 3439d5c18473SPadmanabh Ratnakar req->nic_desc.toe_conn_count = 0xFFFF; 3440d5c18473SPadmanabh Ratnakar req->nic_desc.eq_count = 0xFFFF; 3441d5c18473SPadmanabh Ratnakar req->nic_desc.link_param = 0xFF; 3442d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = 0xFFFFFFFF; 3443d5c18473SPadmanabh Ratnakar req->nic_desc.acpi_params = 0xFF; 3444d5c18473SPadmanabh Ratnakar req->nic_desc.wol_param = 0x0F; 3445d5c18473SPadmanabh Ratnakar 3446d5c18473SPadmanabh Ratnakar /* Change BW */ 3447d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = cpu_to_le32(bps); 3448d5c18473SPadmanabh Ratnakar req->nic_desc.bw_max = cpu_to_le32(bps); 3449d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3450d5c18473SPadmanabh Ratnakar err: 3451d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3452d5c18473SPadmanabh Ratnakar return status; 3453d5c18473SPadmanabh Ratnakar } 3454d5c18473SPadmanabh Ratnakar 34554c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 34564c876616SSathya Perla int vf_num) 34574c876616SSathya Perla { 34584c876616SSathya Perla struct be_mcc_wrb *wrb; 34594c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 34604c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 34614c876616SSathya Perla int status; 34624c876616SSathya Perla 34634c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 34644c876616SSathya Perla 34654c876616SSathya Perla wrb = wrb_from_mccq(adapter); 34664c876616SSathya Perla if (!wrb) { 34674c876616SSathya Perla status = -EBUSY; 34684c876616SSathya Perla goto err; 34694c876616SSathya Perla } 34704c876616SSathya Perla req = embedded_payload(wrb); 34714c876616SSathya Perla 34724c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 34734c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 34744c876616SSathya Perla wrb, NULL); 34754c876616SSathya Perla req->hdr.domain = vf_num + 1; 34764c876616SSathya Perla 34774c876616SSathya Perla status = be_mcc_notify_wait(adapter); 34784c876616SSathya Perla if (!status) { 34794c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 34804c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 34814c876616SSathya Perla } 34824c876616SSathya Perla 34834c876616SSathya Perla err: 34844c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 34854c876616SSathya Perla return status; 34864c876616SSathya Perla } 34874c876616SSathya Perla 34885c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 34895c510811SSomnath Kotur { 34905c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 34915c510811SSomnath Kotur u32 reg_val; 34925c510811SSomnath Kotur int status = 0, i; 34935c510811SSomnath Kotur 34945c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 34955c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 34965c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 34975c510811SSomnath Kotur break; 34985c510811SSomnath Kotur 34995c510811SSomnath Kotur ssleep(1); 35005c510811SSomnath Kotur } 35015c510811SSomnath Kotur 35025c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 35035c510811SSomnath Kotur status = -1; 35045c510811SSomnath Kotur 35055c510811SSomnath Kotur return status; 35065c510811SSomnath Kotur } 35075c510811SSomnath Kotur 35085c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 35095c510811SSomnath Kotur { 35105c510811SSomnath Kotur int status = 0; 35115c510811SSomnath Kotur 35125c510811SSomnath Kotur status = lancer_wait_idle(adapter); 35135c510811SSomnath Kotur if (status) 35145c510811SSomnath Kotur return status; 35155c510811SSomnath Kotur 35165c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 35175c510811SSomnath Kotur 35185c510811SSomnath Kotur return status; 35195c510811SSomnath Kotur } 35205c510811SSomnath Kotur 35215c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 35225c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 35235c510811SSomnath Kotur { 35245c510811SSomnath Kotur u32 sliport_status = 0; 35255c510811SSomnath Kotur 35265c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 35275c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 35285c510811SSomnath Kotur } 35295c510811SSomnath Kotur 35305c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 35315c510811SSomnath Kotur { 35325c510811SSomnath Kotur int status; 35335c510811SSomnath Kotur 35345c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 35355c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 35365c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 35375c510811SSomnath Kotur if (status < 0) { 35385c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 35395c510811SSomnath Kotur return status; 35405c510811SSomnath Kotur } 35415c510811SSomnath Kotur 35425c510811SSomnath Kotur status = lancer_wait_idle(adapter); 35435c510811SSomnath Kotur if (status) 35445c510811SSomnath Kotur return status; 35455c510811SSomnath Kotur 35465c510811SSomnath Kotur if (!dump_present(adapter)) { 35475c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 35485c510811SSomnath Kotur return -1; 35495c510811SSomnath Kotur } 35505c510811SSomnath Kotur 35515c510811SSomnath Kotur return 0; 35525c510811SSomnath Kotur } 35535c510811SSomnath Kotur 3554dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3555dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3556dcf7ebbaSPadmanabh Ratnakar { 3557dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3558dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3559dcf7ebbaSPadmanabh Ratnakar int status; 3560dcf7ebbaSPadmanabh Ratnakar 35610599863dSVasundhara Volam if (BEx_chip(adapter)) 3562dcf7ebbaSPadmanabh Ratnakar return 0; 3563dcf7ebbaSPadmanabh Ratnakar 3564dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3565dcf7ebbaSPadmanabh Ratnakar 3566dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3567dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3568dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3569dcf7ebbaSPadmanabh Ratnakar goto err; 3570dcf7ebbaSPadmanabh Ratnakar } 3571dcf7ebbaSPadmanabh Ratnakar 3572dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3573dcf7ebbaSPadmanabh Ratnakar 3574dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3575dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3576dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3577dcf7ebbaSPadmanabh Ratnakar 3578dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3579dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3580dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3581dcf7ebbaSPadmanabh Ratnakar err: 3582dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3583dcf7ebbaSPadmanabh Ratnakar return status; 3584dcf7ebbaSPadmanabh Ratnakar } 3585dcf7ebbaSPadmanabh Ratnakar 358668c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 358768c45a2dSSomnath Kotur { 358868c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 358968c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 359068c45a2dSSomnath Kotur int status; 359168c45a2dSSomnath Kotur 359268c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 359368c45a2dSSomnath Kotur return -1; 359468c45a2dSSomnath Kotur 359568c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 359668c45a2dSSomnath Kotur 359768c45a2dSSomnath Kotur req = embedded_payload(wrb); 359868c45a2dSSomnath Kotur 359968c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 360068c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 360168c45a2dSSomnath Kotur wrb, NULL); 360268c45a2dSSomnath Kotur 360368c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 360468c45a2dSSomnath Kotur 360568c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 360668c45a2dSSomnath Kotur 360768c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 360868c45a2dSSomnath Kotur return status; 360968c45a2dSSomnath Kotur } 361068c45a2dSSomnath Kotur 36116a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 36126a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 36136a4ab669SParav Pandit { 36146a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 36156a4ab669SParav Pandit struct be_mcc_wrb *wrb; 36166a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 36176a4ab669SParav Pandit struct be_cmd_req_hdr *req; 36186a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 36196a4ab669SParav Pandit int status; 36206a4ab669SParav Pandit 36216a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 36226a4ab669SParav Pandit 36236a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 36246a4ab669SParav Pandit if (!wrb) { 36256a4ab669SParav Pandit status = -EBUSY; 36266a4ab669SParav Pandit goto err; 36276a4ab669SParav Pandit } 36286a4ab669SParav Pandit req = embedded_payload(wrb); 36296a4ab669SParav Pandit resp = embedded_payload(wrb); 36306a4ab669SParav Pandit 36316a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 36326a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 36336a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 36346a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 36356a4ab669SParav Pandit 36366a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 36376a4ab669SParav Pandit if (cmd_status) 36386a4ab669SParav Pandit *cmd_status = (status & 0xffff); 36396a4ab669SParav Pandit if (ext_status) 36406a4ab669SParav Pandit *ext_status = 0; 36416a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 36426a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 36436a4ab669SParav Pandit err: 36446a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 36456a4ab669SParav Pandit return status; 36466a4ab669SParav Pandit } 36476a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3648