19aebddd1SJeff Kirsher /* 27dfbe7d7SSomnath Kotur * Copyright (C) 2005 - 2016 Broadcom 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 2251d1f98aSAjit Khaparde char *be_misconfig_evt_port_state[] = { 2351d1f98aSAjit Khaparde "Physical Link is functional", 2451d1f98aSAjit Khaparde "Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replace.", 2551d1f98aSAjit Khaparde "Optics of two types installed – Remove one optic or install matching pair of optics.", 2651d1f98aSAjit Khaparde "Incompatible optics – Replace with compatible optics for card to function.", 2751d1f98aSAjit Khaparde "Unqualified optics – Replace with Avago optics for Warranty and Technical Support.", 2851d1f98aSAjit Khaparde "Uncertified optics – Replace with Avago-certified optics to enable link operation." 2921252377SVasundhara Volam }; 3021252377SVasundhara Volam 3151d1f98aSAjit Khaparde static char *be_port_misconfig_evt_severity[] = { 3251d1f98aSAjit Khaparde "KERN_WARN", 3351d1f98aSAjit Khaparde "KERN_INFO", 3451d1f98aSAjit Khaparde "KERN_ERR", 3551d1f98aSAjit Khaparde "KERN_WARN" 3651d1f98aSAjit Khaparde }; 3751d1f98aSAjit Khaparde 3851d1f98aSAjit Khaparde static char *phy_state_oper_desc[] = { 3951d1f98aSAjit Khaparde "Link is non-operational", 4051d1f98aSAjit Khaparde "Link is operational", 4121252377SVasundhara Volam "" 4221252377SVasundhara Volam }; 4321252377SVasundhara Volam 44f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 45f25b119cSPadmanabh Ratnakar { 46f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 47f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 48f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 49f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 50f25b119cSPadmanabh Ratnakar }, 51f25b119cSPadmanabh Ratnakar { 52f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 53f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 54f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 55f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 56f25b119cSPadmanabh Ratnakar }, 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 59f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 60f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 61f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 62f25b119cSPadmanabh Ratnakar }, 63f25b119cSPadmanabh Ratnakar { 64f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 65f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 66f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 67f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 68f25b119cSPadmanabh Ratnakar }, 69f25b119cSPadmanabh Ratnakar { 70f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 71f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 72f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 73f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 742e365b1bSSomnath Kotur }, 752e365b1bSSomnath Kotur { 762e365b1bSSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, 772e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 782e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 792e365b1bSSomnath Kotur }, 802e365b1bSSomnath Kotur { 812e365b1bSSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, 822e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 832e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 842e365b1bSSomnath Kotur }, 852e365b1bSSomnath Kotur { 862e365b1bSSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 872e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL, 882e365b1bSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 892e365b1bSSomnath Kotur }, 90884476beSSomnath Kotur { 91884476beSSomnath Kotur OPCODE_COMMON_SET_HSW_CONFIG, 92884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON, 93884476beSSomnath Kotur BE_PRIV_DEVCFG | BE_PRIV_VHADM 94884476beSSomnath Kotur }, 9562259ac4SSomnath Kotur { 9662259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 9762259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON, 9862259ac4SSomnath Kotur BE_PRIV_DEVCFG 9962259ac4SSomnath Kotur } 100f25b119cSPadmanabh Ratnakar }; 101f25b119cSPadmanabh Ratnakar 102a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 103f25b119cSPadmanabh Ratnakar { 104f25b119cSPadmanabh Ratnakar int i; 105f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 106f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 107f25b119cSPadmanabh Ratnakar 108f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 109f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 110f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 111f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 112f25b119cSPadmanabh Ratnakar return false; 113f25b119cSPadmanabh Ratnakar 114f25b119cSPadmanabh Ratnakar return true; 115f25b119cSPadmanabh Ratnakar } 116f25b119cSPadmanabh Ratnakar 1173de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 1183de09455SSomnath Kotur { 1193de09455SSomnath Kotur return wrb->payload.embedded_payload; 1203de09455SSomnath Kotur } 1219aebddd1SJeff Kirsher 122efaa408eSSuresh Reddy static int be_mcc_notify(struct be_adapter *adapter) 1239aebddd1SJeff Kirsher { 1249aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 1259aebddd1SJeff Kirsher u32 val = 0; 1269aebddd1SJeff Kirsher 127954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 128efaa408eSSuresh Reddy return -EIO; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 1319aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 1329aebddd1SJeff Kirsher 1339aebddd1SJeff Kirsher wmb(); 1349aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 135efaa408eSSuresh Reddy 136efaa408eSSuresh Reddy return 0; 1379aebddd1SJeff Kirsher } 1389aebddd1SJeff Kirsher 1399aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 1409aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 1419aebddd1SJeff Kirsher * little endian) */ 1429aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 1439aebddd1SJeff Kirsher { 1449e9ff4b7SSathya Perla u32 flags; 1459e9ff4b7SSathya Perla 1469aebddd1SJeff Kirsher if (compl->flags != 0) { 1479e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1489e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1499e9ff4b7SSathya Perla compl->flags = flags; 1509aebddd1SJeff Kirsher return true; 1519aebddd1SJeff Kirsher } 1529aebddd1SJeff Kirsher } 1539e9ff4b7SSathya Perla return false; 1549e9ff4b7SSathya Perla } 1559aebddd1SJeff Kirsher 1569aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1579aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1589aebddd1SJeff Kirsher { 1599aebddd1SJeff Kirsher compl->flags = 0; 1609aebddd1SJeff Kirsher } 1619aebddd1SJeff Kirsher 162652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 163652bf646SPadmanabh Ratnakar { 164652bf646SPadmanabh Ratnakar unsigned long addr; 165652bf646SPadmanabh Ratnakar 166652bf646SPadmanabh Ratnakar addr = tag1; 167652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 168652bf646SPadmanabh Ratnakar return (void *)addr; 169652bf646SPadmanabh Ratnakar } 170652bf646SPadmanabh Ratnakar 1714c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1724c60005fSKalesh AP { 1734c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1744c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1754c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 17677be8c1cSKalesh AP addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS || 1774c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1784c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1794c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1804c60005fSKalesh AP return true; 1814c60005fSKalesh AP else 1824c60005fSKalesh AP return false; 1834c60005fSKalesh AP } 1844c60005fSKalesh AP 185559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 186559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 187559b633fSSathya Perla */ 188559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 189559b633fSSathya Perla struct be_mcc_compl *compl, 190559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 191559b633fSSathya Perla { 192559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 193559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 194559b633fSSathya Perla 195559b633fSSathya Perla if (resp_hdr) { 196559b633fSSathya Perla opcode = resp_hdr->opcode; 197559b633fSSathya Perla subsystem = resp_hdr->subsystem; 198559b633fSSathya Perla } 199559b633fSSathya Perla 200559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 201559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 202559b633fSSathya Perla complete(&adapter->et_cmd_compl); 203559b633fSSathya Perla return; 204559b633fSSathya Perla } 205559b633fSSathya Perla 2069c855975SSuresh Reddy if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE && 2079c855975SSuresh Reddy subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 2089c855975SSuresh Reddy complete(&adapter->et_cmd_compl); 2099c855975SSuresh Reddy return; 2109c855975SSuresh Reddy } 2119c855975SSuresh Reddy 212559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 213559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 214559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 215559b633fSSathya Perla adapter->flash_status = compl->status; 216559b633fSSathya Perla complete(&adapter->et_cmd_compl); 217559b633fSSathya Perla return; 218559b633fSSathya Perla } 219559b633fSSathya Perla 220559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 221559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 222559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 223559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 224559b633fSSathya Perla be_parse_stats(adapter); 225559b633fSSathya Perla adapter->stats_cmd_sent = false; 226559b633fSSathya Perla return; 227559b633fSSathya Perla } 228559b633fSSathya Perla 229559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 230559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 231559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 232559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 233559b633fSSathya Perla (void *)resp_hdr; 23429e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 235559b633fSSathya Perla resp->on_die_temperature; 236559b633fSSathya Perla } else { 237559b633fSSathya Perla adapter->be_get_temp_freq = 0; 23829e9122bSVenkata Duvvuru adapter->hwmon_info.be_on_die_temp = 23929e9122bSVenkata Duvvuru BE_INVALID_DIE_TEMP; 240559b633fSSathya Perla } 241559b633fSSathya Perla return; 242559b633fSSathya Perla } 243559b633fSSathya Perla } 244559b633fSSathya Perla 2459aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 2469aebddd1SJeff Kirsher struct be_mcc_compl *compl) 2479aebddd1SJeff Kirsher { 2484c60005fSKalesh AP enum mcc_base_status base_status; 2494c60005fSKalesh AP enum mcc_addl_status addl_status; 250652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 251652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 2529aebddd1SJeff Kirsher 2539aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 2549aebddd1SJeff Kirsher * from mcc_wrb */ 2559aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 2569aebddd1SJeff Kirsher 2574c60005fSKalesh AP base_status = base_status(compl->status); 2584c60005fSKalesh AP addl_status = addl_status(compl->status); 25996c9b2e4SVasundhara Volam 260652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 261652bf646SPadmanabh Ratnakar if (resp_hdr) { 262652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 263652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 264652bf646SPadmanabh Ratnakar } 265652bf646SPadmanabh Ratnakar 266559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2675eeff635SSuresh Reddy 268559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 269559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 270fa5c867dSSuresh Reddy if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST || 271fa5c867dSSuresh Reddy addl_status == MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES) { 27297f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 273522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 27497f1d8cdSVasundhara Volam opcode, subsystem); 2759aebddd1SJeff Kirsher } else { 27697f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 27797f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2784c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2799aebddd1SJeff Kirsher } 2809aebddd1SJeff Kirsher } 2814c60005fSKalesh AP return compl->status; 2829aebddd1SJeff Kirsher } 2839aebddd1SJeff Kirsher 2849aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2859aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2863acf19d9SSathya Perla struct be_mcc_compl *compl) 2879aebddd1SJeff Kirsher { 2883acf19d9SSathya Perla struct be_async_event_link_state *evt = 2893acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2903acf19d9SSathya Perla 291b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 29242f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 293b236916aSAjit Khaparde 294bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 295bdce2ad7SSuresh Reddy * notification for physical and logical link. 296bdce2ad7SSuresh Reddy * On other chips just process the logical link 297bdce2ad7SSuresh Reddy * status notification 298bdce2ad7SSuresh Reddy */ 299bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 3002e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 3012e177a5cSPadmanabh Ratnakar return; 3022e177a5cSPadmanabh Ratnakar 303b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 304b236916aSAjit Khaparde * it may not be received in some cases. 305b236916aSAjit Khaparde */ 306b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 307bdce2ad7SSuresh Reddy be_link_status_update(adapter, 308bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 3099aebddd1SJeff Kirsher } 3109aebddd1SJeff Kirsher 31121252377SVasundhara Volam static void be_async_port_misconfig_event_process(struct be_adapter *adapter, 31221252377SVasundhara Volam struct be_mcc_compl *compl) 31321252377SVasundhara Volam { 31421252377SVasundhara Volam struct be_async_event_misconfig_port *evt = 31521252377SVasundhara Volam (struct be_async_event_misconfig_port *)compl; 31651d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word1 = le32_to_cpu(evt->event_data_word1); 31751d1f98aSAjit Khaparde u32 sfp_misconfig_evt_word2 = le32_to_cpu(evt->event_data_word2); 31851d1f98aSAjit Khaparde u8 phy_oper_state = PHY_STATE_OPER_MSG_NONE; 31921252377SVasundhara Volam struct device *dev = &adapter->pdev->dev; 32051d1f98aSAjit Khaparde u8 msg_severity = DEFAULT_MSG_SEVERITY; 32151d1f98aSAjit Khaparde u8 phy_state_info; 32251d1f98aSAjit Khaparde u8 new_phy_state; 32321252377SVasundhara Volam 32451d1f98aSAjit Khaparde new_phy_state = 32551d1f98aSAjit Khaparde (sfp_misconfig_evt_word1 >> (adapter->hba_port_num * 8)) & 0xff; 32621252377SVasundhara Volam 32751d1f98aSAjit Khaparde if (new_phy_state == adapter->phy_state) 32851d1f98aSAjit Khaparde return; 32951d1f98aSAjit Khaparde 33051d1f98aSAjit Khaparde adapter->phy_state = new_phy_state; 33151d1f98aSAjit Khaparde 33251d1f98aSAjit Khaparde /* for older fw that doesn't populate link effect data */ 33351d1f98aSAjit Khaparde if (!sfp_misconfig_evt_word2) 33451d1f98aSAjit Khaparde goto log_message; 33551d1f98aSAjit Khaparde 33651d1f98aSAjit Khaparde phy_state_info = 33751d1f98aSAjit Khaparde (sfp_misconfig_evt_word2 >> (adapter->hba_port_num * 8)) & 0xff; 33851d1f98aSAjit Khaparde 33951d1f98aSAjit Khaparde if (phy_state_info & PHY_STATE_INFO_VALID) { 34051d1f98aSAjit Khaparde msg_severity = (phy_state_info & PHY_STATE_MSG_SEVERITY) >> 1; 34151d1f98aSAjit Khaparde 34251d1f98aSAjit Khaparde if (be_phy_unqualified(new_phy_state)) 34351d1f98aSAjit Khaparde phy_oper_state = (phy_state_info & PHY_STATE_OPER); 34451d1f98aSAjit Khaparde } 34551d1f98aSAjit Khaparde 34651d1f98aSAjit Khaparde log_message: 34721252377SVasundhara Volam /* Log an error message that would allow a user to determine 34821252377SVasundhara Volam * whether the SFPs have an issue 34921252377SVasundhara Volam */ 35051d1f98aSAjit Khaparde if (be_phy_state_unknown(new_phy_state)) 35151d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35251d1f98aSAjit Khaparde "Port %c: Unrecognized Optics state: 0x%x. %s", 35351d1f98aSAjit Khaparde adapter->port_name, 35451d1f98aSAjit Khaparde new_phy_state, 35551d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 35651d1f98aSAjit Khaparde else 35751d1f98aSAjit Khaparde dev_printk(be_port_misconfig_evt_severity[msg_severity], dev, 35851d1f98aSAjit Khaparde "Port %c: %s %s", 35951d1f98aSAjit Khaparde adapter->port_name, 36051d1f98aSAjit Khaparde be_misconfig_evt_port_state[new_phy_state], 36151d1f98aSAjit Khaparde phy_state_oper_desc[phy_oper_state]); 36221252377SVasundhara Volam 36351d1f98aSAjit Khaparde /* Log Vendor name and part no. if a misconfigured SFP is detected */ 36451d1f98aSAjit Khaparde if (be_phy_misconfigured(new_phy_state)) 36551d1f98aSAjit Khaparde adapter->flags |= BE_FLAGS_PHY_MISCONFIGURED; 36621252377SVasundhara Volam } 36721252377SVasundhara Volam 3689aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 3699aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 3703acf19d9SSathya Perla struct be_mcc_compl *compl) 3719aebddd1SJeff Kirsher { 3723acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 3733acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 3743acf19d9SSathya Perla 3759aebddd1SJeff Kirsher if (evt->valid) { 3769aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 377fdf81bfbSSathya Perla adapter->recommended_prio_bits = 3789aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 3799aebddd1SJeff Kirsher } 3809aebddd1SJeff Kirsher } 3819aebddd1SJeff Kirsher 382323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 3839aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 3843acf19d9SSathya Perla struct be_mcc_compl *compl) 3859aebddd1SJeff Kirsher { 3863acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 3873acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 3883acf19d9SSathya Perla 389323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 390323ff71eSSathya Perla evt->physical_port == adapter->port_num) 391323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 3929aebddd1SJeff Kirsher } 3939aebddd1SJeff Kirsher 3949aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 3959aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 3963acf19d9SSathya Perla struct be_mcc_compl *compl) 3979aebddd1SJeff Kirsher { 3983acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 3993acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 4003acf19d9SSathya Perla 401bdac85b5SRavikumar Nelavelli if (evt->enabled) { 402939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 403bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 404bdac85b5SRavikumar Nelavelli } else { 4059aebddd1SJeff Kirsher adapter->pvid = 0; 4069aebddd1SJeff Kirsher } 407bdac85b5SRavikumar Nelavelli } 4089aebddd1SJeff Kirsher 409760c295eSVenkata Duvvuru #define MGMT_ENABLE_MASK 0x4 410760c295eSVenkata Duvvuru static void be_async_grp5_fw_control_process(struct be_adapter *adapter, 411760c295eSVenkata Duvvuru struct be_mcc_compl *compl) 412760c295eSVenkata Duvvuru { 413760c295eSVenkata Duvvuru struct be_async_fw_control *evt = (struct be_async_fw_control *)compl; 414760c295eSVenkata Duvvuru u32 evt_dw1 = le32_to_cpu(evt->event_data_word1); 415760c295eSVenkata Duvvuru 416760c295eSVenkata Duvvuru if (evt_dw1 & MGMT_ENABLE_MASK) { 417760c295eSVenkata Duvvuru adapter->flags |= BE_FLAGS_OS2BMC; 418760c295eSVenkata Duvvuru adapter->bmc_filt_mask = le32_to_cpu(evt->event_data_word2); 419760c295eSVenkata Duvvuru } else { 420760c295eSVenkata Duvvuru adapter->flags &= ~BE_FLAGS_OS2BMC; 421760c295eSVenkata Duvvuru } 422760c295eSVenkata Duvvuru } 423760c295eSVenkata Duvvuru 4249aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 4253acf19d9SSathya Perla struct be_mcc_compl *compl) 4269aebddd1SJeff Kirsher { 4273acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4283acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 4299aebddd1SJeff Kirsher 4309aebddd1SJeff Kirsher switch (event_type) { 4319aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 4323acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 4339aebddd1SJeff Kirsher break; 4349aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 4353acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 4369aebddd1SJeff Kirsher break; 4379aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 4383acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 4399aebddd1SJeff Kirsher break; 440760c295eSVenkata Duvvuru /* Async event to disable/enable os2bmc and/or mac-learning */ 441760c295eSVenkata Duvvuru case ASYNC_EVENT_FW_CONTROL: 442760c295eSVenkata Duvvuru be_async_grp5_fw_control_process(adapter, compl); 443760c295eSVenkata Duvvuru break; 4449aebddd1SJeff Kirsher default: 4459aebddd1SJeff Kirsher break; 4469aebddd1SJeff Kirsher } 4479aebddd1SJeff Kirsher } 4489aebddd1SJeff Kirsher 449bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 4503acf19d9SSathya Perla struct be_mcc_compl *cmp) 451bc0c3405SAjit Khaparde { 452bc0c3405SAjit Khaparde u8 event_type = 0; 453bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 454bc0c3405SAjit Khaparde 4553acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 4563acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 457bc0c3405SAjit Khaparde 458bc0c3405SAjit Khaparde switch (event_type) { 459bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 460bc0c3405SAjit Khaparde if (evt->valid) 461bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 462bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 463bc0c3405SAjit Khaparde break; 464bc0c3405SAjit Khaparde default: 46505ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 46605ccaa2bSVasundhara Volam event_type); 467bc0c3405SAjit Khaparde break; 468bc0c3405SAjit Khaparde } 469bc0c3405SAjit Khaparde } 470bc0c3405SAjit Khaparde 47121252377SVasundhara Volam static void be_async_sliport_evt_process(struct be_adapter *adapter, 47221252377SVasundhara Volam struct be_mcc_compl *cmp) 47321252377SVasundhara Volam { 47421252377SVasundhara Volam u8 event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 47521252377SVasundhara Volam ASYNC_EVENT_TYPE_MASK; 47621252377SVasundhara Volam 47721252377SVasundhara Volam if (event_type == ASYNC_EVENT_PORT_MISCONFIG) 47821252377SVasundhara Volam be_async_port_misconfig_event_process(adapter, cmp); 47921252377SVasundhara Volam } 48021252377SVasundhara Volam 4813acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 4829aebddd1SJeff Kirsher { 4833acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4849aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 4859aebddd1SJeff Kirsher } 4869aebddd1SJeff Kirsher 4873acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 4889aebddd1SJeff Kirsher { 4893acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4903acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 4919aebddd1SJeff Kirsher } 4929aebddd1SJeff Kirsher 4933acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 494bc0c3405SAjit Khaparde { 4953acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 4963acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 4973acf19d9SSathya Perla } 4983acf19d9SSathya Perla 49921252377SVasundhara Volam static inline bool is_sliport_evt(u32 flags) 50021252377SVasundhara Volam { 50121252377SVasundhara Volam return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 50221252377SVasundhara Volam ASYNC_EVENT_CODE_SLIPORT; 50321252377SVasundhara Volam } 50421252377SVasundhara Volam 5053acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 5063acf19d9SSathya Perla struct be_mcc_compl *compl) 5073acf19d9SSathya Perla { 5083acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 5093acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 5103acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 5113acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 5123acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 5133acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 51421252377SVasundhara Volam else if (is_sliport_evt(compl->flags)) 51521252377SVasundhara Volam be_async_sliport_evt_process(adapter, compl); 516bc0c3405SAjit Khaparde } 517bc0c3405SAjit Khaparde 5189aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 5199aebddd1SJeff Kirsher { 5209aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 5219aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 5229aebddd1SJeff Kirsher 5239aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5249aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 5259aebddd1SJeff Kirsher return compl; 5269aebddd1SJeff Kirsher } 5279aebddd1SJeff Kirsher return NULL; 5289aebddd1SJeff Kirsher } 5299aebddd1SJeff Kirsher 5309aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 5319aebddd1SJeff Kirsher { 5329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 5339aebddd1SJeff Kirsher 5349aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 5359aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 5369aebddd1SJeff Kirsher 5379aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 5389aebddd1SJeff Kirsher } 5399aebddd1SJeff Kirsher 5409aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 5419aebddd1SJeff Kirsher { 542a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 543a323d9bfSSathya Perla 5449aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 545a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 546a323d9bfSSathya Perla 547a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 5489aebddd1SJeff Kirsher } 5499aebddd1SJeff Kirsher 55010ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 5519aebddd1SJeff Kirsher { 5529aebddd1SJeff Kirsher struct be_mcc_compl *compl; 55310ef9ab4SSathya Perla int num = 0, status = 0; 5549aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5559aebddd1SJeff Kirsher 556072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 5573acf19d9SSathya Perla 5589aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 5599aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 5603acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 5619aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 56210ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 5639aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 5649aebddd1SJeff Kirsher } 5659aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5669aebddd1SJeff Kirsher num++; 5679aebddd1SJeff Kirsher } 5689aebddd1SJeff Kirsher 56910ef9ab4SSathya Perla if (num) 57010ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 57110ef9ab4SSathya Perla 572072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 57310ef9ab4SSathya Perla return status; 5749aebddd1SJeff Kirsher } 5759aebddd1SJeff Kirsher 5769aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 5779aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 5789aebddd1SJeff Kirsher { 579b7172414SSathya Perla #define mcc_timeout 12000 /* 12s timeout */ 58010ef9ab4SSathya Perla int i, status = 0; 5819aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 5829aebddd1SJeff Kirsher 5836589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 584954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 5859aebddd1SJeff Kirsher return -EIO; 5869aebddd1SJeff Kirsher 587072a9c48SAmerigo Wang local_bh_disable(); 58810ef9ab4SSathya Perla status = be_process_mcc(adapter); 589072a9c48SAmerigo Wang local_bh_enable(); 5909aebddd1SJeff Kirsher 5919aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 5929aebddd1SJeff Kirsher break; 593b7172414SSathya Perla usleep_range(500, 1000); 5949aebddd1SJeff Kirsher } 5959aebddd1SJeff Kirsher if (i == mcc_timeout) { 5966589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 597954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 598652bf646SPadmanabh Ratnakar return -EIO; 5999aebddd1SJeff Kirsher } 6009aebddd1SJeff Kirsher return status; 6019aebddd1SJeff Kirsher } 6029aebddd1SJeff Kirsher 6039aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 6049aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 6059aebddd1SJeff Kirsher { 606652bf646SPadmanabh Ratnakar int status; 607652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 608652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 609b0fd2eb2Sajit.khaparde@broadcom.com u32 index = mcc_obj->q.head; 610652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 611652bf646SPadmanabh Ratnakar 612652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 613652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 614652bf646SPadmanabh Ratnakar 615652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 616652bf646SPadmanabh Ratnakar 617efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 618efaa408eSSuresh Reddy if (status) 619efaa408eSSuresh Reddy goto out; 620652bf646SPadmanabh Ratnakar 621652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 622652bf646SPadmanabh Ratnakar if (status == -EIO) 623652bf646SPadmanabh Ratnakar goto out; 624652bf646SPadmanabh Ratnakar 6254c60005fSKalesh AP status = (resp->base_status | 6264c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 6274c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 628652bf646SPadmanabh Ratnakar out: 629652bf646SPadmanabh Ratnakar return status; 6309aebddd1SJeff Kirsher } 6319aebddd1SJeff Kirsher 6329aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 6339aebddd1SJeff Kirsher { 6349aebddd1SJeff Kirsher int msecs = 0; 6359aebddd1SJeff Kirsher u32 ready; 6369aebddd1SJeff Kirsher 6376589ade0SSathya Perla do { 638954f6825SVenkata Duvvuru if (be_check_error(adapter, BE_ERROR_ANY)) 6399aebddd1SJeff Kirsher return -EIO; 6409aebddd1SJeff Kirsher 6419aebddd1SJeff Kirsher ready = ioread32(db); 642434b3648SSathya Perla if (ready == 0xffffffff) 6439aebddd1SJeff Kirsher return -1; 6449aebddd1SJeff Kirsher 6459aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 6469aebddd1SJeff Kirsher if (ready) 6479aebddd1SJeff Kirsher break; 6489aebddd1SJeff Kirsher 6499aebddd1SJeff Kirsher if (msecs > 4000) { 6506589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 651954f6825SVenkata Duvvuru be_set_error(adapter, BE_ERROR_FW); 652f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 6539aebddd1SJeff Kirsher return -1; 6549aebddd1SJeff Kirsher } 6559aebddd1SJeff Kirsher 6569aebddd1SJeff Kirsher msleep(1); 6579aebddd1SJeff Kirsher msecs++; 6589aebddd1SJeff Kirsher } while (true); 6599aebddd1SJeff Kirsher 6609aebddd1SJeff Kirsher return 0; 6619aebddd1SJeff Kirsher } 6629aebddd1SJeff Kirsher 6639aebddd1SJeff Kirsher /* 6649aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 6659aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 6669aebddd1SJeff Kirsher */ 6679aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 6689aebddd1SJeff Kirsher { 6699aebddd1SJeff Kirsher int status; 6709aebddd1SJeff Kirsher u32 val = 0; 6719aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 6729aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6739aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 6749aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 6759aebddd1SJeff Kirsher 6769aebddd1SJeff Kirsher /* wait for ready to be set */ 6779aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6789aebddd1SJeff Kirsher if (status != 0) 6799aebddd1SJeff Kirsher return status; 6809aebddd1SJeff Kirsher 6819aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 6829aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 6839aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 6849aebddd1SJeff Kirsher iowrite32(val, db); 6859aebddd1SJeff Kirsher 6869aebddd1SJeff Kirsher /* wait for ready to be set */ 6879aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6889aebddd1SJeff Kirsher if (status != 0) 6899aebddd1SJeff Kirsher return status; 6909aebddd1SJeff Kirsher 6919aebddd1SJeff Kirsher val = 0; 6929aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 6939aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 6949aebddd1SJeff Kirsher iowrite32(val, db); 6959aebddd1SJeff Kirsher 6969aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 6979aebddd1SJeff Kirsher if (status != 0) 6989aebddd1SJeff Kirsher return status; 6999aebddd1SJeff Kirsher 7009aebddd1SJeff Kirsher /* A cq entry has been made now */ 7019aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 7029aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 7039aebddd1SJeff Kirsher be_mcc_compl_use(compl); 7049aebddd1SJeff Kirsher if (status) 7059aebddd1SJeff Kirsher return status; 7069aebddd1SJeff Kirsher } else { 7079aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 7089aebddd1SJeff Kirsher return -1; 7099aebddd1SJeff Kirsher } 7109aebddd1SJeff Kirsher return 0; 7119aebddd1SJeff Kirsher } 7129aebddd1SJeff Kirsher 713710f3e59SSriharsha Basavapatna u16 be_POST_stage_get(struct be_adapter *adapter) 7149aebddd1SJeff Kirsher { 7159aebddd1SJeff Kirsher u32 sem; 7169aebddd1SJeff Kirsher 717c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 718c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 7199aebddd1SJeff Kirsher else 720c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 721c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 722c5b3ad4cSSathya Perla 723c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 7249aebddd1SJeff Kirsher } 7259aebddd1SJeff Kirsher 72687f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 727bf99e50dSPadmanabh Ratnakar { 728bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 729bf99e50dSPadmanabh Ratnakar u32 sliport_status; 730e673244aSKalesh AP int i; 731bf99e50dSPadmanabh Ratnakar 732bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 733bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 734bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 7359fa465c0SSathya Perla return 0; 7369fa465c0SSathya Perla 7379fa465c0SSathya Perla if (sliport_status & SLIPORT_STATUS_ERR_MASK && 7389fa465c0SSathya Perla !(sliport_status & SLIPORT_STATUS_RN_MASK)) 7399fa465c0SSathya Perla return -EIO; 740bf99e50dSPadmanabh Ratnakar 741bf99e50dSPadmanabh Ratnakar msleep(1000); 742bf99e50dSPadmanabh Ratnakar } 743bf99e50dSPadmanabh Ratnakar 744e673244aSKalesh AP return sliport_status ? : -1; 745bf99e50dSPadmanabh Ratnakar } 746bf99e50dSPadmanabh Ratnakar 747bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 7489aebddd1SJeff Kirsher { 7499aebddd1SJeff Kirsher u16 stage; 7509aebddd1SJeff Kirsher int status, timeout = 0; 7519aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 7529aebddd1SJeff Kirsher 753bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 754bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 755e673244aSKalesh AP if (status) { 756e673244aSKalesh AP stage = status; 757e673244aSKalesh AP goto err; 758e673244aSKalesh AP } 759e673244aSKalesh AP return 0; 760bf99e50dSPadmanabh Ratnakar } 761bf99e50dSPadmanabh Ratnakar 7629aebddd1SJeff Kirsher do { 763ca3de6b2SSathya Perla /* There's no means to poll POST state on BE2/3 VFs */ 764ca3de6b2SSathya Perla if (BEx_chip(adapter) && be_virtfn(adapter)) 765ca3de6b2SSathya Perla return 0; 766ca3de6b2SSathya Perla 767c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 76866d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 76966d29cbcSGavin Shan return 0; 77066d29cbcSGavin Shan 771a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 7729aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 7739aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 7749aebddd1SJeff Kirsher return -EINTR; 7759aebddd1SJeff Kirsher } 7769aebddd1SJeff Kirsher timeout += 2; 7773ab81b5fSSomnath Kotur } while (timeout < 60); 7789aebddd1SJeff Kirsher 779e673244aSKalesh AP err: 780e673244aSKalesh AP dev_err(dev, "POST timeout; stage=%#x\n", stage); 7819fa465c0SSathya Perla return -ETIMEDOUT; 7829aebddd1SJeff Kirsher } 7839aebddd1SJeff Kirsher 7849aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 7859aebddd1SJeff Kirsher { 7869aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 7879aebddd1SJeff Kirsher } 7889aebddd1SJeff Kirsher 789a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 790bea50988SSathya Perla { 791bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 792bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 793bea50988SSathya Perla } 7949aebddd1SJeff Kirsher 7959aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 796106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 797106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 798106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 799a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 800a2cc4e0bSSathya Perla struct be_dma_mem *mem) 8019aebddd1SJeff Kirsher { 802106df1e3SSomnath Kotur struct be_sge *sge; 803106df1e3SSomnath Kotur 8049aebddd1SJeff Kirsher req_hdr->opcode = opcode; 8059aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 8069aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 8079aebddd1SJeff Kirsher req_hdr->version = 0; 808bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 809106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 810106df1e3SSomnath Kotur if (mem) { 811106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 812106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 813106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 814106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 815106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 816106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 817106df1e3SSomnath Kotur } else 818106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 819106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 8209aebddd1SJeff Kirsher } 8219aebddd1SJeff Kirsher 8229aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 8239aebddd1SJeff Kirsher struct be_dma_mem *mem) 8249aebddd1SJeff Kirsher { 8259aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 8269aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 8279aebddd1SJeff Kirsher 8289aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 8299aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 8309aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 8319aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 8329aebddd1SJeff Kirsher } 8339aebddd1SJeff Kirsher } 8349aebddd1SJeff Kirsher 8359aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 8369aebddd1SJeff Kirsher { 8379aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 8389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 8399aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 8409aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8419aebddd1SJeff Kirsher return wrb; 8429aebddd1SJeff Kirsher } 8439aebddd1SJeff Kirsher 8449aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 8459aebddd1SJeff Kirsher { 8469aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 8479aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8489aebddd1SJeff Kirsher 849aa790db9SPadmanabh Ratnakar if (!mccq->created) 850aa790db9SPadmanabh Ratnakar return NULL; 851aa790db9SPadmanabh Ratnakar 8524d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 8539aebddd1SJeff Kirsher return NULL; 8549aebddd1SJeff Kirsher 8559aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 8569aebddd1SJeff Kirsher queue_head_inc(mccq); 8579aebddd1SJeff Kirsher atomic_inc(&mccq->used); 8589aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 8599aebddd1SJeff Kirsher return wrb; 8609aebddd1SJeff Kirsher } 8619aebddd1SJeff Kirsher 862bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 863bea50988SSathya Perla { 864bea50988SSathya Perla return adapter->mcc_obj.q.created; 865bea50988SSathya Perla } 866bea50988SSathya Perla 867bea50988SSathya Perla /* Must be used only in process context */ 868bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 869bea50988SSathya Perla { 870bea50988SSathya Perla if (use_mcc(adapter)) { 871b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 872bea50988SSathya Perla return 0; 873bea50988SSathya Perla } else { 874bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 875bea50988SSathya Perla } 876bea50988SSathya Perla } 877bea50988SSathya Perla 878bea50988SSathya Perla /* Must be used only in process context */ 879bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 880bea50988SSathya Perla { 881bea50988SSathya Perla if (use_mcc(adapter)) 882b7172414SSathya Perla return mutex_unlock(&adapter->mcc_lock); 883bea50988SSathya Perla else 884bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 885bea50988SSathya Perla } 886bea50988SSathya Perla 887bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 888bea50988SSathya Perla struct be_mcc_wrb *wrb) 889bea50988SSathya Perla { 890bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 891bea50988SSathya Perla 892bea50988SSathya Perla if (use_mcc(adapter)) { 893bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 894bea50988SSathya Perla if (!dest_wrb) 895bea50988SSathya Perla return NULL; 896bea50988SSathya Perla } else { 897bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 898bea50988SSathya Perla } 899bea50988SSathya Perla 900bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 901bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 902bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 903bea50988SSathya Perla 904bea50988SSathya Perla return dest_wrb; 905bea50988SSathya Perla } 906bea50988SSathya Perla 907bea50988SSathya Perla /* Must be used only in process context */ 908bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 909bea50988SSathya Perla struct be_mcc_wrb *wrb) 910bea50988SSathya Perla { 911bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 912bea50988SSathya Perla int status; 913bea50988SSathya Perla 914bea50988SSathya Perla status = be_cmd_lock(adapter); 915bea50988SSathya Perla if (status) 916bea50988SSathya Perla return status; 917bea50988SSathya Perla 918bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 9190c884567SSuresh Reddy if (!dest_wrb) { 9200c884567SSuresh Reddy status = -EBUSY; 9210c884567SSuresh Reddy goto unlock; 9220c884567SSuresh Reddy } 923bea50988SSathya Perla 924bea50988SSathya Perla if (use_mcc(adapter)) 925bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 926bea50988SSathya Perla else 927bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 928bea50988SSathya Perla 929bea50988SSathya Perla if (!status) 930bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 931bea50988SSathya Perla 9320c884567SSuresh Reddy unlock: 933bea50988SSathya Perla be_cmd_unlock(adapter); 934bea50988SSathya Perla return status; 935bea50988SSathya Perla } 936bea50988SSathya Perla 9379aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 9389aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9399aebddd1SJeff Kirsher */ 9409aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 9419aebddd1SJeff Kirsher { 9429aebddd1SJeff Kirsher u8 *wrb; 9439aebddd1SJeff Kirsher int status; 9449aebddd1SJeff Kirsher 945bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 946bf99e50dSPadmanabh Ratnakar return 0; 947bf99e50dSPadmanabh Ratnakar 9489aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9499aebddd1SJeff Kirsher return -1; 9509aebddd1SJeff Kirsher 9519aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9529aebddd1SJeff Kirsher *wrb++ = 0xFF; 9539aebddd1SJeff Kirsher *wrb++ = 0x12; 9549aebddd1SJeff Kirsher *wrb++ = 0x34; 9559aebddd1SJeff Kirsher *wrb++ = 0xFF; 9569aebddd1SJeff Kirsher *wrb++ = 0xFF; 9579aebddd1SJeff Kirsher *wrb++ = 0x56; 9589aebddd1SJeff Kirsher *wrb++ = 0x78; 9599aebddd1SJeff Kirsher *wrb = 0xFF; 9609aebddd1SJeff Kirsher 9619aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9629aebddd1SJeff Kirsher 9639aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9649aebddd1SJeff Kirsher return status; 9659aebddd1SJeff Kirsher } 9669aebddd1SJeff Kirsher 9679aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 9689aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 9699aebddd1SJeff Kirsher */ 9709aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 9719aebddd1SJeff Kirsher { 9729aebddd1SJeff Kirsher u8 *wrb; 9739aebddd1SJeff Kirsher int status; 9749aebddd1SJeff Kirsher 975bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 976bf99e50dSPadmanabh Ratnakar return 0; 977bf99e50dSPadmanabh Ratnakar 9789aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9799aebddd1SJeff Kirsher return -1; 9809aebddd1SJeff Kirsher 9819aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 9829aebddd1SJeff Kirsher *wrb++ = 0xFF; 9839aebddd1SJeff Kirsher *wrb++ = 0xAA; 9849aebddd1SJeff Kirsher *wrb++ = 0xBB; 9859aebddd1SJeff Kirsher *wrb++ = 0xFF; 9869aebddd1SJeff Kirsher *wrb++ = 0xFF; 9879aebddd1SJeff Kirsher *wrb++ = 0xCC; 9889aebddd1SJeff Kirsher *wrb++ = 0xDD; 9899aebddd1SJeff Kirsher *wrb = 0xFF; 9909aebddd1SJeff Kirsher 9919aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9929aebddd1SJeff Kirsher 9939aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9949aebddd1SJeff Kirsher return status; 9959aebddd1SJeff Kirsher } 996bf99e50dSPadmanabh Ratnakar 997f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 9989aebddd1SJeff Kirsher { 9999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10009aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 1001f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 1002f2f781a7SSathya Perla int status, ver = 0; 10039aebddd1SJeff Kirsher 10049aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10059aebddd1SJeff Kirsher return -1; 10069aebddd1SJeff Kirsher 10079aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10089aebddd1SJeff Kirsher req = embedded_payload(wrb); 10099aebddd1SJeff Kirsher 1010106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1011a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 1012a2cc4e0bSSathya Perla NULL); 10139aebddd1SJeff Kirsher 1014f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 1015f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 1016f2f781a7SSathya Perla ver = 2; 1017f2f781a7SSathya Perla 1018f2f781a7SSathya Perla req->hdr.version = ver; 10199aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10209aebddd1SJeff Kirsher 10219aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 10229aebddd1SJeff Kirsher /* 4byte eqe*/ 10239aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 10249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 1025f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 10269aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 10279aebddd1SJeff Kirsher 10289aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10299aebddd1SJeff Kirsher 10309aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10319aebddd1SJeff Kirsher if (!status) { 10329aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 103303d28ffeSKalesh AP 1034f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 1035f2f781a7SSathya Perla eqo->msix_idx = 1036f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 1037f2f781a7SSathya Perla eqo->q.created = true; 10389aebddd1SJeff Kirsher } 10399aebddd1SJeff Kirsher 10409aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10419aebddd1SJeff Kirsher return status; 10429aebddd1SJeff Kirsher } 10439aebddd1SJeff Kirsher 1044f9449ab7SSathya Perla /* Use MCC */ 10459aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 10465ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 10479aebddd1SJeff Kirsher { 10489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10499aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 10509aebddd1SJeff Kirsher int status; 10519aebddd1SJeff Kirsher 1052b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10539aebddd1SJeff Kirsher 1054f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1055f9449ab7SSathya Perla if (!wrb) { 1056f9449ab7SSathya Perla status = -EBUSY; 1057f9449ab7SSathya Perla goto err; 1058f9449ab7SSathya Perla } 10599aebddd1SJeff Kirsher req = embedded_payload(wrb); 10609aebddd1SJeff Kirsher 1061106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1062a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 1063a2cc4e0bSSathya Perla NULL); 10645ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 10659aebddd1SJeff Kirsher if (permanent) { 10669aebddd1SJeff Kirsher req->permanent = 1; 10679aebddd1SJeff Kirsher } else { 10689aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 1069590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 10709aebddd1SJeff Kirsher req->permanent = 0; 10719aebddd1SJeff Kirsher } 10729aebddd1SJeff Kirsher 1073f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 10749aebddd1SJeff Kirsher if (!status) { 10759aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 107603d28ffeSKalesh AP 10779aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 10789aebddd1SJeff Kirsher } 10799aebddd1SJeff Kirsher 1080f9449ab7SSathya Perla err: 1081b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 10829aebddd1SJeff Kirsher return status; 10839aebddd1SJeff Kirsher } 10849aebddd1SJeff Kirsher 10859aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 10869aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 10879aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 10889aebddd1SJeff Kirsher { 10899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10909aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 10919aebddd1SJeff Kirsher int status; 10929aebddd1SJeff Kirsher 1093b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 10949aebddd1SJeff Kirsher 10959aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10969aebddd1SJeff Kirsher if (!wrb) { 10979aebddd1SJeff Kirsher status = -EBUSY; 10989aebddd1SJeff Kirsher goto err; 10999aebddd1SJeff Kirsher } 11009aebddd1SJeff Kirsher req = embedded_payload(wrb); 11019aebddd1SJeff Kirsher 1102106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1103a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 1104a2cc4e0bSSathya Perla NULL); 11059aebddd1SJeff Kirsher 11069aebddd1SJeff Kirsher req->hdr.domain = domain; 11079aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11089aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 11099aebddd1SJeff Kirsher 11109aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11119aebddd1SJeff Kirsher if (!status) { 11129aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 111303d28ffeSKalesh AP 11149aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 11159aebddd1SJeff Kirsher } 11169aebddd1SJeff Kirsher 11179aebddd1SJeff Kirsher err: 1118b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1119e3a7ae2cSSomnath Kotur 1120e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 1121e3a7ae2cSSomnath Kotur status = -EPERM; 1122e3a7ae2cSSomnath Kotur 11239aebddd1SJeff Kirsher return status; 11249aebddd1SJeff Kirsher } 11259aebddd1SJeff Kirsher 11269aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 112730128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 11289aebddd1SJeff Kirsher { 11299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11309aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 11319aebddd1SJeff Kirsher int status; 11329aebddd1SJeff Kirsher 113330128031SSathya Perla if (pmac_id == -1) 113430128031SSathya Perla return 0; 113530128031SSathya Perla 1136b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 11379aebddd1SJeff Kirsher 11389aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11399aebddd1SJeff Kirsher if (!wrb) { 11409aebddd1SJeff Kirsher status = -EBUSY; 11419aebddd1SJeff Kirsher goto err; 11429aebddd1SJeff Kirsher } 11439aebddd1SJeff Kirsher req = embedded_payload(wrb); 11449aebddd1SJeff Kirsher 1145106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1146cd3307aaSKalesh AP OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), 1147cd3307aaSKalesh AP wrb, NULL); 11489aebddd1SJeff Kirsher 11499aebddd1SJeff Kirsher req->hdr.domain = dom; 11509aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 11519aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 11529aebddd1SJeff Kirsher 11539aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11549aebddd1SJeff Kirsher 11559aebddd1SJeff Kirsher err: 1156b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 11579aebddd1SJeff Kirsher return status; 11589aebddd1SJeff Kirsher } 11599aebddd1SJeff Kirsher 11609aebddd1SJeff Kirsher /* Uses Mbox */ 116110ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 116210ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 11639aebddd1SJeff Kirsher { 11649aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11659aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 11669aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 11679aebddd1SJeff Kirsher void *ctxt; 11689aebddd1SJeff Kirsher int status; 11699aebddd1SJeff Kirsher 11709aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11719aebddd1SJeff Kirsher return -1; 11729aebddd1SJeff Kirsher 11739aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11749aebddd1SJeff Kirsher req = embedded_payload(wrb); 11759aebddd1SJeff Kirsher ctxt = &req->context; 11769aebddd1SJeff Kirsher 1177106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1178a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1179a2cc4e0bSSathya Perla NULL); 11809aebddd1SJeff Kirsher 11819aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1182bbdc42f8SAjit Khaparde 1183bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 11849aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 11859aebddd1SJeff Kirsher coalesce_wm); 11869aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 11879aebddd1SJeff Kirsher ctxt, no_delay); 11889aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 11899aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 11909aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 11919aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 11929aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1193bbdc42f8SAjit Khaparde } else { 1194bbdc42f8SAjit Khaparde req->hdr.version = 2; 1195bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 119609e83a9dSAjit Khaparde 119709e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 119809e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 119909e83a9dSAjit Khaparde */ 120009e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 120109e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 120209e83a9dSAjit Khaparde ctxt, coalesce_wm); 1203bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1204bbdc42f8SAjit Khaparde no_delay); 1205bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1206bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1207bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1208a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1209a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 12109aebddd1SJeff Kirsher } 12119aebddd1SJeff Kirsher 12129aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12139aebddd1SJeff Kirsher 12149aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12159aebddd1SJeff Kirsher 12169aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12179aebddd1SJeff Kirsher if (!status) { 12189aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 121903d28ffeSKalesh AP 12209aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 12219aebddd1SJeff Kirsher cq->created = true; 12229aebddd1SJeff Kirsher } 12239aebddd1SJeff Kirsher 12249aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12259aebddd1SJeff Kirsher 12269aebddd1SJeff Kirsher return status; 12279aebddd1SJeff Kirsher } 12289aebddd1SJeff Kirsher 12299aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 12309aebddd1SJeff Kirsher { 12319aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 123203d28ffeSKalesh AP 12339aebddd1SJeff Kirsher if (len_encoded == 16) 12349aebddd1SJeff Kirsher len_encoded = 0; 12359aebddd1SJeff Kirsher return len_encoded; 12369aebddd1SJeff Kirsher } 12379aebddd1SJeff Kirsher 12384188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 12399aebddd1SJeff Kirsher struct be_queue_info *mccq, 12409aebddd1SJeff Kirsher struct be_queue_info *cq) 12419aebddd1SJeff Kirsher { 12429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12439aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 12449aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 12459aebddd1SJeff Kirsher void *ctxt; 12469aebddd1SJeff Kirsher int status; 12479aebddd1SJeff Kirsher 12489aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12499aebddd1SJeff Kirsher return -1; 12509aebddd1SJeff Kirsher 12519aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12529aebddd1SJeff Kirsher req = embedded_payload(wrb); 12539aebddd1SJeff Kirsher ctxt = &req->context; 12549aebddd1SJeff Kirsher 1255106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1256a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1257a2cc4e0bSSathya Perla NULL); 12589aebddd1SJeff Kirsher 12599aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1260666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 12619aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12629aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12639aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12649aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1265666d39c7SVasundhara Volam } else { 1266666d39c7SVasundhara Volam req->hdr.version = 1; 1267666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1268666d39c7SVasundhara Volam 1269666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1270666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1271666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1272666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1273666d39c7SVasundhara Volam ctxt, cq->id); 1274666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1275666d39c7SVasundhara Volam ctxt, 1); 12769aebddd1SJeff Kirsher } 12779aebddd1SJeff Kirsher 127821252377SVasundhara Volam /* Subscribe to Link State, Sliport Event and Group 5 Events 127921252377SVasundhara Volam * (bits 1, 5 and 17 set) 128021252377SVasundhara Volam */ 128121252377SVasundhara Volam req->async_event_bitmap[0] = 128221252377SVasundhara Volam cpu_to_le32(BIT(ASYNC_EVENT_CODE_LINK_STATE) | 128321252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_GRP_5) | 128421252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_QNQ) | 128521252377SVasundhara Volam BIT(ASYNC_EVENT_CODE_SLIPORT)); 128621252377SVasundhara Volam 12879aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12909aebddd1SJeff Kirsher 12919aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12929aebddd1SJeff Kirsher if (!status) { 12939aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 129403d28ffeSKalesh AP 12959aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12969aebddd1SJeff Kirsher mccq->created = true; 12979aebddd1SJeff Kirsher } 12989aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12999aebddd1SJeff Kirsher 13009aebddd1SJeff Kirsher return status; 13019aebddd1SJeff Kirsher } 13029aebddd1SJeff Kirsher 13034188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 13049aebddd1SJeff Kirsher struct be_queue_info *mccq, 13059aebddd1SJeff Kirsher struct be_queue_info *cq) 13069aebddd1SJeff Kirsher { 13079aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13089aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 13099aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 13109aebddd1SJeff Kirsher void *ctxt; 13119aebddd1SJeff Kirsher int status; 13129aebddd1SJeff Kirsher 13139aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13149aebddd1SJeff Kirsher return -1; 13159aebddd1SJeff Kirsher 13169aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13179aebddd1SJeff Kirsher req = embedded_payload(wrb); 13189aebddd1SJeff Kirsher ctxt = &req->context; 13199aebddd1SJeff Kirsher 1320106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1321a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1322a2cc4e0bSSathya Perla NULL); 13239aebddd1SJeff Kirsher 13249aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 13259aebddd1SJeff Kirsher 13269aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 13279aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 13289aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 13299aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 13309aebddd1SJeff Kirsher 13319aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 13329aebddd1SJeff Kirsher 13339aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13349aebddd1SJeff Kirsher 13359aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13369aebddd1SJeff Kirsher if (!status) { 13379aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 133803d28ffeSKalesh AP 13399aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 13409aebddd1SJeff Kirsher mccq->created = true; 13419aebddd1SJeff Kirsher } 13429aebddd1SJeff Kirsher 13439aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13449aebddd1SJeff Kirsher return status; 13459aebddd1SJeff Kirsher } 13469aebddd1SJeff Kirsher 13479aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1348a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 13499aebddd1SJeff Kirsher { 13509aebddd1SJeff Kirsher int status; 13519aebddd1SJeff Kirsher 13529aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1353666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 13549aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 13559aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 13569aebddd1SJeff Kirsher "and FCoE traffic"); 13579aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 13589aebddd1SJeff Kirsher } 13599aebddd1SJeff Kirsher return status; 13609aebddd1SJeff Kirsher } 13619aebddd1SJeff Kirsher 136294d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 13639aebddd1SJeff Kirsher { 13647707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 13659aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 136694d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 136794d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 13689aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 136994d73aaaSVasundhara Volam int status, ver = 0; 13709aebddd1SJeff Kirsher 13717707133cSSathya Perla req = embedded_payload(&wrb); 1372106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 13737707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 13749aebddd1SJeff Kirsher 13759aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 13769aebddd1SJeff Kirsher req->hdr.version = 1; 137794d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 137894d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 137994d73aaaSVasundhara Volam req->hdr.version = 2; 138094d73aaaSVasundhara Volam } else { /* For SH */ 138194d73aaaSVasundhara Volam req->hdr.version = 2; 13829aebddd1SJeff Kirsher } 13839aebddd1SJeff Kirsher 138481b02655SVasundhara Volam if (req->hdr.version > 0) 138581b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 13869aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 13879aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 13889aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 138994d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 139094d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 13919aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 139294d73aaaSVasundhara Volam ver = req->hdr.version; 139394d73aaaSVasundhara Volam 13947707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13959aebddd1SJeff Kirsher if (!status) { 13967707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 139703d28ffeSKalesh AP 13989aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 139994d73aaaSVasundhara Volam if (ver == 2) 140094d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 140194d73aaaSVasundhara Volam else 140294d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 14039aebddd1SJeff Kirsher txq->created = true; 14049aebddd1SJeff Kirsher } 14059aebddd1SJeff Kirsher 14069aebddd1SJeff Kirsher return status; 14079aebddd1SJeff Kirsher } 14089aebddd1SJeff Kirsher 14099aebddd1SJeff Kirsher /* Uses MCC */ 14109aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 14119aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 141210ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 14139aebddd1SJeff Kirsher { 14149aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14159aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 14169aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 14179aebddd1SJeff Kirsher int status; 14189aebddd1SJeff Kirsher 1419b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 14209aebddd1SJeff Kirsher 14219aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14229aebddd1SJeff Kirsher if (!wrb) { 14239aebddd1SJeff Kirsher status = -EBUSY; 14249aebddd1SJeff Kirsher goto err; 14259aebddd1SJeff Kirsher } 14269aebddd1SJeff Kirsher req = embedded_payload(wrb); 14279aebddd1SJeff Kirsher 1428106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1429106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 14309aebddd1SJeff Kirsher 14319aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 14329aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 14339aebddd1SJeff Kirsher req->num_pages = 2; 14349aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 14359aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 143610ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 14379aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 14389aebddd1SJeff Kirsher 14399aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14409aebddd1SJeff Kirsher if (!status) { 14419aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 144203d28ffeSKalesh AP 14439aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 14449aebddd1SJeff Kirsher rxq->created = true; 14459aebddd1SJeff Kirsher *rss_id = resp->rss_id; 14469aebddd1SJeff Kirsher } 14479aebddd1SJeff Kirsher 14489aebddd1SJeff Kirsher err: 1449b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 14509aebddd1SJeff Kirsher return status; 14519aebddd1SJeff Kirsher } 14529aebddd1SJeff Kirsher 14539aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 14549aebddd1SJeff Kirsher * Uses Mbox 14559aebddd1SJeff Kirsher */ 14569aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 14579aebddd1SJeff Kirsher int queue_type) 14589aebddd1SJeff Kirsher { 14599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14609aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 14619aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 14629aebddd1SJeff Kirsher int status; 14639aebddd1SJeff Kirsher 14649aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 14659aebddd1SJeff Kirsher return -1; 14669aebddd1SJeff Kirsher 14679aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 14689aebddd1SJeff Kirsher req = embedded_payload(wrb); 14699aebddd1SJeff Kirsher 14709aebddd1SJeff Kirsher switch (queue_type) { 14719aebddd1SJeff Kirsher case QTYPE_EQ: 14729aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14739aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 14749aebddd1SJeff Kirsher break; 14759aebddd1SJeff Kirsher case QTYPE_CQ: 14769aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14779aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 14789aebddd1SJeff Kirsher break; 14799aebddd1SJeff Kirsher case QTYPE_TXQ: 14809aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14819aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 14829aebddd1SJeff Kirsher break; 14839aebddd1SJeff Kirsher case QTYPE_RXQ: 14849aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 14859aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 14869aebddd1SJeff Kirsher break; 14879aebddd1SJeff Kirsher case QTYPE_MCCQ: 14889aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 14899aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 14909aebddd1SJeff Kirsher break; 14919aebddd1SJeff Kirsher default: 14929aebddd1SJeff Kirsher BUG(); 14939aebddd1SJeff Kirsher } 14949aebddd1SJeff Kirsher 1495106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1496106df1e3SSomnath Kotur NULL); 14979aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14989aebddd1SJeff Kirsher 14999aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 15009aebddd1SJeff Kirsher q->created = false; 15019aebddd1SJeff Kirsher 15029aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 15039aebddd1SJeff Kirsher return status; 15049aebddd1SJeff Kirsher } 15059aebddd1SJeff Kirsher 15069aebddd1SJeff Kirsher /* Uses MCC */ 15079aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 15089aebddd1SJeff Kirsher { 15099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15109aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 15119aebddd1SJeff Kirsher int status; 15129aebddd1SJeff Kirsher 1513b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15149aebddd1SJeff Kirsher 15159aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15169aebddd1SJeff Kirsher if (!wrb) { 15179aebddd1SJeff Kirsher status = -EBUSY; 15189aebddd1SJeff Kirsher goto err; 15199aebddd1SJeff Kirsher } 15209aebddd1SJeff Kirsher req = embedded_payload(wrb); 15219aebddd1SJeff Kirsher 1522106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1523106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 15249aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 15259aebddd1SJeff Kirsher 15269aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15279aebddd1SJeff Kirsher q->created = false; 15289aebddd1SJeff Kirsher 15299aebddd1SJeff Kirsher err: 1530b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 15319aebddd1SJeff Kirsher return status; 15329aebddd1SJeff Kirsher } 15339aebddd1SJeff Kirsher 15349aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1535bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 15369aebddd1SJeff Kirsher */ 15379aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 15381578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 15399aebddd1SJeff Kirsher { 1540bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 15419aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 15429aebddd1SJeff Kirsher int status; 15439aebddd1SJeff Kirsher 1544bea50988SSathya Perla req = embedded_payload(&wrb); 1545106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1546a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1547a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 15489aebddd1SJeff Kirsher req->hdr.domain = domain; 15499aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 15509aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1551f9449ab7SSathya Perla req->pmac_invalid = true; 15529aebddd1SJeff Kirsher 1553bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 15549aebddd1SJeff Kirsher if (!status) { 1555bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 155603d28ffeSKalesh AP 15579aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1558b5bb9776SSathya Perla 1559b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 156018c57c74SKalesh AP if (BE3_chip(adapter) && be_virtfn(adapter)) 1561b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 15629aebddd1SJeff Kirsher } 15639aebddd1SJeff Kirsher return status; 15649aebddd1SJeff Kirsher } 15659aebddd1SJeff Kirsher 156662219066SAjit Khaparde /* Uses MCCQ if available else MBOX */ 156730128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 15689aebddd1SJeff Kirsher { 156962219066SAjit Khaparde struct be_mcc_wrb wrb = {0}; 15709aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 15719aebddd1SJeff Kirsher int status; 15729aebddd1SJeff Kirsher 157330128031SSathya Perla if (interface_id == -1) 1574f9449ab7SSathya Perla return 0; 15759aebddd1SJeff Kirsher 157662219066SAjit Khaparde req = embedded_payload(&wrb); 15779aebddd1SJeff Kirsher 1578106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1579a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 158062219066SAjit Khaparde sizeof(*req), &wrb, NULL); 15819aebddd1SJeff Kirsher req->hdr.domain = domain; 15829aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 15839aebddd1SJeff Kirsher 158462219066SAjit Khaparde status = be_cmd_notify_wait(adapter, &wrb); 15859aebddd1SJeff Kirsher return status; 15869aebddd1SJeff Kirsher } 15879aebddd1SJeff Kirsher 15889aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 15899aebddd1SJeff Kirsher * WRB but is a separate dma memory block 15909aebddd1SJeff Kirsher * Uses asynchronous MCC 15919aebddd1SJeff Kirsher */ 15929aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 15939aebddd1SJeff Kirsher { 15949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15959aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 15969aebddd1SJeff Kirsher int status = 0; 15979aebddd1SJeff Kirsher 1598b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 15999aebddd1SJeff Kirsher 16009aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16019aebddd1SJeff Kirsher if (!wrb) { 16029aebddd1SJeff Kirsher status = -EBUSY; 16039aebddd1SJeff Kirsher goto err; 16049aebddd1SJeff Kirsher } 16059aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 16069aebddd1SJeff Kirsher 1607106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1608a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1609a2cc4e0bSSathya Perla nonemb_cmd); 16109aebddd1SJeff Kirsher 1611ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 161261000861SAjit Khaparde if (BE2_chip(adapter)) 161361000861SAjit Khaparde hdr->version = 0; 161461000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 16159aebddd1SJeff Kirsher hdr->version = 1; 161661000861SAjit Khaparde else 161761000861SAjit Khaparde hdr->version = 2; 16189aebddd1SJeff Kirsher 1619efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1620efaa408eSSuresh Reddy if (status) 1621efaa408eSSuresh Reddy goto err; 1622efaa408eSSuresh Reddy 16239aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16249aebddd1SJeff Kirsher 16259aebddd1SJeff Kirsher err: 1626b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16279aebddd1SJeff Kirsher return status; 16289aebddd1SJeff Kirsher } 16299aebddd1SJeff Kirsher 16309aebddd1SJeff Kirsher /* Lancer Stats */ 16319aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 16329aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 16339aebddd1SJeff Kirsher { 16349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16359aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 16369aebddd1SJeff Kirsher int status = 0; 16379aebddd1SJeff Kirsher 1638f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1639f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1640f25b119cSPadmanabh Ratnakar return -EPERM; 1641f25b119cSPadmanabh Ratnakar 1642b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 16439aebddd1SJeff Kirsher 16449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16459aebddd1SJeff Kirsher if (!wrb) { 16469aebddd1SJeff Kirsher status = -EBUSY; 16479aebddd1SJeff Kirsher goto err; 16489aebddd1SJeff Kirsher } 16499aebddd1SJeff Kirsher req = nonemb_cmd->va; 16509aebddd1SJeff Kirsher 1651106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1652a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1653a2cc4e0bSSathya Perla wrb, nonemb_cmd); 16549aebddd1SJeff Kirsher 1655d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 16569aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 16579aebddd1SJeff Kirsher 1658efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 1659efaa408eSSuresh Reddy if (status) 1660efaa408eSSuresh Reddy goto err; 1661efaa408eSSuresh Reddy 16629aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 16639aebddd1SJeff Kirsher 16649aebddd1SJeff Kirsher err: 1665b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 16669aebddd1SJeff Kirsher return status; 16679aebddd1SJeff Kirsher } 16689aebddd1SJeff Kirsher 1669323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1670323ff71eSSathya Perla { 1671323ff71eSSathya Perla switch (mac_speed) { 1672323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1673323ff71eSSathya Perla return 0; 1674323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1675323ff71eSSathya Perla return 10; 1676323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1677323ff71eSSathya Perla return 100; 1678323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1679323ff71eSSathya Perla return 1000; 1680323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1681323ff71eSSathya Perla return 10000; 1682b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1683b971f847SVasundhara Volam return 20000; 1684b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1685b971f847SVasundhara Volam return 25000; 1686b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1687b971f847SVasundhara Volam return 40000; 1688323ff71eSSathya Perla } 1689323ff71eSSathya Perla return 0; 1690323ff71eSSathya Perla } 1691323ff71eSSathya Perla 1692323ff71eSSathya Perla /* Uses synchronous mcc 1693323ff71eSSathya Perla * Returns link_speed in Mbps 1694323ff71eSSathya Perla */ 1695323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1696323ff71eSSathya Perla u8 *link_status, u32 dom) 16979aebddd1SJeff Kirsher { 16989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16999aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 17009aebddd1SJeff Kirsher int status; 17019aebddd1SJeff Kirsher 1702b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17039aebddd1SJeff Kirsher 1704b236916aSAjit Khaparde if (link_status) 1705b236916aSAjit Khaparde *link_status = LINK_DOWN; 1706b236916aSAjit Khaparde 17079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17089aebddd1SJeff Kirsher if (!wrb) { 17099aebddd1SJeff Kirsher status = -EBUSY; 17109aebddd1SJeff Kirsher goto err; 17119aebddd1SJeff Kirsher } 17129aebddd1SJeff Kirsher req = embedded_payload(wrb); 17139aebddd1SJeff Kirsher 171457cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1715a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1716a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 171757cd80d4SPadmanabh Ratnakar 1718ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1719ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1720daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1721daad6167SPadmanabh Ratnakar 172257cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 17239aebddd1SJeff Kirsher 17249aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17259aebddd1SJeff Kirsher if (!status) { 17269aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 172703d28ffeSKalesh AP 1728323ff71eSSathya Perla if (link_speed) { 1729323ff71eSSathya Perla *link_speed = resp->link_speed ? 1730323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1731323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1732323ff71eSSathya Perla 1733323ff71eSSathya Perla if (!resp->logical_link_status) 1734323ff71eSSathya Perla *link_speed = 0; 17359aebddd1SJeff Kirsher } 1736b236916aSAjit Khaparde if (link_status) 1737b236916aSAjit Khaparde *link_status = resp->logical_link_status; 17389aebddd1SJeff Kirsher } 17399aebddd1SJeff Kirsher 17409aebddd1SJeff Kirsher err: 1741b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17429aebddd1SJeff Kirsher return status; 17439aebddd1SJeff Kirsher } 17449aebddd1SJeff Kirsher 17459aebddd1SJeff Kirsher /* Uses synchronous mcc */ 17469aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 17479aebddd1SJeff Kirsher { 17489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17499aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1750117affe3SVasundhara Volam int status = 0; 17519aebddd1SJeff Kirsher 1752b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 17539aebddd1SJeff Kirsher 17549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17559aebddd1SJeff Kirsher if (!wrb) { 17569aebddd1SJeff Kirsher status = -EBUSY; 17579aebddd1SJeff Kirsher goto err; 17589aebddd1SJeff Kirsher } 17599aebddd1SJeff Kirsher req = embedded_payload(wrb); 17609aebddd1SJeff Kirsher 1761106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1762a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1763a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 17649aebddd1SJeff Kirsher 1765efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 17669aebddd1SJeff Kirsher err: 1767b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 17689aebddd1SJeff Kirsher return status; 17699aebddd1SJeff Kirsher } 17709aebddd1SJeff Kirsher 17719aebddd1SJeff Kirsher /* Uses synchronous mcc */ 1772fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size) 17739aebddd1SJeff Kirsher { 1774fd7ff6f0SVenkat Duvvuru struct be_mcc_wrb wrb = {0}; 17759aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 17769aebddd1SJeff Kirsher int status; 17779aebddd1SJeff Kirsher 1778fd7ff6f0SVenkat Duvvuru req = embedded_payload(&wrb); 17799aebddd1SJeff Kirsher 1780106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1781fd7ff6f0SVenkat Duvvuru OPCODE_COMMON_MANAGE_FAT, sizeof(*req), 1782fd7ff6f0SVenkat Duvvuru &wrb, NULL); 17839aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 1784fd7ff6f0SVenkat Duvvuru status = be_cmd_notify_wait(adapter, &wrb); 17859aebddd1SJeff Kirsher if (!status) { 1786fd7ff6f0SVenkat Duvvuru struct be_cmd_resp_get_fat *resp = embedded_payload(&wrb); 178703d28ffeSKalesh AP 1788fd7ff6f0SVenkat Duvvuru if (dump_size && resp->log_size) 1789fd7ff6f0SVenkat Duvvuru *dump_size = le32_to_cpu(resp->log_size) - 17909aebddd1SJeff Kirsher sizeof(u32); 17919aebddd1SJeff Kirsher } 17929aebddd1SJeff Kirsher return status; 17939aebddd1SJeff Kirsher } 17949aebddd1SJeff Kirsher 1795fd7ff6f0SVenkat Duvvuru int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf) 17969aebddd1SJeff Kirsher { 17979aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 17989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17999aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 18009aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 18019aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1802fd7ff6f0SVenkat Duvvuru int status; 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher if (buf_len == 0) 1805fd7ff6f0SVenkat Duvvuru return 0; 18069aebddd1SJeff Kirsher 18079aebddd1SJeff Kirsher total_size = buf_len; 18089aebddd1SJeff Kirsher 18099aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1810e51000dbSSriharsha Basavapatna get_fat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 18119aebddd1SJeff Kirsher get_fat_cmd.size, 1812e51000dbSSriharsha Basavapatna &get_fat_cmd.dma, GFP_ATOMIC); 1813fd7ff6f0SVenkat Duvvuru if (!get_fat_cmd.va) 1814c5f156deSVasundhara Volam return -ENOMEM; 18159aebddd1SJeff Kirsher 1816b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18179aebddd1SJeff Kirsher 18189aebddd1SJeff Kirsher while (total_size) { 18199aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 18209aebddd1SJeff Kirsher total_size -= buf_size; 18219aebddd1SJeff Kirsher 18229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18239aebddd1SJeff Kirsher if (!wrb) { 18249aebddd1SJeff Kirsher status = -EBUSY; 18259aebddd1SJeff Kirsher goto err; 18269aebddd1SJeff Kirsher } 18279aebddd1SJeff Kirsher req = get_fat_cmd.va; 18289aebddd1SJeff Kirsher 18299aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1830106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1831a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1832a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 18339aebddd1SJeff Kirsher 18349aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 18359aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 18369aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 18379aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 18389aebddd1SJeff Kirsher 18399aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18409aebddd1SJeff Kirsher if (!status) { 18419aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 184203d28ffeSKalesh AP 18439aebddd1SJeff Kirsher memcpy(buf + offset, 18449aebddd1SJeff Kirsher resp->data_buffer, 184592aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 18469aebddd1SJeff Kirsher } else { 18479aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 18489aebddd1SJeff Kirsher goto err; 18499aebddd1SJeff Kirsher } 18509aebddd1SJeff Kirsher offset += buf_size; 18519aebddd1SJeff Kirsher log_offset += buf_size; 18529aebddd1SJeff Kirsher } 18539aebddd1SJeff Kirsher err: 1854e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_fat_cmd.size, 1855a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 1856b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 1857c5f156deSVasundhara Volam return status; 18589aebddd1SJeff Kirsher } 18599aebddd1SJeff Kirsher 186004b71175SSathya Perla /* Uses synchronous mcc */ 1861e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 18629aebddd1SJeff Kirsher { 18639aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18649aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 18659aebddd1SJeff Kirsher int status; 18669aebddd1SJeff Kirsher 1867b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 18689aebddd1SJeff Kirsher 186904b71175SSathya Perla wrb = wrb_from_mccq(adapter); 187004b71175SSathya Perla if (!wrb) { 187104b71175SSathya Perla status = -EBUSY; 187204b71175SSathya Perla goto err; 187304b71175SSathya Perla } 187404b71175SSathya Perla 18759aebddd1SJeff Kirsher req = embedded_payload(wrb); 18769aebddd1SJeff Kirsher 1877106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1878a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1879a2cc4e0bSSathya Perla NULL); 188004b71175SSathya Perla status = be_mcc_notify_wait(adapter); 18819aebddd1SJeff Kirsher if (!status) { 18829aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1883acbafeb1SSathya Perla 1884242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1885242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1886242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1887242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 18889aebddd1SJeff Kirsher } 188904b71175SSathya Perla err: 1890b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 18919aebddd1SJeff Kirsher return status; 18929aebddd1SJeff Kirsher } 18939aebddd1SJeff Kirsher 18949aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 18959aebddd1SJeff Kirsher * Uses async mcc 18969aebddd1SJeff Kirsher */ 1897b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1898b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 18999aebddd1SJeff Kirsher { 19009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19019aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 19022632bafdSSathya Perla int status = 0, i; 19039aebddd1SJeff Kirsher 1904b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19059aebddd1SJeff Kirsher 19069aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19079aebddd1SJeff Kirsher if (!wrb) { 19089aebddd1SJeff Kirsher status = -EBUSY; 19099aebddd1SJeff Kirsher goto err; 19109aebddd1SJeff Kirsher } 19119aebddd1SJeff Kirsher req = embedded_payload(wrb); 19129aebddd1SJeff Kirsher 1913106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1914a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1915a2cc4e0bSSathya Perla NULL); 19169aebddd1SJeff Kirsher 19172632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 19182632bafdSSathya Perla for (i = 0; i < num; i++) { 19192632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 19202632bafdSSathya Perla req->set_eqd[i].phase = 0; 19212632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 19222632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 19232632bafdSSathya Perla } 19249aebddd1SJeff Kirsher 1925efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 19269aebddd1SJeff Kirsher err: 1927b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19289aebddd1SJeff Kirsher return status; 19299aebddd1SJeff Kirsher } 19309aebddd1SJeff Kirsher 193193676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 193293676703SKalesh AP int num) 193393676703SKalesh AP { 193493676703SKalesh AP int num_eqs, i = 0; 193593676703SKalesh AP 193693676703SKalesh AP while (num) { 193793676703SKalesh AP num_eqs = min(num, 8); 193893676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 193993676703SKalesh AP i += num_eqs; 194093676703SKalesh AP num -= num_eqs; 194193676703SKalesh AP } 194293676703SKalesh AP 194393676703SKalesh AP return 0; 194493676703SKalesh AP } 194593676703SKalesh AP 19469aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 19479aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1948435452aaSVasundhara Volam u32 num, u32 domain) 19499aebddd1SJeff Kirsher { 19509aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19519aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 19529aebddd1SJeff Kirsher int status; 19539aebddd1SJeff Kirsher 1954b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19559aebddd1SJeff Kirsher 19569aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19579aebddd1SJeff Kirsher if (!wrb) { 19589aebddd1SJeff Kirsher status = -EBUSY; 19599aebddd1SJeff Kirsher goto err; 19609aebddd1SJeff Kirsher } 19619aebddd1SJeff Kirsher req = embedded_payload(wrb); 19629aebddd1SJeff Kirsher 1963106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1964a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1965a2cc4e0bSSathya Perla wrb, NULL); 1966435452aaSVasundhara Volam req->hdr.domain = domain; 19679aebddd1SJeff Kirsher 19689aebddd1SJeff Kirsher req->interface_id = if_id; 1969012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 19709aebddd1SJeff Kirsher req->num_vlan = num; 19719aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 19729aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 19739aebddd1SJeff Kirsher 19749aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19759aebddd1SJeff Kirsher err: 1976b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 19779aebddd1SJeff Kirsher return status; 19789aebddd1SJeff Kirsher } 19799aebddd1SJeff Kirsher 1980ac34b743SSathya Perla static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 19819aebddd1SJeff Kirsher { 19829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19839aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 19849aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 19859aebddd1SJeff Kirsher int status; 19869aebddd1SJeff Kirsher 1987b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 19889aebddd1SJeff Kirsher 19899aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19909aebddd1SJeff Kirsher if (!wrb) { 19919aebddd1SJeff Kirsher status = -EBUSY; 19929aebddd1SJeff Kirsher goto err; 19939aebddd1SJeff Kirsher } 19949aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1995106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1996106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1997106df1e3SSomnath Kotur wrb, mem); 19989aebddd1SJeff Kirsher 19999aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2000ac34b743SSathya Perla req->if_flags_mask = cpu_to_le32(flags); 2001ac34b743SSathya Perla req->if_flags = (value == ON) ? req->if_flags_mask : 0; 2002d9d604f8SAjit Khaparde 2003ac34b743SSathya Perla if (flags & BE_IF_FLAGS_MULTICAST) { 2004b7172414SSathya Perla int i; 20059aebddd1SJeff Kirsher 20061610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 20071610c79fSPadmanabh Ratnakar * and not setting flags field 20081610c79fSPadmanabh Ratnakar */ 20091610c79fSPadmanabh Ratnakar req->if_flags_mask |= 2010abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 201192bf14abSSathya Perla be_if_cap_flags(adapter)); 2012b7172414SSathya Perla req->mcast_num = cpu_to_le32(adapter->mc_count); 2013b7172414SSathya Perla for (i = 0; i < adapter->mc_count; i++) 2014b7172414SSathya Perla ether_addr_copy(req->mcast_mac[i].byte, 2015b7172414SSathya Perla adapter->mc_list[i].mac); 20169aebddd1SJeff Kirsher } 20179aebddd1SJeff Kirsher 2018b6588879SSathya Perla status = be_mcc_notify_wait(adapter); 20199aebddd1SJeff Kirsher err: 2020b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 20219aebddd1SJeff Kirsher return status; 20229aebddd1SJeff Kirsher } 20239aebddd1SJeff Kirsher 2024ac34b743SSathya Perla int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 2025ac34b743SSathya Perla { 2026ac34b743SSathya Perla struct device *dev = &adapter->pdev->dev; 2027ac34b743SSathya Perla 2028ac34b743SSathya Perla if ((flags & be_if_cap_flags(adapter)) != flags) { 2029ac34b743SSathya Perla dev_warn(dev, "Cannot set rx filter flags 0x%x\n", flags); 2030ac34b743SSathya Perla dev_warn(dev, "Interface is capable of 0x%x flags only\n", 2031ac34b743SSathya Perla be_if_cap_flags(adapter)); 2032ac34b743SSathya Perla } 2033ac34b743SSathya Perla flags &= be_if_cap_flags(adapter); 2034196e3735SKalesh AP if (!flags) 2035196e3735SKalesh AP return -ENOTSUPP; 2036ac34b743SSathya Perla 2037ac34b743SSathya Perla return __be_cmd_rx_filter(adapter, flags, value); 2038ac34b743SSathya Perla } 2039ac34b743SSathya Perla 20409aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 20419aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 20429aebddd1SJeff Kirsher { 20439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20449aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 20459aebddd1SJeff Kirsher int status; 20469aebddd1SJeff Kirsher 2047f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 2048f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2049f25b119cSPadmanabh Ratnakar return -EPERM; 2050f25b119cSPadmanabh Ratnakar 2051b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20529aebddd1SJeff Kirsher 20539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20549aebddd1SJeff Kirsher if (!wrb) { 20559aebddd1SJeff Kirsher status = -EBUSY; 20569aebddd1SJeff Kirsher goto err; 20579aebddd1SJeff Kirsher } 20589aebddd1SJeff Kirsher req = embedded_payload(wrb); 20599aebddd1SJeff Kirsher 2060106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2061a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 2062a2cc4e0bSSathya Perla wrb, NULL); 20639aebddd1SJeff Kirsher 2064b29812c1SSuresh Reddy req->hdr.version = 1; 20659aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 20669aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 20679aebddd1SJeff Kirsher 20689aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20699aebddd1SJeff Kirsher 20709aebddd1SJeff Kirsher err: 2071b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2072b29812c1SSuresh Reddy 2073b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 2074b29812c1SSuresh Reddy return -EOPNOTSUPP; 2075b29812c1SSuresh Reddy 20769aebddd1SJeff Kirsher return status; 20779aebddd1SJeff Kirsher } 20789aebddd1SJeff Kirsher 20799aebddd1SJeff Kirsher /* Uses sycn mcc */ 20809aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 20819aebddd1SJeff Kirsher { 20829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20839aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20849aebddd1SJeff Kirsher int status; 20859aebddd1SJeff Kirsher 2086f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2087f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2088f25b119cSPadmanabh Ratnakar return -EPERM; 2089f25b119cSPadmanabh Ratnakar 2090b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 20919aebddd1SJeff Kirsher 20929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20939aebddd1SJeff Kirsher if (!wrb) { 20949aebddd1SJeff Kirsher status = -EBUSY; 20959aebddd1SJeff Kirsher goto err; 20969aebddd1SJeff Kirsher } 20979aebddd1SJeff Kirsher req = embedded_payload(wrb); 20989aebddd1SJeff Kirsher 2099106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2100a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2101a2cc4e0bSSathya Perla wrb, NULL); 21029aebddd1SJeff Kirsher 21039aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21049aebddd1SJeff Kirsher if (!status) { 21059aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 21069aebddd1SJeff Kirsher embedded_payload(wrb); 210703d28ffeSKalesh AP 21089aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 21099aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 21109aebddd1SJeff Kirsher } 21119aebddd1SJeff Kirsher 21129aebddd1SJeff Kirsher err: 2113b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 21149aebddd1SJeff Kirsher return status; 21159aebddd1SJeff Kirsher } 21169aebddd1SJeff Kirsher 21179aebddd1SJeff Kirsher /* Uses mbox */ 2118e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 21199aebddd1SJeff Kirsher { 21209aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21219aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 21229aebddd1SJeff Kirsher int status; 21239aebddd1SJeff Kirsher 21249aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21259aebddd1SJeff Kirsher return -1; 21269aebddd1SJeff Kirsher 21279aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21289aebddd1SJeff Kirsher req = embedded_payload(wrb); 21299aebddd1SJeff Kirsher 2130106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2131a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2132a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21339aebddd1SJeff Kirsher 21349aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21359aebddd1SJeff Kirsher if (!status) { 21369aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 213703d28ffeSKalesh AP 2138e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2139e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2140e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2141e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2142acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2143acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2144acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 21459aebddd1SJeff Kirsher } 21469aebddd1SJeff Kirsher 21479aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21489aebddd1SJeff Kirsher return status; 21499aebddd1SJeff Kirsher } 21509aebddd1SJeff Kirsher 21519aebddd1SJeff Kirsher /* Uses mbox */ 21529aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 21539aebddd1SJeff Kirsher { 21549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21559aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 21569aebddd1SJeff Kirsher int status; 21579aebddd1SJeff Kirsher 2158bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2159bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2160bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 21619fa465c0SSathya Perla status = lancer_wait_ready(adapter); 21629fa465c0SSathya Perla if (status) 2163bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2164bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2165bf99e50dSPadmanabh Ratnakar return status; 2166bf99e50dSPadmanabh Ratnakar } 2167bf99e50dSPadmanabh Ratnakar 21689aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 21699aebddd1SJeff Kirsher return -1; 21709aebddd1SJeff Kirsher 21719aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 21729aebddd1SJeff Kirsher req = embedded_payload(wrb); 21739aebddd1SJeff Kirsher 2174106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2175a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2176a2cc4e0bSSathya Perla NULL); 21779aebddd1SJeff Kirsher 21789aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21799aebddd1SJeff Kirsher 21809aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21819aebddd1SJeff Kirsher return status; 21829aebddd1SJeff Kirsher } 21839aebddd1SJeff Kirsher 2184594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 218533cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21869aebddd1SJeff Kirsher { 21879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21889aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21899aebddd1SJeff Kirsher int status; 21909aebddd1SJeff Kirsher 2191da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2192da1388d6SVasundhara Volam return 0; 2193da1388d6SVasundhara Volam 2194b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 21959aebddd1SJeff Kirsher 2196b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2197b51aa367SKalesh AP if (!wrb) { 2198b51aa367SKalesh AP status = -EBUSY; 2199b51aa367SKalesh AP goto err; 2200b51aa367SKalesh AP } 22019aebddd1SJeff Kirsher req = embedded_payload(wrb); 22029aebddd1SJeff Kirsher 2203106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2204106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 22059aebddd1SJeff Kirsher 22069aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2207594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 22089aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2209594ad54aSSuresh Reddy 2210b51aa367SKalesh AP if (!BEx_chip(adapter)) 2211594ad54aSSuresh Reddy req->hdr.version = 1; 2212594ad54aSSuresh Reddy 22139aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2214e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 22159aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 22169aebddd1SJeff Kirsher 2217b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2218b51aa367SKalesh AP err: 2219b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22209aebddd1SJeff Kirsher return status; 22219aebddd1SJeff Kirsher } 22229aebddd1SJeff Kirsher 22239aebddd1SJeff Kirsher /* Uses sync mcc */ 22249aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 22259aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 22269aebddd1SJeff Kirsher { 22279aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22289aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 22299aebddd1SJeff Kirsher int status; 22309aebddd1SJeff Kirsher 2231b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22329aebddd1SJeff Kirsher 22339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22349aebddd1SJeff Kirsher if (!wrb) { 22359aebddd1SJeff Kirsher status = -EBUSY; 22369aebddd1SJeff Kirsher goto err; 22379aebddd1SJeff Kirsher } 22389aebddd1SJeff Kirsher req = embedded_payload(wrb); 22399aebddd1SJeff Kirsher 2240106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2241a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2242a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 22439aebddd1SJeff Kirsher 22449aebddd1SJeff Kirsher req->port_num = port_num; 22459aebddd1SJeff Kirsher req->beacon_state = state; 22469aebddd1SJeff Kirsher req->beacon_duration = bcn; 22479aebddd1SJeff Kirsher req->status_duration = sts; 22489aebddd1SJeff Kirsher 22499aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22509aebddd1SJeff Kirsher 22519aebddd1SJeff Kirsher err: 2252b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22539aebddd1SJeff Kirsher return status; 22549aebddd1SJeff Kirsher } 22559aebddd1SJeff Kirsher 22569aebddd1SJeff Kirsher /* Uses sync mcc */ 22579aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 22589aebddd1SJeff Kirsher { 22599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22609aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 22619aebddd1SJeff Kirsher int status; 22629aebddd1SJeff Kirsher 2263b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 22649aebddd1SJeff Kirsher 22659aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22669aebddd1SJeff Kirsher if (!wrb) { 22679aebddd1SJeff Kirsher status = -EBUSY; 22689aebddd1SJeff Kirsher goto err; 22699aebddd1SJeff Kirsher } 22709aebddd1SJeff Kirsher req = embedded_payload(wrb); 22719aebddd1SJeff Kirsher 2272106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2273a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2274a2cc4e0bSSathya Perla wrb, NULL); 22759aebddd1SJeff Kirsher 22769aebddd1SJeff Kirsher req->port_num = port_num; 22779aebddd1SJeff Kirsher 22789aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22799aebddd1SJeff Kirsher if (!status) { 22809aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22819aebddd1SJeff Kirsher embedded_payload(wrb); 228203d28ffeSKalesh AP 22839aebddd1SJeff Kirsher *state = resp->beacon_state; 22849aebddd1SJeff Kirsher } 22859aebddd1SJeff Kirsher 22869aebddd1SJeff Kirsher err: 2287b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 22889aebddd1SJeff Kirsher return status; 22899aebddd1SJeff Kirsher } 22909aebddd1SJeff Kirsher 2291e36edd9dSMark Leonard /* Uses sync mcc */ 2292e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2293e36edd9dSMark Leonard u8 page_num, u8 *data) 2294e36edd9dSMark Leonard { 2295e36edd9dSMark Leonard struct be_dma_mem cmd; 2296e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2297e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2298e36edd9dSMark Leonard int status; 2299e36edd9dSMark Leonard 2300e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2301e36edd9dSMark Leonard return -EINVAL; 2302e36edd9dSMark Leonard 2303e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2304e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 2305e51000dbSSriharsha Basavapatna GFP_ATOMIC); 2306e36edd9dSMark Leonard if (!cmd.va) { 2307e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2308e36edd9dSMark Leonard return -ENOMEM; 2309e36edd9dSMark Leonard } 2310e36edd9dSMark Leonard 2311b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2312e36edd9dSMark Leonard 2313e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2314e36edd9dSMark Leonard if (!wrb) { 2315e36edd9dSMark Leonard status = -EBUSY; 2316e36edd9dSMark Leonard goto err; 2317e36edd9dSMark Leonard } 2318e36edd9dSMark Leonard req = cmd.va; 2319e36edd9dSMark Leonard 2320e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2321e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2322e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2323e36edd9dSMark Leonard 2324e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2325e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2326e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2327e36edd9dSMark Leonard if (!status) { 2328e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2329e36edd9dSMark Leonard 2330e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2331e36edd9dSMark Leonard } 2332e36edd9dSMark Leonard err: 2333b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2334e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 2335e36edd9dSMark Leonard return status; 2336e36edd9dSMark Leonard } 2337e36edd9dSMark Leonard 2338a23113b5SSuresh Reddy static int lancer_cmd_write_object(struct be_adapter *adapter, 2339a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 data_size, 2340a23113b5SSuresh Reddy u32 data_offset, const char *obj_name, 2341a23113b5SSuresh Reddy u32 *data_written, u8 *change_status, 2342a23113b5SSuresh Reddy u8 *addn_status) 23439aebddd1SJeff Kirsher { 23449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23459aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 23469aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 23479aebddd1SJeff Kirsher void *ctxt = NULL; 23489aebddd1SJeff Kirsher int status; 23499aebddd1SJeff Kirsher 2350b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 23519aebddd1SJeff Kirsher adapter->flash_status = 0; 23529aebddd1SJeff Kirsher 23539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23549aebddd1SJeff Kirsher if (!wrb) { 23559aebddd1SJeff Kirsher status = -EBUSY; 23569aebddd1SJeff Kirsher goto err_unlock; 23579aebddd1SJeff Kirsher } 23589aebddd1SJeff Kirsher 23599aebddd1SJeff Kirsher req = embedded_payload(wrb); 23609aebddd1SJeff Kirsher 2361106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 23629aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2363106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2364106df1e3SSomnath Kotur NULL); 23659aebddd1SJeff Kirsher 23669aebddd1SJeff Kirsher ctxt = &req->context; 23679aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23689aebddd1SJeff Kirsher write_length, ctxt, data_size); 23699aebddd1SJeff Kirsher 23709aebddd1SJeff Kirsher if (data_size == 0) 23719aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23729aebddd1SJeff Kirsher eof, ctxt, 1); 23739aebddd1SJeff Kirsher else 23749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 23759aebddd1SJeff Kirsher eof, ctxt, 0); 23769aebddd1SJeff Kirsher 23779aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 23789aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2379242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23809aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23819aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23829aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23839aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23849aebddd1SJeff Kirsher & 0xFFFFFFFF); 23859aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23869aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23879aebddd1SJeff Kirsher 2388efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2389efaa408eSSuresh Reddy if (status) 2390efaa408eSSuresh Reddy goto err_unlock; 2391efaa408eSSuresh Reddy 2392b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 23939aebddd1SJeff Kirsher 23945eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2395701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2396fd45160cSKalesh AP status = -ETIMEDOUT; 23979aebddd1SJeff Kirsher else 23989aebddd1SJeff Kirsher status = adapter->flash_status; 23999aebddd1SJeff Kirsher 24009aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2401f67ef7baSPadmanabh Ratnakar if (!status) { 24029aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2403f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2404f67ef7baSPadmanabh Ratnakar } else { 24059aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2406f67ef7baSPadmanabh Ratnakar } 24079aebddd1SJeff Kirsher 24089aebddd1SJeff Kirsher return status; 24099aebddd1SJeff Kirsher 24109aebddd1SJeff Kirsher err_unlock: 2411b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 24129aebddd1SJeff Kirsher return status; 24139aebddd1SJeff Kirsher } 24149aebddd1SJeff Kirsher 24156809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 24166809cee0SRavikumar Nelavelli { 24176809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 24186809cee0SRavikumar Nelavelli int status; 24196809cee0SRavikumar Nelavelli 24206809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 24216809cee0SRavikumar Nelavelli page_data); 24226809cee0SRavikumar Nelavelli if (!status) { 24236809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 24246809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 24256809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24266809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 24276809cee0SRavikumar Nelavelli break; 24286809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 24296809cee0SRavikumar Nelavelli adapter->phy.cable_type = 24306809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 24316809cee0SRavikumar Nelavelli break; 24326809cee0SRavikumar Nelavelli default: 24336809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 24346809cee0SRavikumar Nelavelli break; 24356809cee0SRavikumar Nelavelli } 24366809cee0SRavikumar Nelavelli } 24376809cee0SRavikumar Nelavelli return status; 24386809cee0SRavikumar Nelavelli } 24396809cee0SRavikumar Nelavelli 244021252377SVasundhara Volam int be_cmd_query_sfp_info(struct be_adapter *adapter) 244121252377SVasundhara Volam { 244221252377SVasundhara Volam u8 page_data[PAGE_DATA_LEN]; 244321252377SVasundhara Volam int status; 244421252377SVasundhara Volam 244521252377SVasundhara Volam status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 244621252377SVasundhara Volam page_data); 244721252377SVasundhara Volam if (!status) { 244821252377SVasundhara Volam strlcpy(adapter->phy.vendor_name, page_data + 244921252377SVasundhara Volam SFP_VENDOR_NAME_OFFSET, SFP_VENDOR_NAME_LEN - 1); 245021252377SVasundhara Volam strlcpy(adapter->phy.vendor_pn, 245121252377SVasundhara Volam page_data + SFP_VENDOR_PN_OFFSET, 245221252377SVasundhara Volam SFP_VENDOR_NAME_LEN - 1); 245321252377SVasundhara Volam } 245421252377SVasundhara Volam 245521252377SVasundhara Volam return status; 245621252377SVasundhara Volam } 245721252377SVasundhara Volam 2458a23113b5SSuresh Reddy static int lancer_cmd_delete_object(struct be_adapter *adapter, 2459a23113b5SSuresh Reddy const char *obj_name) 2460f0613380SKalesh AP { 2461f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2462f0613380SKalesh AP struct be_mcc_wrb *wrb; 2463f0613380SKalesh AP int status; 2464f0613380SKalesh AP 2465b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2466f0613380SKalesh AP 2467f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2468f0613380SKalesh AP if (!wrb) { 2469f0613380SKalesh AP status = -EBUSY; 2470f0613380SKalesh AP goto err; 2471f0613380SKalesh AP } 2472f0613380SKalesh AP 2473f0613380SKalesh AP req = embedded_payload(wrb); 2474f0613380SKalesh AP 2475f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2476f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2477f0613380SKalesh AP sizeof(*req), wrb, NULL); 2478f0613380SKalesh AP 2479242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2480f0613380SKalesh AP 2481f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2482f0613380SKalesh AP err: 2483b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2484f0613380SKalesh AP return status; 2485f0613380SKalesh AP } 2486f0613380SKalesh AP 2487de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2488de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2489de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2490de49bd5aSPadmanabh Ratnakar { 2491de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2492de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2493de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2494de49bd5aSPadmanabh Ratnakar int status; 2495de49bd5aSPadmanabh Ratnakar 2496b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 2497de49bd5aSPadmanabh Ratnakar 2498de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2499de49bd5aSPadmanabh Ratnakar if (!wrb) { 2500de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2501de49bd5aSPadmanabh Ratnakar goto err_unlock; 2502de49bd5aSPadmanabh Ratnakar } 2503de49bd5aSPadmanabh Ratnakar 2504de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2505de49bd5aSPadmanabh Ratnakar 2506de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2507de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2508de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2509de49bd5aSPadmanabh Ratnakar NULL); 2510de49bd5aSPadmanabh Ratnakar 2511de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2512de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2513de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2514de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2515de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2516de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2517de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2518de49bd5aSPadmanabh Ratnakar 2519de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2520de49bd5aSPadmanabh Ratnakar 2521de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2522de49bd5aSPadmanabh Ratnakar if (!status) { 2523de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2524de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2525de49bd5aSPadmanabh Ratnakar } else { 2526de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2527de49bd5aSPadmanabh Ratnakar } 2528de49bd5aSPadmanabh Ratnakar 2529de49bd5aSPadmanabh Ratnakar err_unlock: 2530b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 2531de49bd5aSPadmanabh Ratnakar return status; 2532de49bd5aSPadmanabh Ratnakar } 2533de49bd5aSPadmanabh Ratnakar 2534a23113b5SSuresh Reddy static int be_cmd_write_flashrom(struct be_adapter *adapter, 2535a23113b5SSuresh Reddy struct be_dma_mem *cmd, u32 flash_type, 2536a23113b5SSuresh Reddy u32 flash_opcode, u32 img_offset, u32 buf_size) 25379aebddd1SJeff Kirsher { 25389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25399aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 25409aebddd1SJeff Kirsher int status; 25419aebddd1SJeff Kirsher 2542b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25439aebddd1SJeff Kirsher adapter->flash_status = 0; 25449aebddd1SJeff Kirsher 25459aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25469aebddd1SJeff Kirsher if (!wrb) { 25479aebddd1SJeff Kirsher status = -EBUSY; 25489aebddd1SJeff Kirsher goto err_unlock; 25499aebddd1SJeff Kirsher } 25509aebddd1SJeff Kirsher req = cmd->va; 25519aebddd1SJeff Kirsher 2552106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2553a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2554a2cc4e0bSSathya Perla cmd); 25559aebddd1SJeff Kirsher 25569aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 255770a7b525SVasundhara Volam if (flash_type == OPTYPE_OFFSET_SPECIFIED) 255870a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset); 255970a7b525SVasundhara Volam 25609aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 25619aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 25629aebddd1SJeff Kirsher 2563efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 2564efaa408eSSuresh Reddy if (status) 2565efaa408eSSuresh Reddy goto err_unlock; 2566efaa408eSSuresh Reddy 2567b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25689aebddd1SJeff Kirsher 25695eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2570e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2571fd45160cSKalesh AP status = -ETIMEDOUT; 25729aebddd1SJeff Kirsher else 25739aebddd1SJeff Kirsher status = adapter->flash_status; 25749aebddd1SJeff Kirsher 25759aebddd1SJeff Kirsher return status; 25769aebddd1SJeff Kirsher 25779aebddd1SJeff Kirsher err_unlock: 2578b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 25799aebddd1SJeff Kirsher return status; 25809aebddd1SJeff Kirsher } 25819aebddd1SJeff Kirsher 2582a23113b5SSuresh Reddy static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 258370a7b525SVasundhara Volam u16 img_optype, u32 img_offset, u32 crc_offset) 25849aebddd1SJeff Kirsher { 2585be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 258670a7b525SVasundhara Volam struct be_mcc_wrb *wrb; 25879aebddd1SJeff Kirsher int status; 25889aebddd1SJeff Kirsher 2589b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 25909aebddd1SJeff Kirsher 25919aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25929aebddd1SJeff Kirsher if (!wrb) { 25939aebddd1SJeff Kirsher status = -EBUSY; 25949aebddd1SJeff Kirsher goto err; 25959aebddd1SJeff Kirsher } 25969aebddd1SJeff Kirsher req = embedded_payload(wrb); 25979aebddd1SJeff Kirsher 2598106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2599be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2600be716446SPadmanabh Ratnakar wrb, NULL); 26019aebddd1SJeff Kirsher 260270a7b525SVasundhara Volam req->params.op_type = cpu_to_le32(img_optype); 260370a7b525SVasundhara Volam if (img_optype == OPTYPE_OFFSET_SPECIFIED) 260470a7b525SVasundhara Volam req->params.offset = cpu_to_le32(img_offset + crc_offset); 260570a7b525SVasundhara Volam else 260670a7b525SVasundhara Volam req->params.offset = cpu_to_le32(crc_offset); 260770a7b525SVasundhara Volam 26089aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 26099aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 26109aebddd1SJeff Kirsher 26119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26129aebddd1SJeff Kirsher if (!status) 2613be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 26149aebddd1SJeff Kirsher 26159aebddd1SJeff Kirsher err: 2616b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 26179aebddd1SJeff Kirsher return status; 26189aebddd1SJeff Kirsher } 26199aebddd1SJeff Kirsher 2620a23113b5SSuresh Reddy static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; 2621a23113b5SSuresh Reddy 2622a23113b5SSuresh Reddy static bool phy_flashing_required(struct be_adapter *adapter) 2623a23113b5SSuresh Reddy { 2624a23113b5SSuresh Reddy return (adapter->phy.phy_type == PHY_TYPE_TN_8022 && 2625a23113b5SSuresh Reddy adapter->phy.interface_type == PHY_TYPE_BASET_10GB); 2626a23113b5SSuresh Reddy } 2627a23113b5SSuresh Reddy 2628a23113b5SSuresh Reddy static bool is_comp_in_ufi(struct be_adapter *adapter, 2629a23113b5SSuresh Reddy struct flash_section_info *fsec, int type) 2630a23113b5SSuresh Reddy { 2631a23113b5SSuresh Reddy int i = 0, img_type = 0; 2632a23113b5SSuresh Reddy struct flash_section_info_g2 *fsec_g2 = NULL; 2633a23113b5SSuresh Reddy 2634a23113b5SSuresh Reddy if (BE2_chip(adapter)) 2635a23113b5SSuresh Reddy fsec_g2 = (struct flash_section_info_g2 *)fsec; 2636a23113b5SSuresh Reddy 2637a23113b5SSuresh Reddy for (i = 0; i < MAX_FLASH_COMP; i++) { 2638a23113b5SSuresh Reddy if (fsec_g2) 2639a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); 2640a23113b5SSuresh Reddy else 2641a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2642a23113b5SSuresh Reddy 2643a23113b5SSuresh Reddy if (img_type == type) 2644a23113b5SSuresh Reddy return true; 2645a23113b5SSuresh Reddy } 2646a23113b5SSuresh Reddy return false; 2647a23113b5SSuresh Reddy } 2648a23113b5SSuresh Reddy 2649a23113b5SSuresh Reddy static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, 2650a23113b5SSuresh Reddy int header_size, 2651a23113b5SSuresh Reddy const struct firmware *fw) 2652a23113b5SSuresh Reddy { 2653a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2654a23113b5SSuresh Reddy const u8 *p = fw->data; 2655a23113b5SSuresh Reddy 2656a23113b5SSuresh Reddy p += header_size; 2657a23113b5SSuresh Reddy while (p < (fw->data + fw->size)) { 2658a23113b5SSuresh Reddy fsec = (struct flash_section_info *)p; 2659a23113b5SSuresh Reddy if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) 2660a23113b5SSuresh Reddy return fsec; 2661a23113b5SSuresh Reddy p += 32; 2662a23113b5SSuresh Reddy } 2663a23113b5SSuresh Reddy return NULL; 2664a23113b5SSuresh Reddy } 2665a23113b5SSuresh Reddy 2666a23113b5SSuresh Reddy static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p, 2667a23113b5SSuresh Reddy u32 img_offset, u32 img_size, int hdr_size, 2668a23113b5SSuresh Reddy u16 img_optype, bool *crc_match) 2669a23113b5SSuresh Reddy { 2670a23113b5SSuresh Reddy u32 crc_offset; 2671a23113b5SSuresh Reddy int status; 2672a23113b5SSuresh Reddy u8 crc[4]; 2673a23113b5SSuresh Reddy 2674a23113b5SSuresh Reddy status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset, 2675a23113b5SSuresh Reddy img_size - 4); 2676a23113b5SSuresh Reddy if (status) 2677a23113b5SSuresh Reddy return status; 2678a23113b5SSuresh Reddy 2679a23113b5SSuresh Reddy crc_offset = hdr_size + img_offset + img_size - 4; 2680a23113b5SSuresh Reddy 2681a23113b5SSuresh Reddy /* Skip flashing, if crc of flashed region matches */ 2682a23113b5SSuresh Reddy if (!memcmp(crc, p + crc_offset, 4)) 2683a23113b5SSuresh Reddy *crc_match = true; 2684a23113b5SSuresh Reddy else 2685a23113b5SSuresh Reddy *crc_match = false; 2686a23113b5SSuresh Reddy 2687a23113b5SSuresh Reddy return status; 2688a23113b5SSuresh Reddy } 2689a23113b5SSuresh Reddy 2690a23113b5SSuresh Reddy static int be_flash(struct be_adapter *adapter, const u8 *img, 2691a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int optype, int img_size, 2692a23113b5SSuresh Reddy u32 img_offset) 2693a23113b5SSuresh Reddy { 2694a23113b5SSuresh Reddy u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0; 2695a23113b5SSuresh Reddy struct be_cmd_write_flashrom *req = flash_cmd->va; 2696a23113b5SSuresh Reddy int status; 2697a23113b5SSuresh Reddy 2698a23113b5SSuresh Reddy while (total_bytes) { 2699a23113b5SSuresh Reddy num_bytes = min_t(u32, 32 * 1024, total_bytes); 2700a23113b5SSuresh Reddy 2701a23113b5SSuresh Reddy total_bytes -= num_bytes; 2702a23113b5SSuresh Reddy 2703a23113b5SSuresh Reddy if (!total_bytes) { 2704a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2705a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_FLASH; 2706a23113b5SSuresh Reddy else 2707a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_FLASH; 2708a23113b5SSuresh Reddy } else { 2709a23113b5SSuresh Reddy if (optype == OPTYPE_PHY_FW) 2710a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_PHY_SAVE; 2711a23113b5SSuresh Reddy else 2712a23113b5SSuresh Reddy flash_op = FLASHROM_OPER_SAVE; 2713a23113b5SSuresh Reddy } 2714a23113b5SSuresh Reddy 2715a23113b5SSuresh Reddy memcpy(req->data_buf, img, num_bytes); 2716a23113b5SSuresh Reddy img += num_bytes; 2717a23113b5SSuresh Reddy status = be_cmd_write_flashrom(adapter, flash_cmd, optype, 2718a23113b5SSuresh Reddy flash_op, img_offset + 2719a23113b5SSuresh Reddy bytes_sent, num_bytes); 2720a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST && 2721a23113b5SSuresh Reddy optype == OPTYPE_PHY_FW) 2722a23113b5SSuresh Reddy break; 2723a23113b5SSuresh Reddy else if (status) 2724a23113b5SSuresh Reddy return status; 2725a23113b5SSuresh Reddy 2726a23113b5SSuresh Reddy bytes_sent += num_bytes; 2727a23113b5SSuresh Reddy } 2728a23113b5SSuresh Reddy return 0; 2729a23113b5SSuresh Reddy } 2730a23113b5SSuresh Reddy 2731a23113b5SSuresh Reddy /* For BE2, BE3 and BE3-R */ 2732a23113b5SSuresh Reddy static int be_flash_BEx(struct be_adapter *adapter, 2733a23113b5SSuresh Reddy const struct firmware *fw, 2734a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2735a23113b5SSuresh Reddy { 2736a23113b5SSuresh Reddy int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); 2737a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2738a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2739a23113b5SSuresh Reddy int status, i, filehdr_size, num_comp; 2740a23113b5SSuresh Reddy const struct flash_comp *pflashcomp; 2741a23113b5SSuresh Reddy bool crc_match; 2742a23113b5SSuresh Reddy const u8 *p; 2743a23113b5SSuresh Reddy 2744a23113b5SSuresh Reddy struct flash_comp gen3_flash_types[] = { 2745a23113b5SSuresh Reddy { BE3_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2746a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2747a23113b5SSuresh Reddy { BE3_REDBOOT_START, OPTYPE_REDBOOT, 2748a23113b5SSuresh Reddy BE3_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2749a23113b5SSuresh Reddy { BE3_ISCSI_BIOS_START, OPTYPE_BIOS, 2750a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2751a23113b5SSuresh Reddy { BE3_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2752a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2753a23113b5SSuresh Reddy { BE3_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2754a23113b5SSuresh Reddy BE3_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2755a23113b5SSuresh Reddy { BE3_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2756a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2757a23113b5SSuresh Reddy { BE3_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2758a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2759a23113b5SSuresh Reddy { BE3_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2760a23113b5SSuresh Reddy BE3_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE}, 2761a23113b5SSuresh Reddy { BE3_NCSI_START, OPTYPE_NCSI_FW, 2762a23113b5SSuresh Reddy BE3_NCSI_COMP_MAX_SIZE, IMAGE_NCSI}, 2763a23113b5SSuresh Reddy { BE3_PHY_FW_START, OPTYPE_PHY_FW, 2764a23113b5SSuresh Reddy BE3_PHY_FW_COMP_MAX_SIZE, IMAGE_FIRMWARE_PHY} 2765a23113b5SSuresh Reddy }; 2766a23113b5SSuresh Reddy 2767a23113b5SSuresh Reddy struct flash_comp gen2_flash_types[] = { 2768a23113b5SSuresh Reddy { BE2_ISCSI_PRIMARY_IMAGE_START, OPTYPE_ISCSI_ACTIVE, 2769a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_ISCSI}, 2770a23113b5SSuresh Reddy { BE2_REDBOOT_START, OPTYPE_REDBOOT, 2771a23113b5SSuresh Reddy BE2_REDBOOT_COMP_MAX_SIZE, IMAGE_BOOT_CODE}, 2772a23113b5SSuresh Reddy { BE2_ISCSI_BIOS_START, OPTYPE_BIOS, 2773a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_ISCSI}, 2774a23113b5SSuresh Reddy { BE2_PXE_BIOS_START, OPTYPE_PXE_BIOS, 2775a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_PXE}, 2776a23113b5SSuresh Reddy { BE2_FCOE_BIOS_START, OPTYPE_FCOE_BIOS, 2777a23113b5SSuresh Reddy BE2_BIOS_COMP_MAX_SIZE, IMAGE_OPTION_ROM_FCOE}, 2778a23113b5SSuresh Reddy { BE2_ISCSI_BACKUP_IMAGE_START, OPTYPE_ISCSI_BACKUP, 2779a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_ISCSI}, 2780a23113b5SSuresh Reddy { BE2_FCOE_PRIMARY_IMAGE_START, OPTYPE_FCOE_FW_ACTIVE, 2781a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_FCOE}, 2782a23113b5SSuresh Reddy { BE2_FCOE_BACKUP_IMAGE_START, OPTYPE_FCOE_FW_BACKUP, 2783a23113b5SSuresh Reddy BE2_COMP_MAX_SIZE, IMAGE_FIRMWARE_BACKUP_FCOE} 2784a23113b5SSuresh Reddy }; 2785a23113b5SSuresh Reddy 2786a23113b5SSuresh Reddy if (BE3_chip(adapter)) { 2787a23113b5SSuresh Reddy pflashcomp = gen3_flash_types; 2788a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2789a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen3_flash_types); 2790a23113b5SSuresh Reddy } else { 2791a23113b5SSuresh Reddy pflashcomp = gen2_flash_types; 2792a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g2); 2793a23113b5SSuresh Reddy num_comp = ARRAY_SIZE(gen2_flash_types); 2794a23113b5SSuresh Reddy img_hdrs_size = 0; 2795a23113b5SSuresh Reddy } 2796a23113b5SSuresh Reddy 2797a23113b5SSuresh Reddy /* Get flash section info*/ 2798a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2799a23113b5SSuresh Reddy if (!fsec) { 2800a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2801a23113b5SSuresh Reddy return -1; 2802a23113b5SSuresh Reddy } 2803a23113b5SSuresh Reddy for (i = 0; i < num_comp; i++) { 2804a23113b5SSuresh Reddy if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) 2805a23113b5SSuresh Reddy continue; 2806a23113b5SSuresh Reddy 2807a23113b5SSuresh Reddy if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && 2808a23113b5SSuresh Reddy memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0) 2809a23113b5SSuresh Reddy continue; 2810a23113b5SSuresh Reddy 2811a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_PHY_FW && 2812a23113b5SSuresh Reddy !phy_flashing_required(adapter)) 2813a23113b5SSuresh Reddy continue; 2814a23113b5SSuresh Reddy 2815a23113b5SSuresh Reddy if (pflashcomp[i].optype == OPTYPE_REDBOOT) { 2816a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, 2817a23113b5SSuresh Reddy pflashcomp[i].offset, 2818a23113b5SSuresh Reddy pflashcomp[i].size, 2819a23113b5SSuresh Reddy filehdr_size + 2820a23113b5SSuresh Reddy img_hdrs_size, 2821a23113b5SSuresh Reddy OPTYPE_REDBOOT, &crc_match); 2822a23113b5SSuresh Reddy if (status) { 2823a23113b5SSuresh Reddy dev_err(dev, 2824a23113b5SSuresh Reddy "Could not get CRC for 0x%x region\n", 2825a23113b5SSuresh Reddy pflashcomp[i].optype); 2826a23113b5SSuresh Reddy continue; 2827a23113b5SSuresh Reddy } 2828a23113b5SSuresh Reddy 2829a23113b5SSuresh Reddy if (crc_match) 2830a23113b5SSuresh Reddy continue; 2831a23113b5SSuresh Reddy } 2832a23113b5SSuresh Reddy 2833a23113b5SSuresh Reddy p = fw->data + filehdr_size + pflashcomp[i].offset + 2834a23113b5SSuresh Reddy img_hdrs_size; 2835a23113b5SSuresh Reddy if (p + pflashcomp[i].size > fw->data + fw->size) 2836a23113b5SSuresh Reddy return -1; 2837a23113b5SSuresh Reddy 2838a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, 2839a23113b5SSuresh Reddy pflashcomp[i].size, 0); 2840a23113b5SSuresh Reddy if (status) { 2841a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 2842a23113b5SSuresh Reddy pflashcomp[i].img_type); 2843a23113b5SSuresh Reddy return status; 2844a23113b5SSuresh Reddy } 2845a23113b5SSuresh Reddy } 2846a23113b5SSuresh Reddy return 0; 2847a23113b5SSuresh Reddy } 2848a23113b5SSuresh Reddy 2849a23113b5SSuresh Reddy static u16 be_get_img_optype(struct flash_section_entry fsec_entry) 2850a23113b5SSuresh Reddy { 2851a23113b5SSuresh Reddy u32 img_type = le32_to_cpu(fsec_entry.type); 2852a23113b5SSuresh Reddy u16 img_optype = le16_to_cpu(fsec_entry.optype); 2853a23113b5SSuresh Reddy 2854a23113b5SSuresh Reddy if (img_optype != 0xFFFF) 2855a23113b5SSuresh Reddy return img_optype; 2856a23113b5SSuresh Reddy 2857a23113b5SSuresh Reddy switch (img_type) { 2858a23113b5SSuresh Reddy case IMAGE_FIRMWARE_ISCSI: 2859a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_ACTIVE; 2860a23113b5SSuresh Reddy break; 2861a23113b5SSuresh Reddy case IMAGE_BOOT_CODE: 2862a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT; 2863a23113b5SSuresh Reddy break; 2864a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_ISCSI: 2865a23113b5SSuresh Reddy img_optype = OPTYPE_BIOS; 2866a23113b5SSuresh Reddy break; 2867a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_PXE: 2868a23113b5SSuresh Reddy img_optype = OPTYPE_PXE_BIOS; 2869a23113b5SSuresh Reddy break; 2870a23113b5SSuresh Reddy case IMAGE_OPTION_ROM_FCOE: 2871a23113b5SSuresh Reddy img_optype = OPTYPE_FCOE_BIOS; 2872a23113b5SSuresh Reddy break; 2873a23113b5SSuresh Reddy case IMAGE_FIRMWARE_BACKUP_ISCSI: 2874a23113b5SSuresh Reddy img_optype = OPTYPE_ISCSI_BACKUP; 2875a23113b5SSuresh Reddy break; 2876a23113b5SSuresh Reddy case IMAGE_NCSI: 2877a23113b5SSuresh Reddy img_optype = OPTYPE_NCSI_FW; 2878a23113b5SSuresh Reddy break; 2879a23113b5SSuresh Reddy case IMAGE_FLASHISM_JUMPVECTOR: 2880a23113b5SSuresh Reddy img_optype = OPTYPE_FLASHISM_JUMPVECTOR; 2881a23113b5SSuresh Reddy break; 2882a23113b5SSuresh Reddy case IMAGE_FIRMWARE_PHY: 2883a23113b5SSuresh Reddy img_optype = OPTYPE_SH_PHY_FW; 2884a23113b5SSuresh Reddy break; 2885a23113b5SSuresh Reddy case IMAGE_REDBOOT_DIR: 2886a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_DIR; 2887a23113b5SSuresh Reddy break; 2888a23113b5SSuresh Reddy case IMAGE_REDBOOT_CONFIG: 2889a23113b5SSuresh Reddy img_optype = OPTYPE_REDBOOT_CONFIG; 2890a23113b5SSuresh Reddy break; 2891a23113b5SSuresh Reddy case IMAGE_UFI_DIR: 2892a23113b5SSuresh Reddy img_optype = OPTYPE_UFI_DIR; 2893a23113b5SSuresh Reddy break; 2894a23113b5SSuresh Reddy default: 2895a23113b5SSuresh Reddy break; 2896a23113b5SSuresh Reddy } 2897a23113b5SSuresh Reddy 2898a23113b5SSuresh Reddy return img_optype; 2899a23113b5SSuresh Reddy } 2900a23113b5SSuresh Reddy 2901a23113b5SSuresh Reddy static int be_flash_skyhawk(struct be_adapter *adapter, 2902a23113b5SSuresh Reddy const struct firmware *fw, 2903a23113b5SSuresh Reddy struct be_dma_mem *flash_cmd, int num_of_images) 2904a23113b5SSuresh Reddy { 2905a23113b5SSuresh Reddy int img_hdrs_size = num_of_images * sizeof(struct image_hdr); 2906a23113b5SSuresh Reddy bool crc_match, old_fw_img, flash_offset_support = true; 2907a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 2908a23113b5SSuresh Reddy struct flash_section_info *fsec = NULL; 2909a23113b5SSuresh Reddy u32 img_offset, img_size, img_type; 2910a23113b5SSuresh Reddy u16 img_optype, flash_optype; 2911a23113b5SSuresh Reddy int status, i, filehdr_size; 2912a23113b5SSuresh Reddy const u8 *p; 2913a23113b5SSuresh Reddy 2914a23113b5SSuresh Reddy filehdr_size = sizeof(struct flash_file_hdr_g3); 2915a23113b5SSuresh Reddy fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); 2916a23113b5SSuresh Reddy if (!fsec) { 2917a23113b5SSuresh Reddy dev_err(dev, "Invalid Cookie. FW image may be corrupted\n"); 2918a23113b5SSuresh Reddy return -EINVAL; 2919a23113b5SSuresh Reddy } 2920a23113b5SSuresh Reddy 2921a23113b5SSuresh Reddy retry_flash: 2922a23113b5SSuresh Reddy for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { 2923a23113b5SSuresh Reddy img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); 2924a23113b5SSuresh Reddy img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); 2925a23113b5SSuresh Reddy img_type = le32_to_cpu(fsec->fsec_entry[i].type); 2926a23113b5SSuresh Reddy img_optype = be_get_img_optype(fsec->fsec_entry[i]); 2927a23113b5SSuresh Reddy old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF; 2928a23113b5SSuresh Reddy 2929a23113b5SSuresh Reddy if (img_optype == 0xFFFF) 2930a23113b5SSuresh Reddy continue; 2931a23113b5SSuresh Reddy 2932a23113b5SSuresh Reddy if (flash_offset_support) 2933a23113b5SSuresh Reddy flash_optype = OPTYPE_OFFSET_SPECIFIED; 2934a23113b5SSuresh Reddy else 2935a23113b5SSuresh Reddy flash_optype = img_optype; 2936a23113b5SSuresh Reddy 2937a23113b5SSuresh Reddy /* Don't bother verifying CRC if an old FW image is being 2938a23113b5SSuresh Reddy * flashed 2939a23113b5SSuresh Reddy */ 2940a23113b5SSuresh Reddy if (old_fw_img) 2941a23113b5SSuresh Reddy goto flash; 2942a23113b5SSuresh Reddy 2943a23113b5SSuresh Reddy status = be_check_flash_crc(adapter, fw->data, img_offset, 2944a23113b5SSuresh Reddy img_size, filehdr_size + 2945a23113b5SSuresh Reddy img_hdrs_size, flash_optype, 2946a23113b5SSuresh Reddy &crc_match); 2947a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 2948a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_ILLEGAL_FIELD) { 2949a23113b5SSuresh Reddy /* The current FW image on the card does not support 2950a23113b5SSuresh Reddy * OFFSET based flashing. Retry using older mechanism 2951a23113b5SSuresh Reddy * of OPTYPE based flashing 2952a23113b5SSuresh Reddy */ 2953a23113b5SSuresh Reddy if (flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2954a23113b5SSuresh Reddy flash_offset_support = false; 2955a23113b5SSuresh Reddy goto retry_flash; 2956a23113b5SSuresh Reddy } 2957a23113b5SSuresh Reddy 2958a23113b5SSuresh Reddy /* The current FW image on the card does not recognize 2959a23113b5SSuresh Reddy * the new FLASH op_type. The FW download is partially 2960a23113b5SSuresh Reddy * complete. Reboot the server now to enable FW image 2961a23113b5SSuresh Reddy * to recognize the new FLASH op_type. To complete the 2962a23113b5SSuresh Reddy * remaining process, download the same FW again after 2963a23113b5SSuresh Reddy * the reboot. 2964a23113b5SSuresh Reddy */ 2965a23113b5SSuresh Reddy dev_err(dev, "Flash incomplete. Reset the server\n"); 2966a23113b5SSuresh Reddy dev_err(dev, "Download FW image again after reset\n"); 2967a23113b5SSuresh Reddy return -EAGAIN; 2968a23113b5SSuresh Reddy } else if (status) { 2969a23113b5SSuresh Reddy dev_err(dev, "Could not get CRC for 0x%x region\n", 2970a23113b5SSuresh Reddy img_optype); 2971a23113b5SSuresh Reddy return -EFAULT; 2972a23113b5SSuresh Reddy } 2973a23113b5SSuresh Reddy 2974a23113b5SSuresh Reddy if (crc_match) 2975a23113b5SSuresh Reddy continue; 2976a23113b5SSuresh Reddy 2977a23113b5SSuresh Reddy flash: 2978a23113b5SSuresh Reddy p = fw->data + filehdr_size + img_offset + img_hdrs_size; 2979a23113b5SSuresh Reddy if (p + img_size > fw->data + fw->size) 2980a23113b5SSuresh Reddy return -1; 2981a23113b5SSuresh Reddy 2982a23113b5SSuresh Reddy status = be_flash(adapter, p, flash_cmd, flash_optype, img_size, 2983a23113b5SSuresh Reddy img_offset); 2984a23113b5SSuresh Reddy 2985a23113b5SSuresh Reddy /* The current FW image on the card does not support OFFSET 2986a23113b5SSuresh Reddy * based flashing. Retry using older mechanism of OPTYPE based 2987a23113b5SSuresh Reddy * flashing 2988a23113b5SSuresh Reddy */ 2989a23113b5SSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD && 2990a23113b5SSuresh Reddy flash_optype == OPTYPE_OFFSET_SPECIFIED) { 2991a23113b5SSuresh Reddy flash_offset_support = false; 2992a23113b5SSuresh Reddy goto retry_flash; 2993a23113b5SSuresh Reddy } 2994a23113b5SSuresh Reddy 2995a23113b5SSuresh Reddy /* For old FW images ignore ILLEGAL_FIELD error or errors on 2996a23113b5SSuresh Reddy * UFI_DIR region 2997a23113b5SSuresh Reddy */ 2998a23113b5SSuresh Reddy if (old_fw_img && 2999a23113b5SSuresh Reddy (base_status(status) == MCC_STATUS_ILLEGAL_FIELD || 3000a23113b5SSuresh Reddy (img_optype == OPTYPE_UFI_DIR && 3001a23113b5SSuresh Reddy base_status(status) == MCC_STATUS_FAILED))) { 3002a23113b5SSuresh Reddy continue; 3003a23113b5SSuresh Reddy } else if (status) { 3004a23113b5SSuresh Reddy dev_err(dev, "Flashing section type 0x%x failed\n", 3005a23113b5SSuresh Reddy img_type); 30066b525782SSuresh Reddy 30076b525782SSuresh Reddy switch (addl_status(status)) { 30086b525782SSuresh Reddy case MCC_ADDL_STATUS_MISSING_SIGNATURE: 30096b525782SSuresh Reddy dev_err(dev, 30106b525782SSuresh Reddy "Digital signature missing in FW\n"); 30116b525782SSuresh Reddy return -EINVAL; 30126b525782SSuresh Reddy case MCC_ADDL_STATUS_INVALID_SIGNATURE: 30136b525782SSuresh Reddy dev_err(dev, 30146b525782SSuresh Reddy "Invalid digital signature in FW\n"); 30156b525782SSuresh Reddy return -EINVAL; 30166b525782SSuresh Reddy default: 3017a23113b5SSuresh Reddy return -EFAULT; 3018a23113b5SSuresh Reddy } 3019a23113b5SSuresh Reddy } 30206b525782SSuresh Reddy } 3021a23113b5SSuresh Reddy return 0; 3022a23113b5SSuresh Reddy } 3023a23113b5SSuresh Reddy 3024a23113b5SSuresh Reddy int lancer_fw_download(struct be_adapter *adapter, 3025a23113b5SSuresh Reddy const struct firmware *fw) 3026a23113b5SSuresh Reddy { 3027a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3028a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3029a23113b5SSuresh Reddy const u8 *data_ptr = NULL; 3030a23113b5SSuresh Reddy u8 *dest_image_ptr = NULL; 3031a23113b5SSuresh Reddy size_t image_size = 0; 3032a23113b5SSuresh Reddy u32 chunk_size = 0; 3033a23113b5SSuresh Reddy u32 data_written = 0; 3034a23113b5SSuresh Reddy u32 offset = 0; 3035a23113b5SSuresh Reddy int status = 0; 3036a23113b5SSuresh Reddy u8 add_status = 0; 3037a23113b5SSuresh Reddy u8 change_status; 3038a23113b5SSuresh Reddy 3039a23113b5SSuresh Reddy if (!IS_ALIGNED(fw->size, sizeof(u32))) { 3040a23113b5SSuresh Reddy dev_err(dev, "FW image size should be multiple of 4\n"); 3041a23113b5SSuresh Reddy return -EINVAL; 3042a23113b5SSuresh Reddy } 3043a23113b5SSuresh Reddy 3044a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) 3045a23113b5SSuresh Reddy + LANCER_FW_DOWNLOAD_CHUNK; 3046a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, 3047a23113b5SSuresh Reddy &flash_cmd.dma, GFP_KERNEL); 3048a23113b5SSuresh Reddy if (!flash_cmd.va) 3049a23113b5SSuresh Reddy return -ENOMEM; 3050a23113b5SSuresh Reddy 3051a23113b5SSuresh Reddy dest_image_ptr = flash_cmd.va + 3052a23113b5SSuresh Reddy sizeof(struct lancer_cmd_req_write_object); 3053a23113b5SSuresh Reddy image_size = fw->size; 3054a23113b5SSuresh Reddy data_ptr = fw->data; 3055a23113b5SSuresh Reddy 3056a23113b5SSuresh Reddy while (image_size) { 3057a23113b5SSuresh Reddy chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); 3058a23113b5SSuresh Reddy 3059a23113b5SSuresh Reddy /* Copy the image chunk content. */ 3060a23113b5SSuresh Reddy memcpy(dest_image_ptr, data_ptr, chunk_size); 3061a23113b5SSuresh Reddy 3062a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3063a23113b5SSuresh Reddy chunk_size, offset, 3064a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3065a23113b5SSuresh Reddy &data_written, &change_status, 3066a23113b5SSuresh Reddy &add_status); 3067a23113b5SSuresh Reddy if (status) 3068a23113b5SSuresh Reddy break; 3069a23113b5SSuresh Reddy 3070a23113b5SSuresh Reddy offset += data_written; 3071a23113b5SSuresh Reddy data_ptr += data_written; 3072a23113b5SSuresh Reddy image_size -= data_written; 3073a23113b5SSuresh Reddy } 3074a23113b5SSuresh Reddy 3075a23113b5SSuresh Reddy if (!status) { 3076a23113b5SSuresh Reddy /* Commit the FW written */ 3077a23113b5SSuresh Reddy status = lancer_cmd_write_object(adapter, &flash_cmd, 3078a23113b5SSuresh Reddy 0, offset, 3079a23113b5SSuresh Reddy LANCER_FW_DOWNLOAD_LOCATION, 3080a23113b5SSuresh Reddy &data_written, &change_status, 3081a23113b5SSuresh Reddy &add_status); 3082a23113b5SSuresh Reddy } 3083a23113b5SSuresh Reddy 3084a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3085a23113b5SSuresh Reddy if (status) { 3086a23113b5SSuresh Reddy dev_err(dev, "Firmware load error\n"); 3087a23113b5SSuresh Reddy return be_cmd_status(status); 3088a23113b5SSuresh Reddy } 3089a23113b5SSuresh Reddy 3090a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3091a23113b5SSuresh Reddy 3092a23113b5SSuresh Reddy if (change_status == LANCER_FW_RESET_NEEDED) { 3093a23113b5SSuresh Reddy dev_info(dev, "Resetting adapter to activate new FW\n"); 3094a23113b5SSuresh Reddy status = lancer_physdev_ctrl(adapter, 3095a23113b5SSuresh Reddy PHYSDEV_CONTROL_FW_RESET_MASK); 3096a23113b5SSuresh Reddy if (status) { 3097a23113b5SSuresh Reddy dev_err(dev, "Adapter busy, could not reset FW\n"); 3098a23113b5SSuresh Reddy dev_err(dev, "Reboot server to activate new FW\n"); 3099a23113b5SSuresh Reddy } 3100a23113b5SSuresh Reddy } else if (change_status != LANCER_NO_RESET_NEEDED) { 3101a23113b5SSuresh Reddy dev_info(dev, "Reboot server to activate new FW\n"); 3102a23113b5SSuresh Reddy } 3103a23113b5SSuresh Reddy 3104a23113b5SSuresh Reddy return 0; 3105a23113b5SSuresh Reddy } 3106a23113b5SSuresh Reddy 3107a23113b5SSuresh Reddy /* Check if the flash image file is compatible with the adapter that 3108a23113b5SSuresh Reddy * is being flashed. 3109a23113b5SSuresh Reddy */ 3110a23113b5SSuresh Reddy static bool be_check_ufi_compatibility(struct be_adapter *adapter, 3111a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr) 3112a23113b5SSuresh Reddy { 3113a23113b5SSuresh Reddy if (!fhdr) { 3114a23113b5SSuresh Reddy dev_err(&adapter->pdev->dev, "Invalid FW UFI file"); 3115a23113b5SSuresh Reddy return false; 3116a23113b5SSuresh Reddy } 3117a23113b5SSuresh Reddy 3118a23113b5SSuresh Reddy /* First letter of the build version is used to identify 3119a23113b5SSuresh Reddy * which chip this image file is meant for. 3120a23113b5SSuresh Reddy */ 3121a23113b5SSuresh Reddy switch (fhdr->build[0]) { 3122a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_SH: 3123a23113b5SSuresh Reddy if (!skyhawk_chip(adapter)) 3124a23113b5SSuresh Reddy return false; 3125a23113b5SSuresh Reddy break; 3126a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE3: 3127a23113b5SSuresh Reddy if (!BE3_chip(adapter)) 3128a23113b5SSuresh Reddy return false; 3129a23113b5SSuresh Reddy break; 3130a23113b5SSuresh Reddy case BLD_STR_UFI_TYPE_BE2: 3131a23113b5SSuresh Reddy if (!BE2_chip(adapter)) 3132a23113b5SSuresh Reddy return false; 3133a23113b5SSuresh Reddy break; 3134a23113b5SSuresh Reddy default: 3135a23113b5SSuresh Reddy return false; 3136a23113b5SSuresh Reddy } 3137a23113b5SSuresh Reddy 3138a23113b5SSuresh Reddy /* In BE3 FW images the "asic_type_rev" field doesn't track the 3139a23113b5SSuresh Reddy * asic_rev of the chips it is compatible with. 3140a23113b5SSuresh Reddy * When asic_type_rev is 0 the image is compatible only with 3141a23113b5SSuresh Reddy * pre-BE3-R chips (asic_rev < 0x10) 3142a23113b5SSuresh Reddy */ 3143a23113b5SSuresh Reddy if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) 3144a23113b5SSuresh Reddy return adapter->asic_rev < 0x10; 3145a23113b5SSuresh Reddy else 3146a23113b5SSuresh Reddy return (fhdr->asic_type_rev >= adapter->asic_rev); 3147a23113b5SSuresh Reddy } 3148a23113b5SSuresh Reddy 3149a23113b5SSuresh Reddy int be_fw_download(struct be_adapter *adapter, const struct firmware *fw) 3150a23113b5SSuresh Reddy { 3151a23113b5SSuresh Reddy struct device *dev = &adapter->pdev->dev; 3152a23113b5SSuresh Reddy struct flash_file_hdr_g3 *fhdr3; 3153a23113b5SSuresh Reddy struct image_hdr *img_hdr_ptr; 3154a23113b5SSuresh Reddy int status = 0, i, num_imgs; 3155a23113b5SSuresh Reddy struct be_dma_mem flash_cmd; 3156a23113b5SSuresh Reddy 3157a23113b5SSuresh Reddy fhdr3 = (struct flash_file_hdr_g3 *)fw->data; 3158a23113b5SSuresh Reddy if (!be_check_ufi_compatibility(adapter, fhdr3)) { 3159a23113b5SSuresh Reddy dev_err(dev, "Flash image is not compatible with adapter\n"); 3160a23113b5SSuresh Reddy return -EINVAL; 3161a23113b5SSuresh Reddy } 3162a23113b5SSuresh Reddy 3163a23113b5SSuresh Reddy flash_cmd.size = sizeof(struct be_cmd_write_flashrom); 3164a23113b5SSuresh Reddy flash_cmd.va = dma_zalloc_coherent(dev, flash_cmd.size, &flash_cmd.dma, 3165a23113b5SSuresh Reddy GFP_KERNEL); 3166a23113b5SSuresh Reddy if (!flash_cmd.va) 3167a23113b5SSuresh Reddy return -ENOMEM; 3168a23113b5SSuresh Reddy 3169a23113b5SSuresh Reddy num_imgs = le32_to_cpu(fhdr3->num_imgs); 3170a23113b5SSuresh Reddy for (i = 0; i < num_imgs; i++) { 3171a23113b5SSuresh Reddy img_hdr_ptr = (struct image_hdr *)(fw->data + 3172a23113b5SSuresh Reddy (sizeof(struct flash_file_hdr_g3) + 3173a23113b5SSuresh Reddy i * sizeof(struct image_hdr))); 3174a23113b5SSuresh Reddy if (!BE2_chip(adapter) && 3175a23113b5SSuresh Reddy le32_to_cpu(img_hdr_ptr->imageid) != 1) 3176a23113b5SSuresh Reddy continue; 3177a23113b5SSuresh Reddy 3178a23113b5SSuresh Reddy if (skyhawk_chip(adapter)) 3179a23113b5SSuresh Reddy status = be_flash_skyhawk(adapter, fw, &flash_cmd, 3180a23113b5SSuresh Reddy num_imgs); 3181a23113b5SSuresh Reddy else 3182a23113b5SSuresh Reddy status = be_flash_BEx(adapter, fw, &flash_cmd, 3183a23113b5SSuresh Reddy num_imgs); 3184a23113b5SSuresh Reddy } 3185a23113b5SSuresh Reddy 3186a23113b5SSuresh Reddy dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma); 3187a23113b5SSuresh Reddy if (!status) 3188a23113b5SSuresh Reddy dev_info(dev, "Firmware flashed successfully\n"); 3189a23113b5SSuresh Reddy 3190a23113b5SSuresh Reddy return status; 3191a23113b5SSuresh Reddy } 3192a23113b5SSuresh Reddy 31939aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 31949aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 31959aebddd1SJeff Kirsher { 31969aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 31979aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 31989aebddd1SJeff Kirsher int status; 31999aebddd1SJeff Kirsher 3200b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32019aebddd1SJeff Kirsher 32029aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32039aebddd1SJeff Kirsher if (!wrb) { 32049aebddd1SJeff Kirsher status = -EBUSY; 32059aebddd1SJeff Kirsher goto err; 32069aebddd1SJeff Kirsher } 32079aebddd1SJeff Kirsher req = nonemb_cmd->va; 32089aebddd1SJeff Kirsher 3209106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 3210a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 3211a2cc4e0bSSathya Perla wrb, nonemb_cmd); 32129aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 32139aebddd1SJeff Kirsher 32149aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 32159aebddd1SJeff Kirsher 32169aebddd1SJeff Kirsher err: 3217b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32189aebddd1SJeff Kirsher return status; 32199aebddd1SJeff Kirsher } 32209aebddd1SJeff Kirsher 32219aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 32229aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 32239aebddd1SJeff Kirsher { 32249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32259aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 32269aebddd1SJeff Kirsher int status; 32279aebddd1SJeff Kirsher 32282e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, 32292e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32302e365b1bSSomnath Kotur return -EPERM; 32312e365b1bSSomnath Kotur 3232b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32339aebddd1SJeff Kirsher 32349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32359aebddd1SJeff Kirsher if (!wrb) { 32369aebddd1SJeff Kirsher status = -EBUSY; 32379c855975SSuresh Reddy goto err_unlock; 32389aebddd1SJeff Kirsher } 32399aebddd1SJeff Kirsher 32409aebddd1SJeff Kirsher req = embedded_payload(wrb); 32419aebddd1SJeff Kirsher 3242106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3243a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 3244a2cc4e0bSSathya Perla wrb, NULL); 32459aebddd1SJeff Kirsher 32469aebddd1SJeff Kirsher req->src_port = port_num; 32479aebddd1SJeff Kirsher req->dest_port = port_num; 32489aebddd1SJeff Kirsher req->loopback_type = loopback_type; 32499aebddd1SJeff Kirsher req->loopback_state = enable; 32509aebddd1SJeff Kirsher 32519c855975SSuresh Reddy status = be_mcc_notify(adapter); 32529c855975SSuresh Reddy if (status) 32539c855975SSuresh Reddy goto err_unlock; 32549c855975SSuresh Reddy 3255b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32569c855975SSuresh Reddy 32579c855975SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 32589c855975SSuresh Reddy msecs_to_jiffies(SET_LB_MODE_TIMEOUT))) 32599c855975SSuresh Reddy status = -ETIMEDOUT; 32609c855975SSuresh Reddy 32619c855975SSuresh Reddy return status; 32629c855975SSuresh Reddy 32639c855975SSuresh Reddy err_unlock: 3264b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 32659aebddd1SJeff Kirsher return status; 32669aebddd1SJeff Kirsher } 32679aebddd1SJeff Kirsher 32689aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 3269a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 3270a2cc4e0bSSathya Perla u64 pattern) 32719aebddd1SJeff Kirsher { 32729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 32739aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 32745eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 32759aebddd1SJeff Kirsher int status; 32769aebddd1SJeff Kirsher 32772e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_LOOPBACK_TEST, 32782e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 32792e365b1bSSomnath Kotur return -EPERM; 32802e365b1bSSomnath Kotur 3281b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 32829aebddd1SJeff Kirsher 32839aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 32849aebddd1SJeff Kirsher if (!wrb) { 32859aebddd1SJeff Kirsher status = -EBUSY; 32869aebddd1SJeff Kirsher goto err; 32879aebddd1SJeff Kirsher } 32889aebddd1SJeff Kirsher 32899aebddd1SJeff Kirsher req = embedded_payload(wrb); 32909aebddd1SJeff Kirsher 3291106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3292a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 3293a2cc4e0bSSathya Perla NULL); 32949aebddd1SJeff Kirsher 32955eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 32969aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 32979aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 32989aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 32999aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 33009aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 33019aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 33029aebddd1SJeff Kirsher 3303efaa408eSSuresh Reddy status = be_mcc_notify(adapter); 3304efaa408eSSuresh Reddy if (status) 3305efaa408eSSuresh Reddy goto err; 33069aebddd1SJeff Kirsher 3307b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33085eeff635SSuresh Reddy 33095eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 33105eeff635SSuresh Reddy resp = embedded_payload(wrb); 33115eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 33125eeff635SSuresh Reddy 33135eeff635SSuresh Reddy return status; 33149aebddd1SJeff Kirsher err: 3315b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33169aebddd1SJeff Kirsher return status; 33179aebddd1SJeff Kirsher } 33189aebddd1SJeff Kirsher 33199aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 33209aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 33219aebddd1SJeff Kirsher { 33229aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33239aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 33249aebddd1SJeff Kirsher int status; 33259aebddd1SJeff Kirsher int i, j = 0; 33269aebddd1SJeff Kirsher 33272e365b1bSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_LOWLEVEL_HOST_DDR_DMA, 33282e365b1bSSomnath Kotur CMD_SUBSYSTEM_LOWLEVEL)) 33292e365b1bSSomnath Kotur return -EPERM; 33302e365b1bSSomnath Kotur 3331b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33329aebddd1SJeff Kirsher 33339aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33349aebddd1SJeff Kirsher if (!wrb) { 33359aebddd1SJeff Kirsher status = -EBUSY; 33369aebddd1SJeff Kirsher goto err; 33379aebddd1SJeff Kirsher } 33389aebddd1SJeff Kirsher req = cmd->va; 3339106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 3340a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 3341a2cc4e0bSSathya Perla cmd); 33429aebddd1SJeff Kirsher 33439aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 33449aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 33459aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 33469aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 33479aebddd1SJeff Kirsher j++; 33489aebddd1SJeff Kirsher if (j > 7) 33499aebddd1SJeff Kirsher j = 0; 33509aebddd1SJeff Kirsher } 33519aebddd1SJeff Kirsher 33529aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33539aebddd1SJeff Kirsher 33549aebddd1SJeff Kirsher if (!status) { 33559aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 335603d28ffeSKalesh AP 33579aebddd1SJeff Kirsher resp = cmd->va; 33589aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 33599aebddd1SJeff Kirsher resp->snd_err) { 33609aebddd1SJeff Kirsher status = -1; 33619aebddd1SJeff Kirsher } 33629aebddd1SJeff Kirsher } 33639aebddd1SJeff Kirsher 33649aebddd1SJeff Kirsher err: 3365b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33669aebddd1SJeff Kirsher return status; 33679aebddd1SJeff Kirsher } 33689aebddd1SJeff Kirsher 33699aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 33709aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 33719aebddd1SJeff Kirsher { 33729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33739aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 33749aebddd1SJeff Kirsher int status; 33759aebddd1SJeff Kirsher 3376b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 33779aebddd1SJeff Kirsher 33789aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 33799aebddd1SJeff Kirsher if (!wrb) { 33809aebddd1SJeff Kirsher status = -EBUSY; 33819aebddd1SJeff Kirsher goto err; 33829aebddd1SJeff Kirsher } 33839aebddd1SJeff Kirsher req = nonemb_cmd->va; 33849aebddd1SJeff Kirsher 3385106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3386106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 3387106df1e3SSomnath Kotur nonemb_cmd); 33889aebddd1SJeff Kirsher 33899aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 33909aebddd1SJeff Kirsher 33919aebddd1SJeff Kirsher err: 3392b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 33939aebddd1SJeff Kirsher return status; 33949aebddd1SJeff Kirsher } 33959aebddd1SJeff Kirsher 339642f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 33979aebddd1SJeff Kirsher { 33989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 33999aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 34009aebddd1SJeff Kirsher struct be_dma_mem cmd; 34019aebddd1SJeff Kirsher int status; 34029aebddd1SJeff Kirsher 3403f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 3404f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 3405f25b119cSPadmanabh Ratnakar return -EPERM; 3406f25b119cSPadmanabh Ratnakar 3407b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34089aebddd1SJeff Kirsher 34099aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34109aebddd1SJeff Kirsher if (!wrb) { 34119aebddd1SJeff Kirsher status = -EBUSY; 34129aebddd1SJeff Kirsher goto err; 34139aebddd1SJeff Kirsher } 34149aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 3415e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3416e51000dbSSriharsha Basavapatna GFP_ATOMIC); 34179aebddd1SJeff Kirsher if (!cmd.va) { 34189aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 34199aebddd1SJeff Kirsher status = -ENOMEM; 34209aebddd1SJeff Kirsher goto err; 34219aebddd1SJeff Kirsher } 34229aebddd1SJeff Kirsher 34239aebddd1SJeff Kirsher req = cmd.va; 34249aebddd1SJeff Kirsher 3425106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3426106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 3427106df1e3SSomnath Kotur wrb, &cmd); 34289aebddd1SJeff Kirsher 34299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34309aebddd1SJeff Kirsher if (!status) { 34319aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 34329aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 343303d28ffeSKalesh AP 343442f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 343542f11cf2SAjit Khaparde adapter->phy.interface_type = 34369aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 343742f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 343842f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 343942f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 344042f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 344142f11cf2SAjit Khaparde adapter->phy.misc_params = 344242f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 344368cb7e47SVasundhara Volam 344468cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 344568cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 344668cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 344768cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 344868cb7e47SVasundhara Volam } 34499aebddd1SJeff Kirsher } 3450e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 34519aebddd1SJeff Kirsher err: 3452b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34539aebddd1SJeff Kirsher return status; 34549aebddd1SJeff Kirsher } 34559aebddd1SJeff Kirsher 3456bc0ee163SLad, Prabhakar static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 34579aebddd1SJeff Kirsher { 34589aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34599aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 34609aebddd1SJeff Kirsher int status; 34619aebddd1SJeff Kirsher 3462b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 34639aebddd1SJeff Kirsher 34649aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 34659aebddd1SJeff Kirsher if (!wrb) { 34669aebddd1SJeff Kirsher status = -EBUSY; 34679aebddd1SJeff Kirsher goto err; 34689aebddd1SJeff Kirsher } 34699aebddd1SJeff Kirsher 34709aebddd1SJeff Kirsher req = embedded_payload(wrb); 34719aebddd1SJeff Kirsher 3472106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3473106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 34749aebddd1SJeff Kirsher 34759aebddd1SJeff Kirsher req->hdr.domain = domain; 34769aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 34779aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 34789aebddd1SJeff Kirsher 34799aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 34809aebddd1SJeff Kirsher 34819aebddd1SJeff Kirsher err: 3482b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 34839aebddd1SJeff Kirsher return status; 34849aebddd1SJeff Kirsher } 34859aebddd1SJeff Kirsher 34869aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 34879aebddd1SJeff Kirsher { 34889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 34899aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 34909aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 3491a155a5dbSSriharsha Basavapatna int status, i; 34929aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 34939aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 34949aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 3495a155a5dbSSriharsha Basavapatna u32 *serial_num; 34969aebddd1SJeff Kirsher 3497d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3498d98ef50fSSuresh Reddy return -1; 3499d98ef50fSSuresh Reddy 35009aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 35019aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 3502e51000dbSSriharsha Basavapatna attribs_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3503e51000dbSSriharsha Basavapatna attribs_cmd.size, 3504e51000dbSSriharsha Basavapatna &attribs_cmd.dma, GFP_ATOMIC); 35059aebddd1SJeff Kirsher if (!attribs_cmd.va) { 3506a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3507d98ef50fSSuresh Reddy status = -ENOMEM; 3508d98ef50fSSuresh Reddy goto err; 35099aebddd1SJeff Kirsher } 35109aebddd1SJeff Kirsher 35119aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35129aebddd1SJeff Kirsher if (!wrb) { 35139aebddd1SJeff Kirsher status = -EBUSY; 35149aebddd1SJeff Kirsher goto err; 35159aebddd1SJeff Kirsher } 35169aebddd1SJeff Kirsher req = attribs_cmd.va; 35179aebddd1SJeff Kirsher 3518106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3519a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 3520a2cc4e0bSSathya Perla wrb, &attribs_cmd); 35219aebddd1SJeff Kirsher 35229aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35239aebddd1SJeff Kirsher if (!status) { 35249aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 35259aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 3526a155a5dbSSriharsha Basavapatna serial_num = attribs->hba_attribs.controller_serial_number; 3527a155a5dbSSriharsha Basavapatna for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) 3528a155a5dbSSriharsha Basavapatna adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & 3529a155a5dbSSriharsha Basavapatna (BIT_MASK(16) - 1); 35309aebddd1SJeff Kirsher } 35319aebddd1SJeff Kirsher 35329aebddd1SJeff Kirsher err: 35339aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 3534d98ef50fSSuresh Reddy if (attribs_cmd.va) 3535e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, attribs_cmd.size, 3536d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 35379aebddd1SJeff Kirsher return status; 35389aebddd1SJeff Kirsher } 35399aebddd1SJeff Kirsher 35409aebddd1SJeff Kirsher /* Uses mbox */ 35419aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 35429aebddd1SJeff Kirsher { 35439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 35449aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 35459aebddd1SJeff Kirsher int status; 35469aebddd1SJeff Kirsher 35479aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 35489aebddd1SJeff Kirsher return -1; 35499aebddd1SJeff Kirsher 35509aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 35519aebddd1SJeff Kirsher if (!wrb) { 35529aebddd1SJeff Kirsher status = -EBUSY; 35539aebddd1SJeff Kirsher goto err; 35549aebddd1SJeff Kirsher } 35559aebddd1SJeff Kirsher 35569aebddd1SJeff Kirsher req = embedded_payload(wrb); 35579aebddd1SJeff Kirsher 3558106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3559a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 3560a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 35619aebddd1SJeff Kirsher 35629aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 35639aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 35649aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 35659aebddd1SJeff Kirsher 35669aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 35679aebddd1SJeff Kirsher if (!status) { 35689aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 356903d28ffeSKalesh AP 35709aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 35719aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 3572d379142bSSathya Perla if (!adapter->be3_native) 3573d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 3574d379142bSSathya Perla "adapter not in advanced mode\n"); 35759aebddd1SJeff Kirsher } 35769aebddd1SJeff Kirsher err: 35779aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 35789aebddd1SJeff Kirsher return status; 35799aebddd1SJeff Kirsher } 3580590c391dSPadmanabh Ratnakar 3581f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 3582f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 3583f25b119cSPadmanabh Ratnakar u32 domain) 3584f25b119cSPadmanabh Ratnakar { 3585f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3586f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 3587f25b119cSPadmanabh Ratnakar int status; 3588f25b119cSPadmanabh Ratnakar 3589b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3590f25b119cSPadmanabh Ratnakar 3591f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3592f25b119cSPadmanabh Ratnakar if (!wrb) { 3593f25b119cSPadmanabh Ratnakar status = -EBUSY; 3594f25b119cSPadmanabh Ratnakar goto err; 3595f25b119cSPadmanabh Ratnakar } 3596f25b119cSPadmanabh Ratnakar 3597f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 3598f25b119cSPadmanabh Ratnakar 3599f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3600f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 3601f25b119cSPadmanabh Ratnakar wrb, NULL); 3602f25b119cSPadmanabh Ratnakar 3603f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 3604f25b119cSPadmanabh Ratnakar 3605f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3606f25b119cSPadmanabh Ratnakar if (!status) { 3607f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 3608f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 360903d28ffeSKalesh AP 3610f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 361102308d74SSuresh Reddy 361202308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 361302308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 361402308d74SSuresh Reddy */ 361502308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 361602308d74SSuresh Reddy be_physfn(adapter)) 361702308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 3618f25b119cSPadmanabh Ratnakar } 3619f25b119cSPadmanabh Ratnakar 3620f25b119cSPadmanabh Ratnakar err: 3621b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3622f25b119cSPadmanabh Ratnakar return status; 3623f25b119cSPadmanabh Ratnakar } 3624f25b119cSPadmanabh Ratnakar 362504a06028SSathya Perla /* Set privilege(s) for a function */ 362604a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 362704a06028SSathya Perla u32 domain) 362804a06028SSathya Perla { 362904a06028SSathya Perla struct be_mcc_wrb *wrb; 363004a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 363104a06028SSathya Perla int status; 363204a06028SSathya Perla 3633b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 363404a06028SSathya Perla 363504a06028SSathya Perla wrb = wrb_from_mccq(adapter); 363604a06028SSathya Perla if (!wrb) { 363704a06028SSathya Perla status = -EBUSY; 363804a06028SSathya Perla goto err; 363904a06028SSathya Perla } 364004a06028SSathya Perla 364104a06028SSathya Perla req = embedded_payload(wrb); 364204a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 364304a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 364404a06028SSathya Perla wrb, NULL); 364504a06028SSathya Perla req->hdr.domain = domain; 364604a06028SSathya Perla if (lancer_chip(adapter)) 364704a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 364804a06028SSathya Perla else 364904a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 365004a06028SSathya Perla 365104a06028SSathya Perla status = be_mcc_notify_wait(adapter); 365204a06028SSathya Perla err: 3653b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 365404a06028SSathya Perla return status; 365504a06028SSathya Perla } 365604a06028SSathya Perla 36575a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 36585a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 36595a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 36605a712c13SSathya Perla */ 36611578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 3662b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 3663b188f090SSuresh Reddy u8 domain) 3664590c391dSPadmanabh Ratnakar { 3665590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3666590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 3667590c391dSPadmanabh Ratnakar int status; 3668590c391dSPadmanabh Ratnakar int mac_count; 3669e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 3670e5e1ee89SPadmanabh Ratnakar int i; 3671e5e1ee89SPadmanabh Ratnakar 3672e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 3673e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 3674e51000dbSSriharsha Basavapatna get_mac_list_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 3675e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 3676e51000dbSSriharsha Basavapatna &get_mac_list_cmd.dma, 3677e51000dbSSriharsha Basavapatna GFP_ATOMIC); 3678e5e1ee89SPadmanabh Ratnakar 3679e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 3680e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 3681e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 3682e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 3683e5e1ee89SPadmanabh Ratnakar } 3684590c391dSPadmanabh Ratnakar 3685b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3686590c391dSPadmanabh Ratnakar 3687590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3688590c391dSPadmanabh Ratnakar if (!wrb) { 3689590c391dSPadmanabh Ratnakar status = -EBUSY; 3690e5e1ee89SPadmanabh Ratnakar goto out; 3691590c391dSPadmanabh Ratnakar } 3692e5e1ee89SPadmanabh Ratnakar 3693e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 3694590c391dSPadmanabh Ratnakar 3695590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3696bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 3697bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 3698590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3699e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 37005a712c13SSathya Perla if (*pmac_id_valid) { 37015a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 3702b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 37035a712c13SSathya Perla req->perm_override = 0; 37045a712c13SSathya Perla } else { 3705e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 37065a712c13SSathya Perla } 3707590c391dSPadmanabh Ratnakar 3708590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3709590c391dSPadmanabh Ratnakar if (!status) { 3710590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 3711e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 37125a712c13SSathya Perla 37135a712c13SSathya Perla if (*pmac_id_valid) { 37145a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 37155a712c13SSathya Perla ETH_ALEN); 37165a712c13SSathya Perla goto out; 37175a712c13SSathya Perla } 37185a712c13SSathya Perla 3719e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3720e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 3721dbedd44eSJoe Perches * or one or more true or pseudo permanent mac addresses. 37221578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 37231578e777SPadmanabh Ratnakar * found. 3724e5e1ee89SPadmanabh Ratnakar */ 3725590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3726e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3727e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3728e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3729e5e1ee89SPadmanabh Ratnakar 3730e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3731e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3732e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3733e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3734e5e1ee89SPadmanabh Ratnakar */ 3735e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 37365a712c13SSathya Perla *pmac_id_valid = true; 3737e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3738e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3739e5e1ee89SPadmanabh Ratnakar goto out; 3740590c391dSPadmanabh Ratnakar } 3741590c391dSPadmanabh Ratnakar } 37421578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 37435a712c13SSathya Perla *pmac_id_valid = false; 3744e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3745e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3746590c391dSPadmanabh Ratnakar } 3747590c391dSPadmanabh Ratnakar 3748e5e1ee89SPadmanabh Ratnakar out: 3749b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3750e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, get_mac_list_cmd.size, 3751e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3752590c391dSPadmanabh Ratnakar return status; 3753590c391dSPadmanabh Ratnakar } 3754590c391dSPadmanabh Ratnakar 3755a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3756a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 37575a712c13SSathya Perla { 3758b188f090SSuresh Reddy if (!active) 3759b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3760b188f090SSuresh Reddy if_handle, domain); 37613175d8c2SSathya Perla if (BEx_chip(adapter)) 37625a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3763b188f090SSuresh Reddy if_handle, curr_pmac_id); 37643175d8c2SSathya Perla else 37653175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 37663175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3767b188f090SSuresh Reddy &curr_pmac_id, 3768b188f090SSuresh Reddy if_handle, domain); 37695a712c13SSathya Perla } 37705a712c13SSathya Perla 377195046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 377295046b92SSathya Perla { 377395046b92SSathya Perla int status; 377495046b92SSathya Perla bool pmac_valid = false; 377595046b92SSathya Perla 3776c7bf7169SJoe Perches eth_zero_addr(mac); 377795046b92SSathya Perla 37783175d8c2SSathya Perla if (BEx_chip(adapter)) { 37793175d8c2SSathya Perla if (be_physfn(adapter)) 37803175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 37813175d8c2SSathya Perla 0); 378295046b92SSathya Perla else 378395046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 378495046b92SSathya Perla adapter->if_handle, 0); 37853175d8c2SSathya Perla } else { 37863175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3787b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 37883175d8c2SSathya Perla } 37893175d8c2SSathya Perla 379095046b92SSathya Perla return status; 379195046b92SSathya Perla } 379295046b92SSathya Perla 3793590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3794590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3795590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3796590c391dSPadmanabh Ratnakar { 3797590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3798590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3799590c391dSPadmanabh Ratnakar int status; 3800590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3801590c391dSPadmanabh Ratnakar 3802590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3803590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3804e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 3805e51000dbSSriharsha Basavapatna GFP_KERNEL); 3806d0320f75SJoe Perches if (!cmd.va) 3807590c391dSPadmanabh Ratnakar return -ENOMEM; 3808590c391dSPadmanabh Ratnakar 3809b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3810590c391dSPadmanabh Ratnakar 3811590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3812590c391dSPadmanabh Ratnakar if (!wrb) { 3813590c391dSPadmanabh Ratnakar status = -EBUSY; 3814590c391dSPadmanabh Ratnakar goto err; 3815590c391dSPadmanabh Ratnakar } 3816590c391dSPadmanabh Ratnakar 3817590c391dSPadmanabh Ratnakar req = cmd.va; 3818590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3819590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3820590c391dSPadmanabh Ratnakar wrb, &cmd); 3821590c391dSPadmanabh Ratnakar 3822590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3823590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3824590c391dSPadmanabh Ratnakar if (mac_count) 3825590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3826590c391dSPadmanabh Ratnakar 3827590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3828590c391dSPadmanabh Ratnakar 3829590c391dSPadmanabh Ratnakar err: 3830a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3831b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3832590c391dSPadmanabh Ratnakar return status; 3833590c391dSPadmanabh Ratnakar } 38344762f6ceSAjit Khaparde 38353175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 38363175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 38373175d8c2SSathya Perla * current list are active. 38383175d8c2SSathya Perla */ 38393175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 38403175d8c2SSathya Perla { 38413175d8c2SSathya Perla bool active_mac = false; 38423175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 38433175d8c2SSathya Perla u32 pmac_id; 38443175d8c2SSathya Perla int status; 38453175d8c2SSathya Perla 38463175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3847b188f090SSuresh Reddy &pmac_id, if_id, dom); 3848b188f090SSuresh Reddy 38493175d8c2SSathya Perla if (!status && active_mac) 38503175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 38513175d8c2SSathya Perla 38523175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 38533175d8c2SSathya Perla } 38543175d8c2SSathya Perla 3855f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3856e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u16 hsw_mode, u8 spoofchk) 3857f1f3ee1bSAjit Khaparde { 3858f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3859f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3860f1f3ee1bSAjit Khaparde void *ctxt; 3861f1f3ee1bSAjit Khaparde int status; 3862f1f3ee1bSAjit Khaparde 3863884476beSSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_HSW_CONFIG, 3864884476beSSomnath Kotur CMD_SUBSYSTEM_COMMON)) 3865884476beSSomnath Kotur return -EPERM; 3866884476beSSomnath Kotur 3867b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3868f1f3ee1bSAjit Khaparde 3869f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3870f1f3ee1bSAjit Khaparde if (!wrb) { 3871f1f3ee1bSAjit Khaparde status = -EBUSY; 3872f1f3ee1bSAjit Khaparde goto err; 3873f1f3ee1bSAjit Khaparde } 3874f1f3ee1bSAjit Khaparde 3875f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3876f1f3ee1bSAjit Khaparde ctxt = &req->context; 3877f1f3ee1bSAjit Khaparde 3878f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3879a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3880a2cc4e0bSSathya Perla NULL); 3881f1f3ee1bSAjit Khaparde 3882f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3883f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3884f1f3ee1bSAjit Khaparde if (pvid) { 3885f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3886f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3887f1f3ee1bSAjit Khaparde } 3888884476beSSomnath Kotur if (hsw_mode) { 3889a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3890a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3891a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3892a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3893a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3894a77dcb8cSAjit Khaparde } 3895f1f3ee1bSAjit Khaparde 3896e7bcbd7bSKalesh AP /* Enable/disable both mac and vlan spoof checking */ 3897e7bcbd7bSKalesh AP if (!BEx_chip(adapter) && spoofchk) { 3898e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, mac_spoofchk, 3899e7bcbd7bSKalesh AP ctxt, spoofchk); 3900e7bcbd7bSKalesh AP AMAP_SET_BITS(struct amap_set_hsw_context, vlan_spoofchk, 3901e7bcbd7bSKalesh AP ctxt, spoofchk); 3902e7bcbd7bSKalesh AP } 3903e7bcbd7bSKalesh AP 3904f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3905f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3906f1f3ee1bSAjit Khaparde 3907f1f3ee1bSAjit Khaparde err: 3908b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3909f1f3ee1bSAjit Khaparde return status; 3910f1f3ee1bSAjit Khaparde } 3911f1f3ee1bSAjit Khaparde 3912f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3913f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3914e7bcbd7bSKalesh AP u32 domain, u16 intf_id, u8 *mode, bool *spoofchk) 3915f1f3ee1bSAjit Khaparde { 3916f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3917f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3918f1f3ee1bSAjit Khaparde void *ctxt; 3919f1f3ee1bSAjit Khaparde int status; 3920f1f3ee1bSAjit Khaparde u16 vid; 3921f1f3ee1bSAjit Khaparde 3922b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 3923f1f3ee1bSAjit Khaparde 3924f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3925f1f3ee1bSAjit Khaparde if (!wrb) { 3926f1f3ee1bSAjit Khaparde status = -EBUSY; 3927f1f3ee1bSAjit Khaparde goto err; 3928f1f3ee1bSAjit Khaparde } 3929f1f3ee1bSAjit Khaparde 3930f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3931f1f3ee1bSAjit Khaparde ctxt = &req->context; 3932f1f3ee1bSAjit Khaparde 3933f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3934a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3935a2cc4e0bSSathya Perla NULL); 3936f1f3ee1bSAjit Khaparde 3937f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3938a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3939a77dcb8cSAjit Khaparde ctxt, intf_id); 3940f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3941a77dcb8cSAjit Khaparde 39422c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3943a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3944a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3945a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3946a77dcb8cSAjit Khaparde } 3947f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3948f1f3ee1bSAjit Khaparde 3949f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3950f1f3ee1bSAjit Khaparde if (!status) { 3951f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3952f1f3ee1bSAjit Khaparde embedded_payload(wrb); 395303d28ffeSKalesh AP 3954a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3955f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3956f1f3ee1bSAjit Khaparde pvid, &resp->context); 3957a77dcb8cSAjit Khaparde if (pvid) 3958f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3959a77dcb8cSAjit Khaparde if (mode) 3960a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3961a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3962e7bcbd7bSKalesh AP if (spoofchk) 3963e7bcbd7bSKalesh AP *spoofchk = 3964e7bcbd7bSKalesh AP AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3965e7bcbd7bSKalesh AP spoofchk, &resp->context); 3966f1f3ee1bSAjit Khaparde } 3967f1f3ee1bSAjit Khaparde 3968f1f3ee1bSAjit Khaparde err: 3969b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 3970f1f3ee1bSAjit Khaparde return status; 3971f1f3ee1bSAjit Khaparde } 3972f1f3ee1bSAjit Khaparde 3973f7062ee5SSathya Perla static bool be_is_wol_excluded(struct be_adapter *adapter) 3974f7062ee5SSathya Perla { 3975f7062ee5SSathya Perla struct pci_dev *pdev = adapter->pdev; 3976f7062ee5SSathya Perla 397718c57c74SKalesh AP if (be_virtfn(adapter)) 3978f7062ee5SSathya Perla return true; 3979f7062ee5SSathya Perla 3980f7062ee5SSathya Perla switch (pdev->subsystem_device) { 3981f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID1: 3982f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID2: 3983f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID3: 3984f7062ee5SSathya Perla case OC_SUBSYS_DEVICE_ID4: 3985f7062ee5SSathya Perla return true; 3986f7062ee5SSathya Perla default: 3987f7062ee5SSathya Perla return false; 3988f7062ee5SSathya Perla } 3989f7062ee5SSathya Perla } 3990f7062ee5SSathya Perla 39914762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 39924762f6ceSAjit Khaparde { 39934762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 39944762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 399576a9e08eSSuresh Reddy int status = 0; 39964762f6ceSAjit Khaparde struct be_dma_mem cmd; 39974762f6ceSAjit Khaparde 3998f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3999f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 4000f25b119cSPadmanabh Ratnakar return -EPERM; 4001f25b119cSPadmanabh Ratnakar 400276a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 400376a9e08eSSuresh Reddy return status; 400476a9e08eSSuresh Reddy 4005d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4006d98ef50fSSuresh Reddy return -1; 4007d98ef50fSSuresh Reddy 40084762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 40094762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 4010e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4011e51000dbSSriharsha Basavapatna GFP_ATOMIC); 40124762f6ceSAjit Khaparde if (!cmd.va) { 4013a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 4014d98ef50fSSuresh Reddy status = -ENOMEM; 4015d98ef50fSSuresh Reddy goto err; 40164762f6ceSAjit Khaparde } 40174762f6ceSAjit Khaparde 40184762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 40194762f6ceSAjit Khaparde if (!wrb) { 40204762f6ceSAjit Khaparde status = -EBUSY; 40214762f6ceSAjit Khaparde goto err; 40224762f6ceSAjit Khaparde } 40234762f6ceSAjit Khaparde 40244762f6ceSAjit Khaparde req = cmd.va; 40254762f6ceSAjit Khaparde 40264762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 40274762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 402876a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 40294762f6ceSAjit Khaparde 40304762f6ceSAjit Khaparde req->hdr.version = 1; 40314762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 40324762f6ceSAjit Khaparde 40334762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 40344762f6ceSAjit Khaparde if (!status) { 40354762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 403603d28ffeSKalesh AP 40374762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 40384762f6ceSAjit Khaparde 40394762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 404045f13df7SSriharsha Basavapatna 404145f13df7SSriharsha Basavapatna /* Non-zero macaddr indicates WOL is enabled */ 404245f13df7SSriharsha Basavapatna if (adapter->wol_cap & BE_WOL_CAP && 404345f13df7SSriharsha Basavapatna !is_zero_ether_addr(resp->magic_mac)) 404476a9e08eSSuresh Reddy adapter->wol_en = true; 40454762f6ceSAjit Khaparde } 40464762f6ceSAjit Khaparde err: 40474762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 4048d98ef50fSSuresh Reddy if (cmd.va) 4049e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4050e51000dbSSriharsha Basavapatna cmd.dma); 40514762f6ceSAjit Khaparde return status; 4052941a77d5SSomnath Kotur 4053941a77d5SSomnath Kotur } 4054baaa08d1SVasundhara Volam 4055baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 4056baaa08d1SVasundhara Volam { 4057baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4058baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4059baaa08d1SVasundhara Volam int status; 4060baaa08d1SVasundhara Volam int i, j; 4061baaa08d1SVasundhara Volam 4062baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4063baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4064e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4065e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4066e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4067baaa08d1SVasundhara Volam if (!extfat_cmd.va) 4068baaa08d1SVasundhara Volam return -ENOMEM; 4069baaa08d1SVasundhara Volam 4070baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4071baaa08d1SVasundhara Volam if (status) 4072baaa08d1SVasundhara Volam goto err; 4073baaa08d1SVasundhara Volam 4074baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 4075baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 4076baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 4077baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 407803d28ffeSKalesh AP 4079baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 4080baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 4081baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 4082baaa08d1SVasundhara Volam cpu_to_le32(level); 4083baaa08d1SVasundhara Volam } 4084baaa08d1SVasundhara Volam } 4085baaa08d1SVasundhara Volam 4086baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 4087baaa08d1SVasundhara Volam err: 4088e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4089baaa08d1SVasundhara Volam extfat_cmd.dma); 4090baaa08d1SVasundhara Volam return status; 4091baaa08d1SVasundhara Volam } 4092baaa08d1SVasundhara Volam 4093baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 4094baaa08d1SVasundhara Volam { 4095baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 4096baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 4097baaa08d1SVasundhara Volam int status, j; 4098baaa08d1SVasundhara Volam int level = 0; 4099baaa08d1SVasundhara Volam 4100baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 4101baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 4102e51000dbSSriharsha Basavapatna extfat_cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, 4103e51000dbSSriharsha Basavapatna extfat_cmd.size, &extfat_cmd.dma, 4104e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4105baaa08d1SVasundhara Volam 4106baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 4107baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 4108baaa08d1SVasundhara Volam __func__); 4109baaa08d1SVasundhara Volam goto err; 4110baaa08d1SVasundhara Volam } 4111baaa08d1SVasundhara Volam 4112baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 4113baaa08d1SVasundhara Volam if (!status) { 4114baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 4115baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 411603d28ffeSKalesh AP 4117baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 4118baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 4119baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 4120baaa08d1SVasundhara Volam } 4121baaa08d1SVasundhara Volam } 4122e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, extfat_cmd.size, extfat_cmd.va, 4123baaa08d1SVasundhara Volam extfat_cmd.dma); 4124baaa08d1SVasundhara Volam err: 4125baaa08d1SVasundhara Volam return level; 4126baaa08d1SVasundhara Volam } 4127baaa08d1SVasundhara Volam 4128941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 4129941a77d5SSomnath Kotur struct be_dma_mem *cmd) 4130941a77d5SSomnath Kotur { 4131941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4132941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 4133941a77d5SSomnath Kotur int status; 4134941a77d5SSomnath Kotur 413562259ac4SSomnath Kotur if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 413662259ac4SSomnath Kotur CMD_SUBSYSTEM_COMMON)) 413762259ac4SSomnath Kotur return -EPERM; 413862259ac4SSomnath Kotur 4139941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 4140941a77d5SSomnath Kotur return -1; 4141941a77d5SSomnath Kotur 4142941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 4143941a77d5SSomnath Kotur if (!wrb) { 4144941a77d5SSomnath Kotur status = -EBUSY; 4145941a77d5SSomnath Kotur goto err; 4146941a77d5SSomnath Kotur } 4147941a77d5SSomnath Kotur 4148941a77d5SSomnath Kotur req = cmd->va; 4149941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 415062259ac4SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITIES, 4151941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4152941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 4153941a77d5SSomnath Kotur 4154941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 4155941a77d5SSomnath Kotur err: 4156941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 4157941a77d5SSomnath Kotur return status; 4158941a77d5SSomnath Kotur } 4159941a77d5SSomnath Kotur 4160941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 4161941a77d5SSomnath Kotur struct be_dma_mem *cmd, 4162941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 4163941a77d5SSomnath Kotur { 4164941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 4165941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 4166941a77d5SSomnath Kotur int status; 4167941a77d5SSomnath Kotur 4168b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4169941a77d5SSomnath Kotur 4170941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 4171941a77d5SSomnath Kotur if (!wrb) { 4172941a77d5SSomnath Kotur status = -EBUSY; 4173941a77d5SSomnath Kotur goto err; 4174941a77d5SSomnath Kotur } 4175941a77d5SSomnath Kotur 4176941a77d5SSomnath Kotur req = cmd->va; 4177941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 4178941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 417962259ac4SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITIES, 4180941a77d5SSomnath Kotur cmd->size, wrb, cmd); 4181941a77d5SSomnath Kotur 4182941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 4183941a77d5SSomnath Kotur err: 4184b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4185941a77d5SSomnath Kotur return status; 41864762f6ceSAjit Khaparde } 41876a4ab669SParav Pandit 418821252377SVasundhara Volam int be_cmd_query_port_name(struct be_adapter *adapter) 4189b4e32a71SPadmanabh Ratnakar { 4190b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 419121252377SVasundhara Volam struct be_mcc_wrb *wrb; 4192b4e32a71SPadmanabh Ratnakar int status; 4193b4e32a71SPadmanabh Ratnakar 419421252377SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 419521252377SVasundhara Volam return -1; 4196b4e32a71SPadmanabh Ratnakar 419721252377SVasundhara Volam wrb = wrb_from_mbox(adapter); 4198b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 4199b4e32a71SPadmanabh Ratnakar 4200b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4201b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 4202b4e32a71SPadmanabh Ratnakar NULL); 420321252377SVasundhara Volam if (!BEx_chip(adapter)) 4204b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 4205b4e32a71SPadmanabh Ratnakar 420621252377SVasundhara Volam status = be_mbox_notify_wait(adapter); 4207b4e32a71SPadmanabh Ratnakar if (!status) { 4208b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 420903d28ffeSKalesh AP 421021252377SVasundhara Volam adapter->port_name = resp->port_name[adapter->hba_port_num]; 4211b4e32a71SPadmanabh Ratnakar } else { 421221252377SVasundhara Volam adapter->port_name = adapter->hba_port_num + '0'; 4213b4e32a71SPadmanabh Ratnakar } 421421252377SVasundhara Volam 421521252377SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4216b4e32a71SPadmanabh Ratnakar return status; 4217b4e32a71SPadmanabh Ratnakar } 4218b4e32a71SPadmanabh Ratnakar 4219980df249SSuresh Reddy /* When more than 1 NIC descriptor is present in the descriptor list, 4220980df249SSuresh Reddy * the caller must specify the pf_num to obtain the NIC descriptor 4221980df249SSuresh Reddy * corresponding to its pci function. 4222980df249SSuresh Reddy * get_vft must be true when the caller wants the VF-template desc of the 4223980df249SSuresh Reddy * PF-pool. 4224980df249SSuresh Reddy * The pf_num should be set to PF_NUM_IGNORE when the caller knows 4225980df249SSuresh Reddy * that only it's NIC descriptor is present in the descriptor list. 4226980df249SSuresh Reddy */ 422710cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 4228980df249SSuresh Reddy bool get_vft, u8 pf_num) 4229abb93951SPadmanabh Ratnakar { 4230150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 423110cccf60SVasundhara Volam struct be_nic_res_desc *nic; 4232abb93951SPadmanabh Ratnakar int i; 4233abb93951SPadmanabh Ratnakar 4234abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 4235150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 423610cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 423710cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 4238980df249SSuresh Reddy 4239980df249SSuresh Reddy if ((pf_num == PF_NUM_IGNORE || 4240980df249SSuresh Reddy nic->pf_num == pf_num) && 4241980df249SSuresh Reddy (!get_vft || nic->flags & BIT(VFT_SHIFT))) 424210cccf60SVasundhara Volam return nic; 424310cccf60SVasundhara Volam } 4244150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4245150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4246150d58c7SVasundhara Volam } 4247950e2958SWei Yang return NULL; 4248abb93951SPadmanabh Ratnakar } 4249abb93951SPadmanabh Ratnakar 4250980df249SSuresh Reddy static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count, 4251980df249SSuresh Reddy u8 pf_num) 425210cccf60SVasundhara Volam { 4253980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, true, pf_num); 425410cccf60SVasundhara Volam } 425510cccf60SVasundhara Volam 4256980df249SSuresh Reddy static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count, 4257980df249SSuresh Reddy u8 pf_num) 425810cccf60SVasundhara Volam { 4259980df249SSuresh Reddy return be_get_nic_desc(buf, desc_count, false, pf_num); 426010cccf60SVasundhara Volam } 426110cccf60SVasundhara Volam 4262980df249SSuresh Reddy static struct be_pcie_res_desc *be_get_pcie_desc(u8 *buf, u32 desc_count, 4263980df249SSuresh Reddy u8 pf_num) 4264150d58c7SVasundhara Volam { 4265150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4266150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4267150d58c7SVasundhara Volam int i; 4268150d58c7SVasundhara Volam 4269150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 4270980df249SSuresh Reddy if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4271980df249SSuresh Reddy hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4272150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 4273980df249SSuresh Reddy if (pcie->pf_num == pf_num) 4274150d58c7SVasundhara Volam return pcie; 4275150d58c7SVasundhara Volam } 4276150d58c7SVasundhara Volam 4277150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4278150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4279150d58c7SVasundhara Volam } 4280abb93951SPadmanabh Ratnakar return NULL; 4281abb93951SPadmanabh Ratnakar } 4282abb93951SPadmanabh Ratnakar 4283f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 4284f93f160bSVasundhara Volam { 4285f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4286f93f160bSVasundhara Volam int i; 4287f93f160bSVasundhara Volam 4288f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 4289f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 4290f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 4291f93f160bSVasundhara Volam 4292f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4293f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 4294f93f160bSVasundhara Volam } 4295f93f160bSVasundhara Volam return NULL; 4296f93f160bSVasundhara Volam } 4297f93f160bSVasundhara Volam 429892bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 429992bf14abSSathya Perla struct be_nic_res_desc *desc) 430092bf14abSSathya Perla { 430192bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 430292bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 430392bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 430492bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 430592bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 430692bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 430792bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 4308f2858738SVasundhara Volam res->max_cq_count = le16_to_cpu(desc->cq_count); 4309f2858738SVasundhara Volam res->max_iface_count = le16_to_cpu(desc->iface_count); 4310f2858738SVasundhara Volam res->max_mcc_count = le16_to_cpu(desc->mcc_count); 431192bf14abSSathya Perla /* Clear flags that driver is not interested in */ 431292bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 431392bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 431492bf14abSSathya Perla } 431592bf14abSSathya Perla 4316abb93951SPadmanabh Ratnakar /* Uses Mbox */ 431792bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 4318abb93951SPadmanabh Ratnakar { 4319abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4320abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 4321abb93951SPadmanabh Ratnakar int status; 4322abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 4323abb93951SPadmanabh Ratnakar 4324d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 4325d98ef50fSSuresh Reddy return -1; 4326d98ef50fSSuresh Reddy 4327abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 4328abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 4329e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4330e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4331abb93951SPadmanabh Ratnakar if (!cmd.va) { 4332abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 4333d98ef50fSSuresh Reddy status = -ENOMEM; 4334d98ef50fSSuresh Reddy goto err; 4335abb93951SPadmanabh Ratnakar } 4336abb93951SPadmanabh Ratnakar 4337abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 4338abb93951SPadmanabh Ratnakar if (!wrb) { 4339abb93951SPadmanabh Ratnakar status = -EBUSY; 4340abb93951SPadmanabh Ratnakar goto err; 4341abb93951SPadmanabh Ratnakar } 4342abb93951SPadmanabh Ratnakar 4343abb93951SPadmanabh Ratnakar req = cmd.va; 4344abb93951SPadmanabh Ratnakar 4345abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4346abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 4347abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 4348abb93951SPadmanabh Ratnakar 434928710c55SKalesh AP if (skyhawk_chip(adapter)) 435028710c55SKalesh AP req->hdr.version = 1; 435128710c55SKalesh AP 4352abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 4353abb93951SPadmanabh Ratnakar if (!status) { 4354abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 4355abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 4356150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 4357abb93951SPadmanabh Ratnakar 4358980df249SSuresh Reddy /* GET_FUNC_CONFIG returns resource descriptors of the 4359980df249SSuresh Reddy * current function only. So, pf_num should be set to 4360980df249SSuresh Reddy * PF_NUM_IGNORE. 4361980df249SSuresh Reddy */ 4362980df249SSuresh Reddy desc = be_get_func_nic_desc(resp->func_param, desc_count, 4363980df249SSuresh Reddy PF_NUM_IGNORE); 4364abb93951SPadmanabh Ratnakar if (!desc) { 4365abb93951SPadmanabh Ratnakar status = -EINVAL; 4366abb93951SPadmanabh Ratnakar goto err; 4367abb93951SPadmanabh Ratnakar } 4368980df249SSuresh Reddy 4369980df249SSuresh Reddy /* Store pf_num & vf_num for later use in GET_PROFILE_CONFIG */ 4370980df249SSuresh Reddy adapter->pf_num = desc->pf_num; 4371980df249SSuresh Reddy adapter->vf_num = desc->vf_num; 4372980df249SSuresh Reddy 4373980df249SSuresh Reddy if (res) 437492bf14abSSathya Perla be_copy_nic_desc(res, desc); 4375abb93951SPadmanabh Ratnakar } 4376abb93951SPadmanabh Ratnakar err: 4377abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 4378d98ef50fSSuresh Reddy if (cmd.va) 4379e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4380e51000dbSSriharsha Basavapatna cmd.dma); 4381abb93951SPadmanabh Ratnakar return status; 4382abb93951SPadmanabh Ratnakar } 4383abb93951SPadmanabh Ratnakar 4384de2b1e03SSomnath Kotur /* This routine returns a list of all the NIC PF_nums in the adapter */ 4385de2b1e03SSomnath Kotur u16 be_get_nic_pf_num_list(u8 *buf, u32 desc_count, u16 *nic_pf_nums) 4386de2b1e03SSomnath Kotur { 4387de2b1e03SSomnath Kotur struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 4388de2b1e03SSomnath Kotur struct be_pcie_res_desc *pcie = NULL; 4389de2b1e03SSomnath Kotur int i; 4390de2b1e03SSomnath Kotur u16 nic_pf_count = 0; 4391de2b1e03SSomnath Kotur 4392de2b1e03SSomnath Kotur for (i = 0; i < desc_count; i++) { 4393de2b1e03SSomnath Kotur if (hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 4394de2b1e03SSomnath Kotur hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1) { 4395de2b1e03SSomnath Kotur pcie = (struct be_pcie_res_desc *)hdr; 4396de2b1e03SSomnath Kotur if (pcie->pf_state && (pcie->pf_type == MISSION_NIC || 4397de2b1e03SSomnath Kotur pcie->pf_type == MISSION_RDMA)) { 4398de2b1e03SSomnath Kotur nic_pf_nums[nic_pf_count++] = pcie->pf_num; 4399de2b1e03SSomnath Kotur } 4400de2b1e03SSomnath Kotur } 4401de2b1e03SSomnath Kotur 4402de2b1e03SSomnath Kotur hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 4403de2b1e03SSomnath Kotur hdr = (void *)hdr + hdr->desc_len; 4404de2b1e03SSomnath Kotur } 4405de2b1e03SSomnath Kotur return nic_pf_count; 4406de2b1e03SSomnath Kotur } 4407de2b1e03SSomnath Kotur 4408980df249SSuresh Reddy /* Will use MBOX only if MCCQ has not been created */ 440992bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 4410de2b1e03SSomnath Kotur struct be_resources *res, 4411de2b1e03SSomnath Kotur struct be_port_resources *port_res, 4412de2b1e03SSomnath Kotur u8 profile_type, u8 query, u8 domain) 4413a05f99dbSVasundhara Volam { 4414150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 4415ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 441610cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 4417150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 4418f93f160bSVasundhara Volam struct be_port_res_desc *port; 4419150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 4420ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 4421a05f99dbSVasundhara Volam struct be_dma_mem cmd; 4422f2858738SVasundhara Volam u16 desc_count; 4423a05f99dbSVasundhara Volam int status; 4424a05f99dbSVasundhara Volam 4425a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4426a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 4427e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4428e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4429150d58c7SVasundhara Volam if (!cmd.va) 4430a05f99dbSVasundhara Volam return -ENOMEM; 4431a05f99dbSVasundhara Volam 4432ba48c0c9SVasundhara Volam req = cmd.va; 4433ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4434ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 4435ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 4436ba48c0c9SVasundhara Volam 4437ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 4438ba48c0c9SVasundhara Volam req->hdr.version = 1; 4439de2b1e03SSomnath Kotur req->type = profile_type; 444072ef3a88SSomnath Kotur req->hdr.domain = domain; 4441ba48c0c9SVasundhara Volam 4442f2858738SVasundhara Volam /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the 4443f2858738SVasundhara Volam * descriptors with all bits set to "1" for the fields which can be 4444f2858738SVasundhara Volam * modified using SET_PROFILE_CONFIG cmd. 4445f2858738SVasundhara Volam */ 4446f2858738SVasundhara Volam if (query == RESOURCE_MODIFIABLE) 4447f2858738SVasundhara Volam req->type |= QUERY_MODIFIABLE_FIELDS_TYPE; 4448f2858738SVasundhara Volam 4449ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4450150d58c7SVasundhara Volam if (status) 4451abb93951SPadmanabh Ratnakar goto err; 4452150d58c7SVasundhara Volam 4453150d58c7SVasundhara Volam resp = cmd.va; 4454f2858738SVasundhara Volam desc_count = le16_to_cpu(resp->desc_count); 4455150d58c7SVasundhara Volam 4456de2b1e03SSomnath Kotur if (port_res) { 4457de2b1e03SSomnath Kotur u16 nic_pf_cnt = 0, i; 4458de2b1e03SSomnath Kotur u16 nic_pf_num_list[MAX_NIC_FUNCS]; 4459de2b1e03SSomnath Kotur 4460de2b1e03SSomnath Kotur nic_pf_cnt = be_get_nic_pf_num_list(resp->func_param, 4461de2b1e03SSomnath Kotur desc_count, 4462de2b1e03SSomnath Kotur nic_pf_num_list); 4463de2b1e03SSomnath Kotur 4464de2b1e03SSomnath Kotur for (i = 0; i < nic_pf_cnt; i++) { 4465de2b1e03SSomnath Kotur nic = be_get_func_nic_desc(resp->func_param, desc_count, 4466de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4467de2b1e03SSomnath Kotur if (nic->link_param == adapter->port_num) { 4468de2b1e03SSomnath Kotur port_res->nic_pfs++; 4469de2b1e03SSomnath Kotur pcie = be_get_pcie_desc(resp->func_param, 4470de2b1e03SSomnath Kotur desc_count, 4471de2b1e03SSomnath Kotur nic_pf_num_list[i]); 4472de2b1e03SSomnath Kotur port_res->max_vfs += le16_to_cpu(pcie->num_vfs); 4473de2b1e03SSomnath Kotur } 4474de2b1e03SSomnath Kotur } 4475de2b1e03SSomnath Kotur return status; 4476de2b1e03SSomnath Kotur } 4477de2b1e03SSomnath Kotur 4478980df249SSuresh Reddy pcie = be_get_pcie_desc(resp->func_param, desc_count, 4479980df249SSuresh Reddy adapter->pf_num); 4480150d58c7SVasundhara Volam if (pcie) 448192bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 4482150d58c7SVasundhara Volam 4483f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 4484f93f160bSVasundhara Volam if (port) 4485f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 4486f93f160bSVasundhara Volam 4487980df249SSuresh Reddy nic = be_get_func_nic_desc(resp->func_param, desc_count, 4488980df249SSuresh Reddy adapter->pf_num); 448992bf14abSSathya Perla if (nic) 449092bf14abSSathya Perla be_copy_nic_desc(res, nic); 449192bf14abSSathya Perla 4492980df249SSuresh Reddy vf_res = be_get_vft_desc(resp->func_param, desc_count, 4493980df249SSuresh Reddy adapter->pf_num); 449410cccf60SVasundhara Volam if (vf_res) 449510cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 4496abb93951SPadmanabh Ratnakar err: 4497a05f99dbSVasundhara Volam if (cmd.va) 4498e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4499e51000dbSSriharsha Basavapatna cmd.dma); 4500abb93951SPadmanabh Ratnakar return status; 4501abb93951SPadmanabh Ratnakar } 4502abb93951SPadmanabh Ratnakar 4503bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 4504bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 4505bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 4506d5c18473SPadmanabh Ratnakar { 4507d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 4508bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 4509bec84e6bSVasundhara Volam struct be_dma_mem cmd; 4510d5c18473SPadmanabh Ratnakar int status; 4511d5c18473SPadmanabh Ratnakar 4512bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 4513bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 4514e51000dbSSriharsha Basavapatna cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, 4515e51000dbSSriharsha Basavapatna GFP_ATOMIC); 4516bec84e6bSVasundhara Volam if (!cmd.va) 4517bec84e6bSVasundhara Volam return -ENOMEM; 4518d5c18473SPadmanabh Ratnakar 4519bec84e6bSVasundhara Volam req = cmd.va; 4520d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4521bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 4522bec84e6bSVasundhara Volam &wrb, &cmd); 4523a401801cSSathya Perla req->hdr.version = version; 4524d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 4525bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 4526a401801cSSathya Perla memcpy(req->desc, desc, size); 4527d5c18473SPadmanabh Ratnakar 4528bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 4529bec84e6bSVasundhara Volam 4530bec84e6bSVasundhara Volam if (cmd.va) 4531e51000dbSSriharsha Basavapatna dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, 4532e51000dbSSriharsha Basavapatna cmd.dma); 4533d5c18473SPadmanabh Ratnakar return status; 4534d5c18473SPadmanabh Ratnakar } 4535d5c18473SPadmanabh Ratnakar 4536a401801cSSathya Perla /* Mark all fields invalid */ 4537b9263cbfSSuresh Reddy void be_reset_nic_desc(struct be_nic_res_desc *nic) 4538a401801cSSathya Perla { 4539a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 4540a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 4541a401801cSSathya Perla nic->mcc_count = 0xFFFF; 4542a401801cSSathya Perla nic->vlan_count = 0xFFFF; 4543a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 4544a401801cSSathya Perla nic->txq_count = 0xFFFF; 4545a401801cSSathya Perla nic->rq_count = 0xFFFF; 4546a401801cSSathya Perla nic->rssq_count = 0xFFFF; 4547a401801cSSathya Perla nic->lro_count = 0xFFFF; 4548a401801cSSathya Perla nic->cq_count = 0xFFFF; 4549a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 4550a401801cSSathya Perla nic->eq_count = 0xFFFF; 45510f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 4552a401801cSSathya Perla nic->link_param = 0xFF; 45530f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 4554a401801cSSathya Perla nic->acpi_params = 0xFF; 4555a401801cSSathya Perla nic->wol_param = 0x0F; 45560f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 45570f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 4558bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 4559a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 4560a401801cSSathya Perla } 4561a401801cSSathya Perla 4562bec84e6bSVasundhara Volam /* Mark all fields invalid */ 4563bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 4564bec84e6bSVasundhara Volam { 4565bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 4566bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 4567bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 4568bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 4569bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 4570bec84e6bSVasundhara Volam } 4571bec84e6bSVasundhara Volam 45720f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 45730f77ba73SRavikumar Nelavelli u8 domain) 4574a401801cSSathya Perla { 4575a401801cSSathya Perla struct be_nic_res_desc nic_desc; 45760f77ba73SRavikumar Nelavelli u32 bw_percent; 45770f77ba73SRavikumar Nelavelli u16 version = 0; 45780f77ba73SRavikumar Nelavelli 45790f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 45800f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 4581a401801cSSathya Perla 4582a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 4583980df249SSuresh Reddy nic_desc.pf_num = adapter->pf_num; 45840f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 458558bdeaa6SKalesh AP nic_desc.bw_min = 0; 45860f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 4587a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 4588a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 4589a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 4590a401801cSSathya Perla (1 << NOSV_SHIFT); 45910f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 45920f77ba73SRavikumar Nelavelli } else { 45930f77ba73SRavikumar Nelavelli version = 1; 45940f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 45950f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 45960f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 45970f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 45980f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 45990f77ba73SRavikumar Nelavelli } 4600a401801cSSathya Perla 4601a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 46020f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 4603bec84e6bSVasundhara Volam 1, version, domain); 4604bec84e6bSVasundhara Volam } 4605bec84e6bSVasundhara Volam 4606bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 4607f2858738SVasundhara Volam struct be_resources pool_res, u16 num_vfs, 4608b9263cbfSSuresh Reddy struct be_resources *vft_res) 4609bec84e6bSVasundhara Volam { 4610bec84e6bSVasundhara Volam struct { 4611bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 4612bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 4613bec84e6bSVasundhara Volam } __packed desc; 4614bec84e6bSVasundhara Volam 4615bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 4616bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 4617bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 4618bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4619f2858738SVasundhara Volam desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4620bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 4621bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 4622bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 4623bec84e6bSVasundhara Volam 4624bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 4625bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 4626bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 4627bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4628b9263cbfSSuresh Reddy desc.nic_vft.flags = vft_res->flags | BIT(VFT_SHIFT) | 4629b9263cbfSSuresh Reddy BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); 4630bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 4631bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 4632b9263cbfSSuresh Reddy desc.nic_vft.cap_flags = cpu_to_le32(vft_res->vf_if_cap_flags); 4633b9263cbfSSuresh Reddy desc.nic_vft.rq_count = cpu_to_le16(vft_res->max_rx_qs); 4634b9263cbfSSuresh Reddy desc.nic_vft.txq_count = cpu_to_le16(vft_res->max_tx_qs); 4635b9263cbfSSuresh Reddy desc.nic_vft.rssq_count = cpu_to_le16(vft_res->max_rss_qs); 4636b9263cbfSSuresh Reddy desc.nic_vft.cq_count = cpu_to_le16(vft_res->max_cq_count); 4637bec84e6bSVasundhara Volam 4638b9263cbfSSuresh Reddy if (vft_res->max_uc_mac) 4639b9263cbfSSuresh Reddy desc.nic_vft.unicast_mac_count = 4640b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_uc_mac); 4641b9263cbfSSuresh Reddy if (vft_res->max_vlans) 4642b9263cbfSSuresh Reddy desc.nic_vft.vlan_count = cpu_to_le16(vft_res->max_vlans); 4643b9263cbfSSuresh Reddy if (vft_res->max_iface_count) 4644b9263cbfSSuresh Reddy desc.nic_vft.iface_count = 4645b9263cbfSSuresh Reddy cpu_to_le16(vft_res->max_iface_count); 4646b9263cbfSSuresh Reddy if (vft_res->max_mcc_count) 4647b9263cbfSSuresh Reddy desc.nic_vft.mcc_count = cpu_to_le16(vft_res->max_mcc_count); 4648bec84e6bSVasundhara Volam 4649bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 4650bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 4651a401801cSSathya Perla } 4652a401801cSSathya Perla 4653a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 4654a401801cSSathya Perla { 4655a401801cSSathya Perla struct be_mcc_wrb *wrb; 4656a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 4657a401801cSSathya Perla int status; 4658a401801cSSathya Perla 4659a401801cSSathya Perla if (iface == 0xFFFFFFFF) 4660a401801cSSathya Perla return -1; 4661a401801cSSathya Perla 4662b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4663a401801cSSathya Perla 4664a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 4665a401801cSSathya Perla if (!wrb) { 4666a401801cSSathya Perla status = -EBUSY; 4667a401801cSSathya Perla goto err; 4668a401801cSSathya Perla } 4669a401801cSSathya Perla req = embedded_payload(wrb); 4670a401801cSSathya Perla 4671a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4672a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 4673a401801cSSathya Perla wrb, NULL); 4674a401801cSSathya Perla req->op = op; 4675a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 4676a401801cSSathya Perla 4677a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 4678a401801cSSathya Perla err: 4679b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4680a401801cSSathya Perla return status; 4681a401801cSSathya Perla } 4682a401801cSSathya Perla 4683a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 4684a401801cSSathya Perla { 4685a401801cSSathya Perla struct be_port_res_desc port_desc; 4686a401801cSSathya Perla 4687a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 4688a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 4689a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 4690a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 4691a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 4692a401801cSSathya Perla if (port) { 4693a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 4694a401801cSSathya Perla (1 << RCVID_SHIFT); 4695a401801cSSathya Perla port_desc.nv_port = swab16(port); 4696a401801cSSathya Perla } else { 4697a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 4698a401801cSSathya Perla port_desc.nv_port = 0; 4699a401801cSSathya Perla } 4700a401801cSSathya Perla 4701a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 4702bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 4703a401801cSSathya Perla } 4704a401801cSSathya Perla 47054c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 47064c876616SSathya Perla int vf_num) 47074c876616SSathya Perla { 47084c876616SSathya Perla struct be_mcc_wrb *wrb; 47094c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 47104c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 47114c876616SSathya Perla int status; 47124c876616SSathya Perla 4713b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 47144c876616SSathya Perla 47154c876616SSathya Perla wrb = wrb_from_mccq(adapter); 47164c876616SSathya Perla if (!wrb) { 47174c876616SSathya Perla status = -EBUSY; 47184c876616SSathya Perla goto err; 47194c876616SSathya Perla } 47204c876616SSathya Perla req = embedded_payload(wrb); 47214c876616SSathya Perla 47224c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 47234c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 47244c876616SSathya Perla wrb, NULL); 47254c876616SSathya Perla req->hdr.domain = vf_num + 1; 47264c876616SSathya Perla 47274c876616SSathya Perla status = be_mcc_notify_wait(adapter); 47284c876616SSathya Perla if (!status) { 47294c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 47304c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 47314c876616SSathya Perla } 47324c876616SSathya Perla 47334c876616SSathya Perla err: 4734b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 47354c876616SSathya Perla return status; 47364c876616SSathya Perla } 47374c876616SSathya Perla 47385c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 47395c510811SSomnath Kotur { 47405c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 47415c510811SSomnath Kotur u32 reg_val; 47425c510811SSomnath Kotur int status = 0, i; 47435c510811SSomnath Kotur 47445c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 47455c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 47465c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 47475c510811SSomnath Kotur break; 47485c510811SSomnath Kotur 47495c510811SSomnath Kotur ssleep(1); 47505c510811SSomnath Kotur } 47515c510811SSomnath Kotur 47525c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 47535c510811SSomnath Kotur status = -1; 47545c510811SSomnath Kotur 47555c510811SSomnath Kotur return status; 47565c510811SSomnath Kotur } 47575c510811SSomnath Kotur 47585c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 47595c510811SSomnath Kotur { 47605c510811SSomnath Kotur int status = 0; 47615c510811SSomnath Kotur 47625c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47635c510811SSomnath Kotur if (status) 47645c510811SSomnath Kotur return status; 47655c510811SSomnath Kotur 47665c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 47675c510811SSomnath Kotur 47685c510811SSomnath Kotur return status; 47695c510811SSomnath Kotur } 47705c510811SSomnath Kotur 47715c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 47725c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 47735c510811SSomnath Kotur { 47745c510811SSomnath Kotur u32 sliport_status = 0; 47755c510811SSomnath Kotur 47765c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 47775c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 47785c510811SSomnath Kotur } 47795c510811SSomnath Kotur 47805c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 47815c510811SSomnath Kotur { 4782f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 47835c510811SSomnath Kotur int status; 47845c510811SSomnath Kotur 4785f0613380SKalesh AP if (dump_present(adapter)) { 4786f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 4787f0613380SKalesh AP return -EEXIST; 4788f0613380SKalesh AP } 4789f0613380SKalesh AP 47905c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 47915c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 47925c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 47935c510811SSomnath Kotur if (status < 0) { 4794f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 47955c510811SSomnath Kotur return status; 47965c510811SSomnath Kotur } 47975c510811SSomnath Kotur 47985c510811SSomnath Kotur status = lancer_wait_idle(adapter); 47995c510811SSomnath Kotur if (status) 48005c510811SSomnath Kotur return status; 48015c510811SSomnath Kotur 48025c510811SSomnath Kotur if (!dump_present(adapter)) { 4803f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 4804f0613380SKalesh AP return -EIO; 48055c510811SSomnath Kotur } 48065c510811SSomnath Kotur 48075c510811SSomnath Kotur return 0; 48085c510811SSomnath Kotur } 48095c510811SSomnath Kotur 4810f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 4811f0613380SKalesh AP { 4812f0613380SKalesh AP int status; 4813f0613380SKalesh AP 4814f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 4815f0613380SKalesh AP return be_cmd_status(status); 4816f0613380SKalesh AP } 4817f0613380SKalesh AP 4818dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 4819dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 4820dcf7ebbaSPadmanabh Ratnakar { 4821dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 4822dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 4823dcf7ebbaSPadmanabh Ratnakar int status; 4824dcf7ebbaSPadmanabh Ratnakar 48250599863dSVasundhara Volam if (BEx_chip(adapter)) 4826dcf7ebbaSPadmanabh Ratnakar return 0; 4827dcf7ebbaSPadmanabh Ratnakar 4828b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4829dcf7ebbaSPadmanabh Ratnakar 4830dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4831dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4832dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4833dcf7ebbaSPadmanabh Ratnakar goto err; 4834dcf7ebbaSPadmanabh Ratnakar } 4835dcf7ebbaSPadmanabh Ratnakar 4836dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4837dcf7ebbaSPadmanabh Ratnakar 4838dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4839dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4840dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4841dcf7ebbaSPadmanabh Ratnakar 4842dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4843dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4844dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4845dcf7ebbaSPadmanabh Ratnakar err: 4846b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4847dcf7ebbaSPadmanabh Ratnakar return status; 4848dcf7ebbaSPadmanabh Ratnakar } 4849dcf7ebbaSPadmanabh Ratnakar 485068c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 485168c45a2dSSomnath Kotur { 485268c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 485368c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 485468c45a2dSSomnath Kotur int status; 485568c45a2dSSomnath Kotur 485668c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 485768c45a2dSSomnath Kotur return -1; 485868c45a2dSSomnath Kotur 485968c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 486068c45a2dSSomnath Kotur 486168c45a2dSSomnath Kotur req = embedded_payload(wrb); 486268c45a2dSSomnath Kotur 486368c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 486468c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 486568c45a2dSSomnath Kotur wrb, NULL); 486668c45a2dSSomnath Kotur 486768c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 486868c45a2dSSomnath Kotur 486968c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 487068c45a2dSSomnath Kotur 487168c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 487268c45a2dSSomnath Kotur return status; 487368c45a2dSSomnath Kotur } 487468c45a2dSSomnath Kotur 4875542963b7SVasundhara Volam /* Uses MBOX */ 4876542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4877542963b7SVasundhara Volam { 4878542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4879542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4880542963b7SVasundhara Volam int status; 4881542963b7SVasundhara Volam 4882542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4883542963b7SVasundhara Volam return -1; 4884542963b7SVasundhara Volam 4885542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4886542963b7SVasundhara Volam if (!wrb) { 4887542963b7SVasundhara Volam status = -EBUSY; 4888542963b7SVasundhara Volam goto err; 4889542963b7SVasundhara Volam } 4890542963b7SVasundhara Volam 4891542963b7SVasundhara Volam req = embedded_payload(wrb); 4892542963b7SVasundhara Volam 4893542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4894542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4895542963b7SVasundhara Volam wrb, NULL); 4896542963b7SVasundhara Volam 4897542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4898542963b7SVasundhara Volam if (!status) { 4899542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4900542963b7SVasundhara Volam embedded_payload(wrb); 490103d28ffeSKalesh AP 4902542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4903542963b7SVasundhara Volam } 4904542963b7SVasundhara Volam 4905542963b7SVasundhara Volam err: 4906542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4907542963b7SVasundhara Volam return status; 4908542963b7SVasundhara Volam } 4909542963b7SVasundhara Volam 4910d9d426afSSuresh Reddy int __be_cmd_set_logical_link_config(struct be_adapter *adapter, 4911d9d426afSSuresh Reddy int link_state, int version, u8 domain) 4912bdce2ad7SSuresh Reddy { 4913bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 4914bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 4915bdce2ad7SSuresh Reddy int status; 4916bdce2ad7SSuresh Reddy 4917b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 4918bdce2ad7SSuresh Reddy 4919bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4920bdce2ad7SSuresh Reddy if (!wrb) { 4921bdce2ad7SSuresh Reddy status = -EBUSY; 4922bdce2ad7SSuresh Reddy goto err; 4923bdce2ad7SSuresh Reddy } 4924bdce2ad7SSuresh Reddy 4925bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4926bdce2ad7SSuresh Reddy 4927bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4928bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4929bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4930bdce2ad7SSuresh Reddy 4931d9d426afSSuresh Reddy req->hdr.version = version; 4932bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4933bdce2ad7SSuresh Reddy 4934d9d426afSSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE || 4935d9d426afSSuresh Reddy link_state == IFLA_VF_LINK_STATE_AUTO) 4936d9d426afSSuresh Reddy req->link_config |= PLINK_ENABLE; 4937bdce2ad7SSuresh Reddy 4938bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 4939d9d426afSSuresh Reddy req->link_config |= PLINK_TRACK; 4940bdce2ad7SSuresh Reddy 4941bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4942bdce2ad7SSuresh Reddy err: 4943b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 4944bdce2ad7SSuresh Reddy return status; 4945bdce2ad7SSuresh Reddy } 4946bdce2ad7SSuresh Reddy 4947d9d426afSSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4948d9d426afSSuresh Reddy int link_state, u8 domain) 4949d9d426afSSuresh Reddy { 4950d9d426afSSuresh Reddy int status; 4951d9d426afSSuresh Reddy 4952d9d426afSSuresh Reddy if (BEx_chip(adapter)) 4953d9d426afSSuresh Reddy return -EOPNOTSUPP; 4954d9d426afSSuresh Reddy 4955d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4956d9d426afSSuresh Reddy 2, domain); 4957d9d426afSSuresh Reddy 4958d9d426afSSuresh Reddy /* Version 2 of the command will not be recognized by older FW. 4959d9d426afSSuresh Reddy * On such a failure issue version 1 of the command. 4960d9d426afSSuresh Reddy */ 4961d9d426afSSuresh Reddy if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST) 4962d9d426afSSuresh Reddy status = __be_cmd_set_logical_link_config(adapter, link_state, 4963d9d426afSSuresh Reddy 1, domain); 4964d9d426afSSuresh Reddy return status; 4965d9d426afSSuresh Reddy } 4966710f3e59SSriharsha Basavapatna 4967710f3e59SSriharsha Basavapatna int be_cmd_set_features(struct be_adapter *adapter) 4968710f3e59SSriharsha Basavapatna { 4969710f3e59SSriharsha Basavapatna struct be_cmd_resp_set_features *resp; 4970710f3e59SSriharsha Basavapatna struct be_cmd_req_set_features *req; 4971710f3e59SSriharsha Basavapatna struct be_mcc_wrb *wrb; 4972710f3e59SSriharsha Basavapatna int status; 4973710f3e59SSriharsha Basavapatna 4974710f3e59SSriharsha Basavapatna if (mutex_lock_interruptible(&adapter->mcc_lock)) 4975710f3e59SSriharsha Basavapatna return -1; 4976710f3e59SSriharsha Basavapatna 4977710f3e59SSriharsha Basavapatna wrb = wrb_from_mccq(adapter); 4978710f3e59SSriharsha Basavapatna if (!wrb) { 4979710f3e59SSriharsha Basavapatna status = -EBUSY; 4980710f3e59SSriharsha Basavapatna goto err; 4981710f3e59SSriharsha Basavapatna } 4982710f3e59SSriharsha Basavapatna 4983710f3e59SSriharsha Basavapatna req = embedded_payload(wrb); 4984710f3e59SSriharsha Basavapatna 4985710f3e59SSriharsha Basavapatna be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4986710f3e59SSriharsha Basavapatna OPCODE_COMMON_SET_FEATURES, 4987710f3e59SSriharsha Basavapatna sizeof(*req), wrb, NULL); 4988710f3e59SSriharsha Basavapatna 4989710f3e59SSriharsha Basavapatna req->features = cpu_to_le32(BE_FEATURE_UE_RECOVERY); 4990710f3e59SSriharsha Basavapatna req->parameter_len = cpu_to_le32(sizeof(struct be_req_ue_recovery)); 4991710f3e59SSriharsha Basavapatna req->parameter.req.uer = cpu_to_le32(BE_UE_RECOVERY_UER_MASK); 4992710f3e59SSriharsha Basavapatna 4993710f3e59SSriharsha Basavapatna status = be_mcc_notify_wait(adapter); 4994710f3e59SSriharsha Basavapatna if (status) 4995710f3e59SSriharsha Basavapatna goto err; 4996710f3e59SSriharsha Basavapatna 4997710f3e59SSriharsha Basavapatna resp = embedded_payload(wrb); 4998710f3e59SSriharsha Basavapatna 4999710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_poll_time = 5000710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2rp); 5001710f3e59SSriharsha Basavapatna adapter->error_recovery.ue_to_reset_time = 5002710f3e59SSriharsha Basavapatna le16_to_cpu(resp->parameter.resp.ue2sr); 5003710f3e59SSriharsha Basavapatna adapter->error_recovery.recovery_supported = true; 5004710f3e59SSriharsha Basavapatna err: 5005710f3e59SSriharsha Basavapatna /* Checking "MCC_STATUS_INVALID_LENGTH" for SKH as FW 5006710f3e59SSriharsha Basavapatna * returns this error in older firmware versions 5007710f3e59SSriharsha Basavapatna */ 5008710f3e59SSriharsha Basavapatna if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST || 5009710f3e59SSriharsha Basavapatna base_status(status) == MCC_STATUS_INVALID_LENGTH) 5010710f3e59SSriharsha Basavapatna dev_info(&adapter->pdev->dev, 5011710f3e59SSriharsha Basavapatna "Adapter does not support HW error recovery\n"); 5012710f3e59SSriharsha Basavapatna 5013710f3e59SSriharsha Basavapatna mutex_unlock(&adapter->mcc_lock); 5014710f3e59SSriharsha Basavapatna return status; 5015710f3e59SSriharsha Basavapatna } 5016710f3e59SSriharsha Basavapatna 50176a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 50186a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 50196a4ab669SParav Pandit { 50206a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 50216a4ab669SParav Pandit struct be_mcc_wrb *wrb; 50226a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 50236a4ab669SParav Pandit struct be_cmd_req_hdr *req; 50246a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 50256a4ab669SParav Pandit int status; 50266a4ab669SParav Pandit 5027b7172414SSathya Perla mutex_lock(&adapter->mcc_lock); 50286a4ab669SParav Pandit 50296a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 50306a4ab669SParav Pandit if (!wrb) { 50316a4ab669SParav Pandit status = -EBUSY; 50326a4ab669SParav Pandit goto err; 50336a4ab669SParav Pandit } 50346a4ab669SParav Pandit req = embedded_payload(wrb); 50356a4ab669SParav Pandit resp = embedded_payload(wrb); 50366a4ab669SParav Pandit 50376a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 50386a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 50396a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 50406a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 50416a4ab669SParav Pandit 50426a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 50436a4ab669SParav Pandit if (cmd_status) 50446a4ab669SParav Pandit *cmd_status = (status & 0xffff); 50456a4ab669SParav Pandit if (ext_status) 50466a4ab669SParav Pandit *ext_status = 0; 50476a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 50486a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 50496a4ab669SParav Pandit err: 5050b7172414SSathya Perla mutex_unlock(&adapter->mcc_lock); 50516a4ab669SParav Pandit return status; 50526a4ab669SParav Pandit } 50536a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 5054