19aebddd1SJeff Kirsher /* 240263820SVasundhara Volam * Copyright (C) 2005 - 2014 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55a2cc4e0bSSathya Perla static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem) 56f25b119cSPadmanabh Ratnakar { 57f25b119cSPadmanabh Ratnakar int i; 58f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 59f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 60f25b119cSPadmanabh Ratnakar 61f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 62f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 63f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 64f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 65f25b119cSPadmanabh Ratnakar return false; 66f25b119cSPadmanabh Ratnakar 67f25b119cSPadmanabh Ratnakar return true; 68f25b119cSPadmanabh Ratnakar } 69f25b119cSPadmanabh Ratnakar 703de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 713de09455SSomnath Kotur { 723de09455SSomnath Kotur return wrb->payload.embedded_payload; 733de09455SSomnath Kotur } 749aebddd1SJeff Kirsher 759aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 769aebddd1SJeff Kirsher { 779aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 789aebddd1SJeff Kirsher u32 val = 0; 799aebddd1SJeff Kirsher 806589ade0SSathya Perla if (be_error(adapter)) 819aebddd1SJeff Kirsher return; 829aebddd1SJeff Kirsher 839aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 849aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 859aebddd1SJeff Kirsher 869aebddd1SJeff Kirsher wmb(); 879aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 889aebddd1SJeff Kirsher } 899aebddd1SJeff Kirsher 909aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 919aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 929aebddd1SJeff Kirsher * little endian) */ 939aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 949aebddd1SJeff Kirsher { 959e9ff4b7SSathya Perla u32 flags; 969e9ff4b7SSathya Perla 979aebddd1SJeff Kirsher if (compl->flags != 0) { 989e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 999e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1009e9ff4b7SSathya Perla compl->flags = flags; 1019aebddd1SJeff Kirsher return true; 1029aebddd1SJeff Kirsher } 1039aebddd1SJeff Kirsher } 1049e9ff4b7SSathya Perla return false; 1059e9ff4b7SSathya Perla } 1069aebddd1SJeff Kirsher 1079aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1089aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1099aebddd1SJeff Kirsher { 1109aebddd1SJeff Kirsher compl->flags = 0; 1119aebddd1SJeff Kirsher } 1129aebddd1SJeff Kirsher 113652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 114652bf646SPadmanabh Ratnakar { 115652bf646SPadmanabh Ratnakar unsigned long addr; 116652bf646SPadmanabh Ratnakar 117652bf646SPadmanabh Ratnakar addr = tag1; 118652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 119652bf646SPadmanabh Ratnakar return (void *)addr; 120652bf646SPadmanabh Ratnakar } 121652bf646SPadmanabh Ratnakar 1224c60005fSKalesh AP static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status) 1234c60005fSKalesh AP { 1244c60005fSKalesh AP if (base_status == MCC_STATUS_NOT_SUPPORTED || 1254c60005fSKalesh AP base_status == MCC_STATUS_ILLEGAL_REQUEST || 1264c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES || 1274c60005fSKalesh AP (opcode == OPCODE_COMMON_WRITE_FLASHROM && 1284c60005fSKalesh AP (base_status == MCC_STATUS_ILLEGAL_FIELD || 1294c60005fSKalesh AP addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH))) 1304c60005fSKalesh AP return true; 1314c60005fSKalesh AP else 1324c60005fSKalesh AP return false; 1334c60005fSKalesh AP } 1344c60005fSKalesh AP 135559b633fSSathya Perla /* Place holder for all the async MCC cmds wherein the caller is not in a busy 136559b633fSSathya Perla * loop (has not issued be_mcc_notify_wait()) 137559b633fSSathya Perla */ 138559b633fSSathya Perla static void be_async_cmd_process(struct be_adapter *adapter, 139559b633fSSathya Perla struct be_mcc_compl *compl, 140559b633fSSathya Perla struct be_cmd_resp_hdr *resp_hdr) 141559b633fSSathya Perla { 142559b633fSSathya Perla enum mcc_base_status base_status = base_status(compl->status); 143559b633fSSathya Perla u8 opcode = 0, subsystem = 0; 144559b633fSSathya Perla 145559b633fSSathya Perla if (resp_hdr) { 146559b633fSSathya Perla opcode = resp_hdr->opcode; 147559b633fSSathya Perla subsystem = resp_hdr->subsystem; 148559b633fSSathya Perla } 149559b633fSSathya Perla 150559b633fSSathya Perla if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST && 151559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_LOWLEVEL) { 152559b633fSSathya Perla complete(&adapter->et_cmd_compl); 153559b633fSSathya Perla return; 154559b633fSSathya Perla } 155559b633fSSathya Perla 156559b633fSSathya Perla if ((opcode == OPCODE_COMMON_WRITE_FLASHROM || 157559b633fSSathya Perla opcode == OPCODE_COMMON_WRITE_OBJECT) && 158559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 159559b633fSSathya Perla adapter->flash_status = compl->status; 160559b633fSSathya Perla complete(&adapter->et_cmd_compl); 161559b633fSSathya Perla return; 162559b633fSSathya Perla } 163559b633fSSathya Perla 164559b633fSSathya Perla if ((opcode == OPCODE_ETH_GET_STATISTICS || 165559b633fSSathya Perla opcode == OPCODE_ETH_GET_PPORT_STATS) && 166559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_ETH && 167559b633fSSathya Perla base_status == MCC_STATUS_SUCCESS) { 168559b633fSSathya Perla be_parse_stats(adapter); 169559b633fSSathya Perla adapter->stats_cmd_sent = false; 170559b633fSSathya Perla return; 171559b633fSSathya Perla } 172559b633fSSathya Perla 173559b633fSSathya Perla if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 174559b633fSSathya Perla subsystem == CMD_SUBSYSTEM_COMMON) { 175559b633fSSathya Perla if (base_status == MCC_STATUS_SUCCESS) { 176559b633fSSathya Perla struct be_cmd_resp_get_cntl_addnl_attribs *resp = 177559b633fSSathya Perla (void *)resp_hdr; 178559b633fSSathya Perla adapter->drv_stats.be_on_die_temperature = 179559b633fSSathya Perla resp->on_die_temperature; 180559b633fSSathya Perla } else { 181559b633fSSathya Perla adapter->be_get_temp_freq = 0; 182559b633fSSathya Perla } 183559b633fSSathya Perla return; 184559b633fSSathya Perla } 185559b633fSSathya Perla } 186559b633fSSathya Perla 1879aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1889aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1899aebddd1SJeff Kirsher { 1904c60005fSKalesh AP enum mcc_base_status base_status; 1914c60005fSKalesh AP enum mcc_addl_status addl_status; 192652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 193652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1949aebddd1SJeff Kirsher 1959aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1969aebddd1SJeff Kirsher * from mcc_wrb */ 1979aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1989aebddd1SJeff Kirsher 1994c60005fSKalesh AP base_status = base_status(compl->status); 2004c60005fSKalesh AP addl_status = addl_status(compl->status); 20196c9b2e4SVasundhara Volam 202652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 203652bf646SPadmanabh Ratnakar if (resp_hdr) { 204652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 205652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 206652bf646SPadmanabh Ratnakar } 207652bf646SPadmanabh Ratnakar 208559b633fSSathya Perla be_async_cmd_process(adapter, compl, resp_hdr); 2095eeff635SSuresh Reddy 210559b633fSSathya Perla if (base_status != MCC_STATUS_SUCCESS && 211559b633fSSathya Perla !be_skip_err_log(opcode, base_status, addl_status)) { 2124c60005fSKalesh AP if (base_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 21397f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 214522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 21597f1d8cdSVasundhara Volam opcode, subsystem); 2169aebddd1SJeff Kirsher } else { 21797f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 21897f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 2194c60005fSKalesh AP opcode, subsystem, base_status, addl_status); 2209aebddd1SJeff Kirsher } 2219aebddd1SJeff Kirsher } 2224c60005fSKalesh AP return compl->status; 2239aebddd1SJeff Kirsher } 2249aebddd1SJeff Kirsher 2259aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 2269aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 2273acf19d9SSathya Perla struct be_mcc_compl *compl) 2289aebddd1SJeff Kirsher { 2293acf19d9SSathya Perla struct be_async_event_link_state *evt = 2303acf19d9SSathya Perla (struct be_async_event_link_state *)compl; 2313acf19d9SSathya Perla 232b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 23342f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 234b236916aSAjit Khaparde 235bdce2ad7SSuresh Reddy /* On BEx the FW does not send a separate link status 236bdce2ad7SSuresh Reddy * notification for physical and logical link. 237bdce2ad7SSuresh Reddy * On other chips just process the logical link 238bdce2ad7SSuresh Reddy * status notification 239bdce2ad7SSuresh Reddy */ 240bdce2ad7SSuresh Reddy if (!BEx_chip(adapter) && 2412e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2422e177a5cSPadmanabh Ratnakar return; 2432e177a5cSPadmanabh Ratnakar 244b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 245b236916aSAjit Khaparde * it may not be received in some cases. 246b236916aSAjit Khaparde */ 247b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 248bdce2ad7SSuresh Reddy be_link_status_update(adapter, 249bdce2ad7SSuresh Reddy evt->port_link_status & LINK_STATUS_MASK); 2509aebddd1SJeff Kirsher } 2519aebddd1SJeff Kirsher 2529aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2539aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2543acf19d9SSathya Perla struct be_mcc_compl *compl) 2559aebddd1SJeff Kirsher { 2563acf19d9SSathya Perla struct be_async_event_grp5_cos_priority *evt = 2573acf19d9SSathya Perla (struct be_async_event_grp5_cos_priority *)compl; 2583acf19d9SSathya Perla 2599aebddd1SJeff Kirsher if (evt->valid) { 2609aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2619aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2629aebddd1SJeff Kirsher adapter->recommended_prio = 2639aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2649aebddd1SJeff Kirsher } 2659aebddd1SJeff Kirsher } 2669aebddd1SJeff Kirsher 267323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2689aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2693acf19d9SSathya Perla struct be_mcc_compl *compl) 2709aebddd1SJeff Kirsher { 2713acf19d9SSathya Perla struct be_async_event_grp5_qos_link_speed *evt = 2723acf19d9SSathya Perla (struct be_async_event_grp5_qos_link_speed *)compl; 2733acf19d9SSathya Perla 274323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 275323ff71eSSathya Perla evt->physical_port == adapter->port_num) 276323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2779aebddd1SJeff Kirsher } 2789aebddd1SJeff Kirsher 2799aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2809aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2813acf19d9SSathya Perla struct be_mcc_compl *compl) 2829aebddd1SJeff Kirsher { 2833acf19d9SSathya Perla struct be_async_event_grp5_pvid_state *evt = 2843acf19d9SSathya Perla (struct be_async_event_grp5_pvid_state *)compl; 2853acf19d9SSathya Perla 286bdac85b5SRavikumar Nelavelli if (evt->enabled) { 287939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 288bdac85b5SRavikumar Nelavelli dev_info(&adapter->pdev->dev, "LPVID: %d\n", adapter->pvid); 289bdac85b5SRavikumar Nelavelli } else { 2909aebddd1SJeff Kirsher adapter->pvid = 0; 2919aebddd1SJeff Kirsher } 292bdac85b5SRavikumar Nelavelli } 2939aebddd1SJeff Kirsher 2949aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2953acf19d9SSathya Perla struct be_mcc_compl *compl) 2969aebddd1SJeff Kirsher { 2973acf19d9SSathya Perla u8 event_type = (compl->flags >> ASYNC_EVENT_TYPE_SHIFT) & 2983acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 2999aebddd1SJeff Kirsher 3009aebddd1SJeff Kirsher switch (event_type) { 3019aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 3023acf19d9SSathya Perla be_async_grp5_cos_priority_process(adapter, compl); 3039aebddd1SJeff Kirsher break; 3049aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 3053acf19d9SSathya Perla be_async_grp5_qos_speed_process(adapter, compl); 3069aebddd1SJeff Kirsher break; 3079aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 3083acf19d9SSathya Perla be_async_grp5_pvid_state_process(adapter, compl); 3099aebddd1SJeff Kirsher break; 3109aebddd1SJeff Kirsher default: 3119aebddd1SJeff Kirsher break; 3129aebddd1SJeff Kirsher } 3139aebddd1SJeff Kirsher } 3149aebddd1SJeff Kirsher 315bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 3163acf19d9SSathya Perla struct be_mcc_compl *cmp) 317bc0c3405SAjit Khaparde { 318bc0c3405SAjit Khaparde u8 event_type = 0; 319bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *)cmp; 320bc0c3405SAjit Khaparde 3213acf19d9SSathya Perla event_type = (cmp->flags >> ASYNC_EVENT_TYPE_SHIFT) & 3223acf19d9SSathya Perla ASYNC_EVENT_TYPE_MASK; 323bc0c3405SAjit Khaparde 324bc0c3405SAjit Khaparde switch (event_type) { 325bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 326bc0c3405SAjit Khaparde if (evt->valid) 327bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 328bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 329bc0c3405SAjit Khaparde break; 330bc0c3405SAjit Khaparde default: 33105ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 33205ccaa2bSVasundhara Volam event_type); 333bc0c3405SAjit Khaparde break; 334bc0c3405SAjit Khaparde } 335bc0c3405SAjit Khaparde } 336bc0c3405SAjit Khaparde 3373acf19d9SSathya Perla static inline bool is_link_state_evt(u32 flags) 3389aebddd1SJeff Kirsher { 3393acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3409aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 3419aebddd1SJeff Kirsher } 3429aebddd1SJeff Kirsher 3433acf19d9SSathya Perla static inline bool is_grp5_evt(u32 flags) 3449aebddd1SJeff Kirsher { 3453acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3463acf19d9SSathya Perla ASYNC_EVENT_CODE_GRP_5; 3479aebddd1SJeff Kirsher } 3489aebddd1SJeff Kirsher 3493acf19d9SSathya Perla static inline bool is_dbg_evt(u32 flags) 350bc0c3405SAjit Khaparde { 3513acf19d9SSathya Perla return ((flags >> ASYNC_EVENT_CODE_SHIFT) & ASYNC_EVENT_CODE_MASK) == 3523acf19d9SSathya Perla ASYNC_EVENT_CODE_QNQ; 3533acf19d9SSathya Perla } 3543acf19d9SSathya Perla 3553acf19d9SSathya Perla static void be_mcc_event_process(struct be_adapter *adapter, 3563acf19d9SSathya Perla struct be_mcc_compl *compl) 3573acf19d9SSathya Perla { 3583acf19d9SSathya Perla if (is_link_state_evt(compl->flags)) 3593acf19d9SSathya Perla be_async_link_state_process(adapter, compl); 3603acf19d9SSathya Perla else if (is_grp5_evt(compl->flags)) 3613acf19d9SSathya Perla be_async_grp5_evt_process(adapter, compl); 3623acf19d9SSathya Perla else if (is_dbg_evt(compl->flags)) 3633acf19d9SSathya Perla be_async_dbg_evt_process(adapter, compl); 364bc0c3405SAjit Khaparde } 365bc0c3405SAjit Khaparde 3669aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3679aebddd1SJeff Kirsher { 3689aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3699aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3709aebddd1SJeff Kirsher 3719aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3729aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3739aebddd1SJeff Kirsher return compl; 3749aebddd1SJeff Kirsher } 3759aebddd1SJeff Kirsher return NULL; 3769aebddd1SJeff Kirsher } 3779aebddd1SJeff Kirsher 3789aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3799aebddd1SJeff Kirsher { 3809aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3819aebddd1SJeff Kirsher 3829aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3839aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3849aebddd1SJeff Kirsher 3859aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3869aebddd1SJeff Kirsher } 3879aebddd1SJeff Kirsher 3889aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3899aebddd1SJeff Kirsher { 390a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 391a323d9bfSSathya Perla 3929aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 393a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 394a323d9bfSSathya Perla 395a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3969aebddd1SJeff Kirsher } 3979aebddd1SJeff Kirsher 39810ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3999aebddd1SJeff Kirsher { 4009aebddd1SJeff Kirsher struct be_mcc_compl *compl; 40110ef9ab4SSathya Perla int num = 0, status = 0; 4029aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 4039aebddd1SJeff Kirsher 404072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 4053acf19d9SSathya Perla 4069aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 4079aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 4083acf19d9SSathya Perla be_mcc_event_process(adapter, compl); 4099aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 41010ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 4119aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 4129aebddd1SJeff Kirsher } 4139aebddd1SJeff Kirsher be_mcc_compl_use(compl); 4149aebddd1SJeff Kirsher num++; 4159aebddd1SJeff Kirsher } 4169aebddd1SJeff Kirsher 41710ef9ab4SSathya Perla if (num) 41810ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 41910ef9ab4SSathya Perla 420072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 42110ef9ab4SSathya Perla return status; 4229aebddd1SJeff Kirsher } 4239aebddd1SJeff Kirsher 4249aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 4259aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 4269aebddd1SJeff Kirsher { 4279aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 42810ef9ab4SSathya Perla int i, status = 0; 4299aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 4309aebddd1SJeff Kirsher 4316589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 4326589ade0SSathya Perla if (be_error(adapter)) 4339aebddd1SJeff Kirsher return -EIO; 4349aebddd1SJeff Kirsher 435072a9c48SAmerigo Wang local_bh_disable(); 43610ef9ab4SSathya Perla status = be_process_mcc(adapter); 437072a9c48SAmerigo Wang local_bh_enable(); 4389aebddd1SJeff Kirsher 4399aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 4409aebddd1SJeff Kirsher break; 4419aebddd1SJeff Kirsher udelay(100); 4429aebddd1SJeff Kirsher } 4439aebddd1SJeff Kirsher if (i == mcc_timeout) { 4446589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4456589ade0SSathya Perla adapter->fw_timeout = true; 446652bf646SPadmanabh Ratnakar return -EIO; 4479aebddd1SJeff Kirsher } 4489aebddd1SJeff Kirsher return status; 4499aebddd1SJeff Kirsher } 4509aebddd1SJeff Kirsher 4519aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4529aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4539aebddd1SJeff Kirsher { 454652bf646SPadmanabh Ratnakar int status; 455652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 456652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 457652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 458652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 459652bf646SPadmanabh Ratnakar 460652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 461652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 462652bf646SPadmanabh Ratnakar 463652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 464652bf646SPadmanabh Ratnakar 4659aebddd1SJeff Kirsher be_mcc_notify(adapter); 466652bf646SPadmanabh Ratnakar 467652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 468652bf646SPadmanabh Ratnakar if (status == -EIO) 469652bf646SPadmanabh Ratnakar goto out; 470652bf646SPadmanabh Ratnakar 4714c60005fSKalesh AP status = (resp->base_status | 4724c60005fSKalesh AP ((resp->addl_status & CQE_ADDL_STATUS_MASK) << 4734c60005fSKalesh AP CQE_ADDL_STATUS_SHIFT)); 474652bf646SPadmanabh Ratnakar out: 475652bf646SPadmanabh Ratnakar return status; 4769aebddd1SJeff Kirsher } 4779aebddd1SJeff Kirsher 4789aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4799aebddd1SJeff Kirsher { 4809aebddd1SJeff Kirsher int msecs = 0; 4819aebddd1SJeff Kirsher u32 ready; 4829aebddd1SJeff Kirsher 4836589ade0SSathya Perla do { 4846589ade0SSathya Perla if (be_error(adapter)) 4859aebddd1SJeff Kirsher return -EIO; 4869aebddd1SJeff Kirsher 4879aebddd1SJeff Kirsher ready = ioread32(db); 488434b3648SSathya Perla if (ready == 0xffffffff) 4899aebddd1SJeff Kirsher return -1; 4909aebddd1SJeff Kirsher 4919aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4929aebddd1SJeff Kirsher if (ready) 4939aebddd1SJeff Kirsher break; 4949aebddd1SJeff Kirsher 4959aebddd1SJeff Kirsher if (msecs > 4000) { 4966589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4976589ade0SSathya Perla adapter->fw_timeout = true; 498f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4999aebddd1SJeff Kirsher return -1; 5009aebddd1SJeff Kirsher } 5019aebddd1SJeff Kirsher 5029aebddd1SJeff Kirsher msleep(1); 5039aebddd1SJeff Kirsher msecs++; 5049aebddd1SJeff Kirsher } while (true); 5059aebddd1SJeff Kirsher 5069aebddd1SJeff Kirsher return 0; 5079aebddd1SJeff Kirsher } 5089aebddd1SJeff Kirsher 5099aebddd1SJeff Kirsher /* 5109aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 5119aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 5129aebddd1SJeff Kirsher */ 5139aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 5149aebddd1SJeff Kirsher { 5159aebddd1SJeff Kirsher int status; 5169aebddd1SJeff Kirsher u32 val = 0; 5179aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 5189aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 5199aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 5209aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 5219aebddd1SJeff Kirsher 5229aebddd1SJeff Kirsher /* wait for ready to be set */ 5239aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5249aebddd1SJeff Kirsher if (status != 0) 5259aebddd1SJeff Kirsher return status; 5269aebddd1SJeff Kirsher 5279aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 5289aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 5299aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 5309aebddd1SJeff Kirsher iowrite32(val, db); 5319aebddd1SJeff Kirsher 5329aebddd1SJeff Kirsher /* wait for ready to be set */ 5339aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5349aebddd1SJeff Kirsher if (status != 0) 5359aebddd1SJeff Kirsher return status; 5369aebddd1SJeff Kirsher 5379aebddd1SJeff Kirsher val = 0; 5389aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 5399aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 5409aebddd1SJeff Kirsher iowrite32(val, db); 5419aebddd1SJeff Kirsher 5429aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 5439aebddd1SJeff Kirsher if (status != 0) 5449aebddd1SJeff Kirsher return status; 5459aebddd1SJeff Kirsher 5469aebddd1SJeff Kirsher /* A cq entry has been made now */ 5479aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5489aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5499aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5509aebddd1SJeff Kirsher if (status) 5519aebddd1SJeff Kirsher return status; 5529aebddd1SJeff Kirsher } else { 5539aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5549aebddd1SJeff Kirsher return -1; 5559aebddd1SJeff Kirsher } 5569aebddd1SJeff Kirsher return 0; 5579aebddd1SJeff Kirsher } 5589aebddd1SJeff Kirsher 559c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5609aebddd1SJeff Kirsher { 5619aebddd1SJeff Kirsher u32 sem; 5629aebddd1SJeff Kirsher 563c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 564c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5659aebddd1SJeff Kirsher else 566c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 567c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 568c5b3ad4cSSathya Perla 569c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5709aebddd1SJeff Kirsher } 5719aebddd1SJeff Kirsher 57287f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 573bf99e50dSPadmanabh Ratnakar { 574bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 575bf99e50dSPadmanabh Ratnakar u32 sliport_status; 576bf99e50dSPadmanabh Ratnakar int status = 0, i; 577bf99e50dSPadmanabh Ratnakar 578bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 579bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 580bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 581bf99e50dSPadmanabh Ratnakar break; 582bf99e50dSPadmanabh Ratnakar 583bf99e50dSPadmanabh Ratnakar msleep(1000); 584bf99e50dSPadmanabh Ratnakar } 585bf99e50dSPadmanabh Ratnakar 586bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 587bf99e50dSPadmanabh Ratnakar status = -1; 588bf99e50dSPadmanabh Ratnakar 589bf99e50dSPadmanabh Ratnakar return status; 590bf99e50dSPadmanabh Ratnakar } 591bf99e50dSPadmanabh Ratnakar 59267297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 59367297ad8SPadmanabh Ratnakar { 59467297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 59503d28ffeSKalesh AP 59667297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 59767297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 598a2cc4e0bSSathya Perla sliport_err1 = ioread32(adapter->db + SLIPORT_ERROR1_OFFSET); 599a2cc4e0bSSathya Perla sliport_err2 = ioread32(adapter->db + SLIPORT_ERROR2_OFFSET); 60067297ad8SPadmanabh Ratnakar 60167297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 60267297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 60367297ad8SPadmanabh Ratnakar return true; 60467297ad8SPadmanabh Ratnakar } 60567297ad8SPadmanabh Ratnakar return false; 60667297ad8SPadmanabh Ratnakar } 60767297ad8SPadmanabh Ratnakar 608bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 609bf99e50dSPadmanabh Ratnakar { 610bf99e50dSPadmanabh Ratnakar int status; 611bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 61267297ad8SPadmanabh Ratnakar bool resource_error; 61367297ad8SPadmanabh Ratnakar 61467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 61567297ad8SPadmanabh Ratnakar if (resource_error) 61601e5b2c4SSomnath Kotur return -EAGAIN; 61767297ad8SPadmanabh Ratnakar 618bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 619bf99e50dSPadmanabh Ratnakar if (!status) { 620bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 621bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 622bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 623bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 624bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 625bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 626bf99e50dSPadmanabh Ratnakar 627bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 628bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 629bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 630bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 631bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 632bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 633bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 634bf99e50dSPadmanabh Ratnakar status = -1; 635bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 636bf99e50dSPadmanabh Ratnakar status = -1; 637bf99e50dSPadmanabh Ratnakar } 638bf99e50dSPadmanabh Ratnakar } 63967297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 64067297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 64167297ad8SPadmanabh Ratnakar * when PF provisions resources. 64267297ad8SPadmanabh Ratnakar */ 64367297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 64401e5b2c4SSomnath Kotur if (resource_error) 64501e5b2c4SSomnath Kotur status = -EAGAIN; 64667297ad8SPadmanabh Ratnakar 647bf99e50dSPadmanabh Ratnakar return status; 648bf99e50dSPadmanabh Ratnakar } 649bf99e50dSPadmanabh Ratnakar 650bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6519aebddd1SJeff Kirsher { 6529aebddd1SJeff Kirsher u16 stage; 6539aebddd1SJeff Kirsher int status, timeout = 0; 6549aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6559aebddd1SJeff Kirsher 656bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 657bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 658bf99e50dSPadmanabh Ratnakar return status; 659bf99e50dSPadmanabh Ratnakar } 660bf99e50dSPadmanabh Ratnakar 6619aebddd1SJeff Kirsher do { 662c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 66366d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 66466d29cbcSGavin Shan return 0; 66566d29cbcSGavin Shan 666a2cc4e0bSSathya Perla dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout); 6679aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6689aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6699aebddd1SJeff Kirsher return -EINTR; 6709aebddd1SJeff Kirsher } 6719aebddd1SJeff Kirsher timeout += 2; 6723ab81b5fSSomnath Kotur } while (timeout < 60); 6739aebddd1SJeff Kirsher 6749aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6759aebddd1SJeff Kirsher return -1; 6769aebddd1SJeff Kirsher } 6779aebddd1SJeff Kirsher 6789aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6799aebddd1SJeff Kirsher { 6809aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6819aebddd1SJeff Kirsher } 6829aebddd1SJeff Kirsher 683a2cc4e0bSSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr) 684bea50988SSathya Perla { 685bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 686bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 687bea50988SSathya Perla } 6889aebddd1SJeff Kirsher 6899aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 690106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 691106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 692106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 693a2cc4e0bSSathya Perla struct be_mcc_wrb *wrb, 694a2cc4e0bSSathya Perla struct be_dma_mem *mem) 6959aebddd1SJeff Kirsher { 696106df1e3SSomnath Kotur struct be_sge *sge; 697106df1e3SSomnath Kotur 6989aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6999aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 7009aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 7019aebddd1SJeff Kirsher req_hdr->version = 0; 702bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 703106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 704106df1e3SSomnath Kotur if (mem) { 705106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 706106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 707106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 708106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 709106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 710106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 711106df1e3SSomnath Kotur } else 712106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 713106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 7149aebddd1SJeff Kirsher } 7159aebddd1SJeff Kirsher 7169aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 7179aebddd1SJeff Kirsher struct be_dma_mem *mem) 7189aebddd1SJeff Kirsher { 7199aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 7209aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 7219aebddd1SJeff Kirsher 7229aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 7239aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 7249aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 7259aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 7269aebddd1SJeff Kirsher } 7279aebddd1SJeff Kirsher } 7289aebddd1SJeff Kirsher 7299aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 7309aebddd1SJeff Kirsher { 7319aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 7329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 7339aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 7349aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7359aebddd1SJeff Kirsher return wrb; 7369aebddd1SJeff Kirsher } 7379aebddd1SJeff Kirsher 7389aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 7399aebddd1SJeff Kirsher { 7409aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 7419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7429aebddd1SJeff Kirsher 743aa790db9SPadmanabh Ratnakar if (!mccq->created) 744aa790db9SPadmanabh Ratnakar return NULL; 745aa790db9SPadmanabh Ratnakar 7464d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7479aebddd1SJeff Kirsher return NULL; 7489aebddd1SJeff Kirsher 7499aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7509aebddd1SJeff Kirsher queue_head_inc(mccq); 7519aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7529aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7539aebddd1SJeff Kirsher return wrb; 7549aebddd1SJeff Kirsher } 7559aebddd1SJeff Kirsher 756bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 757bea50988SSathya Perla { 758bea50988SSathya Perla return adapter->mcc_obj.q.created; 759bea50988SSathya Perla } 760bea50988SSathya Perla 761bea50988SSathya Perla /* Must be used only in process context */ 762bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 763bea50988SSathya Perla { 764bea50988SSathya Perla if (use_mcc(adapter)) { 765bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 766bea50988SSathya Perla return 0; 767bea50988SSathya Perla } else { 768bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 769bea50988SSathya Perla } 770bea50988SSathya Perla } 771bea50988SSathya Perla 772bea50988SSathya Perla /* Must be used only in process context */ 773bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 774bea50988SSathya Perla { 775bea50988SSathya Perla if (use_mcc(adapter)) 776bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 777bea50988SSathya Perla else 778bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 779bea50988SSathya Perla } 780bea50988SSathya Perla 781bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 782bea50988SSathya Perla struct be_mcc_wrb *wrb) 783bea50988SSathya Perla { 784bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 785bea50988SSathya Perla 786bea50988SSathya Perla if (use_mcc(adapter)) { 787bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 788bea50988SSathya Perla if (!dest_wrb) 789bea50988SSathya Perla return NULL; 790bea50988SSathya Perla } else { 791bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 792bea50988SSathya Perla } 793bea50988SSathya Perla 794bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 795bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 796bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 797bea50988SSathya Perla 798bea50988SSathya Perla return dest_wrb; 799bea50988SSathya Perla } 800bea50988SSathya Perla 801bea50988SSathya Perla /* Must be used only in process context */ 802bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 803bea50988SSathya Perla struct be_mcc_wrb *wrb) 804bea50988SSathya Perla { 805bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 806bea50988SSathya Perla int status; 807bea50988SSathya Perla 808bea50988SSathya Perla status = be_cmd_lock(adapter); 809bea50988SSathya Perla if (status) 810bea50988SSathya Perla return status; 811bea50988SSathya Perla 812bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 813bea50988SSathya Perla if (!dest_wrb) 814bea50988SSathya Perla return -EBUSY; 815bea50988SSathya Perla 816bea50988SSathya Perla if (use_mcc(adapter)) 817bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 818bea50988SSathya Perla else 819bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 820bea50988SSathya Perla 821bea50988SSathya Perla if (!status) 822bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 823bea50988SSathya Perla 824bea50988SSathya Perla be_cmd_unlock(adapter); 825bea50988SSathya Perla return status; 826bea50988SSathya Perla } 827bea50988SSathya Perla 8289aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 8299aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8309aebddd1SJeff Kirsher */ 8319aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 8329aebddd1SJeff Kirsher { 8339aebddd1SJeff Kirsher u8 *wrb; 8349aebddd1SJeff Kirsher int status; 8359aebddd1SJeff Kirsher 836bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 837bf99e50dSPadmanabh Ratnakar return 0; 838bf99e50dSPadmanabh Ratnakar 8399aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8409aebddd1SJeff Kirsher return -1; 8419aebddd1SJeff Kirsher 8429aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8439aebddd1SJeff Kirsher *wrb++ = 0xFF; 8449aebddd1SJeff Kirsher *wrb++ = 0x12; 8459aebddd1SJeff Kirsher *wrb++ = 0x34; 8469aebddd1SJeff Kirsher *wrb++ = 0xFF; 8479aebddd1SJeff Kirsher *wrb++ = 0xFF; 8489aebddd1SJeff Kirsher *wrb++ = 0x56; 8499aebddd1SJeff Kirsher *wrb++ = 0x78; 8509aebddd1SJeff Kirsher *wrb = 0xFF; 8519aebddd1SJeff Kirsher 8529aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8539aebddd1SJeff Kirsher 8549aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8559aebddd1SJeff Kirsher return status; 8569aebddd1SJeff Kirsher } 8579aebddd1SJeff Kirsher 8589aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8599aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8609aebddd1SJeff Kirsher */ 8619aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8629aebddd1SJeff Kirsher { 8639aebddd1SJeff Kirsher u8 *wrb; 8649aebddd1SJeff Kirsher int status; 8659aebddd1SJeff Kirsher 866bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 867bf99e50dSPadmanabh Ratnakar return 0; 868bf99e50dSPadmanabh Ratnakar 8699aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8709aebddd1SJeff Kirsher return -1; 8719aebddd1SJeff Kirsher 8729aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8739aebddd1SJeff Kirsher *wrb++ = 0xFF; 8749aebddd1SJeff Kirsher *wrb++ = 0xAA; 8759aebddd1SJeff Kirsher *wrb++ = 0xBB; 8769aebddd1SJeff Kirsher *wrb++ = 0xFF; 8779aebddd1SJeff Kirsher *wrb++ = 0xFF; 8789aebddd1SJeff Kirsher *wrb++ = 0xCC; 8799aebddd1SJeff Kirsher *wrb++ = 0xDD; 8809aebddd1SJeff Kirsher *wrb = 0xFF; 8819aebddd1SJeff Kirsher 8829aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8839aebddd1SJeff Kirsher 8849aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8859aebddd1SJeff Kirsher return status; 8869aebddd1SJeff Kirsher } 887bf99e50dSPadmanabh Ratnakar 888f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8899aebddd1SJeff Kirsher { 8909aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8919aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 892f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 893f2f781a7SSathya Perla int status, ver = 0; 8949aebddd1SJeff Kirsher 8959aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8969aebddd1SJeff Kirsher return -1; 8979aebddd1SJeff Kirsher 8989aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8999aebddd1SJeff Kirsher req = embedded_payload(wrb); 9009aebddd1SJeff Kirsher 901106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 902a2cc4e0bSSathya Perla OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, 903a2cc4e0bSSathya Perla NULL); 9049aebddd1SJeff Kirsher 905f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 906f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 907f2f781a7SSathya Perla ver = 2; 908f2f781a7SSathya Perla 909f2f781a7SSathya Perla req->hdr.version = ver; 9109aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 9119aebddd1SJeff Kirsher 9129aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 9139aebddd1SJeff Kirsher /* 4byte eqe*/ 9149aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 9159aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 916f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 9179aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 9189aebddd1SJeff Kirsher 9199aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9209aebddd1SJeff Kirsher 9219aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9229aebddd1SJeff Kirsher if (!status) { 9239aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 92403d28ffeSKalesh AP 925f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 926f2f781a7SSathya Perla eqo->msix_idx = 927f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 928f2f781a7SSathya Perla eqo->q.created = true; 9299aebddd1SJeff Kirsher } 9309aebddd1SJeff Kirsher 9319aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9329aebddd1SJeff Kirsher return status; 9339aebddd1SJeff Kirsher } 9349aebddd1SJeff Kirsher 935f9449ab7SSathya Perla /* Use MCC */ 9369aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 9375ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 9389aebddd1SJeff Kirsher { 9399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9409aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 9419aebddd1SJeff Kirsher int status; 9429aebddd1SJeff Kirsher 943f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 9449aebddd1SJeff Kirsher 945f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 946f9449ab7SSathya Perla if (!wrb) { 947f9449ab7SSathya Perla status = -EBUSY; 948f9449ab7SSathya Perla goto err; 949f9449ab7SSathya Perla } 9509aebddd1SJeff Kirsher req = embedded_payload(wrb); 9519aebddd1SJeff Kirsher 952106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 953a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, 954a2cc4e0bSSathya Perla NULL); 9555ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9569aebddd1SJeff Kirsher if (permanent) { 9579aebddd1SJeff Kirsher req->permanent = 1; 9589aebddd1SJeff Kirsher } else { 9599aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16)if_handle); 960590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9619aebddd1SJeff Kirsher req->permanent = 0; 9629aebddd1SJeff Kirsher } 9639aebddd1SJeff Kirsher 964f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9659aebddd1SJeff Kirsher if (!status) { 9669aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 96703d28ffeSKalesh AP 9689aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9699aebddd1SJeff Kirsher } 9709aebddd1SJeff Kirsher 971f9449ab7SSathya Perla err: 972f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9739aebddd1SJeff Kirsher return status; 9749aebddd1SJeff Kirsher } 9759aebddd1SJeff Kirsher 9769aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9779aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9789aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9799aebddd1SJeff Kirsher { 9809aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9819aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9829aebddd1SJeff Kirsher int status; 9839aebddd1SJeff Kirsher 9849aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9859aebddd1SJeff Kirsher 9869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9879aebddd1SJeff Kirsher if (!wrb) { 9889aebddd1SJeff Kirsher status = -EBUSY; 9899aebddd1SJeff Kirsher goto err; 9909aebddd1SJeff Kirsher } 9919aebddd1SJeff Kirsher req = embedded_payload(wrb); 9929aebddd1SJeff Kirsher 993106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 994a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, 995a2cc4e0bSSathya Perla NULL); 9969aebddd1SJeff Kirsher 9979aebddd1SJeff Kirsher req->hdr.domain = domain; 9989aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9999aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 10009aebddd1SJeff Kirsher 10019aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10029aebddd1SJeff Kirsher if (!status) { 10039aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 100403d28ffeSKalesh AP 10059aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 10069aebddd1SJeff Kirsher } 10079aebddd1SJeff Kirsher 10089aebddd1SJeff Kirsher err: 10099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1010e3a7ae2cSSomnath Kotur 1011e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 1012e3a7ae2cSSomnath Kotur status = -EPERM; 1013e3a7ae2cSSomnath Kotur 10149aebddd1SJeff Kirsher return status; 10159aebddd1SJeff Kirsher } 10169aebddd1SJeff Kirsher 10179aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 101830128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 10199aebddd1SJeff Kirsher { 10209aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10219aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 10229aebddd1SJeff Kirsher int status; 10239aebddd1SJeff Kirsher 102430128031SSathya Perla if (pmac_id == -1) 102530128031SSathya Perla return 0; 102630128031SSathya Perla 10279aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 10289aebddd1SJeff Kirsher 10299aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 10309aebddd1SJeff Kirsher if (!wrb) { 10319aebddd1SJeff Kirsher status = -EBUSY; 10329aebddd1SJeff Kirsher goto err; 10339aebddd1SJeff Kirsher } 10349aebddd1SJeff Kirsher req = embedded_payload(wrb); 10359aebddd1SJeff Kirsher 1036106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1037106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 10389aebddd1SJeff Kirsher 10399aebddd1SJeff Kirsher req->hdr.domain = dom; 10409aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 10419aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 10429aebddd1SJeff Kirsher 10439aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 10449aebddd1SJeff Kirsher 10459aebddd1SJeff Kirsher err: 10469aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 10479aebddd1SJeff Kirsher return status; 10489aebddd1SJeff Kirsher } 10499aebddd1SJeff Kirsher 10509aebddd1SJeff Kirsher /* Uses Mbox */ 105110ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 105210ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10539aebddd1SJeff Kirsher { 10549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10559aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10569aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10579aebddd1SJeff Kirsher void *ctxt; 10589aebddd1SJeff Kirsher int status; 10599aebddd1SJeff Kirsher 10609aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10619aebddd1SJeff Kirsher return -1; 10629aebddd1SJeff Kirsher 10639aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10649aebddd1SJeff Kirsher req = embedded_payload(wrb); 10659aebddd1SJeff Kirsher ctxt = &req->context; 10669aebddd1SJeff Kirsher 1067106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1068a2cc4e0bSSathya Perla OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, 1069a2cc4e0bSSathya Perla NULL); 10709aebddd1SJeff Kirsher 10719aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1072bbdc42f8SAjit Khaparde 1073bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10759aebddd1SJeff Kirsher coalesce_wm); 10769aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10779aebddd1SJeff Kirsher ctxt, no_delay); 10789aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10799aebddd1SJeff Kirsher __ilog2_u32(cq->len / 256)); 10809aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10819aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10829aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1083bbdc42f8SAjit Khaparde } else { 1084bbdc42f8SAjit Khaparde req->hdr.version = 2; 1085bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 108609e83a9dSAjit Khaparde 108709e83a9dSAjit Khaparde /* coalesce-wm field in this cmd is not relevant to Lancer. 108809e83a9dSAjit Khaparde * Lancer uses COMMON_MODIFY_CQ to set this field 108909e83a9dSAjit Khaparde */ 109009e83a9dSAjit Khaparde if (!lancer_chip(adapter)) 109109e83a9dSAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 109209e83a9dSAjit Khaparde ctxt, coalesce_wm); 1093bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1094bbdc42f8SAjit Khaparde no_delay); 1095bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1096bbdc42f8SAjit Khaparde __ilog2_u32(cq->len / 256)); 1097bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1098a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1); 1099a2cc4e0bSSathya Perla AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id); 11009aebddd1SJeff Kirsher } 11019aebddd1SJeff Kirsher 11029aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11039aebddd1SJeff Kirsher 11049aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11059aebddd1SJeff Kirsher 11069aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11079aebddd1SJeff Kirsher if (!status) { 11089aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 110903d28ffeSKalesh AP 11109aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 11119aebddd1SJeff Kirsher cq->created = true; 11129aebddd1SJeff Kirsher } 11139aebddd1SJeff Kirsher 11149aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11159aebddd1SJeff Kirsher 11169aebddd1SJeff Kirsher return status; 11179aebddd1SJeff Kirsher } 11189aebddd1SJeff Kirsher 11199aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 11209aebddd1SJeff Kirsher { 11219aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 112203d28ffeSKalesh AP 11239aebddd1SJeff Kirsher if (len_encoded == 16) 11249aebddd1SJeff Kirsher len_encoded = 0; 11259aebddd1SJeff Kirsher return len_encoded; 11269aebddd1SJeff Kirsher } 11279aebddd1SJeff Kirsher 11284188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 11299aebddd1SJeff Kirsher struct be_queue_info *mccq, 11309aebddd1SJeff Kirsher struct be_queue_info *cq) 11319aebddd1SJeff Kirsher { 11329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11339aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 11349aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11359aebddd1SJeff Kirsher void *ctxt; 11369aebddd1SJeff Kirsher int status; 11379aebddd1SJeff Kirsher 11389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11399aebddd1SJeff Kirsher return -1; 11409aebddd1SJeff Kirsher 11419aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11429aebddd1SJeff Kirsher req = embedded_payload(wrb); 11439aebddd1SJeff Kirsher ctxt = &req->context; 11449aebddd1SJeff Kirsher 1145106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1146a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, 1147a2cc4e0bSSathya Perla NULL); 11489aebddd1SJeff Kirsher 11499aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1150666d39c7SVasundhara Volam if (BEx_chip(adapter)) { 11519aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11529aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11539aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1155666d39c7SVasundhara Volam } else { 1156666d39c7SVasundhara Volam req->hdr.version = 1; 1157666d39c7SVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 1158666d39c7SVasundhara Volam 1159666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt, 1160666d39c7SVasundhara Volam be_encoded_q_len(mccq->len)); 1161666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1); 1162666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id, 1163666d39c7SVasundhara Volam ctxt, cq->id); 1164666d39c7SVasundhara Volam AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid, 1165666d39c7SVasundhara Volam ctxt, 1); 11669aebddd1SJeff Kirsher } 11679aebddd1SJeff Kirsher 11689aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11699aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1170bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11719aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11729aebddd1SJeff Kirsher 11739aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11749aebddd1SJeff Kirsher 11759aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11769aebddd1SJeff Kirsher if (!status) { 11779aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 117803d28ffeSKalesh AP 11799aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11809aebddd1SJeff Kirsher mccq->created = true; 11819aebddd1SJeff Kirsher } 11829aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11839aebddd1SJeff Kirsher 11849aebddd1SJeff Kirsher return status; 11859aebddd1SJeff Kirsher } 11869aebddd1SJeff Kirsher 11874188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11889aebddd1SJeff Kirsher struct be_queue_info *mccq, 11899aebddd1SJeff Kirsher struct be_queue_info *cq) 11909aebddd1SJeff Kirsher { 11919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11929aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11939aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11949aebddd1SJeff Kirsher void *ctxt; 11959aebddd1SJeff Kirsher int status; 11969aebddd1SJeff Kirsher 11979aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11989aebddd1SJeff Kirsher return -1; 11999aebddd1SJeff Kirsher 12009aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12019aebddd1SJeff Kirsher req = embedded_payload(wrb); 12029aebddd1SJeff Kirsher ctxt = &req->context; 12039aebddd1SJeff Kirsher 1204106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1205a2cc4e0bSSathya Perla OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, 1206a2cc4e0bSSathya Perla NULL); 12079aebddd1SJeff Kirsher 12089aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 12099aebddd1SJeff Kirsher 12109aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 12119aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 12129aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 12139aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 12149aebddd1SJeff Kirsher 12159aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 12169aebddd1SJeff Kirsher 12179aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12189aebddd1SJeff Kirsher 12199aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12209aebddd1SJeff Kirsher if (!status) { 12219aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 122203d28ffeSKalesh AP 12239aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 12249aebddd1SJeff Kirsher mccq->created = true; 12259aebddd1SJeff Kirsher } 12269aebddd1SJeff Kirsher 12279aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12289aebddd1SJeff Kirsher return status; 12299aebddd1SJeff Kirsher } 12309aebddd1SJeff Kirsher 12319aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 1232a2cc4e0bSSathya Perla struct be_queue_info *mccq, struct be_queue_info *cq) 12339aebddd1SJeff Kirsher { 12349aebddd1SJeff Kirsher int status; 12359aebddd1SJeff Kirsher 12369aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 1237666d39c7SVasundhara Volam if (status && BEx_chip(adapter)) { 12389aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 12399aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 12409aebddd1SJeff Kirsher "and FCoE traffic"); 12419aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 12429aebddd1SJeff Kirsher } 12439aebddd1SJeff Kirsher return status; 12449aebddd1SJeff Kirsher } 12459aebddd1SJeff Kirsher 124694d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 12479aebddd1SJeff Kirsher { 12487707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 12499aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 125094d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 125194d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 12529aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 125394d73aaaSVasundhara Volam int status, ver = 0; 12549aebddd1SJeff Kirsher 12557707133cSSathya Perla req = embedded_payload(&wrb); 1256106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 12577707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 12589aebddd1SJeff Kirsher 12599aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12609aebddd1SJeff Kirsher req->hdr.version = 1; 126194d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 126294d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 126394d73aaaSVasundhara Volam req->hdr.version = 2; 126494d73aaaSVasundhara Volam } else { /* For SH */ 126594d73aaaSVasundhara Volam req->hdr.version = 2; 12669aebddd1SJeff Kirsher } 12679aebddd1SJeff Kirsher 126881b02655SVasundhara Volam if (req->hdr.version > 0) 126981b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12709aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12719aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12729aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 127394d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 127494d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12759aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 127694d73aaaSVasundhara Volam ver = req->hdr.version; 127794d73aaaSVasundhara Volam 12787707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12799aebddd1SJeff Kirsher if (!status) { 12807707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 128103d28ffeSKalesh AP 12829aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 128394d73aaaSVasundhara Volam if (ver == 2) 128494d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 128594d73aaaSVasundhara Volam else 128694d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12879aebddd1SJeff Kirsher txq->created = true; 12889aebddd1SJeff Kirsher } 12899aebddd1SJeff Kirsher 12909aebddd1SJeff Kirsher return status; 12919aebddd1SJeff Kirsher } 12929aebddd1SJeff Kirsher 12939aebddd1SJeff Kirsher /* Uses MCC */ 12949aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12959aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 129610ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12979aebddd1SJeff Kirsher { 12989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12999aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 13009aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 13019aebddd1SJeff Kirsher int status; 13029aebddd1SJeff Kirsher 13039aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13049aebddd1SJeff Kirsher 13059aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13069aebddd1SJeff Kirsher if (!wrb) { 13079aebddd1SJeff Kirsher status = -EBUSY; 13089aebddd1SJeff Kirsher goto err; 13099aebddd1SJeff Kirsher } 13109aebddd1SJeff Kirsher req = embedded_payload(wrb); 13119aebddd1SJeff Kirsher 1312106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1313106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 13149aebddd1SJeff Kirsher 13159aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 13169aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 13179aebddd1SJeff Kirsher req->num_pages = 2; 13189aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 13199aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 132010ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 13219aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 13229aebddd1SJeff Kirsher 13239aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13249aebddd1SJeff Kirsher if (!status) { 13259aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 132603d28ffeSKalesh AP 13279aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 13289aebddd1SJeff Kirsher rxq->created = true; 13299aebddd1SJeff Kirsher *rss_id = resp->rss_id; 13309aebddd1SJeff Kirsher } 13319aebddd1SJeff Kirsher 13329aebddd1SJeff Kirsher err: 13339aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13349aebddd1SJeff Kirsher return status; 13359aebddd1SJeff Kirsher } 13369aebddd1SJeff Kirsher 13379aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 13389aebddd1SJeff Kirsher * Uses Mbox 13399aebddd1SJeff Kirsher */ 13409aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 13419aebddd1SJeff Kirsher int queue_type) 13429aebddd1SJeff Kirsher { 13439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13449aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13459aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 13469aebddd1SJeff Kirsher int status; 13479aebddd1SJeff Kirsher 13489aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 13499aebddd1SJeff Kirsher return -1; 13509aebddd1SJeff Kirsher 13519aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 13529aebddd1SJeff Kirsher req = embedded_payload(wrb); 13539aebddd1SJeff Kirsher 13549aebddd1SJeff Kirsher switch (queue_type) { 13559aebddd1SJeff Kirsher case QTYPE_EQ: 13569aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13579aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 13589aebddd1SJeff Kirsher break; 13599aebddd1SJeff Kirsher case QTYPE_CQ: 13609aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13619aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13629aebddd1SJeff Kirsher break; 13639aebddd1SJeff Kirsher case QTYPE_TXQ: 13649aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13659aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13669aebddd1SJeff Kirsher break; 13679aebddd1SJeff Kirsher case QTYPE_RXQ: 13689aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13699aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13709aebddd1SJeff Kirsher break; 13719aebddd1SJeff Kirsher case QTYPE_MCCQ: 13729aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13739aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13749aebddd1SJeff Kirsher break; 13759aebddd1SJeff Kirsher default: 13769aebddd1SJeff Kirsher BUG(); 13779aebddd1SJeff Kirsher } 13789aebddd1SJeff Kirsher 1379106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1380106df1e3SSomnath Kotur NULL); 13819aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13829aebddd1SJeff Kirsher 13839aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13849aebddd1SJeff Kirsher q->created = false; 13859aebddd1SJeff Kirsher 13869aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13879aebddd1SJeff Kirsher return status; 13889aebddd1SJeff Kirsher } 13899aebddd1SJeff Kirsher 13909aebddd1SJeff Kirsher /* Uses MCC */ 13919aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13929aebddd1SJeff Kirsher { 13939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13949aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13959aebddd1SJeff Kirsher int status; 13969aebddd1SJeff Kirsher 13979aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13989aebddd1SJeff Kirsher 13999aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14009aebddd1SJeff Kirsher if (!wrb) { 14019aebddd1SJeff Kirsher status = -EBUSY; 14029aebddd1SJeff Kirsher goto err; 14039aebddd1SJeff Kirsher } 14049aebddd1SJeff Kirsher req = embedded_payload(wrb); 14059aebddd1SJeff Kirsher 1406106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1407106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 14089aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 14099aebddd1SJeff Kirsher 14109aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14119aebddd1SJeff Kirsher q->created = false; 14129aebddd1SJeff Kirsher 14139aebddd1SJeff Kirsher err: 14149aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14159aebddd1SJeff Kirsher return status; 14169aebddd1SJeff Kirsher } 14179aebddd1SJeff Kirsher 14189aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1419bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 14209aebddd1SJeff Kirsher */ 14219aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 14221578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 14239aebddd1SJeff Kirsher { 1424bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 14259aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 14269aebddd1SJeff Kirsher int status; 14279aebddd1SJeff Kirsher 1428bea50988SSathya Perla req = embedded_payload(&wrb); 1429106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1430a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, 1431a2cc4e0bSSathya Perla sizeof(*req), &wrb, NULL); 14329aebddd1SJeff Kirsher req->hdr.domain = domain; 14339aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 14349aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1435f9449ab7SSathya Perla req->pmac_invalid = true; 14369aebddd1SJeff Kirsher 1437bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 14389aebddd1SJeff Kirsher if (!status) { 1439bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 144003d28ffeSKalesh AP 14419aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1442b5bb9776SSathya Perla 1443b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1444b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1445b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 14469aebddd1SJeff Kirsher } 14479aebddd1SJeff Kirsher return status; 14489aebddd1SJeff Kirsher } 14499aebddd1SJeff Kirsher 1450f9449ab7SSathya Perla /* Uses MCCQ */ 145130128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 14529aebddd1SJeff Kirsher { 14539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14549aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 14559aebddd1SJeff Kirsher int status; 14569aebddd1SJeff Kirsher 145730128031SSathya Perla if (interface_id == -1) 1458f9449ab7SSathya Perla return 0; 14599aebddd1SJeff Kirsher 1460f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1461f9449ab7SSathya Perla 1462f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1463f9449ab7SSathya Perla if (!wrb) { 1464f9449ab7SSathya Perla status = -EBUSY; 1465f9449ab7SSathya Perla goto err; 1466f9449ab7SSathya Perla } 14679aebddd1SJeff Kirsher req = embedded_payload(wrb); 14689aebddd1SJeff Kirsher 1469106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1470a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_INTERFACE_DESTROY, 1471a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 14729aebddd1SJeff Kirsher req->hdr.domain = domain; 14739aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14749aebddd1SJeff Kirsher 1475f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1476f9449ab7SSathya Perla err: 1477f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14789aebddd1SJeff Kirsher return status; 14799aebddd1SJeff Kirsher } 14809aebddd1SJeff Kirsher 14819aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14829aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14839aebddd1SJeff Kirsher * Uses asynchronous MCC 14849aebddd1SJeff Kirsher */ 14859aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14869aebddd1SJeff Kirsher { 14879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14889aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14899aebddd1SJeff Kirsher int status = 0; 14909aebddd1SJeff Kirsher 14919aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14929aebddd1SJeff Kirsher 14939aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14949aebddd1SJeff Kirsher if (!wrb) { 14959aebddd1SJeff Kirsher status = -EBUSY; 14969aebddd1SJeff Kirsher goto err; 14979aebddd1SJeff Kirsher } 14989aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14999aebddd1SJeff Kirsher 1500106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1501a2cc4e0bSSathya Perla OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, 1502a2cc4e0bSSathya Perla nonemb_cmd); 15039aebddd1SJeff Kirsher 1504ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 150561000861SAjit Khaparde if (BE2_chip(adapter)) 150661000861SAjit Khaparde hdr->version = 0; 150761000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 15089aebddd1SJeff Kirsher hdr->version = 1; 150961000861SAjit Khaparde else 151061000861SAjit Khaparde hdr->version = 2; 15119aebddd1SJeff Kirsher 15129aebddd1SJeff Kirsher be_mcc_notify(adapter); 15139aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15149aebddd1SJeff Kirsher 15159aebddd1SJeff Kirsher err: 15169aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15179aebddd1SJeff Kirsher return status; 15189aebddd1SJeff Kirsher } 15199aebddd1SJeff Kirsher 15209aebddd1SJeff Kirsher /* Lancer Stats */ 15219aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 15229aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 15239aebddd1SJeff Kirsher { 15249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15259aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 15269aebddd1SJeff Kirsher int status = 0; 15279aebddd1SJeff Kirsher 1528f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1529f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1530f25b119cSPadmanabh Ratnakar return -EPERM; 1531f25b119cSPadmanabh Ratnakar 15329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15339aebddd1SJeff Kirsher 15349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15359aebddd1SJeff Kirsher if (!wrb) { 15369aebddd1SJeff Kirsher status = -EBUSY; 15379aebddd1SJeff Kirsher goto err; 15389aebddd1SJeff Kirsher } 15399aebddd1SJeff Kirsher req = nonemb_cmd->va; 15409aebddd1SJeff Kirsher 1541106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1542a2cc4e0bSSathya Perla OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, 1543a2cc4e0bSSathya Perla wrb, nonemb_cmd); 15449aebddd1SJeff Kirsher 1545d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 15469aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 15479aebddd1SJeff Kirsher 15489aebddd1SJeff Kirsher be_mcc_notify(adapter); 15499aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 15509aebddd1SJeff Kirsher 15519aebddd1SJeff Kirsher err: 15529aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15539aebddd1SJeff Kirsher return status; 15549aebddd1SJeff Kirsher } 15559aebddd1SJeff Kirsher 1556323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1557323ff71eSSathya Perla { 1558323ff71eSSathya Perla switch (mac_speed) { 1559323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1560323ff71eSSathya Perla return 0; 1561323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1562323ff71eSSathya Perla return 10; 1563323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1564323ff71eSSathya Perla return 100; 1565323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1566323ff71eSSathya Perla return 1000; 1567323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1568323ff71eSSathya Perla return 10000; 1569b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1570b971f847SVasundhara Volam return 20000; 1571b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1572b971f847SVasundhara Volam return 25000; 1573b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1574b971f847SVasundhara Volam return 40000; 1575323ff71eSSathya Perla } 1576323ff71eSSathya Perla return 0; 1577323ff71eSSathya Perla } 1578323ff71eSSathya Perla 1579323ff71eSSathya Perla /* Uses synchronous mcc 1580323ff71eSSathya Perla * Returns link_speed in Mbps 1581323ff71eSSathya Perla */ 1582323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1583323ff71eSSathya Perla u8 *link_status, u32 dom) 15849aebddd1SJeff Kirsher { 15859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15869aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15879aebddd1SJeff Kirsher int status; 15889aebddd1SJeff Kirsher 15899aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15909aebddd1SJeff Kirsher 1591b236916aSAjit Khaparde if (link_status) 1592b236916aSAjit Khaparde *link_status = LINK_DOWN; 1593b236916aSAjit Khaparde 15949aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15959aebddd1SJeff Kirsher if (!wrb) { 15969aebddd1SJeff Kirsher status = -EBUSY; 15979aebddd1SJeff Kirsher goto err; 15989aebddd1SJeff Kirsher } 15999aebddd1SJeff Kirsher req = embedded_payload(wrb); 16009aebddd1SJeff Kirsher 160157cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1602a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, 1603a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 160457cd80d4SPadmanabh Ratnakar 1605ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1606ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1607daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1608daad6167SPadmanabh Ratnakar 160957cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 16109aebddd1SJeff Kirsher 16119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16129aebddd1SJeff Kirsher if (!status) { 16139aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 161403d28ffeSKalesh AP 1615323ff71eSSathya Perla if (link_speed) { 1616323ff71eSSathya Perla *link_speed = resp->link_speed ? 1617323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1618323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1619323ff71eSSathya Perla 1620323ff71eSSathya Perla if (!resp->logical_link_status) 1621323ff71eSSathya Perla *link_speed = 0; 16229aebddd1SJeff Kirsher } 1623b236916aSAjit Khaparde if (link_status) 1624b236916aSAjit Khaparde *link_status = resp->logical_link_status; 16259aebddd1SJeff Kirsher } 16269aebddd1SJeff Kirsher 16279aebddd1SJeff Kirsher err: 16289aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16299aebddd1SJeff Kirsher return status; 16309aebddd1SJeff Kirsher } 16319aebddd1SJeff Kirsher 16329aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16339aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 16349aebddd1SJeff Kirsher { 16359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16369aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1637117affe3SVasundhara Volam int status = 0; 16389aebddd1SJeff Kirsher 16399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16409aebddd1SJeff Kirsher 16419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16429aebddd1SJeff Kirsher if (!wrb) { 16439aebddd1SJeff Kirsher status = -EBUSY; 16449aebddd1SJeff Kirsher goto err; 16459aebddd1SJeff Kirsher } 16469aebddd1SJeff Kirsher req = embedded_payload(wrb); 16479aebddd1SJeff Kirsher 1648106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1649a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, 1650a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 16519aebddd1SJeff Kirsher 16523de09455SSomnath Kotur be_mcc_notify(adapter); 16539aebddd1SJeff Kirsher 16549aebddd1SJeff Kirsher err: 16559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16569aebddd1SJeff Kirsher return status; 16579aebddd1SJeff Kirsher } 16589aebddd1SJeff Kirsher 16599aebddd1SJeff Kirsher /* Uses synchronous mcc */ 16609aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 16619aebddd1SJeff Kirsher { 16629aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16639aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16649aebddd1SJeff Kirsher int status; 16659aebddd1SJeff Kirsher 16669aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16679aebddd1SJeff Kirsher 16689aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16699aebddd1SJeff Kirsher if (!wrb) { 16709aebddd1SJeff Kirsher status = -EBUSY; 16719aebddd1SJeff Kirsher goto err; 16729aebddd1SJeff Kirsher } 16739aebddd1SJeff Kirsher req = embedded_payload(wrb); 16749aebddd1SJeff Kirsher 1675106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1676a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, 1677a2cc4e0bSSathya Perla NULL); 16789aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16799aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16809aebddd1SJeff Kirsher if (!status) { 16819aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 168203d28ffeSKalesh AP 16839aebddd1SJeff Kirsher if (log_size && resp->log_size) 16849aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16859aebddd1SJeff Kirsher sizeof(u32); 16869aebddd1SJeff Kirsher } 16879aebddd1SJeff Kirsher err: 16889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16899aebddd1SJeff Kirsher return status; 16909aebddd1SJeff Kirsher } 16919aebddd1SJeff Kirsher 1692c5f156deSVasundhara Volam int be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16939aebddd1SJeff Kirsher { 16949aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16969aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16979aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16989aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 1699c5f156deSVasundhara Volam int status = 0; 17009aebddd1SJeff Kirsher 17019aebddd1SJeff Kirsher if (buf_len == 0) 1702c5f156deSVasundhara Volam return -EIO; 17039aebddd1SJeff Kirsher 17049aebddd1SJeff Kirsher total_size = buf_len; 17059aebddd1SJeff Kirsher 17069aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 17079aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 17089aebddd1SJeff Kirsher get_fat_cmd.size, 17099aebddd1SJeff Kirsher &get_fat_cmd.dma); 17109aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 17119aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 17129aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 1713c5f156deSVasundhara Volam return -ENOMEM; 17149aebddd1SJeff Kirsher } 17159aebddd1SJeff Kirsher 17169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17179aebddd1SJeff Kirsher 17189aebddd1SJeff Kirsher while (total_size) { 17199aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 17209aebddd1SJeff Kirsher total_size -= buf_size; 17219aebddd1SJeff Kirsher 17229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17239aebddd1SJeff Kirsher if (!wrb) { 17249aebddd1SJeff Kirsher status = -EBUSY; 17259aebddd1SJeff Kirsher goto err; 17269aebddd1SJeff Kirsher } 17279aebddd1SJeff Kirsher req = get_fat_cmd.va; 17289aebddd1SJeff Kirsher 17299aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1730106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1731a2cc4e0bSSathya Perla OPCODE_COMMON_MANAGE_FAT, payload_len, 1732a2cc4e0bSSathya Perla wrb, &get_fat_cmd); 17339aebddd1SJeff Kirsher 17349aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 17359aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 17369aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 17379aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 17389aebddd1SJeff Kirsher 17399aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17409aebddd1SJeff Kirsher if (!status) { 17419aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 174203d28ffeSKalesh AP 17439aebddd1SJeff Kirsher memcpy(buf + offset, 17449aebddd1SJeff Kirsher resp->data_buffer, 174592aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 17469aebddd1SJeff Kirsher } else { 17479aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 17489aebddd1SJeff Kirsher goto err; 17499aebddd1SJeff Kirsher } 17509aebddd1SJeff Kirsher offset += buf_size; 17519aebddd1SJeff Kirsher log_offset += buf_size; 17529aebddd1SJeff Kirsher } 17539aebddd1SJeff Kirsher err: 17549aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 1755a2cc4e0bSSathya Perla get_fat_cmd.va, get_fat_cmd.dma); 17569aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1757c5f156deSVasundhara Volam return status; 17589aebddd1SJeff Kirsher } 17599aebddd1SJeff Kirsher 176004b71175SSathya Perla /* Uses synchronous mcc */ 1761e97e3cdaSKalesh AP int be_cmd_get_fw_ver(struct be_adapter *adapter) 17629aebddd1SJeff Kirsher { 17639aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17649aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 17659aebddd1SJeff Kirsher int status; 17669aebddd1SJeff Kirsher 176704b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17689aebddd1SJeff Kirsher 176904b71175SSathya Perla wrb = wrb_from_mccq(adapter); 177004b71175SSathya Perla if (!wrb) { 177104b71175SSathya Perla status = -EBUSY; 177204b71175SSathya Perla goto err; 177304b71175SSathya Perla } 177404b71175SSathya Perla 17759aebddd1SJeff Kirsher req = embedded_payload(wrb); 17769aebddd1SJeff Kirsher 1777106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1778a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, 1779a2cc4e0bSSathya Perla NULL); 178004b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17819aebddd1SJeff Kirsher if (!status) { 17829aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1783acbafeb1SSathya Perla 1784242eb470SVasundhara Volam strlcpy(adapter->fw_ver, resp->firmware_version_string, 1785242eb470SVasundhara Volam sizeof(adapter->fw_ver)); 1786242eb470SVasundhara Volam strlcpy(adapter->fw_on_flash, resp->fw_on_flash_version_string, 1787242eb470SVasundhara Volam sizeof(adapter->fw_on_flash)); 17889aebddd1SJeff Kirsher } 178904b71175SSathya Perla err: 179004b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17919aebddd1SJeff Kirsher return status; 17929aebddd1SJeff Kirsher } 17939aebddd1SJeff Kirsher 17949aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17959aebddd1SJeff Kirsher * Uses async mcc 17969aebddd1SJeff Kirsher */ 1797b502ae8dSKalesh AP static int __be_cmd_modify_eqd(struct be_adapter *adapter, 1798b502ae8dSKalesh AP struct be_set_eqd *set_eqd, int num) 17999aebddd1SJeff Kirsher { 18009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18019aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 18022632bafdSSathya Perla int status = 0, i; 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18059aebddd1SJeff Kirsher 18069aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18079aebddd1SJeff Kirsher if (!wrb) { 18089aebddd1SJeff Kirsher status = -EBUSY; 18099aebddd1SJeff Kirsher goto err; 18109aebddd1SJeff Kirsher } 18119aebddd1SJeff Kirsher req = embedded_payload(wrb); 18129aebddd1SJeff Kirsher 1813106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1814a2cc4e0bSSathya Perla OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, 1815a2cc4e0bSSathya Perla NULL); 18169aebddd1SJeff Kirsher 18172632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 18182632bafdSSathya Perla for (i = 0; i < num; i++) { 18192632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 18202632bafdSSathya Perla req->set_eqd[i].phase = 0; 18212632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 18222632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 18232632bafdSSathya Perla } 18249aebddd1SJeff Kirsher 18259aebddd1SJeff Kirsher be_mcc_notify(adapter); 18269aebddd1SJeff Kirsher err: 18279aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18289aebddd1SJeff Kirsher return status; 18299aebddd1SJeff Kirsher } 18309aebddd1SJeff Kirsher 183193676703SKalesh AP int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 183293676703SKalesh AP int num) 183393676703SKalesh AP { 183493676703SKalesh AP int num_eqs, i = 0; 183593676703SKalesh AP 183693676703SKalesh AP if (lancer_chip(adapter) && num > 8) { 183793676703SKalesh AP while (num) { 183893676703SKalesh AP num_eqs = min(num, 8); 183993676703SKalesh AP __be_cmd_modify_eqd(adapter, &set_eqd[i], num_eqs); 184093676703SKalesh AP i += num_eqs; 184193676703SKalesh AP num -= num_eqs; 184293676703SKalesh AP } 184393676703SKalesh AP } else { 184493676703SKalesh AP __be_cmd_modify_eqd(adapter, set_eqd, num); 184593676703SKalesh AP } 184693676703SKalesh AP 184793676703SKalesh AP return 0; 184893676703SKalesh AP } 184993676703SKalesh AP 18509aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 18519aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 18524d567d97SKalesh AP u32 num) 18539aebddd1SJeff Kirsher { 18549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18559aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 18569aebddd1SJeff Kirsher int status; 18579aebddd1SJeff Kirsher 18589aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18599aebddd1SJeff Kirsher 18609aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18619aebddd1SJeff Kirsher if (!wrb) { 18629aebddd1SJeff Kirsher status = -EBUSY; 18639aebddd1SJeff Kirsher goto err; 18649aebddd1SJeff Kirsher } 18659aebddd1SJeff Kirsher req = embedded_payload(wrb); 18669aebddd1SJeff Kirsher 1867106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1868a2cc4e0bSSathya Perla OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), 1869a2cc4e0bSSathya Perla wrb, NULL); 18709aebddd1SJeff Kirsher 18719aebddd1SJeff Kirsher req->interface_id = if_id; 1872012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 18739aebddd1SJeff Kirsher req->num_vlan = num; 18749aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 18759aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 18769aebddd1SJeff Kirsher 18779aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18789aebddd1SJeff Kirsher err: 18799aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18809aebddd1SJeff Kirsher return status; 18819aebddd1SJeff Kirsher } 18829aebddd1SJeff Kirsher 18839aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 18849aebddd1SJeff Kirsher { 18859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18869aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 18879aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18889aebddd1SJeff Kirsher int status; 18899aebddd1SJeff Kirsher 18909aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18919aebddd1SJeff Kirsher 18929aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18939aebddd1SJeff Kirsher if (!wrb) { 18949aebddd1SJeff Kirsher status = -EBUSY; 18959aebddd1SJeff Kirsher goto err; 18969aebddd1SJeff Kirsher } 18979aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1898106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1899106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1900106df1e3SSomnath Kotur wrb, mem); 19019aebddd1SJeff Kirsher 19029aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 19039aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 19049aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1905c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1906c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 19079aebddd1SJeff Kirsher if (value == ON) 1908a2cc4e0bSSathya Perla req->if_flags = 1909a2cc4e0bSSathya Perla cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1910c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1911c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 19129aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 19135f820b6cSKalesh AP req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 19145f820b6cSKalesh AP req->if_flags = cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1915d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1916d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1917d9d604f8SAjit Khaparde 1918d9d604f8SAjit Khaparde if (value == ON) 1919d9d604f8SAjit Khaparde req->if_flags = 1920d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 19219aebddd1SJeff Kirsher } else { 19229aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 19239aebddd1SJeff Kirsher int i = 0; 19249aebddd1SJeff Kirsher 19255f820b6cSKalesh AP req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_MULTICAST); 19265f820b6cSKalesh AP req->if_flags = cpu_to_le32(BE_IF_FLAGS_MULTICAST); 19271610c79fSPadmanabh Ratnakar 19281610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 19291610c79fSPadmanabh Ratnakar * and not setting flags field 19301610c79fSPadmanabh Ratnakar */ 19311610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1932abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 193392bf14abSSathya Perla be_if_cap_flags(adapter)); 1934016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 19359aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 19369aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 19379aebddd1SJeff Kirsher } 19389aebddd1SJeff Kirsher 1939012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1940012bd387SAjit Khaparde req->if_flags_mask) { 1941012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1942012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1943012bd387SAjit Khaparde req->if_flags_mask); 1944012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1945012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1946012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1947012bd387SAjit Khaparde } 1948012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1949012bd387SAjit Khaparde 19509aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1951012bd387SAjit Khaparde 19529aebddd1SJeff Kirsher err: 19539aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19549aebddd1SJeff Kirsher return status; 19559aebddd1SJeff Kirsher } 19569aebddd1SJeff Kirsher 19579aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 19589aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 19599aebddd1SJeff Kirsher { 19609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19619aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 19629aebddd1SJeff Kirsher int status; 19639aebddd1SJeff Kirsher 1964f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1965f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1966f25b119cSPadmanabh Ratnakar return -EPERM; 1967f25b119cSPadmanabh Ratnakar 19689aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19699aebddd1SJeff Kirsher 19709aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19719aebddd1SJeff Kirsher if (!wrb) { 19729aebddd1SJeff Kirsher status = -EBUSY; 19739aebddd1SJeff Kirsher goto err; 19749aebddd1SJeff Kirsher } 19759aebddd1SJeff Kirsher req = embedded_payload(wrb); 19769aebddd1SJeff Kirsher 1977106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1978a2cc4e0bSSathya Perla OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), 1979a2cc4e0bSSathya Perla wrb, NULL); 19809aebddd1SJeff Kirsher 1981b29812c1SSuresh Reddy req->hdr.version = 1; 19829aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 19839aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 19849aebddd1SJeff Kirsher 19859aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19869aebddd1SJeff Kirsher 19879aebddd1SJeff Kirsher err: 19889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 1989b29812c1SSuresh Reddy 1990b29812c1SSuresh Reddy if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED) 1991b29812c1SSuresh Reddy return -EOPNOTSUPP; 1992b29812c1SSuresh Reddy 19939aebddd1SJeff Kirsher return status; 19949aebddd1SJeff Kirsher } 19959aebddd1SJeff Kirsher 19969aebddd1SJeff Kirsher /* Uses sycn mcc */ 19979aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19989aebddd1SJeff Kirsher { 19999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20009aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 20019aebddd1SJeff Kirsher int status; 20029aebddd1SJeff Kirsher 2003f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 2004f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2005f25b119cSPadmanabh Ratnakar return -EPERM; 2006f25b119cSPadmanabh Ratnakar 20079aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20089aebddd1SJeff Kirsher 20099aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20109aebddd1SJeff Kirsher if (!wrb) { 20119aebddd1SJeff Kirsher status = -EBUSY; 20129aebddd1SJeff Kirsher goto err; 20139aebddd1SJeff Kirsher } 20149aebddd1SJeff Kirsher req = embedded_payload(wrb); 20159aebddd1SJeff Kirsher 2016106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2017a2cc4e0bSSathya Perla OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), 2018a2cc4e0bSSathya Perla wrb, NULL); 20199aebddd1SJeff Kirsher 20209aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20219aebddd1SJeff Kirsher if (!status) { 20229aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 20239aebddd1SJeff Kirsher embedded_payload(wrb); 202403d28ffeSKalesh AP 20259aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 20269aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 20279aebddd1SJeff Kirsher } 20289aebddd1SJeff Kirsher 20299aebddd1SJeff Kirsher err: 20309aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20319aebddd1SJeff Kirsher return status; 20329aebddd1SJeff Kirsher } 20339aebddd1SJeff Kirsher 20349aebddd1SJeff Kirsher /* Uses mbox */ 2035e97e3cdaSKalesh AP int be_cmd_query_fw_cfg(struct be_adapter *adapter) 20369aebddd1SJeff Kirsher { 20379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20389aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 20399aebddd1SJeff Kirsher int status; 20409aebddd1SJeff Kirsher 20419aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20429aebddd1SJeff Kirsher return -1; 20439aebddd1SJeff Kirsher 20449aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20459aebddd1SJeff Kirsher req = embedded_payload(wrb); 20469aebddd1SJeff Kirsher 2047106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2048a2cc4e0bSSathya Perla OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, 2049a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 20509aebddd1SJeff Kirsher 20519aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20529aebddd1SJeff Kirsher if (!status) { 20539aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 205403d28ffeSKalesh AP 2055e97e3cdaSKalesh AP adapter->port_num = le32_to_cpu(resp->phys_port); 2056e97e3cdaSKalesh AP adapter->function_mode = le32_to_cpu(resp->function_mode); 2057e97e3cdaSKalesh AP adapter->function_caps = le32_to_cpu(resp->function_caps); 2058e97e3cdaSKalesh AP adapter->asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 2059acbafeb1SSathya Perla dev_info(&adapter->pdev->dev, 2060acbafeb1SSathya Perla "FW config: function_mode=0x%x, function_caps=0x%x\n", 2061acbafeb1SSathya Perla adapter->function_mode, adapter->function_caps); 20629aebddd1SJeff Kirsher } 20639aebddd1SJeff Kirsher 20649aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20659aebddd1SJeff Kirsher return status; 20669aebddd1SJeff Kirsher } 20679aebddd1SJeff Kirsher 20689aebddd1SJeff Kirsher /* Uses mbox */ 20699aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 20709aebddd1SJeff Kirsher { 20719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20729aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 20739aebddd1SJeff Kirsher int status; 20749aebddd1SJeff Kirsher 2075bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 2076bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 2077bf99e50dSPadmanabh Ratnakar if (!status) { 2078bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 2079bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 2080bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 2081bf99e50dSPadmanabh Ratnakar } 2082bf99e50dSPadmanabh Ratnakar if (status) { 2083bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2084bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 2085bf99e50dSPadmanabh Ratnakar } 2086bf99e50dSPadmanabh Ratnakar return status; 2087bf99e50dSPadmanabh Ratnakar } 2088bf99e50dSPadmanabh Ratnakar 20899aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20909aebddd1SJeff Kirsher return -1; 20919aebddd1SJeff Kirsher 20929aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20939aebddd1SJeff Kirsher req = embedded_payload(wrb); 20949aebddd1SJeff Kirsher 2095106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2096a2cc4e0bSSathya Perla OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, 2097a2cc4e0bSSathya Perla NULL); 20989aebddd1SJeff Kirsher 20999aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 21009aebddd1SJeff Kirsher 21019aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 21029aebddd1SJeff Kirsher return status; 21039aebddd1SJeff Kirsher } 21049aebddd1SJeff Kirsher 2105594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 210633cb0fa7SBen Hutchings u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey) 21079aebddd1SJeff Kirsher { 21089aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21099aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 21109aebddd1SJeff Kirsher int status; 21119aebddd1SJeff Kirsher 2112da1388d6SVasundhara Volam if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS)) 2113da1388d6SVasundhara Volam return 0; 2114da1388d6SVasundhara Volam 2115b51aa367SKalesh AP spin_lock_bh(&adapter->mcc_lock); 21169aebddd1SJeff Kirsher 2117b51aa367SKalesh AP wrb = wrb_from_mccq(adapter); 2118b51aa367SKalesh AP if (!wrb) { 2119b51aa367SKalesh AP status = -EBUSY; 2120b51aa367SKalesh AP goto err; 2121b51aa367SKalesh AP } 21229aebddd1SJeff Kirsher req = embedded_payload(wrb); 21239aebddd1SJeff Kirsher 2124106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2125106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 21269aebddd1SJeff Kirsher 21279aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2128594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 21299aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2130594ad54aSSuresh Reddy 2131b51aa367SKalesh AP if (!BEx_chip(adapter)) 2132594ad54aSSuresh Reddy req->hdr.version = 1; 2133594ad54aSSuresh Reddy 21349aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 2135e2557877SVenkata Duvvuru memcpy(req->hash, rss_hkey, RSS_HASH_KEY_LEN); 21369aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 21379aebddd1SJeff Kirsher 2138b51aa367SKalesh AP status = be_mcc_notify_wait(adapter); 2139b51aa367SKalesh AP err: 2140b51aa367SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 21419aebddd1SJeff Kirsher return status; 21429aebddd1SJeff Kirsher } 21439aebddd1SJeff Kirsher 21449aebddd1SJeff Kirsher /* Uses sync mcc */ 21459aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 21469aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 21479aebddd1SJeff Kirsher { 21489aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21499aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 21509aebddd1SJeff Kirsher int status; 21519aebddd1SJeff Kirsher 21529aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21539aebddd1SJeff Kirsher 21549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21559aebddd1SJeff Kirsher if (!wrb) { 21569aebddd1SJeff Kirsher status = -EBUSY; 21579aebddd1SJeff Kirsher goto err; 21589aebddd1SJeff Kirsher } 21599aebddd1SJeff Kirsher req = embedded_payload(wrb); 21609aebddd1SJeff Kirsher 2161106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2162a2cc4e0bSSathya Perla OPCODE_COMMON_ENABLE_DISABLE_BEACON, 2163a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 21649aebddd1SJeff Kirsher 21659aebddd1SJeff Kirsher req->port_num = port_num; 21669aebddd1SJeff Kirsher req->beacon_state = state; 21679aebddd1SJeff Kirsher req->beacon_duration = bcn; 21689aebddd1SJeff Kirsher req->status_duration = sts; 21699aebddd1SJeff Kirsher 21709aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 21719aebddd1SJeff Kirsher 21729aebddd1SJeff Kirsher err: 21739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21749aebddd1SJeff Kirsher return status; 21759aebddd1SJeff Kirsher } 21769aebddd1SJeff Kirsher 21779aebddd1SJeff Kirsher /* Uses sync mcc */ 21789aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 21799aebddd1SJeff Kirsher { 21809aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21819aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 21829aebddd1SJeff Kirsher int status; 21839aebddd1SJeff Kirsher 21849aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21859aebddd1SJeff Kirsher 21869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21879aebddd1SJeff Kirsher if (!wrb) { 21889aebddd1SJeff Kirsher status = -EBUSY; 21899aebddd1SJeff Kirsher goto err; 21909aebddd1SJeff Kirsher } 21919aebddd1SJeff Kirsher req = embedded_payload(wrb); 21929aebddd1SJeff Kirsher 2193106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2194a2cc4e0bSSathya Perla OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), 2195a2cc4e0bSSathya Perla wrb, NULL); 21969aebddd1SJeff Kirsher 21979aebddd1SJeff Kirsher req->port_num = port_num; 21989aebddd1SJeff Kirsher 21999aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22009aebddd1SJeff Kirsher if (!status) { 22019aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 22029aebddd1SJeff Kirsher embedded_payload(wrb); 220303d28ffeSKalesh AP 22049aebddd1SJeff Kirsher *state = resp->beacon_state; 22059aebddd1SJeff Kirsher } 22069aebddd1SJeff Kirsher 22079aebddd1SJeff Kirsher err: 22089aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22099aebddd1SJeff Kirsher return status; 22109aebddd1SJeff Kirsher } 22119aebddd1SJeff Kirsher 2212e36edd9dSMark Leonard /* Uses sync mcc */ 2213e36edd9dSMark Leonard int be_cmd_read_port_transceiver_data(struct be_adapter *adapter, 2214e36edd9dSMark Leonard u8 page_num, u8 *data) 2215e36edd9dSMark Leonard { 2216e36edd9dSMark Leonard struct be_dma_mem cmd; 2217e36edd9dSMark Leonard struct be_mcc_wrb *wrb; 2218e36edd9dSMark Leonard struct be_cmd_req_port_type *req; 2219e36edd9dSMark Leonard int status; 2220e36edd9dSMark Leonard 2221e36edd9dSMark Leonard if (page_num > TR_PAGE_A2) 2222e36edd9dSMark Leonard return -EINVAL; 2223e36edd9dSMark Leonard 2224e36edd9dSMark Leonard cmd.size = sizeof(struct be_cmd_resp_port_type); 2225e36edd9dSMark Leonard cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 2226e36edd9dSMark Leonard if (!cmd.va) { 2227e36edd9dSMark Leonard dev_err(&adapter->pdev->dev, "Memory allocation failed\n"); 2228e36edd9dSMark Leonard return -ENOMEM; 2229e36edd9dSMark Leonard } 2230e36edd9dSMark Leonard memset(cmd.va, 0, cmd.size); 2231e36edd9dSMark Leonard 2232e36edd9dSMark Leonard spin_lock_bh(&adapter->mcc_lock); 2233e36edd9dSMark Leonard 2234e36edd9dSMark Leonard wrb = wrb_from_mccq(adapter); 2235e36edd9dSMark Leonard if (!wrb) { 2236e36edd9dSMark Leonard status = -EBUSY; 2237e36edd9dSMark Leonard goto err; 2238e36edd9dSMark Leonard } 2239e36edd9dSMark Leonard req = cmd.va; 2240e36edd9dSMark Leonard 2241e36edd9dSMark Leonard be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2242e36edd9dSMark Leonard OPCODE_COMMON_READ_TRANSRECV_DATA, 2243e36edd9dSMark Leonard cmd.size, wrb, &cmd); 2244e36edd9dSMark Leonard 2245e36edd9dSMark Leonard req->port = cpu_to_le32(adapter->hba_port_num); 2246e36edd9dSMark Leonard req->page_num = cpu_to_le32(page_num); 2247e36edd9dSMark Leonard status = be_mcc_notify_wait(adapter); 2248e36edd9dSMark Leonard if (!status) { 2249e36edd9dSMark Leonard struct be_cmd_resp_port_type *resp = cmd.va; 2250e36edd9dSMark Leonard 2251e36edd9dSMark Leonard memcpy(data, resp->page_data, PAGE_DATA_LEN); 2252e36edd9dSMark Leonard } 2253e36edd9dSMark Leonard err: 2254e36edd9dSMark Leonard spin_unlock_bh(&adapter->mcc_lock); 2255e36edd9dSMark Leonard pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 2256e36edd9dSMark Leonard return status; 2257e36edd9dSMark Leonard } 2258e36edd9dSMark Leonard 22599aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2260f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2261f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2262f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 22639aebddd1SJeff Kirsher { 22649aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22659aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 22669aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 22679aebddd1SJeff Kirsher void *ctxt = NULL; 22689aebddd1SJeff Kirsher int status; 22699aebddd1SJeff Kirsher 22709aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22719aebddd1SJeff Kirsher adapter->flash_status = 0; 22729aebddd1SJeff Kirsher 22739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22749aebddd1SJeff Kirsher if (!wrb) { 22759aebddd1SJeff Kirsher status = -EBUSY; 22769aebddd1SJeff Kirsher goto err_unlock; 22779aebddd1SJeff Kirsher } 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher req = embedded_payload(wrb); 22809aebddd1SJeff Kirsher 2281106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 22829aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2283106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2284106df1e3SSomnath Kotur NULL); 22859aebddd1SJeff Kirsher 22869aebddd1SJeff Kirsher ctxt = &req->context; 22879aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22889aebddd1SJeff Kirsher write_length, ctxt, data_size); 22899aebddd1SJeff Kirsher 22909aebddd1SJeff Kirsher if (data_size == 0) 22919aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22929aebddd1SJeff Kirsher eof, ctxt, 1); 22939aebddd1SJeff Kirsher else 22949aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 22959aebddd1SJeff Kirsher eof, ctxt, 0); 22969aebddd1SJeff Kirsher 22979aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 22989aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 2299242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 23009aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 23019aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 23029aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 23039aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 23049aebddd1SJeff Kirsher & 0xFFFFFFFF); 23059aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 23069aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 23079aebddd1SJeff Kirsher 23089aebddd1SJeff Kirsher be_mcc_notify(adapter); 23099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23109aebddd1SJeff Kirsher 23115eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2312701962d0SSomnath Kotur msecs_to_jiffies(60000))) 2313fd45160cSKalesh AP status = -ETIMEDOUT; 23149aebddd1SJeff Kirsher else 23159aebddd1SJeff Kirsher status = adapter->flash_status; 23169aebddd1SJeff Kirsher 23179aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2318f67ef7baSPadmanabh Ratnakar if (!status) { 23199aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2320f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2321f67ef7baSPadmanabh Ratnakar } else { 23229aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2323f67ef7baSPadmanabh Ratnakar } 23249aebddd1SJeff Kirsher 23259aebddd1SJeff Kirsher return status; 23269aebddd1SJeff Kirsher 23279aebddd1SJeff Kirsher err_unlock: 23289aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23299aebddd1SJeff Kirsher return status; 23309aebddd1SJeff Kirsher } 23319aebddd1SJeff Kirsher 23326809cee0SRavikumar Nelavelli int be_cmd_query_cable_type(struct be_adapter *adapter) 23336809cee0SRavikumar Nelavelli { 23346809cee0SRavikumar Nelavelli u8 page_data[PAGE_DATA_LEN]; 23356809cee0SRavikumar Nelavelli int status; 23366809cee0SRavikumar Nelavelli 23376809cee0SRavikumar Nelavelli status = be_cmd_read_port_transceiver_data(adapter, TR_PAGE_A0, 23386809cee0SRavikumar Nelavelli page_data); 23396809cee0SRavikumar Nelavelli if (!status) { 23406809cee0SRavikumar Nelavelli switch (adapter->phy.interface_type) { 23416809cee0SRavikumar Nelavelli case PHY_TYPE_QSFP: 23426809cee0SRavikumar Nelavelli adapter->phy.cable_type = 23436809cee0SRavikumar Nelavelli page_data[QSFP_PLUS_CABLE_TYPE_OFFSET]; 23446809cee0SRavikumar Nelavelli break; 23456809cee0SRavikumar Nelavelli case PHY_TYPE_SFP_PLUS_10GB: 23466809cee0SRavikumar Nelavelli adapter->phy.cable_type = 23476809cee0SRavikumar Nelavelli page_data[SFP_PLUS_CABLE_TYPE_OFFSET]; 23486809cee0SRavikumar Nelavelli break; 23496809cee0SRavikumar Nelavelli default: 23506809cee0SRavikumar Nelavelli adapter->phy.cable_type = 0; 23516809cee0SRavikumar Nelavelli break; 23526809cee0SRavikumar Nelavelli } 23536809cee0SRavikumar Nelavelli } 23546809cee0SRavikumar Nelavelli return status; 23556809cee0SRavikumar Nelavelli } 23566809cee0SRavikumar Nelavelli 2357f0613380SKalesh AP int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name) 2358f0613380SKalesh AP { 2359f0613380SKalesh AP struct lancer_cmd_req_delete_object *req; 2360f0613380SKalesh AP struct be_mcc_wrb *wrb; 2361f0613380SKalesh AP int status; 2362f0613380SKalesh AP 2363f0613380SKalesh AP spin_lock_bh(&adapter->mcc_lock); 2364f0613380SKalesh AP 2365f0613380SKalesh AP wrb = wrb_from_mccq(adapter); 2366f0613380SKalesh AP if (!wrb) { 2367f0613380SKalesh AP status = -EBUSY; 2368f0613380SKalesh AP goto err; 2369f0613380SKalesh AP } 2370f0613380SKalesh AP 2371f0613380SKalesh AP req = embedded_payload(wrb); 2372f0613380SKalesh AP 2373f0613380SKalesh AP be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2374f0613380SKalesh AP OPCODE_COMMON_DELETE_OBJECT, 2375f0613380SKalesh AP sizeof(*req), wrb, NULL); 2376f0613380SKalesh AP 2377242eb470SVasundhara Volam strlcpy(req->object_name, obj_name, sizeof(req->object_name)); 2378f0613380SKalesh AP 2379f0613380SKalesh AP status = be_mcc_notify_wait(adapter); 2380f0613380SKalesh AP err: 2381f0613380SKalesh AP spin_unlock_bh(&adapter->mcc_lock); 2382f0613380SKalesh AP return status; 2383f0613380SKalesh AP } 2384f0613380SKalesh AP 2385de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2386de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2387de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2388de49bd5aSPadmanabh Ratnakar { 2389de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2390de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2391de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2392de49bd5aSPadmanabh Ratnakar int status; 2393de49bd5aSPadmanabh Ratnakar 2394de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2395de49bd5aSPadmanabh Ratnakar 2396de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2397de49bd5aSPadmanabh Ratnakar if (!wrb) { 2398de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2399de49bd5aSPadmanabh Ratnakar goto err_unlock; 2400de49bd5aSPadmanabh Ratnakar } 2401de49bd5aSPadmanabh Ratnakar 2402de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2403de49bd5aSPadmanabh Ratnakar 2404de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2405de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2406de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2407de49bd5aSPadmanabh Ratnakar NULL); 2408de49bd5aSPadmanabh Ratnakar 2409de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2410de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2411de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2412de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2413de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2414de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2415de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2416de49bd5aSPadmanabh Ratnakar 2417de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2418de49bd5aSPadmanabh Ratnakar 2419de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2420de49bd5aSPadmanabh Ratnakar if (!status) { 2421de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2422de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2423de49bd5aSPadmanabh Ratnakar } else { 2424de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2425de49bd5aSPadmanabh Ratnakar } 2426de49bd5aSPadmanabh Ratnakar 2427de49bd5aSPadmanabh Ratnakar err_unlock: 2428de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2429de49bd5aSPadmanabh Ratnakar return status; 2430de49bd5aSPadmanabh Ratnakar } 2431de49bd5aSPadmanabh Ratnakar 24329aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 24339aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 24349aebddd1SJeff Kirsher { 24359aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24369aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 24379aebddd1SJeff Kirsher int status; 24389aebddd1SJeff Kirsher 24399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24409aebddd1SJeff Kirsher adapter->flash_status = 0; 24419aebddd1SJeff Kirsher 24429aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24439aebddd1SJeff Kirsher if (!wrb) { 24449aebddd1SJeff Kirsher status = -EBUSY; 24459aebddd1SJeff Kirsher goto err_unlock; 24469aebddd1SJeff Kirsher } 24479aebddd1SJeff Kirsher req = cmd->va; 24489aebddd1SJeff Kirsher 2449106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2450a2cc4e0bSSathya Perla OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, 2451a2cc4e0bSSathya Perla cmd); 24529aebddd1SJeff Kirsher 24539aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 24549aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 24559aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 24569aebddd1SJeff Kirsher 24579aebddd1SJeff Kirsher be_mcc_notify(adapter); 24589aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24599aebddd1SJeff Kirsher 24605eeff635SSuresh Reddy if (!wait_for_completion_timeout(&adapter->et_cmd_compl, 2461e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 2462fd45160cSKalesh AP status = -ETIMEDOUT; 24639aebddd1SJeff Kirsher else 24649aebddd1SJeff Kirsher status = adapter->flash_status; 24659aebddd1SJeff Kirsher 24669aebddd1SJeff Kirsher return status; 24679aebddd1SJeff Kirsher 24689aebddd1SJeff Kirsher err_unlock: 24699aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24709aebddd1SJeff Kirsher return status; 24719aebddd1SJeff Kirsher } 24729aebddd1SJeff Kirsher 24739aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 247496c9b2e4SVasundhara Volam u16 optype, int offset) 24759aebddd1SJeff Kirsher { 24769aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2477be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 24789aebddd1SJeff Kirsher int status; 24799aebddd1SJeff Kirsher 24809aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24819aebddd1SJeff Kirsher 24829aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24839aebddd1SJeff Kirsher if (!wrb) { 24849aebddd1SJeff Kirsher status = -EBUSY; 24859aebddd1SJeff Kirsher goto err; 24869aebddd1SJeff Kirsher } 24879aebddd1SJeff Kirsher req = embedded_payload(wrb); 24889aebddd1SJeff Kirsher 2489106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2490be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2491be716446SPadmanabh Ratnakar wrb, NULL); 24929aebddd1SJeff Kirsher 249396c9b2e4SVasundhara Volam req->params.op_type = cpu_to_le32(optype); 24949aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 24959aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 24969aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 24979aebddd1SJeff Kirsher 24989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24999aebddd1SJeff Kirsher if (!status) 2500be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 25019aebddd1SJeff Kirsher 25029aebddd1SJeff Kirsher err: 25039aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25049aebddd1SJeff Kirsher return status; 25059aebddd1SJeff Kirsher } 25069aebddd1SJeff Kirsher 25079aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 25089aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 25099aebddd1SJeff Kirsher { 25109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25119aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 25129aebddd1SJeff Kirsher int status; 25139aebddd1SJeff Kirsher 25149aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25159aebddd1SJeff Kirsher 25169aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25179aebddd1SJeff Kirsher if (!wrb) { 25189aebddd1SJeff Kirsher status = -EBUSY; 25199aebddd1SJeff Kirsher goto err; 25209aebddd1SJeff Kirsher } 25219aebddd1SJeff Kirsher req = nonemb_cmd->va; 25229aebddd1SJeff Kirsher 2523106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2524a2cc4e0bSSathya Perla OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), 2525a2cc4e0bSSathya Perla wrb, nonemb_cmd); 25269aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 25279aebddd1SJeff Kirsher 25289aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25299aebddd1SJeff Kirsher 25309aebddd1SJeff Kirsher err: 25319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25329aebddd1SJeff Kirsher return status; 25339aebddd1SJeff Kirsher } 25349aebddd1SJeff Kirsher 25359aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 25369aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 25379aebddd1SJeff Kirsher { 25389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25399aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 25409aebddd1SJeff Kirsher int status; 25419aebddd1SJeff Kirsher 25429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25439aebddd1SJeff Kirsher 25449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25459aebddd1SJeff Kirsher if (!wrb) { 25469aebddd1SJeff Kirsher status = -EBUSY; 25479aebddd1SJeff Kirsher goto err; 25489aebddd1SJeff Kirsher } 25499aebddd1SJeff Kirsher 25509aebddd1SJeff Kirsher req = embedded_payload(wrb); 25519aebddd1SJeff Kirsher 2552106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2553a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), 2554a2cc4e0bSSathya Perla wrb, NULL); 25559aebddd1SJeff Kirsher 25569aebddd1SJeff Kirsher req->src_port = port_num; 25579aebddd1SJeff Kirsher req->dest_port = port_num; 25589aebddd1SJeff Kirsher req->loopback_type = loopback_type; 25599aebddd1SJeff Kirsher req->loopback_state = enable; 25609aebddd1SJeff Kirsher 25619aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25629aebddd1SJeff Kirsher err: 25639aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25649aebddd1SJeff Kirsher return status; 25659aebddd1SJeff Kirsher } 25669aebddd1SJeff Kirsher 25679aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 2568a2cc4e0bSSathya Perla u32 loopback_type, u32 pkt_size, u32 num_pkts, 2569a2cc4e0bSSathya Perla u64 pattern) 25709aebddd1SJeff Kirsher { 25719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25729aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 25735eeff635SSuresh Reddy struct be_cmd_resp_loopback_test *resp; 25749aebddd1SJeff Kirsher int status; 25759aebddd1SJeff Kirsher 25769aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25779aebddd1SJeff Kirsher 25789aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25799aebddd1SJeff Kirsher if (!wrb) { 25809aebddd1SJeff Kirsher status = -EBUSY; 25819aebddd1SJeff Kirsher goto err; 25829aebddd1SJeff Kirsher } 25839aebddd1SJeff Kirsher 25849aebddd1SJeff Kirsher req = embedded_payload(wrb); 25859aebddd1SJeff Kirsher 2586106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2587a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, 2588a2cc4e0bSSathya Perla NULL); 25899aebddd1SJeff Kirsher 25905eeff635SSuresh Reddy req->hdr.timeout = cpu_to_le32(15); 25919aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 25929aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 25939aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 25949aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 25959aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 25969aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 25979aebddd1SJeff Kirsher 25985eeff635SSuresh Reddy be_mcc_notify(adapter); 25999aebddd1SJeff Kirsher 26005eeff635SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 26015eeff635SSuresh Reddy 26025eeff635SSuresh Reddy wait_for_completion(&adapter->et_cmd_compl); 26035eeff635SSuresh Reddy resp = embedded_payload(wrb); 26045eeff635SSuresh Reddy status = le32_to_cpu(resp->status); 26055eeff635SSuresh Reddy 26065eeff635SSuresh Reddy return status; 26079aebddd1SJeff Kirsher err: 26089aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26099aebddd1SJeff Kirsher return status; 26109aebddd1SJeff Kirsher } 26119aebddd1SJeff Kirsher 26129aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 26139aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 26149aebddd1SJeff Kirsher { 26159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26169aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 26179aebddd1SJeff Kirsher int status; 26189aebddd1SJeff Kirsher int i, j = 0; 26199aebddd1SJeff Kirsher 26209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26219aebddd1SJeff Kirsher 26229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26239aebddd1SJeff Kirsher if (!wrb) { 26249aebddd1SJeff Kirsher status = -EBUSY; 26259aebddd1SJeff Kirsher goto err; 26269aebddd1SJeff Kirsher } 26279aebddd1SJeff Kirsher req = cmd->va; 2628106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2629a2cc4e0bSSathya Perla OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, 2630a2cc4e0bSSathya Perla cmd); 26319aebddd1SJeff Kirsher 26329aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 26339aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 26349aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 26359aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 26369aebddd1SJeff Kirsher j++; 26379aebddd1SJeff Kirsher if (j > 7) 26389aebddd1SJeff Kirsher j = 0; 26399aebddd1SJeff Kirsher } 26409aebddd1SJeff Kirsher 26419aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26429aebddd1SJeff Kirsher 26439aebddd1SJeff Kirsher if (!status) { 26449aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 264503d28ffeSKalesh AP 26469aebddd1SJeff Kirsher resp = cmd->va; 26479aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 26489aebddd1SJeff Kirsher resp->snd_err) { 26499aebddd1SJeff Kirsher status = -1; 26509aebddd1SJeff Kirsher } 26519aebddd1SJeff Kirsher } 26529aebddd1SJeff Kirsher 26539aebddd1SJeff Kirsher err: 26549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26559aebddd1SJeff Kirsher return status; 26569aebddd1SJeff Kirsher } 26579aebddd1SJeff Kirsher 26589aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 26599aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 26609aebddd1SJeff Kirsher { 26619aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26629aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 26639aebddd1SJeff Kirsher int status; 26649aebddd1SJeff Kirsher 26659aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26669aebddd1SJeff Kirsher 26679aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26689aebddd1SJeff Kirsher if (!wrb) { 26699aebddd1SJeff Kirsher status = -EBUSY; 26709aebddd1SJeff Kirsher goto err; 26719aebddd1SJeff Kirsher } 26729aebddd1SJeff Kirsher req = nonemb_cmd->va; 26739aebddd1SJeff Kirsher 2674106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2675106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2676106df1e3SSomnath Kotur nonemb_cmd); 26779aebddd1SJeff Kirsher 26789aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 26799aebddd1SJeff Kirsher 26809aebddd1SJeff Kirsher err: 26819aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 26829aebddd1SJeff Kirsher return status; 26839aebddd1SJeff Kirsher } 26849aebddd1SJeff Kirsher 268542f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 26869aebddd1SJeff Kirsher { 26879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26889aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 26899aebddd1SJeff Kirsher struct be_dma_mem cmd; 26909aebddd1SJeff Kirsher int status; 26919aebddd1SJeff Kirsher 2692f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2693f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2694f25b119cSPadmanabh Ratnakar return -EPERM; 2695f25b119cSPadmanabh Ratnakar 26969aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 26979aebddd1SJeff Kirsher 26989aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 26999aebddd1SJeff Kirsher if (!wrb) { 27009aebddd1SJeff Kirsher status = -EBUSY; 27019aebddd1SJeff Kirsher goto err; 27029aebddd1SJeff Kirsher } 27039aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 2704a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 27059aebddd1SJeff Kirsher if (!cmd.va) { 27069aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 27079aebddd1SJeff Kirsher status = -ENOMEM; 27089aebddd1SJeff Kirsher goto err; 27099aebddd1SJeff Kirsher } 27109aebddd1SJeff Kirsher 27119aebddd1SJeff Kirsher req = cmd.va; 27129aebddd1SJeff Kirsher 2713106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2714106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2715106df1e3SSomnath Kotur wrb, &cmd); 27169aebddd1SJeff Kirsher 27179aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 27189aebddd1SJeff Kirsher if (!status) { 27199aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 27209aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 272103d28ffeSKalesh AP 272242f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 272342f11cf2SAjit Khaparde adapter->phy.interface_type = 27249aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 272542f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 272642f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 272742f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 272842f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 272942f11cf2SAjit Khaparde adapter->phy.misc_params = 273042f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 273168cb7e47SVasundhara Volam 273268cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 273368cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 273468cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 273568cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 273668cb7e47SVasundhara Volam } 27379aebddd1SJeff Kirsher } 2738a2cc4e0bSSathya Perla pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 27399aebddd1SJeff Kirsher err: 27409aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 27419aebddd1SJeff Kirsher return status; 27429aebddd1SJeff Kirsher } 27439aebddd1SJeff Kirsher 27449aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 27459aebddd1SJeff Kirsher { 27469aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 27479aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 27489aebddd1SJeff Kirsher int status; 27499aebddd1SJeff Kirsher 27509aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 27519aebddd1SJeff Kirsher 27529aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 27539aebddd1SJeff Kirsher if (!wrb) { 27549aebddd1SJeff Kirsher status = -EBUSY; 27559aebddd1SJeff Kirsher goto err; 27569aebddd1SJeff Kirsher } 27579aebddd1SJeff Kirsher 27589aebddd1SJeff Kirsher req = embedded_payload(wrb); 27599aebddd1SJeff Kirsher 2760106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2761106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 27629aebddd1SJeff Kirsher 27639aebddd1SJeff Kirsher req->hdr.domain = domain; 27649aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 27659aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 27669aebddd1SJeff Kirsher 27679aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 27689aebddd1SJeff Kirsher 27699aebddd1SJeff Kirsher err: 27709aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 27719aebddd1SJeff Kirsher return status; 27729aebddd1SJeff Kirsher } 27739aebddd1SJeff Kirsher 27749aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 27759aebddd1SJeff Kirsher { 27769aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 27779aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 27789aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 27799aebddd1SJeff Kirsher int status; 27809aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 27819aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 27829aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 27839aebddd1SJeff Kirsher 2784d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2785d98ef50fSSuresh Reddy return -1; 2786d98ef50fSSuresh Reddy 27879aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 27889aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 27899aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 27909aebddd1SJeff Kirsher &attribs_cmd.dma); 27919aebddd1SJeff Kirsher if (!attribs_cmd.va) { 2792a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 2793d98ef50fSSuresh Reddy status = -ENOMEM; 2794d98ef50fSSuresh Reddy goto err; 27959aebddd1SJeff Kirsher } 27969aebddd1SJeff Kirsher 27979aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 27989aebddd1SJeff Kirsher if (!wrb) { 27999aebddd1SJeff Kirsher status = -EBUSY; 28009aebddd1SJeff Kirsher goto err; 28019aebddd1SJeff Kirsher } 28029aebddd1SJeff Kirsher req = attribs_cmd.va; 28039aebddd1SJeff Kirsher 2804106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2805a2cc4e0bSSathya Perla OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, 2806a2cc4e0bSSathya Perla wrb, &attribs_cmd); 28079aebddd1SJeff Kirsher 28089aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 28099aebddd1SJeff Kirsher if (!status) { 28109aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 28119aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 28129aebddd1SJeff Kirsher } 28139aebddd1SJeff Kirsher 28149aebddd1SJeff Kirsher err: 28159aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2816d98ef50fSSuresh Reddy if (attribs_cmd.va) 2817d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2818d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 28199aebddd1SJeff Kirsher return status; 28209aebddd1SJeff Kirsher } 28219aebddd1SJeff Kirsher 28229aebddd1SJeff Kirsher /* Uses mbox */ 28239aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 28249aebddd1SJeff Kirsher { 28259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 28269aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 28279aebddd1SJeff Kirsher int status; 28289aebddd1SJeff Kirsher 28299aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 28309aebddd1SJeff Kirsher return -1; 28319aebddd1SJeff Kirsher 28329aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 28339aebddd1SJeff Kirsher if (!wrb) { 28349aebddd1SJeff Kirsher status = -EBUSY; 28359aebddd1SJeff Kirsher goto err; 28369aebddd1SJeff Kirsher } 28379aebddd1SJeff Kirsher 28389aebddd1SJeff Kirsher req = embedded_payload(wrb); 28399aebddd1SJeff Kirsher 2840106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2841a2cc4e0bSSathya Perla OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, 2842a2cc4e0bSSathya Perla sizeof(*req), wrb, NULL); 28439aebddd1SJeff Kirsher 28449aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 28459aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 28469aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 28479aebddd1SJeff Kirsher 28489aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 28499aebddd1SJeff Kirsher if (!status) { 28509aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 285103d28ffeSKalesh AP 28529aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 28539aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2854d379142bSSathya Perla if (!adapter->be3_native) 2855d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2856d379142bSSathya Perla "adapter not in advanced mode\n"); 28579aebddd1SJeff Kirsher } 28589aebddd1SJeff Kirsher err: 28599aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 28609aebddd1SJeff Kirsher return status; 28619aebddd1SJeff Kirsher } 2862590c391dSPadmanabh Ratnakar 2863f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2864f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2865f25b119cSPadmanabh Ratnakar u32 domain) 2866f25b119cSPadmanabh Ratnakar { 2867f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2868f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2869f25b119cSPadmanabh Ratnakar int status; 2870f25b119cSPadmanabh Ratnakar 2871f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2872f25b119cSPadmanabh Ratnakar 2873f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2874f25b119cSPadmanabh Ratnakar if (!wrb) { 2875f25b119cSPadmanabh Ratnakar status = -EBUSY; 2876f25b119cSPadmanabh Ratnakar goto err; 2877f25b119cSPadmanabh Ratnakar } 2878f25b119cSPadmanabh Ratnakar 2879f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2880f25b119cSPadmanabh Ratnakar 2881f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2882f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2883f25b119cSPadmanabh Ratnakar wrb, NULL); 2884f25b119cSPadmanabh Ratnakar 2885f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2886f25b119cSPadmanabh Ratnakar 2887f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2888f25b119cSPadmanabh Ratnakar if (!status) { 2889f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2890f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 289103d28ffeSKalesh AP 2892f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 289302308d74SSuresh Reddy 289402308d74SSuresh Reddy /* In UMC mode FW does not return right privileges. 289502308d74SSuresh Reddy * Override with correct privilege equivalent to PF. 289602308d74SSuresh Reddy */ 289702308d74SSuresh Reddy if (BEx_chip(adapter) && be_is_mc(adapter) && 289802308d74SSuresh Reddy be_physfn(adapter)) 289902308d74SSuresh Reddy *privilege = MAX_PRIVILEGES; 2900f25b119cSPadmanabh Ratnakar } 2901f25b119cSPadmanabh Ratnakar 2902f25b119cSPadmanabh Ratnakar err: 2903f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2904f25b119cSPadmanabh Ratnakar return status; 2905f25b119cSPadmanabh Ratnakar } 2906f25b119cSPadmanabh Ratnakar 290704a06028SSathya Perla /* Set privilege(s) for a function */ 290804a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 290904a06028SSathya Perla u32 domain) 291004a06028SSathya Perla { 291104a06028SSathya Perla struct be_mcc_wrb *wrb; 291204a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 291304a06028SSathya Perla int status; 291404a06028SSathya Perla 291504a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 291604a06028SSathya Perla 291704a06028SSathya Perla wrb = wrb_from_mccq(adapter); 291804a06028SSathya Perla if (!wrb) { 291904a06028SSathya Perla status = -EBUSY; 292004a06028SSathya Perla goto err; 292104a06028SSathya Perla } 292204a06028SSathya Perla 292304a06028SSathya Perla req = embedded_payload(wrb); 292404a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 292504a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 292604a06028SSathya Perla wrb, NULL); 292704a06028SSathya Perla req->hdr.domain = domain; 292804a06028SSathya Perla if (lancer_chip(adapter)) 292904a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 293004a06028SSathya Perla else 293104a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 293204a06028SSathya Perla 293304a06028SSathya Perla status = be_mcc_notify_wait(adapter); 293404a06028SSathya Perla err: 293504a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 293604a06028SSathya Perla return status; 293704a06028SSathya Perla } 293804a06028SSathya Perla 29395a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 29405a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 29415a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 29425a712c13SSathya Perla */ 29431578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 2944b188f090SSuresh Reddy bool *pmac_id_valid, u32 *pmac_id, u32 if_handle, 2945b188f090SSuresh Reddy u8 domain) 2946590c391dSPadmanabh Ratnakar { 2947590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2948590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2949590c391dSPadmanabh Ratnakar int status; 2950590c391dSPadmanabh Ratnakar int mac_count; 2951e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2952e5e1ee89SPadmanabh Ratnakar int i; 2953e5e1ee89SPadmanabh Ratnakar 2954e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2955e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2956e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2957e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2958e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2959e5e1ee89SPadmanabh Ratnakar 2960e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2961e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2962e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2963e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2964e5e1ee89SPadmanabh Ratnakar } 2965590c391dSPadmanabh Ratnakar 2966590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2967590c391dSPadmanabh Ratnakar 2968590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2969590c391dSPadmanabh Ratnakar if (!wrb) { 2970590c391dSPadmanabh Ratnakar status = -EBUSY; 2971e5e1ee89SPadmanabh Ratnakar goto out; 2972590c391dSPadmanabh Ratnakar } 2973e5e1ee89SPadmanabh Ratnakar 2974e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2975590c391dSPadmanabh Ratnakar 2976590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2977bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2978bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2979590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2980e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 29815a712c13SSathya Perla if (*pmac_id_valid) { 29825a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 2983b188f090SSuresh Reddy req->iface_id = cpu_to_le16(if_handle); 29845a712c13SSathya Perla req->perm_override = 0; 29855a712c13SSathya Perla } else { 2986e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 29875a712c13SSathya Perla } 2988590c391dSPadmanabh Ratnakar 2989590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2990590c391dSPadmanabh Ratnakar if (!status) { 2991590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2992e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 29935a712c13SSathya Perla 29945a712c13SSathya Perla if (*pmac_id_valid) { 29955a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 29965a712c13SSathya Perla ETH_ALEN); 29975a712c13SSathya Perla goto out; 29985a712c13SSathya Perla } 29995a712c13SSathya Perla 3000e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 3001e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 30021578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 30031578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 30041578e777SPadmanabh Ratnakar * found. 3005e5e1ee89SPadmanabh Ratnakar */ 3006590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 3007e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 3008e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 3009e5e1ee89SPadmanabh Ratnakar u32 mac_id; 3010e5e1ee89SPadmanabh Ratnakar 3011e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 3012e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 3013e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 3014e5e1ee89SPadmanabh Ratnakar * is 6 bytes 3015e5e1ee89SPadmanabh Ratnakar */ 3016e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 30175a712c13SSathya Perla *pmac_id_valid = true; 3018e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 3019e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 3020e5e1ee89SPadmanabh Ratnakar goto out; 3021590c391dSPadmanabh Ratnakar } 3022590c391dSPadmanabh Ratnakar } 30231578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 30245a712c13SSathya Perla *pmac_id_valid = false; 3025e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 3026e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 3027590c391dSPadmanabh Ratnakar } 3028590c391dSPadmanabh Ratnakar 3029e5e1ee89SPadmanabh Ratnakar out: 3030590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3031e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 3032e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 3033590c391dSPadmanabh Ratnakar return status; 3034590c391dSPadmanabh Ratnakar } 3035590c391dSPadmanabh Ratnakar 3036a2cc4e0bSSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, 3037a2cc4e0bSSathya Perla u8 *mac, u32 if_handle, bool active, u32 domain) 30385a712c13SSathya Perla { 3039b188f090SSuresh Reddy if (!active) 3040b188f090SSuresh Reddy be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id, 3041b188f090SSuresh Reddy if_handle, domain); 30423175d8c2SSathya Perla if (BEx_chip(adapter)) 30435a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 3044b188f090SSuresh Reddy if_handle, curr_pmac_id); 30453175d8c2SSathya Perla else 30463175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 30473175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 3048b188f090SSuresh Reddy &curr_pmac_id, 3049b188f090SSuresh Reddy if_handle, domain); 30505a712c13SSathya Perla } 30515a712c13SSathya Perla 305295046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 305395046b92SSathya Perla { 305495046b92SSathya Perla int status; 305595046b92SSathya Perla bool pmac_valid = false; 305695046b92SSathya Perla 305795046b92SSathya Perla memset(mac, 0, ETH_ALEN); 305895046b92SSathya Perla 30593175d8c2SSathya Perla if (BEx_chip(adapter)) { 30603175d8c2SSathya Perla if (be_physfn(adapter)) 30613175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 30623175d8c2SSathya Perla 0); 306395046b92SSathya Perla else 306495046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 306595046b92SSathya Perla adapter->if_handle, 0); 30663175d8c2SSathya Perla } else { 30673175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 3068b188f090SSuresh Reddy NULL, adapter->if_handle, 0); 30693175d8c2SSathya Perla } 30703175d8c2SSathya Perla 307195046b92SSathya Perla return status; 307295046b92SSathya Perla } 307395046b92SSathya Perla 3074590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 3075590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 3076590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 3077590c391dSPadmanabh Ratnakar { 3078590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3079590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 3080590c391dSPadmanabh Ratnakar int status; 3081590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 3082590c391dSPadmanabh Ratnakar 3083590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3084590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 3085590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 3086590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 3087d0320f75SJoe Perches if (!cmd.va) 3088590c391dSPadmanabh Ratnakar return -ENOMEM; 3089590c391dSPadmanabh Ratnakar 3090590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3091590c391dSPadmanabh Ratnakar 3092590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3093590c391dSPadmanabh Ratnakar if (!wrb) { 3094590c391dSPadmanabh Ratnakar status = -EBUSY; 3095590c391dSPadmanabh Ratnakar goto err; 3096590c391dSPadmanabh Ratnakar } 3097590c391dSPadmanabh Ratnakar 3098590c391dSPadmanabh Ratnakar req = cmd.va; 3099590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3100590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 3101590c391dSPadmanabh Ratnakar wrb, &cmd); 3102590c391dSPadmanabh Ratnakar 3103590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 3104590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 3105590c391dSPadmanabh Ratnakar if (mac_count) 3106590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 3107590c391dSPadmanabh Ratnakar 3108590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3109590c391dSPadmanabh Ratnakar 3110590c391dSPadmanabh Ratnakar err: 3111a2cc4e0bSSathya Perla dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); 3112590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3113590c391dSPadmanabh Ratnakar return status; 3114590c391dSPadmanabh Ratnakar } 31154762f6ceSAjit Khaparde 31163175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 31173175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 31183175d8c2SSathya Perla * current list are active. 31193175d8c2SSathya Perla */ 31203175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 31213175d8c2SSathya Perla { 31223175d8c2SSathya Perla bool active_mac = false; 31233175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 31243175d8c2SSathya Perla u32 pmac_id; 31253175d8c2SSathya Perla int status; 31263175d8c2SSathya Perla 31273175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 3128b188f090SSuresh Reddy &pmac_id, if_id, dom); 3129b188f090SSuresh Reddy 31303175d8c2SSathya Perla if (!status && active_mac) 31313175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 31323175d8c2SSathya Perla 31333175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 31343175d8c2SSathya Perla } 31353175d8c2SSathya Perla 3136f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 3137a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 3138f1f3ee1bSAjit Khaparde { 3139f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3140f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 3141f1f3ee1bSAjit Khaparde void *ctxt; 3142f1f3ee1bSAjit Khaparde int status; 3143f1f3ee1bSAjit Khaparde 3144f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3145f1f3ee1bSAjit Khaparde 3146f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3147f1f3ee1bSAjit Khaparde if (!wrb) { 3148f1f3ee1bSAjit Khaparde status = -EBUSY; 3149f1f3ee1bSAjit Khaparde goto err; 3150f1f3ee1bSAjit Khaparde } 3151f1f3ee1bSAjit Khaparde 3152f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3153f1f3ee1bSAjit Khaparde ctxt = &req->context; 3154f1f3ee1bSAjit Khaparde 3155f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3156a2cc4e0bSSathya Perla OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, 3157a2cc4e0bSSathya Perla NULL); 3158f1f3ee1bSAjit Khaparde 3159f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3160f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 3161f1f3ee1bSAjit Khaparde if (pvid) { 3162f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 3163f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 3164f1f3ee1bSAjit Khaparde } 3165a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 3166a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 3167a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3168a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 3169a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 3170a77dcb8cSAjit Khaparde ctxt, hsw_mode); 3171a77dcb8cSAjit Khaparde } 3172f1f3ee1bSAjit Khaparde 3173f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3174f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3175f1f3ee1bSAjit Khaparde 3176f1f3ee1bSAjit Khaparde err: 3177f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3178f1f3ee1bSAjit Khaparde return status; 3179f1f3ee1bSAjit Khaparde } 3180f1f3ee1bSAjit Khaparde 3181f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 3182f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 3183a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 3184f1f3ee1bSAjit Khaparde { 3185f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 3186f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 3187f1f3ee1bSAjit Khaparde void *ctxt; 3188f1f3ee1bSAjit Khaparde int status; 3189f1f3ee1bSAjit Khaparde u16 vid; 3190f1f3ee1bSAjit Khaparde 3191f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 3192f1f3ee1bSAjit Khaparde 3193f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 3194f1f3ee1bSAjit Khaparde if (!wrb) { 3195f1f3ee1bSAjit Khaparde status = -EBUSY; 3196f1f3ee1bSAjit Khaparde goto err; 3197f1f3ee1bSAjit Khaparde } 3198f1f3ee1bSAjit Khaparde 3199f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 3200f1f3ee1bSAjit Khaparde ctxt = &req->context; 3201f1f3ee1bSAjit Khaparde 3202f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3203a2cc4e0bSSathya Perla OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, 3204a2cc4e0bSSathya Perla NULL); 3205f1f3ee1bSAjit Khaparde 3206f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 3207a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3208a77dcb8cSAjit Khaparde ctxt, intf_id); 3209f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 3210a77dcb8cSAjit Khaparde 32112c07c1d7SVasundhara Volam if (!BEx_chip(adapter) && mode) { 3212a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3213a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 3214a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 3215a77dcb8cSAjit Khaparde } 3216f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 3217f1f3ee1bSAjit Khaparde 3218f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 3219f1f3ee1bSAjit Khaparde if (!status) { 3220f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 3221f1f3ee1bSAjit Khaparde embedded_payload(wrb); 322203d28ffeSKalesh AP 3223a2cc4e0bSSathya Perla be_dws_le_to_cpu(&resp->context, sizeof(resp->context)); 3224f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3225f1f3ee1bSAjit Khaparde pvid, &resp->context); 3226a77dcb8cSAjit Khaparde if (pvid) 3227f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 3228a77dcb8cSAjit Khaparde if (mode) 3229a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3230a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3231f1f3ee1bSAjit Khaparde } 3232f1f3ee1bSAjit Khaparde 3233f1f3ee1bSAjit Khaparde err: 3234f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3235f1f3ee1bSAjit Khaparde return status; 3236f1f3ee1bSAjit Khaparde } 3237f1f3ee1bSAjit Khaparde 32384762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 32394762f6ceSAjit Khaparde { 32404762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 32414762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 324276a9e08eSSuresh Reddy int status = 0; 32434762f6ceSAjit Khaparde struct be_dma_mem cmd; 32444762f6ceSAjit Khaparde 3245f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3246f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3247f25b119cSPadmanabh Ratnakar return -EPERM; 3248f25b119cSPadmanabh Ratnakar 324976a9e08eSSuresh Reddy if (be_is_wol_excluded(adapter)) 325076a9e08eSSuresh Reddy return status; 325176a9e08eSSuresh Reddy 3252d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3253d98ef50fSSuresh Reddy return -1; 3254d98ef50fSSuresh Reddy 32554762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 32564762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 3257a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 32584762f6ceSAjit Khaparde if (!cmd.va) { 3259a2cc4e0bSSathya Perla dev_err(&adapter->pdev->dev, "Memory allocation failure\n"); 3260d98ef50fSSuresh Reddy status = -ENOMEM; 3261d98ef50fSSuresh Reddy goto err; 32624762f6ceSAjit Khaparde } 32634762f6ceSAjit Khaparde 32644762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 32654762f6ceSAjit Khaparde if (!wrb) { 32664762f6ceSAjit Khaparde status = -EBUSY; 32674762f6ceSAjit Khaparde goto err; 32684762f6ceSAjit Khaparde } 32694762f6ceSAjit Khaparde 32704762f6ceSAjit Khaparde req = cmd.va; 32714762f6ceSAjit Khaparde 32724762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 32734762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 327476a9e08eSSuresh Reddy sizeof(*req), wrb, &cmd); 32754762f6ceSAjit Khaparde 32764762f6ceSAjit Khaparde req->hdr.version = 1; 32774762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 32784762f6ceSAjit Khaparde 32794762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 32804762f6ceSAjit Khaparde if (!status) { 32814762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 328203d28ffeSKalesh AP 32834762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *)cmd.va; 32844762f6ceSAjit Khaparde 32854762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 328676a9e08eSSuresh Reddy if (adapter->wol_cap & BE_WOL_CAP) 328776a9e08eSSuresh Reddy adapter->wol_en = true; 32884762f6ceSAjit Khaparde } 32894762f6ceSAjit Khaparde err: 32904762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3291d98ef50fSSuresh Reddy if (cmd.va) 32924762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 32934762f6ceSAjit Khaparde return status; 3294941a77d5SSomnath Kotur 3295941a77d5SSomnath Kotur } 3296baaa08d1SVasundhara Volam 3297baaa08d1SVasundhara Volam int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level) 3298baaa08d1SVasundhara Volam { 3299baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3300baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3301baaa08d1SVasundhara Volam int status; 3302baaa08d1SVasundhara Volam int i, j; 3303baaa08d1SVasundhara Volam 3304baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3305baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3306baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3307baaa08d1SVasundhara Volam &extfat_cmd.dma); 3308baaa08d1SVasundhara Volam if (!extfat_cmd.va) 3309baaa08d1SVasundhara Volam return -ENOMEM; 3310baaa08d1SVasundhara Volam 3311baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3312baaa08d1SVasundhara Volam if (status) 3313baaa08d1SVasundhara Volam goto err; 3314baaa08d1SVasundhara Volam 3315baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *) 3316baaa08d1SVasundhara Volam (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr)); 3317baaa08d1SVasundhara Volam for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { 3318baaa08d1SVasundhara Volam u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); 331903d28ffeSKalesh AP 3320baaa08d1SVasundhara Volam for (j = 0; j < num_modes; j++) { 3321baaa08d1SVasundhara Volam if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) 3322baaa08d1SVasundhara Volam cfgs->module[i].trace_lvl[j].dbg_lvl = 3323baaa08d1SVasundhara Volam cpu_to_le32(level); 3324baaa08d1SVasundhara Volam } 3325baaa08d1SVasundhara Volam } 3326baaa08d1SVasundhara Volam 3327baaa08d1SVasundhara Volam status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); 3328baaa08d1SVasundhara Volam err: 3329baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3330baaa08d1SVasundhara Volam extfat_cmd.dma); 3331baaa08d1SVasundhara Volam return status; 3332baaa08d1SVasundhara Volam } 3333baaa08d1SVasundhara Volam 3334baaa08d1SVasundhara Volam int be_cmd_get_fw_log_level(struct be_adapter *adapter) 3335baaa08d1SVasundhara Volam { 3336baaa08d1SVasundhara Volam struct be_dma_mem extfat_cmd; 3337baaa08d1SVasundhara Volam struct be_fat_conf_params *cfgs; 3338baaa08d1SVasundhara Volam int status, j; 3339baaa08d1SVasundhara Volam int level = 0; 3340baaa08d1SVasundhara Volam 3341baaa08d1SVasundhara Volam memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); 3342baaa08d1SVasundhara Volam extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); 3343baaa08d1SVasundhara Volam extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, 3344baaa08d1SVasundhara Volam &extfat_cmd.dma); 3345baaa08d1SVasundhara Volam 3346baaa08d1SVasundhara Volam if (!extfat_cmd.va) { 3347baaa08d1SVasundhara Volam dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", 3348baaa08d1SVasundhara Volam __func__); 3349baaa08d1SVasundhara Volam goto err; 3350baaa08d1SVasundhara Volam } 3351baaa08d1SVasundhara Volam 3352baaa08d1SVasundhara Volam status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); 3353baaa08d1SVasundhara Volam if (!status) { 3354baaa08d1SVasundhara Volam cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + 3355baaa08d1SVasundhara Volam sizeof(struct be_cmd_resp_hdr)); 335603d28ffeSKalesh AP 3357baaa08d1SVasundhara Volam for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { 3358baaa08d1SVasundhara Volam if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) 3359baaa08d1SVasundhara Volam level = cfgs->module[0].trace_lvl[j].dbg_lvl; 3360baaa08d1SVasundhara Volam } 3361baaa08d1SVasundhara Volam } 3362baaa08d1SVasundhara Volam pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, 3363baaa08d1SVasundhara Volam extfat_cmd.dma); 3364baaa08d1SVasundhara Volam err: 3365baaa08d1SVasundhara Volam return level; 3366baaa08d1SVasundhara Volam } 3367baaa08d1SVasundhara Volam 3368941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3369941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3370941a77d5SSomnath Kotur { 3371941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3372941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3373941a77d5SSomnath Kotur int status; 3374941a77d5SSomnath Kotur 3375941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3376941a77d5SSomnath Kotur return -1; 3377941a77d5SSomnath Kotur 3378941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3379941a77d5SSomnath Kotur if (!wrb) { 3380941a77d5SSomnath Kotur status = -EBUSY; 3381941a77d5SSomnath Kotur goto err; 3382941a77d5SSomnath Kotur } 3383941a77d5SSomnath Kotur 3384941a77d5SSomnath Kotur req = cmd->va; 3385941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3386941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3387941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3388941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3389941a77d5SSomnath Kotur 3390941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3391941a77d5SSomnath Kotur err: 3392941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3393941a77d5SSomnath Kotur return status; 3394941a77d5SSomnath Kotur } 3395941a77d5SSomnath Kotur 3396941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3397941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3398941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3399941a77d5SSomnath Kotur { 3400941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3401941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3402941a77d5SSomnath Kotur int status; 3403941a77d5SSomnath Kotur 3404941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3405941a77d5SSomnath Kotur 3406941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3407941a77d5SSomnath Kotur if (!wrb) { 3408941a77d5SSomnath Kotur status = -EBUSY; 3409941a77d5SSomnath Kotur goto err; 3410941a77d5SSomnath Kotur } 3411941a77d5SSomnath Kotur 3412941a77d5SSomnath Kotur req = cmd->va; 3413941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3414941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3415941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3416941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3417941a77d5SSomnath Kotur 3418941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3419941a77d5SSomnath Kotur err: 3420941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3421941a77d5SSomnath Kotur return status; 34224762f6ceSAjit Khaparde } 34236a4ab669SParav Pandit 3424b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3425b4e32a71SPadmanabh Ratnakar { 3426b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3427b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3428b4e32a71SPadmanabh Ratnakar int status; 3429b4e32a71SPadmanabh Ratnakar 3430b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3431b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3432b4e32a71SPadmanabh Ratnakar return 0; 3433b4e32a71SPadmanabh Ratnakar } 3434b4e32a71SPadmanabh Ratnakar 3435b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3436b4e32a71SPadmanabh Ratnakar 3437b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3438b4e32a71SPadmanabh Ratnakar if (!wrb) { 3439b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3440b4e32a71SPadmanabh Ratnakar goto err; 3441b4e32a71SPadmanabh Ratnakar } 3442b4e32a71SPadmanabh Ratnakar 3443b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3444b4e32a71SPadmanabh Ratnakar 3445b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3446b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3447b4e32a71SPadmanabh Ratnakar NULL); 3448b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3449b4e32a71SPadmanabh Ratnakar 3450b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3451b4e32a71SPadmanabh Ratnakar if (!status) { 3452b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 345303d28ffeSKalesh AP 3454b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3455b4e32a71SPadmanabh Ratnakar } else { 3456b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3457b4e32a71SPadmanabh Ratnakar } 3458b4e32a71SPadmanabh Ratnakar err: 3459b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3460b4e32a71SPadmanabh Ratnakar return status; 3461b4e32a71SPadmanabh Ratnakar } 3462b4e32a71SPadmanabh Ratnakar 346310cccf60SVasundhara Volam /* Descriptor type */ 346410cccf60SVasundhara Volam enum { 346510cccf60SVasundhara Volam FUNC_DESC = 1, 346610cccf60SVasundhara Volam VFT_DESC = 2 346710cccf60SVasundhara Volam }; 346810cccf60SVasundhara Volam 346910cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count, 347010cccf60SVasundhara Volam int desc_type) 3471abb93951SPadmanabh Ratnakar { 3472150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 347310cccf60SVasundhara Volam struct be_nic_res_desc *nic; 3474abb93951SPadmanabh Ratnakar int i; 3475abb93951SPadmanabh Ratnakar 3476abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3477150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 347810cccf60SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) { 347910cccf60SVasundhara Volam nic = (struct be_nic_res_desc *)hdr; 348010cccf60SVasundhara Volam if (desc_type == FUNC_DESC || 348110cccf60SVasundhara Volam (desc_type == VFT_DESC && 348210cccf60SVasundhara Volam nic->flags & (1 << VFT_SHIFT))) 348310cccf60SVasundhara Volam return nic; 348410cccf60SVasundhara Volam } 3485150d58c7SVasundhara Volam 3486150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3487150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3488150d58c7SVasundhara Volam } 3489950e2958SWei Yang return NULL; 3490abb93951SPadmanabh Ratnakar } 3491abb93951SPadmanabh Ratnakar 349210cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_vft_desc(u8 *buf, u32 desc_count) 349310cccf60SVasundhara Volam { 349410cccf60SVasundhara Volam return be_get_nic_desc(buf, desc_count, VFT_DESC); 349510cccf60SVasundhara Volam } 349610cccf60SVasundhara Volam 349710cccf60SVasundhara Volam static struct be_nic_res_desc *be_get_func_nic_desc(u8 *buf, u32 desc_count) 349810cccf60SVasundhara Volam { 349910cccf60SVasundhara Volam return be_get_nic_desc(buf, desc_count, FUNC_DESC); 350010cccf60SVasundhara Volam } 350110cccf60SVasundhara Volam 3502150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3503150d58c7SVasundhara Volam u32 desc_count) 3504150d58c7SVasundhara Volam { 3505150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3506150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3507150d58c7SVasundhara Volam int i; 3508150d58c7SVasundhara Volam 3509150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3510150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3511150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3512150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3513150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3514150d58c7SVasundhara Volam return pcie; 3515150d58c7SVasundhara Volam } 3516150d58c7SVasundhara Volam 3517150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3518150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3519150d58c7SVasundhara Volam } 3520abb93951SPadmanabh Ratnakar return NULL; 3521abb93951SPadmanabh Ratnakar } 3522abb93951SPadmanabh Ratnakar 3523f93f160bSVasundhara Volam static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count) 3524f93f160bSVasundhara Volam { 3525f93f160bSVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3526f93f160bSVasundhara Volam int i; 3527f93f160bSVasundhara Volam 3528f93f160bSVasundhara Volam for (i = 0; i < desc_count; i++) { 3529f93f160bSVasundhara Volam if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1) 3530f93f160bSVasundhara Volam return (struct be_port_res_desc *)hdr; 3531f93f160bSVasundhara Volam 3532f93f160bSVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3533f93f160bSVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3534f93f160bSVasundhara Volam } 3535f93f160bSVasundhara Volam return NULL; 3536f93f160bSVasundhara Volam } 3537f93f160bSVasundhara Volam 353892bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 353992bf14abSSathya Perla struct be_nic_res_desc *desc) 354092bf14abSSathya Perla { 354192bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 354292bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 354392bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 354492bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 354592bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 354692bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 354792bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 354892bf14abSSathya Perla /* Clear flags that driver is not interested in */ 354992bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 355092bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 355192bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 355292bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 355392bf14abSSathya Perla res->max_rss_qs -= 1; 355492bf14abSSathya Perla } 355592bf14abSSathya Perla 3556abb93951SPadmanabh Ratnakar /* Uses Mbox */ 355792bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3558abb93951SPadmanabh Ratnakar { 3559abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3560abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3561abb93951SPadmanabh Ratnakar int status; 3562abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3563abb93951SPadmanabh Ratnakar 3564d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3565d98ef50fSSuresh Reddy return -1; 3566d98ef50fSSuresh Reddy 3567abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3568abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3569a2cc4e0bSSathya Perla cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3570abb93951SPadmanabh Ratnakar if (!cmd.va) { 3571abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3572d98ef50fSSuresh Reddy status = -ENOMEM; 3573d98ef50fSSuresh Reddy goto err; 3574abb93951SPadmanabh Ratnakar } 3575abb93951SPadmanabh Ratnakar 3576abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3577abb93951SPadmanabh Ratnakar if (!wrb) { 3578abb93951SPadmanabh Ratnakar status = -EBUSY; 3579abb93951SPadmanabh Ratnakar goto err; 3580abb93951SPadmanabh Ratnakar } 3581abb93951SPadmanabh Ratnakar 3582abb93951SPadmanabh Ratnakar req = cmd.va; 3583abb93951SPadmanabh Ratnakar 3584abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3585abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3586abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3587abb93951SPadmanabh Ratnakar 358828710c55SKalesh AP if (skyhawk_chip(adapter)) 358928710c55SKalesh AP req->hdr.version = 1; 359028710c55SKalesh AP 3591abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3592abb93951SPadmanabh Ratnakar if (!status) { 3593abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3594abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3595150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3596abb93951SPadmanabh Ratnakar 359710cccf60SVasundhara Volam desc = be_get_func_nic_desc(resp->func_param, desc_count); 3598abb93951SPadmanabh Ratnakar if (!desc) { 3599abb93951SPadmanabh Ratnakar status = -EINVAL; 3600abb93951SPadmanabh Ratnakar goto err; 3601abb93951SPadmanabh Ratnakar } 3602abb93951SPadmanabh Ratnakar 3603d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 360492bf14abSSathya Perla be_copy_nic_desc(res, desc); 3605abb93951SPadmanabh Ratnakar } 3606abb93951SPadmanabh Ratnakar err: 3607abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3608d98ef50fSSuresh Reddy if (cmd.va) 3609d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3610abb93951SPadmanabh Ratnakar return status; 3611abb93951SPadmanabh Ratnakar } 3612abb93951SPadmanabh Ratnakar 3613ba48c0c9SVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 361492bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 361592bf14abSSathya Perla struct be_resources *res, u8 domain) 3616a05f99dbSVasundhara Volam { 3617150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3618ba48c0c9SVasundhara Volam struct be_cmd_req_get_profile_config *req; 361910cccf60SVasundhara Volam struct be_nic_res_desc *vf_res; 3620150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3621f93f160bSVasundhara Volam struct be_port_res_desc *port; 3622150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3623ba48c0c9SVasundhara Volam struct be_mcc_wrb wrb = {0}; 3624a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3625150d58c7SVasundhara Volam u32 desc_count; 3626a05f99dbSVasundhara Volam int status; 3627a05f99dbSVasundhara Volam 3628a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3629a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3630150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3631150d58c7SVasundhara Volam if (!cmd.va) 3632a05f99dbSVasundhara Volam return -ENOMEM; 3633a05f99dbSVasundhara Volam 3634ba48c0c9SVasundhara Volam req = cmd.va; 3635ba48c0c9SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3636ba48c0c9SVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3637ba48c0c9SVasundhara Volam cmd.size, &wrb, &cmd); 3638ba48c0c9SVasundhara Volam 3639ba48c0c9SVasundhara Volam req->hdr.domain = domain; 3640ba48c0c9SVasundhara Volam if (!lancer_chip(adapter)) 3641ba48c0c9SVasundhara Volam req->hdr.version = 1; 3642ba48c0c9SVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3643ba48c0c9SVasundhara Volam 3644ba48c0c9SVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 3645150d58c7SVasundhara Volam if (status) 3646abb93951SPadmanabh Ratnakar goto err; 3647150d58c7SVasundhara Volam 3648150d58c7SVasundhara Volam resp = cmd.va; 3649150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3650150d58c7SVasundhara Volam 3651150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3652150d58c7SVasundhara Volam desc_count); 3653150d58c7SVasundhara Volam if (pcie) 365492bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3655150d58c7SVasundhara Volam 3656f93f160bSVasundhara Volam port = be_get_port_desc(resp->func_param, desc_count); 3657f93f160bSVasundhara Volam if (port) 3658f93f160bSVasundhara Volam adapter->mc_type = port->mc_type; 3659f93f160bSVasundhara Volam 366010cccf60SVasundhara Volam nic = be_get_func_nic_desc(resp->func_param, desc_count); 366192bf14abSSathya Perla if (nic) 366292bf14abSSathya Perla be_copy_nic_desc(res, nic); 366392bf14abSSathya Perla 366410cccf60SVasundhara Volam vf_res = be_get_vft_desc(resp->func_param, desc_count); 366510cccf60SVasundhara Volam if (vf_res) 366610cccf60SVasundhara Volam res->vf_if_cap_flags = vf_res->cap_flags; 3667abb93951SPadmanabh Ratnakar err: 3668a05f99dbSVasundhara Volam if (cmd.va) 3669150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3670abb93951SPadmanabh Ratnakar return status; 3671abb93951SPadmanabh Ratnakar } 3672abb93951SPadmanabh Ratnakar 3673bec84e6bSVasundhara Volam /* Will use MBOX only if MCCQ has not been created */ 3674bec84e6bSVasundhara Volam static int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc, 3675bec84e6bSVasundhara Volam int size, int count, u8 version, u8 domain) 3676d5c18473SPadmanabh Ratnakar { 3677d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3678bec84e6bSVasundhara Volam struct be_mcc_wrb wrb = {0}; 3679bec84e6bSVasundhara Volam struct be_dma_mem cmd; 3680d5c18473SPadmanabh Ratnakar int status; 3681d5c18473SPadmanabh Ratnakar 3682bec84e6bSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3683bec84e6bSVasundhara Volam cmd.size = sizeof(struct be_cmd_req_set_profile_config); 3684bec84e6bSVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3685bec84e6bSVasundhara Volam if (!cmd.va) 3686bec84e6bSVasundhara Volam return -ENOMEM; 3687d5c18473SPadmanabh Ratnakar 3688bec84e6bSVasundhara Volam req = cmd.va; 3689d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3690bec84e6bSVasundhara Volam OPCODE_COMMON_SET_PROFILE_CONFIG, cmd.size, 3691bec84e6bSVasundhara Volam &wrb, &cmd); 3692a401801cSSathya Perla req->hdr.version = version; 3693d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3694bec84e6bSVasundhara Volam req->desc_count = cpu_to_le32(count); 3695a401801cSSathya Perla memcpy(req->desc, desc, size); 3696d5c18473SPadmanabh Ratnakar 3697bec84e6bSVasundhara Volam status = be_cmd_notify_wait(adapter, &wrb); 3698bec84e6bSVasundhara Volam 3699bec84e6bSVasundhara Volam if (cmd.va) 3700bec84e6bSVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3701d5c18473SPadmanabh Ratnakar return status; 3702d5c18473SPadmanabh Ratnakar } 3703d5c18473SPadmanabh Ratnakar 3704a401801cSSathya Perla /* Mark all fields invalid */ 3705bec84e6bSVasundhara Volam static void be_reset_nic_desc(struct be_nic_res_desc *nic) 3706a401801cSSathya Perla { 3707a401801cSSathya Perla memset(nic, 0, sizeof(*nic)); 3708a401801cSSathya Perla nic->unicast_mac_count = 0xFFFF; 3709a401801cSSathya Perla nic->mcc_count = 0xFFFF; 3710a401801cSSathya Perla nic->vlan_count = 0xFFFF; 3711a401801cSSathya Perla nic->mcast_mac_count = 0xFFFF; 3712a401801cSSathya Perla nic->txq_count = 0xFFFF; 3713a401801cSSathya Perla nic->rq_count = 0xFFFF; 3714a401801cSSathya Perla nic->rssq_count = 0xFFFF; 3715a401801cSSathya Perla nic->lro_count = 0xFFFF; 3716a401801cSSathya Perla nic->cq_count = 0xFFFF; 3717a401801cSSathya Perla nic->toe_conn_count = 0xFFFF; 3718a401801cSSathya Perla nic->eq_count = 0xFFFF; 37190f77ba73SRavikumar Nelavelli nic->iface_count = 0xFFFF; 3720a401801cSSathya Perla nic->link_param = 0xFF; 37210f77ba73SRavikumar Nelavelli nic->channel_id_param = cpu_to_le16(0xF000); 3722a401801cSSathya Perla nic->acpi_params = 0xFF; 3723a401801cSSathya Perla nic->wol_param = 0x0F; 37240f77ba73SRavikumar Nelavelli nic->tunnel_iface_count = 0xFFFF; 37250f77ba73SRavikumar Nelavelli nic->direct_tenant_iface_count = 0xFFFF; 3726bec84e6bSVasundhara Volam nic->bw_min = 0xFFFFFFFF; 3727a401801cSSathya Perla nic->bw_max = 0xFFFFFFFF; 3728a401801cSSathya Perla } 3729a401801cSSathya Perla 3730bec84e6bSVasundhara Volam /* Mark all fields invalid */ 3731bec84e6bSVasundhara Volam static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) 3732bec84e6bSVasundhara Volam { 3733bec84e6bSVasundhara Volam memset(pcie, 0, sizeof(*pcie)); 3734bec84e6bSVasundhara Volam pcie->sriov_state = 0xFF; 3735bec84e6bSVasundhara Volam pcie->pf_state = 0xFF; 3736bec84e6bSVasundhara Volam pcie->pf_type = 0xFF; 3737bec84e6bSVasundhara Volam pcie->num_vfs = 0xFFFF; 3738bec84e6bSVasundhara Volam } 3739bec84e6bSVasundhara Volam 37400f77ba73SRavikumar Nelavelli int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate, u16 link_speed, 37410f77ba73SRavikumar Nelavelli u8 domain) 3742a401801cSSathya Perla { 3743a401801cSSathya Perla struct be_nic_res_desc nic_desc; 37440f77ba73SRavikumar Nelavelli u32 bw_percent; 37450f77ba73SRavikumar Nelavelli u16 version = 0; 37460f77ba73SRavikumar Nelavelli 37470f77ba73SRavikumar Nelavelli if (BE3_chip(adapter)) 37480f77ba73SRavikumar Nelavelli return be_cmd_set_qos(adapter, max_rate / 10, domain); 3749a401801cSSathya Perla 3750a401801cSSathya Perla be_reset_nic_desc(&nic_desc); 37510f77ba73SRavikumar Nelavelli nic_desc.pf_num = adapter->pf_number; 37520f77ba73SRavikumar Nelavelli nic_desc.vf_num = domain; 37530f77ba73SRavikumar Nelavelli if (lancer_chip(adapter)) { 3754a401801cSSathya Perla nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3755a401801cSSathya Perla nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3756a401801cSSathya Perla nic_desc.flags = (1 << QUN_SHIFT) | (1 << IMM_SHIFT) | 3757a401801cSSathya Perla (1 << NOSV_SHIFT); 37580f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(max_rate / 10); 37590f77ba73SRavikumar Nelavelli } else { 37600f77ba73SRavikumar Nelavelli version = 1; 37610f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 37620f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 37630f77ba73SRavikumar Nelavelli nic_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 37640f77ba73SRavikumar Nelavelli bw_percent = max_rate ? (max_rate * 100) / link_speed : 100; 37650f77ba73SRavikumar Nelavelli nic_desc.bw_max = cpu_to_le32(bw_percent); 37660f77ba73SRavikumar Nelavelli } 3767a401801cSSathya Perla 3768a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &nic_desc, 37690f77ba73SRavikumar Nelavelli nic_desc.hdr.desc_len, 3770bec84e6bSVasundhara Volam 1, version, domain); 3771bec84e6bSVasundhara Volam } 3772bec84e6bSVasundhara Volam 3773bec84e6bSVasundhara Volam int be_cmd_set_sriov_config(struct be_adapter *adapter, 3774bec84e6bSVasundhara Volam struct be_resources res, u16 num_vfs) 3775bec84e6bSVasundhara Volam { 3776bec84e6bSVasundhara Volam struct { 3777bec84e6bSVasundhara Volam struct be_pcie_res_desc pcie; 3778bec84e6bSVasundhara Volam struct be_nic_res_desc nic_vft; 3779bec84e6bSVasundhara Volam } __packed desc; 3780bec84e6bSVasundhara Volam u16 vf_q_count; 3781bec84e6bSVasundhara Volam 3782bec84e6bSVasundhara Volam if (BEx_chip(adapter) || lancer_chip(adapter)) 3783bec84e6bSVasundhara Volam return 0; 3784bec84e6bSVasundhara Volam 3785bec84e6bSVasundhara Volam /* PF PCIE descriptor */ 3786bec84e6bSVasundhara Volam be_reset_pcie_desc(&desc.pcie); 3787bec84e6bSVasundhara Volam desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; 3788bec84e6bSVasundhara Volam desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3789bec84e6bSVasundhara Volam desc.pcie.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3790bec84e6bSVasundhara Volam desc.pcie.pf_num = adapter->pdev->devfn; 3791bec84e6bSVasundhara Volam desc.pcie.sriov_state = num_vfs ? 1 : 0; 3792bec84e6bSVasundhara Volam desc.pcie.num_vfs = cpu_to_le16(num_vfs); 3793bec84e6bSVasundhara Volam 3794bec84e6bSVasundhara Volam /* VF NIC Template descriptor */ 3795bec84e6bSVasundhara Volam be_reset_nic_desc(&desc.nic_vft); 3796bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V1; 3797bec84e6bSVasundhara Volam desc.nic_vft.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3798bec84e6bSVasundhara Volam desc.nic_vft.flags = (1 << VFT_SHIFT) | (1 << IMM_SHIFT) | 3799bec84e6bSVasundhara Volam (1 << NOSV_SHIFT); 3800bec84e6bSVasundhara Volam desc.nic_vft.pf_num = adapter->pdev->devfn; 3801bec84e6bSVasundhara Volam desc.nic_vft.vf_num = 0; 3802bec84e6bSVasundhara Volam 3803bec84e6bSVasundhara Volam if (num_vfs && res.vf_if_cap_flags & BE_IF_FLAGS_RSS) { 3804bec84e6bSVasundhara Volam /* If number of VFs requested is 8 less than max supported, 3805bec84e6bSVasundhara Volam * assign 8 queue pairs to the PF and divide the remaining 3806bec84e6bSVasundhara Volam * resources evenly among the VFs 3807bec84e6bSVasundhara Volam */ 3808bec84e6bSVasundhara Volam if (num_vfs < (be_max_vfs(adapter) - 8)) 3809bec84e6bSVasundhara Volam vf_q_count = (res.max_rss_qs - 8) / num_vfs; 3810bec84e6bSVasundhara Volam else 3811bec84e6bSVasundhara Volam vf_q_count = res.max_rss_qs / num_vfs; 3812bec84e6bSVasundhara Volam 3813bec84e6bSVasundhara Volam desc.nic_vft.rq_count = cpu_to_le16(vf_q_count); 3814bec84e6bSVasundhara Volam desc.nic_vft.txq_count = cpu_to_le16(vf_q_count); 3815bec84e6bSVasundhara Volam desc.nic_vft.rssq_count = cpu_to_le16(vf_q_count - 1); 3816bec84e6bSVasundhara Volam desc.nic_vft.cq_count = cpu_to_le16(3 * vf_q_count); 3817bec84e6bSVasundhara Volam } else { 3818bec84e6bSVasundhara Volam desc.nic_vft.txq_count = cpu_to_le16(1); 3819bec84e6bSVasundhara Volam desc.nic_vft.rq_count = cpu_to_le16(1); 3820bec84e6bSVasundhara Volam desc.nic_vft.rssq_count = cpu_to_le16(0); 3821bec84e6bSVasundhara Volam /* One CQ for each TX, RX and MCCQ */ 3822bec84e6bSVasundhara Volam desc.nic_vft.cq_count = cpu_to_le16(3); 3823bec84e6bSVasundhara Volam } 3824bec84e6bSVasundhara Volam 3825bec84e6bSVasundhara Volam return be_cmd_set_profile_config(adapter, &desc, 3826bec84e6bSVasundhara Volam 2 * RESOURCE_DESC_SIZE_V1, 2, 1, 0); 3827a401801cSSathya Perla } 3828a401801cSSathya Perla 3829a401801cSSathya Perla int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op) 3830a401801cSSathya Perla { 3831a401801cSSathya Perla struct be_mcc_wrb *wrb; 3832a401801cSSathya Perla struct be_cmd_req_manage_iface_filters *req; 3833a401801cSSathya Perla int status; 3834a401801cSSathya Perla 3835a401801cSSathya Perla if (iface == 0xFFFFFFFF) 3836a401801cSSathya Perla return -1; 3837a401801cSSathya Perla 3838a401801cSSathya Perla spin_lock_bh(&adapter->mcc_lock); 3839a401801cSSathya Perla 3840a401801cSSathya Perla wrb = wrb_from_mccq(adapter); 3841a401801cSSathya Perla if (!wrb) { 3842a401801cSSathya Perla status = -EBUSY; 3843a401801cSSathya Perla goto err; 3844a401801cSSathya Perla } 3845a401801cSSathya Perla req = embedded_payload(wrb); 3846a401801cSSathya Perla 3847a401801cSSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3848a401801cSSathya Perla OPCODE_COMMON_MANAGE_IFACE_FILTERS, sizeof(*req), 3849a401801cSSathya Perla wrb, NULL); 3850a401801cSSathya Perla req->op = op; 3851a401801cSSathya Perla req->target_iface_id = cpu_to_le32(iface); 3852a401801cSSathya Perla 3853a401801cSSathya Perla status = be_mcc_notify_wait(adapter); 3854a401801cSSathya Perla err: 3855a401801cSSathya Perla spin_unlock_bh(&adapter->mcc_lock); 3856a401801cSSathya Perla return status; 3857a401801cSSathya Perla } 3858a401801cSSathya Perla 3859a401801cSSathya Perla int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port) 3860a401801cSSathya Perla { 3861a401801cSSathya Perla struct be_port_res_desc port_desc; 3862a401801cSSathya Perla 3863a401801cSSathya Perla memset(&port_desc, 0, sizeof(port_desc)); 3864a401801cSSathya Perla port_desc.hdr.desc_type = PORT_RESOURCE_DESC_TYPE_V1; 3865a401801cSSathya Perla port_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V1; 3866a401801cSSathya Perla port_desc.flags = (1 << IMM_SHIFT) | (1 << NOSV_SHIFT); 3867a401801cSSathya Perla port_desc.link_num = adapter->hba_port_num; 3868a401801cSSathya Perla if (port) { 3869a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_VXLAN | (1 << SOCVID_SHIFT) | 3870a401801cSSathya Perla (1 << RCVID_SHIFT); 3871a401801cSSathya Perla port_desc.nv_port = swab16(port); 3872a401801cSSathya Perla } else { 3873a401801cSSathya Perla port_desc.nv_flags = NV_TYPE_DISABLED; 3874a401801cSSathya Perla port_desc.nv_port = 0; 3875a401801cSSathya Perla } 3876a401801cSSathya Perla 3877a401801cSSathya Perla return be_cmd_set_profile_config(adapter, &port_desc, 3878bec84e6bSVasundhara Volam RESOURCE_DESC_SIZE_V1, 1, 1, 0); 3879a401801cSSathya Perla } 3880a401801cSSathya Perla 38814c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 38824c876616SSathya Perla int vf_num) 38834c876616SSathya Perla { 38844c876616SSathya Perla struct be_mcc_wrb *wrb; 38854c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 38864c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 38874c876616SSathya Perla int status; 38884c876616SSathya Perla 38894c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 38904c876616SSathya Perla 38914c876616SSathya Perla wrb = wrb_from_mccq(adapter); 38924c876616SSathya Perla if (!wrb) { 38934c876616SSathya Perla status = -EBUSY; 38944c876616SSathya Perla goto err; 38954c876616SSathya Perla } 38964c876616SSathya Perla req = embedded_payload(wrb); 38974c876616SSathya Perla 38984c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 38994c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 39004c876616SSathya Perla wrb, NULL); 39014c876616SSathya Perla req->hdr.domain = vf_num + 1; 39024c876616SSathya Perla 39034c876616SSathya Perla status = be_mcc_notify_wait(adapter); 39044c876616SSathya Perla if (!status) { 39054c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 39064c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 39074c876616SSathya Perla } 39084c876616SSathya Perla 39094c876616SSathya Perla err: 39104c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 39114c876616SSathya Perla return status; 39124c876616SSathya Perla } 39134c876616SSathya Perla 39145c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 39155c510811SSomnath Kotur { 39165c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 39175c510811SSomnath Kotur u32 reg_val; 39185c510811SSomnath Kotur int status = 0, i; 39195c510811SSomnath Kotur 39205c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 39215c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 39225c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 39235c510811SSomnath Kotur break; 39245c510811SSomnath Kotur 39255c510811SSomnath Kotur ssleep(1); 39265c510811SSomnath Kotur } 39275c510811SSomnath Kotur 39285c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 39295c510811SSomnath Kotur status = -1; 39305c510811SSomnath Kotur 39315c510811SSomnath Kotur return status; 39325c510811SSomnath Kotur } 39335c510811SSomnath Kotur 39345c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 39355c510811SSomnath Kotur { 39365c510811SSomnath Kotur int status = 0; 39375c510811SSomnath Kotur 39385c510811SSomnath Kotur status = lancer_wait_idle(adapter); 39395c510811SSomnath Kotur if (status) 39405c510811SSomnath Kotur return status; 39415c510811SSomnath Kotur 39425c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 39435c510811SSomnath Kotur 39445c510811SSomnath Kotur return status; 39455c510811SSomnath Kotur } 39465c510811SSomnath Kotur 39475c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 39485c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 39495c510811SSomnath Kotur { 39505c510811SSomnath Kotur u32 sliport_status = 0; 39515c510811SSomnath Kotur 39525c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 39535c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 39545c510811SSomnath Kotur } 39555c510811SSomnath Kotur 39565c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 39575c510811SSomnath Kotur { 3958f0613380SKalesh AP struct device *dev = &adapter->pdev->dev; 39595c510811SSomnath Kotur int status; 39605c510811SSomnath Kotur 3961f0613380SKalesh AP if (dump_present(adapter)) { 3962f0613380SKalesh AP dev_info(dev, "Previous dump not cleared, not forcing dump\n"); 3963f0613380SKalesh AP return -EEXIST; 3964f0613380SKalesh AP } 3965f0613380SKalesh AP 39665c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 39675c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 39685c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 39695c510811SSomnath Kotur if (status < 0) { 3970f0613380SKalesh AP dev_err(dev, "FW reset failed\n"); 39715c510811SSomnath Kotur return status; 39725c510811SSomnath Kotur } 39735c510811SSomnath Kotur 39745c510811SSomnath Kotur status = lancer_wait_idle(adapter); 39755c510811SSomnath Kotur if (status) 39765c510811SSomnath Kotur return status; 39775c510811SSomnath Kotur 39785c510811SSomnath Kotur if (!dump_present(adapter)) { 3979f0613380SKalesh AP dev_err(dev, "FW dump not generated\n"); 3980f0613380SKalesh AP return -EIO; 39815c510811SSomnath Kotur } 39825c510811SSomnath Kotur 39835c510811SSomnath Kotur return 0; 39845c510811SSomnath Kotur } 39855c510811SSomnath Kotur 3986f0613380SKalesh AP int lancer_delete_dump(struct be_adapter *adapter) 3987f0613380SKalesh AP { 3988f0613380SKalesh AP int status; 3989f0613380SKalesh AP 3990f0613380SKalesh AP status = lancer_cmd_delete_object(adapter, LANCER_FW_DUMP_FILE); 3991f0613380SKalesh AP return be_cmd_status(status); 3992f0613380SKalesh AP } 3993f0613380SKalesh AP 3994dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3995dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3996dcf7ebbaSPadmanabh Ratnakar { 3997dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3998dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3999dcf7ebbaSPadmanabh Ratnakar int status; 4000dcf7ebbaSPadmanabh Ratnakar 40010599863dSVasundhara Volam if (BEx_chip(adapter)) 4002dcf7ebbaSPadmanabh Ratnakar return 0; 4003dcf7ebbaSPadmanabh Ratnakar 4004dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 4005dcf7ebbaSPadmanabh Ratnakar 4006dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 4007dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 4008dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 4009dcf7ebbaSPadmanabh Ratnakar goto err; 4010dcf7ebbaSPadmanabh Ratnakar } 4011dcf7ebbaSPadmanabh Ratnakar 4012dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 4013dcf7ebbaSPadmanabh Ratnakar 4014dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4015dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 4016dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 4017dcf7ebbaSPadmanabh Ratnakar 4018dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 4019dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 4020dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 4021dcf7ebbaSPadmanabh Ratnakar err: 4022dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 4023dcf7ebbaSPadmanabh Ratnakar return status; 4024dcf7ebbaSPadmanabh Ratnakar } 4025dcf7ebbaSPadmanabh Ratnakar 402668c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 402768c45a2dSSomnath Kotur { 402868c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 402968c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 403068c45a2dSSomnath Kotur int status; 403168c45a2dSSomnath Kotur 403268c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 403368c45a2dSSomnath Kotur return -1; 403468c45a2dSSomnath Kotur 403568c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 403668c45a2dSSomnath Kotur 403768c45a2dSSomnath Kotur req = embedded_payload(wrb); 403868c45a2dSSomnath Kotur 403968c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 404068c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 404168c45a2dSSomnath Kotur wrb, NULL); 404268c45a2dSSomnath Kotur 404368c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 404468c45a2dSSomnath Kotur 404568c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 404668c45a2dSSomnath Kotur 404768c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 404868c45a2dSSomnath Kotur return status; 404968c45a2dSSomnath Kotur } 405068c45a2dSSomnath Kotur 4051542963b7SVasundhara Volam /* Uses MBOX */ 4052542963b7SVasundhara Volam int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id) 4053542963b7SVasundhara Volam { 4054542963b7SVasundhara Volam struct be_cmd_req_get_active_profile *req; 4055542963b7SVasundhara Volam struct be_mcc_wrb *wrb; 4056542963b7SVasundhara Volam int status; 4057542963b7SVasundhara Volam 4058542963b7SVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 4059542963b7SVasundhara Volam return -1; 4060542963b7SVasundhara Volam 4061542963b7SVasundhara Volam wrb = wrb_from_mbox(adapter); 4062542963b7SVasundhara Volam if (!wrb) { 4063542963b7SVasundhara Volam status = -EBUSY; 4064542963b7SVasundhara Volam goto err; 4065542963b7SVasundhara Volam } 4066542963b7SVasundhara Volam 4067542963b7SVasundhara Volam req = embedded_payload(wrb); 4068542963b7SVasundhara Volam 4069542963b7SVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4070542963b7SVasundhara Volam OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req), 4071542963b7SVasundhara Volam wrb, NULL); 4072542963b7SVasundhara Volam 4073542963b7SVasundhara Volam status = be_mbox_notify_wait(adapter); 4074542963b7SVasundhara Volam if (!status) { 4075542963b7SVasundhara Volam struct be_cmd_resp_get_active_profile *resp = 4076542963b7SVasundhara Volam embedded_payload(wrb); 407703d28ffeSKalesh AP 4078542963b7SVasundhara Volam *profile_id = le16_to_cpu(resp->active_profile_id); 4079542963b7SVasundhara Volam } 4080542963b7SVasundhara Volam 4081542963b7SVasundhara Volam err: 4082542963b7SVasundhara Volam mutex_unlock(&adapter->mbox_lock); 4083542963b7SVasundhara Volam return status; 4084542963b7SVasundhara Volam } 4085542963b7SVasundhara Volam 4086bdce2ad7SSuresh Reddy int be_cmd_set_logical_link_config(struct be_adapter *adapter, 4087bdce2ad7SSuresh Reddy int link_state, u8 domain) 4088bdce2ad7SSuresh Reddy { 4089bdce2ad7SSuresh Reddy struct be_mcc_wrb *wrb; 4090bdce2ad7SSuresh Reddy struct be_cmd_req_set_ll_link *req; 4091bdce2ad7SSuresh Reddy int status; 4092bdce2ad7SSuresh Reddy 4093bdce2ad7SSuresh Reddy if (BEx_chip(adapter) || lancer_chip(adapter)) 4094bdce2ad7SSuresh Reddy return 0; 4095bdce2ad7SSuresh Reddy 4096bdce2ad7SSuresh Reddy spin_lock_bh(&adapter->mcc_lock); 4097bdce2ad7SSuresh Reddy 4098bdce2ad7SSuresh Reddy wrb = wrb_from_mccq(adapter); 4099bdce2ad7SSuresh Reddy if (!wrb) { 4100bdce2ad7SSuresh Reddy status = -EBUSY; 4101bdce2ad7SSuresh Reddy goto err; 4102bdce2ad7SSuresh Reddy } 4103bdce2ad7SSuresh Reddy 4104bdce2ad7SSuresh Reddy req = embedded_payload(wrb); 4105bdce2ad7SSuresh Reddy 4106bdce2ad7SSuresh Reddy be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 4107bdce2ad7SSuresh Reddy OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG, 4108bdce2ad7SSuresh Reddy sizeof(*req), wrb, NULL); 4109bdce2ad7SSuresh Reddy 4110bdce2ad7SSuresh Reddy req->hdr.version = 1; 4111bdce2ad7SSuresh Reddy req->hdr.domain = domain; 4112bdce2ad7SSuresh Reddy 4113bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_ENABLE) 4114bdce2ad7SSuresh Reddy req->link_config |= 1; 4115bdce2ad7SSuresh Reddy 4116bdce2ad7SSuresh Reddy if (link_state == IFLA_VF_LINK_STATE_AUTO) 4117bdce2ad7SSuresh Reddy req->link_config |= 1 << PLINK_TRACK_SHIFT; 4118bdce2ad7SSuresh Reddy 4119bdce2ad7SSuresh Reddy status = be_mcc_notify_wait(adapter); 4120bdce2ad7SSuresh Reddy err: 4121bdce2ad7SSuresh Reddy spin_unlock_bh(&adapter->mcc_lock); 4122bdce2ad7SSuresh Reddy return status; 4123bdce2ad7SSuresh Reddy } 4124bdce2ad7SSuresh Reddy 41256a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 41266a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 41276a4ab669SParav Pandit { 41286a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 41296a4ab669SParav Pandit struct be_mcc_wrb *wrb; 41306a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *)wrb_payload; 41316a4ab669SParav Pandit struct be_cmd_req_hdr *req; 41326a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 41336a4ab669SParav Pandit int status; 41346a4ab669SParav Pandit 41356a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 41366a4ab669SParav Pandit 41376a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 41386a4ab669SParav Pandit if (!wrb) { 41396a4ab669SParav Pandit status = -EBUSY; 41406a4ab669SParav Pandit goto err; 41416a4ab669SParav Pandit } 41426a4ab669SParav Pandit req = embedded_payload(wrb); 41436a4ab669SParav Pandit resp = embedded_payload(wrb); 41446a4ab669SParav Pandit 41456a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 41466a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 41476a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 41486a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 41496a4ab669SParav Pandit 41506a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 41516a4ab669SParav Pandit if (cmd_status) 41526a4ab669SParav Pandit *cmd_status = (status & 0xffff); 41536a4ab669SParav Pandit if (ext_status) 41546a4ab669SParav Pandit *ext_status = 0; 41556a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 41566a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 41576a4ab669SParav Pandit err: 41586a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 41596a4ab669SParav Pandit return status; 41606a4ab669SParav Pandit } 41616a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 4162