19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 144652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 145652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 146652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1479aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1489aebddd1SJeff Kirsher complete(&adapter->flash_compl); 1499aebddd1SJeff Kirsher } 1509aebddd1SJeff Kirsher 1519aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 152652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 153652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 154652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1559aebddd1SJeff Kirsher be_parse_stats(adapter); 1569aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1579aebddd1SJeff Kirsher } 158652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 159652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1603de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 161652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1623de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1633de09455SSomnath Kotur resp->on_die_temperature; 1643de09455SSomnath Kotur } 1659aebddd1SJeff Kirsher } else { 166652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1677aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1683de09455SSomnath Kotur 1699aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1709aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1719aebddd1SJeff Kirsher goto done; 1729aebddd1SJeff Kirsher 1739aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 17497f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 175522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 17697f1d8cdSVasundhara Volam opcode, subsystem); 1779aebddd1SJeff Kirsher } else { 1789aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1799aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18097f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18197f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 1839aebddd1SJeff Kirsher } 1849aebddd1SJeff Kirsher } 1859aebddd1SJeff Kirsher done: 1869aebddd1SJeff Kirsher return compl_status; 1879aebddd1SJeff Kirsher } 1889aebddd1SJeff Kirsher 1899aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1909aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 1919aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 1929aebddd1SJeff Kirsher { 193b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 19442f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 195b236916aSAjit Khaparde 1962e177a5cSPadmanabh Ratnakar /* Ignore physical link event */ 1972e177a5cSPadmanabh Ratnakar if (lancer_chip(adapter) && 1982e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 1992e177a5cSPadmanabh Ratnakar return; 2002e177a5cSPadmanabh Ratnakar 201b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 202b236916aSAjit Khaparde * it may not be received in some cases. 203b236916aSAjit Khaparde */ 204b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 2059aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 2069aebddd1SJeff Kirsher } 2079aebddd1SJeff Kirsher 2089aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2099aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2109aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2119aebddd1SJeff Kirsher { 2129aebddd1SJeff Kirsher if (evt->valid) { 2139aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2149aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2159aebddd1SJeff Kirsher adapter->recommended_prio = 2169aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2179aebddd1SJeff Kirsher } 2189aebddd1SJeff Kirsher } 2199aebddd1SJeff Kirsher 220323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2219aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2229aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2239aebddd1SJeff Kirsher { 224323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 225323ff71eSSathya Perla evt->physical_port == adapter->port_num) 226323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2279aebddd1SJeff Kirsher } 2289aebddd1SJeff Kirsher 2299aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2309aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2319aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2329aebddd1SJeff Kirsher { 2339aebddd1SJeff Kirsher if (evt->enabled) 234939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 2359aebddd1SJeff Kirsher else 2369aebddd1SJeff Kirsher adapter->pvid = 0; 2379aebddd1SJeff Kirsher } 2389aebddd1SJeff Kirsher 2399aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2409aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2419aebddd1SJeff Kirsher { 2429aebddd1SJeff Kirsher u8 event_type = 0; 2439aebddd1SJeff Kirsher 2449aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2459aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2469aebddd1SJeff Kirsher 2479aebddd1SJeff Kirsher switch (event_type) { 2489aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2499aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2509aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2519aebddd1SJeff Kirsher break; 2529aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2539aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2549aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2559aebddd1SJeff Kirsher break; 2569aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2579aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2589aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2599aebddd1SJeff Kirsher break; 2609aebddd1SJeff Kirsher default: 26105ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 26205ccaa2bSVasundhara Volam event_type); 2639aebddd1SJeff Kirsher break; 2649aebddd1SJeff Kirsher } 2659aebddd1SJeff Kirsher } 2669aebddd1SJeff Kirsher 267bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 268bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 269bc0c3405SAjit Khaparde { 270bc0c3405SAjit Khaparde u8 event_type = 0; 271bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 272bc0c3405SAjit Khaparde 273bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 274bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 275bc0c3405SAjit Khaparde 276bc0c3405SAjit Khaparde switch (event_type) { 277bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 278bc0c3405SAjit Khaparde if (evt->valid) 279bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 280bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 281bc0c3405SAjit Khaparde break; 282bc0c3405SAjit Khaparde default: 28305ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 28405ccaa2bSVasundhara Volam event_type); 285bc0c3405SAjit Khaparde break; 286bc0c3405SAjit Khaparde } 287bc0c3405SAjit Khaparde } 288bc0c3405SAjit Khaparde 2899aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 2909aebddd1SJeff Kirsher { 2919aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2929aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2939aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 2949aebddd1SJeff Kirsher } 2959aebddd1SJeff Kirsher 2969aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 2979aebddd1SJeff Kirsher { 2989aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2999aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3009aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3019aebddd1SJeff Kirsher } 3029aebddd1SJeff Kirsher 303bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 304bc0c3405SAjit Khaparde { 305bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 306bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 307bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 308bc0c3405SAjit Khaparde } 309bc0c3405SAjit Khaparde 3109aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3119aebddd1SJeff Kirsher { 3129aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3139aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3149aebddd1SJeff Kirsher 3159aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3169aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3179aebddd1SJeff Kirsher return compl; 3189aebddd1SJeff Kirsher } 3199aebddd1SJeff Kirsher return NULL; 3209aebddd1SJeff Kirsher } 3219aebddd1SJeff Kirsher 3229aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3239aebddd1SJeff Kirsher { 3249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3259aebddd1SJeff Kirsher 3269aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3279aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3289aebddd1SJeff Kirsher 3299aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3309aebddd1SJeff Kirsher } 3319aebddd1SJeff Kirsher 3329aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3339aebddd1SJeff Kirsher { 334a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 335a323d9bfSSathya Perla 3369aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 337a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 338a323d9bfSSathya Perla 339a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3409aebddd1SJeff Kirsher } 3419aebddd1SJeff Kirsher 34210ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3439aebddd1SJeff Kirsher { 3449aebddd1SJeff Kirsher struct be_mcc_compl *compl; 34510ef9ab4SSathya Perla int num = 0, status = 0; 3469aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3479aebddd1SJeff Kirsher 348072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3499aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3509aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3519aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3529aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3539aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3549aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3559aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3569aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3579aebddd1SJeff Kirsher compl->flags, compl); 358bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 359bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 360bc0c3405SAjit Khaparde compl->flags, compl); 3619aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 36210ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3639aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3649aebddd1SJeff Kirsher } 3659aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3669aebddd1SJeff Kirsher num++; 3679aebddd1SJeff Kirsher } 3689aebddd1SJeff Kirsher 36910ef9ab4SSathya Perla if (num) 37010ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 37110ef9ab4SSathya Perla 372072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 37310ef9ab4SSathya Perla return status; 3749aebddd1SJeff Kirsher } 3759aebddd1SJeff Kirsher 3769aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3779aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3789aebddd1SJeff Kirsher { 3799aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 38010ef9ab4SSathya Perla int i, status = 0; 3819aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3829aebddd1SJeff Kirsher 3836589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 3846589ade0SSathya Perla if (be_error(adapter)) 3859aebddd1SJeff Kirsher return -EIO; 3869aebddd1SJeff Kirsher 387072a9c48SAmerigo Wang local_bh_disable(); 38810ef9ab4SSathya Perla status = be_process_mcc(adapter); 389072a9c48SAmerigo Wang local_bh_enable(); 3909aebddd1SJeff Kirsher 3919aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 3929aebddd1SJeff Kirsher break; 3939aebddd1SJeff Kirsher udelay(100); 3949aebddd1SJeff Kirsher } 3959aebddd1SJeff Kirsher if (i == mcc_timeout) { 3966589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 3976589ade0SSathya Perla adapter->fw_timeout = true; 398652bf646SPadmanabh Ratnakar return -EIO; 3999aebddd1SJeff Kirsher } 4009aebddd1SJeff Kirsher return status; 4019aebddd1SJeff Kirsher } 4029aebddd1SJeff Kirsher 4039aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4049aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4059aebddd1SJeff Kirsher { 406652bf646SPadmanabh Ratnakar int status; 407652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 408652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 409652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 410652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 411652bf646SPadmanabh Ratnakar 412652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 413652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 414652bf646SPadmanabh Ratnakar 415652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 416652bf646SPadmanabh Ratnakar 4179aebddd1SJeff Kirsher be_mcc_notify(adapter); 418652bf646SPadmanabh Ratnakar 419652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 420652bf646SPadmanabh Ratnakar if (status == -EIO) 421652bf646SPadmanabh Ratnakar goto out; 422652bf646SPadmanabh Ratnakar 423652bf646SPadmanabh Ratnakar status = resp->status; 424652bf646SPadmanabh Ratnakar out: 425652bf646SPadmanabh Ratnakar return status; 4269aebddd1SJeff Kirsher } 4279aebddd1SJeff Kirsher 4289aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4299aebddd1SJeff Kirsher { 4309aebddd1SJeff Kirsher int msecs = 0; 4319aebddd1SJeff Kirsher u32 ready; 4329aebddd1SJeff Kirsher 4336589ade0SSathya Perla do { 4346589ade0SSathya Perla if (be_error(adapter)) 4359aebddd1SJeff Kirsher return -EIO; 4369aebddd1SJeff Kirsher 4379aebddd1SJeff Kirsher ready = ioread32(db); 438434b3648SSathya Perla if (ready == 0xffffffff) 4399aebddd1SJeff Kirsher return -1; 4409aebddd1SJeff Kirsher 4419aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4429aebddd1SJeff Kirsher if (ready) 4439aebddd1SJeff Kirsher break; 4449aebddd1SJeff Kirsher 4459aebddd1SJeff Kirsher if (msecs > 4000) { 4466589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4476589ade0SSathya Perla adapter->fw_timeout = true; 448f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4499aebddd1SJeff Kirsher return -1; 4509aebddd1SJeff Kirsher } 4519aebddd1SJeff Kirsher 4529aebddd1SJeff Kirsher msleep(1); 4539aebddd1SJeff Kirsher msecs++; 4549aebddd1SJeff Kirsher } while (true); 4559aebddd1SJeff Kirsher 4569aebddd1SJeff Kirsher return 0; 4579aebddd1SJeff Kirsher } 4589aebddd1SJeff Kirsher 4599aebddd1SJeff Kirsher /* 4609aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4619aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4629aebddd1SJeff Kirsher */ 4639aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4649aebddd1SJeff Kirsher { 4659aebddd1SJeff Kirsher int status; 4669aebddd1SJeff Kirsher u32 val = 0; 4679aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4689aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4699aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4709aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4719aebddd1SJeff Kirsher 4729aebddd1SJeff Kirsher /* wait for ready to be set */ 4739aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4749aebddd1SJeff Kirsher if (status != 0) 4759aebddd1SJeff Kirsher return status; 4769aebddd1SJeff Kirsher 4779aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4789aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4799aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4809aebddd1SJeff Kirsher iowrite32(val, db); 4819aebddd1SJeff Kirsher 4829aebddd1SJeff Kirsher /* wait for ready to be set */ 4839aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4849aebddd1SJeff Kirsher if (status != 0) 4859aebddd1SJeff Kirsher return status; 4869aebddd1SJeff Kirsher 4879aebddd1SJeff Kirsher val = 0; 4889aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 4899aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 4909aebddd1SJeff Kirsher iowrite32(val, db); 4919aebddd1SJeff Kirsher 4929aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4939aebddd1SJeff Kirsher if (status != 0) 4949aebddd1SJeff Kirsher return status; 4959aebddd1SJeff Kirsher 4969aebddd1SJeff Kirsher /* A cq entry has been made now */ 4979aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 4989aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 4999aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5009aebddd1SJeff Kirsher if (status) 5019aebddd1SJeff Kirsher return status; 5029aebddd1SJeff Kirsher } else { 5039aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5049aebddd1SJeff Kirsher return -1; 5059aebddd1SJeff Kirsher } 5069aebddd1SJeff Kirsher return 0; 5079aebddd1SJeff Kirsher } 5089aebddd1SJeff Kirsher 509c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5109aebddd1SJeff Kirsher { 5119aebddd1SJeff Kirsher u32 sem; 5129aebddd1SJeff Kirsher 513c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 514c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5159aebddd1SJeff Kirsher else 516c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 517c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 518c5b3ad4cSSathya Perla 519c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5209aebddd1SJeff Kirsher } 5219aebddd1SJeff Kirsher 522bf99e50dSPadmanabh Ratnakar int lancer_wait_ready(struct be_adapter *adapter) 523bf99e50dSPadmanabh Ratnakar { 524bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 525bf99e50dSPadmanabh Ratnakar u32 sliport_status; 526bf99e50dSPadmanabh Ratnakar int status = 0, i; 527bf99e50dSPadmanabh Ratnakar 528bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 529bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 530bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 531bf99e50dSPadmanabh Ratnakar break; 532bf99e50dSPadmanabh Ratnakar 533bf99e50dSPadmanabh Ratnakar msleep(1000); 534bf99e50dSPadmanabh Ratnakar } 535bf99e50dSPadmanabh Ratnakar 536bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 537bf99e50dSPadmanabh Ratnakar status = -1; 538bf99e50dSPadmanabh Ratnakar 539bf99e50dSPadmanabh Ratnakar return status; 540bf99e50dSPadmanabh Ratnakar } 541bf99e50dSPadmanabh Ratnakar 54267297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 54367297ad8SPadmanabh Ratnakar { 54467297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 54567297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 54667297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 54767297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 54867297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 54967297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 55067297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 55167297ad8SPadmanabh Ratnakar 55267297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 55367297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 55467297ad8SPadmanabh Ratnakar return true; 55567297ad8SPadmanabh Ratnakar } 55667297ad8SPadmanabh Ratnakar return false; 55767297ad8SPadmanabh Ratnakar } 55867297ad8SPadmanabh Ratnakar 559bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 560bf99e50dSPadmanabh Ratnakar { 561bf99e50dSPadmanabh Ratnakar int status; 562bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 56367297ad8SPadmanabh Ratnakar bool resource_error; 56467297ad8SPadmanabh Ratnakar 56567297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 56667297ad8SPadmanabh Ratnakar if (resource_error) 56701e5b2c4SSomnath Kotur return -EAGAIN; 56867297ad8SPadmanabh Ratnakar 569bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 570bf99e50dSPadmanabh Ratnakar if (!status) { 571bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 572bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 573bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 574bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 575bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 576bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 577bf99e50dSPadmanabh Ratnakar 578bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 579bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 580bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 581bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 582bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 583bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 584bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 585bf99e50dSPadmanabh Ratnakar status = -1; 586bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 587bf99e50dSPadmanabh Ratnakar status = -1; 588bf99e50dSPadmanabh Ratnakar } 589bf99e50dSPadmanabh Ratnakar } 59067297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 59167297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 59267297ad8SPadmanabh Ratnakar * when PF provisions resources. 59367297ad8SPadmanabh Ratnakar */ 59467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 59501e5b2c4SSomnath Kotur if (resource_error) 59601e5b2c4SSomnath Kotur status = -EAGAIN; 59767297ad8SPadmanabh Ratnakar 598bf99e50dSPadmanabh Ratnakar return status; 599bf99e50dSPadmanabh Ratnakar } 600bf99e50dSPadmanabh Ratnakar 601bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6029aebddd1SJeff Kirsher { 6039aebddd1SJeff Kirsher u16 stage; 6049aebddd1SJeff Kirsher int status, timeout = 0; 6059aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6069aebddd1SJeff Kirsher 607bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 608bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 609bf99e50dSPadmanabh Ratnakar return status; 610bf99e50dSPadmanabh Ratnakar } 611bf99e50dSPadmanabh Ratnakar 6129aebddd1SJeff Kirsher do { 613c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 61466d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 61566d29cbcSGavin Shan return 0; 61666d29cbcSGavin Shan 61766d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 61866d29cbcSGavin Shan timeout); 6199aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6209aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6219aebddd1SJeff Kirsher return -EINTR; 6229aebddd1SJeff Kirsher } 6239aebddd1SJeff Kirsher timeout += 2; 6243ab81b5fSSomnath Kotur } while (timeout < 60); 6259aebddd1SJeff Kirsher 6269aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6279aebddd1SJeff Kirsher return -1; 6289aebddd1SJeff Kirsher } 6299aebddd1SJeff Kirsher 6309aebddd1SJeff Kirsher 6319aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6329aebddd1SJeff Kirsher { 6339aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6349aebddd1SJeff Kirsher } 6359aebddd1SJeff Kirsher 6369aebddd1SJeff Kirsher 6379aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 638106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 639106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 640106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 641106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6429aebddd1SJeff Kirsher { 643106df1e3SSomnath Kotur struct be_sge *sge; 644652bf646SPadmanabh Ratnakar unsigned long addr = (unsigned long)req_hdr; 645652bf646SPadmanabh Ratnakar u64 req_addr = addr; 646106df1e3SSomnath Kotur 6479aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6489aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6499aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6509aebddd1SJeff Kirsher req_hdr->version = 0; 651106df1e3SSomnath Kotur 652652bf646SPadmanabh Ratnakar wrb->tag0 = req_addr & 0xFFFFFFFF; 653652bf646SPadmanabh Ratnakar wrb->tag1 = upper_32_bits(req_addr); 654652bf646SPadmanabh Ratnakar 655106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 656106df1e3SSomnath Kotur if (mem) { 657106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 658106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 659106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 660106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 661106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 662106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 663106df1e3SSomnath Kotur } else 664106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 665106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6669aebddd1SJeff Kirsher } 6679aebddd1SJeff Kirsher 6689aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6699aebddd1SJeff Kirsher struct be_dma_mem *mem) 6709aebddd1SJeff Kirsher { 6719aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6729aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6739aebddd1SJeff Kirsher 6749aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6759aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6769aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6779aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6789aebddd1SJeff Kirsher } 6799aebddd1SJeff Kirsher } 6809aebddd1SJeff Kirsher 6819aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 6829aebddd1SJeff Kirsher { 6839aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 6859aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 6869aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 6879aebddd1SJeff Kirsher return wrb; 6889aebddd1SJeff Kirsher } 6899aebddd1SJeff Kirsher 6909aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 6919aebddd1SJeff Kirsher { 6929aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 6939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6949aebddd1SJeff Kirsher 695aa790db9SPadmanabh Ratnakar if (!mccq->created) 696aa790db9SPadmanabh Ratnakar return NULL; 697aa790db9SPadmanabh Ratnakar 6984d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 6999aebddd1SJeff Kirsher return NULL; 7009aebddd1SJeff Kirsher 7019aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7029aebddd1SJeff Kirsher queue_head_inc(mccq); 7039aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7049aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7059aebddd1SJeff Kirsher return wrb; 7069aebddd1SJeff Kirsher } 7079aebddd1SJeff Kirsher 7089aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7099aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7109aebddd1SJeff Kirsher */ 7119aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 7129aebddd1SJeff Kirsher { 7139aebddd1SJeff Kirsher u8 *wrb; 7149aebddd1SJeff Kirsher int status; 7159aebddd1SJeff Kirsher 716bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 717bf99e50dSPadmanabh Ratnakar return 0; 718bf99e50dSPadmanabh Ratnakar 7199aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7209aebddd1SJeff Kirsher return -1; 7219aebddd1SJeff Kirsher 7229aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7239aebddd1SJeff Kirsher *wrb++ = 0xFF; 7249aebddd1SJeff Kirsher *wrb++ = 0x12; 7259aebddd1SJeff Kirsher *wrb++ = 0x34; 7269aebddd1SJeff Kirsher *wrb++ = 0xFF; 7279aebddd1SJeff Kirsher *wrb++ = 0xFF; 7289aebddd1SJeff Kirsher *wrb++ = 0x56; 7299aebddd1SJeff Kirsher *wrb++ = 0x78; 7309aebddd1SJeff Kirsher *wrb = 0xFF; 7319aebddd1SJeff Kirsher 7329aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 7339aebddd1SJeff Kirsher 7349aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 7359aebddd1SJeff Kirsher return status; 7369aebddd1SJeff Kirsher } 7379aebddd1SJeff Kirsher 7389aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 7399aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7409aebddd1SJeff Kirsher */ 7419aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 7429aebddd1SJeff Kirsher { 7439aebddd1SJeff Kirsher u8 *wrb; 7449aebddd1SJeff Kirsher int status; 7459aebddd1SJeff Kirsher 746bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 747bf99e50dSPadmanabh Ratnakar return 0; 748bf99e50dSPadmanabh Ratnakar 7499aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7509aebddd1SJeff Kirsher return -1; 7519aebddd1SJeff Kirsher 7529aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7539aebddd1SJeff Kirsher *wrb++ = 0xFF; 7549aebddd1SJeff Kirsher *wrb++ = 0xAA; 7559aebddd1SJeff Kirsher *wrb++ = 0xBB; 7569aebddd1SJeff Kirsher *wrb++ = 0xFF; 7579aebddd1SJeff Kirsher *wrb++ = 0xFF; 7589aebddd1SJeff Kirsher *wrb++ = 0xCC; 7599aebddd1SJeff Kirsher *wrb++ = 0xDD; 7609aebddd1SJeff Kirsher *wrb = 0xFF; 7619aebddd1SJeff Kirsher 7629aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 7639aebddd1SJeff Kirsher 7649aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 7659aebddd1SJeff Kirsher return status; 7669aebddd1SJeff Kirsher } 767bf99e50dSPadmanabh Ratnakar 768f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 7699aebddd1SJeff Kirsher { 7709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 7719aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 772f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 773f2f781a7SSathya Perla int status, ver = 0; 7749aebddd1SJeff Kirsher 7759aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7769aebddd1SJeff Kirsher return -1; 7779aebddd1SJeff Kirsher 7789aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 7799aebddd1SJeff Kirsher req = embedded_payload(wrb); 7809aebddd1SJeff Kirsher 781106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 782106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 7839aebddd1SJeff Kirsher 784f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 785f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 786f2f781a7SSathya Perla ver = 2; 787f2f781a7SSathya Perla 788f2f781a7SSathya Perla req->hdr.version = ver; 7899aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 7909aebddd1SJeff Kirsher 7919aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 7929aebddd1SJeff Kirsher /* 4byte eqe*/ 7939aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 7949aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 795f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 7969aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 7979aebddd1SJeff Kirsher 7989aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 7999aebddd1SJeff Kirsher 8009aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8019aebddd1SJeff Kirsher if (!status) { 8029aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 803f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 804f2f781a7SSathya Perla eqo->msix_idx = 805f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 806f2f781a7SSathya Perla eqo->q.created = true; 8079aebddd1SJeff Kirsher } 8089aebddd1SJeff Kirsher 8099aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8109aebddd1SJeff Kirsher return status; 8119aebddd1SJeff Kirsher } 8129aebddd1SJeff Kirsher 813f9449ab7SSathya Perla /* Use MCC */ 8149aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 8155ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 8169aebddd1SJeff Kirsher { 8179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8189aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 8199aebddd1SJeff Kirsher int status; 8209aebddd1SJeff Kirsher 821f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 8229aebddd1SJeff Kirsher 823f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 824f9449ab7SSathya Perla if (!wrb) { 825f9449ab7SSathya Perla status = -EBUSY; 826f9449ab7SSathya Perla goto err; 827f9449ab7SSathya Perla } 8289aebddd1SJeff Kirsher req = embedded_payload(wrb); 8299aebddd1SJeff Kirsher 830106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 831106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 8325ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 8339aebddd1SJeff Kirsher if (permanent) { 8349aebddd1SJeff Kirsher req->permanent = 1; 8359aebddd1SJeff Kirsher } else { 8369aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 837590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 8389aebddd1SJeff Kirsher req->permanent = 0; 8399aebddd1SJeff Kirsher } 8409aebddd1SJeff Kirsher 841f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 8429aebddd1SJeff Kirsher if (!status) { 8439aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 8449aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 8459aebddd1SJeff Kirsher } 8469aebddd1SJeff Kirsher 847f9449ab7SSathya Perla err: 848f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 8499aebddd1SJeff Kirsher return status; 8509aebddd1SJeff Kirsher } 8519aebddd1SJeff Kirsher 8529aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 8539aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 8549aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 8559aebddd1SJeff Kirsher { 8569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8579aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 8589aebddd1SJeff Kirsher int status; 8599aebddd1SJeff Kirsher 8609aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 8619aebddd1SJeff Kirsher 8629aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 8639aebddd1SJeff Kirsher if (!wrb) { 8649aebddd1SJeff Kirsher status = -EBUSY; 8659aebddd1SJeff Kirsher goto err; 8669aebddd1SJeff Kirsher } 8679aebddd1SJeff Kirsher req = embedded_payload(wrb); 8689aebddd1SJeff Kirsher 869106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 870106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 8719aebddd1SJeff Kirsher 8729aebddd1SJeff Kirsher req->hdr.domain = domain; 8739aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 8749aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 8759aebddd1SJeff Kirsher 8769aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 8779aebddd1SJeff Kirsher if (!status) { 8789aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 8799aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 8809aebddd1SJeff Kirsher } 8819aebddd1SJeff Kirsher 8829aebddd1SJeff Kirsher err: 8839aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 884e3a7ae2cSSomnath Kotur 885e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 886e3a7ae2cSSomnath Kotur status = -EPERM; 887e3a7ae2cSSomnath Kotur 8889aebddd1SJeff Kirsher return status; 8899aebddd1SJeff Kirsher } 8909aebddd1SJeff Kirsher 8919aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 89230128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 8939aebddd1SJeff Kirsher { 8949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8959aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 8969aebddd1SJeff Kirsher int status; 8979aebddd1SJeff Kirsher 89830128031SSathya Perla if (pmac_id == -1) 89930128031SSathya Perla return 0; 90030128031SSathya Perla 9019aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9029aebddd1SJeff Kirsher 9039aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9049aebddd1SJeff Kirsher if (!wrb) { 9059aebddd1SJeff Kirsher status = -EBUSY; 9069aebddd1SJeff Kirsher goto err; 9079aebddd1SJeff Kirsher } 9089aebddd1SJeff Kirsher req = embedded_payload(wrb); 9099aebddd1SJeff Kirsher 910106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 911106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 9129aebddd1SJeff Kirsher 9139aebddd1SJeff Kirsher req->hdr.domain = dom; 9149aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9159aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 9169aebddd1SJeff Kirsher 9179aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9189aebddd1SJeff Kirsher 9199aebddd1SJeff Kirsher err: 9209aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 9219aebddd1SJeff Kirsher return status; 9229aebddd1SJeff Kirsher } 9239aebddd1SJeff Kirsher 9249aebddd1SJeff Kirsher /* Uses Mbox */ 92510ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 92610ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 9279aebddd1SJeff Kirsher { 9289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9299aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 9309aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 9319aebddd1SJeff Kirsher void *ctxt; 9329aebddd1SJeff Kirsher int status; 9339aebddd1SJeff Kirsher 9349aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 9359aebddd1SJeff Kirsher return -1; 9369aebddd1SJeff Kirsher 9379aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 9389aebddd1SJeff Kirsher req = embedded_payload(wrb); 9399aebddd1SJeff Kirsher ctxt = &req->context; 9409aebddd1SJeff Kirsher 941106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 942106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 9439aebddd1SJeff Kirsher 9449aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 945bbdc42f8SAjit Khaparde 946bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 9479aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 9489aebddd1SJeff Kirsher coalesce_wm); 9499aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 9509aebddd1SJeff Kirsher ctxt, no_delay); 9519aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 9529aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 9539aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 9549aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 9559aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 956bbdc42f8SAjit Khaparde } else { 957bbdc42f8SAjit Khaparde req->hdr.version = 2; 958bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 959bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 960bbdc42f8SAjit Khaparde no_delay); 961bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 962bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 963bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 964bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 965bbdc42f8SAjit Khaparde ctxt, 1); 966bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 967bbdc42f8SAjit Khaparde ctxt, eq->id); 9689aebddd1SJeff Kirsher } 9699aebddd1SJeff Kirsher 9709aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 9719aebddd1SJeff Kirsher 9729aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 9739aebddd1SJeff Kirsher 9749aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 9759aebddd1SJeff Kirsher if (!status) { 9769aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 9779aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 9789aebddd1SJeff Kirsher cq->created = true; 9799aebddd1SJeff Kirsher } 9809aebddd1SJeff Kirsher 9819aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 9829aebddd1SJeff Kirsher 9839aebddd1SJeff Kirsher return status; 9849aebddd1SJeff Kirsher } 9859aebddd1SJeff Kirsher 9869aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 9879aebddd1SJeff Kirsher { 9889aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 9899aebddd1SJeff Kirsher if (len_encoded == 16) 9909aebddd1SJeff Kirsher len_encoded = 0; 9919aebddd1SJeff Kirsher return len_encoded; 9929aebddd1SJeff Kirsher } 9939aebddd1SJeff Kirsher 9944188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 9959aebddd1SJeff Kirsher struct be_queue_info *mccq, 9969aebddd1SJeff Kirsher struct be_queue_info *cq) 9979aebddd1SJeff Kirsher { 9989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9999aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10009aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10019aebddd1SJeff Kirsher void *ctxt; 10029aebddd1SJeff Kirsher int status; 10039aebddd1SJeff Kirsher 10049aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10059aebddd1SJeff Kirsher return -1; 10069aebddd1SJeff Kirsher 10079aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10089aebddd1SJeff Kirsher req = embedded_payload(wrb); 10099aebddd1SJeff Kirsher ctxt = &req->context; 10109aebddd1SJeff Kirsher 1011106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1012106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 10139aebddd1SJeff Kirsher 10149aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10159aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 10169aebddd1SJeff Kirsher req->hdr.version = 1; 10179aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq->id); 10189aebddd1SJeff Kirsher 10199aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt, 10209aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10219aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1); 10229aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id, 10239aebddd1SJeff Kirsher ctxt, cq->id); 10249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid, 10259aebddd1SJeff Kirsher ctxt, 1); 10269aebddd1SJeff Kirsher 10279aebddd1SJeff Kirsher } else { 10289aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 10299aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 10309aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10319aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 10329aebddd1SJeff Kirsher } 10339aebddd1SJeff Kirsher 10349aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 10359aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1036bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 10379aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10389aebddd1SJeff Kirsher 10399aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10409aebddd1SJeff Kirsher 10419aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10429aebddd1SJeff Kirsher if (!status) { 10439aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 10449aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 10459aebddd1SJeff Kirsher mccq->created = true; 10469aebddd1SJeff Kirsher } 10479aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10489aebddd1SJeff Kirsher 10499aebddd1SJeff Kirsher return status; 10509aebddd1SJeff Kirsher } 10519aebddd1SJeff Kirsher 10524188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 10539aebddd1SJeff Kirsher struct be_queue_info *mccq, 10549aebddd1SJeff Kirsher struct be_queue_info *cq) 10559aebddd1SJeff Kirsher { 10569aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10579aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 10589aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10599aebddd1SJeff Kirsher void *ctxt; 10609aebddd1SJeff Kirsher int status; 10619aebddd1SJeff Kirsher 10629aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10639aebddd1SJeff Kirsher return -1; 10649aebddd1SJeff Kirsher 10659aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10669aebddd1SJeff Kirsher req = embedded_payload(wrb); 10679aebddd1SJeff Kirsher ctxt = &req->context; 10689aebddd1SJeff Kirsher 1069106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1070106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 10719aebddd1SJeff Kirsher 10729aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10739aebddd1SJeff Kirsher 10749aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 10759aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 10769aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10779aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 10789aebddd1SJeff Kirsher 10799aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10809aebddd1SJeff Kirsher 10819aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10829aebddd1SJeff Kirsher 10839aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10849aebddd1SJeff Kirsher if (!status) { 10859aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 10869aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 10879aebddd1SJeff Kirsher mccq->created = true; 10889aebddd1SJeff Kirsher } 10899aebddd1SJeff Kirsher 10909aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10919aebddd1SJeff Kirsher return status; 10929aebddd1SJeff Kirsher } 10939aebddd1SJeff Kirsher 10949aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 10959aebddd1SJeff Kirsher struct be_queue_info *mccq, 10969aebddd1SJeff Kirsher struct be_queue_info *cq) 10979aebddd1SJeff Kirsher { 10989aebddd1SJeff Kirsher int status; 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 11019aebddd1SJeff Kirsher if (status && !lancer_chip(adapter)) { 11029aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11039aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11049aebddd1SJeff Kirsher "and FCoE traffic"); 11059aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 11069aebddd1SJeff Kirsher } 11079aebddd1SJeff Kirsher return status; 11089aebddd1SJeff Kirsher } 11099aebddd1SJeff Kirsher 111094d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 11119aebddd1SJeff Kirsher { 11129aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11139aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 111494d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 111594d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 11169aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 111794d73aaaSVasundhara Volam int status, ver = 0; 11189aebddd1SJeff Kirsher 1119293c4a7dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 11209aebddd1SJeff Kirsher 1121293c4a7dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 1122293c4a7dSPadmanabh Ratnakar if (!wrb) { 1123293c4a7dSPadmanabh Ratnakar status = -EBUSY; 1124293c4a7dSPadmanabh Ratnakar goto err; 1125293c4a7dSPadmanabh Ratnakar } 1126293c4a7dSPadmanabh Ratnakar 11279aebddd1SJeff Kirsher req = embedded_payload(wrb); 11289aebddd1SJeff Kirsher 1129106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1130106df1e3SSomnath Kotur OPCODE_ETH_TX_CREATE, sizeof(*req), wrb, NULL); 11319aebddd1SJeff Kirsher 11329aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 11339aebddd1SJeff Kirsher req->hdr.version = 1; 113494d73aaaSVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 113594d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 113694d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 113794d73aaaSVasundhara Volam req->hdr.version = 2; 113894d73aaaSVasundhara Volam } else { /* For SH */ 113994d73aaaSVasundhara Volam req->hdr.version = 2; 11409aebddd1SJeff Kirsher } 11419aebddd1SJeff Kirsher 11429aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 11439aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 11449aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 114594d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 114694d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 11479aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11489aebddd1SJeff Kirsher 114994d73aaaSVasundhara Volam ver = req->hdr.version; 115094d73aaaSVasundhara Volam 1151293c4a7dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 11529aebddd1SJeff Kirsher if (!status) { 11539aebddd1SJeff Kirsher struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); 11549aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 115594d73aaaSVasundhara Volam if (ver == 2) 115694d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 115794d73aaaSVasundhara Volam else 115894d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 11599aebddd1SJeff Kirsher txq->created = true; 11609aebddd1SJeff Kirsher } 11619aebddd1SJeff Kirsher 1162293c4a7dSPadmanabh Ratnakar err: 1163293c4a7dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 11649aebddd1SJeff Kirsher 11659aebddd1SJeff Kirsher return status; 11669aebddd1SJeff Kirsher } 11679aebddd1SJeff Kirsher 11689aebddd1SJeff Kirsher /* Uses MCC */ 11699aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 11709aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 117110ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 11729aebddd1SJeff Kirsher { 11739aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11749aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 11759aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 11769aebddd1SJeff Kirsher int status; 11779aebddd1SJeff Kirsher 11789aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 11799aebddd1SJeff Kirsher 11809aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 11819aebddd1SJeff Kirsher if (!wrb) { 11829aebddd1SJeff Kirsher status = -EBUSY; 11839aebddd1SJeff Kirsher goto err; 11849aebddd1SJeff Kirsher } 11859aebddd1SJeff Kirsher req = embedded_payload(wrb); 11869aebddd1SJeff Kirsher 1187106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1188106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 11899aebddd1SJeff Kirsher 11909aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 11919aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 11929aebddd1SJeff Kirsher req->num_pages = 2; 11939aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11949aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 119510ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 11969aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 11979aebddd1SJeff Kirsher 11989aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 11999aebddd1SJeff Kirsher if (!status) { 12009aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12019aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12029aebddd1SJeff Kirsher rxq->created = true; 12039aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12049aebddd1SJeff Kirsher } 12059aebddd1SJeff Kirsher 12069aebddd1SJeff Kirsher err: 12079aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12089aebddd1SJeff Kirsher return status; 12099aebddd1SJeff Kirsher } 12109aebddd1SJeff Kirsher 12119aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12129aebddd1SJeff Kirsher * Uses Mbox 12139aebddd1SJeff Kirsher */ 12149aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12159aebddd1SJeff Kirsher int queue_type) 12169aebddd1SJeff Kirsher { 12179aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12189aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12199aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 12209aebddd1SJeff Kirsher int status; 12219aebddd1SJeff Kirsher 12229aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12239aebddd1SJeff Kirsher return -1; 12249aebddd1SJeff Kirsher 12259aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12269aebddd1SJeff Kirsher req = embedded_payload(wrb); 12279aebddd1SJeff Kirsher 12289aebddd1SJeff Kirsher switch (queue_type) { 12299aebddd1SJeff Kirsher case QTYPE_EQ: 12309aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12319aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 12329aebddd1SJeff Kirsher break; 12339aebddd1SJeff Kirsher case QTYPE_CQ: 12349aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12359aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 12369aebddd1SJeff Kirsher break; 12379aebddd1SJeff Kirsher case QTYPE_TXQ: 12389aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 12399aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 12409aebddd1SJeff Kirsher break; 12419aebddd1SJeff Kirsher case QTYPE_RXQ: 12429aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 12439aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 12449aebddd1SJeff Kirsher break; 12459aebddd1SJeff Kirsher case QTYPE_MCCQ: 12469aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12479aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 12489aebddd1SJeff Kirsher break; 12499aebddd1SJeff Kirsher default: 12509aebddd1SJeff Kirsher BUG(); 12519aebddd1SJeff Kirsher } 12529aebddd1SJeff Kirsher 1253106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1254106df1e3SSomnath Kotur NULL); 12559aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 12569aebddd1SJeff Kirsher 12579aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 12589aebddd1SJeff Kirsher q->created = false; 12599aebddd1SJeff Kirsher 12609aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 12619aebddd1SJeff Kirsher return status; 12629aebddd1SJeff Kirsher } 12639aebddd1SJeff Kirsher 12649aebddd1SJeff Kirsher /* Uses MCC */ 12659aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 12669aebddd1SJeff Kirsher { 12679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12689aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12699aebddd1SJeff Kirsher int status; 12709aebddd1SJeff Kirsher 12719aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12729aebddd1SJeff Kirsher 12739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12749aebddd1SJeff Kirsher if (!wrb) { 12759aebddd1SJeff Kirsher status = -EBUSY; 12769aebddd1SJeff Kirsher goto err; 12779aebddd1SJeff Kirsher } 12789aebddd1SJeff Kirsher req = embedded_payload(wrb); 12799aebddd1SJeff Kirsher 1280106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1281106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 12829aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 12839aebddd1SJeff Kirsher 12849aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12859aebddd1SJeff Kirsher q->created = false; 12869aebddd1SJeff Kirsher 12879aebddd1SJeff Kirsher err: 12889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12899aebddd1SJeff Kirsher return status; 12909aebddd1SJeff Kirsher } 12919aebddd1SJeff Kirsher 12929aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1293f9449ab7SSathya Perla * Uses MCCQ 12949aebddd1SJeff Kirsher */ 12959aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 12961578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 12979aebddd1SJeff Kirsher { 12989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12999aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13009aebddd1SJeff Kirsher int status; 13019aebddd1SJeff Kirsher 1302f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 13039aebddd1SJeff Kirsher 1304f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1305f9449ab7SSathya Perla if (!wrb) { 1306f9449ab7SSathya Perla status = -EBUSY; 1307f9449ab7SSathya Perla goto err; 1308f9449ab7SSathya Perla } 13099aebddd1SJeff Kirsher req = embedded_payload(wrb); 13109aebddd1SJeff Kirsher 1311106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1312106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), wrb, NULL); 13139aebddd1SJeff Kirsher req->hdr.domain = domain; 13149aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13159aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 13161578e777SPadmanabh Ratnakar 1317f9449ab7SSathya Perla req->pmac_invalid = true; 13189aebddd1SJeff Kirsher 1319f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 13209aebddd1SJeff Kirsher if (!status) { 13219aebddd1SJeff Kirsher struct be_cmd_resp_if_create *resp = embedded_payload(wrb); 13229aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1323b5bb9776SSathya Perla 1324b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1325b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1326b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 13279aebddd1SJeff Kirsher } 13289aebddd1SJeff Kirsher 1329f9449ab7SSathya Perla err: 1330f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 13319aebddd1SJeff Kirsher return status; 13329aebddd1SJeff Kirsher } 13339aebddd1SJeff Kirsher 1334f9449ab7SSathya Perla /* Uses MCCQ */ 133530128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 13369aebddd1SJeff Kirsher { 13379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13389aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 13399aebddd1SJeff Kirsher int status; 13409aebddd1SJeff Kirsher 134130128031SSathya Perla if (interface_id == -1) 1342f9449ab7SSathya Perla return 0; 13439aebddd1SJeff Kirsher 1344f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1345f9449ab7SSathya Perla 1346f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1347f9449ab7SSathya Perla if (!wrb) { 1348f9449ab7SSathya Perla status = -EBUSY; 1349f9449ab7SSathya Perla goto err; 1350f9449ab7SSathya Perla } 13519aebddd1SJeff Kirsher req = embedded_payload(wrb); 13529aebddd1SJeff Kirsher 1353106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1354106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 13559aebddd1SJeff Kirsher req->hdr.domain = domain; 13569aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 13579aebddd1SJeff Kirsher 1358f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1359f9449ab7SSathya Perla err: 1360f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 13619aebddd1SJeff Kirsher return status; 13629aebddd1SJeff Kirsher } 13639aebddd1SJeff Kirsher 13649aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 13659aebddd1SJeff Kirsher * WRB but is a separate dma memory block 13669aebddd1SJeff Kirsher * Uses asynchronous MCC 13679aebddd1SJeff Kirsher */ 13689aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 13699aebddd1SJeff Kirsher { 13709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13719aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 13729aebddd1SJeff Kirsher int status = 0; 13739aebddd1SJeff Kirsher 13749aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13759aebddd1SJeff Kirsher 13769aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13779aebddd1SJeff Kirsher if (!wrb) { 13789aebddd1SJeff Kirsher status = -EBUSY; 13799aebddd1SJeff Kirsher goto err; 13809aebddd1SJeff Kirsher } 13819aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 13829aebddd1SJeff Kirsher 1383106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1384106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 13859aebddd1SJeff Kirsher 1386ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1387ca34fe38SSathya Perla if (!BE2_chip(adapter)) 13889aebddd1SJeff Kirsher hdr->version = 1; 13899aebddd1SJeff Kirsher 13909aebddd1SJeff Kirsher be_mcc_notify(adapter); 13919aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 13929aebddd1SJeff Kirsher 13939aebddd1SJeff Kirsher err: 13949aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13959aebddd1SJeff Kirsher return status; 13969aebddd1SJeff Kirsher } 13979aebddd1SJeff Kirsher 13989aebddd1SJeff Kirsher /* Lancer Stats */ 13999aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14009aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14019aebddd1SJeff Kirsher { 14029aebddd1SJeff Kirsher 14039aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14049aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14059aebddd1SJeff Kirsher int status = 0; 14069aebddd1SJeff Kirsher 1407f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1408f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1409f25b119cSPadmanabh Ratnakar return -EPERM; 1410f25b119cSPadmanabh Ratnakar 14119aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14129aebddd1SJeff Kirsher 14139aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14149aebddd1SJeff Kirsher if (!wrb) { 14159aebddd1SJeff Kirsher status = -EBUSY; 14169aebddd1SJeff Kirsher goto err; 14179aebddd1SJeff Kirsher } 14189aebddd1SJeff Kirsher req = nonemb_cmd->va; 14199aebddd1SJeff Kirsher 1420106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1421106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1422106df1e3SSomnath Kotur nonemb_cmd); 14239aebddd1SJeff Kirsher 1424d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 14259aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 14269aebddd1SJeff Kirsher 14279aebddd1SJeff Kirsher be_mcc_notify(adapter); 14289aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14299aebddd1SJeff Kirsher 14309aebddd1SJeff Kirsher err: 14319aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14329aebddd1SJeff Kirsher return status; 14339aebddd1SJeff Kirsher } 14349aebddd1SJeff Kirsher 1435323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1436323ff71eSSathya Perla { 1437323ff71eSSathya Perla switch (mac_speed) { 1438323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1439323ff71eSSathya Perla return 0; 1440323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1441323ff71eSSathya Perla return 10; 1442323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1443323ff71eSSathya Perla return 100; 1444323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1445323ff71eSSathya Perla return 1000; 1446323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1447323ff71eSSathya Perla return 10000; 1448b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1449b971f847SVasundhara Volam return 20000; 1450b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1451b971f847SVasundhara Volam return 25000; 1452b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1453b971f847SVasundhara Volam return 40000; 1454323ff71eSSathya Perla } 1455323ff71eSSathya Perla return 0; 1456323ff71eSSathya Perla } 1457323ff71eSSathya Perla 1458323ff71eSSathya Perla /* Uses synchronous mcc 1459323ff71eSSathya Perla * Returns link_speed in Mbps 1460323ff71eSSathya Perla */ 1461323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1462323ff71eSSathya Perla u8 *link_status, u32 dom) 14639aebddd1SJeff Kirsher { 14649aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14659aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 14669aebddd1SJeff Kirsher int status; 14679aebddd1SJeff Kirsher 14689aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14699aebddd1SJeff Kirsher 1470b236916aSAjit Khaparde if (link_status) 1471b236916aSAjit Khaparde *link_status = LINK_DOWN; 1472b236916aSAjit Khaparde 14739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14749aebddd1SJeff Kirsher if (!wrb) { 14759aebddd1SJeff Kirsher status = -EBUSY; 14769aebddd1SJeff Kirsher goto err; 14779aebddd1SJeff Kirsher } 14789aebddd1SJeff Kirsher req = embedded_payload(wrb); 14799aebddd1SJeff Kirsher 148057cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 148157cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 148257cd80d4SPadmanabh Ratnakar 1483ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1484ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1485daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1486daad6167SPadmanabh Ratnakar 148757cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 14889aebddd1SJeff Kirsher 14899aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 14909aebddd1SJeff Kirsher if (!status) { 14919aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1492323ff71eSSathya Perla if (link_speed) { 1493323ff71eSSathya Perla *link_speed = resp->link_speed ? 1494323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1495323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1496323ff71eSSathya Perla 1497323ff71eSSathya Perla if (!resp->logical_link_status) 1498323ff71eSSathya Perla *link_speed = 0; 14999aebddd1SJeff Kirsher } 1500b236916aSAjit Khaparde if (link_status) 1501b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15029aebddd1SJeff Kirsher } 15039aebddd1SJeff Kirsher 15049aebddd1SJeff Kirsher err: 15059aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15069aebddd1SJeff Kirsher return status; 15079aebddd1SJeff Kirsher } 15089aebddd1SJeff Kirsher 15099aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15109aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15119aebddd1SJeff Kirsher { 15129aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15139aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1514117affe3SVasundhara Volam int status = 0; 15159aebddd1SJeff Kirsher 15169aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15179aebddd1SJeff Kirsher 15189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15199aebddd1SJeff Kirsher if (!wrb) { 15209aebddd1SJeff Kirsher status = -EBUSY; 15219aebddd1SJeff Kirsher goto err; 15229aebddd1SJeff Kirsher } 15239aebddd1SJeff Kirsher req = embedded_payload(wrb); 15249aebddd1SJeff Kirsher 1525106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1526106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1527106df1e3SSomnath Kotur wrb, NULL); 15289aebddd1SJeff Kirsher 15293de09455SSomnath Kotur be_mcc_notify(adapter); 15309aebddd1SJeff Kirsher 15319aebddd1SJeff Kirsher err: 15329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15339aebddd1SJeff Kirsher return status; 15349aebddd1SJeff Kirsher } 15359aebddd1SJeff Kirsher 15369aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15379aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 15389aebddd1SJeff Kirsher { 15399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15409aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15419aebddd1SJeff Kirsher int status; 15429aebddd1SJeff Kirsher 15439aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15449aebddd1SJeff Kirsher 15459aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15469aebddd1SJeff Kirsher if (!wrb) { 15479aebddd1SJeff Kirsher status = -EBUSY; 15489aebddd1SJeff Kirsher goto err; 15499aebddd1SJeff Kirsher } 15509aebddd1SJeff Kirsher req = embedded_payload(wrb); 15519aebddd1SJeff Kirsher 1552106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1553106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 15549aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 15559aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15569aebddd1SJeff Kirsher if (!status) { 15579aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 15589aebddd1SJeff Kirsher if (log_size && resp->log_size) 15599aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 15609aebddd1SJeff Kirsher sizeof(u32); 15619aebddd1SJeff Kirsher } 15629aebddd1SJeff Kirsher err: 15639aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15649aebddd1SJeff Kirsher return status; 15659aebddd1SJeff Kirsher } 15669aebddd1SJeff Kirsher 15679aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 15689aebddd1SJeff Kirsher { 15699aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 15709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15719aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15729aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 15739aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 15749aebddd1SJeff Kirsher int status; 15759aebddd1SJeff Kirsher 15769aebddd1SJeff Kirsher if (buf_len == 0) 15779aebddd1SJeff Kirsher return; 15789aebddd1SJeff Kirsher 15799aebddd1SJeff Kirsher total_size = buf_len; 15809aebddd1SJeff Kirsher 15819aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 15829aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 15839aebddd1SJeff Kirsher get_fat_cmd.size, 15849aebddd1SJeff Kirsher &get_fat_cmd.dma); 15859aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 15869aebddd1SJeff Kirsher status = -ENOMEM; 15879aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 15889aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 15899aebddd1SJeff Kirsher return; 15909aebddd1SJeff Kirsher } 15919aebddd1SJeff Kirsher 15929aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15939aebddd1SJeff Kirsher 15949aebddd1SJeff Kirsher while (total_size) { 15959aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 15969aebddd1SJeff Kirsher total_size -= buf_size; 15979aebddd1SJeff Kirsher 15989aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15999aebddd1SJeff Kirsher if (!wrb) { 16009aebddd1SJeff Kirsher status = -EBUSY; 16019aebddd1SJeff Kirsher goto err; 16029aebddd1SJeff Kirsher } 16039aebddd1SJeff Kirsher req = get_fat_cmd.va; 16049aebddd1SJeff Kirsher 16059aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1606106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1607106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1608106df1e3SSomnath Kotur &get_fat_cmd); 16099aebddd1SJeff Kirsher 16109aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16119aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16129aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16139aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16149aebddd1SJeff Kirsher 16159aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16169aebddd1SJeff Kirsher if (!status) { 16179aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16189aebddd1SJeff Kirsher memcpy(buf + offset, 16199aebddd1SJeff Kirsher resp->data_buffer, 162092aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16219aebddd1SJeff Kirsher } else { 16229aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16239aebddd1SJeff Kirsher goto err; 16249aebddd1SJeff Kirsher } 16259aebddd1SJeff Kirsher offset += buf_size; 16269aebddd1SJeff Kirsher log_offset += buf_size; 16279aebddd1SJeff Kirsher } 16289aebddd1SJeff Kirsher err: 16299aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 16309aebddd1SJeff Kirsher get_fat_cmd.va, 16319aebddd1SJeff Kirsher get_fat_cmd.dma); 16329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16339aebddd1SJeff Kirsher } 16349aebddd1SJeff Kirsher 163504b71175SSathya Perla /* Uses synchronous mcc */ 163604b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 163704b71175SSathya Perla char *fw_on_flash) 16389aebddd1SJeff Kirsher { 16399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16409aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 16419aebddd1SJeff Kirsher int status; 16429aebddd1SJeff Kirsher 164304b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 16449aebddd1SJeff Kirsher 164504b71175SSathya Perla wrb = wrb_from_mccq(adapter); 164604b71175SSathya Perla if (!wrb) { 164704b71175SSathya Perla status = -EBUSY; 164804b71175SSathya Perla goto err; 164904b71175SSathya Perla } 165004b71175SSathya Perla 16519aebddd1SJeff Kirsher req = embedded_payload(wrb); 16529aebddd1SJeff Kirsher 1653106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1654106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 165504b71175SSathya Perla status = be_mcc_notify_wait(adapter); 16569aebddd1SJeff Kirsher if (!status) { 16579aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 165804b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 165904b71175SSathya Perla if (fw_on_flash) 166004b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 16619aebddd1SJeff Kirsher } 166204b71175SSathya Perla err: 166304b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 16649aebddd1SJeff Kirsher return status; 16659aebddd1SJeff Kirsher } 16669aebddd1SJeff Kirsher 16679aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 16689aebddd1SJeff Kirsher * Uses async mcc 16699aebddd1SJeff Kirsher */ 16709aebddd1SJeff Kirsher int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) 16719aebddd1SJeff Kirsher { 16729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16739aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 16749aebddd1SJeff Kirsher int status = 0; 16759aebddd1SJeff Kirsher 16769aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16779aebddd1SJeff Kirsher 16789aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16799aebddd1SJeff Kirsher if (!wrb) { 16809aebddd1SJeff Kirsher status = -EBUSY; 16819aebddd1SJeff Kirsher goto err; 16829aebddd1SJeff Kirsher } 16839aebddd1SJeff Kirsher req = embedded_payload(wrb); 16849aebddd1SJeff Kirsher 1685106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1686106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 16879aebddd1SJeff Kirsher 16889aebddd1SJeff Kirsher req->num_eq = cpu_to_le32(1); 16899aebddd1SJeff Kirsher req->delay[0].eq_id = cpu_to_le32(eq_id); 16909aebddd1SJeff Kirsher req->delay[0].phase = 0; 16919aebddd1SJeff Kirsher req->delay[0].delay_multiplier = cpu_to_le32(eqd); 16929aebddd1SJeff Kirsher 16939aebddd1SJeff Kirsher be_mcc_notify(adapter); 16949aebddd1SJeff Kirsher 16959aebddd1SJeff Kirsher err: 16969aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16979aebddd1SJeff Kirsher return status; 16989aebddd1SJeff Kirsher } 16999aebddd1SJeff Kirsher 17009aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17019aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 17029aebddd1SJeff Kirsher u32 num, bool untagged, bool promiscuous) 17039aebddd1SJeff Kirsher { 17049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17059aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17069aebddd1SJeff Kirsher int status; 17079aebddd1SJeff Kirsher 17089aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17099aebddd1SJeff Kirsher 17109aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17119aebddd1SJeff Kirsher if (!wrb) { 17129aebddd1SJeff Kirsher status = -EBUSY; 17139aebddd1SJeff Kirsher goto err; 17149aebddd1SJeff Kirsher } 17159aebddd1SJeff Kirsher req = embedded_payload(wrb); 17169aebddd1SJeff Kirsher 1717106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1718106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17199aebddd1SJeff Kirsher 17209aebddd1SJeff Kirsher req->interface_id = if_id; 17219aebddd1SJeff Kirsher req->promiscuous = promiscuous; 17229aebddd1SJeff Kirsher req->untagged = untagged; 17239aebddd1SJeff Kirsher req->num_vlan = num; 17249aebddd1SJeff Kirsher if (!promiscuous) { 17259aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 17269aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 17279aebddd1SJeff Kirsher } 17289aebddd1SJeff Kirsher 17299aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17309aebddd1SJeff Kirsher 17319aebddd1SJeff Kirsher err: 17329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17339aebddd1SJeff Kirsher return status; 17349aebddd1SJeff Kirsher } 17359aebddd1SJeff Kirsher 17369aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 17379aebddd1SJeff Kirsher { 17389aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17399aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 17409aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 17419aebddd1SJeff Kirsher int status; 17429aebddd1SJeff Kirsher 17439aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17449aebddd1SJeff Kirsher 17459aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17469aebddd1SJeff Kirsher if (!wrb) { 17479aebddd1SJeff Kirsher status = -EBUSY; 17489aebddd1SJeff Kirsher goto err; 17499aebddd1SJeff Kirsher } 17509aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1751106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1752106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1753106df1e3SSomnath Kotur wrb, mem); 17549aebddd1SJeff Kirsher 17559aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 17569aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 17579aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1758c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1759c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 17609aebddd1SJeff Kirsher if (value == ON) 17619aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1762c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1763c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 17649aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 17659aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 17669aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 17679aebddd1SJeff Kirsher } else { 17689aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 17699aebddd1SJeff Kirsher int i = 0; 17709aebddd1SJeff Kirsher 17718e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 17728e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 17731610c79fSPadmanabh Ratnakar 17741610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 17751610c79fSPadmanabh Ratnakar * and not setting flags field 17761610c79fSPadmanabh Ratnakar */ 17771610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1778abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 1779abb93951SPadmanabh Ratnakar adapter->if_cap_flags); 17801610c79fSPadmanabh Ratnakar 1781016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 17829aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 17839aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 17849aebddd1SJeff Kirsher } 17859aebddd1SJeff Kirsher 17869aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17879aebddd1SJeff Kirsher err: 17889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17899aebddd1SJeff Kirsher return status; 17909aebddd1SJeff Kirsher } 17919aebddd1SJeff Kirsher 17929aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 17939aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 17949aebddd1SJeff Kirsher { 17959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17969aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 17979aebddd1SJeff Kirsher int status; 17989aebddd1SJeff Kirsher 1799f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1800f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1801f25b119cSPadmanabh Ratnakar return -EPERM; 1802f25b119cSPadmanabh Ratnakar 18039aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18049aebddd1SJeff Kirsher 18059aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18069aebddd1SJeff Kirsher if (!wrb) { 18079aebddd1SJeff Kirsher status = -EBUSY; 18089aebddd1SJeff Kirsher goto err; 18099aebddd1SJeff Kirsher } 18109aebddd1SJeff Kirsher req = embedded_payload(wrb); 18119aebddd1SJeff Kirsher 1812106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1813106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18149aebddd1SJeff Kirsher 18159aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 18169aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 18179aebddd1SJeff Kirsher 18189aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18199aebddd1SJeff Kirsher 18209aebddd1SJeff Kirsher err: 18219aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18229aebddd1SJeff Kirsher return status; 18239aebddd1SJeff Kirsher } 18249aebddd1SJeff Kirsher 18259aebddd1SJeff Kirsher /* Uses sycn mcc */ 18269aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 18279aebddd1SJeff Kirsher { 18289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18299aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 18309aebddd1SJeff Kirsher int status; 18319aebddd1SJeff Kirsher 1832f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1833f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1834f25b119cSPadmanabh Ratnakar return -EPERM; 1835f25b119cSPadmanabh Ratnakar 18369aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18379aebddd1SJeff Kirsher 18389aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18399aebddd1SJeff Kirsher if (!wrb) { 18409aebddd1SJeff Kirsher status = -EBUSY; 18419aebddd1SJeff Kirsher goto err; 18429aebddd1SJeff Kirsher } 18439aebddd1SJeff Kirsher req = embedded_payload(wrb); 18449aebddd1SJeff Kirsher 1845106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1846106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18479aebddd1SJeff Kirsher 18489aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18499aebddd1SJeff Kirsher if (!status) { 18509aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 18519aebddd1SJeff Kirsher embedded_payload(wrb); 18529aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 18539aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 18549aebddd1SJeff Kirsher } 18559aebddd1SJeff Kirsher 18569aebddd1SJeff Kirsher err: 18579aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18589aebddd1SJeff Kirsher return status; 18599aebddd1SJeff Kirsher } 18609aebddd1SJeff Kirsher 18619aebddd1SJeff Kirsher /* Uses mbox */ 18629aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 18630ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 18649aebddd1SJeff Kirsher { 18659aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18669aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 18679aebddd1SJeff Kirsher int status; 18689aebddd1SJeff Kirsher 18699aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 18709aebddd1SJeff Kirsher return -1; 18719aebddd1SJeff Kirsher 18729aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 18739aebddd1SJeff Kirsher req = embedded_payload(wrb); 18749aebddd1SJeff Kirsher 1875106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1876106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 18779aebddd1SJeff Kirsher 18789aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 18799aebddd1SJeff Kirsher if (!status) { 18809aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 18819aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 18829aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 18839aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 18840ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 18859aebddd1SJeff Kirsher } 18869aebddd1SJeff Kirsher 18879aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 18889aebddd1SJeff Kirsher return status; 18899aebddd1SJeff Kirsher } 18909aebddd1SJeff Kirsher 18919aebddd1SJeff Kirsher /* Uses mbox */ 18929aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 18939aebddd1SJeff Kirsher { 18949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18959aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 18969aebddd1SJeff Kirsher int status; 18979aebddd1SJeff Kirsher 1898bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1899bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1900bf99e50dSPadmanabh Ratnakar if (!status) { 1901bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1902bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1903bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1904bf99e50dSPadmanabh Ratnakar } 1905bf99e50dSPadmanabh Ratnakar if (status) { 1906bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 1907bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 1908bf99e50dSPadmanabh Ratnakar } 1909bf99e50dSPadmanabh Ratnakar return status; 1910bf99e50dSPadmanabh Ratnakar } 1911bf99e50dSPadmanabh Ratnakar 19129aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19139aebddd1SJeff Kirsher return -1; 19149aebddd1SJeff Kirsher 19159aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19169aebddd1SJeff Kirsher req = embedded_payload(wrb); 19179aebddd1SJeff Kirsher 1918106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 1919106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 19209aebddd1SJeff Kirsher 19219aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19229aebddd1SJeff Kirsher 19239aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19249aebddd1SJeff Kirsher return status; 19259aebddd1SJeff Kirsher } 19269aebddd1SJeff Kirsher 1927594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 1928594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 19299aebddd1SJeff Kirsher { 19309aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19319aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 193265f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 193365f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 193465f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 19359aebddd1SJeff Kirsher int status; 19369aebddd1SJeff Kirsher 19379aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19389aebddd1SJeff Kirsher return -1; 19399aebddd1SJeff Kirsher 19409aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19419aebddd1SJeff Kirsher req = embedded_payload(wrb); 19429aebddd1SJeff Kirsher 1943106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1944106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 19459aebddd1SJeff Kirsher 19469aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1947594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 19489aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 1949594ad54aSSuresh Reddy 1950594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 1951594ad54aSSuresh Reddy req->hdr.version = 1; 1952594ad54aSSuresh Reddy 19539aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 19549aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 19559aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 19569aebddd1SJeff Kirsher 19579aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19589aebddd1SJeff Kirsher 19599aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19609aebddd1SJeff Kirsher return status; 19619aebddd1SJeff Kirsher } 19629aebddd1SJeff Kirsher 19639aebddd1SJeff Kirsher /* Uses sync mcc */ 19649aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 19659aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 19669aebddd1SJeff Kirsher { 19679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19689aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 19699aebddd1SJeff Kirsher int status; 19709aebddd1SJeff Kirsher 19719aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19729aebddd1SJeff Kirsher 19739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19749aebddd1SJeff Kirsher if (!wrb) { 19759aebddd1SJeff Kirsher status = -EBUSY; 19769aebddd1SJeff Kirsher goto err; 19779aebddd1SJeff Kirsher } 19789aebddd1SJeff Kirsher req = embedded_payload(wrb); 19799aebddd1SJeff Kirsher 1980106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1981106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 19829aebddd1SJeff Kirsher 19839aebddd1SJeff Kirsher req->port_num = port_num; 19849aebddd1SJeff Kirsher req->beacon_state = state; 19859aebddd1SJeff Kirsher req->beacon_duration = bcn; 19869aebddd1SJeff Kirsher req->status_duration = sts; 19879aebddd1SJeff Kirsher 19889aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19899aebddd1SJeff Kirsher 19909aebddd1SJeff Kirsher err: 19919aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19929aebddd1SJeff Kirsher return status; 19939aebddd1SJeff Kirsher } 19949aebddd1SJeff Kirsher 19959aebddd1SJeff Kirsher /* Uses sync mcc */ 19969aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 19979aebddd1SJeff Kirsher { 19989aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19999aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20009aebddd1SJeff Kirsher int status; 20019aebddd1SJeff Kirsher 20029aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20039aebddd1SJeff Kirsher 20049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20059aebddd1SJeff Kirsher if (!wrb) { 20069aebddd1SJeff Kirsher status = -EBUSY; 20079aebddd1SJeff Kirsher goto err; 20089aebddd1SJeff Kirsher } 20099aebddd1SJeff Kirsher req = embedded_payload(wrb); 20109aebddd1SJeff Kirsher 2011106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2012106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 20139aebddd1SJeff Kirsher 20149aebddd1SJeff Kirsher req->port_num = port_num; 20159aebddd1SJeff Kirsher 20169aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20179aebddd1SJeff Kirsher if (!status) { 20189aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 20199aebddd1SJeff Kirsher embedded_payload(wrb); 20209aebddd1SJeff Kirsher *state = resp->beacon_state; 20219aebddd1SJeff Kirsher } 20229aebddd1SJeff Kirsher 20239aebddd1SJeff Kirsher err: 20249aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20259aebddd1SJeff Kirsher return status; 20269aebddd1SJeff Kirsher } 20279aebddd1SJeff Kirsher 20289aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2029f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2030f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2031f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 20329aebddd1SJeff Kirsher { 20339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20349aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 20359aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 20369aebddd1SJeff Kirsher void *ctxt = NULL; 20379aebddd1SJeff Kirsher int status; 20389aebddd1SJeff Kirsher 20399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20409aebddd1SJeff Kirsher adapter->flash_status = 0; 20419aebddd1SJeff Kirsher 20429aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20439aebddd1SJeff Kirsher if (!wrb) { 20449aebddd1SJeff Kirsher status = -EBUSY; 20459aebddd1SJeff Kirsher goto err_unlock; 20469aebddd1SJeff Kirsher } 20479aebddd1SJeff Kirsher 20489aebddd1SJeff Kirsher req = embedded_payload(wrb); 20499aebddd1SJeff Kirsher 2050106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 20519aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2052106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2053106df1e3SSomnath Kotur NULL); 20549aebddd1SJeff Kirsher 20559aebddd1SJeff Kirsher ctxt = &req->context; 20569aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20579aebddd1SJeff Kirsher write_length, ctxt, data_size); 20589aebddd1SJeff Kirsher 20599aebddd1SJeff Kirsher if (data_size == 0) 20609aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20619aebddd1SJeff Kirsher eof, ctxt, 1); 20629aebddd1SJeff Kirsher else 20639aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 20649aebddd1SJeff Kirsher eof, ctxt, 0); 20659aebddd1SJeff Kirsher 20669aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 20679aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 20689aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 20699aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 20709aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 20719aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 20729aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 20739aebddd1SJeff Kirsher & 0xFFFFFFFF); 20749aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 20759aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 20769aebddd1SJeff Kirsher 20779aebddd1SJeff Kirsher be_mcc_notify(adapter); 20789aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20799aebddd1SJeff Kirsher 20809aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2081701962d0SSomnath Kotur msecs_to_jiffies(60000))) 20829aebddd1SJeff Kirsher status = -1; 20839aebddd1SJeff Kirsher else 20849aebddd1SJeff Kirsher status = adapter->flash_status; 20859aebddd1SJeff Kirsher 20869aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2087f67ef7baSPadmanabh Ratnakar if (!status) { 20889aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2089f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2090f67ef7baSPadmanabh Ratnakar } else { 20919aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2092f67ef7baSPadmanabh Ratnakar } 20939aebddd1SJeff Kirsher 20949aebddd1SJeff Kirsher return status; 20959aebddd1SJeff Kirsher 20969aebddd1SJeff Kirsher err_unlock: 20979aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20989aebddd1SJeff Kirsher return status; 20999aebddd1SJeff Kirsher } 21009aebddd1SJeff Kirsher 2101de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2102de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2103de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2104de49bd5aSPadmanabh Ratnakar { 2105de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2106de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2107de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2108de49bd5aSPadmanabh Ratnakar int status; 2109de49bd5aSPadmanabh Ratnakar 2110de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2111de49bd5aSPadmanabh Ratnakar 2112de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2113de49bd5aSPadmanabh Ratnakar if (!wrb) { 2114de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2115de49bd5aSPadmanabh Ratnakar goto err_unlock; 2116de49bd5aSPadmanabh Ratnakar } 2117de49bd5aSPadmanabh Ratnakar 2118de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2119de49bd5aSPadmanabh Ratnakar 2120de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2121de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2122de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2123de49bd5aSPadmanabh Ratnakar NULL); 2124de49bd5aSPadmanabh Ratnakar 2125de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2126de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2127de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2128de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2129de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2130de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2131de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2132de49bd5aSPadmanabh Ratnakar 2133de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2134de49bd5aSPadmanabh Ratnakar 2135de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2136de49bd5aSPadmanabh Ratnakar if (!status) { 2137de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2138de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2139de49bd5aSPadmanabh Ratnakar } else { 2140de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2141de49bd5aSPadmanabh Ratnakar } 2142de49bd5aSPadmanabh Ratnakar 2143de49bd5aSPadmanabh Ratnakar err_unlock: 2144de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2145de49bd5aSPadmanabh Ratnakar return status; 2146de49bd5aSPadmanabh Ratnakar } 2147de49bd5aSPadmanabh Ratnakar 21489aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 21499aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 21509aebddd1SJeff Kirsher { 21519aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21529aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 21539aebddd1SJeff Kirsher int status; 21549aebddd1SJeff Kirsher 21559aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21569aebddd1SJeff Kirsher adapter->flash_status = 0; 21579aebddd1SJeff Kirsher 21589aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21599aebddd1SJeff Kirsher if (!wrb) { 21609aebddd1SJeff Kirsher status = -EBUSY; 21619aebddd1SJeff Kirsher goto err_unlock; 21629aebddd1SJeff Kirsher } 21639aebddd1SJeff Kirsher req = cmd->va; 21649aebddd1SJeff Kirsher 2165106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2166106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 21679aebddd1SJeff Kirsher 21689aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 21699aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 21709aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 21719aebddd1SJeff Kirsher 21729aebddd1SJeff Kirsher be_mcc_notify(adapter); 21739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21749aebddd1SJeff Kirsher 21759aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2176e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 21779aebddd1SJeff Kirsher status = -1; 21789aebddd1SJeff Kirsher else 21799aebddd1SJeff Kirsher status = adapter->flash_status; 21809aebddd1SJeff Kirsher 21819aebddd1SJeff Kirsher return status; 21829aebddd1SJeff Kirsher 21839aebddd1SJeff Kirsher err_unlock: 21849aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21859aebddd1SJeff Kirsher return status; 21869aebddd1SJeff Kirsher } 21879aebddd1SJeff Kirsher 21889aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 21899aebddd1SJeff Kirsher int offset) 21909aebddd1SJeff Kirsher { 21919aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2192be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 21939aebddd1SJeff Kirsher int status; 21949aebddd1SJeff Kirsher 21959aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21969aebddd1SJeff Kirsher 21979aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21989aebddd1SJeff Kirsher if (!wrb) { 21999aebddd1SJeff Kirsher status = -EBUSY; 22009aebddd1SJeff Kirsher goto err; 22019aebddd1SJeff Kirsher } 22029aebddd1SJeff Kirsher req = embedded_payload(wrb); 22039aebddd1SJeff Kirsher 2204106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2205be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2206be716446SPadmanabh Ratnakar wrb, NULL); 22079aebddd1SJeff Kirsher 2208c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 22099aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 22109aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 22119aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 22129aebddd1SJeff Kirsher 22139aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22149aebddd1SJeff Kirsher if (!status) 2215be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 22169aebddd1SJeff Kirsher 22179aebddd1SJeff Kirsher err: 22189aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22199aebddd1SJeff Kirsher return status; 22209aebddd1SJeff Kirsher } 22219aebddd1SJeff Kirsher 22229aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 22239aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 22249aebddd1SJeff Kirsher { 22259aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22269aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 22279aebddd1SJeff Kirsher int status; 22289aebddd1SJeff Kirsher 22299aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22309aebddd1SJeff Kirsher 22319aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22329aebddd1SJeff Kirsher if (!wrb) { 22339aebddd1SJeff Kirsher status = -EBUSY; 22349aebddd1SJeff Kirsher goto err; 22359aebddd1SJeff Kirsher } 22369aebddd1SJeff Kirsher req = nonemb_cmd->va; 22379aebddd1SJeff Kirsher 2238106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2239106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2240106df1e3SSomnath Kotur nonemb_cmd); 22419aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 22429aebddd1SJeff Kirsher 22439aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22449aebddd1SJeff Kirsher 22459aebddd1SJeff Kirsher err: 22469aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22479aebddd1SJeff Kirsher return status; 22489aebddd1SJeff Kirsher } 22499aebddd1SJeff Kirsher 22509aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 22519aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 22529aebddd1SJeff Kirsher { 22539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22549aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 22559aebddd1SJeff Kirsher int status; 22569aebddd1SJeff Kirsher 22579aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22589aebddd1SJeff Kirsher 22599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22609aebddd1SJeff Kirsher if (!wrb) { 22619aebddd1SJeff Kirsher status = -EBUSY; 22629aebddd1SJeff Kirsher goto err; 22639aebddd1SJeff Kirsher } 22649aebddd1SJeff Kirsher 22659aebddd1SJeff Kirsher req = embedded_payload(wrb); 22669aebddd1SJeff Kirsher 2267106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2268106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2269106df1e3SSomnath Kotur NULL); 22709aebddd1SJeff Kirsher 22719aebddd1SJeff Kirsher req->src_port = port_num; 22729aebddd1SJeff Kirsher req->dest_port = port_num; 22739aebddd1SJeff Kirsher req->loopback_type = loopback_type; 22749aebddd1SJeff Kirsher req->loopback_state = enable; 22759aebddd1SJeff Kirsher 22769aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22779aebddd1SJeff Kirsher err: 22789aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22799aebddd1SJeff Kirsher return status; 22809aebddd1SJeff Kirsher } 22819aebddd1SJeff Kirsher 22829aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 22839aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 22849aebddd1SJeff Kirsher { 22859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22869aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 22879aebddd1SJeff Kirsher int status; 22889aebddd1SJeff Kirsher 22899aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22909aebddd1SJeff Kirsher 22919aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22929aebddd1SJeff Kirsher if (!wrb) { 22939aebddd1SJeff Kirsher status = -EBUSY; 22949aebddd1SJeff Kirsher goto err; 22959aebddd1SJeff Kirsher } 22969aebddd1SJeff Kirsher 22979aebddd1SJeff Kirsher req = embedded_payload(wrb); 22989aebddd1SJeff Kirsher 2299106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2300106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 23019aebddd1SJeff Kirsher req->hdr.timeout = cpu_to_le32(4); 23029aebddd1SJeff Kirsher 23039aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23049aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 23059aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 23069aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 23079aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 23089aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 23099aebddd1SJeff Kirsher 23109aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23119aebddd1SJeff Kirsher if (!status) { 23129aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); 23139aebddd1SJeff Kirsher status = le32_to_cpu(resp->status); 23149aebddd1SJeff Kirsher } 23159aebddd1SJeff Kirsher 23169aebddd1SJeff Kirsher err: 23179aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23189aebddd1SJeff Kirsher return status; 23199aebddd1SJeff Kirsher } 23209aebddd1SJeff Kirsher 23219aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 23229aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 23239aebddd1SJeff Kirsher { 23249aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23259aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 23269aebddd1SJeff Kirsher int status; 23279aebddd1SJeff Kirsher int i, j = 0; 23289aebddd1SJeff Kirsher 23299aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23309aebddd1SJeff Kirsher 23319aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23329aebddd1SJeff Kirsher if (!wrb) { 23339aebddd1SJeff Kirsher status = -EBUSY; 23349aebddd1SJeff Kirsher goto err; 23359aebddd1SJeff Kirsher } 23369aebddd1SJeff Kirsher req = cmd->va; 2337106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2338106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 23399aebddd1SJeff Kirsher 23409aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23419aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 23429aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 23439aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 23449aebddd1SJeff Kirsher j++; 23459aebddd1SJeff Kirsher if (j > 7) 23469aebddd1SJeff Kirsher j = 0; 23479aebddd1SJeff Kirsher } 23489aebddd1SJeff Kirsher 23499aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23509aebddd1SJeff Kirsher 23519aebddd1SJeff Kirsher if (!status) { 23529aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 23539aebddd1SJeff Kirsher resp = cmd->va; 23549aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 23559aebddd1SJeff Kirsher resp->snd_err) { 23569aebddd1SJeff Kirsher status = -1; 23579aebddd1SJeff Kirsher } 23589aebddd1SJeff Kirsher } 23599aebddd1SJeff Kirsher 23609aebddd1SJeff Kirsher err: 23619aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23629aebddd1SJeff Kirsher return status; 23639aebddd1SJeff Kirsher } 23649aebddd1SJeff Kirsher 23659aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 23669aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23679aebddd1SJeff Kirsher { 23689aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23699aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 23709aebddd1SJeff Kirsher int status; 23719aebddd1SJeff Kirsher 23729aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23739aebddd1SJeff Kirsher 23749aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23759aebddd1SJeff Kirsher if (!wrb) { 23769aebddd1SJeff Kirsher status = -EBUSY; 23779aebddd1SJeff Kirsher goto err; 23789aebddd1SJeff Kirsher } 23799aebddd1SJeff Kirsher req = nonemb_cmd->va; 23809aebddd1SJeff Kirsher 2381106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2382106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2383106df1e3SSomnath Kotur nonemb_cmd); 23849aebddd1SJeff Kirsher 23859aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23869aebddd1SJeff Kirsher 23879aebddd1SJeff Kirsher err: 23889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23899aebddd1SJeff Kirsher return status; 23909aebddd1SJeff Kirsher } 23919aebddd1SJeff Kirsher 239242f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 23939aebddd1SJeff Kirsher { 23949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23959aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 23969aebddd1SJeff Kirsher struct be_dma_mem cmd; 23979aebddd1SJeff Kirsher int status; 23989aebddd1SJeff Kirsher 2399f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2400f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2401f25b119cSPadmanabh Ratnakar return -EPERM; 2402f25b119cSPadmanabh Ratnakar 24039aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24049aebddd1SJeff Kirsher 24059aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24069aebddd1SJeff Kirsher if (!wrb) { 24079aebddd1SJeff Kirsher status = -EBUSY; 24089aebddd1SJeff Kirsher goto err; 24099aebddd1SJeff Kirsher } 24109aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 24119aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 24129aebddd1SJeff Kirsher &cmd.dma); 24139aebddd1SJeff Kirsher if (!cmd.va) { 24149aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 24159aebddd1SJeff Kirsher status = -ENOMEM; 24169aebddd1SJeff Kirsher goto err; 24179aebddd1SJeff Kirsher } 24189aebddd1SJeff Kirsher 24199aebddd1SJeff Kirsher req = cmd.va; 24209aebddd1SJeff Kirsher 2421106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2422106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2423106df1e3SSomnath Kotur wrb, &cmd); 24249aebddd1SJeff Kirsher 24259aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24269aebddd1SJeff Kirsher if (!status) { 24279aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 24289aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 242942f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 243042f11cf2SAjit Khaparde adapter->phy.interface_type = 24319aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 243242f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 243342f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 243442f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 243542f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 243642f11cf2SAjit Khaparde adapter->phy.misc_params = 243742f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 243868cb7e47SVasundhara Volam 243968cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 244068cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 244168cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 244268cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 244368cb7e47SVasundhara Volam } 24449aebddd1SJeff Kirsher } 24459aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 24469aebddd1SJeff Kirsher cmd.va, cmd.dma); 24479aebddd1SJeff Kirsher err: 24489aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24499aebddd1SJeff Kirsher return status; 24509aebddd1SJeff Kirsher } 24519aebddd1SJeff Kirsher 24529aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 24539aebddd1SJeff Kirsher { 24549aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24559aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 24569aebddd1SJeff Kirsher int status; 24579aebddd1SJeff Kirsher 24589aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24599aebddd1SJeff Kirsher 24609aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24619aebddd1SJeff Kirsher if (!wrb) { 24629aebddd1SJeff Kirsher status = -EBUSY; 24639aebddd1SJeff Kirsher goto err; 24649aebddd1SJeff Kirsher } 24659aebddd1SJeff Kirsher 24669aebddd1SJeff Kirsher req = embedded_payload(wrb); 24679aebddd1SJeff Kirsher 2468106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2469106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 24709aebddd1SJeff Kirsher 24719aebddd1SJeff Kirsher req->hdr.domain = domain; 24729aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 24739aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 24749aebddd1SJeff Kirsher 24759aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24769aebddd1SJeff Kirsher 24779aebddd1SJeff Kirsher err: 24789aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24799aebddd1SJeff Kirsher return status; 24809aebddd1SJeff Kirsher } 24819aebddd1SJeff Kirsher 24829aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 24839aebddd1SJeff Kirsher { 24849aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24859aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 24869aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 24879aebddd1SJeff Kirsher int status; 24889aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 24899aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 24909aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 24919aebddd1SJeff Kirsher 2492d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2493d98ef50fSSuresh Reddy return -1; 2494d98ef50fSSuresh Reddy 24959aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 24969aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 24979aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 24989aebddd1SJeff Kirsher &attribs_cmd.dma); 24999aebddd1SJeff Kirsher if (!attribs_cmd.va) { 25009aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 25019aebddd1SJeff Kirsher "Memory allocation failure\n"); 2502d98ef50fSSuresh Reddy status = -ENOMEM; 2503d98ef50fSSuresh Reddy goto err; 25049aebddd1SJeff Kirsher } 25059aebddd1SJeff Kirsher 25069aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25079aebddd1SJeff Kirsher if (!wrb) { 25089aebddd1SJeff Kirsher status = -EBUSY; 25099aebddd1SJeff Kirsher goto err; 25109aebddd1SJeff Kirsher } 25119aebddd1SJeff Kirsher req = attribs_cmd.va; 25129aebddd1SJeff Kirsher 2513106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2514106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2515106df1e3SSomnath Kotur &attribs_cmd); 25169aebddd1SJeff Kirsher 25179aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25189aebddd1SJeff Kirsher if (!status) { 25199aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 25209aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 25219aebddd1SJeff Kirsher } 25229aebddd1SJeff Kirsher 25239aebddd1SJeff Kirsher err: 25249aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2525d98ef50fSSuresh Reddy if (attribs_cmd.va) 2526d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2527d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 25289aebddd1SJeff Kirsher return status; 25299aebddd1SJeff Kirsher } 25309aebddd1SJeff Kirsher 25319aebddd1SJeff Kirsher /* Uses mbox */ 25329aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 25339aebddd1SJeff Kirsher { 25349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25359aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 25369aebddd1SJeff Kirsher int status; 25379aebddd1SJeff Kirsher 25389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 25399aebddd1SJeff Kirsher return -1; 25409aebddd1SJeff Kirsher 25419aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25429aebddd1SJeff Kirsher if (!wrb) { 25439aebddd1SJeff Kirsher status = -EBUSY; 25449aebddd1SJeff Kirsher goto err; 25459aebddd1SJeff Kirsher } 25469aebddd1SJeff Kirsher 25479aebddd1SJeff Kirsher req = embedded_payload(wrb); 25489aebddd1SJeff Kirsher 2549106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2550106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 25519aebddd1SJeff Kirsher 25529aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 25539aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 25549aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 25559aebddd1SJeff Kirsher 25569aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25579aebddd1SJeff Kirsher if (!status) { 25589aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 25599aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 25609aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2561d379142bSSathya Perla if (!adapter->be3_native) 2562d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2563d379142bSSathya Perla "adapter not in advanced mode\n"); 25649aebddd1SJeff Kirsher } 25659aebddd1SJeff Kirsher err: 25669aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 25679aebddd1SJeff Kirsher return status; 25689aebddd1SJeff Kirsher } 2569590c391dSPadmanabh Ratnakar 2570f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2571f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2572f25b119cSPadmanabh Ratnakar u32 domain) 2573f25b119cSPadmanabh Ratnakar { 2574f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2575f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2576f25b119cSPadmanabh Ratnakar int status; 2577f25b119cSPadmanabh Ratnakar 2578f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2579f25b119cSPadmanabh Ratnakar 2580f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2581f25b119cSPadmanabh Ratnakar if (!wrb) { 2582f25b119cSPadmanabh Ratnakar status = -EBUSY; 2583f25b119cSPadmanabh Ratnakar goto err; 2584f25b119cSPadmanabh Ratnakar } 2585f25b119cSPadmanabh Ratnakar 2586f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2587f25b119cSPadmanabh Ratnakar 2588f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2589f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2590f25b119cSPadmanabh Ratnakar wrb, NULL); 2591f25b119cSPadmanabh Ratnakar 2592f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2593f25b119cSPadmanabh Ratnakar 2594f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2595f25b119cSPadmanabh Ratnakar if (!status) { 2596f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2597f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2598f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 2599f25b119cSPadmanabh Ratnakar } 2600f25b119cSPadmanabh Ratnakar 2601f25b119cSPadmanabh Ratnakar err: 2602f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2603f25b119cSPadmanabh Ratnakar return status; 2604f25b119cSPadmanabh Ratnakar } 2605f25b119cSPadmanabh Ratnakar 260604a06028SSathya Perla /* Set privilege(s) for a function */ 260704a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 260804a06028SSathya Perla u32 domain) 260904a06028SSathya Perla { 261004a06028SSathya Perla struct be_mcc_wrb *wrb; 261104a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 261204a06028SSathya Perla int status; 261304a06028SSathya Perla 261404a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 261504a06028SSathya Perla 261604a06028SSathya Perla wrb = wrb_from_mccq(adapter); 261704a06028SSathya Perla if (!wrb) { 261804a06028SSathya Perla status = -EBUSY; 261904a06028SSathya Perla goto err; 262004a06028SSathya Perla } 262104a06028SSathya Perla 262204a06028SSathya Perla req = embedded_payload(wrb); 262304a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 262404a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 262504a06028SSathya Perla wrb, NULL); 262604a06028SSathya Perla req->hdr.domain = domain; 262704a06028SSathya Perla if (lancer_chip(adapter)) 262804a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 262904a06028SSathya Perla else 263004a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 263104a06028SSathya Perla 263204a06028SSathya Perla status = be_mcc_notify_wait(adapter); 263304a06028SSathya Perla err: 263404a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 263504a06028SSathya Perla return status; 263604a06028SSathya Perla } 263704a06028SSathya Perla 26385a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 26395a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 26405a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 26415a712c13SSathya Perla */ 26421578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 26435a712c13SSathya Perla bool *pmac_id_valid, u32 *pmac_id, u8 domain) 2644590c391dSPadmanabh Ratnakar { 2645590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2646590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2647590c391dSPadmanabh Ratnakar int status; 2648590c391dSPadmanabh Ratnakar int mac_count; 2649e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2650e5e1ee89SPadmanabh Ratnakar int i; 2651e5e1ee89SPadmanabh Ratnakar 2652e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2653e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2654e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2655e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2656e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2657e5e1ee89SPadmanabh Ratnakar 2658e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2659e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2660e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2661e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2662e5e1ee89SPadmanabh Ratnakar } 2663590c391dSPadmanabh Ratnakar 2664590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2665590c391dSPadmanabh Ratnakar 2666590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2667590c391dSPadmanabh Ratnakar if (!wrb) { 2668590c391dSPadmanabh Ratnakar status = -EBUSY; 2669e5e1ee89SPadmanabh Ratnakar goto out; 2670590c391dSPadmanabh Ratnakar } 2671e5e1ee89SPadmanabh Ratnakar 2672e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2673590c391dSPadmanabh Ratnakar 2674590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2675bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2676bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2677590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2678e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 26795a712c13SSathya Perla if (*pmac_id_valid) { 26805a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 26815a712c13SSathya Perla req->iface_id = cpu_to_le16(adapter->if_handle); 26825a712c13SSathya Perla req->perm_override = 0; 26835a712c13SSathya Perla } else { 2684e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 26855a712c13SSathya Perla } 2686590c391dSPadmanabh Ratnakar 2687590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2688590c391dSPadmanabh Ratnakar if (!status) { 2689590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2690e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 26915a712c13SSathya Perla 26925a712c13SSathya Perla if (*pmac_id_valid) { 26935a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 26945a712c13SSathya Perla ETH_ALEN); 26955a712c13SSathya Perla goto out; 26965a712c13SSathya Perla } 26975a712c13SSathya Perla 2698e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2699e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 27001578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 27011578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 27021578e777SPadmanabh Ratnakar * found. 2703e5e1ee89SPadmanabh Ratnakar */ 2704590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2705e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2706e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2707e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2708e5e1ee89SPadmanabh Ratnakar 2709e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2710e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2711e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2712e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2713e5e1ee89SPadmanabh Ratnakar */ 2714e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 27155a712c13SSathya Perla *pmac_id_valid = true; 2716e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2717e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2718e5e1ee89SPadmanabh Ratnakar goto out; 2719590c391dSPadmanabh Ratnakar } 2720590c391dSPadmanabh Ratnakar } 27211578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 27225a712c13SSathya Perla *pmac_id_valid = false; 2723e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2724e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2725590c391dSPadmanabh Ratnakar } 2726590c391dSPadmanabh Ratnakar 2727e5e1ee89SPadmanabh Ratnakar out: 2728590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2729e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2730e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2731590c391dSPadmanabh Ratnakar return status; 2732590c391dSPadmanabh Ratnakar } 2733590c391dSPadmanabh Ratnakar 27345a712c13SSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac) 27355a712c13SSathya Perla { 27365a712c13SSathya Perla bool active = true; 27375a712c13SSathya Perla 27383175d8c2SSathya Perla if (BEx_chip(adapter)) 27395a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 27405a712c13SSathya Perla adapter->if_handle, curr_pmac_id); 27413175d8c2SSathya Perla else 27423175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 27433175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 27443175d8c2SSathya Perla &curr_pmac_id, 0); 27455a712c13SSathya Perla } 27465a712c13SSathya Perla 274795046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 274895046b92SSathya Perla { 274995046b92SSathya Perla int status; 275095046b92SSathya Perla bool pmac_valid = false; 275195046b92SSathya Perla 275295046b92SSathya Perla memset(mac, 0, ETH_ALEN); 275395046b92SSathya Perla 27543175d8c2SSathya Perla if (BEx_chip(adapter)) { 27553175d8c2SSathya Perla if (be_physfn(adapter)) 27563175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 27573175d8c2SSathya Perla 0); 275895046b92SSathya Perla else 275995046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 276095046b92SSathya Perla adapter->if_handle, 0); 27613175d8c2SSathya Perla } else { 27623175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 27633175d8c2SSathya Perla NULL, 0); 27643175d8c2SSathya Perla } 27653175d8c2SSathya Perla 276695046b92SSathya Perla return status; 276795046b92SSathya Perla } 276895046b92SSathya Perla 2769590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2770590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2771590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2772590c391dSPadmanabh Ratnakar { 2773590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2774590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2775590c391dSPadmanabh Ratnakar int status; 2776590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2777590c391dSPadmanabh Ratnakar 2778590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2779590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2780590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2781590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2782d0320f75SJoe Perches if (!cmd.va) 2783590c391dSPadmanabh Ratnakar return -ENOMEM; 2784590c391dSPadmanabh Ratnakar 2785590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2786590c391dSPadmanabh Ratnakar 2787590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2788590c391dSPadmanabh Ratnakar if (!wrb) { 2789590c391dSPadmanabh Ratnakar status = -EBUSY; 2790590c391dSPadmanabh Ratnakar goto err; 2791590c391dSPadmanabh Ratnakar } 2792590c391dSPadmanabh Ratnakar 2793590c391dSPadmanabh Ratnakar req = cmd.va; 2794590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2795590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2796590c391dSPadmanabh Ratnakar wrb, &cmd); 2797590c391dSPadmanabh Ratnakar 2798590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2799590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2800590c391dSPadmanabh Ratnakar if (mac_count) 2801590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2802590c391dSPadmanabh Ratnakar 2803590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2804590c391dSPadmanabh Ratnakar 2805590c391dSPadmanabh Ratnakar err: 2806590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2807590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2808590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2809590c391dSPadmanabh Ratnakar return status; 2810590c391dSPadmanabh Ratnakar } 28114762f6ceSAjit Khaparde 28123175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 28133175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 28143175d8c2SSathya Perla * current list are active. 28153175d8c2SSathya Perla */ 28163175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 28173175d8c2SSathya Perla { 28183175d8c2SSathya Perla bool active_mac = false; 28193175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 28203175d8c2SSathya Perla u32 pmac_id; 28213175d8c2SSathya Perla int status; 28223175d8c2SSathya Perla 28233175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 28243175d8c2SSathya Perla &pmac_id, dom); 28253175d8c2SSathya Perla if (!status && active_mac) 28263175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 28273175d8c2SSathya Perla 28283175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 28293175d8c2SSathya Perla } 28303175d8c2SSathya Perla 2831f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2832f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2833f1f3ee1bSAjit Khaparde { 2834f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2835f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2836f1f3ee1bSAjit Khaparde void *ctxt; 2837f1f3ee1bSAjit Khaparde int status; 2838f1f3ee1bSAjit Khaparde 2839f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2840f1f3ee1bSAjit Khaparde 2841f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2842f1f3ee1bSAjit Khaparde if (!wrb) { 2843f1f3ee1bSAjit Khaparde status = -EBUSY; 2844f1f3ee1bSAjit Khaparde goto err; 2845f1f3ee1bSAjit Khaparde } 2846f1f3ee1bSAjit Khaparde 2847f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2848f1f3ee1bSAjit Khaparde ctxt = &req->context; 2849f1f3ee1bSAjit Khaparde 2850f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2851f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2852f1f3ee1bSAjit Khaparde 2853f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2854f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2855f1f3ee1bSAjit Khaparde if (pvid) { 2856f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2857f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2858f1f3ee1bSAjit Khaparde } 2859f1f3ee1bSAjit Khaparde 2860f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2861f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2862f1f3ee1bSAjit Khaparde 2863f1f3ee1bSAjit Khaparde err: 2864f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2865f1f3ee1bSAjit Khaparde return status; 2866f1f3ee1bSAjit Khaparde } 2867f1f3ee1bSAjit Khaparde 2868f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2869f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2870f1f3ee1bSAjit Khaparde u32 domain, u16 intf_id) 2871f1f3ee1bSAjit Khaparde { 2872f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2873f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2874f1f3ee1bSAjit Khaparde void *ctxt; 2875f1f3ee1bSAjit Khaparde int status; 2876f1f3ee1bSAjit Khaparde u16 vid; 2877f1f3ee1bSAjit Khaparde 2878f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2879f1f3ee1bSAjit Khaparde 2880f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2881f1f3ee1bSAjit Khaparde if (!wrb) { 2882f1f3ee1bSAjit Khaparde status = -EBUSY; 2883f1f3ee1bSAjit Khaparde goto err; 2884f1f3ee1bSAjit Khaparde } 2885f1f3ee1bSAjit Khaparde 2886f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2887f1f3ee1bSAjit Khaparde ctxt = &req->context; 2888f1f3ee1bSAjit Khaparde 2889f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2890f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2891f1f3ee1bSAjit Khaparde 2892f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2893f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, ctxt, 2894f1f3ee1bSAjit Khaparde intf_id); 2895f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2896f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2897f1f3ee1bSAjit Khaparde 2898f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2899f1f3ee1bSAjit Khaparde if (!status) { 2900f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 2901f1f3ee1bSAjit Khaparde embedded_payload(wrb); 2902f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 2903f1f3ee1bSAjit Khaparde sizeof(resp->context)); 2904f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2905f1f3ee1bSAjit Khaparde pvid, &resp->context); 2906f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 2907f1f3ee1bSAjit Khaparde } 2908f1f3ee1bSAjit Khaparde 2909f1f3ee1bSAjit Khaparde err: 2910f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2911f1f3ee1bSAjit Khaparde return status; 2912f1f3ee1bSAjit Khaparde } 2913f1f3ee1bSAjit Khaparde 29144762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 29154762f6ceSAjit Khaparde { 29164762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 29174762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 29184762f6ceSAjit Khaparde int status; 29194762f6ceSAjit Khaparde int payload_len = sizeof(*req); 29204762f6ceSAjit Khaparde struct be_dma_mem cmd; 29214762f6ceSAjit Khaparde 2922f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 2923f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 2924f25b119cSPadmanabh Ratnakar return -EPERM; 2925f25b119cSPadmanabh Ratnakar 2926d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2927d98ef50fSSuresh Reddy return -1; 2928d98ef50fSSuresh Reddy 29294762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 29304762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 29314762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 29324762f6ceSAjit Khaparde &cmd.dma); 29334762f6ceSAjit Khaparde if (!cmd.va) { 29344762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 29354762f6ceSAjit Khaparde "Memory allocation failure\n"); 2936d98ef50fSSuresh Reddy status = -ENOMEM; 2937d98ef50fSSuresh Reddy goto err; 29384762f6ceSAjit Khaparde } 29394762f6ceSAjit Khaparde 29404762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 29414762f6ceSAjit Khaparde if (!wrb) { 29424762f6ceSAjit Khaparde status = -EBUSY; 29434762f6ceSAjit Khaparde goto err; 29444762f6ceSAjit Khaparde } 29454762f6ceSAjit Khaparde 29464762f6ceSAjit Khaparde req = cmd.va; 29474762f6ceSAjit Khaparde 29484762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 29494762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 29504762f6ceSAjit Khaparde payload_len, wrb, &cmd); 29514762f6ceSAjit Khaparde 29524762f6ceSAjit Khaparde req->hdr.version = 1; 29534762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 29544762f6ceSAjit Khaparde 29554762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 29564762f6ceSAjit Khaparde if (!status) { 29574762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 29584762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 29594762f6ceSAjit Khaparde 29604762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 29614762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 29624762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 29634762f6ceSAjit Khaparde status = -1; 29644762f6ceSAjit Khaparde goto err; 29654762f6ceSAjit Khaparde } 29664762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 29674762f6ceSAjit Khaparde } 29684762f6ceSAjit Khaparde err: 29694762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 2970d98ef50fSSuresh Reddy if (cmd.va) 29714762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 29724762f6ceSAjit Khaparde return status; 2973941a77d5SSomnath Kotur 2974941a77d5SSomnath Kotur } 2975941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 2976941a77d5SSomnath Kotur struct be_dma_mem *cmd) 2977941a77d5SSomnath Kotur { 2978941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 2979941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 2980941a77d5SSomnath Kotur int status; 2981941a77d5SSomnath Kotur 2982941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 2983941a77d5SSomnath Kotur return -1; 2984941a77d5SSomnath Kotur 2985941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 2986941a77d5SSomnath Kotur if (!wrb) { 2987941a77d5SSomnath Kotur status = -EBUSY; 2988941a77d5SSomnath Kotur goto err; 2989941a77d5SSomnath Kotur } 2990941a77d5SSomnath Kotur 2991941a77d5SSomnath Kotur req = cmd->va; 2992941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2993941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 2994941a77d5SSomnath Kotur cmd->size, wrb, cmd); 2995941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 2996941a77d5SSomnath Kotur 2997941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 2998941a77d5SSomnath Kotur err: 2999941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3000941a77d5SSomnath Kotur return status; 3001941a77d5SSomnath Kotur } 3002941a77d5SSomnath Kotur 3003941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3004941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3005941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3006941a77d5SSomnath Kotur { 3007941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3008941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3009941a77d5SSomnath Kotur int status; 3010941a77d5SSomnath Kotur 3011941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3012941a77d5SSomnath Kotur 3013941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3014941a77d5SSomnath Kotur if (!wrb) { 3015941a77d5SSomnath Kotur status = -EBUSY; 3016941a77d5SSomnath Kotur goto err; 3017941a77d5SSomnath Kotur } 3018941a77d5SSomnath Kotur 3019941a77d5SSomnath Kotur req = cmd->va; 3020941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3021941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3022941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3023941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3024941a77d5SSomnath Kotur 3025941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3026941a77d5SSomnath Kotur err: 3027941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3028941a77d5SSomnath Kotur return status; 30294762f6ceSAjit Khaparde } 30306a4ab669SParav Pandit 3031b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3032b4e32a71SPadmanabh Ratnakar { 3033b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3034b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3035b4e32a71SPadmanabh Ratnakar int status; 3036b4e32a71SPadmanabh Ratnakar 3037b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3038b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3039b4e32a71SPadmanabh Ratnakar return 0; 3040b4e32a71SPadmanabh Ratnakar } 3041b4e32a71SPadmanabh Ratnakar 3042b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3043b4e32a71SPadmanabh Ratnakar 3044b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3045b4e32a71SPadmanabh Ratnakar if (!wrb) { 3046b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3047b4e32a71SPadmanabh Ratnakar goto err; 3048b4e32a71SPadmanabh Ratnakar } 3049b4e32a71SPadmanabh Ratnakar 3050b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3051b4e32a71SPadmanabh Ratnakar 3052b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3053b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3054b4e32a71SPadmanabh Ratnakar NULL); 3055b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3056b4e32a71SPadmanabh Ratnakar 3057b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3058b4e32a71SPadmanabh Ratnakar if (!status) { 3059b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3060b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3061b4e32a71SPadmanabh Ratnakar } else { 3062b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3063b4e32a71SPadmanabh Ratnakar } 3064b4e32a71SPadmanabh Ratnakar err: 3065b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3066b4e32a71SPadmanabh Ratnakar return status; 3067b4e32a71SPadmanabh Ratnakar } 3068b4e32a71SPadmanabh Ratnakar 3069150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3070abb93951SPadmanabh Ratnakar { 3071150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3072abb93951SPadmanabh Ratnakar int i; 3073abb93951SPadmanabh Ratnakar 3074abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3075150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3076150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3077150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3078150d58c7SVasundhara Volam 3079150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3080150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3081150d58c7SVasundhara Volam } 3082950e2958SWei Yang return NULL; 3083abb93951SPadmanabh Ratnakar } 3084abb93951SPadmanabh Ratnakar 3085150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3086150d58c7SVasundhara Volam u32 desc_count) 3087150d58c7SVasundhara Volam { 3088150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3089150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3090150d58c7SVasundhara Volam int i; 3091150d58c7SVasundhara Volam 3092150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3093150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3094150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3095150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3096150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3097150d58c7SVasundhara Volam return pcie; 3098150d58c7SVasundhara Volam } 3099150d58c7SVasundhara Volam 3100150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3101150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3102150d58c7SVasundhara Volam } 3103abb93951SPadmanabh Ratnakar return NULL; 3104abb93951SPadmanabh Ratnakar } 3105abb93951SPadmanabh Ratnakar 3106abb93951SPadmanabh Ratnakar /* Uses Mbox */ 3107abb93951SPadmanabh Ratnakar int be_cmd_get_func_config(struct be_adapter *adapter) 3108abb93951SPadmanabh Ratnakar { 3109abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3110abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3111abb93951SPadmanabh Ratnakar int status; 3112abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3113abb93951SPadmanabh Ratnakar 3114d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3115d98ef50fSSuresh Reddy return -1; 3116d98ef50fSSuresh Reddy 3117abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3118abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3119abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3120abb93951SPadmanabh Ratnakar &cmd.dma); 3121abb93951SPadmanabh Ratnakar if (!cmd.va) { 3122abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3123d98ef50fSSuresh Reddy status = -ENOMEM; 3124d98ef50fSSuresh Reddy goto err; 3125abb93951SPadmanabh Ratnakar } 3126abb93951SPadmanabh Ratnakar 3127abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3128abb93951SPadmanabh Ratnakar if (!wrb) { 3129abb93951SPadmanabh Ratnakar status = -EBUSY; 3130abb93951SPadmanabh Ratnakar goto err; 3131abb93951SPadmanabh Ratnakar } 3132abb93951SPadmanabh Ratnakar 3133abb93951SPadmanabh Ratnakar req = cmd.va; 3134abb93951SPadmanabh Ratnakar 3135abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3136abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3137abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3138abb93951SPadmanabh Ratnakar 313928710c55SKalesh AP if (skyhawk_chip(adapter)) 314028710c55SKalesh AP req->hdr.version = 1; 314128710c55SKalesh AP 3142abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3143abb93951SPadmanabh Ratnakar if (!status) { 3144abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3145abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3146150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3147abb93951SPadmanabh Ratnakar 3148150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3149abb93951SPadmanabh Ratnakar if (!desc) { 3150abb93951SPadmanabh Ratnakar status = -EINVAL; 3151abb93951SPadmanabh Ratnakar goto err; 3152abb93951SPadmanabh Ratnakar } 3153abb93951SPadmanabh Ratnakar 3154d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 3155abb93951SPadmanabh Ratnakar adapter->max_pmac_cnt = le16_to_cpu(desc->unicast_mac_count); 3156abb93951SPadmanabh Ratnakar adapter->max_vlans = le16_to_cpu(desc->vlan_count); 3157abb93951SPadmanabh Ratnakar adapter->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 3158abb93951SPadmanabh Ratnakar adapter->max_tx_queues = le16_to_cpu(desc->txq_count); 3159abb93951SPadmanabh Ratnakar adapter->max_rss_queues = le16_to_cpu(desc->rssq_count); 3160abb93951SPadmanabh Ratnakar adapter->max_rx_queues = le16_to_cpu(desc->rq_count); 3161abb93951SPadmanabh Ratnakar 3162abb93951SPadmanabh Ratnakar adapter->max_event_queues = le16_to_cpu(desc->eq_count); 3163abb93951SPadmanabh Ratnakar adapter->if_cap_flags = le32_to_cpu(desc->cap_flags); 31643da988c9SSarveshwar Bandi 31653da988c9SSarveshwar Bandi /* Clear flags that driver is not interested in */ 31663da988c9SSarveshwar Bandi adapter->if_cap_flags &= BE_IF_CAP_FLAGS_WANT; 3167abb93951SPadmanabh Ratnakar } 3168abb93951SPadmanabh Ratnakar err: 3169abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3170d98ef50fSSuresh Reddy if (cmd.va) 3171d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3172abb93951SPadmanabh Ratnakar return status; 3173abb93951SPadmanabh Ratnakar } 3174abb93951SPadmanabh Ratnakar 3175a05f99dbSVasundhara Volam /* Uses mbox */ 31764188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3177a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3178abb93951SPadmanabh Ratnakar { 3179abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3180abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3181abb93951SPadmanabh Ratnakar int status; 3182abb93951SPadmanabh Ratnakar 3183a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3184a05f99dbSVasundhara Volam return -1; 3185a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3186a05f99dbSVasundhara Volam 3187a05f99dbSVasundhara Volam req = cmd->va; 3188a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3189a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3190a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3191a05f99dbSVasundhara Volam 3192a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3193a05f99dbSVasundhara Volam req->hdr.domain = domain; 3194a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3195a05f99dbSVasundhara Volam req->hdr.version = 1; 3196a05f99dbSVasundhara Volam 3197a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3198a05f99dbSVasundhara Volam 3199a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3200a05f99dbSVasundhara Volam return status; 3201abb93951SPadmanabh Ratnakar } 3202abb93951SPadmanabh Ratnakar 3203a05f99dbSVasundhara Volam /* Uses sync mcc */ 32044188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3205a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3206a05f99dbSVasundhara Volam { 3207a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3208a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3209a05f99dbSVasundhara Volam int status; 3210a05f99dbSVasundhara Volam 3211abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3212abb93951SPadmanabh Ratnakar 3213abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3214abb93951SPadmanabh Ratnakar if (!wrb) { 3215abb93951SPadmanabh Ratnakar status = -EBUSY; 3216abb93951SPadmanabh Ratnakar goto err; 3217abb93951SPadmanabh Ratnakar } 3218abb93951SPadmanabh Ratnakar 3219a05f99dbSVasundhara Volam req = cmd->va; 3220abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3221abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3222a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3223abb93951SPadmanabh Ratnakar 3224abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3225abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3226a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3227a05f99dbSVasundhara Volam req->hdr.version = 1; 3228abb93951SPadmanabh Ratnakar 3229abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3230a05f99dbSVasundhara Volam 3231a05f99dbSVasundhara Volam err: 3232a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3233a05f99dbSVasundhara Volam return status; 3234a05f99dbSVasundhara Volam } 3235a05f99dbSVasundhara Volam 3236a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 3237a05f99dbSVasundhara Volam int be_cmd_get_profile_config(struct be_adapter *adapter, u32 *cap_flags, 3238a05f99dbSVasundhara Volam u16 *txq_count, u8 domain) 3239a05f99dbSVasundhara Volam { 3240150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3241150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3242150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3243a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3244a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3245150d58c7SVasundhara Volam u32 desc_count; 3246a05f99dbSVasundhara Volam int status; 3247a05f99dbSVasundhara Volam 3248a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3249a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3250150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3251150d58c7SVasundhara Volam if (!cmd.va) 3252a05f99dbSVasundhara Volam return -ENOMEM; 3253a05f99dbSVasundhara Volam 3254a05f99dbSVasundhara Volam if (!mccq->created) 3255a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3256a05f99dbSVasundhara Volam else 3257a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3258150d58c7SVasundhara Volam if (status) 3259abb93951SPadmanabh Ratnakar goto err; 3260150d58c7SVasundhara Volam 3261150d58c7SVasundhara Volam resp = cmd.va; 3262150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3263150d58c7SVasundhara Volam 3264150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3265150d58c7SVasundhara Volam desc_count); 3266150d58c7SVasundhara Volam if (pcie) 3267150d58c7SVasundhara Volam adapter->dev_num_vfs = le16_to_cpu(pcie->num_vfs); 3268150d58c7SVasundhara Volam 3269150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 3270150d58c7SVasundhara Volam if (nic) { 3271a05f99dbSVasundhara Volam if (cap_flags) 3272150d58c7SVasundhara Volam *cap_flags = le32_to_cpu(nic->cap_flags); 3273a05f99dbSVasundhara Volam if (txq_count) 3274150d58c7SVasundhara Volam *txq_count = le16_to_cpu(nic->txq_count); 3275abb93951SPadmanabh Ratnakar } 3276abb93951SPadmanabh Ratnakar err: 3277a05f99dbSVasundhara Volam if (cmd.va) 3278150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3279abb93951SPadmanabh Ratnakar return status; 3280abb93951SPadmanabh Ratnakar } 3281abb93951SPadmanabh Ratnakar 3282150d58c7SVasundhara Volam /* Currently only Lancer uses this command and it supports version 0 only 3283150d58c7SVasundhara Volam * Uses sync mcc 3284150d58c7SVasundhara Volam */ 3285d5c18473SPadmanabh Ratnakar int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, 3286d5c18473SPadmanabh Ratnakar u8 domain) 3287d5c18473SPadmanabh Ratnakar { 3288d5c18473SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3289d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3290d5c18473SPadmanabh Ratnakar int status; 3291d5c18473SPadmanabh Ratnakar 3292d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3293d5c18473SPadmanabh Ratnakar 3294d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3295d5c18473SPadmanabh Ratnakar if (!wrb) { 3296d5c18473SPadmanabh Ratnakar status = -EBUSY; 3297d5c18473SPadmanabh Ratnakar goto err; 3298d5c18473SPadmanabh Ratnakar } 3299d5c18473SPadmanabh Ratnakar 3300d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3301d5c18473SPadmanabh Ratnakar 3302d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3303d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3304d5c18473SPadmanabh Ratnakar wrb, NULL); 3305d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3306d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3307150d58c7SVasundhara Volam req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3308150d58c7SVasundhara Volam req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3309d5c18473SPadmanabh Ratnakar req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV); 3310d5c18473SPadmanabh Ratnakar req->nic_desc.pf_num = adapter->pf_number; 3311d5c18473SPadmanabh Ratnakar req->nic_desc.vf_num = domain; 3312d5c18473SPadmanabh Ratnakar 3313d5c18473SPadmanabh Ratnakar /* Mark fields invalid */ 3314d5c18473SPadmanabh Ratnakar req->nic_desc.unicast_mac_count = 0xFFFF; 3315d5c18473SPadmanabh Ratnakar req->nic_desc.mcc_count = 0xFFFF; 3316d5c18473SPadmanabh Ratnakar req->nic_desc.vlan_count = 0xFFFF; 3317d5c18473SPadmanabh Ratnakar req->nic_desc.mcast_mac_count = 0xFFFF; 3318d5c18473SPadmanabh Ratnakar req->nic_desc.txq_count = 0xFFFF; 3319d5c18473SPadmanabh Ratnakar req->nic_desc.rq_count = 0xFFFF; 3320d5c18473SPadmanabh Ratnakar req->nic_desc.rssq_count = 0xFFFF; 3321d5c18473SPadmanabh Ratnakar req->nic_desc.lro_count = 0xFFFF; 3322d5c18473SPadmanabh Ratnakar req->nic_desc.cq_count = 0xFFFF; 3323d5c18473SPadmanabh Ratnakar req->nic_desc.toe_conn_count = 0xFFFF; 3324d5c18473SPadmanabh Ratnakar req->nic_desc.eq_count = 0xFFFF; 3325d5c18473SPadmanabh Ratnakar req->nic_desc.link_param = 0xFF; 3326d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = 0xFFFFFFFF; 3327d5c18473SPadmanabh Ratnakar req->nic_desc.acpi_params = 0xFF; 3328d5c18473SPadmanabh Ratnakar req->nic_desc.wol_param = 0x0F; 3329d5c18473SPadmanabh Ratnakar 3330d5c18473SPadmanabh Ratnakar /* Change BW */ 3331d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = cpu_to_le32(bps); 3332d5c18473SPadmanabh Ratnakar req->nic_desc.bw_max = cpu_to_le32(bps); 3333d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3334d5c18473SPadmanabh Ratnakar err: 3335d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3336d5c18473SPadmanabh Ratnakar return status; 3337d5c18473SPadmanabh Ratnakar } 3338d5c18473SPadmanabh Ratnakar 33394c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 33404c876616SSathya Perla int vf_num) 33414c876616SSathya Perla { 33424c876616SSathya Perla struct be_mcc_wrb *wrb; 33434c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 33444c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 33454c876616SSathya Perla int status; 33464c876616SSathya Perla 33474c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 33484c876616SSathya Perla 33494c876616SSathya Perla wrb = wrb_from_mccq(adapter); 33504c876616SSathya Perla if (!wrb) { 33514c876616SSathya Perla status = -EBUSY; 33524c876616SSathya Perla goto err; 33534c876616SSathya Perla } 33544c876616SSathya Perla req = embedded_payload(wrb); 33554c876616SSathya Perla 33564c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 33574c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 33584c876616SSathya Perla wrb, NULL); 33594c876616SSathya Perla req->hdr.domain = vf_num + 1; 33604c876616SSathya Perla 33614c876616SSathya Perla status = be_mcc_notify_wait(adapter); 33624c876616SSathya Perla if (!status) { 33634c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 33644c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 33654c876616SSathya Perla } 33664c876616SSathya Perla 33674c876616SSathya Perla err: 33684c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 33694c876616SSathya Perla return status; 33704c876616SSathya Perla } 33714c876616SSathya Perla 33725c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 33735c510811SSomnath Kotur { 33745c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 33755c510811SSomnath Kotur u32 reg_val; 33765c510811SSomnath Kotur int status = 0, i; 33775c510811SSomnath Kotur 33785c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 33795c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 33805c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 33815c510811SSomnath Kotur break; 33825c510811SSomnath Kotur 33835c510811SSomnath Kotur ssleep(1); 33845c510811SSomnath Kotur } 33855c510811SSomnath Kotur 33865c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 33875c510811SSomnath Kotur status = -1; 33885c510811SSomnath Kotur 33895c510811SSomnath Kotur return status; 33905c510811SSomnath Kotur } 33915c510811SSomnath Kotur 33925c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 33935c510811SSomnath Kotur { 33945c510811SSomnath Kotur int status = 0; 33955c510811SSomnath Kotur 33965c510811SSomnath Kotur status = lancer_wait_idle(adapter); 33975c510811SSomnath Kotur if (status) 33985c510811SSomnath Kotur return status; 33995c510811SSomnath Kotur 34005c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 34015c510811SSomnath Kotur 34025c510811SSomnath Kotur return status; 34035c510811SSomnath Kotur } 34045c510811SSomnath Kotur 34055c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 34065c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 34075c510811SSomnath Kotur { 34085c510811SSomnath Kotur u32 sliport_status = 0; 34095c510811SSomnath Kotur 34105c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 34115c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 34125c510811SSomnath Kotur } 34135c510811SSomnath Kotur 34145c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 34155c510811SSomnath Kotur { 34165c510811SSomnath Kotur int status; 34175c510811SSomnath Kotur 34185c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 34195c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 34205c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 34215c510811SSomnath Kotur if (status < 0) { 34225c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 34235c510811SSomnath Kotur return status; 34245c510811SSomnath Kotur } 34255c510811SSomnath Kotur 34265c510811SSomnath Kotur status = lancer_wait_idle(adapter); 34275c510811SSomnath Kotur if (status) 34285c510811SSomnath Kotur return status; 34295c510811SSomnath Kotur 34305c510811SSomnath Kotur if (!dump_present(adapter)) { 34315c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 34325c510811SSomnath Kotur return -1; 34335c510811SSomnath Kotur } 34345c510811SSomnath Kotur 34355c510811SSomnath Kotur return 0; 34365c510811SSomnath Kotur } 34375c510811SSomnath Kotur 3438dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3439dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3440dcf7ebbaSPadmanabh Ratnakar { 3441dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3442dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3443dcf7ebbaSPadmanabh Ratnakar int status; 3444dcf7ebbaSPadmanabh Ratnakar 3445dcf7ebbaSPadmanabh Ratnakar if (!lancer_chip(adapter)) 3446dcf7ebbaSPadmanabh Ratnakar return 0; 3447dcf7ebbaSPadmanabh Ratnakar 3448dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3449dcf7ebbaSPadmanabh Ratnakar 3450dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3451dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3452dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3453dcf7ebbaSPadmanabh Ratnakar goto err; 3454dcf7ebbaSPadmanabh Ratnakar } 3455dcf7ebbaSPadmanabh Ratnakar 3456dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3457dcf7ebbaSPadmanabh Ratnakar 3458dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3459dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3460dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3461dcf7ebbaSPadmanabh Ratnakar 3462dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3463dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3464dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3465dcf7ebbaSPadmanabh Ratnakar err: 3466dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3467dcf7ebbaSPadmanabh Ratnakar return status; 3468dcf7ebbaSPadmanabh Ratnakar } 3469dcf7ebbaSPadmanabh Ratnakar 347068c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 347168c45a2dSSomnath Kotur { 347268c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 347368c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 347468c45a2dSSomnath Kotur int status; 347568c45a2dSSomnath Kotur 347668c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 347768c45a2dSSomnath Kotur return -1; 347868c45a2dSSomnath Kotur 347968c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 348068c45a2dSSomnath Kotur 348168c45a2dSSomnath Kotur req = embedded_payload(wrb); 348268c45a2dSSomnath Kotur 348368c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 348468c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 348568c45a2dSSomnath Kotur wrb, NULL); 348668c45a2dSSomnath Kotur 348768c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 348868c45a2dSSomnath Kotur 348968c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 349068c45a2dSSomnath Kotur 349168c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 349268c45a2dSSomnath Kotur return status; 349368c45a2dSSomnath Kotur } 349468c45a2dSSomnath Kotur 34956a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 34966a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 34976a4ab669SParav Pandit { 34986a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 34996a4ab669SParav Pandit struct be_mcc_wrb *wrb; 35006a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 35016a4ab669SParav Pandit struct be_cmd_req_hdr *req; 35026a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 35036a4ab669SParav Pandit int status; 35046a4ab669SParav Pandit 35056a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 35066a4ab669SParav Pandit 35076a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 35086a4ab669SParav Pandit if (!wrb) { 35096a4ab669SParav Pandit status = -EBUSY; 35106a4ab669SParav Pandit goto err; 35116a4ab669SParav Pandit } 35126a4ab669SParav Pandit req = embedded_payload(wrb); 35136a4ab669SParav Pandit resp = embedded_payload(wrb); 35146a4ab669SParav Pandit 35156a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 35166a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 35176a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 35186a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 35196a4ab669SParav Pandit 35206a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 35216a4ab669SParav Pandit if (cmd_status) 35226a4ab669SParav Pandit *cmd_status = (status & 0xffff); 35236a4ab669SParav Pandit if (ext_status) 35246a4ab669SParav Pandit *ext_status = 0; 35256a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 35266a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 35276a4ab669SParav Pandit err: 35286a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 35296a4ab669SParav Pandit return status; 35306a4ab669SParav Pandit } 35316a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3532