19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 144652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 145652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 146652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1479aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1489aebddd1SJeff Kirsher complete(&adapter->flash_compl); 1499aebddd1SJeff Kirsher } 1509aebddd1SJeff Kirsher 1519aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 152652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 153652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 154652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1559aebddd1SJeff Kirsher be_parse_stats(adapter); 1569aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1579aebddd1SJeff Kirsher } 158652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 159652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1603de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 161652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1623de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1633de09455SSomnath Kotur resp->on_die_temperature; 1643de09455SSomnath Kotur } 1659aebddd1SJeff Kirsher } else { 166652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1677aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1683de09455SSomnath Kotur 1699aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1709aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1719aebddd1SJeff Kirsher goto done; 1729aebddd1SJeff Kirsher 1739aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 17497f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 175522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 17697f1d8cdSVasundhara Volam opcode, subsystem); 1779aebddd1SJeff Kirsher } else { 1789aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1799aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18097f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18197f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 1839aebddd1SJeff Kirsher } 1849aebddd1SJeff Kirsher } 1859aebddd1SJeff Kirsher done: 1869aebddd1SJeff Kirsher return compl_status; 1879aebddd1SJeff Kirsher } 1889aebddd1SJeff Kirsher 1899aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1909aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 1919aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 1929aebddd1SJeff Kirsher { 193b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 19442f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 195b236916aSAjit Khaparde 1962e177a5cSPadmanabh Ratnakar /* Ignore physical link event */ 1972e177a5cSPadmanabh Ratnakar if (lancer_chip(adapter) && 1982e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 1992e177a5cSPadmanabh Ratnakar return; 2002e177a5cSPadmanabh Ratnakar 201b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 202b236916aSAjit Khaparde * it may not be received in some cases. 203b236916aSAjit Khaparde */ 204b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 2059aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 2069aebddd1SJeff Kirsher } 2079aebddd1SJeff Kirsher 2089aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2099aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2109aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2119aebddd1SJeff Kirsher { 2129aebddd1SJeff Kirsher if (evt->valid) { 2139aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2149aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2159aebddd1SJeff Kirsher adapter->recommended_prio = 2169aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2179aebddd1SJeff Kirsher } 2189aebddd1SJeff Kirsher } 2199aebddd1SJeff Kirsher 220323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2219aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2229aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2239aebddd1SJeff Kirsher { 224323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 225323ff71eSSathya Perla evt->physical_port == adapter->port_num) 226323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2279aebddd1SJeff Kirsher } 2289aebddd1SJeff Kirsher 2299aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2309aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2319aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2329aebddd1SJeff Kirsher { 2339aebddd1SJeff Kirsher if (evt->enabled) 234939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 2359aebddd1SJeff Kirsher else 2369aebddd1SJeff Kirsher adapter->pvid = 0; 2379aebddd1SJeff Kirsher } 2389aebddd1SJeff Kirsher 2399aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2409aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2419aebddd1SJeff Kirsher { 2429aebddd1SJeff Kirsher u8 event_type = 0; 2439aebddd1SJeff Kirsher 2449aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2459aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2469aebddd1SJeff Kirsher 2479aebddd1SJeff Kirsher switch (event_type) { 2489aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2499aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2509aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2519aebddd1SJeff Kirsher break; 2529aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2539aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2549aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2559aebddd1SJeff Kirsher break; 2569aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2579aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2589aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2599aebddd1SJeff Kirsher break; 2609aebddd1SJeff Kirsher default: 26105ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 26205ccaa2bSVasundhara Volam event_type); 2639aebddd1SJeff Kirsher break; 2649aebddd1SJeff Kirsher } 2659aebddd1SJeff Kirsher } 2669aebddd1SJeff Kirsher 267bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 268bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 269bc0c3405SAjit Khaparde { 270bc0c3405SAjit Khaparde u8 event_type = 0; 271bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 272bc0c3405SAjit Khaparde 273bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 274bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 275bc0c3405SAjit Khaparde 276bc0c3405SAjit Khaparde switch (event_type) { 277bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 278bc0c3405SAjit Khaparde if (evt->valid) 279bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 280bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 281bc0c3405SAjit Khaparde break; 282bc0c3405SAjit Khaparde default: 28305ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 28405ccaa2bSVasundhara Volam event_type); 285bc0c3405SAjit Khaparde break; 286bc0c3405SAjit Khaparde } 287bc0c3405SAjit Khaparde } 288bc0c3405SAjit Khaparde 2899aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 2909aebddd1SJeff Kirsher { 2919aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2929aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2939aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 2949aebddd1SJeff Kirsher } 2959aebddd1SJeff Kirsher 2969aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 2979aebddd1SJeff Kirsher { 2989aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2999aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3009aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3019aebddd1SJeff Kirsher } 3029aebddd1SJeff Kirsher 303bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 304bc0c3405SAjit Khaparde { 305bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 306bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 307bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 308bc0c3405SAjit Khaparde } 309bc0c3405SAjit Khaparde 3109aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3119aebddd1SJeff Kirsher { 3129aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3139aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3149aebddd1SJeff Kirsher 3159aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3169aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3179aebddd1SJeff Kirsher return compl; 3189aebddd1SJeff Kirsher } 3199aebddd1SJeff Kirsher return NULL; 3209aebddd1SJeff Kirsher } 3219aebddd1SJeff Kirsher 3229aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3239aebddd1SJeff Kirsher { 3249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3259aebddd1SJeff Kirsher 3269aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3279aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3289aebddd1SJeff Kirsher 3299aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3309aebddd1SJeff Kirsher } 3319aebddd1SJeff Kirsher 3329aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3339aebddd1SJeff Kirsher { 334a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 335a323d9bfSSathya Perla 3369aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 337a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 338a323d9bfSSathya Perla 339a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3409aebddd1SJeff Kirsher } 3419aebddd1SJeff Kirsher 34210ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3439aebddd1SJeff Kirsher { 3449aebddd1SJeff Kirsher struct be_mcc_compl *compl; 34510ef9ab4SSathya Perla int num = 0, status = 0; 3469aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3479aebddd1SJeff Kirsher 348072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3499aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3509aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3519aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3529aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3539aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3549aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3559aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3569aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3579aebddd1SJeff Kirsher compl->flags, compl); 358bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 359bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 360bc0c3405SAjit Khaparde compl->flags, compl); 3619aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 36210ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3639aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3649aebddd1SJeff Kirsher } 3659aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3669aebddd1SJeff Kirsher num++; 3679aebddd1SJeff Kirsher } 3689aebddd1SJeff Kirsher 36910ef9ab4SSathya Perla if (num) 37010ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 37110ef9ab4SSathya Perla 372072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 37310ef9ab4SSathya Perla return status; 3749aebddd1SJeff Kirsher } 3759aebddd1SJeff Kirsher 3769aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3779aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3789aebddd1SJeff Kirsher { 3799aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 38010ef9ab4SSathya Perla int i, status = 0; 3819aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3829aebddd1SJeff Kirsher 3836589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 3846589ade0SSathya Perla if (be_error(adapter)) 3859aebddd1SJeff Kirsher return -EIO; 3869aebddd1SJeff Kirsher 387072a9c48SAmerigo Wang local_bh_disable(); 38810ef9ab4SSathya Perla status = be_process_mcc(adapter); 389072a9c48SAmerigo Wang local_bh_enable(); 3909aebddd1SJeff Kirsher 3919aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 3929aebddd1SJeff Kirsher break; 3939aebddd1SJeff Kirsher udelay(100); 3949aebddd1SJeff Kirsher } 3959aebddd1SJeff Kirsher if (i == mcc_timeout) { 3966589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 3976589ade0SSathya Perla adapter->fw_timeout = true; 398652bf646SPadmanabh Ratnakar return -EIO; 3999aebddd1SJeff Kirsher } 4009aebddd1SJeff Kirsher return status; 4019aebddd1SJeff Kirsher } 4029aebddd1SJeff Kirsher 4039aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4049aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4059aebddd1SJeff Kirsher { 406652bf646SPadmanabh Ratnakar int status; 407652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 408652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 409652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 410652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 411652bf646SPadmanabh Ratnakar 412652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 413652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 414652bf646SPadmanabh Ratnakar 415652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 416652bf646SPadmanabh Ratnakar 4179aebddd1SJeff Kirsher be_mcc_notify(adapter); 418652bf646SPadmanabh Ratnakar 419652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 420652bf646SPadmanabh Ratnakar if (status == -EIO) 421652bf646SPadmanabh Ratnakar goto out; 422652bf646SPadmanabh Ratnakar 423652bf646SPadmanabh Ratnakar status = resp->status; 424652bf646SPadmanabh Ratnakar out: 425652bf646SPadmanabh Ratnakar return status; 4269aebddd1SJeff Kirsher } 4279aebddd1SJeff Kirsher 4289aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4299aebddd1SJeff Kirsher { 4309aebddd1SJeff Kirsher int msecs = 0; 4319aebddd1SJeff Kirsher u32 ready; 4329aebddd1SJeff Kirsher 4336589ade0SSathya Perla do { 4346589ade0SSathya Perla if (be_error(adapter)) 4359aebddd1SJeff Kirsher return -EIO; 4369aebddd1SJeff Kirsher 4379aebddd1SJeff Kirsher ready = ioread32(db); 438434b3648SSathya Perla if (ready == 0xffffffff) 4399aebddd1SJeff Kirsher return -1; 4409aebddd1SJeff Kirsher 4419aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4429aebddd1SJeff Kirsher if (ready) 4439aebddd1SJeff Kirsher break; 4449aebddd1SJeff Kirsher 4459aebddd1SJeff Kirsher if (msecs > 4000) { 4466589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4476589ade0SSathya Perla adapter->fw_timeout = true; 448f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4499aebddd1SJeff Kirsher return -1; 4509aebddd1SJeff Kirsher } 4519aebddd1SJeff Kirsher 4529aebddd1SJeff Kirsher msleep(1); 4539aebddd1SJeff Kirsher msecs++; 4549aebddd1SJeff Kirsher } while (true); 4559aebddd1SJeff Kirsher 4569aebddd1SJeff Kirsher return 0; 4579aebddd1SJeff Kirsher } 4589aebddd1SJeff Kirsher 4599aebddd1SJeff Kirsher /* 4609aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4619aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4629aebddd1SJeff Kirsher */ 4639aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4649aebddd1SJeff Kirsher { 4659aebddd1SJeff Kirsher int status; 4669aebddd1SJeff Kirsher u32 val = 0; 4679aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4689aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4699aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4709aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4719aebddd1SJeff Kirsher 4729aebddd1SJeff Kirsher /* wait for ready to be set */ 4739aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4749aebddd1SJeff Kirsher if (status != 0) 4759aebddd1SJeff Kirsher return status; 4769aebddd1SJeff Kirsher 4779aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4789aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4799aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4809aebddd1SJeff Kirsher iowrite32(val, db); 4819aebddd1SJeff Kirsher 4829aebddd1SJeff Kirsher /* wait for ready to be set */ 4839aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4849aebddd1SJeff Kirsher if (status != 0) 4859aebddd1SJeff Kirsher return status; 4869aebddd1SJeff Kirsher 4879aebddd1SJeff Kirsher val = 0; 4889aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 4899aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 4909aebddd1SJeff Kirsher iowrite32(val, db); 4919aebddd1SJeff Kirsher 4929aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4939aebddd1SJeff Kirsher if (status != 0) 4949aebddd1SJeff Kirsher return status; 4959aebddd1SJeff Kirsher 4969aebddd1SJeff Kirsher /* A cq entry has been made now */ 4979aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 4989aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 4999aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5009aebddd1SJeff Kirsher if (status) 5019aebddd1SJeff Kirsher return status; 5029aebddd1SJeff Kirsher } else { 5039aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5049aebddd1SJeff Kirsher return -1; 5059aebddd1SJeff Kirsher } 5069aebddd1SJeff Kirsher return 0; 5079aebddd1SJeff Kirsher } 5089aebddd1SJeff Kirsher 509c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5109aebddd1SJeff Kirsher { 5119aebddd1SJeff Kirsher u32 sem; 5129aebddd1SJeff Kirsher 513c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 514c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5159aebddd1SJeff Kirsher else 516c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 517c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 518c5b3ad4cSSathya Perla 519c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5209aebddd1SJeff Kirsher } 5219aebddd1SJeff Kirsher 522bf99e50dSPadmanabh Ratnakar int lancer_wait_ready(struct be_adapter *adapter) 523bf99e50dSPadmanabh Ratnakar { 524bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 525bf99e50dSPadmanabh Ratnakar u32 sliport_status; 526bf99e50dSPadmanabh Ratnakar int status = 0, i; 527bf99e50dSPadmanabh Ratnakar 528bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 529bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 530bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 531bf99e50dSPadmanabh Ratnakar break; 532bf99e50dSPadmanabh Ratnakar 533bf99e50dSPadmanabh Ratnakar msleep(1000); 534bf99e50dSPadmanabh Ratnakar } 535bf99e50dSPadmanabh Ratnakar 536bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 537bf99e50dSPadmanabh Ratnakar status = -1; 538bf99e50dSPadmanabh Ratnakar 539bf99e50dSPadmanabh Ratnakar return status; 540bf99e50dSPadmanabh Ratnakar } 541bf99e50dSPadmanabh Ratnakar 54267297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 54367297ad8SPadmanabh Ratnakar { 54467297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 54567297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 54667297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 54767297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 54867297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 54967297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 55067297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 55167297ad8SPadmanabh Ratnakar 55267297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 55367297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 55467297ad8SPadmanabh Ratnakar return true; 55567297ad8SPadmanabh Ratnakar } 55667297ad8SPadmanabh Ratnakar return false; 55767297ad8SPadmanabh Ratnakar } 55867297ad8SPadmanabh Ratnakar 559bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 560bf99e50dSPadmanabh Ratnakar { 561bf99e50dSPadmanabh Ratnakar int status; 562bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 56367297ad8SPadmanabh Ratnakar bool resource_error; 56467297ad8SPadmanabh Ratnakar 56567297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 56667297ad8SPadmanabh Ratnakar if (resource_error) 56701e5b2c4SSomnath Kotur return -EAGAIN; 56867297ad8SPadmanabh Ratnakar 569bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 570bf99e50dSPadmanabh Ratnakar if (!status) { 571bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 572bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 573bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 574bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 575bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 576bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 577bf99e50dSPadmanabh Ratnakar 578bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 579bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 580bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 581bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 582bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 583bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 584bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 585bf99e50dSPadmanabh Ratnakar status = -1; 586bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 587bf99e50dSPadmanabh Ratnakar status = -1; 588bf99e50dSPadmanabh Ratnakar } 589bf99e50dSPadmanabh Ratnakar } 59067297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 59167297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 59267297ad8SPadmanabh Ratnakar * when PF provisions resources. 59367297ad8SPadmanabh Ratnakar */ 59467297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 59501e5b2c4SSomnath Kotur if (resource_error) 59601e5b2c4SSomnath Kotur status = -EAGAIN; 59767297ad8SPadmanabh Ratnakar 598bf99e50dSPadmanabh Ratnakar return status; 599bf99e50dSPadmanabh Ratnakar } 600bf99e50dSPadmanabh Ratnakar 601bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6029aebddd1SJeff Kirsher { 6039aebddd1SJeff Kirsher u16 stage; 6049aebddd1SJeff Kirsher int status, timeout = 0; 6059aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6069aebddd1SJeff Kirsher 607bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 608bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 609bf99e50dSPadmanabh Ratnakar return status; 610bf99e50dSPadmanabh Ratnakar } 611bf99e50dSPadmanabh Ratnakar 6129aebddd1SJeff Kirsher do { 613c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 61466d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 61566d29cbcSGavin Shan return 0; 61666d29cbcSGavin Shan 61766d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 61866d29cbcSGavin Shan timeout); 6199aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6209aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6219aebddd1SJeff Kirsher return -EINTR; 6229aebddd1SJeff Kirsher } 6239aebddd1SJeff Kirsher timeout += 2; 6243ab81b5fSSomnath Kotur } while (timeout < 60); 6259aebddd1SJeff Kirsher 6269aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6279aebddd1SJeff Kirsher return -1; 6289aebddd1SJeff Kirsher } 6299aebddd1SJeff Kirsher 6309aebddd1SJeff Kirsher 6319aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6329aebddd1SJeff Kirsher { 6339aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6349aebddd1SJeff Kirsher } 6359aebddd1SJeff Kirsher 636bea50988SSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, 637bea50988SSathya Perla unsigned long addr) 638bea50988SSathya Perla { 639bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 640bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 641bea50988SSathya Perla } 6429aebddd1SJeff Kirsher 6439aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 644106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 645106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 646106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 647106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6489aebddd1SJeff Kirsher { 649106df1e3SSomnath Kotur struct be_sge *sge; 650106df1e3SSomnath Kotur 6519aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6529aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6539aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6549aebddd1SJeff Kirsher req_hdr->version = 0; 655bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 656106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 657106df1e3SSomnath Kotur if (mem) { 658106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 659106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 660106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 661106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 662106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 663106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 664106df1e3SSomnath Kotur } else 665106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 666106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6679aebddd1SJeff Kirsher } 6689aebddd1SJeff Kirsher 6699aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6709aebddd1SJeff Kirsher struct be_dma_mem *mem) 6719aebddd1SJeff Kirsher { 6729aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6739aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6749aebddd1SJeff Kirsher 6759aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6769aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6779aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6789aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6799aebddd1SJeff Kirsher } 6809aebddd1SJeff Kirsher } 6819aebddd1SJeff Kirsher 6829aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 6839aebddd1SJeff Kirsher { 6849aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6859aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 6869aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 6879aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 6889aebddd1SJeff Kirsher return wrb; 6899aebddd1SJeff Kirsher } 6909aebddd1SJeff Kirsher 6919aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 6929aebddd1SJeff Kirsher { 6939aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 6949aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6959aebddd1SJeff Kirsher 696aa790db9SPadmanabh Ratnakar if (!mccq->created) 697aa790db9SPadmanabh Ratnakar return NULL; 698aa790db9SPadmanabh Ratnakar 6994d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7009aebddd1SJeff Kirsher return NULL; 7019aebddd1SJeff Kirsher 7029aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7039aebddd1SJeff Kirsher queue_head_inc(mccq); 7049aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7059aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7069aebddd1SJeff Kirsher return wrb; 7079aebddd1SJeff Kirsher } 7089aebddd1SJeff Kirsher 709bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 710bea50988SSathya Perla { 711bea50988SSathya Perla return adapter->mcc_obj.q.created; 712bea50988SSathya Perla } 713bea50988SSathya Perla 714bea50988SSathya Perla /* Must be used only in process context */ 715bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 716bea50988SSathya Perla { 717bea50988SSathya Perla if (use_mcc(adapter)) { 718bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 719bea50988SSathya Perla return 0; 720bea50988SSathya Perla } else { 721bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 722bea50988SSathya Perla } 723bea50988SSathya Perla } 724bea50988SSathya Perla 725bea50988SSathya Perla /* Must be used only in process context */ 726bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 727bea50988SSathya Perla { 728bea50988SSathya Perla if (use_mcc(adapter)) 729bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 730bea50988SSathya Perla else 731bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 732bea50988SSathya Perla } 733bea50988SSathya Perla 734bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 735bea50988SSathya Perla struct be_mcc_wrb *wrb) 736bea50988SSathya Perla { 737bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 738bea50988SSathya Perla 739bea50988SSathya Perla if (use_mcc(adapter)) { 740bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 741bea50988SSathya Perla if (!dest_wrb) 742bea50988SSathya Perla return NULL; 743bea50988SSathya Perla } else { 744bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 745bea50988SSathya Perla } 746bea50988SSathya Perla 747bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 748bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 749bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 750bea50988SSathya Perla 751bea50988SSathya Perla return dest_wrb; 752bea50988SSathya Perla } 753bea50988SSathya Perla 754bea50988SSathya Perla /* Must be used only in process context */ 755bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 756bea50988SSathya Perla struct be_mcc_wrb *wrb) 757bea50988SSathya Perla { 758bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 759bea50988SSathya Perla int status; 760bea50988SSathya Perla 761bea50988SSathya Perla status = be_cmd_lock(adapter); 762bea50988SSathya Perla if (status) 763bea50988SSathya Perla return status; 764bea50988SSathya Perla 765bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 766bea50988SSathya Perla if (!dest_wrb) 767bea50988SSathya Perla return -EBUSY; 768bea50988SSathya Perla 769bea50988SSathya Perla if (use_mcc(adapter)) 770bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 771bea50988SSathya Perla else 772bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 773bea50988SSathya Perla 774bea50988SSathya Perla if (!status) 775bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 776bea50988SSathya Perla 777bea50988SSathya Perla be_cmd_unlock(adapter); 778bea50988SSathya Perla return status; 779bea50988SSathya Perla } 780bea50988SSathya Perla 7819aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7829aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7839aebddd1SJeff Kirsher */ 7849aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 7859aebddd1SJeff Kirsher { 7869aebddd1SJeff Kirsher u8 *wrb; 7879aebddd1SJeff Kirsher int status; 7889aebddd1SJeff Kirsher 789bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 790bf99e50dSPadmanabh Ratnakar return 0; 791bf99e50dSPadmanabh Ratnakar 7929aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7939aebddd1SJeff Kirsher return -1; 7949aebddd1SJeff Kirsher 7959aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7969aebddd1SJeff Kirsher *wrb++ = 0xFF; 7979aebddd1SJeff Kirsher *wrb++ = 0x12; 7989aebddd1SJeff Kirsher *wrb++ = 0x34; 7999aebddd1SJeff Kirsher *wrb++ = 0xFF; 8009aebddd1SJeff Kirsher *wrb++ = 0xFF; 8019aebddd1SJeff Kirsher *wrb++ = 0x56; 8029aebddd1SJeff Kirsher *wrb++ = 0x78; 8039aebddd1SJeff Kirsher *wrb = 0xFF; 8049aebddd1SJeff Kirsher 8059aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8069aebddd1SJeff Kirsher 8079aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8089aebddd1SJeff Kirsher return status; 8099aebddd1SJeff Kirsher } 8109aebddd1SJeff Kirsher 8119aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8129aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8139aebddd1SJeff Kirsher */ 8149aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8159aebddd1SJeff Kirsher { 8169aebddd1SJeff Kirsher u8 *wrb; 8179aebddd1SJeff Kirsher int status; 8189aebddd1SJeff Kirsher 819bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 820bf99e50dSPadmanabh Ratnakar return 0; 821bf99e50dSPadmanabh Ratnakar 8229aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8239aebddd1SJeff Kirsher return -1; 8249aebddd1SJeff Kirsher 8259aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8269aebddd1SJeff Kirsher *wrb++ = 0xFF; 8279aebddd1SJeff Kirsher *wrb++ = 0xAA; 8289aebddd1SJeff Kirsher *wrb++ = 0xBB; 8299aebddd1SJeff Kirsher *wrb++ = 0xFF; 8309aebddd1SJeff Kirsher *wrb++ = 0xFF; 8319aebddd1SJeff Kirsher *wrb++ = 0xCC; 8329aebddd1SJeff Kirsher *wrb++ = 0xDD; 8339aebddd1SJeff Kirsher *wrb = 0xFF; 8349aebddd1SJeff Kirsher 8359aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8369aebddd1SJeff Kirsher 8379aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8389aebddd1SJeff Kirsher return status; 8399aebddd1SJeff Kirsher } 840bf99e50dSPadmanabh Ratnakar 841f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8429aebddd1SJeff Kirsher { 8439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8449aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 845f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 846f2f781a7SSathya Perla int status, ver = 0; 8479aebddd1SJeff Kirsher 8489aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8499aebddd1SJeff Kirsher return -1; 8509aebddd1SJeff Kirsher 8519aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8529aebddd1SJeff Kirsher req = embedded_payload(wrb); 8539aebddd1SJeff Kirsher 854106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 855106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 8569aebddd1SJeff Kirsher 857f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 858f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 859f2f781a7SSathya Perla ver = 2; 860f2f781a7SSathya Perla 861f2f781a7SSathya Perla req->hdr.version = ver; 8629aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8639aebddd1SJeff Kirsher 8649aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8659aebddd1SJeff Kirsher /* 4byte eqe*/ 8669aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8679aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 868f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 8699aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 8709aebddd1SJeff Kirsher 8719aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8729aebddd1SJeff Kirsher 8739aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8749aebddd1SJeff Kirsher if (!status) { 8759aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 876f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 877f2f781a7SSathya Perla eqo->msix_idx = 878f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 879f2f781a7SSathya Perla eqo->q.created = true; 8809aebddd1SJeff Kirsher } 8819aebddd1SJeff Kirsher 8829aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8839aebddd1SJeff Kirsher return status; 8849aebddd1SJeff Kirsher } 8859aebddd1SJeff Kirsher 886f9449ab7SSathya Perla /* Use MCC */ 8879aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 8885ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 8899aebddd1SJeff Kirsher { 8909aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8919aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 8929aebddd1SJeff Kirsher int status; 8939aebddd1SJeff Kirsher 894f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 8959aebddd1SJeff Kirsher 896f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 897f9449ab7SSathya Perla if (!wrb) { 898f9449ab7SSathya Perla status = -EBUSY; 899f9449ab7SSathya Perla goto err; 900f9449ab7SSathya Perla } 9019aebddd1SJeff Kirsher req = embedded_payload(wrb); 9029aebddd1SJeff Kirsher 903106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 904106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 9055ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9069aebddd1SJeff Kirsher if (permanent) { 9079aebddd1SJeff Kirsher req->permanent = 1; 9089aebddd1SJeff Kirsher } else { 9099aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 910590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9119aebddd1SJeff Kirsher req->permanent = 0; 9129aebddd1SJeff Kirsher } 9139aebddd1SJeff Kirsher 914f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9159aebddd1SJeff Kirsher if (!status) { 9169aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9179aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9189aebddd1SJeff Kirsher } 9199aebddd1SJeff Kirsher 920f9449ab7SSathya Perla err: 921f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9229aebddd1SJeff Kirsher return status; 9239aebddd1SJeff Kirsher } 9249aebddd1SJeff Kirsher 9259aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9269aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9279aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9289aebddd1SJeff Kirsher { 9299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9309aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9319aebddd1SJeff Kirsher int status; 9329aebddd1SJeff Kirsher 9339aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9349aebddd1SJeff Kirsher 9359aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9369aebddd1SJeff Kirsher if (!wrb) { 9379aebddd1SJeff Kirsher status = -EBUSY; 9389aebddd1SJeff Kirsher goto err; 9399aebddd1SJeff Kirsher } 9409aebddd1SJeff Kirsher req = embedded_payload(wrb); 9419aebddd1SJeff Kirsher 942106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 943106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 9449aebddd1SJeff Kirsher 9459aebddd1SJeff Kirsher req->hdr.domain = domain; 9469aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9479aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9489aebddd1SJeff Kirsher 9499aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9509aebddd1SJeff Kirsher if (!status) { 9519aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 9529aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 9539aebddd1SJeff Kirsher } 9549aebddd1SJeff Kirsher 9559aebddd1SJeff Kirsher err: 9569aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 957e3a7ae2cSSomnath Kotur 958e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 959e3a7ae2cSSomnath Kotur status = -EPERM; 960e3a7ae2cSSomnath Kotur 9619aebddd1SJeff Kirsher return status; 9629aebddd1SJeff Kirsher } 9639aebddd1SJeff Kirsher 9649aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 96530128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9669aebddd1SJeff Kirsher { 9679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9689aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 9699aebddd1SJeff Kirsher int status; 9709aebddd1SJeff Kirsher 97130128031SSathya Perla if (pmac_id == -1) 97230128031SSathya Perla return 0; 97330128031SSathya Perla 9749aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9759aebddd1SJeff Kirsher 9769aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9779aebddd1SJeff Kirsher if (!wrb) { 9789aebddd1SJeff Kirsher status = -EBUSY; 9799aebddd1SJeff Kirsher goto err; 9809aebddd1SJeff Kirsher } 9819aebddd1SJeff Kirsher req = embedded_payload(wrb); 9829aebddd1SJeff Kirsher 983106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 984106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 9859aebddd1SJeff Kirsher 9869aebddd1SJeff Kirsher req->hdr.domain = dom; 9879aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9889aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 9899aebddd1SJeff Kirsher 9909aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9919aebddd1SJeff Kirsher 9929aebddd1SJeff Kirsher err: 9939aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 9949aebddd1SJeff Kirsher return status; 9959aebddd1SJeff Kirsher } 9969aebddd1SJeff Kirsher 9979aebddd1SJeff Kirsher /* Uses Mbox */ 99810ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 99910ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10009aebddd1SJeff Kirsher { 10019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10029aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10039aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10049aebddd1SJeff Kirsher void *ctxt; 10059aebddd1SJeff Kirsher int status; 10069aebddd1SJeff Kirsher 10079aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10089aebddd1SJeff Kirsher return -1; 10099aebddd1SJeff Kirsher 10109aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10119aebddd1SJeff Kirsher req = embedded_payload(wrb); 10129aebddd1SJeff Kirsher ctxt = &req->context; 10139aebddd1SJeff Kirsher 1014106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1015106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 10169aebddd1SJeff Kirsher 10179aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1018bbdc42f8SAjit Khaparde 1019bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10209aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10219aebddd1SJeff Kirsher coalesce_wm); 10229aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10239aebddd1SJeff Kirsher ctxt, no_delay); 10249aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10259aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 10269aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10279aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10289aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1029bbdc42f8SAjit Khaparde } else { 1030bbdc42f8SAjit Khaparde req->hdr.version = 2; 1031bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 1032bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1033bbdc42f8SAjit Khaparde no_delay); 1034bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1035bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 1036bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1037bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 1038bbdc42f8SAjit Khaparde ctxt, 1); 1039bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 1040bbdc42f8SAjit Khaparde ctxt, eq->id); 10419aebddd1SJeff Kirsher } 10429aebddd1SJeff Kirsher 10439aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10449aebddd1SJeff Kirsher 10459aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10469aebddd1SJeff Kirsher 10479aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10489aebddd1SJeff Kirsher if (!status) { 10499aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 10509aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 10519aebddd1SJeff Kirsher cq->created = true; 10529aebddd1SJeff Kirsher } 10539aebddd1SJeff Kirsher 10549aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10559aebddd1SJeff Kirsher 10569aebddd1SJeff Kirsher return status; 10579aebddd1SJeff Kirsher } 10589aebddd1SJeff Kirsher 10599aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10609aebddd1SJeff Kirsher { 10619aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 10629aebddd1SJeff Kirsher if (len_encoded == 16) 10639aebddd1SJeff Kirsher len_encoded = 0; 10649aebddd1SJeff Kirsher return len_encoded; 10659aebddd1SJeff Kirsher } 10669aebddd1SJeff Kirsher 10674188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 10689aebddd1SJeff Kirsher struct be_queue_info *mccq, 10699aebddd1SJeff Kirsher struct be_queue_info *cq) 10709aebddd1SJeff Kirsher { 10719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10729aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10739aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10749aebddd1SJeff Kirsher void *ctxt; 10759aebddd1SJeff Kirsher int status; 10769aebddd1SJeff Kirsher 10779aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10789aebddd1SJeff Kirsher return -1; 10799aebddd1SJeff Kirsher 10809aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10819aebddd1SJeff Kirsher req = embedded_payload(wrb); 10829aebddd1SJeff Kirsher ctxt = &req->context; 10839aebddd1SJeff Kirsher 1084106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1085106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 10869aebddd1SJeff Kirsher 10879aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10889aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 10899aebddd1SJeff Kirsher req->hdr.version = 1; 10909aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq->id); 10919aebddd1SJeff Kirsher 10929aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt, 10939aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10949aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1); 10959aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id, 10969aebddd1SJeff Kirsher ctxt, cq->id); 10979aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid, 10989aebddd1SJeff Kirsher ctxt, 1); 10999aebddd1SJeff Kirsher 11009aebddd1SJeff Kirsher } else { 11019aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11029aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11039aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11049aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11059aebddd1SJeff Kirsher } 11069aebddd1SJeff Kirsher 11079aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11089aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1109bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11109aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11119aebddd1SJeff Kirsher 11129aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11139aebddd1SJeff Kirsher 11149aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11159aebddd1SJeff Kirsher if (!status) { 11169aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11179aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11189aebddd1SJeff Kirsher mccq->created = true; 11199aebddd1SJeff Kirsher } 11209aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11219aebddd1SJeff Kirsher 11229aebddd1SJeff Kirsher return status; 11239aebddd1SJeff Kirsher } 11249aebddd1SJeff Kirsher 11254188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11269aebddd1SJeff Kirsher struct be_queue_info *mccq, 11279aebddd1SJeff Kirsher struct be_queue_info *cq) 11289aebddd1SJeff Kirsher { 11299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11309aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11319aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11329aebddd1SJeff Kirsher void *ctxt; 11339aebddd1SJeff Kirsher int status; 11349aebddd1SJeff Kirsher 11359aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11369aebddd1SJeff Kirsher return -1; 11379aebddd1SJeff Kirsher 11389aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11399aebddd1SJeff Kirsher req = embedded_payload(wrb); 11409aebddd1SJeff Kirsher ctxt = &req->context; 11419aebddd1SJeff Kirsher 1142106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1143106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 11449aebddd1SJeff Kirsher 11459aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 11469aebddd1SJeff Kirsher 11479aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11489aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11499aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11509aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11519aebddd1SJeff Kirsher 11529aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11539aebddd1SJeff Kirsher 11549aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11559aebddd1SJeff Kirsher 11569aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11579aebddd1SJeff Kirsher if (!status) { 11589aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11599aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11609aebddd1SJeff Kirsher mccq->created = true; 11619aebddd1SJeff Kirsher } 11629aebddd1SJeff Kirsher 11639aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11649aebddd1SJeff Kirsher return status; 11659aebddd1SJeff Kirsher } 11669aebddd1SJeff Kirsher 11679aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 11689aebddd1SJeff Kirsher struct be_queue_info *mccq, 11699aebddd1SJeff Kirsher struct be_queue_info *cq) 11709aebddd1SJeff Kirsher { 11719aebddd1SJeff Kirsher int status; 11729aebddd1SJeff Kirsher 11739aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 11749aebddd1SJeff Kirsher if (status && !lancer_chip(adapter)) { 11759aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11769aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11779aebddd1SJeff Kirsher "and FCoE traffic"); 11789aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 11799aebddd1SJeff Kirsher } 11809aebddd1SJeff Kirsher return status; 11819aebddd1SJeff Kirsher } 11829aebddd1SJeff Kirsher 118394d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 11849aebddd1SJeff Kirsher { 11857707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 11869aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 118794d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 118894d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 11899aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 119094d73aaaSVasundhara Volam int status, ver = 0; 11919aebddd1SJeff Kirsher 11927707133cSSathya Perla req = embedded_payload(&wrb); 1193106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 11947707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 11959aebddd1SJeff Kirsher 11969aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 11979aebddd1SJeff Kirsher req->hdr.version = 1; 119894d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 119994d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 120094d73aaaSVasundhara Volam req->hdr.version = 2; 120194d73aaaSVasundhara Volam } else { /* For SH */ 120294d73aaaSVasundhara Volam req->hdr.version = 2; 12039aebddd1SJeff Kirsher } 12049aebddd1SJeff Kirsher 120581b02655SVasundhara Volam if (req->hdr.version > 0) 120681b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12079aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12089aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12099aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 121094d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 121194d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12129aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 121394d73aaaSVasundhara Volam ver = req->hdr.version; 121494d73aaaSVasundhara Volam 12157707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12169aebddd1SJeff Kirsher if (!status) { 12177707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12189aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 121994d73aaaSVasundhara Volam if (ver == 2) 122094d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 122194d73aaaSVasundhara Volam else 122294d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12239aebddd1SJeff Kirsher txq->created = true; 12249aebddd1SJeff Kirsher } 12259aebddd1SJeff Kirsher 12269aebddd1SJeff Kirsher return status; 12279aebddd1SJeff Kirsher } 12289aebddd1SJeff Kirsher 12299aebddd1SJeff Kirsher /* Uses MCC */ 12309aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12319aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 123210ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12339aebddd1SJeff Kirsher { 12349aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12359aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12369aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12379aebddd1SJeff Kirsher int status; 12389aebddd1SJeff Kirsher 12399aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12409aebddd1SJeff Kirsher 12419aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12429aebddd1SJeff Kirsher if (!wrb) { 12439aebddd1SJeff Kirsher status = -EBUSY; 12449aebddd1SJeff Kirsher goto err; 12459aebddd1SJeff Kirsher } 12469aebddd1SJeff Kirsher req = embedded_payload(wrb); 12479aebddd1SJeff Kirsher 1248106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1249106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12509aebddd1SJeff Kirsher 12519aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12529aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12539aebddd1SJeff Kirsher req->num_pages = 2; 12549aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12559aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 125610ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12579aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12589aebddd1SJeff Kirsher 12599aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12609aebddd1SJeff Kirsher if (!status) { 12619aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12629aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12639aebddd1SJeff Kirsher rxq->created = true; 12649aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12659aebddd1SJeff Kirsher } 12669aebddd1SJeff Kirsher 12679aebddd1SJeff Kirsher err: 12689aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12699aebddd1SJeff Kirsher return status; 12709aebddd1SJeff Kirsher } 12719aebddd1SJeff Kirsher 12729aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12739aebddd1SJeff Kirsher * Uses Mbox 12749aebddd1SJeff Kirsher */ 12759aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12769aebddd1SJeff Kirsher int queue_type) 12779aebddd1SJeff Kirsher { 12789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12799aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12809aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 12819aebddd1SJeff Kirsher int status; 12829aebddd1SJeff Kirsher 12839aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12849aebddd1SJeff Kirsher return -1; 12859aebddd1SJeff Kirsher 12869aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12879aebddd1SJeff Kirsher req = embedded_payload(wrb); 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher switch (queue_type) { 12909aebddd1SJeff Kirsher case QTYPE_EQ: 12919aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12929aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 12939aebddd1SJeff Kirsher break; 12949aebddd1SJeff Kirsher case QTYPE_CQ: 12959aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12969aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 12979aebddd1SJeff Kirsher break; 12989aebddd1SJeff Kirsher case QTYPE_TXQ: 12999aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13009aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13019aebddd1SJeff Kirsher break; 13029aebddd1SJeff Kirsher case QTYPE_RXQ: 13039aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13049aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13059aebddd1SJeff Kirsher break; 13069aebddd1SJeff Kirsher case QTYPE_MCCQ: 13079aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13089aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13099aebddd1SJeff Kirsher break; 13109aebddd1SJeff Kirsher default: 13119aebddd1SJeff Kirsher BUG(); 13129aebddd1SJeff Kirsher } 13139aebddd1SJeff Kirsher 1314106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1315106df1e3SSomnath Kotur NULL); 13169aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13179aebddd1SJeff Kirsher 13189aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13199aebddd1SJeff Kirsher q->created = false; 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13229aebddd1SJeff Kirsher return status; 13239aebddd1SJeff Kirsher } 13249aebddd1SJeff Kirsher 13259aebddd1SJeff Kirsher /* Uses MCC */ 13269aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13279aebddd1SJeff Kirsher { 13289aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13299aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13309aebddd1SJeff Kirsher int status; 13319aebddd1SJeff Kirsher 13329aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13339aebddd1SJeff Kirsher 13349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13359aebddd1SJeff Kirsher if (!wrb) { 13369aebddd1SJeff Kirsher status = -EBUSY; 13379aebddd1SJeff Kirsher goto err; 13389aebddd1SJeff Kirsher } 13399aebddd1SJeff Kirsher req = embedded_payload(wrb); 13409aebddd1SJeff Kirsher 1341106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1342106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13439aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13449aebddd1SJeff Kirsher 13459aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13469aebddd1SJeff Kirsher q->created = false; 13479aebddd1SJeff Kirsher 13489aebddd1SJeff Kirsher err: 13499aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13509aebddd1SJeff Kirsher return status; 13519aebddd1SJeff Kirsher } 13529aebddd1SJeff Kirsher 13539aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1354bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 13559aebddd1SJeff Kirsher */ 13569aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13571578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13589aebddd1SJeff Kirsher { 1359bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 13609aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13619aebddd1SJeff Kirsher int status; 13629aebddd1SJeff Kirsher 1363bea50988SSathya Perla req = embedded_payload(&wrb); 1364106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1365bea50988SSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL); 13669aebddd1SJeff Kirsher req->hdr.domain = domain; 13679aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13689aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1369f9449ab7SSathya Perla req->pmac_invalid = true; 13709aebddd1SJeff Kirsher 1371bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13729aebddd1SJeff Kirsher if (!status) { 1373bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 13749aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1375b5bb9776SSathya Perla 1376b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1377b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1378b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 13799aebddd1SJeff Kirsher } 13809aebddd1SJeff Kirsher return status; 13819aebddd1SJeff Kirsher } 13829aebddd1SJeff Kirsher 1383f9449ab7SSathya Perla /* Uses MCCQ */ 138430128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 13859aebddd1SJeff Kirsher { 13869aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13879aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 13889aebddd1SJeff Kirsher int status; 13899aebddd1SJeff Kirsher 139030128031SSathya Perla if (interface_id == -1) 1391f9449ab7SSathya Perla return 0; 13929aebddd1SJeff Kirsher 1393f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1394f9449ab7SSathya Perla 1395f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1396f9449ab7SSathya Perla if (!wrb) { 1397f9449ab7SSathya Perla status = -EBUSY; 1398f9449ab7SSathya Perla goto err; 1399f9449ab7SSathya Perla } 14009aebddd1SJeff Kirsher req = embedded_payload(wrb); 14019aebddd1SJeff Kirsher 1402106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1403106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 14049aebddd1SJeff Kirsher req->hdr.domain = domain; 14059aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14069aebddd1SJeff Kirsher 1407f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1408f9449ab7SSathya Perla err: 1409f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14109aebddd1SJeff Kirsher return status; 14119aebddd1SJeff Kirsher } 14129aebddd1SJeff Kirsher 14139aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14149aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14159aebddd1SJeff Kirsher * Uses asynchronous MCC 14169aebddd1SJeff Kirsher */ 14179aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14189aebddd1SJeff Kirsher { 14199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14209aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14219aebddd1SJeff Kirsher int status = 0; 14229aebddd1SJeff Kirsher 14239aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14249aebddd1SJeff Kirsher 14259aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14269aebddd1SJeff Kirsher if (!wrb) { 14279aebddd1SJeff Kirsher status = -EBUSY; 14289aebddd1SJeff Kirsher goto err; 14299aebddd1SJeff Kirsher } 14309aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14319aebddd1SJeff Kirsher 1432106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1433106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 14349aebddd1SJeff Kirsher 1435ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1436ca34fe38SSathya Perla if (!BE2_chip(adapter)) 14379aebddd1SJeff Kirsher hdr->version = 1; 14389aebddd1SJeff Kirsher 14399aebddd1SJeff Kirsher be_mcc_notify(adapter); 14409aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14419aebddd1SJeff Kirsher 14429aebddd1SJeff Kirsher err: 14439aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14449aebddd1SJeff Kirsher return status; 14459aebddd1SJeff Kirsher } 14469aebddd1SJeff Kirsher 14479aebddd1SJeff Kirsher /* Lancer Stats */ 14489aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14499aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14509aebddd1SJeff Kirsher { 14519aebddd1SJeff Kirsher 14529aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14539aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14549aebddd1SJeff Kirsher int status = 0; 14559aebddd1SJeff Kirsher 1456f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1457f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1458f25b119cSPadmanabh Ratnakar return -EPERM; 1459f25b119cSPadmanabh Ratnakar 14609aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14619aebddd1SJeff Kirsher 14629aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14639aebddd1SJeff Kirsher if (!wrb) { 14649aebddd1SJeff Kirsher status = -EBUSY; 14659aebddd1SJeff Kirsher goto err; 14669aebddd1SJeff Kirsher } 14679aebddd1SJeff Kirsher req = nonemb_cmd->va; 14689aebddd1SJeff Kirsher 1469106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1470106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1471106df1e3SSomnath Kotur nonemb_cmd); 14729aebddd1SJeff Kirsher 1473d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 14749aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 14759aebddd1SJeff Kirsher 14769aebddd1SJeff Kirsher be_mcc_notify(adapter); 14779aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14789aebddd1SJeff Kirsher 14799aebddd1SJeff Kirsher err: 14809aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14819aebddd1SJeff Kirsher return status; 14829aebddd1SJeff Kirsher } 14839aebddd1SJeff Kirsher 1484323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1485323ff71eSSathya Perla { 1486323ff71eSSathya Perla switch (mac_speed) { 1487323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1488323ff71eSSathya Perla return 0; 1489323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1490323ff71eSSathya Perla return 10; 1491323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1492323ff71eSSathya Perla return 100; 1493323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1494323ff71eSSathya Perla return 1000; 1495323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1496323ff71eSSathya Perla return 10000; 1497b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1498b971f847SVasundhara Volam return 20000; 1499b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1500b971f847SVasundhara Volam return 25000; 1501b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1502b971f847SVasundhara Volam return 40000; 1503323ff71eSSathya Perla } 1504323ff71eSSathya Perla return 0; 1505323ff71eSSathya Perla } 1506323ff71eSSathya Perla 1507323ff71eSSathya Perla /* Uses synchronous mcc 1508323ff71eSSathya Perla * Returns link_speed in Mbps 1509323ff71eSSathya Perla */ 1510323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1511323ff71eSSathya Perla u8 *link_status, u32 dom) 15129aebddd1SJeff Kirsher { 15139aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15149aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15159aebddd1SJeff Kirsher int status; 15169aebddd1SJeff Kirsher 15179aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15189aebddd1SJeff Kirsher 1519b236916aSAjit Khaparde if (link_status) 1520b236916aSAjit Khaparde *link_status = LINK_DOWN; 1521b236916aSAjit Khaparde 15229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15239aebddd1SJeff Kirsher if (!wrb) { 15249aebddd1SJeff Kirsher status = -EBUSY; 15259aebddd1SJeff Kirsher goto err; 15269aebddd1SJeff Kirsher } 15279aebddd1SJeff Kirsher req = embedded_payload(wrb); 15289aebddd1SJeff Kirsher 152957cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 153057cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 153157cd80d4SPadmanabh Ratnakar 1532ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1533ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1534daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1535daad6167SPadmanabh Ratnakar 153657cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15379aebddd1SJeff Kirsher 15389aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15399aebddd1SJeff Kirsher if (!status) { 15409aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1541323ff71eSSathya Perla if (link_speed) { 1542323ff71eSSathya Perla *link_speed = resp->link_speed ? 1543323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1544323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1545323ff71eSSathya Perla 1546323ff71eSSathya Perla if (!resp->logical_link_status) 1547323ff71eSSathya Perla *link_speed = 0; 15489aebddd1SJeff Kirsher } 1549b236916aSAjit Khaparde if (link_status) 1550b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15519aebddd1SJeff Kirsher } 15529aebddd1SJeff Kirsher 15539aebddd1SJeff Kirsher err: 15549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15559aebddd1SJeff Kirsher return status; 15569aebddd1SJeff Kirsher } 15579aebddd1SJeff Kirsher 15589aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15599aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15609aebddd1SJeff Kirsher { 15619aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15629aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1563117affe3SVasundhara Volam int status = 0; 15649aebddd1SJeff Kirsher 15659aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15669aebddd1SJeff Kirsher 15679aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15689aebddd1SJeff Kirsher if (!wrb) { 15699aebddd1SJeff Kirsher status = -EBUSY; 15709aebddd1SJeff Kirsher goto err; 15719aebddd1SJeff Kirsher } 15729aebddd1SJeff Kirsher req = embedded_payload(wrb); 15739aebddd1SJeff Kirsher 1574106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1575106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1576106df1e3SSomnath Kotur wrb, NULL); 15779aebddd1SJeff Kirsher 15783de09455SSomnath Kotur be_mcc_notify(adapter); 15799aebddd1SJeff Kirsher 15809aebddd1SJeff Kirsher err: 15819aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15829aebddd1SJeff Kirsher return status; 15839aebddd1SJeff Kirsher } 15849aebddd1SJeff Kirsher 15859aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15869aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 15879aebddd1SJeff Kirsher { 15889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15899aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15909aebddd1SJeff Kirsher int status; 15919aebddd1SJeff Kirsher 15929aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15939aebddd1SJeff Kirsher 15949aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15959aebddd1SJeff Kirsher if (!wrb) { 15969aebddd1SJeff Kirsher status = -EBUSY; 15979aebddd1SJeff Kirsher goto err; 15989aebddd1SJeff Kirsher } 15999aebddd1SJeff Kirsher req = embedded_payload(wrb); 16009aebddd1SJeff Kirsher 1601106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1602106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 16039aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16049aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16059aebddd1SJeff Kirsher if (!status) { 16069aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16079aebddd1SJeff Kirsher if (log_size && resp->log_size) 16089aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16099aebddd1SJeff Kirsher sizeof(u32); 16109aebddd1SJeff Kirsher } 16119aebddd1SJeff Kirsher err: 16129aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16139aebddd1SJeff Kirsher return status; 16149aebddd1SJeff Kirsher } 16159aebddd1SJeff Kirsher 16169aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16179aebddd1SJeff Kirsher { 16189aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16199aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16209aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16219aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16229aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 16239aebddd1SJeff Kirsher int status; 16249aebddd1SJeff Kirsher 16259aebddd1SJeff Kirsher if (buf_len == 0) 16269aebddd1SJeff Kirsher return; 16279aebddd1SJeff Kirsher 16289aebddd1SJeff Kirsher total_size = buf_len; 16299aebddd1SJeff Kirsher 16309aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16319aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16329aebddd1SJeff Kirsher get_fat_cmd.size, 16339aebddd1SJeff Kirsher &get_fat_cmd.dma); 16349aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 16359aebddd1SJeff Kirsher status = -ENOMEM; 16369aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16379aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16389aebddd1SJeff Kirsher return; 16399aebddd1SJeff Kirsher } 16409aebddd1SJeff Kirsher 16419aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16429aebddd1SJeff Kirsher 16439aebddd1SJeff Kirsher while (total_size) { 16449aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16459aebddd1SJeff Kirsher total_size -= buf_size; 16469aebddd1SJeff Kirsher 16479aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16489aebddd1SJeff Kirsher if (!wrb) { 16499aebddd1SJeff Kirsher status = -EBUSY; 16509aebddd1SJeff Kirsher goto err; 16519aebddd1SJeff Kirsher } 16529aebddd1SJeff Kirsher req = get_fat_cmd.va; 16539aebddd1SJeff Kirsher 16549aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1655106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1656106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1657106df1e3SSomnath Kotur &get_fat_cmd); 16589aebddd1SJeff Kirsher 16599aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16609aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16619aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16629aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16639aebddd1SJeff Kirsher 16649aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16659aebddd1SJeff Kirsher if (!status) { 16669aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16679aebddd1SJeff Kirsher memcpy(buf + offset, 16689aebddd1SJeff Kirsher resp->data_buffer, 166992aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16709aebddd1SJeff Kirsher } else { 16719aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16729aebddd1SJeff Kirsher goto err; 16739aebddd1SJeff Kirsher } 16749aebddd1SJeff Kirsher offset += buf_size; 16759aebddd1SJeff Kirsher log_offset += buf_size; 16769aebddd1SJeff Kirsher } 16779aebddd1SJeff Kirsher err: 16789aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 16799aebddd1SJeff Kirsher get_fat_cmd.va, 16809aebddd1SJeff Kirsher get_fat_cmd.dma); 16819aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16829aebddd1SJeff Kirsher } 16839aebddd1SJeff Kirsher 168404b71175SSathya Perla /* Uses synchronous mcc */ 168504b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 168604b71175SSathya Perla char *fw_on_flash) 16879aebddd1SJeff Kirsher { 16889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16899aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 16909aebddd1SJeff Kirsher int status; 16919aebddd1SJeff Kirsher 169204b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 16939aebddd1SJeff Kirsher 169404b71175SSathya Perla wrb = wrb_from_mccq(adapter); 169504b71175SSathya Perla if (!wrb) { 169604b71175SSathya Perla status = -EBUSY; 169704b71175SSathya Perla goto err; 169804b71175SSathya Perla } 169904b71175SSathya Perla 17009aebddd1SJeff Kirsher req = embedded_payload(wrb); 17019aebddd1SJeff Kirsher 1702106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1703106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 170404b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17059aebddd1SJeff Kirsher if (!status) { 17069aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 170704b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 170804b71175SSathya Perla if (fw_on_flash) 170904b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 17109aebddd1SJeff Kirsher } 171104b71175SSathya Perla err: 171204b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17139aebddd1SJeff Kirsher return status; 17149aebddd1SJeff Kirsher } 17159aebddd1SJeff Kirsher 17169aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17179aebddd1SJeff Kirsher * Uses async mcc 17189aebddd1SJeff Kirsher */ 17199aebddd1SJeff Kirsher int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) 17209aebddd1SJeff Kirsher { 17219aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17229aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17239aebddd1SJeff Kirsher int status = 0; 17249aebddd1SJeff Kirsher 17259aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17269aebddd1SJeff Kirsher 17279aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17289aebddd1SJeff Kirsher if (!wrb) { 17299aebddd1SJeff Kirsher status = -EBUSY; 17309aebddd1SJeff Kirsher goto err; 17319aebddd1SJeff Kirsher } 17329aebddd1SJeff Kirsher req = embedded_payload(wrb); 17339aebddd1SJeff Kirsher 1734106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1735106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 17369aebddd1SJeff Kirsher 17379aebddd1SJeff Kirsher req->num_eq = cpu_to_le32(1); 17389aebddd1SJeff Kirsher req->delay[0].eq_id = cpu_to_le32(eq_id); 17399aebddd1SJeff Kirsher req->delay[0].phase = 0; 17409aebddd1SJeff Kirsher req->delay[0].delay_multiplier = cpu_to_le32(eqd); 17419aebddd1SJeff Kirsher 17429aebddd1SJeff Kirsher be_mcc_notify(adapter); 17439aebddd1SJeff Kirsher 17449aebddd1SJeff Kirsher err: 17459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17469aebddd1SJeff Kirsher return status; 17479aebddd1SJeff Kirsher } 17489aebddd1SJeff Kirsher 17499aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17509aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 17519aebddd1SJeff Kirsher u32 num, bool untagged, bool promiscuous) 17529aebddd1SJeff Kirsher { 17539aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17549aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17559aebddd1SJeff Kirsher int status; 17569aebddd1SJeff Kirsher 17579aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17589aebddd1SJeff Kirsher 17599aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17609aebddd1SJeff Kirsher if (!wrb) { 17619aebddd1SJeff Kirsher status = -EBUSY; 17629aebddd1SJeff Kirsher goto err; 17639aebddd1SJeff Kirsher } 17649aebddd1SJeff Kirsher req = embedded_payload(wrb); 17659aebddd1SJeff Kirsher 1766106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1767106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17689aebddd1SJeff Kirsher 17699aebddd1SJeff Kirsher req->interface_id = if_id; 17709aebddd1SJeff Kirsher req->promiscuous = promiscuous; 17719aebddd1SJeff Kirsher req->untagged = untagged; 17729aebddd1SJeff Kirsher req->num_vlan = num; 17739aebddd1SJeff Kirsher if (!promiscuous) { 17749aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 17759aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 17769aebddd1SJeff Kirsher } 17779aebddd1SJeff Kirsher 17789aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17799aebddd1SJeff Kirsher 17809aebddd1SJeff Kirsher err: 17819aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17829aebddd1SJeff Kirsher return status; 17839aebddd1SJeff Kirsher } 17849aebddd1SJeff Kirsher 17859aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 17869aebddd1SJeff Kirsher { 17879aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17889aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 17899aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 17909aebddd1SJeff Kirsher int status; 17919aebddd1SJeff Kirsher 17929aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17939aebddd1SJeff Kirsher 17949aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17959aebddd1SJeff Kirsher if (!wrb) { 17969aebddd1SJeff Kirsher status = -EBUSY; 17979aebddd1SJeff Kirsher goto err; 17989aebddd1SJeff Kirsher } 17999aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1800106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1801106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1802106df1e3SSomnath Kotur wrb, mem); 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18059aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18069aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1807c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1808c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18099aebddd1SJeff Kirsher if (value == ON) 18109aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1811c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1812c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18139aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 18149aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 18159aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 18169aebddd1SJeff Kirsher } else { 18179aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 18189aebddd1SJeff Kirsher int i = 0; 18199aebddd1SJeff Kirsher 18208e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 18218e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 18221610c79fSPadmanabh Ratnakar 18231610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 18241610c79fSPadmanabh Ratnakar * and not setting flags field 18251610c79fSPadmanabh Ratnakar */ 18261610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1827abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 182892bf14abSSathya Perla be_if_cap_flags(adapter)); 1829016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 18309aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 18319aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 18329aebddd1SJeff Kirsher } 18339aebddd1SJeff Kirsher 18349aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18359aebddd1SJeff Kirsher err: 18369aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18379aebddd1SJeff Kirsher return status; 18389aebddd1SJeff Kirsher } 18399aebddd1SJeff Kirsher 18409aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 18419aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 18429aebddd1SJeff Kirsher { 18439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18449aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 18459aebddd1SJeff Kirsher int status; 18469aebddd1SJeff Kirsher 1847f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1848f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1849f25b119cSPadmanabh Ratnakar return -EPERM; 1850f25b119cSPadmanabh Ratnakar 18519aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18529aebddd1SJeff Kirsher 18539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18549aebddd1SJeff Kirsher if (!wrb) { 18559aebddd1SJeff Kirsher status = -EBUSY; 18569aebddd1SJeff Kirsher goto err; 18579aebddd1SJeff Kirsher } 18589aebddd1SJeff Kirsher req = embedded_payload(wrb); 18599aebddd1SJeff Kirsher 1860106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1861106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18629aebddd1SJeff Kirsher 18639aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 18649aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 18659aebddd1SJeff Kirsher 18669aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18679aebddd1SJeff Kirsher 18689aebddd1SJeff Kirsher err: 18699aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18709aebddd1SJeff Kirsher return status; 18719aebddd1SJeff Kirsher } 18729aebddd1SJeff Kirsher 18739aebddd1SJeff Kirsher /* Uses sycn mcc */ 18749aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 18759aebddd1SJeff Kirsher { 18769aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18779aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 18789aebddd1SJeff Kirsher int status; 18799aebddd1SJeff Kirsher 1880f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1881f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1882f25b119cSPadmanabh Ratnakar return -EPERM; 1883f25b119cSPadmanabh Ratnakar 18849aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18859aebddd1SJeff Kirsher 18869aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18879aebddd1SJeff Kirsher if (!wrb) { 18889aebddd1SJeff Kirsher status = -EBUSY; 18899aebddd1SJeff Kirsher goto err; 18909aebddd1SJeff Kirsher } 18919aebddd1SJeff Kirsher req = embedded_payload(wrb); 18929aebddd1SJeff Kirsher 1893106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1894106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18959aebddd1SJeff Kirsher 18969aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18979aebddd1SJeff Kirsher if (!status) { 18989aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 18999aebddd1SJeff Kirsher embedded_payload(wrb); 19009aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 19019aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 19029aebddd1SJeff Kirsher } 19039aebddd1SJeff Kirsher 19049aebddd1SJeff Kirsher err: 19059aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19069aebddd1SJeff Kirsher return status; 19079aebddd1SJeff Kirsher } 19089aebddd1SJeff Kirsher 19099aebddd1SJeff Kirsher /* Uses mbox */ 19109aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19110ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 19129aebddd1SJeff Kirsher { 19139aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19149aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 19159aebddd1SJeff Kirsher int status; 19169aebddd1SJeff Kirsher 19179aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19189aebddd1SJeff Kirsher return -1; 19199aebddd1SJeff Kirsher 19209aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19219aebddd1SJeff Kirsher req = embedded_payload(wrb); 19229aebddd1SJeff Kirsher 1923106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1924106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 19259aebddd1SJeff Kirsher 19269aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19279aebddd1SJeff Kirsher if (!status) { 19289aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 19299aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 19309aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 19319aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 19320ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 19339aebddd1SJeff Kirsher } 19349aebddd1SJeff Kirsher 19359aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19369aebddd1SJeff Kirsher return status; 19379aebddd1SJeff Kirsher } 19389aebddd1SJeff Kirsher 19399aebddd1SJeff Kirsher /* Uses mbox */ 19409aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 19419aebddd1SJeff Kirsher { 19429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19439aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 19449aebddd1SJeff Kirsher int status; 19459aebddd1SJeff Kirsher 1946bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1947bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1948bf99e50dSPadmanabh Ratnakar if (!status) { 1949bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1950bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1951bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1952bf99e50dSPadmanabh Ratnakar } 1953bf99e50dSPadmanabh Ratnakar if (status) { 1954bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 1955bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 1956bf99e50dSPadmanabh Ratnakar } 1957bf99e50dSPadmanabh Ratnakar return status; 1958bf99e50dSPadmanabh Ratnakar } 1959bf99e50dSPadmanabh Ratnakar 19609aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19619aebddd1SJeff Kirsher return -1; 19629aebddd1SJeff Kirsher 19639aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19649aebddd1SJeff Kirsher req = embedded_payload(wrb); 19659aebddd1SJeff Kirsher 1966106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 1967106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 19689aebddd1SJeff Kirsher 19699aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19709aebddd1SJeff Kirsher 19719aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19729aebddd1SJeff Kirsher return status; 19739aebddd1SJeff Kirsher } 19749aebddd1SJeff Kirsher 1975594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 1976594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 19779aebddd1SJeff Kirsher { 19789aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19799aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 198065f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 198165f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 198265f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 19839aebddd1SJeff Kirsher int status; 19849aebddd1SJeff Kirsher 19859aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19869aebddd1SJeff Kirsher return -1; 19879aebddd1SJeff Kirsher 19889aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19899aebddd1SJeff Kirsher req = embedded_payload(wrb); 19909aebddd1SJeff Kirsher 1991106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1992106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 19939aebddd1SJeff Kirsher 19949aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 1995594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 19969aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 1997594ad54aSSuresh Reddy 1998594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 1999594ad54aSSuresh Reddy req->hdr.version = 1; 2000594ad54aSSuresh Reddy 20019aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 20029aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 20039aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 20049aebddd1SJeff Kirsher 20059aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20069aebddd1SJeff Kirsher 20079aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20089aebddd1SJeff Kirsher return status; 20099aebddd1SJeff Kirsher } 20109aebddd1SJeff Kirsher 20119aebddd1SJeff Kirsher /* Uses sync mcc */ 20129aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 20139aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 20149aebddd1SJeff Kirsher { 20159aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20169aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 20179aebddd1SJeff Kirsher int status; 20189aebddd1SJeff Kirsher 20199aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20209aebddd1SJeff Kirsher 20219aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20229aebddd1SJeff Kirsher if (!wrb) { 20239aebddd1SJeff Kirsher status = -EBUSY; 20249aebddd1SJeff Kirsher goto err; 20259aebddd1SJeff Kirsher } 20269aebddd1SJeff Kirsher req = embedded_payload(wrb); 20279aebddd1SJeff Kirsher 2028106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2029106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 20309aebddd1SJeff Kirsher 20319aebddd1SJeff Kirsher req->port_num = port_num; 20329aebddd1SJeff Kirsher req->beacon_state = state; 20339aebddd1SJeff Kirsher req->beacon_duration = bcn; 20349aebddd1SJeff Kirsher req->status_duration = sts; 20359aebddd1SJeff Kirsher 20369aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20379aebddd1SJeff Kirsher 20389aebddd1SJeff Kirsher err: 20399aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20409aebddd1SJeff Kirsher return status; 20419aebddd1SJeff Kirsher } 20429aebddd1SJeff Kirsher 20439aebddd1SJeff Kirsher /* Uses sync mcc */ 20449aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 20459aebddd1SJeff Kirsher { 20469aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20479aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20489aebddd1SJeff Kirsher int status; 20499aebddd1SJeff Kirsher 20509aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20519aebddd1SJeff Kirsher 20529aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20539aebddd1SJeff Kirsher if (!wrb) { 20549aebddd1SJeff Kirsher status = -EBUSY; 20559aebddd1SJeff Kirsher goto err; 20569aebddd1SJeff Kirsher } 20579aebddd1SJeff Kirsher req = embedded_payload(wrb); 20589aebddd1SJeff Kirsher 2059106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2060106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 20619aebddd1SJeff Kirsher 20629aebddd1SJeff Kirsher req->port_num = port_num; 20639aebddd1SJeff Kirsher 20649aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20659aebddd1SJeff Kirsher if (!status) { 20669aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 20679aebddd1SJeff Kirsher embedded_payload(wrb); 20689aebddd1SJeff Kirsher *state = resp->beacon_state; 20699aebddd1SJeff Kirsher } 20709aebddd1SJeff Kirsher 20719aebddd1SJeff Kirsher err: 20729aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20739aebddd1SJeff Kirsher return status; 20749aebddd1SJeff Kirsher } 20759aebddd1SJeff Kirsher 20769aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2077f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2078f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2079f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 20809aebddd1SJeff Kirsher { 20819aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20829aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 20839aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 20849aebddd1SJeff Kirsher void *ctxt = NULL; 20859aebddd1SJeff Kirsher int status; 20869aebddd1SJeff Kirsher 20879aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20889aebddd1SJeff Kirsher adapter->flash_status = 0; 20899aebddd1SJeff Kirsher 20909aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20919aebddd1SJeff Kirsher if (!wrb) { 20929aebddd1SJeff Kirsher status = -EBUSY; 20939aebddd1SJeff Kirsher goto err_unlock; 20949aebddd1SJeff Kirsher } 20959aebddd1SJeff Kirsher 20969aebddd1SJeff Kirsher req = embedded_payload(wrb); 20979aebddd1SJeff Kirsher 2098106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 20999aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2100106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2101106df1e3SSomnath Kotur NULL); 21029aebddd1SJeff Kirsher 21039aebddd1SJeff Kirsher ctxt = &req->context; 21049aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21059aebddd1SJeff Kirsher write_length, ctxt, data_size); 21069aebddd1SJeff Kirsher 21079aebddd1SJeff Kirsher if (data_size == 0) 21089aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21099aebddd1SJeff Kirsher eof, ctxt, 1); 21109aebddd1SJeff Kirsher else 21119aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21129aebddd1SJeff Kirsher eof, ctxt, 0); 21139aebddd1SJeff Kirsher 21149aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 21159aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 21169aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 21179aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 21189aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 21199aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 21209aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 21219aebddd1SJeff Kirsher & 0xFFFFFFFF); 21229aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 21239aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 21249aebddd1SJeff Kirsher 21259aebddd1SJeff Kirsher be_mcc_notify(adapter); 21269aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21279aebddd1SJeff Kirsher 21289aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2129701962d0SSomnath Kotur msecs_to_jiffies(60000))) 21309aebddd1SJeff Kirsher status = -1; 21319aebddd1SJeff Kirsher else 21329aebddd1SJeff Kirsher status = adapter->flash_status; 21339aebddd1SJeff Kirsher 21349aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2135f67ef7baSPadmanabh Ratnakar if (!status) { 21369aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2137f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2138f67ef7baSPadmanabh Ratnakar } else { 21399aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2140f67ef7baSPadmanabh Ratnakar } 21419aebddd1SJeff Kirsher 21429aebddd1SJeff Kirsher return status; 21439aebddd1SJeff Kirsher 21449aebddd1SJeff Kirsher err_unlock: 21459aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21469aebddd1SJeff Kirsher return status; 21479aebddd1SJeff Kirsher } 21489aebddd1SJeff Kirsher 2149de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2150de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2151de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2152de49bd5aSPadmanabh Ratnakar { 2153de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2154de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2155de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2156de49bd5aSPadmanabh Ratnakar int status; 2157de49bd5aSPadmanabh Ratnakar 2158de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2159de49bd5aSPadmanabh Ratnakar 2160de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2161de49bd5aSPadmanabh Ratnakar if (!wrb) { 2162de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2163de49bd5aSPadmanabh Ratnakar goto err_unlock; 2164de49bd5aSPadmanabh Ratnakar } 2165de49bd5aSPadmanabh Ratnakar 2166de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2167de49bd5aSPadmanabh Ratnakar 2168de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2169de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2170de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2171de49bd5aSPadmanabh Ratnakar NULL); 2172de49bd5aSPadmanabh Ratnakar 2173de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2174de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2175de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2176de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2177de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2178de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2179de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2180de49bd5aSPadmanabh Ratnakar 2181de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2182de49bd5aSPadmanabh Ratnakar 2183de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2184de49bd5aSPadmanabh Ratnakar if (!status) { 2185de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2186de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2187de49bd5aSPadmanabh Ratnakar } else { 2188de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2189de49bd5aSPadmanabh Ratnakar } 2190de49bd5aSPadmanabh Ratnakar 2191de49bd5aSPadmanabh Ratnakar err_unlock: 2192de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2193de49bd5aSPadmanabh Ratnakar return status; 2194de49bd5aSPadmanabh Ratnakar } 2195de49bd5aSPadmanabh Ratnakar 21969aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 21979aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 21989aebddd1SJeff Kirsher { 21999aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22009aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 22019aebddd1SJeff Kirsher int status; 22029aebddd1SJeff Kirsher 22039aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22049aebddd1SJeff Kirsher adapter->flash_status = 0; 22059aebddd1SJeff Kirsher 22069aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22079aebddd1SJeff Kirsher if (!wrb) { 22089aebddd1SJeff Kirsher status = -EBUSY; 22099aebddd1SJeff Kirsher goto err_unlock; 22109aebddd1SJeff Kirsher } 22119aebddd1SJeff Kirsher req = cmd->va; 22129aebddd1SJeff Kirsher 2213106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2214106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 22159aebddd1SJeff Kirsher 22169aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 22179aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 22189aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 22199aebddd1SJeff Kirsher 22209aebddd1SJeff Kirsher be_mcc_notify(adapter); 22219aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22229aebddd1SJeff Kirsher 22239aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2224e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 22259aebddd1SJeff Kirsher status = -1; 22269aebddd1SJeff Kirsher else 22279aebddd1SJeff Kirsher status = adapter->flash_status; 22289aebddd1SJeff Kirsher 22299aebddd1SJeff Kirsher return status; 22309aebddd1SJeff Kirsher 22319aebddd1SJeff Kirsher err_unlock: 22329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22339aebddd1SJeff Kirsher return status; 22349aebddd1SJeff Kirsher } 22359aebddd1SJeff Kirsher 22369aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 22379aebddd1SJeff Kirsher int offset) 22389aebddd1SJeff Kirsher { 22399aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2240be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 22419aebddd1SJeff Kirsher int status; 22429aebddd1SJeff Kirsher 22439aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22449aebddd1SJeff Kirsher 22459aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22469aebddd1SJeff Kirsher if (!wrb) { 22479aebddd1SJeff Kirsher status = -EBUSY; 22489aebddd1SJeff Kirsher goto err; 22499aebddd1SJeff Kirsher } 22509aebddd1SJeff Kirsher req = embedded_payload(wrb); 22519aebddd1SJeff Kirsher 2252106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2253be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2254be716446SPadmanabh Ratnakar wrb, NULL); 22559aebddd1SJeff Kirsher 2256c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 22579aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 22589aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 22599aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 22609aebddd1SJeff Kirsher 22619aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22629aebddd1SJeff Kirsher if (!status) 2263be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 22649aebddd1SJeff Kirsher 22659aebddd1SJeff Kirsher err: 22669aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22679aebddd1SJeff Kirsher return status; 22689aebddd1SJeff Kirsher } 22699aebddd1SJeff Kirsher 22709aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 22719aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 22729aebddd1SJeff Kirsher { 22739aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22749aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 22759aebddd1SJeff Kirsher int status; 22769aebddd1SJeff Kirsher 22779aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22789aebddd1SJeff Kirsher 22799aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22809aebddd1SJeff Kirsher if (!wrb) { 22819aebddd1SJeff Kirsher status = -EBUSY; 22829aebddd1SJeff Kirsher goto err; 22839aebddd1SJeff Kirsher } 22849aebddd1SJeff Kirsher req = nonemb_cmd->va; 22859aebddd1SJeff Kirsher 2286106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2287106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2288106df1e3SSomnath Kotur nonemb_cmd); 22899aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 22909aebddd1SJeff Kirsher 22919aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22929aebddd1SJeff Kirsher 22939aebddd1SJeff Kirsher err: 22949aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22959aebddd1SJeff Kirsher return status; 22969aebddd1SJeff Kirsher } 22979aebddd1SJeff Kirsher 22989aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 22999aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 23009aebddd1SJeff Kirsher { 23019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23029aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 23039aebddd1SJeff Kirsher int status; 23049aebddd1SJeff Kirsher 23059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23069aebddd1SJeff Kirsher 23079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23089aebddd1SJeff Kirsher if (!wrb) { 23099aebddd1SJeff Kirsher status = -EBUSY; 23109aebddd1SJeff Kirsher goto err; 23119aebddd1SJeff Kirsher } 23129aebddd1SJeff Kirsher 23139aebddd1SJeff Kirsher req = embedded_payload(wrb); 23149aebddd1SJeff Kirsher 2315106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2316106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2317106df1e3SSomnath Kotur NULL); 23189aebddd1SJeff Kirsher 23199aebddd1SJeff Kirsher req->src_port = port_num; 23209aebddd1SJeff Kirsher req->dest_port = port_num; 23219aebddd1SJeff Kirsher req->loopback_type = loopback_type; 23229aebddd1SJeff Kirsher req->loopback_state = enable; 23239aebddd1SJeff Kirsher 23249aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23259aebddd1SJeff Kirsher err: 23269aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23279aebddd1SJeff Kirsher return status; 23289aebddd1SJeff Kirsher } 23299aebddd1SJeff Kirsher 23309aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 23319aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 23329aebddd1SJeff Kirsher { 23339aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23349aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 23359aebddd1SJeff Kirsher int status; 23369aebddd1SJeff Kirsher 23379aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23389aebddd1SJeff Kirsher 23399aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23409aebddd1SJeff Kirsher if (!wrb) { 23419aebddd1SJeff Kirsher status = -EBUSY; 23429aebddd1SJeff Kirsher goto err; 23439aebddd1SJeff Kirsher } 23449aebddd1SJeff Kirsher 23459aebddd1SJeff Kirsher req = embedded_payload(wrb); 23469aebddd1SJeff Kirsher 2347106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2348106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 23499aebddd1SJeff Kirsher req->hdr.timeout = cpu_to_le32(4); 23509aebddd1SJeff Kirsher 23519aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23529aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 23539aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 23549aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 23559aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 23569aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 23579aebddd1SJeff Kirsher 23589aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23599aebddd1SJeff Kirsher if (!status) { 23609aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); 23619aebddd1SJeff Kirsher status = le32_to_cpu(resp->status); 23629aebddd1SJeff Kirsher } 23639aebddd1SJeff Kirsher 23649aebddd1SJeff Kirsher err: 23659aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23669aebddd1SJeff Kirsher return status; 23679aebddd1SJeff Kirsher } 23689aebddd1SJeff Kirsher 23699aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 23709aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 23719aebddd1SJeff Kirsher { 23729aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23739aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 23749aebddd1SJeff Kirsher int status; 23759aebddd1SJeff Kirsher int i, j = 0; 23769aebddd1SJeff Kirsher 23779aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23789aebddd1SJeff Kirsher 23799aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23809aebddd1SJeff Kirsher if (!wrb) { 23819aebddd1SJeff Kirsher status = -EBUSY; 23829aebddd1SJeff Kirsher goto err; 23839aebddd1SJeff Kirsher } 23849aebddd1SJeff Kirsher req = cmd->va; 2385106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2386106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 23879aebddd1SJeff Kirsher 23889aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23899aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 23909aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 23919aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 23929aebddd1SJeff Kirsher j++; 23939aebddd1SJeff Kirsher if (j > 7) 23949aebddd1SJeff Kirsher j = 0; 23959aebddd1SJeff Kirsher } 23969aebddd1SJeff Kirsher 23979aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23989aebddd1SJeff Kirsher 23999aebddd1SJeff Kirsher if (!status) { 24009aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 24019aebddd1SJeff Kirsher resp = cmd->va; 24029aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 24039aebddd1SJeff Kirsher resp->snd_err) { 24049aebddd1SJeff Kirsher status = -1; 24059aebddd1SJeff Kirsher } 24069aebddd1SJeff Kirsher } 24079aebddd1SJeff Kirsher 24089aebddd1SJeff Kirsher err: 24099aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24109aebddd1SJeff Kirsher return status; 24119aebddd1SJeff Kirsher } 24129aebddd1SJeff Kirsher 24139aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 24149aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24159aebddd1SJeff Kirsher { 24169aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24179aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 24189aebddd1SJeff Kirsher int status; 24199aebddd1SJeff Kirsher 24209aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24219aebddd1SJeff Kirsher 24229aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24239aebddd1SJeff Kirsher if (!wrb) { 24249aebddd1SJeff Kirsher status = -EBUSY; 24259aebddd1SJeff Kirsher goto err; 24269aebddd1SJeff Kirsher } 24279aebddd1SJeff Kirsher req = nonemb_cmd->va; 24289aebddd1SJeff Kirsher 2429106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2430106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2431106df1e3SSomnath Kotur nonemb_cmd); 24329aebddd1SJeff Kirsher 24339aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24349aebddd1SJeff Kirsher 24359aebddd1SJeff Kirsher err: 24369aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24379aebddd1SJeff Kirsher return status; 24389aebddd1SJeff Kirsher } 24399aebddd1SJeff Kirsher 244042f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 24419aebddd1SJeff Kirsher { 24429aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24439aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 24449aebddd1SJeff Kirsher struct be_dma_mem cmd; 24459aebddd1SJeff Kirsher int status; 24469aebddd1SJeff Kirsher 2447f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2448f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2449f25b119cSPadmanabh Ratnakar return -EPERM; 2450f25b119cSPadmanabh Ratnakar 24519aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24529aebddd1SJeff Kirsher 24539aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24549aebddd1SJeff Kirsher if (!wrb) { 24559aebddd1SJeff Kirsher status = -EBUSY; 24569aebddd1SJeff Kirsher goto err; 24579aebddd1SJeff Kirsher } 24589aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 24599aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 24609aebddd1SJeff Kirsher &cmd.dma); 24619aebddd1SJeff Kirsher if (!cmd.va) { 24629aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 24639aebddd1SJeff Kirsher status = -ENOMEM; 24649aebddd1SJeff Kirsher goto err; 24659aebddd1SJeff Kirsher } 24669aebddd1SJeff Kirsher 24679aebddd1SJeff Kirsher req = cmd.va; 24689aebddd1SJeff Kirsher 2469106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2470106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2471106df1e3SSomnath Kotur wrb, &cmd); 24729aebddd1SJeff Kirsher 24739aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24749aebddd1SJeff Kirsher if (!status) { 24759aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 24769aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 247742f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 247842f11cf2SAjit Khaparde adapter->phy.interface_type = 24799aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 248042f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 248142f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 248242f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 248342f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 248442f11cf2SAjit Khaparde adapter->phy.misc_params = 248542f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 248668cb7e47SVasundhara Volam 248768cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 248868cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 248968cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 249068cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 249168cb7e47SVasundhara Volam } 24929aebddd1SJeff Kirsher } 24939aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 24949aebddd1SJeff Kirsher cmd.va, cmd.dma); 24959aebddd1SJeff Kirsher err: 24969aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24979aebddd1SJeff Kirsher return status; 24989aebddd1SJeff Kirsher } 24999aebddd1SJeff Kirsher 25009aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 25019aebddd1SJeff Kirsher { 25029aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25039aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 25049aebddd1SJeff Kirsher int status; 25059aebddd1SJeff Kirsher 25069aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25079aebddd1SJeff Kirsher 25089aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25099aebddd1SJeff Kirsher if (!wrb) { 25109aebddd1SJeff Kirsher status = -EBUSY; 25119aebddd1SJeff Kirsher goto err; 25129aebddd1SJeff Kirsher } 25139aebddd1SJeff Kirsher 25149aebddd1SJeff Kirsher req = embedded_payload(wrb); 25159aebddd1SJeff Kirsher 2516106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2517106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 25189aebddd1SJeff Kirsher 25199aebddd1SJeff Kirsher req->hdr.domain = domain; 25209aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 25219aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 25229aebddd1SJeff Kirsher 25239aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25249aebddd1SJeff Kirsher 25259aebddd1SJeff Kirsher err: 25269aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25279aebddd1SJeff Kirsher return status; 25289aebddd1SJeff Kirsher } 25299aebddd1SJeff Kirsher 25309aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 25319aebddd1SJeff Kirsher { 25329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25339aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 25349aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 25359aebddd1SJeff Kirsher int status; 25369aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 25379aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 25389aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 25399aebddd1SJeff Kirsher 2540d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2541d98ef50fSSuresh Reddy return -1; 2542d98ef50fSSuresh Reddy 25439aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 25449aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 25459aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 25469aebddd1SJeff Kirsher &attribs_cmd.dma); 25479aebddd1SJeff Kirsher if (!attribs_cmd.va) { 25489aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 25499aebddd1SJeff Kirsher "Memory allocation failure\n"); 2550d98ef50fSSuresh Reddy status = -ENOMEM; 2551d98ef50fSSuresh Reddy goto err; 25529aebddd1SJeff Kirsher } 25539aebddd1SJeff Kirsher 25549aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25559aebddd1SJeff Kirsher if (!wrb) { 25569aebddd1SJeff Kirsher status = -EBUSY; 25579aebddd1SJeff Kirsher goto err; 25589aebddd1SJeff Kirsher } 25599aebddd1SJeff Kirsher req = attribs_cmd.va; 25609aebddd1SJeff Kirsher 2561106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2562106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2563106df1e3SSomnath Kotur &attribs_cmd); 25649aebddd1SJeff Kirsher 25659aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25669aebddd1SJeff Kirsher if (!status) { 25679aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 25689aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 25699aebddd1SJeff Kirsher } 25709aebddd1SJeff Kirsher 25719aebddd1SJeff Kirsher err: 25729aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2573d98ef50fSSuresh Reddy if (attribs_cmd.va) 2574d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2575d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 25769aebddd1SJeff Kirsher return status; 25779aebddd1SJeff Kirsher } 25789aebddd1SJeff Kirsher 25799aebddd1SJeff Kirsher /* Uses mbox */ 25809aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 25819aebddd1SJeff Kirsher { 25829aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25839aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 25849aebddd1SJeff Kirsher int status; 25859aebddd1SJeff Kirsher 25869aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 25879aebddd1SJeff Kirsher return -1; 25889aebddd1SJeff Kirsher 25899aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25909aebddd1SJeff Kirsher if (!wrb) { 25919aebddd1SJeff Kirsher status = -EBUSY; 25929aebddd1SJeff Kirsher goto err; 25939aebddd1SJeff Kirsher } 25949aebddd1SJeff Kirsher 25959aebddd1SJeff Kirsher req = embedded_payload(wrb); 25969aebddd1SJeff Kirsher 2597106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2598106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 25999aebddd1SJeff Kirsher 26009aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 26019aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 26029aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 26039aebddd1SJeff Kirsher 26049aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26059aebddd1SJeff Kirsher if (!status) { 26069aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 26079aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 26089aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2609d379142bSSathya Perla if (!adapter->be3_native) 2610d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2611d379142bSSathya Perla "adapter not in advanced mode\n"); 26129aebddd1SJeff Kirsher } 26139aebddd1SJeff Kirsher err: 26149aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 26159aebddd1SJeff Kirsher return status; 26169aebddd1SJeff Kirsher } 2617590c391dSPadmanabh Ratnakar 2618f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2619f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2620f25b119cSPadmanabh Ratnakar u32 domain) 2621f25b119cSPadmanabh Ratnakar { 2622f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2623f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2624f25b119cSPadmanabh Ratnakar int status; 2625f25b119cSPadmanabh Ratnakar 2626f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2627f25b119cSPadmanabh Ratnakar 2628f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2629f25b119cSPadmanabh Ratnakar if (!wrb) { 2630f25b119cSPadmanabh Ratnakar status = -EBUSY; 2631f25b119cSPadmanabh Ratnakar goto err; 2632f25b119cSPadmanabh Ratnakar } 2633f25b119cSPadmanabh Ratnakar 2634f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2635f25b119cSPadmanabh Ratnakar 2636f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2637f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2638f25b119cSPadmanabh Ratnakar wrb, NULL); 2639f25b119cSPadmanabh Ratnakar 2640f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2641f25b119cSPadmanabh Ratnakar 2642f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2643f25b119cSPadmanabh Ratnakar if (!status) { 2644f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2645f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2646f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 2647f25b119cSPadmanabh Ratnakar } 2648f25b119cSPadmanabh Ratnakar 2649f25b119cSPadmanabh Ratnakar err: 2650f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2651f25b119cSPadmanabh Ratnakar return status; 2652f25b119cSPadmanabh Ratnakar } 2653f25b119cSPadmanabh Ratnakar 265404a06028SSathya Perla /* Set privilege(s) for a function */ 265504a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 265604a06028SSathya Perla u32 domain) 265704a06028SSathya Perla { 265804a06028SSathya Perla struct be_mcc_wrb *wrb; 265904a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 266004a06028SSathya Perla int status; 266104a06028SSathya Perla 266204a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 266304a06028SSathya Perla 266404a06028SSathya Perla wrb = wrb_from_mccq(adapter); 266504a06028SSathya Perla if (!wrb) { 266604a06028SSathya Perla status = -EBUSY; 266704a06028SSathya Perla goto err; 266804a06028SSathya Perla } 266904a06028SSathya Perla 267004a06028SSathya Perla req = embedded_payload(wrb); 267104a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 267204a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 267304a06028SSathya Perla wrb, NULL); 267404a06028SSathya Perla req->hdr.domain = domain; 267504a06028SSathya Perla if (lancer_chip(adapter)) 267604a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 267704a06028SSathya Perla else 267804a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 267904a06028SSathya Perla 268004a06028SSathya Perla status = be_mcc_notify_wait(adapter); 268104a06028SSathya Perla err: 268204a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 268304a06028SSathya Perla return status; 268404a06028SSathya Perla } 268504a06028SSathya Perla 26865a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 26875a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 26885a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 26895a712c13SSathya Perla */ 26901578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 26915a712c13SSathya Perla bool *pmac_id_valid, u32 *pmac_id, u8 domain) 2692590c391dSPadmanabh Ratnakar { 2693590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2694590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2695590c391dSPadmanabh Ratnakar int status; 2696590c391dSPadmanabh Ratnakar int mac_count; 2697e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2698e5e1ee89SPadmanabh Ratnakar int i; 2699e5e1ee89SPadmanabh Ratnakar 2700e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2701e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2702e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2703e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2704e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2705e5e1ee89SPadmanabh Ratnakar 2706e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2707e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2708e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2709e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2710e5e1ee89SPadmanabh Ratnakar } 2711590c391dSPadmanabh Ratnakar 2712590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2713590c391dSPadmanabh Ratnakar 2714590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2715590c391dSPadmanabh Ratnakar if (!wrb) { 2716590c391dSPadmanabh Ratnakar status = -EBUSY; 2717e5e1ee89SPadmanabh Ratnakar goto out; 2718590c391dSPadmanabh Ratnakar } 2719e5e1ee89SPadmanabh Ratnakar 2720e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2721590c391dSPadmanabh Ratnakar 2722590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2723bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2724bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2725590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2726e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 27275a712c13SSathya Perla if (*pmac_id_valid) { 27285a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 27295a712c13SSathya Perla req->iface_id = cpu_to_le16(adapter->if_handle); 27305a712c13SSathya Perla req->perm_override = 0; 27315a712c13SSathya Perla } else { 2732e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 27335a712c13SSathya Perla } 2734590c391dSPadmanabh Ratnakar 2735590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2736590c391dSPadmanabh Ratnakar if (!status) { 2737590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2738e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 27395a712c13SSathya Perla 27405a712c13SSathya Perla if (*pmac_id_valid) { 27415a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 27425a712c13SSathya Perla ETH_ALEN); 27435a712c13SSathya Perla goto out; 27445a712c13SSathya Perla } 27455a712c13SSathya Perla 2746e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2747e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 27481578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 27491578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 27501578e777SPadmanabh Ratnakar * found. 2751e5e1ee89SPadmanabh Ratnakar */ 2752590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2753e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2754e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2755e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2756e5e1ee89SPadmanabh Ratnakar 2757e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2758e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2759e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2760e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2761e5e1ee89SPadmanabh Ratnakar */ 2762e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 27635a712c13SSathya Perla *pmac_id_valid = true; 2764e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2765e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2766e5e1ee89SPadmanabh Ratnakar goto out; 2767590c391dSPadmanabh Ratnakar } 2768590c391dSPadmanabh Ratnakar } 27691578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 27705a712c13SSathya Perla *pmac_id_valid = false; 2771e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2772e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2773590c391dSPadmanabh Ratnakar } 2774590c391dSPadmanabh Ratnakar 2775e5e1ee89SPadmanabh Ratnakar out: 2776590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2777e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2778e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2779590c391dSPadmanabh Ratnakar return status; 2780590c391dSPadmanabh Ratnakar } 2781590c391dSPadmanabh Ratnakar 27825a712c13SSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac) 27835a712c13SSathya Perla { 27845a712c13SSathya Perla bool active = true; 27855a712c13SSathya Perla 27863175d8c2SSathya Perla if (BEx_chip(adapter)) 27875a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 27885a712c13SSathya Perla adapter->if_handle, curr_pmac_id); 27893175d8c2SSathya Perla else 27903175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 27913175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 27923175d8c2SSathya Perla &curr_pmac_id, 0); 27935a712c13SSathya Perla } 27945a712c13SSathya Perla 279595046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 279695046b92SSathya Perla { 279795046b92SSathya Perla int status; 279895046b92SSathya Perla bool pmac_valid = false; 279995046b92SSathya Perla 280095046b92SSathya Perla memset(mac, 0, ETH_ALEN); 280195046b92SSathya Perla 28023175d8c2SSathya Perla if (BEx_chip(adapter)) { 28033175d8c2SSathya Perla if (be_physfn(adapter)) 28043175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 28053175d8c2SSathya Perla 0); 280695046b92SSathya Perla else 280795046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 280895046b92SSathya Perla adapter->if_handle, 0); 28093175d8c2SSathya Perla } else { 28103175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 28113175d8c2SSathya Perla NULL, 0); 28123175d8c2SSathya Perla } 28133175d8c2SSathya Perla 281495046b92SSathya Perla return status; 281595046b92SSathya Perla } 281695046b92SSathya Perla 2817590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2818590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2819590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2820590c391dSPadmanabh Ratnakar { 2821590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2822590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2823590c391dSPadmanabh Ratnakar int status; 2824590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2825590c391dSPadmanabh Ratnakar 2826590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2827590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2828590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2829590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2830d0320f75SJoe Perches if (!cmd.va) 2831590c391dSPadmanabh Ratnakar return -ENOMEM; 2832590c391dSPadmanabh Ratnakar 2833590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2834590c391dSPadmanabh Ratnakar 2835590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2836590c391dSPadmanabh Ratnakar if (!wrb) { 2837590c391dSPadmanabh Ratnakar status = -EBUSY; 2838590c391dSPadmanabh Ratnakar goto err; 2839590c391dSPadmanabh Ratnakar } 2840590c391dSPadmanabh Ratnakar 2841590c391dSPadmanabh Ratnakar req = cmd.va; 2842590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2843590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2844590c391dSPadmanabh Ratnakar wrb, &cmd); 2845590c391dSPadmanabh Ratnakar 2846590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2847590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2848590c391dSPadmanabh Ratnakar if (mac_count) 2849590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2850590c391dSPadmanabh Ratnakar 2851590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2852590c391dSPadmanabh Ratnakar 2853590c391dSPadmanabh Ratnakar err: 2854590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2855590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2856590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2857590c391dSPadmanabh Ratnakar return status; 2858590c391dSPadmanabh Ratnakar } 28594762f6ceSAjit Khaparde 28603175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 28613175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 28623175d8c2SSathya Perla * current list are active. 28633175d8c2SSathya Perla */ 28643175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 28653175d8c2SSathya Perla { 28663175d8c2SSathya Perla bool active_mac = false; 28673175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 28683175d8c2SSathya Perla u32 pmac_id; 28693175d8c2SSathya Perla int status; 28703175d8c2SSathya Perla 28713175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 28723175d8c2SSathya Perla &pmac_id, dom); 28733175d8c2SSathya Perla if (!status && active_mac) 28743175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 28753175d8c2SSathya Perla 28763175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 28773175d8c2SSathya Perla } 28783175d8c2SSathya Perla 2879f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2880a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 2881f1f3ee1bSAjit Khaparde { 2882f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2883f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2884f1f3ee1bSAjit Khaparde void *ctxt; 2885f1f3ee1bSAjit Khaparde int status; 2886f1f3ee1bSAjit Khaparde 2887f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2888f1f3ee1bSAjit Khaparde 2889f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2890f1f3ee1bSAjit Khaparde if (!wrb) { 2891f1f3ee1bSAjit Khaparde status = -EBUSY; 2892f1f3ee1bSAjit Khaparde goto err; 2893f1f3ee1bSAjit Khaparde } 2894f1f3ee1bSAjit Khaparde 2895f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2896f1f3ee1bSAjit Khaparde ctxt = &req->context; 2897f1f3ee1bSAjit Khaparde 2898f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2899f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2900f1f3ee1bSAjit Khaparde 2901f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2902f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2903f1f3ee1bSAjit Khaparde if (pvid) { 2904f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2905f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2906f1f3ee1bSAjit Khaparde } 2907a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 2908a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 2909a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2910a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 2911a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 2912a77dcb8cSAjit Khaparde ctxt, hsw_mode); 2913a77dcb8cSAjit Khaparde } 2914f1f3ee1bSAjit Khaparde 2915f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2916f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2917f1f3ee1bSAjit Khaparde 2918f1f3ee1bSAjit Khaparde err: 2919f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2920f1f3ee1bSAjit Khaparde return status; 2921f1f3ee1bSAjit Khaparde } 2922f1f3ee1bSAjit Khaparde 2923f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2924f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2925a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 2926f1f3ee1bSAjit Khaparde { 2927f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2928f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2929f1f3ee1bSAjit Khaparde void *ctxt; 2930f1f3ee1bSAjit Khaparde int status; 2931f1f3ee1bSAjit Khaparde u16 vid; 2932f1f3ee1bSAjit Khaparde 2933f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2934f1f3ee1bSAjit Khaparde 2935f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2936f1f3ee1bSAjit Khaparde if (!wrb) { 2937f1f3ee1bSAjit Khaparde status = -EBUSY; 2938f1f3ee1bSAjit Khaparde goto err; 2939f1f3ee1bSAjit Khaparde } 2940f1f3ee1bSAjit Khaparde 2941f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2942f1f3ee1bSAjit Khaparde ctxt = &req->context; 2943f1f3ee1bSAjit Khaparde 2944f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2945f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2946f1f3ee1bSAjit Khaparde 2947f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2948a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 2949a77dcb8cSAjit Khaparde ctxt, intf_id); 2950f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2951a77dcb8cSAjit Khaparde 2952a77dcb8cSAjit Khaparde if (!BEx_chip(adapter)) { 2953a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 2954a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2955a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 2956a77dcb8cSAjit Khaparde } 2957f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2958f1f3ee1bSAjit Khaparde 2959f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2960f1f3ee1bSAjit Khaparde if (!status) { 2961f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 2962f1f3ee1bSAjit Khaparde embedded_payload(wrb); 2963f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 2964f1f3ee1bSAjit Khaparde sizeof(resp->context)); 2965f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2966f1f3ee1bSAjit Khaparde pvid, &resp->context); 2967a77dcb8cSAjit Khaparde if (pvid) 2968f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 2969a77dcb8cSAjit Khaparde if (mode) 2970a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2971a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 2972f1f3ee1bSAjit Khaparde } 2973f1f3ee1bSAjit Khaparde 2974f1f3ee1bSAjit Khaparde err: 2975f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2976f1f3ee1bSAjit Khaparde return status; 2977f1f3ee1bSAjit Khaparde } 2978f1f3ee1bSAjit Khaparde 29794762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 29804762f6ceSAjit Khaparde { 29814762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 29824762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 29834762f6ceSAjit Khaparde int status; 29844762f6ceSAjit Khaparde int payload_len = sizeof(*req); 29854762f6ceSAjit Khaparde struct be_dma_mem cmd; 29864762f6ceSAjit Khaparde 2987f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 2988f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 2989f25b119cSPadmanabh Ratnakar return -EPERM; 2990f25b119cSPadmanabh Ratnakar 2991d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2992d98ef50fSSuresh Reddy return -1; 2993d98ef50fSSuresh Reddy 29944762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 29954762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 29964762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 29974762f6ceSAjit Khaparde &cmd.dma); 29984762f6ceSAjit Khaparde if (!cmd.va) { 29994762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 30004762f6ceSAjit Khaparde "Memory allocation failure\n"); 3001d98ef50fSSuresh Reddy status = -ENOMEM; 3002d98ef50fSSuresh Reddy goto err; 30034762f6ceSAjit Khaparde } 30044762f6ceSAjit Khaparde 30054762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 30064762f6ceSAjit Khaparde if (!wrb) { 30074762f6ceSAjit Khaparde status = -EBUSY; 30084762f6ceSAjit Khaparde goto err; 30094762f6ceSAjit Khaparde } 30104762f6ceSAjit Khaparde 30114762f6ceSAjit Khaparde req = cmd.va; 30124762f6ceSAjit Khaparde 30134762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 30144762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 30154762f6ceSAjit Khaparde payload_len, wrb, &cmd); 30164762f6ceSAjit Khaparde 30174762f6ceSAjit Khaparde req->hdr.version = 1; 30184762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 30194762f6ceSAjit Khaparde 30204762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 30214762f6ceSAjit Khaparde if (!status) { 30224762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 30234762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 30244762f6ceSAjit Khaparde 30254762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 30264762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 30274762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 30284762f6ceSAjit Khaparde status = -1; 30294762f6ceSAjit Khaparde goto err; 30304762f6ceSAjit Khaparde } 30314762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 30324762f6ceSAjit Khaparde } 30334762f6ceSAjit Khaparde err: 30344762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3035d98ef50fSSuresh Reddy if (cmd.va) 30364762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 30374762f6ceSAjit Khaparde return status; 3038941a77d5SSomnath Kotur 3039941a77d5SSomnath Kotur } 3040941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3041941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3042941a77d5SSomnath Kotur { 3043941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3044941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3045941a77d5SSomnath Kotur int status; 3046941a77d5SSomnath Kotur 3047941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3048941a77d5SSomnath Kotur return -1; 3049941a77d5SSomnath Kotur 3050941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3051941a77d5SSomnath Kotur if (!wrb) { 3052941a77d5SSomnath Kotur status = -EBUSY; 3053941a77d5SSomnath Kotur goto err; 3054941a77d5SSomnath Kotur } 3055941a77d5SSomnath Kotur 3056941a77d5SSomnath Kotur req = cmd->va; 3057941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3058941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3059941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3060941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3061941a77d5SSomnath Kotur 3062941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3063941a77d5SSomnath Kotur err: 3064941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3065941a77d5SSomnath Kotur return status; 3066941a77d5SSomnath Kotur } 3067941a77d5SSomnath Kotur 3068941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3069941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3070941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3071941a77d5SSomnath Kotur { 3072941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3073941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3074941a77d5SSomnath Kotur int status; 3075941a77d5SSomnath Kotur 3076941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3077941a77d5SSomnath Kotur 3078941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3079941a77d5SSomnath Kotur if (!wrb) { 3080941a77d5SSomnath Kotur status = -EBUSY; 3081941a77d5SSomnath Kotur goto err; 3082941a77d5SSomnath Kotur } 3083941a77d5SSomnath Kotur 3084941a77d5SSomnath Kotur req = cmd->va; 3085941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3086941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3087941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3088941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3089941a77d5SSomnath Kotur 3090941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3091941a77d5SSomnath Kotur err: 3092941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3093941a77d5SSomnath Kotur return status; 30944762f6ceSAjit Khaparde } 30956a4ab669SParav Pandit 3096b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3097b4e32a71SPadmanabh Ratnakar { 3098b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3099b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3100b4e32a71SPadmanabh Ratnakar int status; 3101b4e32a71SPadmanabh Ratnakar 3102b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3103b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3104b4e32a71SPadmanabh Ratnakar return 0; 3105b4e32a71SPadmanabh Ratnakar } 3106b4e32a71SPadmanabh Ratnakar 3107b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3108b4e32a71SPadmanabh Ratnakar 3109b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3110b4e32a71SPadmanabh Ratnakar if (!wrb) { 3111b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3112b4e32a71SPadmanabh Ratnakar goto err; 3113b4e32a71SPadmanabh Ratnakar } 3114b4e32a71SPadmanabh Ratnakar 3115b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3116b4e32a71SPadmanabh Ratnakar 3117b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3118b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3119b4e32a71SPadmanabh Ratnakar NULL); 3120b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3121b4e32a71SPadmanabh Ratnakar 3122b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3123b4e32a71SPadmanabh Ratnakar if (!status) { 3124b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3125b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3126b4e32a71SPadmanabh Ratnakar } else { 3127b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3128b4e32a71SPadmanabh Ratnakar } 3129b4e32a71SPadmanabh Ratnakar err: 3130b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3131b4e32a71SPadmanabh Ratnakar return status; 3132b4e32a71SPadmanabh Ratnakar } 3133b4e32a71SPadmanabh Ratnakar 3134150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3135abb93951SPadmanabh Ratnakar { 3136150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3137abb93951SPadmanabh Ratnakar int i; 3138abb93951SPadmanabh Ratnakar 3139abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3140150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3141150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3142150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3143150d58c7SVasundhara Volam 3144150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3145150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3146150d58c7SVasundhara Volam } 3147950e2958SWei Yang return NULL; 3148abb93951SPadmanabh Ratnakar } 3149abb93951SPadmanabh Ratnakar 3150150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3151150d58c7SVasundhara Volam u32 desc_count) 3152150d58c7SVasundhara Volam { 3153150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3154150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3155150d58c7SVasundhara Volam int i; 3156150d58c7SVasundhara Volam 3157150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3158150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3159150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3160150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3161150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3162150d58c7SVasundhara Volam return pcie; 3163150d58c7SVasundhara Volam } 3164150d58c7SVasundhara Volam 3165150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3166150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3167150d58c7SVasundhara Volam } 3168abb93951SPadmanabh Ratnakar return NULL; 3169abb93951SPadmanabh Ratnakar } 3170abb93951SPadmanabh Ratnakar 317192bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 317292bf14abSSathya Perla struct be_nic_res_desc *desc) 317392bf14abSSathya Perla { 317492bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 317592bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 317692bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 317792bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 317892bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 317992bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 318092bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 318192bf14abSSathya Perla /* Clear flags that driver is not interested in */ 318292bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 318392bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 318492bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 318592bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 318692bf14abSSathya Perla res->max_rss_qs -= 1; 318792bf14abSSathya Perla } 318892bf14abSSathya Perla 3189abb93951SPadmanabh Ratnakar /* Uses Mbox */ 319092bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3191abb93951SPadmanabh Ratnakar { 3192abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3193abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3194abb93951SPadmanabh Ratnakar int status; 3195abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3196abb93951SPadmanabh Ratnakar 3197d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3198d98ef50fSSuresh Reddy return -1; 3199d98ef50fSSuresh Reddy 3200abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3201abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3202abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3203abb93951SPadmanabh Ratnakar &cmd.dma); 3204abb93951SPadmanabh Ratnakar if (!cmd.va) { 3205abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3206d98ef50fSSuresh Reddy status = -ENOMEM; 3207d98ef50fSSuresh Reddy goto err; 3208abb93951SPadmanabh Ratnakar } 3209abb93951SPadmanabh Ratnakar 3210abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3211abb93951SPadmanabh Ratnakar if (!wrb) { 3212abb93951SPadmanabh Ratnakar status = -EBUSY; 3213abb93951SPadmanabh Ratnakar goto err; 3214abb93951SPadmanabh Ratnakar } 3215abb93951SPadmanabh Ratnakar 3216abb93951SPadmanabh Ratnakar req = cmd.va; 3217abb93951SPadmanabh Ratnakar 3218abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3219abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3220abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3221abb93951SPadmanabh Ratnakar 322228710c55SKalesh AP if (skyhawk_chip(adapter)) 322328710c55SKalesh AP req->hdr.version = 1; 322428710c55SKalesh AP 3225abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3226abb93951SPadmanabh Ratnakar if (!status) { 3227abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3228abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3229150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3230abb93951SPadmanabh Ratnakar 3231150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3232abb93951SPadmanabh Ratnakar if (!desc) { 3233abb93951SPadmanabh Ratnakar status = -EINVAL; 3234abb93951SPadmanabh Ratnakar goto err; 3235abb93951SPadmanabh Ratnakar } 3236abb93951SPadmanabh Ratnakar 3237d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 323892bf14abSSathya Perla be_copy_nic_desc(res, desc); 3239abb93951SPadmanabh Ratnakar } 3240abb93951SPadmanabh Ratnakar err: 3241abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3242d98ef50fSSuresh Reddy if (cmd.va) 3243d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3244abb93951SPadmanabh Ratnakar return status; 3245abb93951SPadmanabh Ratnakar } 3246abb93951SPadmanabh Ratnakar 3247a05f99dbSVasundhara Volam /* Uses mbox */ 32484188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3249a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3250abb93951SPadmanabh Ratnakar { 3251abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3252abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3253abb93951SPadmanabh Ratnakar int status; 3254abb93951SPadmanabh Ratnakar 3255a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3256a05f99dbSVasundhara Volam return -1; 3257a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3258a05f99dbSVasundhara Volam 3259a05f99dbSVasundhara Volam req = cmd->va; 3260a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3261a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3262a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3263a05f99dbSVasundhara Volam 3264a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3265a05f99dbSVasundhara Volam req->hdr.domain = domain; 3266a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3267a05f99dbSVasundhara Volam req->hdr.version = 1; 3268a05f99dbSVasundhara Volam 3269a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3270a05f99dbSVasundhara Volam 3271a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3272a05f99dbSVasundhara Volam return status; 3273abb93951SPadmanabh Ratnakar } 3274abb93951SPadmanabh Ratnakar 3275a05f99dbSVasundhara Volam /* Uses sync mcc */ 32764188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3277a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3278a05f99dbSVasundhara Volam { 3279a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3280a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3281a05f99dbSVasundhara Volam int status; 3282a05f99dbSVasundhara Volam 3283abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3284abb93951SPadmanabh Ratnakar 3285abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3286abb93951SPadmanabh Ratnakar if (!wrb) { 3287abb93951SPadmanabh Ratnakar status = -EBUSY; 3288abb93951SPadmanabh Ratnakar goto err; 3289abb93951SPadmanabh Ratnakar } 3290abb93951SPadmanabh Ratnakar 3291a05f99dbSVasundhara Volam req = cmd->va; 3292abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3293abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3294a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3295abb93951SPadmanabh Ratnakar 3296abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3297abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3298a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3299a05f99dbSVasundhara Volam req->hdr.version = 1; 3300abb93951SPadmanabh Ratnakar 3301abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3302a05f99dbSVasundhara Volam 3303a05f99dbSVasundhara Volam err: 3304a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3305a05f99dbSVasundhara Volam return status; 3306a05f99dbSVasundhara Volam } 3307a05f99dbSVasundhara Volam 3308a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 330992bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 331092bf14abSSathya Perla struct be_resources *res, u8 domain) 3311a05f99dbSVasundhara Volam { 3312150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3313150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3314150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3315a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3316a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3317150d58c7SVasundhara Volam u32 desc_count; 3318a05f99dbSVasundhara Volam int status; 3319a05f99dbSVasundhara Volam 3320a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3321a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3322150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3323150d58c7SVasundhara Volam if (!cmd.va) 3324a05f99dbSVasundhara Volam return -ENOMEM; 3325a05f99dbSVasundhara Volam 3326a05f99dbSVasundhara Volam if (!mccq->created) 3327a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3328a05f99dbSVasundhara Volam else 3329a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3330150d58c7SVasundhara Volam if (status) 3331abb93951SPadmanabh Ratnakar goto err; 3332150d58c7SVasundhara Volam 3333150d58c7SVasundhara Volam resp = cmd.va; 3334150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3335150d58c7SVasundhara Volam 3336150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3337150d58c7SVasundhara Volam desc_count); 3338150d58c7SVasundhara Volam if (pcie) 333992bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3340150d58c7SVasundhara Volam 3341150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 334292bf14abSSathya Perla if (nic) 334392bf14abSSathya Perla be_copy_nic_desc(res, nic); 334492bf14abSSathya Perla 3345abb93951SPadmanabh Ratnakar err: 3346a05f99dbSVasundhara Volam if (cmd.va) 3347150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3348abb93951SPadmanabh Ratnakar return status; 3349abb93951SPadmanabh Ratnakar } 3350abb93951SPadmanabh Ratnakar 3351150d58c7SVasundhara Volam /* Currently only Lancer uses this command and it supports version 0 only 3352150d58c7SVasundhara Volam * Uses sync mcc 3353150d58c7SVasundhara Volam */ 3354d5c18473SPadmanabh Ratnakar int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, 3355d5c18473SPadmanabh Ratnakar u8 domain) 3356d5c18473SPadmanabh Ratnakar { 3357d5c18473SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3358d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3359d5c18473SPadmanabh Ratnakar int status; 3360d5c18473SPadmanabh Ratnakar 3361d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3362d5c18473SPadmanabh Ratnakar 3363d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3364d5c18473SPadmanabh Ratnakar if (!wrb) { 3365d5c18473SPadmanabh Ratnakar status = -EBUSY; 3366d5c18473SPadmanabh Ratnakar goto err; 3367d5c18473SPadmanabh Ratnakar } 3368d5c18473SPadmanabh Ratnakar 3369d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3370d5c18473SPadmanabh Ratnakar 3371d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3372d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3373d5c18473SPadmanabh Ratnakar wrb, NULL); 3374d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3375d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3376150d58c7SVasundhara Volam req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3377150d58c7SVasundhara Volam req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3378d5c18473SPadmanabh Ratnakar req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV); 3379d5c18473SPadmanabh Ratnakar req->nic_desc.pf_num = adapter->pf_number; 3380d5c18473SPadmanabh Ratnakar req->nic_desc.vf_num = domain; 3381d5c18473SPadmanabh Ratnakar 3382d5c18473SPadmanabh Ratnakar /* Mark fields invalid */ 3383d5c18473SPadmanabh Ratnakar req->nic_desc.unicast_mac_count = 0xFFFF; 3384d5c18473SPadmanabh Ratnakar req->nic_desc.mcc_count = 0xFFFF; 3385d5c18473SPadmanabh Ratnakar req->nic_desc.vlan_count = 0xFFFF; 3386d5c18473SPadmanabh Ratnakar req->nic_desc.mcast_mac_count = 0xFFFF; 3387d5c18473SPadmanabh Ratnakar req->nic_desc.txq_count = 0xFFFF; 3388d5c18473SPadmanabh Ratnakar req->nic_desc.rq_count = 0xFFFF; 3389d5c18473SPadmanabh Ratnakar req->nic_desc.rssq_count = 0xFFFF; 3390d5c18473SPadmanabh Ratnakar req->nic_desc.lro_count = 0xFFFF; 3391d5c18473SPadmanabh Ratnakar req->nic_desc.cq_count = 0xFFFF; 3392d5c18473SPadmanabh Ratnakar req->nic_desc.toe_conn_count = 0xFFFF; 3393d5c18473SPadmanabh Ratnakar req->nic_desc.eq_count = 0xFFFF; 3394d5c18473SPadmanabh Ratnakar req->nic_desc.link_param = 0xFF; 3395d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = 0xFFFFFFFF; 3396d5c18473SPadmanabh Ratnakar req->nic_desc.acpi_params = 0xFF; 3397d5c18473SPadmanabh Ratnakar req->nic_desc.wol_param = 0x0F; 3398d5c18473SPadmanabh Ratnakar 3399d5c18473SPadmanabh Ratnakar /* Change BW */ 3400d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = cpu_to_le32(bps); 3401d5c18473SPadmanabh Ratnakar req->nic_desc.bw_max = cpu_to_le32(bps); 3402d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3403d5c18473SPadmanabh Ratnakar err: 3404d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3405d5c18473SPadmanabh Ratnakar return status; 3406d5c18473SPadmanabh Ratnakar } 3407d5c18473SPadmanabh Ratnakar 34084c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 34094c876616SSathya Perla int vf_num) 34104c876616SSathya Perla { 34114c876616SSathya Perla struct be_mcc_wrb *wrb; 34124c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 34134c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 34144c876616SSathya Perla int status; 34154c876616SSathya Perla 34164c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 34174c876616SSathya Perla 34184c876616SSathya Perla wrb = wrb_from_mccq(adapter); 34194c876616SSathya Perla if (!wrb) { 34204c876616SSathya Perla status = -EBUSY; 34214c876616SSathya Perla goto err; 34224c876616SSathya Perla } 34234c876616SSathya Perla req = embedded_payload(wrb); 34244c876616SSathya Perla 34254c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 34264c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 34274c876616SSathya Perla wrb, NULL); 34284c876616SSathya Perla req->hdr.domain = vf_num + 1; 34294c876616SSathya Perla 34304c876616SSathya Perla status = be_mcc_notify_wait(adapter); 34314c876616SSathya Perla if (!status) { 34324c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 34334c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 34344c876616SSathya Perla } 34354c876616SSathya Perla 34364c876616SSathya Perla err: 34374c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 34384c876616SSathya Perla return status; 34394c876616SSathya Perla } 34404c876616SSathya Perla 34415c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 34425c510811SSomnath Kotur { 34435c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 34445c510811SSomnath Kotur u32 reg_val; 34455c510811SSomnath Kotur int status = 0, i; 34465c510811SSomnath Kotur 34475c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 34485c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 34495c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 34505c510811SSomnath Kotur break; 34515c510811SSomnath Kotur 34525c510811SSomnath Kotur ssleep(1); 34535c510811SSomnath Kotur } 34545c510811SSomnath Kotur 34555c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 34565c510811SSomnath Kotur status = -1; 34575c510811SSomnath Kotur 34585c510811SSomnath Kotur return status; 34595c510811SSomnath Kotur } 34605c510811SSomnath Kotur 34615c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 34625c510811SSomnath Kotur { 34635c510811SSomnath Kotur int status = 0; 34645c510811SSomnath Kotur 34655c510811SSomnath Kotur status = lancer_wait_idle(adapter); 34665c510811SSomnath Kotur if (status) 34675c510811SSomnath Kotur return status; 34685c510811SSomnath Kotur 34695c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 34705c510811SSomnath Kotur 34715c510811SSomnath Kotur return status; 34725c510811SSomnath Kotur } 34735c510811SSomnath Kotur 34745c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 34755c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 34765c510811SSomnath Kotur { 34775c510811SSomnath Kotur u32 sliport_status = 0; 34785c510811SSomnath Kotur 34795c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 34805c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 34815c510811SSomnath Kotur } 34825c510811SSomnath Kotur 34835c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 34845c510811SSomnath Kotur { 34855c510811SSomnath Kotur int status; 34865c510811SSomnath Kotur 34875c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 34885c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 34895c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 34905c510811SSomnath Kotur if (status < 0) { 34915c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 34925c510811SSomnath Kotur return status; 34935c510811SSomnath Kotur } 34945c510811SSomnath Kotur 34955c510811SSomnath Kotur status = lancer_wait_idle(adapter); 34965c510811SSomnath Kotur if (status) 34975c510811SSomnath Kotur return status; 34985c510811SSomnath Kotur 34995c510811SSomnath Kotur if (!dump_present(adapter)) { 35005c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 35015c510811SSomnath Kotur return -1; 35025c510811SSomnath Kotur } 35035c510811SSomnath Kotur 35045c510811SSomnath Kotur return 0; 35055c510811SSomnath Kotur } 35065c510811SSomnath Kotur 3507dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3508dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3509dcf7ebbaSPadmanabh Ratnakar { 3510dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3511dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3512dcf7ebbaSPadmanabh Ratnakar int status; 3513dcf7ebbaSPadmanabh Ratnakar 35140599863dSVasundhara Volam if (BEx_chip(adapter)) 3515dcf7ebbaSPadmanabh Ratnakar return 0; 3516dcf7ebbaSPadmanabh Ratnakar 3517dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3518dcf7ebbaSPadmanabh Ratnakar 3519dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3520dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3521dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3522dcf7ebbaSPadmanabh Ratnakar goto err; 3523dcf7ebbaSPadmanabh Ratnakar } 3524dcf7ebbaSPadmanabh Ratnakar 3525dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3526dcf7ebbaSPadmanabh Ratnakar 3527dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3528dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3529dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3530dcf7ebbaSPadmanabh Ratnakar 3531dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3532dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3533dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3534dcf7ebbaSPadmanabh Ratnakar err: 3535dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3536dcf7ebbaSPadmanabh Ratnakar return status; 3537dcf7ebbaSPadmanabh Ratnakar } 3538dcf7ebbaSPadmanabh Ratnakar 353968c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 354068c45a2dSSomnath Kotur { 354168c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 354268c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 354368c45a2dSSomnath Kotur int status; 354468c45a2dSSomnath Kotur 354568c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 354668c45a2dSSomnath Kotur return -1; 354768c45a2dSSomnath Kotur 354868c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 354968c45a2dSSomnath Kotur 355068c45a2dSSomnath Kotur req = embedded_payload(wrb); 355168c45a2dSSomnath Kotur 355268c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 355368c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 355468c45a2dSSomnath Kotur wrb, NULL); 355568c45a2dSSomnath Kotur 355668c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 355768c45a2dSSomnath Kotur 355868c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 355968c45a2dSSomnath Kotur 356068c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 356168c45a2dSSomnath Kotur return status; 356268c45a2dSSomnath Kotur } 356368c45a2dSSomnath Kotur 35646a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 35656a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 35666a4ab669SParav Pandit { 35676a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 35686a4ab669SParav Pandit struct be_mcc_wrb *wrb; 35696a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 35706a4ab669SParav Pandit struct be_cmd_req_hdr *req; 35716a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 35726a4ab669SParav Pandit int status; 35736a4ab669SParav Pandit 35746a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 35756a4ab669SParav Pandit 35766a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 35776a4ab669SParav Pandit if (!wrb) { 35786a4ab669SParav Pandit status = -EBUSY; 35796a4ab669SParav Pandit goto err; 35806a4ab669SParav Pandit } 35816a4ab669SParav Pandit req = embedded_payload(wrb); 35826a4ab669SParav Pandit resp = embedded_payload(wrb); 35836a4ab669SParav Pandit 35846a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 35856a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 35866a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 35876a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 35886a4ab669SParav Pandit 35896a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 35906a4ab669SParav Pandit if (cmd_status) 35916a4ab669SParav Pandit *cmd_status = (status & 0xffff); 35926a4ab669SParav Pandit if (ext_status) 35936a4ab669SParav Pandit *ext_status = 0; 35946a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 35956a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 35966a4ab669SParav Pandit err: 35976a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 35986a4ab669SParav Pandit return status; 35996a4ab669SParav Pandit } 36006a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3601