19aebddd1SJeff Kirsher /* 2c7bb15a6SVasundhara Volam * Copyright (C) 2005 - 2013 Emulex 39aebddd1SJeff Kirsher * All rights reserved. 49aebddd1SJeff Kirsher * 59aebddd1SJeff Kirsher * This program is free software; you can redistribute it and/or 69aebddd1SJeff Kirsher * modify it under the terms of the GNU General Public License version 2 79aebddd1SJeff Kirsher * as published by the Free Software Foundation. The full GNU General 89aebddd1SJeff Kirsher * Public License is included in this distribution in the file called COPYING. 99aebddd1SJeff Kirsher * 109aebddd1SJeff Kirsher * Contact Information: 119aebddd1SJeff Kirsher * linux-drivers@emulex.com 129aebddd1SJeff Kirsher * 139aebddd1SJeff Kirsher * Emulex 149aebddd1SJeff Kirsher * 3333 Susan Street 159aebddd1SJeff Kirsher * Costa Mesa, CA 92626 169aebddd1SJeff Kirsher */ 179aebddd1SJeff Kirsher 186a4ab669SParav Pandit #include <linux/module.h> 199aebddd1SJeff Kirsher #include "be.h" 209aebddd1SJeff Kirsher #include "be_cmds.h" 219aebddd1SJeff Kirsher 22f25b119cSPadmanabh Ratnakar static struct be_cmd_priv_map cmd_priv_map[] = { 23f25b119cSPadmanabh Ratnakar { 24f25b119cSPadmanabh Ratnakar OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 25f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 26f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 27f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 28f25b119cSPadmanabh Ratnakar }, 29f25b119cSPadmanabh Ratnakar { 30f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FLOW_CONTROL, 31f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 32f25b119cSPadmanabh Ratnakar BE_PRIV_LNKQUERY | BE_PRIV_VHADM | 33f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 34f25b119cSPadmanabh Ratnakar }, 35f25b119cSPadmanabh Ratnakar { 36f25b119cSPadmanabh Ratnakar OPCODE_COMMON_SET_FLOW_CONTROL, 37f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 38f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 39f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 40f25b119cSPadmanabh Ratnakar }, 41f25b119cSPadmanabh Ratnakar { 42f25b119cSPadmanabh Ratnakar OPCODE_ETH_GET_PPORT_STATS, 43f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH, 44f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 45f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 46f25b119cSPadmanabh Ratnakar }, 47f25b119cSPadmanabh Ratnakar { 48f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_PHY_DETAILS, 49f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON, 50f25b119cSPadmanabh Ratnakar BE_PRIV_LNKMGMT | BE_PRIV_VHADM | 51f25b119cSPadmanabh Ratnakar BE_PRIV_DEVCFG | BE_PRIV_DEVSEC 52f25b119cSPadmanabh Ratnakar } 53f25b119cSPadmanabh Ratnakar }; 54f25b119cSPadmanabh Ratnakar 55f25b119cSPadmanabh Ratnakar static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 56f25b119cSPadmanabh Ratnakar u8 subsystem) 57f25b119cSPadmanabh Ratnakar { 58f25b119cSPadmanabh Ratnakar int i; 59f25b119cSPadmanabh Ratnakar int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 60f25b119cSPadmanabh Ratnakar u32 cmd_privileges = adapter->cmd_privileges; 61f25b119cSPadmanabh Ratnakar 62f25b119cSPadmanabh Ratnakar for (i = 0; i < num_entries; i++) 63f25b119cSPadmanabh Ratnakar if (opcode == cmd_priv_map[i].opcode && 64f25b119cSPadmanabh Ratnakar subsystem == cmd_priv_map[i].subsystem) 65f25b119cSPadmanabh Ratnakar if (!(cmd_privileges & cmd_priv_map[i].priv_mask)) 66f25b119cSPadmanabh Ratnakar return false; 67f25b119cSPadmanabh Ratnakar 68f25b119cSPadmanabh Ratnakar return true; 69f25b119cSPadmanabh Ratnakar } 70f25b119cSPadmanabh Ratnakar 713de09455SSomnath Kotur static inline void *embedded_payload(struct be_mcc_wrb *wrb) 723de09455SSomnath Kotur { 733de09455SSomnath Kotur return wrb->payload.embedded_payload; 743de09455SSomnath Kotur } 759aebddd1SJeff Kirsher 769aebddd1SJeff Kirsher static void be_mcc_notify(struct be_adapter *adapter) 779aebddd1SJeff Kirsher { 789aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 799aebddd1SJeff Kirsher u32 val = 0; 809aebddd1SJeff Kirsher 816589ade0SSathya Perla if (be_error(adapter)) 829aebddd1SJeff Kirsher return; 839aebddd1SJeff Kirsher 849aebddd1SJeff Kirsher val |= mccq->id & DB_MCCQ_RING_ID_MASK; 859aebddd1SJeff Kirsher val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; 869aebddd1SJeff Kirsher 879aebddd1SJeff Kirsher wmb(); 889aebddd1SJeff Kirsher iowrite32(val, adapter->db + DB_MCCQ_OFFSET); 899aebddd1SJeff Kirsher } 909aebddd1SJeff Kirsher 919aebddd1SJeff Kirsher /* To check if valid bit is set, check the entire word as we don't know 929aebddd1SJeff Kirsher * the endianness of the data (old entry is host endian while a new entry is 939aebddd1SJeff Kirsher * little endian) */ 949aebddd1SJeff Kirsher static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) 959aebddd1SJeff Kirsher { 969e9ff4b7SSathya Perla u32 flags; 979e9ff4b7SSathya Perla 989aebddd1SJeff Kirsher if (compl->flags != 0) { 999e9ff4b7SSathya Perla flags = le32_to_cpu(compl->flags); 1009e9ff4b7SSathya Perla if (flags & CQE_FLAGS_VALID_MASK) { 1019e9ff4b7SSathya Perla compl->flags = flags; 1029aebddd1SJeff Kirsher return true; 1039aebddd1SJeff Kirsher } 1049aebddd1SJeff Kirsher } 1059e9ff4b7SSathya Perla return false; 1069e9ff4b7SSathya Perla } 1079aebddd1SJeff Kirsher 1089aebddd1SJeff Kirsher /* Need to reset the entire word that houses the valid bit */ 1099aebddd1SJeff Kirsher static inline void be_mcc_compl_use(struct be_mcc_compl *compl) 1109aebddd1SJeff Kirsher { 1119aebddd1SJeff Kirsher compl->flags = 0; 1129aebddd1SJeff Kirsher } 1139aebddd1SJeff Kirsher 114652bf646SPadmanabh Ratnakar static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1) 115652bf646SPadmanabh Ratnakar { 116652bf646SPadmanabh Ratnakar unsigned long addr; 117652bf646SPadmanabh Ratnakar 118652bf646SPadmanabh Ratnakar addr = tag1; 119652bf646SPadmanabh Ratnakar addr = ((addr << 16) << 16) | tag0; 120652bf646SPadmanabh Ratnakar return (void *)addr; 121652bf646SPadmanabh Ratnakar } 122652bf646SPadmanabh Ratnakar 1239aebddd1SJeff Kirsher static int be_mcc_compl_process(struct be_adapter *adapter, 1249aebddd1SJeff Kirsher struct be_mcc_compl *compl) 1259aebddd1SJeff Kirsher { 1269aebddd1SJeff Kirsher u16 compl_status, extd_status; 127652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp_hdr; 128652bf646SPadmanabh Ratnakar u8 opcode = 0, subsystem = 0; 1299aebddd1SJeff Kirsher 1309aebddd1SJeff Kirsher /* Just swap the status to host endian; mcc tag is opaquely copied 1319aebddd1SJeff Kirsher * from mcc_wrb */ 1329aebddd1SJeff Kirsher be_dws_le_to_cpu(compl, 4); 1339aebddd1SJeff Kirsher 1349aebddd1SJeff Kirsher compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 1359aebddd1SJeff Kirsher CQE_STATUS_COMPL_MASK; 1369aebddd1SJeff Kirsher 137652bf646SPadmanabh Ratnakar resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1); 138652bf646SPadmanabh Ratnakar 139652bf646SPadmanabh Ratnakar if (resp_hdr) { 140652bf646SPadmanabh Ratnakar opcode = resp_hdr->opcode; 141652bf646SPadmanabh Ratnakar subsystem = resp_hdr->subsystem; 142652bf646SPadmanabh Ratnakar } 143652bf646SPadmanabh Ratnakar 144652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) || 145652bf646SPadmanabh Ratnakar (opcode == OPCODE_COMMON_WRITE_OBJECT)) && 146652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_COMMON)) { 1479aebddd1SJeff Kirsher adapter->flash_status = compl_status; 1489aebddd1SJeff Kirsher complete(&adapter->flash_compl); 1499aebddd1SJeff Kirsher } 1509aebddd1SJeff Kirsher 1519aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_SUCCESS) { 152652bf646SPadmanabh Ratnakar if (((opcode == OPCODE_ETH_GET_STATISTICS) || 153652bf646SPadmanabh Ratnakar (opcode == OPCODE_ETH_GET_PPORT_STATS)) && 154652bf646SPadmanabh Ratnakar (subsystem == CMD_SUBSYSTEM_ETH)) { 1559aebddd1SJeff Kirsher be_parse_stats(adapter); 1569aebddd1SJeff Kirsher adapter->stats_cmd_sent = false; 1579aebddd1SJeff Kirsher } 158652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES && 159652bf646SPadmanabh Ratnakar subsystem == CMD_SUBSYSTEM_COMMON) { 1603de09455SSomnath Kotur struct be_cmd_resp_get_cntl_addnl_attribs *resp = 161652bf646SPadmanabh Ratnakar (void *)resp_hdr; 1623de09455SSomnath Kotur adapter->drv_stats.be_on_die_temperature = 1633de09455SSomnath Kotur resp->on_die_temperature; 1643de09455SSomnath Kotur } 1659aebddd1SJeff Kirsher } else { 166652bf646SPadmanabh Ratnakar if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) 1677aeb2156SPadmanabh Ratnakar adapter->be_get_temp_freq = 0; 1683de09455SSomnath Kotur 1699aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_NOT_SUPPORTED || 1709aebddd1SJeff Kirsher compl_status == MCC_STATUS_ILLEGAL_REQUEST) 1719aebddd1SJeff Kirsher goto done; 1729aebddd1SJeff Kirsher 1739aebddd1SJeff Kirsher if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) { 17497f1d8cdSVasundhara Volam dev_warn(&adapter->pdev->dev, 175522609f2SVasundhara Volam "VF is not privileged to issue opcode %d-%d\n", 17697f1d8cdSVasundhara Volam opcode, subsystem); 1779aebddd1SJeff Kirsher } else { 1789aebddd1SJeff Kirsher extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & 1799aebddd1SJeff Kirsher CQE_STATUS_EXTD_MASK; 18097f1d8cdSVasundhara Volam dev_err(&adapter->pdev->dev, 18197f1d8cdSVasundhara Volam "opcode %d-%d failed:status %d-%d\n", 18297f1d8cdSVasundhara Volam opcode, subsystem, compl_status, extd_status); 183d9d604f8SAjit Khaparde 184d9d604f8SAjit Khaparde if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) 185d9d604f8SAjit Khaparde return extd_status; 1869aebddd1SJeff Kirsher } 1879aebddd1SJeff Kirsher } 1889aebddd1SJeff Kirsher done: 1899aebddd1SJeff Kirsher return compl_status; 1909aebddd1SJeff Kirsher } 1919aebddd1SJeff Kirsher 1929aebddd1SJeff Kirsher /* Link state evt is a string of bytes; no need for endian swapping */ 1939aebddd1SJeff Kirsher static void be_async_link_state_process(struct be_adapter *adapter, 1949aebddd1SJeff Kirsher struct be_async_event_link_state *evt) 1959aebddd1SJeff Kirsher { 196b236916aSAjit Khaparde /* When link status changes, link speed must be re-queried from FW */ 19742f11cf2SAjit Khaparde adapter->phy.link_speed = -1; 198b236916aSAjit Khaparde 1992e177a5cSPadmanabh Ratnakar /* Ignore physical link event */ 2002e177a5cSPadmanabh Ratnakar if (lancer_chip(adapter) && 2012e177a5cSPadmanabh Ratnakar !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK)) 2022e177a5cSPadmanabh Ratnakar return; 2032e177a5cSPadmanabh Ratnakar 204b236916aSAjit Khaparde /* For the initial link status do not rely on the ASYNC event as 205b236916aSAjit Khaparde * it may not be received in some cases. 206b236916aSAjit Khaparde */ 207b236916aSAjit Khaparde if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT) 2089aebddd1SJeff Kirsher be_link_status_update(adapter, evt->port_link_status); 2099aebddd1SJeff Kirsher } 2109aebddd1SJeff Kirsher 2119aebddd1SJeff Kirsher /* Grp5 CoS Priority evt */ 2129aebddd1SJeff Kirsher static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 2139aebddd1SJeff Kirsher struct be_async_event_grp5_cos_priority *evt) 2149aebddd1SJeff Kirsher { 2159aebddd1SJeff Kirsher if (evt->valid) { 2169aebddd1SJeff Kirsher adapter->vlan_prio_bmap = evt->available_priority_bmap; 2179aebddd1SJeff Kirsher adapter->recommended_prio &= ~VLAN_PRIO_MASK; 2189aebddd1SJeff Kirsher adapter->recommended_prio = 2199aebddd1SJeff Kirsher evt->reco_default_priority << VLAN_PRIO_SHIFT; 2209aebddd1SJeff Kirsher } 2219aebddd1SJeff Kirsher } 2229aebddd1SJeff Kirsher 223323ff71eSSathya Perla /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 2249aebddd1SJeff Kirsher static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 2259aebddd1SJeff Kirsher struct be_async_event_grp5_qos_link_speed *evt) 2269aebddd1SJeff Kirsher { 227323ff71eSSathya Perla if (adapter->phy.link_speed >= 0 && 228323ff71eSSathya Perla evt->physical_port == adapter->port_num) 229323ff71eSSathya Perla adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10; 2309aebddd1SJeff Kirsher } 2319aebddd1SJeff Kirsher 2329aebddd1SJeff Kirsher /*Grp5 PVID evt*/ 2339aebddd1SJeff Kirsher static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 2349aebddd1SJeff Kirsher struct be_async_event_grp5_pvid_state *evt) 2359aebddd1SJeff Kirsher { 2369aebddd1SJeff Kirsher if (evt->enabled) 237939cf306SSomnath Kotur adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 2389aebddd1SJeff Kirsher else 2399aebddd1SJeff Kirsher adapter->pvid = 0; 2409aebddd1SJeff Kirsher } 2419aebddd1SJeff Kirsher 2429aebddd1SJeff Kirsher static void be_async_grp5_evt_process(struct be_adapter *adapter, 2439aebddd1SJeff Kirsher u32 trailer, struct be_mcc_compl *evt) 2449aebddd1SJeff Kirsher { 2459aebddd1SJeff Kirsher u8 event_type = 0; 2469aebddd1SJeff Kirsher 2479aebddd1SJeff Kirsher event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 2489aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_TYPE_MASK; 2499aebddd1SJeff Kirsher 2509aebddd1SJeff Kirsher switch (event_type) { 2519aebddd1SJeff Kirsher case ASYNC_EVENT_COS_PRIORITY: 2529aebddd1SJeff Kirsher be_async_grp5_cos_priority_process(adapter, 2539aebddd1SJeff Kirsher (struct be_async_event_grp5_cos_priority *)evt); 2549aebddd1SJeff Kirsher break; 2559aebddd1SJeff Kirsher case ASYNC_EVENT_QOS_SPEED: 2569aebddd1SJeff Kirsher be_async_grp5_qos_speed_process(adapter, 2579aebddd1SJeff Kirsher (struct be_async_event_grp5_qos_link_speed *)evt); 2589aebddd1SJeff Kirsher break; 2599aebddd1SJeff Kirsher case ASYNC_EVENT_PVID_STATE: 2609aebddd1SJeff Kirsher be_async_grp5_pvid_state_process(adapter, 2619aebddd1SJeff Kirsher (struct be_async_event_grp5_pvid_state *)evt); 2629aebddd1SJeff Kirsher break; 2639aebddd1SJeff Kirsher default: 26405ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n", 26505ccaa2bSVasundhara Volam event_type); 2669aebddd1SJeff Kirsher break; 2679aebddd1SJeff Kirsher } 2689aebddd1SJeff Kirsher } 2699aebddd1SJeff Kirsher 270bc0c3405SAjit Khaparde static void be_async_dbg_evt_process(struct be_adapter *adapter, 271bc0c3405SAjit Khaparde u32 trailer, struct be_mcc_compl *cmp) 272bc0c3405SAjit Khaparde { 273bc0c3405SAjit Khaparde u8 event_type = 0; 274bc0c3405SAjit Khaparde struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 275bc0c3405SAjit Khaparde 276bc0c3405SAjit Khaparde event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) & 277bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_TYPE_MASK; 278bc0c3405SAjit Khaparde 279bc0c3405SAjit Khaparde switch (event_type) { 280bc0c3405SAjit Khaparde case ASYNC_DEBUG_EVENT_TYPE_QNQ: 281bc0c3405SAjit Khaparde if (evt->valid) 282bc0c3405SAjit Khaparde adapter->qnq_vid = le16_to_cpu(evt->vlan_tag); 283bc0c3405SAjit Khaparde adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 284bc0c3405SAjit Khaparde break; 285bc0c3405SAjit Khaparde default: 28605ccaa2bSVasundhara Volam dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n", 28705ccaa2bSVasundhara Volam event_type); 288bc0c3405SAjit Khaparde break; 289bc0c3405SAjit Khaparde } 290bc0c3405SAjit Khaparde } 291bc0c3405SAjit Khaparde 2929aebddd1SJeff Kirsher static inline bool is_link_state_evt(u32 trailer) 2939aebddd1SJeff Kirsher { 2949aebddd1SJeff Kirsher return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 2959aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 2969aebddd1SJeff Kirsher ASYNC_EVENT_CODE_LINK_STATE; 2979aebddd1SJeff Kirsher } 2989aebddd1SJeff Kirsher 2999aebddd1SJeff Kirsher static inline bool is_grp5_evt(u32 trailer) 3009aebddd1SJeff Kirsher { 3019aebddd1SJeff Kirsher return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 3029aebddd1SJeff Kirsher ASYNC_TRAILER_EVENT_CODE_MASK) == 3039aebddd1SJeff Kirsher ASYNC_EVENT_CODE_GRP_5); 3049aebddd1SJeff Kirsher } 3059aebddd1SJeff Kirsher 306bc0c3405SAjit Khaparde static inline bool is_dbg_evt(u32 trailer) 307bc0c3405SAjit Khaparde { 308bc0c3405SAjit Khaparde return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & 309bc0c3405SAjit Khaparde ASYNC_TRAILER_EVENT_CODE_MASK) == 310bc0c3405SAjit Khaparde ASYNC_EVENT_CODE_QNQ); 311bc0c3405SAjit Khaparde } 312bc0c3405SAjit Khaparde 3139aebddd1SJeff Kirsher static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) 3149aebddd1SJeff Kirsher { 3159aebddd1SJeff Kirsher struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; 3169aebddd1SJeff Kirsher struct be_mcc_compl *compl = queue_tail_node(mcc_cq); 3179aebddd1SJeff Kirsher 3189aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 3199aebddd1SJeff Kirsher queue_tail_inc(mcc_cq); 3209aebddd1SJeff Kirsher return compl; 3219aebddd1SJeff Kirsher } 3229aebddd1SJeff Kirsher return NULL; 3239aebddd1SJeff Kirsher } 3249aebddd1SJeff Kirsher 3259aebddd1SJeff Kirsher void be_async_mcc_enable(struct be_adapter *adapter) 3269aebddd1SJeff Kirsher { 3279aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_cq_lock); 3289aebddd1SJeff Kirsher 3299aebddd1SJeff Kirsher be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0); 3309aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = true; 3319aebddd1SJeff Kirsher 3329aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_cq_lock); 3339aebddd1SJeff Kirsher } 3349aebddd1SJeff Kirsher 3359aebddd1SJeff Kirsher void be_async_mcc_disable(struct be_adapter *adapter) 3369aebddd1SJeff Kirsher { 337a323d9bfSSathya Perla spin_lock_bh(&adapter->mcc_cq_lock); 338a323d9bfSSathya Perla 3399aebddd1SJeff Kirsher adapter->mcc_obj.rearm_cq = false; 340a323d9bfSSathya Perla be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0); 341a323d9bfSSathya Perla 342a323d9bfSSathya Perla spin_unlock_bh(&adapter->mcc_cq_lock); 3439aebddd1SJeff Kirsher } 3449aebddd1SJeff Kirsher 34510ef9ab4SSathya Perla int be_process_mcc(struct be_adapter *adapter) 3469aebddd1SJeff Kirsher { 3479aebddd1SJeff Kirsher struct be_mcc_compl *compl; 34810ef9ab4SSathya Perla int num = 0, status = 0; 3499aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3509aebddd1SJeff Kirsher 351072a9c48SAmerigo Wang spin_lock(&adapter->mcc_cq_lock); 3529aebddd1SJeff Kirsher while ((compl = be_mcc_compl_get(adapter))) { 3539aebddd1SJeff Kirsher if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 3549aebddd1SJeff Kirsher /* Interpret flags as an async trailer */ 3559aebddd1SJeff Kirsher if (is_link_state_evt(compl->flags)) 3569aebddd1SJeff Kirsher be_async_link_state_process(adapter, 3579aebddd1SJeff Kirsher (struct be_async_event_link_state *) compl); 3589aebddd1SJeff Kirsher else if (is_grp5_evt(compl->flags)) 3599aebddd1SJeff Kirsher be_async_grp5_evt_process(adapter, 3609aebddd1SJeff Kirsher compl->flags, compl); 361bc0c3405SAjit Khaparde else if (is_dbg_evt(compl->flags)) 362bc0c3405SAjit Khaparde be_async_dbg_evt_process(adapter, 363bc0c3405SAjit Khaparde compl->flags, compl); 3649aebddd1SJeff Kirsher } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 36510ef9ab4SSathya Perla status = be_mcc_compl_process(adapter, compl); 3669aebddd1SJeff Kirsher atomic_dec(&mcc_obj->q.used); 3679aebddd1SJeff Kirsher } 3689aebddd1SJeff Kirsher be_mcc_compl_use(compl); 3699aebddd1SJeff Kirsher num++; 3709aebddd1SJeff Kirsher } 3719aebddd1SJeff Kirsher 37210ef9ab4SSathya Perla if (num) 37310ef9ab4SSathya Perla be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num); 37410ef9ab4SSathya Perla 375072a9c48SAmerigo Wang spin_unlock(&adapter->mcc_cq_lock); 37610ef9ab4SSathya Perla return status; 3779aebddd1SJeff Kirsher } 3789aebddd1SJeff Kirsher 3799aebddd1SJeff Kirsher /* Wait till no more pending mcc requests are present */ 3809aebddd1SJeff Kirsher static int be_mcc_wait_compl(struct be_adapter *adapter) 3819aebddd1SJeff Kirsher { 3829aebddd1SJeff Kirsher #define mcc_timeout 120000 /* 12s timeout */ 38310ef9ab4SSathya Perla int i, status = 0; 3849aebddd1SJeff Kirsher struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 3859aebddd1SJeff Kirsher 3866589ade0SSathya Perla for (i = 0; i < mcc_timeout; i++) { 3876589ade0SSathya Perla if (be_error(adapter)) 3889aebddd1SJeff Kirsher return -EIO; 3899aebddd1SJeff Kirsher 390072a9c48SAmerigo Wang local_bh_disable(); 39110ef9ab4SSathya Perla status = be_process_mcc(adapter); 392072a9c48SAmerigo Wang local_bh_enable(); 3939aebddd1SJeff Kirsher 3949aebddd1SJeff Kirsher if (atomic_read(&mcc_obj->q.used) == 0) 3959aebddd1SJeff Kirsher break; 3969aebddd1SJeff Kirsher udelay(100); 3979aebddd1SJeff Kirsher } 3989aebddd1SJeff Kirsher if (i == mcc_timeout) { 3996589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4006589ade0SSathya Perla adapter->fw_timeout = true; 401652bf646SPadmanabh Ratnakar return -EIO; 4029aebddd1SJeff Kirsher } 4039aebddd1SJeff Kirsher return status; 4049aebddd1SJeff Kirsher } 4059aebddd1SJeff Kirsher 4069aebddd1SJeff Kirsher /* Notify MCC requests and wait for completion */ 4079aebddd1SJeff Kirsher static int be_mcc_notify_wait(struct be_adapter *adapter) 4089aebddd1SJeff Kirsher { 409652bf646SPadmanabh Ratnakar int status; 410652bf646SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 411652bf646SPadmanabh Ratnakar struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; 412652bf646SPadmanabh Ratnakar u16 index = mcc_obj->q.head; 413652bf646SPadmanabh Ratnakar struct be_cmd_resp_hdr *resp; 414652bf646SPadmanabh Ratnakar 415652bf646SPadmanabh Ratnakar index_dec(&index, mcc_obj->q.len); 416652bf646SPadmanabh Ratnakar wrb = queue_index_node(&mcc_obj->q, index); 417652bf646SPadmanabh Ratnakar 418652bf646SPadmanabh Ratnakar resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1); 419652bf646SPadmanabh Ratnakar 4209aebddd1SJeff Kirsher be_mcc_notify(adapter); 421652bf646SPadmanabh Ratnakar 422652bf646SPadmanabh Ratnakar status = be_mcc_wait_compl(adapter); 423652bf646SPadmanabh Ratnakar if (status == -EIO) 424652bf646SPadmanabh Ratnakar goto out; 425652bf646SPadmanabh Ratnakar 426652bf646SPadmanabh Ratnakar status = resp->status; 427652bf646SPadmanabh Ratnakar out: 428652bf646SPadmanabh Ratnakar return status; 4299aebddd1SJeff Kirsher } 4309aebddd1SJeff Kirsher 4319aebddd1SJeff Kirsher static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) 4329aebddd1SJeff Kirsher { 4339aebddd1SJeff Kirsher int msecs = 0; 4349aebddd1SJeff Kirsher u32 ready; 4359aebddd1SJeff Kirsher 4366589ade0SSathya Perla do { 4376589ade0SSathya Perla if (be_error(adapter)) 4389aebddd1SJeff Kirsher return -EIO; 4399aebddd1SJeff Kirsher 4409aebddd1SJeff Kirsher ready = ioread32(db); 441434b3648SSathya Perla if (ready == 0xffffffff) 4429aebddd1SJeff Kirsher return -1; 4439aebddd1SJeff Kirsher 4449aebddd1SJeff Kirsher ready &= MPU_MAILBOX_DB_RDY_MASK; 4459aebddd1SJeff Kirsher if (ready) 4469aebddd1SJeff Kirsher break; 4479aebddd1SJeff Kirsher 4489aebddd1SJeff Kirsher if (msecs > 4000) { 4496589ade0SSathya Perla dev_err(&adapter->pdev->dev, "FW not responding\n"); 4506589ade0SSathya Perla adapter->fw_timeout = true; 451f67ef7baSPadmanabh Ratnakar be_detect_error(adapter); 4529aebddd1SJeff Kirsher return -1; 4539aebddd1SJeff Kirsher } 4549aebddd1SJeff Kirsher 4559aebddd1SJeff Kirsher msleep(1); 4569aebddd1SJeff Kirsher msecs++; 4579aebddd1SJeff Kirsher } while (true); 4589aebddd1SJeff Kirsher 4599aebddd1SJeff Kirsher return 0; 4609aebddd1SJeff Kirsher } 4619aebddd1SJeff Kirsher 4629aebddd1SJeff Kirsher /* 4639aebddd1SJeff Kirsher * Insert the mailbox address into the doorbell in two steps 4649aebddd1SJeff Kirsher * Polls on the mbox doorbell till a command completion (or a timeout) occurs 4659aebddd1SJeff Kirsher */ 4669aebddd1SJeff Kirsher static int be_mbox_notify_wait(struct be_adapter *adapter) 4679aebddd1SJeff Kirsher { 4689aebddd1SJeff Kirsher int status; 4699aebddd1SJeff Kirsher u32 val = 0; 4709aebddd1SJeff Kirsher void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; 4719aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 4729aebddd1SJeff Kirsher struct be_mcc_mailbox *mbox = mbox_mem->va; 4739aebddd1SJeff Kirsher struct be_mcc_compl *compl = &mbox->compl; 4749aebddd1SJeff Kirsher 4759aebddd1SJeff Kirsher /* wait for ready to be set */ 4769aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4779aebddd1SJeff Kirsher if (status != 0) 4789aebddd1SJeff Kirsher return status; 4799aebddd1SJeff Kirsher 4809aebddd1SJeff Kirsher val |= MPU_MAILBOX_DB_HI_MASK; 4819aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ 4829aebddd1SJeff Kirsher val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; 4839aebddd1SJeff Kirsher iowrite32(val, db); 4849aebddd1SJeff Kirsher 4859aebddd1SJeff Kirsher /* wait for ready to be set */ 4869aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4879aebddd1SJeff Kirsher if (status != 0) 4889aebddd1SJeff Kirsher return status; 4899aebddd1SJeff Kirsher 4909aebddd1SJeff Kirsher val = 0; 4919aebddd1SJeff Kirsher /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ 4929aebddd1SJeff Kirsher val |= (u32)(mbox_mem->dma >> 4) << 2; 4939aebddd1SJeff Kirsher iowrite32(val, db); 4949aebddd1SJeff Kirsher 4959aebddd1SJeff Kirsher status = be_mbox_db_ready_wait(adapter, db); 4969aebddd1SJeff Kirsher if (status != 0) 4979aebddd1SJeff Kirsher return status; 4989aebddd1SJeff Kirsher 4999aebddd1SJeff Kirsher /* A cq entry has been made now */ 5009aebddd1SJeff Kirsher if (be_mcc_compl_is_new(compl)) { 5019aebddd1SJeff Kirsher status = be_mcc_compl_process(adapter, &mbox->compl); 5029aebddd1SJeff Kirsher be_mcc_compl_use(compl); 5039aebddd1SJeff Kirsher if (status) 5049aebddd1SJeff Kirsher return status; 5059aebddd1SJeff Kirsher } else { 5069aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); 5079aebddd1SJeff Kirsher return -1; 5089aebddd1SJeff Kirsher } 5099aebddd1SJeff Kirsher return 0; 5109aebddd1SJeff Kirsher } 5119aebddd1SJeff Kirsher 512c5b3ad4cSSathya Perla static u16 be_POST_stage_get(struct be_adapter *adapter) 5139aebddd1SJeff Kirsher { 5149aebddd1SJeff Kirsher u32 sem; 5159aebddd1SJeff Kirsher 516c5b3ad4cSSathya Perla if (BEx_chip(adapter)) 517c5b3ad4cSSathya Perla sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); 5189aebddd1SJeff Kirsher else 519c5b3ad4cSSathya Perla pci_read_config_dword(adapter->pdev, 520c5b3ad4cSSathya Perla SLIPORT_SEMAPHORE_OFFSET_SH, &sem); 521c5b3ad4cSSathya Perla 522c5b3ad4cSSathya Perla return sem & POST_STAGE_MASK; 5239aebddd1SJeff Kirsher } 5249aebddd1SJeff Kirsher 52587f20c26SGavin Shan static int lancer_wait_ready(struct be_adapter *adapter) 526bf99e50dSPadmanabh Ratnakar { 527bf99e50dSPadmanabh Ratnakar #define SLIPORT_READY_TIMEOUT 30 528bf99e50dSPadmanabh Ratnakar u32 sliport_status; 529bf99e50dSPadmanabh Ratnakar int status = 0, i; 530bf99e50dSPadmanabh Ratnakar 531bf99e50dSPadmanabh Ratnakar for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) { 532bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 533bf99e50dSPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_RDY_MASK) 534bf99e50dSPadmanabh Ratnakar break; 535bf99e50dSPadmanabh Ratnakar 536bf99e50dSPadmanabh Ratnakar msleep(1000); 537bf99e50dSPadmanabh Ratnakar } 538bf99e50dSPadmanabh Ratnakar 539bf99e50dSPadmanabh Ratnakar if (i == SLIPORT_READY_TIMEOUT) 540bf99e50dSPadmanabh Ratnakar status = -1; 541bf99e50dSPadmanabh Ratnakar 542bf99e50dSPadmanabh Ratnakar return status; 543bf99e50dSPadmanabh Ratnakar } 544bf99e50dSPadmanabh Ratnakar 54567297ad8SPadmanabh Ratnakar static bool lancer_provisioning_error(struct be_adapter *adapter) 54667297ad8SPadmanabh Ratnakar { 54767297ad8SPadmanabh Ratnakar u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 54867297ad8SPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 54967297ad8SPadmanabh Ratnakar if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 55067297ad8SPadmanabh Ratnakar sliport_err1 = ioread32(adapter->db + 55167297ad8SPadmanabh Ratnakar SLIPORT_ERROR1_OFFSET); 55267297ad8SPadmanabh Ratnakar sliport_err2 = ioread32(adapter->db + 55367297ad8SPadmanabh Ratnakar SLIPORT_ERROR2_OFFSET); 55467297ad8SPadmanabh Ratnakar 55567297ad8SPadmanabh Ratnakar if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 55667297ad8SPadmanabh Ratnakar sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 55767297ad8SPadmanabh Ratnakar return true; 55867297ad8SPadmanabh Ratnakar } 55967297ad8SPadmanabh Ratnakar return false; 56067297ad8SPadmanabh Ratnakar } 56167297ad8SPadmanabh Ratnakar 562bf99e50dSPadmanabh Ratnakar int lancer_test_and_set_rdy_state(struct be_adapter *adapter) 563bf99e50dSPadmanabh Ratnakar { 564bf99e50dSPadmanabh Ratnakar int status; 565bf99e50dSPadmanabh Ratnakar u32 sliport_status, err, reset_needed; 56667297ad8SPadmanabh Ratnakar bool resource_error; 56767297ad8SPadmanabh Ratnakar 56867297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 56967297ad8SPadmanabh Ratnakar if (resource_error) 57001e5b2c4SSomnath Kotur return -EAGAIN; 57167297ad8SPadmanabh Ratnakar 572bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 573bf99e50dSPadmanabh Ratnakar if (!status) { 574bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 575bf99e50dSPadmanabh Ratnakar err = sliport_status & SLIPORT_STATUS_ERR_MASK; 576bf99e50dSPadmanabh Ratnakar reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK; 577bf99e50dSPadmanabh Ratnakar if (err && reset_needed) { 578bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 579bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 580bf99e50dSPadmanabh Ratnakar 581bf99e50dSPadmanabh Ratnakar /* check adapter has corrected the error */ 582bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 583bf99e50dSPadmanabh Ratnakar sliport_status = ioread32(adapter->db + 584bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_OFFSET); 585bf99e50dSPadmanabh Ratnakar sliport_status &= (SLIPORT_STATUS_ERR_MASK | 586bf99e50dSPadmanabh Ratnakar SLIPORT_STATUS_RN_MASK); 587bf99e50dSPadmanabh Ratnakar if (status || sliport_status) 588bf99e50dSPadmanabh Ratnakar status = -1; 589bf99e50dSPadmanabh Ratnakar } else if (err || reset_needed) { 590bf99e50dSPadmanabh Ratnakar status = -1; 591bf99e50dSPadmanabh Ratnakar } 592bf99e50dSPadmanabh Ratnakar } 59367297ad8SPadmanabh Ratnakar /* Stop error recovery if error is not recoverable. 59467297ad8SPadmanabh Ratnakar * No resource error is temporary errors and will go away 59567297ad8SPadmanabh Ratnakar * when PF provisions resources. 59667297ad8SPadmanabh Ratnakar */ 59767297ad8SPadmanabh Ratnakar resource_error = lancer_provisioning_error(adapter); 59801e5b2c4SSomnath Kotur if (resource_error) 59901e5b2c4SSomnath Kotur status = -EAGAIN; 60067297ad8SPadmanabh Ratnakar 601bf99e50dSPadmanabh Ratnakar return status; 602bf99e50dSPadmanabh Ratnakar } 603bf99e50dSPadmanabh Ratnakar 604bf99e50dSPadmanabh Ratnakar int be_fw_wait_ready(struct be_adapter *adapter) 6059aebddd1SJeff Kirsher { 6069aebddd1SJeff Kirsher u16 stage; 6079aebddd1SJeff Kirsher int status, timeout = 0; 6089aebddd1SJeff Kirsher struct device *dev = &adapter->pdev->dev; 6099aebddd1SJeff Kirsher 610bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 611bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 612bf99e50dSPadmanabh Ratnakar return status; 613bf99e50dSPadmanabh Ratnakar } 614bf99e50dSPadmanabh Ratnakar 6159aebddd1SJeff Kirsher do { 616c5b3ad4cSSathya Perla stage = be_POST_stage_get(adapter); 61766d29cbcSGavin Shan if (stage == POST_STAGE_ARMFW_RDY) 61866d29cbcSGavin Shan return 0; 61966d29cbcSGavin Shan 62066d29cbcSGavin Shan dev_info(dev, "Waiting for POST, %ds elapsed\n", 62166d29cbcSGavin Shan timeout); 6229aebddd1SJeff Kirsher if (msleep_interruptible(2000)) { 6239aebddd1SJeff Kirsher dev_err(dev, "Waiting for POST aborted\n"); 6249aebddd1SJeff Kirsher return -EINTR; 6259aebddd1SJeff Kirsher } 6269aebddd1SJeff Kirsher timeout += 2; 6273ab81b5fSSomnath Kotur } while (timeout < 60); 6289aebddd1SJeff Kirsher 6299aebddd1SJeff Kirsher dev_err(dev, "POST timeout; stage=0x%x\n", stage); 6309aebddd1SJeff Kirsher return -1; 6319aebddd1SJeff Kirsher } 6329aebddd1SJeff Kirsher 6339aebddd1SJeff Kirsher 6349aebddd1SJeff Kirsher static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 6359aebddd1SJeff Kirsher { 6369aebddd1SJeff Kirsher return &wrb->payload.sgl[0]; 6379aebddd1SJeff Kirsher } 6389aebddd1SJeff Kirsher 639bea50988SSathya Perla static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, 640bea50988SSathya Perla unsigned long addr) 641bea50988SSathya Perla { 642bea50988SSathya Perla wrb->tag0 = addr & 0xFFFFFFFF; 643bea50988SSathya Perla wrb->tag1 = upper_32_bits(addr); 644bea50988SSathya Perla } 6459aebddd1SJeff Kirsher 6469aebddd1SJeff Kirsher /* Don't touch the hdr after it's prepared */ 647106df1e3SSomnath Kotur /* mem will be NULL for embedded commands */ 648106df1e3SSomnath Kotur static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 649106df1e3SSomnath Kotur u8 subsystem, u8 opcode, int cmd_len, 650106df1e3SSomnath Kotur struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 6519aebddd1SJeff Kirsher { 652106df1e3SSomnath Kotur struct be_sge *sge; 653106df1e3SSomnath Kotur 6549aebddd1SJeff Kirsher req_hdr->opcode = opcode; 6559aebddd1SJeff Kirsher req_hdr->subsystem = subsystem; 6569aebddd1SJeff Kirsher req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 6579aebddd1SJeff Kirsher req_hdr->version = 0; 658bea50988SSathya Perla fill_wrb_tags(wrb, (ulong) req_hdr); 659106df1e3SSomnath Kotur wrb->payload_length = cmd_len; 660106df1e3SSomnath Kotur if (mem) { 661106df1e3SSomnath Kotur wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) << 662106df1e3SSomnath Kotur MCC_WRB_SGE_CNT_SHIFT; 663106df1e3SSomnath Kotur sge = nonembedded_sgl(wrb); 664106df1e3SSomnath Kotur sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); 665106df1e3SSomnath Kotur sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); 666106df1e3SSomnath Kotur sge->len = cpu_to_le32(mem->size); 667106df1e3SSomnath Kotur } else 668106df1e3SSomnath Kotur wrb->embedded |= MCC_WRB_EMBEDDED_MASK; 669106df1e3SSomnath Kotur be_dws_cpu_to_le(wrb, 8); 6709aebddd1SJeff Kirsher } 6719aebddd1SJeff Kirsher 6729aebddd1SJeff Kirsher static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 6739aebddd1SJeff Kirsher struct be_dma_mem *mem) 6749aebddd1SJeff Kirsher { 6759aebddd1SJeff Kirsher int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 6769aebddd1SJeff Kirsher u64 dma = (u64)mem->dma; 6779aebddd1SJeff Kirsher 6789aebddd1SJeff Kirsher for (i = 0; i < buf_pages; i++) { 6799aebddd1SJeff Kirsher pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); 6809aebddd1SJeff Kirsher pages[i].hi = cpu_to_le32(upper_32_bits(dma)); 6819aebddd1SJeff Kirsher dma += PAGE_SIZE_4K; 6829aebddd1SJeff Kirsher } 6839aebddd1SJeff Kirsher } 6849aebddd1SJeff Kirsher 6859aebddd1SJeff Kirsher static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) 6869aebddd1SJeff Kirsher { 6879aebddd1SJeff Kirsher struct be_dma_mem *mbox_mem = &adapter->mbox_mem; 6889aebddd1SJeff Kirsher struct be_mcc_wrb *wrb 6899aebddd1SJeff Kirsher = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; 6909aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 6919aebddd1SJeff Kirsher return wrb; 6929aebddd1SJeff Kirsher } 6939aebddd1SJeff Kirsher 6949aebddd1SJeff Kirsher static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) 6959aebddd1SJeff Kirsher { 6969aebddd1SJeff Kirsher struct be_queue_info *mccq = &adapter->mcc_obj.q; 6979aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 6989aebddd1SJeff Kirsher 699aa790db9SPadmanabh Ratnakar if (!mccq->created) 700aa790db9SPadmanabh Ratnakar return NULL; 701aa790db9SPadmanabh Ratnakar 7024d277125SVasundhara Volam if (atomic_read(&mccq->used) >= mccq->len) 7039aebddd1SJeff Kirsher return NULL; 7049aebddd1SJeff Kirsher 7059aebddd1SJeff Kirsher wrb = queue_head_node(mccq); 7069aebddd1SJeff Kirsher queue_head_inc(mccq); 7079aebddd1SJeff Kirsher atomic_inc(&mccq->used); 7089aebddd1SJeff Kirsher memset(wrb, 0, sizeof(*wrb)); 7099aebddd1SJeff Kirsher return wrb; 7109aebddd1SJeff Kirsher } 7119aebddd1SJeff Kirsher 712bea50988SSathya Perla static bool use_mcc(struct be_adapter *adapter) 713bea50988SSathya Perla { 714bea50988SSathya Perla return adapter->mcc_obj.q.created; 715bea50988SSathya Perla } 716bea50988SSathya Perla 717bea50988SSathya Perla /* Must be used only in process context */ 718bea50988SSathya Perla static int be_cmd_lock(struct be_adapter *adapter) 719bea50988SSathya Perla { 720bea50988SSathya Perla if (use_mcc(adapter)) { 721bea50988SSathya Perla spin_lock_bh(&adapter->mcc_lock); 722bea50988SSathya Perla return 0; 723bea50988SSathya Perla } else { 724bea50988SSathya Perla return mutex_lock_interruptible(&adapter->mbox_lock); 725bea50988SSathya Perla } 726bea50988SSathya Perla } 727bea50988SSathya Perla 728bea50988SSathya Perla /* Must be used only in process context */ 729bea50988SSathya Perla static void be_cmd_unlock(struct be_adapter *adapter) 730bea50988SSathya Perla { 731bea50988SSathya Perla if (use_mcc(adapter)) 732bea50988SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 733bea50988SSathya Perla else 734bea50988SSathya Perla return mutex_unlock(&adapter->mbox_lock); 735bea50988SSathya Perla } 736bea50988SSathya Perla 737bea50988SSathya Perla static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter, 738bea50988SSathya Perla struct be_mcc_wrb *wrb) 739bea50988SSathya Perla { 740bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 741bea50988SSathya Perla 742bea50988SSathya Perla if (use_mcc(adapter)) { 743bea50988SSathya Perla dest_wrb = wrb_from_mccq(adapter); 744bea50988SSathya Perla if (!dest_wrb) 745bea50988SSathya Perla return NULL; 746bea50988SSathya Perla } else { 747bea50988SSathya Perla dest_wrb = wrb_from_mbox(adapter); 748bea50988SSathya Perla } 749bea50988SSathya Perla 750bea50988SSathya Perla memcpy(dest_wrb, wrb, sizeof(*wrb)); 751bea50988SSathya Perla if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK)) 752bea50988SSathya Perla fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb)); 753bea50988SSathya Perla 754bea50988SSathya Perla return dest_wrb; 755bea50988SSathya Perla } 756bea50988SSathya Perla 757bea50988SSathya Perla /* Must be used only in process context */ 758bea50988SSathya Perla static int be_cmd_notify_wait(struct be_adapter *adapter, 759bea50988SSathya Perla struct be_mcc_wrb *wrb) 760bea50988SSathya Perla { 761bea50988SSathya Perla struct be_mcc_wrb *dest_wrb; 762bea50988SSathya Perla int status; 763bea50988SSathya Perla 764bea50988SSathya Perla status = be_cmd_lock(adapter); 765bea50988SSathya Perla if (status) 766bea50988SSathya Perla return status; 767bea50988SSathya Perla 768bea50988SSathya Perla dest_wrb = be_cmd_copy(adapter, wrb); 769bea50988SSathya Perla if (!dest_wrb) 770bea50988SSathya Perla return -EBUSY; 771bea50988SSathya Perla 772bea50988SSathya Perla if (use_mcc(adapter)) 773bea50988SSathya Perla status = be_mcc_notify_wait(adapter); 774bea50988SSathya Perla else 775bea50988SSathya Perla status = be_mbox_notify_wait(adapter); 776bea50988SSathya Perla 777bea50988SSathya Perla if (!status) 778bea50988SSathya Perla memcpy(wrb, dest_wrb, sizeof(*wrb)); 779bea50988SSathya Perla 780bea50988SSathya Perla be_cmd_unlock(adapter); 781bea50988SSathya Perla return status; 782bea50988SSathya Perla } 783bea50988SSathya Perla 7849aebddd1SJeff Kirsher /* Tell fw we're about to start firing cmds by writing a 7859aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 7869aebddd1SJeff Kirsher */ 7879aebddd1SJeff Kirsher int be_cmd_fw_init(struct be_adapter *adapter) 7889aebddd1SJeff Kirsher { 7899aebddd1SJeff Kirsher u8 *wrb; 7909aebddd1SJeff Kirsher int status; 7919aebddd1SJeff Kirsher 792bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 793bf99e50dSPadmanabh Ratnakar return 0; 794bf99e50dSPadmanabh Ratnakar 7959aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 7969aebddd1SJeff Kirsher return -1; 7979aebddd1SJeff Kirsher 7989aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 7999aebddd1SJeff Kirsher *wrb++ = 0xFF; 8009aebddd1SJeff Kirsher *wrb++ = 0x12; 8019aebddd1SJeff Kirsher *wrb++ = 0x34; 8029aebddd1SJeff Kirsher *wrb++ = 0xFF; 8039aebddd1SJeff Kirsher *wrb++ = 0xFF; 8049aebddd1SJeff Kirsher *wrb++ = 0x56; 8059aebddd1SJeff Kirsher *wrb++ = 0x78; 8069aebddd1SJeff Kirsher *wrb = 0xFF; 8079aebddd1SJeff Kirsher 8089aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8099aebddd1SJeff Kirsher 8109aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8119aebddd1SJeff Kirsher return status; 8129aebddd1SJeff Kirsher } 8139aebddd1SJeff Kirsher 8149aebddd1SJeff Kirsher /* Tell fw we're done with firing cmds by writing a 8159aebddd1SJeff Kirsher * special pattern across the wrb hdr; uses mbox 8169aebddd1SJeff Kirsher */ 8179aebddd1SJeff Kirsher int be_cmd_fw_clean(struct be_adapter *adapter) 8189aebddd1SJeff Kirsher { 8199aebddd1SJeff Kirsher u8 *wrb; 8209aebddd1SJeff Kirsher int status; 8219aebddd1SJeff Kirsher 822bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) 823bf99e50dSPadmanabh Ratnakar return 0; 824bf99e50dSPadmanabh Ratnakar 8259aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8269aebddd1SJeff Kirsher return -1; 8279aebddd1SJeff Kirsher 8289aebddd1SJeff Kirsher wrb = (u8 *)wrb_from_mbox(adapter); 8299aebddd1SJeff Kirsher *wrb++ = 0xFF; 8309aebddd1SJeff Kirsher *wrb++ = 0xAA; 8319aebddd1SJeff Kirsher *wrb++ = 0xBB; 8329aebddd1SJeff Kirsher *wrb++ = 0xFF; 8339aebddd1SJeff Kirsher *wrb++ = 0xFF; 8349aebddd1SJeff Kirsher *wrb++ = 0xCC; 8359aebddd1SJeff Kirsher *wrb++ = 0xDD; 8369aebddd1SJeff Kirsher *wrb = 0xFF; 8379aebddd1SJeff Kirsher 8389aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8399aebddd1SJeff Kirsher 8409aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8419aebddd1SJeff Kirsher return status; 8429aebddd1SJeff Kirsher } 843bf99e50dSPadmanabh Ratnakar 844f2f781a7SSathya Perla int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo) 8459aebddd1SJeff Kirsher { 8469aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8479aebddd1SJeff Kirsher struct be_cmd_req_eq_create *req; 848f2f781a7SSathya Perla struct be_dma_mem *q_mem = &eqo->q.dma_mem; 849f2f781a7SSathya Perla int status, ver = 0; 8509aebddd1SJeff Kirsher 8519aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 8529aebddd1SJeff Kirsher return -1; 8539aebddd1SJeff Kirsher 8549aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 8559aebddd1SJeff Kirsher req = embedded_payload(wrb); 8569aebddd1SJeff Kirsher 857106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 858106df1e3SSomnath Kotur OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 8599aebddd1SJeff Kirsher 860f2f781a7SSathya Perla /* Support for EQ_CREATEv2 available only SH-R onwards */ 861f2f781a7SSathya Perla if (!(BEx_chip(adapter) || lancer_chip(adapter))) 862f2f781a7SSathya Perla ver = 2; 863f2f781a7SSathya Perla 864f2f781a7SSathya Perla req->hdr.version = ver; 8659aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 8669aebddd1SJeff Kirsher 8679aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 8689aebddd1SJeff Kirsher /* 4byte eqe*/ 8699aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 8709aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_eq_context, count, req->context, 871f2f781a7SSathya Perla __ilog2_u32(eqo->q.len / 256)); 8729aebddd1SJeff Kirsher be_dws_cpu_to_le(req->context, sizeof(req->context)); 8739aebddd1SJeff Kirsher 8749aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 8759aebddd1SJeff Kirsher 8769aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 8779aebddd1SJeff Kirsher if (!status) { 8789aebddd1SJeff Kirsher struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); 879f2f781a7SSathya Perla eqo->q.id = le16_to_cpu(resp->eq_id); 880f2f781a7SSathya Perla eqo->msix_idx = 881f2f781a7SSathya Perla (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; 882f2f781a7SSathya Perla eqo->q.created = true; 8839aebddd1SJeff Kirsher } 8849aebddd1SJeff Kirsher 8859aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 8869aebddd1SJeff Kirsher return status; 8879aebddd1SJeff Kirsher } 8889aebddd1SJeff Kirsher 889f9449ab7SSathya Perla /* Use MCC */ 8909aebddd1SJeff Kirsher int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, 8915ee4979bSSathya Perla bool permanent, u32 if_handle, u32 pmac_id) 8929aebddd1SJeff Kirsher { 8939aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 8949aebddd1SJeff Kirsher struct be_cmd_req_mac_query *req; 8959aebddd1SJeff Kirsher int status; 8969aebddd1SJeff Kirsher 897f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 8989aebddd1SJeff Kirsher 899f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 900f9449ab7SSathya Perla if (!wrb) { 901f9449ab7SSathya Perla status = -EBUSY; 902f9449ab7SSathya Perla goto err; 903f9449ab7SSathya Perla } 9049aebddd1SJeff Kirsher req = embedded_payload(wrb); 9059aebddd1SJeff Kirsher 906106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 907106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 9085ee4979bSSathya Perla req->type = MAC_ADDRESS_TYPE_NETWORK; 9099aebddd1SJeff Kirsher if (permanent) { 9109aebddd1SJeff Kirsher req->permanent = 1; 9119aebddd1SJeff Kirsher } else { 9129aebddd1SJeff Kirsher req->if_id = cpu_to_le16((u16) if_handle); 913590c391dSPadmanabh Ratnakar req->pmac_id = cpu_to_le32(pmac_id); 9149aebddd1SJeff Kirsher req->permanent = 0; 9159aebddd1SJeff Kirsher } 9169aebddd1SJeff Kirsher 917f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 9189aebddd1SJeff Kirsher if (!status) { 9199aebddd1SJeff Kirsher struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); 9209aebddd1SJeff Kirsher memcpy(mac_addr, resp->mac.addr, ETH_ALEN); 9219aebddd1SJeff Kirsher } 9229aebddd1SJeff Kirsher 923f9449ab7SSathya Perla err: 924f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 9259aebddd1SJeff Kirsher return status; 9269aebddd1SJeff Kirsher } 9279aebddd1SJeff Kirsher 9289aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 9299aebddd1SJeff Kirsher int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 9309aebddd1SJeff Kirsher u32 if_id, u32 *pmac_id, u32 domain) 9319aebddd1SJeff Kirsher { 9329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9339aebddd1SJeff Kirsher struct be_cmd_req_pmac_add *req; 9349aebddd1SJeff Kirsher int status; 9359aebddd1SJeff Kirsher 9369aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9379aebddd1SJeff Kirsher 9389aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9399aebddd1SJeff Kirsher if (!wrb) { 9409aebddd1SJeff Kirsher status = -EBUSY; 9419aebddd1SJeff Kirsher goto err; 9429aebddd1SJeff Kirsher } 9439aebddd1SJeff Kirsher req = embedded_payload(wrb); 9449aebddd1SJeff Kirsher 945106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 946106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 9479aebddd1SJeff Kirsher 9489aebddd1SJeff Kirsher req->hdr.domain = domain; 9499aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9509aebddd1SJeff Kirsher memcpy(req->mac_address, mac_addr, ETH_ALEN); 9519aebddd1SJeff Kirsher 9529aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9539aebddd1SJeff Kirsher if (!status) { 9549aebddd1SJeff Kirsher struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); 9559aebddd1SJeff Kirsher *pmac_id = le32_to_cpu(resp->pmac_id); 9569aebddd1SJeff Kirsher } 9579aebddd1SJeff Kirsher 9589aebddd1SJeff Kirsher err: 9599aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 960e3a7ae2cSSomnath Kotur 961e3a7ae2cSSomnath Kotur if (status == MCC_STATUS_UNAUTHORIZED_REQUEST) 962e3a7ae2cSSomnath Kotur status = -EPERM; 963e3a7ae2cSSomnath Kotur 9649aebddd1SJeff Kirsher return status; 9659aebddd1SJeff Kirsher } 9669aebddd1SJeff Kirsher 9679aebddd1SJeff Kirsher /* Uses synchronous MCCQ */ 96830128031SSathya Perla int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom) 9699aebddd1SJeff Kirsher { 9709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 9719aebddd1SJeff Kirsher struct be_cmd_req_pmac_del *req; 9729aebddd1SJeff Kirsher int status; 9739aebddd1SJeff Kirsher 97430128031SSathya Perla if (pmac_id == -1) 97530128031SSathya Perla return 0; 97630128031SSathya Perla 9779aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 9789aebddd1SJeff Kirsher 9799aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 9809aebddd1SJeff Kirsher if (!wrb) { 9819aebddd1SJeff Kirsher status = -EBUSY; 9829aebddd1SJeff Kirsher goto err; 9839aebddd1SJeff Kirsher } 9849aebddd1SJeff Kirsher req = embedded_payload(wrb); 9859aebddd1SJeff Kirsher 986106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 987106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL); 9889aebddd1SJeff Kirsher 9899aebddd1SJeff Kirsher req->hdr.domain = dom; 9909aebddd1SJeff Kirsher req->if_id = cpu_to_le32(if_id); 9919aebddd1SJeff Kirsher req->pmac_id = cpu_to_le32(pmac_id); 9929aebddd1SJeff Kirsher 9939aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 9949aebddd1SJeff Kirsher 9959aebddd1SJeff Kirsher err: 9969aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 9979aebddd1SJeff Kirsher return status; 9989aebddd1SJeff Kirsher } 9999aebddd1SJeff Kirsher 10009aebddd1SJeff Kirsher /* Uses Mbox */ 100110ef9ab4SSathya Perla int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 100210ef9ab4SSathya Perla struct be_queue_info *eq, bool no_delay, int coalesce_wm) 10039aebddd1SJeff Kirsher { 10049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10059aebddd1SJeff Kirsher struct be_cmd_req_cq_create *req; 10069aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &cq->dma_mem; 10079aebddd1SJeff Kirsher void *ctxt; 10089aebddd1SJeff Kirsher int status; 10099aebddd1SJeff Kirsher 10109aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10119aebddd1SJeff Kirsher return -1; 10129aebddd1SJeff Kirsher 10139aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10149aebddd1SJeff Kirsher req = embedded_payload(wrb); 10159aebddd1SJeff Kirsher ctxt = &req->context; 10169aebddd1SJeff Kirsher 1017106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1018106df1e3SSomnath Kotur OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 10199aebddd1SJeff Kirsher 10209aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1021bbdc42f8SAjit Khaparde 1022bbdc42f8SAjit Khaparde if (BEx_chip(adapter)) { 10239aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 10249aebddd1SJeff Kirsher coalesce_wm); 10259aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 10269aebddd1SJeff Kirsher ctxt, no_delay); 10279aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 10289aebddd1SJeff Kirsher __ilog2_u32(cq->len/256)); 10299aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 10309aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 10319aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1032bbdc42f8SAjit Khaparde } else { 1033bbdc42f8SAjit Khaparde req->hdr.version = 2; 1034bbdc42f8SAjit Khaparde req->page_size = 1; /* 1 for 4K */ 1035bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1036bbdc42f8SAjit Khaparde no_delay); 1037bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1038bbdc42f8SAjit Khaparde __ilog2_u32(cq->len/256)); 1039bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1040bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 1041bbdc42f8SAjit Khaparde ctxt, 1); 1042bbdc42f8SAjit Khaparde AMAP_SET_BITS(struct amap_cq_context_v2, eqid, 1043bbdc42f8SAjit Khaparde ctxt, eq->id); 10449aebddd1SJeff Kirsher } 10459aebddd1SJeff Kirsher 10469aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 10479aebddd1SJeff Kirsher 10489aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 10499aebddd1SJeff Kirsher 10509aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 10519aebddd1SJeff Kirsher if (!status) { 10529aebddd1SJeff Kirsher struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); 10539aebddd1SJeff Kirsher cq->id = le16_to_cpu(resp->cq_id); 10549aebddd1SJeff Kirsher cq->created = true; 10559aebddd1SJeff Kirsher } 10569aebddd1SJeff Kirsher 10579aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 10589aebddd1SJeff Kirsher 10599aebddd1SJeff Kirsher return status; 10609aebddd1SJeff Kirsher } 10619aebddd1SJeff Kirsher 10629aebddd1SJeff Kirsher static u32 be_encoded_q_len(int q_len) 10639aebddd1SJeff Kirsher { 10649aebddd1SJeff Kirsher u32 len_encoded = fls(q_len); /* log2(len) + 1 */ 10659aebddd1SJeff Kirsher if (len_encoded == 16) 10669aebddd1SJeff Kirsher len_encoded = 0; 10679aebddd1SJeff Kirsher return len_encoded; 10689aebddd1SJeff Kirsher } 10699aebddd1SJeff Kirsher 10704188e7dfSJingoo Han static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 10719aebddd1SJeff Kirsher struct be_queue_info *mccq, 10729aebddd1SJeff Kirsher struct be_queue_info *cq) 10739aebddd1SJeff Kirsher { 10749aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 10759aebddd1SJeff Kirsher struct be_cmd_req_mcc_ext_create *req; 10769aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 10779aebddd1SJeff Kirsher void *ctxt; 10789aebddd1SJeff Kirsher int status; 10799aebddd1SJeff Kirsher 10809aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 10819aebddd1SJeff Kirsher return -1; 10829aebddd1SJeff Kirsher 10839aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 10849aebddd1SJeff Kirsher req = embedded_payload(wrb); 10859aebddd1SJeff Kirsher ctxt = &req->context; 10869aebddd1SJeff Kirsher 1087106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1088106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 10899aebddd1SJeff Kirsher 10909aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 10919aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 10929aebddd1SJeff Kirsher req->hdr.version = 1; 10939aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq->id); 10949aebddd1SJeff Kirsher 10959aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt, 10969aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 10979aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1); 10989aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id, 10999aebddd1SJeff Kirsher ctxt, cq->id); 11009aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid, 11019aebddd1SJeff Kirsher ctxt, 1); 11029aebddd1SJeff Kirsher 11039aebddd1SJeff Kirsher } else { 11049aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11059aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11069aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11079aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11089aebddd1SJeff Kirsher } 11099aebddd1SJeff Kirsher 11109aebddd1SJeff Kirsher /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */ 11119aebddd1SJeff Kirsher req->async_event_bitmap[0] = cpu_to_le32(0x00000022); 1112bc0c3405SAjit Khaparde req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ); 11139aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11149aebddd1SJeff Kirsher 11159aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11169aebddd1SJeff Kirsher 11179aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11189aebddd1SJeff Kirsher if (!status) { 11199aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11209aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11219aebddd1SJeff Kirsher mccq->created = true; 11229aebddd1SJeff Kirsher } 11239aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11249aebddd1SJeff Kirsher 11259aebddd1SJeff Kirsher return status; 11269aebddd1SJeff Kirsher } 11279aebddd1SJeff Kirsher 11284188e7dfSJingoo Han static int be_cmd_mccq_org_create(struct be_adapter *adapter, 11299aebddd1SJeff Kirsher struct be_queue_info *mccq, 11309aebddd1SJeff Kirsher struct be_queue_info *cq) 11319aebddd1SJeff Kirsher { 11329aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 11339aebddd1SJeff Kirsher struct be_cmd_req_mcc_create *req; 11349aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &mccq->dma_mem; 11359aebddd1SJeff Kirsher void *ctxt; 11369aebddd1SJeff Kirsher int status; 11379aebddd1SJeff Kirsher 11389aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 11399aebddd1SJeff Kirsher return -1; 11409aebddd1SJeff Kirsher 11419aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 11429aebddd1SJeff Kirsher req = embedded_payload(wrb); 11439aebddd1SJeff Kirsher ctxt = &req->context; 11449aebddd1SJeff Kirsher 1145106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1146106df1e3SSomnath Kotur OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 11479aebddd1SJeff Kirsher 11489aebddd1SJeff Kirsher req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 11499aebddd1SJeff Kirsher 11509aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 11519aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 11529aebddd1SJeff Kirsher be_encoded_q_len(mccq->len)); 11539aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 11549aebddd1SJeff Kirsher 11559aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 11569aebddd1SJeff Kirsher 11579aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 11589aebddd1SJeff Kirsher 11599aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 11609aebddd1SJeff Kirsher if (!status) { 11619aebddd1SJeff Kirsher struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); 11629aebddd1SJeff Kirsher mccq->id = le16_to_cpu(resp->id); 11639aebddd1SJeff Kirsher mccq->created = true; 11649aebddd1SJeff Kirsher } 11659aebddd1SJeff Kirsher 11669aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 11679aebddd1SJeff Kirsher return status; 11689aebddd1SJeff Kirsher } 11699aebddd1SJeff Kirsher 11709aebddd1SJeff Kirsher int be_cmd_mccq_create(struct be_adapter *adapter, 11719aebddd1SJeff Kirsher struct be_queue_info *mccq, 11729aebddd1SJeff Kirsher struct be_queue_info *cq) 11739aebddd1SJeff Kirsher { 11749aebddd1SJeff Kirsher int status; 11759aebddd1SJeff Kirsher 11769aebddd1SJeff Kirsher status = be_cmd_mccq_ext_create(adapter, mccq, cq); 11779aebddd1SJeff Kirsher if (status && !lancer_chip(adapter)) { 11789aebddd1SJeff Kirsher dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 " 11799aebddd1SJeff Kirsher "or newer to avoid conflicting priorities between NIC " 11809aebddd1SJeff Kirsher "and FCoE traffic"); 11819aebddd1SJeff Kirsher status = be_cmd_mccq_org_create(adapter, mccq, cq); 11829aebddd1SJeff Kirsher } 11839aebddd1SJeff Kirsher return status; 11849aebddd1SJeff Kirsher } 11859aebddd1SJeff Kirsher 118694d73aaaSVasundhara Volam int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo) 11879aebddd1SJeff Kirsher { 11887707133cSSathya Perla struct be_mcc_wrb wrb = {0}; 11899aebddd1SJeff Kirsher struct be_cmd_req_eth_tx_create *req; 119094d73aaaSVasundhara Volam struct be_queue_info *txq = &txo->q; 119194d73aaaSVasundhara Volam struct be_queue_info *cq = &txo->cq; 11929aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &txq->dma_mem; 119394d73aaaSVasundhara Volam int status, ver = 0; 11949aebddd1SJeff Kirsher 11957707133cSSathya Perla req = embedded_payload(&wrb); 1196106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 11977707133cSSathya Perla OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 11989aebddd1SJeff Kirsher 11999aebddd1SJeff Kirsher if (lancer_chip(adapter)) { 12009aebddd1SJeff Kirsher req->hdr.version = 1; 120194d73aaaSVasundhara Volam } else if (BEx_chip(adapter)) { 120294d73aaaSVasundhara Volam if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) 120394d73aaaSVasundhara Volam req->hdr.version = 2; 120494d73aaaSVasundhara Volam } else { /* For SH */ 120594d73aaaSVasundhara Volam req->hdr.version = 2; 12069aebddd1SJeff Kirsher } 12079aebddd1SJeff Kirsher 120881b02655SVasundhara Volam if (req->hdr.version > 0) 120981b02655SVasundhara Volam req->if_id = cpu_to_le16(adapter->if_handle); 12109aebddd1SJeff Kirsher req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 12119aebddd1SJeff Kirsher req->ulp_num = BE_ULP1_NUM; 12129aebddd1SJeff Kirsher req->type = BE_ETH_TX_RING_TYPE_STANDARD; 121394d73aaaSVasundhara Volam req->cq_id = cpu_to_le16(cq->id); 121494d73aaaSVasundhara Volam req->queue_size = be_encoded_q_len(txq->len); 12159aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 121694d73aaaSVasundhara Volam ver = req->hdr.version; 121794d73aaaSVasundhara Volam 12187707133cSSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 12199aebddd1SJeff Kirsher if (!status) { 12207707133cSSathya Perla struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb); 12219aebddd1SJeff Kirsher txq->id = le16_to_cpu(resp->cid); 122294d73aaaSVasundhara Volam if (ver == 2) 122394d73aaaSVasundhara Volam txo->db_offset = le32_to_cpu(resp->db_offset); 122494d73aaaSVasundhara Volam else 122594d73aaaSVasundhara Volam txo->db_offset = DB_TXULP1_OFFSET; 12269aebddd1SJeff Kirsher txq->created = true; 12279aebddd1SJeff Kirsher } 12289aebddd1SJeff Kirsher 12299aebddd1SJeff Kirsher return status; 12309aebddd1SJeff Kirsher } 12319aebddd1SJeff Kirsher 12329aebddd1SJeff Kirsher /* Uses MCC */ 12339aebddd1SJeff Kirsher int be_cmd_rxq_create(struct be_adapter *adapter, 12349aebddd1SJeff Kirsher struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 123510ef9ab4SSathya Perla u32 if_id, u32 rss, u8 *rss_id) 12369aebddd1SJeff Kirsher { 12379aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12389aebddd1SJeff Kirsher struct be_cmd_req_eth_rx_create *req; 12399aebddd1SJeff Kirsher struct be_dma_mem *q_mem = &rxq->dma_mem; 12409aebddd1SJeff Kirsher int status; 12419aebddd1SJeff Kirsher 12429aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 12439aebddd1SJeff Kirsher 12449aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 12459aebddd1SJeff Kirsher if (!wrb) { 12469aebddd1SJeff Kirsher status = -EBUSY; 12479aebddd1SJeff Kirsher goto err; 12489aebddd1SJeff Kirsher } 12499aebddd1SJeff Kirsher req = embedded_payload(wrb); 12509aebddd1SJeff Kirsher 1251106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1252106df1e3SSomnath Kotur OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 12539aebddd1SJeff Kirsher 12549aebddd1SJeff Kirsher req->cq_id = cpu_to_le16(cq_id); 12559aebddd1SJeff Kirsher req->frag_size = fls(frag_size) - 1; 12569aebddd1SJeff Kirsher req->num_pages = 2; 12579aebddd1SJeff Kirsher be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 12589aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(if_id); 125910ef9ab4SSathya Perla req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE); 12609aebddd1SJeff Kirsher req->rss_queue = cpu_to_le32(rss); 12619aebddd1SJeff Kirsher 12629aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 12639aebddd1SJeff Kirsher if (!status) { 12649aebddd1SJeff Kirsher struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); 12659aebddd1SJeff Kirsher rxq->id = le16_to_cpu(resp->id); 12669aebddd1SJeff Kirsher rxq->created = true; 12679aebddd1SJeff Kirsher *rss_id = resp->rss_id; 12689aebddd1SJeff Kirsher } 12699aebddd1SJeff Kirsher 12709aebddd1SJeff Kirsher err: 12719aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 12729aebddd1SJeff Kirsher return status; 12739aebddd1SJeff Kirsher } 12749aebddd1SJeff Kirsher 12759aebddd1SJeff Kirsher /* Generic destroyer function for all types of queues 12769aebddd1SJeff Kirsher * Uses Mbox 12779aebddd1SJeff Kirsher */ 12789aebddd1SJeff Kirsher int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 12799aebddd1SJeff Kirsher int queue_type) 12809aebddd1SJeff Kirsher { 12819aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 12829aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 12839aebddd1SJeff Kirsher u8 subsys = 0, opcode = 0; 12849aebddd1SJeff Kirsher int status; 12859aebddd1SJeff Kirsher 12869aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 12879aebddd1SJeff Kirsher return -1; 12889aebddd1SJeff Kirsher 12899aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 12909aebddd1SJeff Kirsher req = embedded_payload(wrb); 12919aebddd1SJeff Kirsher 12929aebddd1SJeff Kirsher switch (queue_type) { 12939aebddd1SJeff Kirsher case QTYPE_EQ: 12949aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12959aebddd1SJeff Kirsher opcode = OPCODE_COMMON_EQ_DESTROY; 12969aebddd1SJeff Kirsher break; 12979aebddd1SJeff Kirsher case QTYPE_CQ: 12989aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 12999aebddd1SJeff Kirsher opcode = OPCODE_COMMON_CQ_DESTROY; 13009aebddd1SJeff Kirsher break; 13019aebddd1SJeff Kirsher case QTYPE_TXQ: 13029aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13039aebddd1SJeff Kirsher opcode = OPCODE_ETH_TX_DESTROY; 13049aebddd1SJeff Kirsher break; 13059aebddd1SJeff Kirsher case QTYPE_RXQ: 13069aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_ETH; 13079aebddd1SJeff Kirsher opcode = OPCODE_ETH_RX_DESTROY; 13089aebddd1SJeff Kirsher break; 13099aebddd1SJeff Kirsher case QTYPE_MCCQ: 13109aebddd1SJeff Kirsher subsys = CMD_SUBSYSTEM_COMMON; 13119aebddd1SJeff Kirsher opcode = OPCODE_COMMON_MCC_DESTROY; 13129aebddd1SJeff Kirsher break; 13139aebddd1SJeff Kirsher default: 13149aebddd1SJeff Kirsher BUG(); 13159aebddd1SJeff Kirsher } 13169aebddd1SJeff Kirsher 1317106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1318106df1e3SSomnath Kotur NULL); 13199aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13209aebddd1SJeff Kirsher 13219aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 13229aebddd1SJeff Kirsher q->created = false; 13239aebddd1SJeff Kirsher 13249aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 13259aebddd1SJeff Kirsher return status; 13269aebddd1SJeff Kirsher } 13279aebddd1SJeff Kirsher 13289aebddd1SJeff Kirsher /* Uses MCC */ 13299aebddd1SJeff Kirsher int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q) 13309aebddd1SJeff Kirsher { 13319aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13329aebddd1SJeff Kirsher struct be_cmd_req_q_destroy *req; 13339aebddd1SJeff Kirsher int status; 13349aebddd1SJeff Kirsher 13359aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 13369aebddd1SJeff Kirsher 13379aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 13389aebddd1SJeff Kirsher if (!wrb) { 13399aebddd1SJeff Kirsher status = -EBUSY; 13409aebddd1SJeff Kirsher goto err; 13419aebddd1SJeff Kirsher } 13429aebddd1SJeff Kirsher req = embedded_payload(wrb); 13439aebddd1SJeff Kirsher 1344106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1345106df1e3SSomnath Kotur OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 13469aebddd1SJeff Kirsher req->id = cpu_to_le16(q->id); 13479aebddd1SJeff Kirsher 13489aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 13499aebddd1SJeff Kirsher q->created = false; 13509aebddd1SJeff Kirsher 13519aebddd1SJeff Kirsher err: 13529aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 13539aebddd1SJeff Kirsher return status; 13549aebddd1SJeff Kirsher } 13559aebddd1SJeff Kirsher 13569aebddd1SJeff Kirsher /* Create an rx filtering policy configuration on an i/f 1357bea50988SSathya Perla * Will use MBOX only if MCCQ has not been created. 13589aebddd1SJeff Kirsher */ 13599aebddd1SJeff Kirsher int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, 13601578e777SPadmanabh Ratnakar u32 *if_handle, u32 domain) 13619aebddd1SJeff Kirsher { 1362bea50988SSathya Perla struct be_mcc_wrb wrb = {0}; 13639aebddd1SJeff Kirsher struct be_cmd_req_if_create *req; 13649aebddd1SJeff Kirsher int status; 13659aebddd1SJeff Kirsher 1366bea50988SSathya Perla req = embedded_payload(&wrb); 1367106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1368bea50988SSathya Perla OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL); 13699aebddd1SJeff Kirsher req->hdr.domain = domain; 13709aebddd1SJeff Kirsher req->capability_flags = cpu_to_le32(cap_flags); 13719aebddd1SJeff Kirsher req->enable_flags = cpu_to_le32(en_flags); 1372f9449ab7SSathya Perla req->pmac_invalid = true; 13739aebddd1SJeff Kirsher 1374bea50988SSathya Perla status = be_cmd_notify_wait(adapter, &wrb); 13759aebddd1SJeff Kirsher if (!status) { 1376bea50988SSathya Perla struct be_cmd_resp_if_create *resp = embedded_payload(&wrb); 13779aebddd1SJeff Kirsher *if_handle = le32_to_cpu(resp->interface_id); 1378b5bb9776SSathya Perla 1379b5bb9776SSathya Perla /* Hack to retrieve VF's pmac-id on BE3 */ 1380b5bb9776SSathya Perla if (BE3_chip(adapter) && !be_physfn(adapter)) 1381b5bb9776SSathya Perla adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id); 13829aebddd1SJeff Kirsher } 13839aebddd1SJeff Kirsher return status; 13849aebddd1SJeff Kirsher } 13859aebddd1SJeff Kirsher 1386f9449ab7SSathya Perla /* Uses MCCQ */ 138730128031SSathya Perla int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain) 13889aebddd1SJeff Kirsher { 13899aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 13909aebddd1SJeff Kirsher struct be_cmd_req_if_destroy *req; 13919aebddd1SJeff Kirsher int status; 13929aebddd1SJeff Kirsher 139330128031SSathya Perla if (interface_id == -1) 1394f9449ab7SSathya Perla return 0; 13959aebddd1SJeff Kirsher 1396f9449ab7SSathya Perla spin_lock_bh(&adapter->mcc_lock); 1397f9449ab7SSathya Perla 1398f9449ab7SSathya Perla wrb = wrb_from_mccq(adapter); 1399f9449ab7SSathya Perla if (!wrb) { 1400f9449ab7SSathya Perla status = -EBUSY; 1401f9449ab7SSathya Perla goto err; 1402f9449ab7SSathya Perla } 14039aebddd1SJeff Kirsher req = embedded_payload(wrb); 14049aebddd1SJeff Kirsher 1405106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1406106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 14079aebddd1SJeff Kirsher req->hdr.domain = domain; 14089aebddd1SJeff Kirsher req->interface_id = cpu_to_le32(interface_id); 14099aebddd1SJeff Kirsher 1410f9449ab7SSathya Perla status = be_mcc_notify_wait(adapter); 1411f9449ab7SSathya Perla err: 1412f9449ab7SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 14139aebddd1SJeff Kirsher return status; 14149aebddd1SJeff Kirsher } 14159aebddd1SJeff Kirsher 14169aebddd1SJeff Kirsher /* Get stats is a non embedded command: the request is not embedded inside 14179aebddd1SJeff Kirsher * WRB but is a separate dma memory block 14189aebddd1SJeff Kirsher * Uses asynchronous MCC 14199aebddd1SJeff Kirsher */ 14209aebddd1SJeff Kirsher int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) 14219aebddd1SJeff Kirsher { 14229aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14239aebddd1SJeff Kirsher struct be_cmd_req_hdr *hdr; 14249aebddd1SJeff Kirsher int status = 0; 14259aebddd1SJeff Kirsher 14269aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14279aebddd1SJeff Kirsher 14289aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14299aebddd1SJeff Kirsher if (!wrb) { 14309aebddd1SJeff Kirsher status = -EBUSY; 14319aebddd1SJeff Kirsher goto err; 14329aebddd1SJeff Kirsher } 14339aebddd1SJeff Kirsher hdr = nonemb_cmd->va; 14349aebddd1SJeff Kirsher 1435106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1436106df1e3SSomnath Kotur OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 14379aebddd1SJeff Kirsher 1438ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 143961000861SAjit Khaparde if (BE2_chip(adapter)) 144061000861SAjit Khaparde hdr->version = 0; 144161000861SAjit Khaparde if (BE3_chip(adapter) || lancer_chip(adapter)) 14429aebddd1SJeff Kirsher hdr->version = 1; 144361000861SAjit Khaparde else 144461000861SAjit Khaparde hdr->version = 2; 14459aebddd1SJeff Kirsher 14469aebddd1SJeff Kirsher be_mcc_notify(adapter); 14479aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14489aebddd1SJeff Kirsher 14499aebddd1SJeff Kirsher err: 14509aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14519aebddd1SJeff Kirsher return status; 14529aebddd1SJeff Kirsher } 14539aebddd1SJeff Kirsher 14549aebddd1SJeff Kirsher /* Lancer Stats */ 14559aebddd1SJeff Kirsher int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 14569aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 14579aebddd1SJeff Kirsher { 14589aebddd1SJeff Kirsher 14599aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 14609aebddd1SJeff Kirsher struct lancer_cmd_req_pport_stats *req; 14619aebddd1SJeff Kirsher int status = 0; 14629aebddd1SJeff Kirsher 1463f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS, 1464f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 1465f25b119cSPadmanabh Ratnakar return -EPERM; 1466f25b119cSPadmanabh Ratnakar 14679aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 14689aebddd1SJeff Kirsher 14699aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 14709aebddd1SJeff Kirsher if (!wrb) { 14719aebddd1SJeff Kirsher status = -EBUSY; 14729aebddd1SJeff Kirsher goto err; 14739aebddd1SJeff Kirsher } 14749aebddd1SJeff Kirsher req = nonemb_cmd->va; 14759aebddd1SJeff Kirsher 1476106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1477106df1e3SSomnath Kotur OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1478106df1e3SSomnath Kotur nonemb_cmd); 14799aebddd1SJeff Kirsher 1480d51ebd33SPadmanabh Ratnakar req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 14819aebddd1SJeff Kirsher req->cmd_params.params.reset_stats = 0; 14829aebddd1SJeff Kirsher 14839aebddd1SJeff Kirsher be_mcc_notify(adapter); 14849aebddd1SJeff Kirsher adapter->stats_cmd_sent = true; 14859aebddd1SJeff Kirsher 14869aebddd1SJeff Kirsher err: 14879aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 14889aebddd1SJeff Kirsher return status; 14899aebddd1SJeff Kirsher } 14909aebddd1SJeff Kirsher 1491323ff71eSSathya Perla static int be_mac_to_link_speed(int mac_speed) 1492323ff71eSSathya Perla { 1493323ff71eSSathya Perla switch (mac_speed) { 1494323ff71eSSathya Perla case PHY_LINK_SPEED_ZERO: 1495323ff71eSSathya Perla return 0; 1496323ff71eSSathya Perla case PHY_LINK_SPEED_10MBPS: 1497323ff71eSSathya Perla return 10; 1498323ff71eSSathya Perla case PHY_LINK_SPEED_100MBPS: 1499323ff71eSSathya Perla return 100; 1500323ff71eSSathya Perla case PHY_LINK_SPEED_1GBPS: 1501323ff71eSSathya Perla return 1000; 1502323ff71eSSathya Perla case PHY_LINK_SPEED_10GBPS: 1503323ff71eSSathya Perla return 10000; 1504b971f847SVasundhara Volam case PHY_LINK_SPEED_20GBPS: 1505b971f847SVasundhara Volam return 20000; 1506b971f847SVasundhara Volam case PHY_LINK_SPEED_25GBPS: 1507b971f847SVasundhara Volam return 25000; 1508b971f847SVasundhara Volam case PHY_LINK_SPEED_40GBPS: 1509b971f847SVasundhara Volam return 40000; 1510323ff71eSSathya Perla } 1511323ff71eSSathya Perla return 0; 1512323ff71eSSathya Perla } 1513323ff71eSSathya Perla 1514323ff71eSSathya Perla /* Uses synchronous mcc 1515323ff71eSSathya Perla * Returns link_speed in Mbps 1516323ff71eSSathya Perla */ 1517323ff71eSSathya Perla int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed, 1518323ff71eSSathya Perla u8 *link_status, u32 dom) 15199aebddd1SJeff Kirsher { 15209aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15219aebddd1SJeff Kirsher struct be_cmd_req_link_status *req; 15229aebddd1SJeff Kirsher int status; 15239aebddd1SJeff Kirsher 15249aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15259aebddd1SJeff Kirsher 1526b236916aSAjit Khaparde if (link_status) 1527b236916aSAjit Khaparde *link_status = LINK_DOWN; 1528b236916aSAjit Khaparde 15299aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15309aebddd1SJeff Kirsher if (!wrb) { 15319aebddd1SJeff Kirsher status = -EBUSY; 15329aebddd1SJeff Kirsher goto err; 15339aebddd1SJeff Kirsher } 15349aebddd1SJeff Kirsher req = embedded_payload(wrb); 15359aebddd1SJeff Kirsher 153657cd80d4SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 153757cd80d4SPadmanabh Ratnakar OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 153857cd80d4SPadmanabh Ratnakar 1539ca34fe38SSathya Perla /* version 1 of the cmd is not supported only by BE2 */ 1540ca34fe38SSathya Perla if (!BE2_chip(adapter)) 1541daad6167SPadmanabh Ratnakar req->hdr.version = 1; 1542daad6167SPadmanabh Ratnakar 154357cd80d4SPadmanabh Ratnakar req->hdr.domain = dom; 15449aebddd1SJeff Kirsher 15459aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 15469aebddd1SJeff Kirsher if (!status) { 15479aebddd1SJeff Kirsher struct be_cmd_resp_link_status *resp = embedded_payload(wrb); 1548323ff71eSSathya Perla if (link_speed) { 1549323ff71eSSathya Perla *link_speed = resp->link_speed ? 1550323ff71eSSathya Perla le16_to_cpu(resp->link_speed) * 10 : 1551323ff71eSSathya Perla be_mac_to_link_speed(resp->mac_speed); 1552323ff71eSSathya Perla 1553323ff71eSSathya Perla if (!resp->logical_link_status) 1554323ff71eSSathya Perla *link_speed = 0; 15559aebddd1SJeff Kirsher } 1556b236916aSAjit Khaparde if (link_status) 1557b236916aSAjit Khaparde *link_status = resp->logical_link_status; 15589aebddd1SJeff Kirsher } 15599aebddd1SJeff Kirsher 15609aebddd1SJeff Kirsher err: 15619aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15629aebddd1SJeff Kirsher return status; 15639aebddd1SJeff Kirsher } 15649aebddd1SJeff Kirsher 15659aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15669aebddd1SJeff Kirsher int be_cmd_get_die_temperature(struct be_adapter *adapter) 15679aebddd1SJeff Kirsher { 15689aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15699aebddd1SJeff Kirsher struct be_cmd_req_get_cntl_addnl_attribs *req; 1570117affe3SVasundhara Volam int status = 0; 15719aebddd1SJeff Kirsher 15729aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 15739aebddd1SJeff Kirsher 15749aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 15759aebddd1SJeff Kirsher if (!wrb) { 15769aebddd1SJeff Kirsher status = -EBUSY; 15779aebddd1SJeff Kirsher goto err; 15789aebddd1SJeff Kirsher } 15799aebddd1SJeff Kirsher req = embedded_payload(wrb); 15809aebddd1SJeff Kirsher 1581106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1582106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1583106df1e3SSomnath Kotur wrb, NULL); 15849aebddd1SJeff Kirsher 15853de09455SSomnath Kotur be_mcc_notify(adapter); 15869aebddd1SJeff Kirsher 15879aebddd1SJeff Kirsher err: 15889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 15899aebddd1SJeff Kirsher return status; 15909aebddd1SJeff Kirsher } 15919aebddd1SJeff Kirsher 15929aebddd1SJeff Kirsher /* Uses synchronous mcc */ 15939aebddd1SJeff Kirsher int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size) 15949aebddd1SJeff Kirsher { 15959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 15969aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 15979aebddd1SJeff Kirsher int status; 15989aebddd1SJeff Kirsher 15999aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16009aebddd1SJeff Kirsher 16019aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16029aebddd1SJeff Kirsher if (!wrb) { 16039aebddd1SJeff Kirsher status = -EBUSY; 16049aebddd1SJeff Kirsher goto err; 16059aebddd1SJeff Kirsher } 16069aebddd1SJeff Kirsher req = embedded_payload(wrb); 16079aebddd1SJeff Kirsher 1608106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1609106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 16109aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(QUERY_FAT); 16119aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16129aebddd1SJeff Kirsher if (!status) { 16139aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = embedded_payload(wrb); 16149aebddd1SJeff Kirsher if (log_size && resp->log_size) 16159aebddd1SJeff Kirsher *log_size = le32_to_cpu(resp->log_size) - 16169aebddd1SJeff Kirsher sizeof(u32); 16179aebddd1SJeff Kirsher } 16189aebddd1SJeff Kirsher err: 16199aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16209aebddd1SJeff Kirsher return status; 16219aebddd1SJeff Kirsher } 16229aebddd1SJeff Kirsher 16239aebddd1SJeff Kirsher void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf) 16249aebddd1SJeff Kirsher { 16259aebddd1SJeff Kirsher struct be_dma_mem get_fat_cmd; 16269aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16279aebddd1SJeff Kirsher struct be_cmd_req_get_fat *req; 16289aebddd1SJeff Kirsher u32 offset = 0, total_size, buf_size, 16299aebddd1SJeff Kirsher log_offset = sizeof(u32), payload_len; 16309aebddd1SJeff Kirsher int status; 16319aebddd1SJeff Kirsher 16329aebddd1SJeff Kirsher if (buf_len == 0) 16339aebddd1SJeff Kirsher return; 16349aebddd1SJeff Kirsher 16359aebddd1SJeff Kirsher total_size = buf_len; 16369aebddd1SJeff Kirsher 16379aebddd1SJeff Kirsher get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 16389aebddd1SJeff Kirsher get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 16399aebddd1SJeff Kirsher get_fat_cmd.size, 16409aebddd1SJeff Kirsher &get_fat_cmd.dma); 16419aebddd1SJeff Kirsher if (!get_fat_cmd.va) { 16429aebddd1SJeff Kirsher status = -ENOMEM; 16439aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 16449aebddd1SJeff Kirsher "Memory allocation failure while retrieving FAT data\n"); 16459aebddd1SJeff Kirsher return; 16469aebddd1SJeff Kirsher } 16479aebddd1SJeff Kirsher 16489aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 16499aebddd1SJeff Kirsher 16509aebddd1SJeff Kirsher while (total_size) { 16519aebddd1SJeff Kirsher buf_size = min(total_size, (u32)60*1024); 16529aebddd1SJeff Kirsher total_size -= buf_size; 16539aebddd1SJeff Kirsher 16549aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 16559aebddd1SJeff Kirsher if (!wrb) { 16569aebddd1SJeff Kirsher status = -EBUSY; 16579aebddd1SJeff Kirsher goto err; 16589aebddd1SJeff Kirsher } 16599aebddd1SJeff Kirsher req = get_fat_cmd.va; 16609aebddd1SJeff Kirsher 16619aebddd1SJeff Kirsher payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1662106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1663106df1e3SSomnath Kotur OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1664106df1e3SSomnath Kotur &get_fat_cmd); 16659aebddd1SJeff Kirsher 16669aebddd1SJeff Kirsher req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 16679aebddd1SJeff Kirsher req->read_log_offset = cpu_to_le32(log_offset); 16689aebddd1SJeff Kirsher req->read_log_length = cpu_to_le32(buf_size); 16699aebddd1SJeff Kirsher req->data_buffer_size = cpu_to_le32(buf_size); 16709aebddd1SJeff Kirsher 16719aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 16729aebddd1SJeff Kirsher if (!status) { 16739aebddd1SJeff Kirsher struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 16749aebddd1SJeff Kirsher memcpy(buf + offset, 16759aebddd1SJeff Kirsher resp->data_buffer, 167692aa9214SSomnath Kotur le32_to_cpu(resp->read_log_length)); 16779aebddd1SJeff Kirsher } else { 16789aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 16799aebddd1SJeff Kirsher goto err; 16809aebddd1SJeff Kirsher } 16819aebddd1SJeff Kirsher offset += buf_size; 16829aebddd1SJeff Kirsher log_offset += buf_size; 16839aebddd1SJeff Kirsher } 16849aebddd1SJeff Kirsher err: 16859aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, get_fat_cmd.size, 16869aebddd1SJeff Kirsher get_fat_cmd.va, 16879aebddd1SJeff Kirsher get_fat_cmd.dma); 16889aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 16899aebddd1SJeff Kirsher } 16909aebddd1SJeff Kirsher 169104b71175SSathya Perla /* Uses synchronous mcc */ 169204b71175SSathya Perla int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 169304b71175SSathya Perla char *fw_on_flash) 16949aebddd1SJeff Kirsher { 16959aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 16969aebddd1SJeff Kirsher struct be_cmd_req_get_fw_version *req; 16979aebddd1SJeff Kirsher int status; 16989aebddd1SJeff Kirsher 169904b71175SSathya Perla spin_lock_bh(&adapter->mcc_lock); 17009aebddd1SJeff Kirsher 170104b71175SSathya Perla wrb = wrb_from_mccq(adapter); 170204b71175SSathya Perla if (!wrb) { 170304b71175SSathya Perla status = -EBUSY; 170404b71175SSathya Perla goto err; 170504b71175SSathya Perla } 170604b71175SSathya Perla 17079aebddd1SJeff Kirsher req = embedded_payload(wrb); 17089aebddd1SJeff Kirsher 1709106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1710106df1e3SSomnath Kotur OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 171104b71175SSathya Perla status = be_mcc_notify_wait(adapter); 17129aebddd1SJeff Kirsher if (!status) { 17139aebddd1SJeff Kirsher struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 171404b71175SSathya Perla strcpy(fw_ver, resp->firmware_version_string); 171504b71175SSathya Perla if (fw_on_flash) 171604b71175SSathya Perla strcpy(fw_on_flash, resp->fw_on_flash_version_string); 17179aebddd1SJeff Kirsher } 171804b71175SSathya Perla err: 171904b71175SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 17209aebddd1SJeff Kirsher return status; 17219aebddd1SJeff Kirsher } 17229aebddd1SJeff Kirsher 17239aebddd1SJeff Kirsher /* set the EQ delay interval of an EQ to specified value 17249aebddd1SJeff Kirsher * Uses async mcc 17259aebddd1SJeff Kirsher */ 17262632bafdSSathya Perla int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd, 17272632bafdSSathya Perla int num) 17289aebddd1SJeff Kirsher { 17299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17309aebddd1SJeff Kirsher struct be_cmd_req_modify_eq_delay *req; 17312632bafdSSathya Perla int status = 0, i; 17329aebddd1SJeff Kirsher 17339aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17349aebddd1SJeff Kirsher 17359aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17369aebddd1SJeff Kirsher if (!wrb) { 17379aebddd1SJeff Kirsher status = -EBUSY; 17389aebddd1SJeff Kirsher goto err; 17399aebddd1SJeff Kirsher } 17409aebddd1SJeff Kirsher req = embedded_payload(wrb); 17419aebddd1SJeff Kirsher 1742106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1743106df1e3SSomnath Kotur OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 17449aebddd1SJeff Kirsher 17452632bafdSSathya Perla req->num_eq = cpu_to_le32(num); 17462632bafdSSathya Perla for (i = 0; i < num; i++) { 17472632bafdSSathya Perla req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id); 17482632bafdSSathya Perla req->set_eqd[i].phase = 0; 17492632bafdSSathya Perla req->set_eqd[i].delay_multiplier = 17502632bafdSSathya Perla cpu_to_le32(set_eqd[i].delay_multiplier); 17512632bafdSSathya Perla } 17529aebddd1SJeff Kirsher 17539aebddd1SJeff Kirsher be_mcc_notify(adapter); 17549aebddd1SJeff Kirsher err: 17559aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17569aebddd1SJeff Kirsher return status; 17579aebddd1SJeff Kirsher } 17589aebddd1SJeff Kirsher 17599aebddd1SJeff Kirsher /* Uses sycnhronous mcc */ 17609aebddd1SJeff Kirsher int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, 1761012bd387SAjit Khaparde u32 num, bool promiscuous) 17629aebddd1SJeff Kirsher { 17639aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17649aebddd1SJeff Kirsher struct be_cmd_req_vlan_config *req; 17659aebddd1SJeff Kirsher int status; 17669aebddd1SJeff Kirsher 17679aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 17689aebddd1SJeff Kirsher 17699aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 17709aebddd1SJeff Kirsher if (!wrb) { 17719aebddd1SJeff Kirsher status = -EBUSY; 17729aebddd1SJeff Kirsher goto err; 17739aebddd1SJeff Kirsher } 17749aebddd1SJeff Kirsher req = embedded_payload(wrb); 17759aebddd1SJeff Kirsher 1776106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1777106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 17789aebddd1SJeff Kirsher 17799aebddd1SJeff Kirsher req->interface_id = if_id; 17809aebddd1SJeff Kirsher req->promiscuous = promiscuous; 1781012bd387SAjit Khaparde req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0; 17829aebddd1SJeff Kirsher req->num_vlan = num; 17839aebddd1SJeff Kirsher if (!promiscuous) { 17849aebddd1SJeff Kirsher memcpy(req->normal_vlan, vtag_array, 17859aebddd1SJeff Kirsher req->num_vlan * sizeof(vtag_array[0])); 17869aebddd1SJeff Kirsher } 17879aebddd1SJeff Kirsher 17889aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 17899aebddd1SJeff Kirsher 17909aebddd1SJeff Kirsher err: 17919aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 17929aebddd1SJeff Kirsher return status; 17939aebddd1SJeff Kirsher } 17949aebddd1SJeff Kirsher 17959aebddd1SJeff Kirsher int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) 17969aebddd1SJeff Kirsher { 17979aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 17989aebddd1SJeff Kirsher struct be_dma_mem *mem = &adapter->rx_filter; 17999aebddd1SJeff Kirsher struct be_cmd_req_rx_filter *req = mem->va; 18009aebddd1SJeff Kirsher int status; 18019aebddd1SJeff Kirsher 18029aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18039aebddd1SJeff Kirsher 18049aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18059aebddd1SJeff Kirsher if (!wrb) { 18069aebddd1SJeff Kirsher status = -EBUSY; 18079aebddd1SJeff Kirsher goto err; 18089aebddd1SJeff Kirsher } 18099aebddd1SJeff Kirsher memset(req, 0, sizeof(*req)); 1810106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1811106df1e3SSomnath Kotur OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1812106df1e3SSomnath Kotur wrb, mem); 18139aebddd1SJeff Kirsher 18149aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 18159aebddd1SJeff Kirsher if (flags & IFF_PROMISC) { 18169aebddd1SJeff Kirsher req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1817c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1818c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18199aebddd1SJeff Kirsher if (value == ON) 18209aebddd1SJeff Kirsher req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1821c5dae588SAjit Khaparde BE_IF_FLAGS_VLAN_PROMISCUOUS | 1822c5dae588SAjit Khaparde BE_IF_FLAGS_MCAST_PROMISCUOUS); 18239aebddd1SJeff Kirsher } else if (flags & IFF_ALLMULTI) { 18249aebddd1SJeff Kirsher req->if_flags_mask = req->if_flags = 18259aebddd1SJeff Kirsher cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1826d9d604f8SAjit Khaparde } else if (flags & BE_FLAGS_VLAN_PROMISC) { 1827d9d604f8SAjit Khaparde req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 1828d9d604f8SAjit Khaparde 1829d9d604f8SAjit Khaparde if (value == ON) 1830d9d604f8SAjit Khaparde req->if_flags = 1831d9d604f8SAjit Khaparde cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); 18329aebddd1SJeff Kirsher } else { 18339aebddd1SJeff Kirsher struct netdev_hw_addr *ha; 18349aebddd1SJeff Kirsher int i = 0; 18359aebddd1SJeff Kirsher 18368e7d3f68SSathya Perla req->if_flags_mask = req->if_flags = 18378e7d3f68SSathya Perla cpu_to_le32(BE_IF_FLAGS_MULTICAST); 18381610c79fSPadmanabh Ratnakar 18391610c79fSPadmanabh Ratnakar /* Reset mcast promisc mode if already set by setting mask 18401610c79fSPadmanabh Ratnakar * and not setting flags field 18411610c79fSPadmanabh Ratnakar */ 18421610c79fSPadmanabh Ratnakar req->if_flags_mask |= 1843abb93951SPadmanabh Ratnakar cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS & 184492bf14abSSathya Perla be_if_cap_flags(adapter)); 1845016f97b1SPadmanabh Ratnakar req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev)); 18469aebddd1SJeff Kirsher netdev_for_each_mc_addr(ha, adapter->netdev) 18479aebddd1SJeff Kirsher memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN); 18489aebddd1SJeff Kirsher } 18499aebddd1SJeff Kirsher 1850012bd387SAjit Khaparde if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1851012bd387SAjit Khaparde req->if_flags_mask) { 1852012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1853012bd387SAjit Khaparde "Cannot set rx filter flags 0x%x\n", 1854012bd387SAjit Khaparde req->if_flags_mask); 1855012bd387SAjit Khaparde dev_warn(&adapter->pdev->dev, 1856012bd387SAjit Khaparde "Interface is capable of 0x%x flags only\n", 1857012bd387SAjit Khaparde be_if_cap_flags(adapter)); 1858012bd387SAjit Khaparde } 1859012bd387SAjit Khaparde req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter)); 1860012bd387SAjit Khaparde 18619aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 1862012bd387SAjit Khaparde 18639aebddd1SJeff Kirsher err: 18649aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18659aebddd1SJeff Kirsher return status; 18669aebddd1SJeff Kirsher } 18679aebddd1SJeff Kirsher 18689aebddd1SJeff Kirsher /* Uses synchrounous mcc */ 18699aebddd1SJeff Kirsher int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) 18709aebddd1SJeff Kirsher { 18719aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 18729aebddd1SJeff Kirsher struct be_cmd_req_set_flow_control *req; 18739aebddd1SJeff Kirsher int status; 18749aebddd1SJeff Kirsher 1875f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL, 1876f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1877f25b119cSPadmanabh Ratnakar return -EPERM; 1878f25b119cSPadmanabh Ratnakar 18799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 18809aebddd1SJeff Kirsher 18819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 18829aebddd1SJeff Kirsher if (!wrb) { 18839aebddd1SJeff Kirsher status = -EBUSY; 18849aebddd1SJeff Kirsher goto err; 18859aebddd1SJeff Kirsher } 18869aebddd1SJeff Kirsher req = embedded_payload(wrb); 18879aebddd1SJeff Kirsher 1888106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1889106df1e3SSomnath Kotur OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 18909aebddd1SJeff Kirsher 18919aebddd1SJeff Kirsher req->tx_flow_control = cpu_to_le16((u16)tx_fc); 18929aebddd1SJeff Kirsher req->rx_flow_control = cpu_to_le16((u16)rx_fc); 18939aebddd1SJeff Kirsher 18949aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 18959aebddd1SJeff Kirsher 18969aebddd1SJeff Kirsher err: 18979aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 18989aebddd1SJeff Kirsher return status; 18999aebddd1SJeff Kirsher } 19009aebddd1SJeff Kirsher 19019aebddd1SJeff Kirsher /* Uses sycn mcc */ 19029aebddd1SJeff Kirsher int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) 19039aebddd1SJeff Kirsher { 19049aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19059aebddd1SJeff Kirsher struct be_cmd_req_get_flow_control *req; 19069aebddd1SJeff Kirsher int status; 19079aebddd1SJeff Kirsher 1908f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL, 1909f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 1910f25b119cSPadmanabh Ratnakar return -EPERM; 1911f25b119cSPadmanabh Ratnakar 19129aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 19139aebddd1SJeff Kirsher 19149aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 19159aebddd1SJeff Kirsher if (!wrb) { 19169aebddd1SJeff Kirsher status = -EBUSY; 19179aebddd1SJeff Kirsher goto err; 19189aebddd1SJeff Kirsher } 19199aebddd1SJeff Kirsher req = embedded_payload(wrb); 19209aebddd1SJeff Kirsher 1921106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1922106df1e3SSomnath Kotur OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 19239aebddd1SJeff Kirsher 19249aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 19259aebddd1SJeff Kirsher if (!status) { 19269aebddd1SJeff Kirsher struct be_cmd_resp_get_flow_control *resp = 19279aebddd1SJeff Kirsher embedded_payload(wrb); 19289aebddd1SJeff Kirsher *tx_fc = le16_to_cpu(resp->tx_flow_control); 19299aebddd1SJeff Kirsher *rx_fc = le16_to_cpu(resp->rx_flow_control); 19309aebddd1SJeff Kirsher } 19319aebddd1SJeff Kirsher 19329aebddd1SJeff Kirsher err: 19339aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 19349aebddd1SJeff Kirsher return status; 19359aebddd1SJeff Kirsher } 19369aebddd1SJeff Kirsher 19379aebddd1SJeff Kirsher /* Uses mbox */ 19389aebddd1SJeff Kirsher int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, 19390ad3157eSVasundhara Volam u32 *mode, u32 *caps, u16 *asic_rev) 19409aebddd1SJeff Kirsher { 19419aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19429aebddd1SJeff Kirsher struct be_cmd_req_query_fw_cfg *req; 19439aebddd1SJeff Kirsher int status; 19449aebddd1SJeff Kirsher 19459aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19469aebddd1SJeff Kirsher return -1; 19479aebddd1SJeff Kirsher 19489aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19499aebddd1SJeff Kirsher req = embedded_payload(wrb); 19509aebddd1SJeff Kirsher 1951106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1952106df1e3SSomnath Kotur OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 19539aebddd1SJeff Kirsher 19549aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19559aebddd1SJeff Kirsher if (!status) { 19569aebddd1SJeff Kirsher struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); 19579aebddd1SJeff Kirsher *port_num = le32_to_cpu(resp->phys_port); 19589aebddd1SJeff Kirsher *mode = le32_to_cpu(resp->function_mode); 19599aebddd1SJeff Kirsher *caps = le32_to_cpu(resp->function_caps); 19600ad3157eSVasundhara Volam *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF; 19619aebddd1SJeff Kirsher } 19629aebddd1SJeff Kirsher 19639aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 19649aebddd1SJeff Kirsher return status; 19659aebddd1SJeff Kirsher } 19669aebddd1SJeff Kirsher 19679aebddd1SJeff Kirsher /* Uses mbox */ 19689aebddd1SJeff Kirsher int be_cmd_reset_function(struct be_adapter *adapter) 19699aebddd1SJeff Kirsher { 19709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 19719aebddd1SJeff Kirsher struct be_cmd_req_hdr *req; 19729aebddd1SJeff Kirsher int status; 19739aebddd1SJeff Kirsher 1974bf99e50dSPadmanabh Ratnakar if (lancer_chip(adapter)) { 1975bf99e50dSPadmanabh Ratnakar status = lancer_wait_ready(adapter); 1976bf99e50dSPadmanabh Ratnakar if (!status) { 1977bf99e50dSPadmanabh Ratnakar iowrite32(SLI_PORT_CONTROL_IP_MASK, 1978bf99e50dSPadmanabh Ratnakar adapter->db + SLIPORT_CONTROL_OFFSET); 1979bf99e50dSPadmanabh Ratnakar status = lancer_test_and_set_rdy_state(adapter); 1980bf99e50dSPadmanabh Ratnakar } 1981bf99e50dSPadmanabh Ratnakar if (status) { 1982bf99e50dSPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 1983bf99e50dSPadmanabh Ratnakar "Adapter in non recoverable error\n"); 1984bf99e50dSPadmanabh Ratnakar } 1985bf99e50dSPadmanabh Ratnakar return status; 1986bf99e50dSPadmanabh Ratnakar } 1987bf99e50dSPadmanabh Ratnakar 19889aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 19899aebddd1SJeff Kirsher return -1; 19909aebddd1SJeff Kirsher 19919aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 19929aebddd1SJeff Kirsher req = embedded_payload(wrb); 19939aebddd1SJeff Kirsher 1994106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 1995106df1e3SSomnath Kotur OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 19969aebddd1SJeff Kirsher 19979aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 19989aebddd1SJeff Kirsher 19999aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20009aebddd1SJeff Kirsher return status; 20019aebddd1SJeff Kirsher } 20029aebddd1SJeff Kirsher 2003594ad54aSSuresh Reddy int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2004594ad54aSSuresh Reddy u32 rss_hash_opts, u16 table_size) 20059aebddd1SJeff Kirsher { 20069aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20079aebddd1SJeff Kirsher struct be_cmd_req_rss_config *req; 200865f8584eSPadmanabh Ratnakar u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e, 200965f8584eSPadmanabh Ratnakar 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2, 201065f8584eSPadmanabh Ratnakar 0x3ea83c02, 0x4a110304}; 20119aebddd1SJeff Kirsher int status; 20129aebddd1SJeff Kirsher 20139aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 20149aebddd1SJeff Kirsher return -1; 20159aebddd1SJeff Kirsher 20169aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 20179aebddd1SJeff Kirsher req = embedded_payload(wrb); 20189aebddd1SJeff Kirsher 2019106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2020106df1e3SSomnath Kotur OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 20219aebddd1SJeff Kirsher 20229aebddd1SJeff Kirsher req->if_id = cpu_to_le32(adapter->if_handle); 2023594ad54aSSuresh Reddy req->enable_rss = cpu_to_le16(rss_hash_opts); 20249aebddd1SJeff Kirsher req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1); 2025594ad54aSSuresh Reddy 2026594ad54aSSuresh Reddy if (lancer_chip(adapter) || skyhawk_chip(adapter)) 2027594ad54aSSuresh Reddy req->hdr.version = 1; 2028594ad54aSSuresh Reddy 20299aebddd1SJeff Kirsher memcpy(req->cpu_table, rsstable, table_size); 20309aebddd1SJeff Kirsher memcpy(req->hash, myhash, sizeof(myhash)); 20319aebddd1SJeff Kirsher be_dws_cpu_to_le(req->hash, sizeof(req->hash)); 20329aebddd1SJeff Kirsher 20339aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 20349aebddd1SJeff Kirsher 20359aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 20369aebddd1SJeff Kirsher return status; 20379aebddd1SJeff Kirsher } 20389aebddd1SJeff Kirsher 20399aebddd1SJeff Kirsher /* Uses sync mcc */ 20409aebddd1SJeff Kirsher int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 20419aebddd1SJeff Kirsher u8 bcn, u8 sts, u8 state) 20429aebddd1SJeff Kirsher { 20439aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20449aebddd1SJeff Kirsher struct be_cmd_req_enable_disable_beacon *req; 20459aebddd1SJeff Kirsher int status; 20469aebddd1SJeff Kirsher 20479aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20489aebddd1SJeff Kirsher 20499aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20509aebddd1SJeff Kirsher if (!wrb) { 20519aebddd1SJeff Kirsher status = -EBUSY; 20529aebddd1SJeff Kirsher goto err; 20539aebddd1SJeff Kirsher } 20549aebddd1SJeff Kirsher req = embedded_payload(wrb); 20559aebddd1SJeff Kirsher 2056106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2057106df1e3SSomnath Kotur OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 20589aebddd1SJeff Kirsher 20599aebddd1SJeff Kirsher req->port_num = port_num; 20609aebddd1SJeff Kirsher req->beacon_state = state; 20619aebddd1SJeff Kirsher req->beacon_duration = bcn; 20629aebddd1SJeff Kirsher req->status_duration = sts; 20639aebddd1SJeff Kirsher 20649aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20659aebddd1SJeff Kirsher 20669aebddd1SJeff Kirsher err: 20679aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 20689aebddd1SJeff Kirsher return status; 20699aebddd1SJeff Kirsher } 20709aebddd1SJeff Kirsher 20719aebddd1SJeff Kirsher /* Uses sync mcc */ 20729aebddd1SJeff Kirsher int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) 20739aebddd1SJeff Kirsher { 20749aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 20759aebddd1SJeff Kirsher struct be_cmd_req_get_beacon_state *req; 20769aebddd1SJeff Kirsher int status; 20779aebddd1SJeff Kirsher 20789aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 20799aebddd1SJeff Kirsher 20809aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 20819aebddd1SJeff Kirsher if (!wrb) { 20829aebddd1SJeff Kirsher status = -EBUSY; 20839aebddd1SJeff Kirsher goto err; 20849aebddd1SJeff Kirsher } 20859aebddd1SJeff Kirsher req = embedded_payload(wrb); 20869aebddd1SJeff Kirsher 2087106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2088106df1e3SSomnath Kotur OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 20899aebddd1SJeff Kirsher 20909aebddd1SJeff Kirsher req->port_num = port_num; 20919aebddd1SJeff Kirsher 20929aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 20939aebddd1SJeff Kirsher if (!status) { 20949aebddd1SJeff Kirsher struct be_cmd_resp_get_beacon_state *resp = 20959aebddd1SJeff Kirsher embedded_payload(wrb); 20969aebddd1SJeff Kirsher *state = resp->beacon_state; 20979aebddd1SJeff Kirsher } 20989aebddd1SJeff Kirsher 20999aebddd1SJeff Kirsher err: 21009aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21019aebddd1SJeff Kirsher return status; 21029aebddd1SJeff Kirsher } 21039aebddd1SJeff Kirsher 21049aebddd1SJeff Kirsher int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2105f67ef7baSPadmanabh Ratnakar u32 data_size, u32 data_offset, 2106f67ef7baSPadmanabh Ratnakar const char *obj_name, u32 *data_written, 2107f67ef7baSPadmanabh Ratnakar u8 *change_status, u8 *addn_status) 21089aebddd1SJeff Kirsher { 21099aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 21109aebddd1SJeff Kirsher struct lancer_cmd_req_write_object *req; 21119aebddd1SJeff Kirsher struct lancer_cmd_resp_write_object *resp; 21129aebddd1SJeff Kirsher void *ctxt = NULL; 21139aebddd1SJeff Kirsher int status; 21149aebddd1SJeff Kirsher 21159aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 21169aebddd1SJeff Kirsher adapter->flash_status = 0; 21179aebddd1SJeff Kirsher 21189aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 21199aebddd1SJeff Kirsher if (!wrb) { 21209aebddd1SJeff Kirsher status = -EBUSY; 21219aebddd1SJeff Kirsher goto err_unlock; 21229aebddd1SJeff Kirsher } 21239aebddd1SJeff Kirsher 21249aebddd1SJeff Kirsher req = embedded_payload(wrb); 21259aebddd1SJeff Kirsher 2126106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 21279aebddd1SJeff Kirsher OPCODE_COMMON_WRITE_OBJECT, 2128106df1e3SSomnath Kotur sizeof(struct lancer_cmd_req_write_object), wrb, 2129106df1e3SSomnath Kotur NULL); 21309aebddd1SJeff Kirsher 21319aebddd1SJeff Kirsher ctxt = &req->context; 21329aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21339aebddd1SJeff Kirsher write_length, ctxt, data_size); 21349aebddd1SJeff Kirsher 21359aebddd1SJeff Kirsher if (data_size == 0) 21369aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21379aebddd1SJeff Kirsher eof, ctxt, 1); 21389aebddd1SJeff Kirsher else 21399aebddd1SJeff Kirsher AMAP_SET_BITS(struct amap_lancer_write_obj_context, 21409aebddd1SJeff Kirsher eof, ctxt, 0); 21419aebddd1SJeff Kirsher 21429aebddd1SJeff Kirsher be_dws_cpu_to_le(ctxt, sizeof(req->context)); 21439aebddd1SJeff Kirsher req->write_offset = cpu_to_le32(data_offset); 21449aebddd1SJeff Kirsher strcpy(req->object_name, obj_name); 21459aebddd1SJeff Kirsher req->descriptor_count = cpu_to_le32(1); 21469aebddd1SJeff Kirsher req->buf_len = cpu_to_le32(data_size); 21479aebddd1SJeff Kirsher req->addr_low = cpu_to_le32((cmd->dma + 21489aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object)) 21499aebddd1SJeff Kirsher & 0xFFFFFFFF); 21509aebddd1SJeff Kirsher req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 21519aebddd1SJeff Kirsher sizeof(struct lancer_cmd_req_write_object))); 21529aebddd1SJeff Kirsher 21539aebddd1SJeff Kirsher be_mcc_notify(adapter); 21549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21559aebddd1SJeff Kirsher 21569aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2157701962d0SSomnath Kotur msecs_to_jiffies(60000))) 21589aebddd1SJeff Kirsher status = -1; 21599aebddd1SJeff Kirsher else 21609aebddd1SJeff Kirsher status = adapter->flash_status; 21619aebddd1SJeff Kirsher 21629aebddd1SJeff Kirsher resp = embedded_payload(wrb); 2163f67ef7baSPadmanabh Ratnakar if (!status) { 21649aebddd1SJeff Kirsher *data_written = le32_to_cpu(resp->actual_write_len); 2165f67ef7baSPadmanabh Ratnakar *change_status = resp->change_status; 2166f67ef7baSPadmanabh Ratnakar } else { 21679aebddd1SJeff Kirsher *addn_status = resp->additional_status; 2168f67ef7baSPadmanabh Ratnakar } 21699aebddd1SJeff Kirsher 21709aebddd1SJeff Kirsher return status; 21719aebddd1SJeff Kirsher 21729aebddd1SJeff Kirsher err_unlock: 21739aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 21749aebddd1SJeff Kirsher return status; 21759aebddd1SJeff Kirsher } 21769aebddd1SJeff Kirsher 2177de49bd5aSPadmanabh Ratnakar int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2178de49bd5aSPadmanabh Ratnakar u32 data_size, u32 data_offset, const char *obj_name, 2179de49bd5aSPadmanabh Ratnakar u32 *data_read, u32 *eof, u8 *addn_status) 2180de49bd5aSPadmanabh Ratnakar { 2181de49bd5aSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2182de49bd5aSPadmanabh Ratnakar struct lancer_cmd_req_read_object *req; 2183de49bd5aSPadmanabh Ratnakar struct lancer_cmd_resp_read_object *resp; 2184de49bd5aSPadmanabh Ratnakar int status; 2185de49bd5aSPadmanabh Ratnakar 2186de49bd5aSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2187de49bd5aSPadmanabh Ratnakar 2188de49bd5aSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2189de49bd5aSPadmanabh Ratnakar if (!wrb) { 2190de49bd5aSPadmanabh Ratnakar status = -EBUSY; 2191de49bd5aSPadmanabh Ratnakar goto err_unlock; 2192de49bd5aSPadmanabh Ratnakar } 2193de49bd5aSPadmanabh Ratnakar 2194de49bd5aSPadmanabh Ratnakar req = embedded_payload(wrb); 2195de49bd5aSPadmanabh Ratnakar 2196de49bd5aSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2197de49bd5aSPadmanabh Ratnakar OPCODE_COMMON_READ_OBJECT, 2198de49bd5aSPadmanabh Ratnakar sizeof(struct lancer_cmd_req_read_object), wrb, 2199de49bd5aSPadmanabh Ratnakar NULL); 2200de49bd5aSPadmanabh Ratnakar 2201de49bd5aSPadmanabh Ratnakar req->desired_read_len = cpu_to_le32(data_size); 2202de49bd5aSPadmanabh Ratnakar req->read_offset = cpu_to_le32(data_offset); 2203de49bd5aSPadmanabh Ratnakar strcpy(req->object_name, obj_name); 2204de49bd5aSPadmanabh Ratnakar req->descriptor_count = cpu_to_le32(1); 2205de49bd5aSPadmanabh Ratnakar req->buf_len = cpu_to_le32(data_size); 2206de49bd5aSPadmanabh Ratnakar req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF)); 2207de49bd5aSPadmanabh Ratnakar req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); 2208de49bd5aSPadmanabh Ratnakar 2209de49bd5aSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2210de49bd5aSPadmanabh Ratnakar 2211de49bd5aSPadmanabh Ratnakar resp = embedded_payload(wrb); 2212de49bd5aSPadmanabh Ratnakar if (!status) { 2213de49bd5aSPadmanabh Ratnakar *data_read = le32_to_cpu(resp->actual_read_len); 2214de49bd5aSPadmanabh Ratnakar *eof = le32_to_cpu(resp->eof); 2215de49bd5aSPadmanabh Ratnakar } else { 2216de49bd5aSPadmanabh Ratnakar *addn_status = resp->additional_status; 2217de49bd5aSPadmanabh Ratnakar } 2218de49bd5aSPadmanabh Ratnakar 2219de49bd5aSPadmanabh Ratnakar err_unlock: 2220de49bd5aSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2221de49bd5aSPadmanabh Ratnakar return status; 2222de49bd5aSPadmanabh Ratnakar } 2223de49bd5aSPadmanabh Ratnakar 22249aebddd1SJeff Kirsher int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 22259aebddd1SJeff Kirsher u32 flash_type, u32 flash_opcode, u32 buf_size) 22269aebddd1SJeff Kirsher { 22279aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 22289aebddd1SJeff Kirsher struct be_cmd_write_flashrom *req; 22299aebddd1SJeff Kirsher int status; 22309aebddd1SJeff Kirsher 22319aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22329aebddd1SJeff Kirsher adapter->flash_status = 0; 22339aebddd1SJeff Kirsher 22349aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22359aebddd1SJeff Kirsher if (!wrb) { 22369aebddd1SJeff Kirsher status = -EBUSY; 22379aebddd1SJeff Kirsher goto err_unlock; 22389aebddd1SJeff Kirsher } 22399aebddd1SJeff Kirsher req = cmd->va; 22409aebddd1SJeff Kirsher 2241106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2242106df1e3SSomnath Kotur OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 22439aebddd1SJeff Kirsher 22449aebddd1SJeff Kirsher req->params.op_type = cpu_to_le32(flash_type); 22459aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(flash_opcode); 22469aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(buf_size); 22479aebddd1SJeff Kirsher 22489aebddd1SJeff Kirsher be_mcc_notify(adapter); 22499aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22509aebddd1SJeff Kirsher 22519aebddd1SJeff Kirsher if (!wait_for_completion_timeout(&adapter->flash_compl, 2252e2edb7d5SSathya Perla msecs_to_jiffies(40000))) 22539aebddd1SJeff Kirsher status = -1; 22549aebddd1SJeff Kirsher else 22559aebddd1SJeff Kirsher status = adapter->flash_status; 22569aebddd1SJeff Kirsher 22579aebddd1SJeff Kirsher return status; 22589aebddd1SJeff Kirsher 22599aebddd1SJeff Kirsher err_unlock: 22609aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22619aebddd1SJeff Kirsher return status; 22629aebddd1SJeff Kirsher } 22639aebddd1SJeff Kirsher 22649aebddd1SJeff Kirsher int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc, 22659aebddd1SJeff Kirsher int offset) 22669aebddd1SJeff Kirsher { 22679aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 2268be716446SPadmanabh Ratnakar struct be_cmd_read_flash_crc *req; 22699aebddd1SJeff Kirsher int status; 22709aebddd1SJeff Kirsher 22719aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 22729aebddd1SJeff Kirsher 22739aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 22749aebddd1SJeff Kirsher if (!wrb) { 22759aebddd1SJeff Kirsher status = -EBUSY; 22769aebddd1SJeff Kirsher goto err; 22779aebddd1SJeff Kirsher } 22789aebddd1SJeff Kirsher req = embedded_payload(wrb); 22799aebddd1SJeff Kirsher 2280106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2281be716446SPadmanabh Ratnakar OPCODE_COMMON_READ_FLASHROM, sizeof(*req), 2282be716446SPadmanabh Ratnakar wrb, NULL); 22839aebddd1SJeff Kirsher 2284c165541eSPadmanabh Ratnakar req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT); 22859aebddd1SJeff Kirsher req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 22869aebddd1SJeff Kirsher req->params.offset = cpu_to_le32(offset); 22879aebddd1SJeff Kirsher req->params.data_buf_size = cpu_to_le32(0x4); 22889aebddd1SJeff Kirsher 22899aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 22909aebddd1SJeff Kirsher if (!status) 2291be716446SPadmanabh Ratnakar memcpy(flashed_crc, req->crc, 4); 22929aebddd1SJeff Kirsher 22939aebddd1SJeff Kirsher err: 22949aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 22959aebddd1SJeff Kirsher return status; 22969aebddd1SJeff Kirsher } 22979aebddd1SJeff Kirsher 22989aebddd1SJeff Kirsher int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 22999aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 23009aebddd1SJeff Kirsher { 23019aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23029aebddd1SJeff Kirsher struct be_cmd_req_acpi_wol_magic_config *req; 23039aebddd1SJeff Kirsher int status; 23049aebddd1SJeff Kirsher 23059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23069aebddd1SJeff Kirsher 23079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23089aebddd1SJeff Kirsher if (!wrb) { 23099aebddd1SJeff Kirsher status = -EBUSY; 23109aebddd1SJeff Kirsher goto err; 23119aebddd1SJeff Kirsher } 23129aebddd1SJeff Kirsher req = nonemb_cmd->va; 23139aebddd1SJeff Kirsher 2314106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2315106df1e3SSomnath Kotur OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2316106df1e3SSomnath Kotur nonemb_cmd); 23179aebddd1SJeff Kirsher memcpy(req->magic_mac, mac, ETH_ALEN); 23189aebddd1SJeff Kirsher 23199aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23209aebddd1SJeff Kirsher 23219aebddd1SJeff Kirsher err: 23229aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23239aebddd1SJeff Kirsher return status; 23249aebddd1SJeff Kirsher } 23259aebddd1SJeff Kirsher 23269aebddd1SJeff Kirsher int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, 23279aebddd1SJeff Kirsher u8 loopback_type, u8 enable) 23289aebddd1SJeff Kirsher { 23299aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23309aebddd1SJeff Kirsher struct be_cmd_req_set_lmode *req; 23319aebddd1SJeff Kirsher int status; 23329aebddd1SJeff Kirsher 23339aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23349aebddd1SJeff Kirsher 23359aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23369aebddd1SJeff Kirsher if (!wrb) { 23379aebddd1SJeff Kirsher status = -EBUSY; 23389aebddd1SJeff Kirsher goto err; 23399aebddd1SJeff Kirsher } 23409aebddd1SJeff Kirsher 23419aebddd1SJeff Kirsher req = embedded_payload(wrb); 23429aebddd1SJeff Kirsher 2343106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2344106df1e3SSomnath Kotur OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2345106df1e3SSomnath Kotur NULL); 23469aebddd1SJeff Kirsher 23479aebddd1SJeff Kirsher req->src_port = port_num; 23489aebddd1SJeff Kirsher req->dest_port = port_num; 23499aebddd1SJeff Kirsher req->loopback_type = loopback_type; 23509aebddd1SJeff Kirsher req->loopback_state = enable; 23519aebddd1SJeff Kirsher 23529aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23539aebddd1SJeff Kirsher err: 23549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23559aebddd1SJeff Kirsher return status; 23569aebddd1SJeff Kirsher } 23579aebddd1SJeff Kirsher 23589aebddd1SJeff Kirsher int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 23599aebddd1SJeff Kirsher u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 23609aebddd1SJeff Kirsher { 23619aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 23629aebddd1SJeff Kirsher struct be_cmd_req_loopback_test *req; 23639aebddd1SJeff Kirsher int status; 23649aebddd1SJeff Kirsher 23659aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 23669aebddd1SJeff Kirsher 23679aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 23689aebddd1SJeff Kirsher if (!wrb) { 23699aebddd1SJeff Kirsher status = -EBUSY; 23709aebddd1SJeff Kirsher goto err; 23719aebddd1SJeff Kirsher } 23729aebddd1SJeff Kirsher 23739aebddd1SJeff Kirsher req = embedded_payload(wrb); 23749aebddd1SJeff Kirsher 2375106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2376106df1e3SSomnath Kotur OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 23779aebddd1SJeff Kirsher req->hdr.timeout = cpu_to_le32(4); 23789aebddd1SJeff Kirsher 23799aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 23809aebddd1SJeff Kirsher req->src_port = cpu_to_le32(port_num); 23819aebddd1SJeff Kirsher req->dest_port = cpu_to_le32(port_num); 23829aebddd1SJeff Kirsher req->pkt_size = cpu_to_le32(pkt_size); 23839aebddd1SJeff Kirsher req->num_pkts = cpu_to_le32(num_pkts); 23849aebddd1SJeff Kirsher req->loopback_type = cpu_to_le32(loopback_type); 23859aebddd1SJeff Kirsher 23869aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 23879aebddd1SJeff Kirsher if (!status) { 23889aebddd1SJeff Kirsher struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); 23899aebddd1SJeff Kirsher status = le32_to_cpu(resp->status); 23909aebddd1SJeff Kirsher } 23919aebddd1SJeff Kirsher 23929aebddd1SJeff Kirsher err: 23939aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 23949aebddd1SJeff Kirsher return status; 23959aebddd1SJeff Kirsher } 23969aebddd1SJeff Kirsher 23979aebddd1SJeff Kirsher int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 23989aebddd1SJeff Kirsher u32 byte_cnt, struct be_dma_mem *cmd) 23999aebddd1SJeff Kirsher { 24009aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24019aebddd1SJeff Kirsher struct be_cmd_req_ddrdma_test *req; 24029aebddd1SJeff Kirsher int status; 24039aebddd1SJeff Kirsher int i, j = 0; 24049aebddd1SJeff Kirsher 24059aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24069aebddd1SJeff Kirsher 24079aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24089aebddd1SJeff Kirsher if (!wrb) { 24099aebddd1SJeff Kirsher status = -EBUSY; 24109aebddd1SJeff Kirsher goto err; 24119aebddd1SJeff Kirsher } 24129aebddd1SJeff Kirsher req = cmd->va; 2413106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2414106df1e3SSomnath Kotur OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 24159aebddd1SJeff Kirsher 24169aebddd1SJeff Kirsher req->pattern = cpu_to_le64(pattern); 24179aebddd1SJeff Kirsher req->byte_count = cpu_to_le32(byte_cnt); 24189aebddd1SJeff Kirsher for (i = 0; i < byte_cnt; i++) { 24199aebddd1SJeff Kirsher req->snd_buff[i] = (u8)(pattern >> (j*8)); 24209aebddd1SJeff Kirsher j++; 24219aebddd1SJeff Kirsher if (j > 7) 24229aebddd1SJeff Kirsher j = 0; 24239aebddd1SJeff Kirsher } 24249aebddd1SJeff Kirsher 24259aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24269aebddd1SJeff Kirsher 24279aebddd1SJeff Kirsher if (!status) { 24289aebddd1SJeff Kirsher struct be_cmd_resp_ddrdma_test *resp; 24299aebddd1SJeff Kirsher resp = cmd->va; 24309aebddd1SJeff Kirsher if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || 24319aebddd1SJeff Kirsher resp->snd_err) { 24329aebddd1SJeff Kirsher status = -1; 24339aebddd1SJeff Kirsher } 24349aebddd1SJeff Kirsher } 24359aebddd1SJeff Kirsher 24369aebddd1SJeff Kirsher err: 24379aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24389aebddd1SJeff Kirsher return status; 24399aebddd1SJeff Kirsher } 24409aebddd1SJeff Kirsher 24419aebddd1SJeff Kirsher int be_cmd_get_seeprom_data(struct be_adapter *adapter, 24429aebddd1SJeff Kirsher struct be_dma_mem *nonemb_cmd) 24439aebddd1SJeff Kirsher { 24449aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24459aebddd1SJeff Kirsher struct be_cmd_req_seeprom_read *req; 24469aebddd1SJeff Kirsher int status; 24479aebddd1SJeff Kirsher 24489aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24499aebddd1SJeff Kirsher 24509aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24519aebddd1SJeff Kirsher if (!wrb) { 24529aebddd1SJeff Kirsher status = -EBUSY; 24539aebddd1SJeff Kirsher goto err; 24549aebddd1SJeff Kirsher } 24559aebddd1SJeff Kirsher req = nonemb_cmd->va; 24569aebddd1SJeff Kirsher 2457106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2458106df1e3SSomnath Kotur OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2459106df1e3SSomnath Kotur nonemb_cmd); 24609aebddd1SJeff Kirsher 24619aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 24629aebddd1SJeff Kirsher 24639aebddd1SJeff Kirsher err: 24649aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 24659aebddd1SJeff Kirsher return status; 24669aebddd1SJeff Kirsher } 24679aebddd1SJeff Kirsher 246842f11cf2SAjit Khaparde int be_cmd_get_phy_info(struct be_adapter *adapter) 24699aebddd1SJeff Kirsher { 24709aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 24719aebddd1SJeff Kirsher struct be_cmd_req_get_phy_info *req; 24729aebddd1SJeff Kirsher struct be_dma_mem cmd; 24739aebddd1SJeff Kirsher int status; 24749aebddd1SJeff Kirsher 2475f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS, 2476f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_COMMON)) 2477f25b119cSPadmanabh Ratnakar return -EPERM; 2478f25b119cSPadmanabh Ratnakar 24799aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 24809aebddd1SJeff Kirsher 24819aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 24829aebddd1SJeff Kirsher if (!wrb) { 24839aebddd1SJeff Kirsher status = -EBUSY; 24849aebddd1SJeff Kirsher goto err; 24859aebddd1SJeff Kirsher } 24869aebddd1SJeff Kirsher cmd.size = sizeof(struct be_cmd_req_get_phy_info); 24879aebddd1SJeff Kirsher cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 24889aebddd1SJeff Kirsher &cmd.dma); 24899aebddd1SJeff Kirsher if (!cmd.va) { 24909aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 24919aebddd1SJeff Kirsher status = -ENOMEM; 24929aebddd1SJeff Kirsher goto err; 24939aebddd1SJeff Kirsher } 24949aebddd1SJeff Kirsher 24959aebddd1SJeff Kirsher req = cmd.va; 24969aebddd1SJeff Kirsher 2497106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2498106df1e3SSomnath Kotur OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2499106df1e3SSomnath Kotur wrb, &cmd); 25009aebddd1SJeff Kirsher 25019aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25029aebddd1SJeff Kirsher if (!status) { 25039aebddd1SJeff Kirsher struct be_phy_info *resp_phy_info = 25049aebddd1SJeff Kirsher cmd.va + sizeof(struct be_cmd_req_hdr); 250542f11cf2SAjit Khaparde adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type); 250642f11cf2SAjit Khaparde adapter->phy.interface_type = 25079aebddd1SJeff Kirsher le16_to_cpu(resp_phy_info->interface_type); 250842f11cf2SAjit Khaparde adapter->phy.auto_speeds_supported = 250942f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->auto_speeds_supported); 251042f11cf2SAjit Khaparde adapter->phy.fixed_speeds_supported = 251142f11cf2SAjit Khaparde le16_to_cpu(resp_phy_info->fixed_speeds_supported); 251242f11cf2SAjit Khaparde adapter->phy.misc_params = 251342f11cf2SAjit Khaparde le32_to_cpu(resp_phy_info->misc_params); 251468cb7e47SVasundhara Volam 251568cb7e47SVasundhara Volam if (BE2_chip(adapter)) { 251668cb7e47SVasundhara Volam adapter->phy.fixed_speeds_supported = 251768cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_10GBPS | 251868cb7e47SVasundhara Volam BE_SUPPORTED_SPEED_1GBPS; 251968cb7e47SVasundhara Volam } 25209aebddd1SJeff Kirsher } 25219aebddd1SJeff Kirsher pci_free_consistent(adapter->pdev, cmd.size, 25229aebddd1SJeff Kirsher cmd.va, cmd.dma); 25239aebddd1SJeff Kirsher err: 25249aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25259aebddd1SJeff Kirsher return status; 25269aebddd1SJeff Kirsher } 25279aebddd1SJeff Kirsher 25289aebddd1SJeff Kirsher int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain) 25299aebddd1SJeff Kirsher { 25309aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25319aebddd1SJeff Kirsher struct be_cmd_req_set_qos *req; 25329aebddd1SJeff Kirsher int status; 25339aebddd1SJeff Kirsher 25349aebddd1SJeff Kirsher spin_lock_bh(&adapter->mcc_lock); 25359aebddd1SJeff Kirsher 25369aebddd1SJeff Kirsher wrb = wrb_from_mccq(adapter); 25379aebddd1SJeff Kirsher if (!wrb) { 25389aebddd1SJeff Kirsher status = -EBUSY; 25399aebddd1SJeff Kirsher goto err; 25409aebddd1SJeff Kirsher } 25419aebddd1SJeff Kirsher 25429aebddd1SJeff Kirsher req = embedded_payload(wrb); 25439aebddd1SJeff Kirsher 2544106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2545106df1e3SSomnath Kotur OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 25469aebddd1SJeff Kirsher 25479aebddd1SJeff Kirsher req->hdr.domain = domain; 25489aebddd1SJeff Kirsher req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 25499aebddd1SJeff Kirsher req->max_bps_nic = cpu_to_le32(bps); 25509aebddd1SJeff Kirsher 25519aebddd1SJeff Kirsher status = be_mcc_notify_wait(adapter); 25529aebddd1SJeff Kirsher 25539aebddd1SJeff Kirsher err: 25549aebddd1SJeff Kirsher spin_unlock_bh(&adapter->mcc_lock); 25559aebddd1SJeff Kirsher return status; 25569aebddd1SJeff Kirsher } 25579aebddd1SJeff Kirsher 25589aebddd1SJeff Kirsher int be_cmd_get_cntl_attributes(struct be_adapter *adapter) 25599aebddd1SJeff Kirsher { 25609aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 25619aebddd1SJeff Kirsher struct be_cmd_req_cntl_attribs *req; 25629aebddd1SJeff Kirsher struct be_cmd_resp_cntl_attribs *resp; 25639aebddd1SJeff Kirsher int status; 25649aebddd1SJeff Kirsher int payload_len = max(sizeof(*req), sizeof(*resp)); 25659aebddd1SJeff Kirsher struct mgmt_controller_attrib *attribs; 25669aebddd1SJeff Kirsher struct be_dma_mem attribs_cmd; 25679aebddd1SJeff Kirsher 2568d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 2569d98ef50fSSuresh Reddy return -1; 2570d98ef50fSSuresh Reddy 25719aebddd1SJeff Kirsher memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 25729aebddd1SJeff Kirsher attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 25739aebddd1SJeff Kirsher attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 25749aebddd1SJeff Kirsher &attribs_cmd.dma); 25759aebddd1SJeff Kirsher if (!attribs_cmd.va) { 25769aebddd1SJeff Kirsher dev_err(&adapter->pdev->dev, 25779aebddd1SJeff Kirsher "Memory allocation failure\n"); 2578d98ef50fSSuresh Reddy status = -ENOMEM; 2579d98ef50fSSuresh Reddy goto err; 25809aebddd1SJeff Kirsher } 25819aebddd1SJeff Kirsher 25829aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 25839aebddd1SJeff Kirsher if (!wrb) { 25849aebddd1SJeff Kirsher status = -EBUSY; 25859aebddd1SJeff Kirsher goto err; 25869aebddd1SJeff Kirsher } 25879aebddd1SJeff Kirsher req = attribs_cmd.va; 25889aebddd1SJeff Kirsher 2589106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2590106df1e3SSomnath Kotur OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2591106df1e3SSomnath Kotur &attribs_cmd); 25929aebddd1SJeff Kirsher 25939aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 25949aebddd1SJeff Kirsher if (!status) { 25959aebddd1SJeff Kirsher attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); 25969aebddd1SJeff Kirsher adapter->hba_port_num = attribs->hba_attribs.phy_port; 25979aebddd1SJeff Kirsher } 25989aebddd1SJeff Kirsher 25999aebddd1SJeff Kirsher err: 26009aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 2601d98ef50fSSuresh Reddy if (attribs_cmd.va) 2602d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, attribs_cmd.size, 2603d98ef50fSSuresh Reddy attribs_cmd.va, attribs_cmd.dma); 26049aebddd1SJeff Kirsher return status; 26059aebddd1SJeff Kirsher } 26069aebddd1SJeff Kirsher 26079aebddd1SJeff Kirsher /* Uses mbox */ 26089aebddd1SJeff Kirsher int be_cmd_req_native_mode(struct be_adapter *adapter) 26099aebddd1SJeff Kirsher { 26109aebddd1SJeff Kirsher struct be_mcc_wrb *wrb; 26119aebddd1SJeff Kirsher struct be_cmd_req_set_func_cap *req; 26129aebddd1SJeff Kirsher int status; 26139aebddd1SJeff Kirsher 26149aebddd1SJeff Kirsher if (mutex_lock_interruptible(&adapter->mbox_lock)) 26159aebddd1SJeff Kirsher return -1; 26169aebddd1SJeff Kirsher 26179aebddd1SJeff Kirsher wrb = wrb_from_mbox(adapter); 26189aebddd1SJeff Kirsher if (!wrb) { 26199aebddd1SJeff Kirsher status = -EBUSY; 26209aebddd1SJeff Kirsher goto err; 26219aebddd1SJeff Kirsher } 26229aebddd1SJeff Kirsher 26239aebddd1SJeff Kirsher req = embedded_payload(wrb); 26249aebddd1SJeff Kirsher 2625106df1e3SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2626106df1e3SSomnath Kotur OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 26279aebddd1SJeff Kirsher 26289aebddd1SJeff Kirsher req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 26299aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API); 26309aebddd1SJeff Kirsher req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API); 26319aebddd1SJeff Kirsher 26329aebddd1SJeff Kirsher status = be_mbox_notify_wait(adapter); 26339aebddd1SJeff Kirsher if (!status) { 26349aebddd1SJeff Kirsher struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb); 26359aebddd1SJeff Kirsher adapter->be3_native = le32_to_cpu(resp->cap_flags) & 26369aebddd1SJeff Kirsher CAPABILITY_BE3_NATIVE_ERX_API; 2637d379142bSSathya Perla if (!adapter->be3_native) 2638d379142bSSathya Perla dev_warn(&adapter->pdev->dev, 2639d379142bSSathya Perla "adapter not in advanced mode\n"); 26409aebddd1SJeff Kirsher } 26419aebddd1SJeff Kirsher err: 26429aebddd1SJeff Kirsher mutex_unlock(&adapter->mbox_lock); 26439aebddd1SJeff Kirsher return status; 26449aebddd1SJeff Kirsher } 2645590c391dSPadmanabh Ratnakar 2646f25b119cSPadmanabh Ratnakar /* Get privilege(s) for a function */ 2647f25b119cSPadmanabh Ratnakar int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege, 2648f25b119cSPadmanabh Ratnakar u32 domain) 2649f25b119cSPadmanabh Ratnakar { 2650f25b119cSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2651f25b119cSPadmanabh Ratnakar struct be_cmd_req_get_fn_privileges *req; 2652f25b119cSPadmanabh Ratnakar int status; 2653f25b119cSPadmanabh Ratnakar 2654f25b119cSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2655f25b119cSPadmanabh Ratnakar 2656f25b119cSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2657f25b119cSPadmanabh Ratnakar if (!wrb) { 2658f25b119cSPadmanabh Ratnakar status = -EBUSY; 2659f25b119cSPadmanabh Ratnakar goto err; 2660f25b119cSPadmanabh Ratnakar } 2661f25b119cSPadmanabh Ratnakar 2662f25b119cSPadmanabh Ratnakar req = embedded_payload(wrb); 2663f25b119cSPadmanabh Ratnakar 2664f25b119cSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2665f25b119cSPadmanabh Ratnakar OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req), 2666f25b119cSPadmanabh Ratnakar wrb, NULL); 2667f25b119cSPadmanabh Ratnakar 2668f25b119cSPadmanabh Ratnakar req->hdr.domain = domain; 2669f25b119cSPadmanabh Ratnakar 2670f25b119cSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2671f25b119cSPadmanabh Ratnakar if (!status) { 2672f25b119cSPadmanabh Ratnakar struct be_cmd_resp_get_fn_privileges *resp = 2673f25b119cSPadmanabh Ratnakar embedded_payload(wrb); 2674f25b119cSPadmanabh Ratnakar *privilege = le32_to_cpu(resp->privilege_mask); 2675f25b119cSPadmanabh Ratnakar } 2676f25b119cSPadmanabh Ratnakar 2677f25b119cSPadmanabh Ratnakar err: 2678f25b119cSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2679f25b119cSPadmanabh Ratnakar return status; 2680f25b119cSPadmanabh Ratnakar } 2681f25b119cSPadmanabh Ratnakar 268204a06028SSathya Perla /* Set privilege(s) for a function */ 268304a06028SSathya Perla int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges, 268404a06028SSathya Perla u32 domain) 268504a06028SSathya Perla { 268604a06028SSathya Perla struct be_mcc_wrb *wrb; 268704a06028SSathya Perla struct be_cmd_req_set_fn_privileges *req; 268804a06028SSathya Perla int status; 268904a06028SSathya Perla 269004a06028SSathya Perla spin_lock_bh(&adapter->mcc_lock); 269104a06028SSathya Perla 269204a06028SSathya Perla wrb = wrb_from_mccq(adapter); 269304a06028SSathya Perla if (!wrb) { 269404a06028SSathya Perla status = -EBUSY; 269504a06028SSathya Perla goto err; 269604a06028SSathya Perla } 269704a06028SSathya Perla 269804a06028SSathya Perla req = embedded_payload(wrb); 269904a06028SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 270004a06028SSathya Perla OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req), 270104a06028SSathya Perla wrb, NULL); 270204a06028SSathya Perla req->hdr.domain = domain; 270304a06028SSathya Perla if (lancer_chip(adapter)) 270404a06028SSathya Perla req->privileges_lancer = cpu_to_le32(privileges); 270504a06028SSathya Perla else 270604a06028SSathya Perla req->privileges = cpu_to_le32(privileges); 270704a06028SSathya Perla 270804a06028SSathya Perla status = be_mcc_notify_wait(adapter); 270904a06028SSathya Perla err: 271004a06028SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 271104a06028SSathya Perla return status; 271204a06028SSathya Perla } 271304a06028SSathya Perla 27145a712c13SSathya Perla /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested. 27155a712c13SSathya Perla * pmac_id_valid: false => pmac_id or MAC address is requested. 27165a712c13SSathya Perla * If pmac_id is returned, pmac_id_valid is returned as true 27175a712c13SSathya Perla */ 27181578e777SPadmanabh Ratnakar int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac, 27195a712c13SSathya Perla bool *pmac_id_valid, u32 *pmac_id, u8 domain) 2720590c391dSPadmanabh Ratnakar { 2721590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2722590c391dSPadmanabh Ratnakar struct be_cmd_req_get_mac_list *req; 2723590c391dSPadmanabh Ratnakar int status; 2724590c391dSPadmanabh Ratnakar int mac_count; 2725e5e1ee89SPadmanabh Ratnakar struct be_dma_mem get_mac_list_cmd; 2726e5e1ee89SPadmanabh Ratnakar int i; 2727e5e1ee89SPadmanabh Ratnakar 2728e5e1ee89SPadmanabh Ratnakar memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2729e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2730e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2731e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.size, 2732e5e1ee89SPadmanabh Ratnakar &get_mac_list_cmd.dma); 2733e5e1ee89SPadmanabh Ratnakar 2734e5e1ee89SPadmanabh Ratnakar if (!get_mac_list_cmd.va) { 2735e5e1ee89SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, 2736e5e1ee89SPadmanabh Ratnakar "Memory allocation failure during GET_MAC_LIST\n"); 2737e5e1ee89SPadmanabh Ratnakar return -ENOMEM; 2738e5e1ee89SPadmanabh Ratnakar } 2739590c391dSPadmanabh Ratnakar 2740590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2741590c391dSPadmanabh Ratnakar 2742590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2743590c391dSPadmanabh Ratnakar if (!wrb) { 2744590c391dSPadmanabh Ratnakar status = -EBUSY; 2745e5e1ee89SPadmanabh Ratnakar goto out; 2746590c391dSPadmanabh Ratnakar } 2747e5e1ee89SPadmanabh Ratnakar 2748e5e1ee89SPadmanabh Ratnakar req = get_mac_list_cmd.va; 2749590c391dSPadmanabh Ratnakar 2750590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2751bf591f51SSathya Perla OPCODE_COMMON_GET_MAC_LIST, 2752bf591f51SSathya Perla get_mac_list_cmd.size, wrb, &get_mac_list_cmd); 2753590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2754e5e1ee89SPadmanabh Ratnakar req->mac_type = MAC_ADDRESS_TYPE_NETWORK; 27555a712c13SSathya Perla if (*pmac_id_valid) { 27565a712c13SSathya Perla req->mac_id = cpu_to_le32(*pmac_id); 27575a712c13SSathya Perla req->iface_id = cpu_to_le16(adapter->if_handle); 27585a712c13SSathya Perla req->perm_override = 0; 27595a712c13SSathya Perla } else { 2760e5e1ee89SPadmanabh Ratnakar req->perm_override = 1; 27615a712c13SSathya Perla } 2762590c391dSPadmanabh Ratnakar 2763590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2764590c391dSPadmanabh Ratnakar if (!status) { 2765590c391dSPadmanabh Ratnakar struct be_cmd_resp_get_mac_list *resp = 2766e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va; 27675a712c13SSathya Perla 27685a712c13SSathya Perla if (*pmac_id_valid) { 27695a712c13SSathya Perla memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr, 27705a712c13SSathya Perla ETH_ALEN); 27715a712c13SSathya Perla goto out; 27725a712c13SSathya Perla } 27735a712c13SSathya Perla 2774e5e1ee89SPadmanabh Ratnakar mac_count = resp->true_mac_count + resp->pseudo_mac_count; 2775e5e1ee89SPadmanabh Ratnakar /* Mac list returned could contain one or more active mac_ids 27761578e777SPadmanabh Ratnakar * or one or more true or pseudo permanant mac addresses. 27771578e777SPadmanabh Ratnakar * If an active mac_id is present, return first active mac_id 27781578e777SPadmanabh Ratnakar * found. 2779e5e1ee89SPadmanabh Ratnakar */ 2780590c391dSPadmanabh Ratnakar for (i = 0; i < mac_count; i++) { 2781e5e1ee89SPadmanabh Ratnakar struct get_list_macaddr *mac_entry; 2782e5e1ee89SPadmanabh Ratnakar u16 mac_addr_size; 2783e5e1ee89SPadmanabh Ratnakar u32 mac_id; 2784e5e1ee89SPadmanabh Ratnakar 2785e5e1ee89SPadmanabh Ratnakar mac_entry = &resp->macaddr_list[i]; 2786e5e1ee89SPadmanabh Ratnakar mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size); 2787e5e1ee89SPadmanabh Ratnakar /* mac_id is a 32 bit value and mac_addr size 2788e5e1ee89SPadmanabh Ratnakar * is 6 bytes 2789e5e1ee89SPadmanabh Ratnakar */ 2790e5e1ee89SPadmanabh Ratnakar if (mac_addr_size == sizeof(u32)) { 27915a712c13SSathya Perla *pmac_id_valid = true; 2792e5e1ee89SPadmanabh Ratnakar mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id; 2793e5e1ee89SPadmanabh Ratnakar *pmac_id = le32_to_cpu(mac_id); 2794e5e1ee89SPadmanabh Ratnakar goto out; 2795590c391dSPadmanabh Ratnakar } 2796590c391dSPadmanabh Ratnakar } 27971578e777SPadmanabh Ratnakar /* If no active mac_id found, return first mac addr */ 27985a712c13SSathya Perla *pmac_id_valid = false; 2799e5e1ee89SPadmanabh Ratnakar memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2800e5e1ee89SPadmanabh Ratnakar ETH_ALEN); 2801590c391dSPadmanabh Ratnakar } 2802590c391dSPadmanabh Ratnakar 2803e5e1ee89SPadmanabh Ratnakar out: 2804590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2805e5e1ee89SPadmanabh Ratnakar pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2806e5e1ee89SPadmanabh Ratnakar get_mac_list_cmd.va, get_mac_list_cmd.dma); 2807590c391dSPadmanabh Ratnakar return status; 2808590c391dSPadmanabh Ratnakar } 2809590c391dSPadmanabh Ratnakar 28105a712c13SSathya Perla int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac) 28115a712c13SSathya Perla { 28125a712c13SSathya Perla bool active = true; 28135a712c13SSathya Perla 28143175d8c2SSathya Perla if (BEx_chip(adapter)) 28155a712c13SSathya Perla return be_cmd_mac_addr_query(adapter, mac, false, 28165a712c13SSathya Perla adapter->if_handle, curr_pmac_id); 28173175d8c2SSathya Perla else 28183175d8c2SSathya Perla /* Fetch the MAC address using pmac_id */ 28193175d8c2SSathya Perla return be_cmd_get_mac_from_list(adapter, mac, &active, 28203175d8c2SSathya Perla &curr_pmac_id, 0); 28215a712c13SSathya Perla } 28225a712c13SSathya Perla 282395046b92SSathya Perla int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac) 282495046b92SSathya Perla { 282595046b92SSathya Perla int status; 282695046b92SSathya Perla bool pmac_valid = false; 282795046b92SSathya Perla 282895046b92SSathya Perla memset(mac, 0, ETH_ALEN); 282995046b92SSathya Perla 28303175d8c2SSathya Perla if (BEx_chip(adapter)) { 28313175d8c2SSathya Perla if (be_physfn(adapter)) 28323175d8c2SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, true, 0, 28333175d8c2SSathya Perla 0); 283495046b92SSathya Perla else 283595046b92SSathya Perla status = be_cmd_mac_addr_query(adapter, mac, false, 283695046b92SSathya Perla adapter->if_handle, 0); 28373175d8c2SSathya Perla } else { 28383175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid, 28393175d8c2SSathya Perla NULL, 0); 28403175d8c2SSathya Perla } 28413175d8c2SSathya Perla 284295046b92SSathya Perla return status; 284395046b92SSathya Perla } 284495046b92SSathya Perla 2845590c391dSPadmanabh Ratnakar /* Uses synchronous MCCQ */ 2846590c391dSPadmanabh Ratnakar int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, 2847590c391dSPadmanabh Ratnakar u8 mac_count, u32 domain) 2848590c391dSPadmanabh Ratnakar { 2849590c391dSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 2850590c391dSPadmanabh Ratnakar struct be_cmd_req_set_mac_list *req; 2851590c391dSPadmanabh Ratnakar int status; 2852590c391dSPadmanabh Ratnakar struct be_dma_mem cmd; 2853590c391dSPadmanabh Ratnakar 2854590c391dSPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 2855590c391dSPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2856590c391dSPadmanabh Ratnakar cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2857590c391dSPadmanabh Ratnakar &cmd.dma, GFP_KERNEL); 2858d0320f75SJoe Perches if (!cmd.va) 2859590c391dSPadmanabh Ratnakar return -ENOMEM; 2860590c391dSPadmanabh Ratnakar 2861590c391dSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 2862590c391dSPadmanabh Ratnakar 2863590c391dSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 2864590c391dSPadmanabh Ratnakar if (!wrb) { 2865590c391dSPadmanabh Ratnakar status = -EBUSY; 2866590c391dSPadmanabh Ratnakar goto err; 2867590c391dSPadmanabh Ratnakar } 2868590c391dSPadmanabh Ratnakar 2869590c391dSPadmanabh Ratnakar req = cmd.va; 2870590c391dSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2871590c391dSPadmanabh Ratnakar OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2872590c391dSPadmanabh Ratnakar wrb, &cmd); 2873590c391dSPadmanabh Ratnakar 2874590c391dSPadmanabh Ratnakar req->hdr.domain = domain; 2875590c391dSPadmanabh Ratnakar req->mac_count = mac_count; 2876590c391dSPadmanabh Ratnakar if (mac_count) 2877590c391dSPadmanabh Ratnakar memcpy(req->mac, mac_array, ETH_ALEN*mac_count); 2878590c391dSPadmanabh Ratnakar 2879590c391dSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 2880590c391dSPadmanabh Ratnakar 2881590c391dSPadmanabh Ratnakar err: 2882590c391dSPadmanabh Ratnakar dma_free_coherent(&adapter->pdev->dev, cmd.size, 2883590c391dSPadmanabh Ratnakar cmd.va, cmd.dma); 2884590c391dSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 2885590c391dSPadmanabh Ratnakar return status; 2886590c391dSPadmanabh Ratnakar } 28874762f6ceSAjit Khaparde 28883175d8c2SSathya Perla /* Wrapper to delete any active MACs and provision the new mac. 28893175d8c2SSathya Perla * Changes to MAC_LIST are allowed iff none of the MAC addresses in the 28903175d8c2SSathya Perla * current list are active. 28913175d8c2SSathya Perla */ 28923175d8c2SSathya Perla int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom) 28933175d8c2SSathya Perla { 28943175d8c2SSathya Perla bool active_mac = false; 28953175d8c2SSathya Perla u8 old_mac[ETH_ALEN]; 28963175d8c2SSathya Perla u32 pmac_id; 28973175d8c2SSathya Perla int status; 28983175d8c2SSathya Perla 28993175d8c2SSathya Perla status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac, 29003175d8c2SSathya Perla &pmac_id, dom); 29013175d8c2SSathya Perla if (!status && active_mac) 29023175d8c2SSathya Perla be_cmd_pmac_del(adapter, if_id, pmac_id, dom); 29033175d8c2SSathya Perla 29043175d8c2SSathya Perla return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom); 29053175d8c2SSathya Perla } 29063175d8c2SSathya Perla 2907f1f3ee1bSAjit Khaparde int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, 2908a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u16 hsw_mode) 2909f1f3ee1bSAjit Khaparde { 2910f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2911f1f3ee1bSAjit Khaparde struct be_cmd_req_set_hsw_config *req; 2912f1f3ee1bSAjit Khaparde void *ctxt; 2913f1f3ee1bSAjit Khaparde int status; 2914f1f3ee1bSAjit Khaparde 2915f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2916f1f3ee1bSAjit Khaparde 2917f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2918f1f3ee1bSAjit Khaparde if (!wrb) { 2919f1f3ee1bSAjit Khaparde status = -EBUSY; 2920f1f3ee1bSAjit Khaparde goto err; 2921f1f3ee1bSAjit Khaparde } 2922f1f3ee1bSAjit Khaparde 2923f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2924f1f3ee1bSAjit Khaparde ctxt = &req->context; 2925f1f3ee1bSAjit Khaparde 2926f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2927f1f3ee1bSAjit Khaparde OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2928f1f3ee1bSAjit Khaparde 2929f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2930f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2931f1f3ee1bSAjit Khaparde if (pvid) { 2932f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1); 2933f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid); 2934f1f3ee1bSAjit Khaparde } 2935a77dcb8cSAjit Khaparde if (!BEx_chip(adapter) && hsw_mode) { 2936a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, 2937a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2938a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1); 2939a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type, 2940a77dcb8cSAjit Khaparde ctxt, hsw_mode); 2941a77dcb8cSAjit Khaparde } 2942f1f3ee1bSAjit Khaparde 2943f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2944f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2945f1f3ee1bSAjit Khaparde 2946f1f3ee1bSAjit Khaparde err: 2947f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 2948f1f3ee1bSAjit Khaparde return status; 2949f1f3ee1bSAjit Khaparde } 2950f1f3ee1bSAjit Khaparde 2951f1f3ee1bSAjit Khaparde /* Get Hyper switch config */ 2952f1f3ee1bSAjit Khaparde int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, 2953a77dcb8cSAjit Khaparde u32 domain, u16 intf_id, u8 *mode) 2954f1f3ee1bSAjit Khaparde { 2955f1f3ee1bSAjit Khaparde struct be_mcc_wrb *wrb; 2956f1f3ee1bSAjit Khaparde struct be_cmd_req_get_hsw_config *req; 2957f1f3ee1bSAjit Khaparde void *ctxt; 2958f1f3ee1bSAjit Khaparde int status; 2959f1f3ee1bSAjit Khaparde u16 vid; 2960f1f3ee1bSAjit Khaparde 2961f1f3ee1bSAjit Khaparde spin_lock_bh(&adapter->mcc_lock); 2962f1f3ee1bSAjit Khaparde 2963f1f3ee1bSAjit Khaparde wrb = wrb_from_mccq(adapter); 2964f1f3ee1bSAjit Khaparde if (!wrb) { 2965f1f3ee1bSAjit Khaparde status = -EBUSY; 2966f1f3ee1bSAjit Khaparde goto err; 2967f1f3ee1bSAjit Khaparde } 2968f1f3ee1bSAjit Khaparde 2969f1f3ee1bSAjit Khaparde req = embedded_payload(wrb); 2970f1f3ee1bSAjit Khaparde ctxt = &req->context; 2971f1f3ee1bSAjit Khaparde 2972f1f3ee1bSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2973f1f3ee1bSAjit Khaparde OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2974f1f3ee1bSAjit Khaparde 2975f1f3ee1bSAjit Khaparde req->hdr.domain = domain; 2976a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 2977a77dcb8cSAjit Khaparde ctxt, intf_id); 2978f1f3ee1bSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1); 2979a77dcb8cSAjit Khaparde 2980a77dcb8cSAjit Khaparde if (!BEx_chip(adapter)) { 2981a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 2982a77dcb8cSAjit Khaparde ctxt, adapter->hba_port_num); 2983a77dcb8cSAjit Khaparde AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1); 2984a77dcb8cSAjit Khaparde } 2985f1f3ee1bSAjit Khaparde be_dws_cpu_to_le(req->context, sizeof(req->context)); 2986f1f3ee1bSAjit Khaparde 2987f1f3ee1bSAjit Khaparde status = be_mcc_notify_wait(adapter); 2988f1f3ee1bSAjit Khaparde if (!status) { 2989f1f3ee1bSAjit Khaparde struct be_cmd_resp_get_hsw_config *resp = 2990f1f3ee1bSAjit Khaparde embedded_payload(wrb); 2991f1f3ee1bSAjit Khaparde be_dws_le_to_cpu(&resp->context, 2992f1f3ee1bSAjit Khaparde sizeof(resp->context)); 2993f1f3ee1bSAjit Khaparde vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2994f1f3ee1bSAjit Khaparde pvid, &resp->context); 2995a77dcb8cSAjit Khaparde if (pvid) 2996f1f3ee1bSAjit Khaparde *pvid = le16_to_cpu(vid); 2997a77dcb8cSAjit Khaparde if (mode) 2998a77dcb8cSAjit Khaparde *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 2999a77dcb8cSAjit Khaparde port_fwd_type, &resp->context); 3000f1f3ee1bSAjit Khaparde } 3001f1f3ee1bSAjit Khaparde 3002f1f3ee1bSAjit Khaparde err: 3003f1f3ee1bSAjit Khaparde spin_unlock_bh(&adapter->mcc_lock); 3004f1f3ee1bSAjit Khaparde return status; 3005f1f3ee1bSAjit Khaparde } 3006f1f3ee1bSAjit Khaparde 30074762f6ceSAjit Khaparde int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter) 30084762f6ceSAjit Khaparde { 30094762f6ceSAjit Khaparde struct be_mcc_wrb *wrb; 30104762f6ceSAjit Khaparde struct be_cmd_req_acpi_wol_magic_config_v1 *req; 30114762f6ceSAjit Khaparde int status; 30124762f6ceSAjit Khaparde int payload_len = sizeof(*req); 30134762f6ceSAjit Khaparde struct be_dma_mem cmd; 30144762f6ceSAjit Khaparde 3015f25b119cSPadmanabh Ratnakar if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 3016f25b119cSPadmanabh Ratnakar CMD_SUBSYSTEM_ETH)) 3017f25b119cSPadmanabh Ratnakar return -EPERM; 3018f25b119cSPadmanabh Ratnakar 3019d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3020d98ef50fSSuresh Reddy return -1; 3021d98ef50fSSuresh Reddy 30224762f6ceSAjit Khaparde memset(&cmd, 0, sizeof(struct be_dma_mem)); 30234762f6ceSAjit Khaparde cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 30244762f6ceSAjit Khaparde cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 30254762f6ceSAjit Khaparde &cmd.dma); 30264762f6ceSAjit Khaparde if (!cmd.va) { 30274762f6ceSAjit Khaparde dev_err(&adapter->pdev->dev, 30284762f6ceSAjit Khaparde "Memory allocation failure\n"); 3029d98ef50fSSuresh Reddy status = -ENOMEM; 3030d98ef50fSSuresh Reddy goto err; 30314762f6ceSAjit Khaparde } 30324762f6ceSAjit Khaparde 30334762f6ceSAjit Khaparde wrb = wrb_from_mbox(adapter); 30344762f6ceSAjit Khaparde if (!wrb) { 30354762f6ceSAjit Khaparde status = -EBUSY; 30364762f6ceSAjit Khaparde goto err; 30374762f6ceSAjit Khaparde } 30384762f6ceSAjit Khaparde 30394762f6ceSAjit Khaparde req = cmd.va; 30404762f6ceSAjit Khaparde 30414762f6ceSAjit Khaparde be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 30424762f6ceSAjit Khaparde OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, 30434762f6ceSAjit Khaparde payload_len, wrb, &cmd); 30444762f6ceSAjit Khaparde 30454762f6ceSAjit Khaparde req->hdr.version = 1; 30464762f6ceSAjit Khaparde req->query_options = BE_GET_WOL_CAP; 30474762f6ceSAjit Khaparde 30484762f6ceSAjit Khaparde status = be_mbox_notify_wait(adapter); 30494762f6ceSAjit Khaparde if (!status) { 30504762f6ceSAjit Khaparde struct be_cmd_resp_acpi_wol_magic_config_v1 *resp; 30514762f6ceSAjit Khaparde resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va; 30524762f6ceSAjit Khaparde 30534762f6ceSAjit Khaparde /* the command could succeed misleadingly on old f/w 30544762f6ceSAjit Khaparde * which is not aware of the V1 version. fake an error. */ 30554762f6ceSAjit Khaparde if (resp->hdr.response_length < payload_len) { 30564762f6ceSAjit Khaparde status = -1; 30574762f6ceSAjit Khaparde goto err; 30584762f6ceSAjit Khaparde } 30594762f6ceSAjit Khaparde adapter->wol_cap = resp->wol_settings; 30604762f6ceSAjit Khaparde } 30614762f6ceSAjit Khaparde err: 30624762f6ceSAjit Khaparde mutex_unlock(&adapter->mbox_lock); 3063d98ef50fSSuresh Reddy if (cmd.va) 30644762f6ceSAjit Khaparde pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 30654762f6ceSAjit Khaparde return status; 3066941a77d5SSomnath Kotur 3067941a77d5SSomnath Kotur } 3068941a77d5SSomnath Kotur int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter, 3069941a77d5SSomnath Kotur struct be_dma_mem *cmd) 3070941a77d5SSomnath Kotur { 3071941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3072941a77d5SSomnath Kotur struct be_cmd_req_get_ext_fat_caps *req; 3073941a77d5SSomnath Kotur int status; 3074941a77d5SSomnath Kotur 3075941a77d5SSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 3076941a77d5SSomnath Kotur return -1; 3077941a77d5SSomnath Kotur 3078941a77d5SSomnath Kotur wrb = wrb_from_mbox(adapter); 3079941a77d5SSomnath Kotur if (!wrb) { 3080941a77d5SSomnath Kotur status = -EBUSY; 3081941a77d5SSomnath Kotur goto err; 3082941a77d5SSomnath Kotur } 3083941a77d5SSomnath Kotur 3084941a77d5SSomnath Kotur req = cmd->va; 3085941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3086941a77d5SSomnath Kotur OPCODE_COMMON_GET_EXT_FAT_CAPABILITES, 3087941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3088941a77d5SSomnath Kotur req->parameter_type = cpu_to_le32(1); 3089941a77d5SSomnath Kotur 3090941a77d5SSomnath Kotur status = be_mbox_notify_wait(adapter); 3091941a77d5SSomnath Kotur err: 3092941a77d5SSomnath Kotur mutex_unlock(&adapter->mbox_lock); 3093941a77d5SSomnath Kotur return status; 3094941a77d5SSomnath Kotur } 3095941a77d5SSomnath Kotur 3096941a77d5SSomnath Kotur int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, 3097941a77d5SSomnath Kotur struct be_dma_mem *cmd, 3098941a77d5SSomnath Kotur struct be_fat_conf_params *configs) 3099941a77d5SSomnath Kotur { 3100941a77d5SSomnath Kotur struct be_mcc_wrb *wrb; 3101941a77d5SSomnath Kotur struct be_cmd_req_set_ext_fat_caps *req; 3102941a77d5SSomnath Kotur int status; 3103941a77d5SSomnath Kotur 3104941a77d5SSomnath Kotur spin_lock_bh(&adapter->mcc_lock); 3105941a77d5SSomnath Kotur 3106941a77d5SSomnath Kotur wrb = wrb_from_mccq(adapter); 3107941a77d5SSomnath Kotur if (!wrb) { 3108941a77d5SSomnath Kotur status = -EBUSY; 3109941a77d5SSomnath Kotur goto err; 3110941a77d5SSomnath Kotur } 3111941a77d5SSomnath Kotur 3112941a77d5SSomnath Kotur req = cmd->va; 3113941a77d5SSomnath Kotur memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params)); 3114941a77d5SSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3115941a77d5SSomnath Kotur OPCODE_COMMON_SET_EXT_FAT_CAPABILITES, 3116941a77d5SSomnath Kotur cmd->size, wrb, cmd); 3117941a77d5SSomnath Kotur 3118941a77d5SSomnath Kotur status = be_mcc_notify_wait(adapter); 3119941a77d5SSomnath Kotur err: 3120941a77d5SSomnath Kotur spin_unlock_bh(&adapter->mcc_lock); 3121941a77d5SSomnath Kotur return status; 31224762f6ceSAjit Khaparde } 31236a4ab669SParav Pandit 3124b4e32a71SPadmanabh Ratnakar int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name) 3125b4e32a71SPadmanabh Ratnakar { 3126b4e32a71SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3127b4e32a71SPadmanabh Ratnakar struct be_cmd_req_get_port_name *req; 3128b4e32a71SPadmanabh Ratnakar int status; 3129b4e32a71SPadmanabh Ratnakar 3130b4e32a71SPadmanabh Ratnakar if (!lancer_chip(adapter)) { 3131b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3132b4e32a71SPadmanabh Ratnakar return 0; 3133b4e32a71SPadmanabh Ratnakar } 3134b4e32a71SPadmanabh Ratnakar 3135b4e32a71SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3136b4e32a71SPadmanabh Ratnakar 3137b4e32a71SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3138b4e32a71SPadmanabh Ratnakar if (!wrb) { 3139b4e32a71SPadmanabh Ratnakar status = -EBUSY; 3140b4e32a71SPadmanabh Ratnakar goto err; 3141b4e32a71SPadmanabh Ratnakar } 3142b4e32a71SPadmanabh Ratnakar 3143b4e32a71SPadmanabh Ratnakar req = embedded_payload(wrb); 3144b4e32a71SPadmanabh Ratnakar 3145b4e32a71SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3146b4e32a71SPadmanabh Ratnakar OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb, 3147b4e32a71SPadmanabh Ratnakar NULL); 3148b4e32a71SPadmanabh Ratnakar req->hdr.version = 1; 3149b4e32a71SPadmanabh Ratnakar 3150b4e32a71SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3151b4e32a71SPadmanabh Ratnakar if (!status) { 3152b4e32a71SPadmanabh Ratnakar struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb); 3153b4e32a71SPadmanabh Ratnakar *port_name = resp->port_name[adapter->hba_port_num]; 3154b4e32a71SPadmanabh Ratnakar } else { 3155b4e32a71SPadmanabh Ratnakar *port_name = adapter->hba_port_num + '0'; 3156b4e32a71SPadmanabh Ratnakar } 3157b4e32a71SPadmanabh Ratnakar err: 3158b4e32a71SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3159b4e32a71SPadmanabh Ratnakar return status; 3160b4e32a71SPadmanabh Ratnakar } 3161b4e32a71SPadmanabh Ratnakar 3162150d58c7SVasundhara Volam static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count) 3163abb93951SPadmanabh Ratnakar { 3164150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3165abb93951SPadmanabh Ratnakar int i; 3166abb93951SPadmanabh Ratnakar 3167abb93951SPadmanabh Ratnakar for (i = 0; i < desc_count; i++) { 3168150d58c7SVasundhara Volam if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 || 3169150d58c7SVasundhara Volam hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1) 3170150d58c7SVasundhara Volam return (struct be_nic_res_desc *)hdr; 3171150d58c7SVasundhara Volam 3172150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3173150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3174150d58c7SVasundhara Volam } 3175950e2958SWei Yang return NULL; 3176abb93951SPadmanabh Ratnakar } 3177abb93951SPadmanabh Ratnakar 3178150d58c7SVasundhara Volam static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf, 3179150d58c7SVasundhara Volam u32 desc_count) 3180150d58c7SVasundhara Volam { 3181150d58c7SVasundhara Volam struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf; 3182150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3183150d58c7SVasundhara Volam int i; 3184150d58c7SVasundhara Volam 3185150d58c7SVasundhara Volam for (i = 0; i < desc_count; i++) { 3186150d58c7SVasundhara Volam if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 || 3187150d58c7SVasundhara Volam hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) { 3188150d58c7SVasundhara Volam pcie = (struct be_pcie_res_desc *)hdr; 3189150d58c7SVasundhara Volam if (pcie->pf_num == devfn) 3190150d58c7SVasundhara Volam return pcie; 3191150d58c7SVasundhara Volam } 3192150d58c7SVasundhara Volam 3193150d58c7SVasundhara Volam hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0; 3194150d58c7SVasundhara Volam hdr = (void *)hdr + hdr->desc_len; 3195150d58c7SVasundhara Volam } 3196abb93951SPadmanabh Ratnakar return NULL; 3197abb93951SPadmanabh Ratnakar } 3198abb93951SPadmanabh Ratnakar 319992bf14abSSathya Perla static void be_copy_nic_desc(struct be_resources *res, 320092bf14abSSathya Perla struct be_nic_res_desc *desc) 320192bf14abSSathya Perla { 320292bf14abSSathya Perla res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count); 320392bf14abSSathya Perla res->max_vlans = le16_to_cpu(desc->vlan_count); 320492bf14abSSathya Perla res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count); 320592bf14abSSathya Perla res->max_tx_qs = le16_to_cpu(desc->txq_count); 320692bf14abSSathya Perla res->max_rss_qs = le16_to_cpu(desc->rssq_count); 320792bf14abSSathya Perla res->max_rx_qs = le16_to_cpu(desc->rq_count); 320892bf14abSSathya Perla res->max_evt_qs = le16_to_cpu(desc->eq_count); 320992bf14abSSathya Perla /* Clear flags that driver is not interested in */ 321092bf14abSSathya Perla res->if_cap_flags = le32_to_cpu(desc->cap_flags) & 321192bf14abSSathya Perla BE_IF_CAP_FLAGS_WANT; 321292bf14abSSathya Perla /* Need 1 RXQ as the default RXQ */ 321392bf14abSSathya Perla if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs) 321492bf14abSSathya Perla res->max_rss_qs -= 1; 321592bf14abSSathya Perla } 321692bf14abSSathya Perla 3217abb93951SPadmanabh Ratnakar /* Uses Mbox */ 321892bf14abSSathya Perla int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) 3219abb93951SPadmanabh Ratnakar { 3220abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3221abb93951SPadmanabh Ratnakar struct be_cmd_req_get_func_config *req; 3222abb93951SPadmanabh Ratnakar int status; 3223abb93951SPadmanabh Ratnakar struct be_dma_mem cmd; 3224abb93951SPadmanabh Ratnakar 3225d98ef50fSSuresh Reddy if (mutex_lock_interruptible(&adapter->mbox_lock)) 3226d98ef50fSSuresh Reddy return -1; 3227d98ef50fSSuresh Reddy 3228abb93951SPadmanabh Ratnakar memset(&cmd, 0, sizeof(struct be_dma_mem)); 3229abb93951SPadmanabh Ratnakar cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3230abb93951SPadmanabh Ratnakar cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3231abb93951SPadmanabh Ratnakar &cmd.dma); 3232abb93951SPadmanabh Ratnakar if (!cmd.va) { 3233abb93951SPadmanabh Ratnakar dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3234d98ef50fSSuresh Reddy status = -ENOMEM; 3235d98ef50fSSuresh Reddy goto err; 3236abb93951SPadmanabh Ratnakar } 3237abb93951SPadmanabh Ratnakar 3238abb93951SPadmanabh Ratnakar wrb = wrb_from_mbox(adapter); 3239abb93951SPadmanabh Ratnakar if (!wrb) { 3240abb93951SPadmanabh Ratnakar status = -EBUSY; 3241abb93951SPadmanabh Ratnakar goto err; 3242abb93951SPadmanabh Ratnakar } 3243abb93951SPadmanabh Ratnakar 3244abb93951SPadmanabh Ratnakar req = cmd.va; 3245abb93951SPadmanabh Ratnakar 3246abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3247abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_FUNC_CONFIG, 3248abb93951SPadmanabh Ratnakar cmd.size, wrb, &cmd); 3249abb93951SPadmanabh Ratnakar 325028710c55SKalesh AP if (skyhawk_chip(adapter)) 325128710c55SKalesh AP req->hdr.version = 1; 325228710c55SKalesh AP 3253abb93951SPadmanabh Ratnakar status = be_mbox_notify_wait(adapter); 3254abb93951SPadmanabh Ratnakar if (!status) { 3255abb93951SPadmanabh Ratnakar struct be_cmd_resp_get_func_config *resp = cmd.va; 3256abb93951SPadmanabh Ratnakar u32 desc_count = le32_to_cpu(resp->desc_count); 3257150d58c7SVasundhara Volam struct be_nic_res_desc *desc; 3258abb93951SPadmanabh Ratnakar 3259150d58c7SVasundhara Volam desc = be_get_nic_desc(resp->func_param, desc_count); 3260abb93951SPadmanabh Ratnakar if (!desc) { 3261abb93951SPadmanabh Ratnakar status = -EINVAL; 3262abb93951SPadmanabh Ratnakar goto err; 3263abb93951SPadmanabh Ratnakar } 3264abb93951SPadmanabh Ratnakar 3265d5c18473SPadmanabh Ratnakar adapter->pf_number = desc->pf_num; 326692bf14abSSathya Perla be_copy_nic_desc(res, desc); 3267abb93951SPadmanabh Ratnakar } 3268abb93951SPadmanabh Ratnakar err: 3269abb93951SPadmanabh Ratnakar mutex_unlock(&adapter->mbox_lock); 3270d98ef50fSSuresh Reddy if (cmd.va) 3271d98ef50fSSuresh Reddy pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3272abb93951SPadmanabh Ratnakar return status; 3273abb93951SPadmanabh Ratnakar } 3274abb93951SPadmanabh Ratnakar 3275a05f99dbSVasundhara Volam /* Uses mbox */ 32764188e7dfSJingoo Han static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3277a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3278abb93951SPadmanabh Ratnakar { 3279abb93951SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3280abb93951SPadmanabh Ratnakar struct be_cmd_req_get_profile_config *req; 3281abb93951SPadmanabh Ratnakar int status; 3282abb93951SPadmanabh Ratnakar 3283a05f99dbSVasundhara Volam if (mutex_lock_interruptible(&adapter->mbox_lock)) 3284a05f99dbSVasundhara Volam return -1; 3285a05f99dbSVasundhara Volam wrb = wrb_from_mbox(adapter); 3286a05f99dbSVasundhara Volam 3287a05f99dbSVasundhara Volam req = cmd->va; 3288a05f99dbSVasundhara Volam be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3289a05f99dbSVasundhara Volam OPCODE_COMMON_GET_PROFILE_CONFIG, 3290a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3291a05f99dbSVasundhara Volam 3292a05f99dbSVasundhara Volam req->type = ACTIVE_PROFILE_TYPE; 3293a05f99dbSVasundhara Volam req->hdr.domain = domain; 3294a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3295a05f99dbSVasundhara Volam req->hdr.version = 1; 3296a05f99dbSVasundhara Volam 3297a05f99dbSVasundhara Volam status = be_mbox_notify_wait(adapter); 3298a05f99dbSVasundhara Volam 3299a05f99dbSVasundhara Volam mutex_unlock(&adapter->mbox_lock); 3300a05f99dbSVasundhara Volam return status; 3301abb93951SPadmanabh Ratnakar } 3302abb93951SPadmanabh Ratnakar 3303a05f99dbSVasundhara Volam /* Uses sync mcc */ 33044188e7dfSJingoo Han static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3305a05f99dbSVasundhara Volam u8 domain, struct be_dma_mem *cmd) 3306a05f99dbSVasundhara Volam { 3307a05f99dbSVasundhara Volam struct be_mcc_wrb *wrb; 3308a05f99dbSVasundhara Volam struct be_cmd_req_get_profile_config *req; 3309a05f99dbSVasundhara Volam int status; 3310a05f99dbSVasundhara Volam 3311abb93951SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3312abb93951SPadmanabh Ratnakar 3313abb93951SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3314abb93951SPadmanabh Ratnakar if (!wrb) { 3315abb93951SPadmanabh Ratnakar status = -EBUSY; 3316abb93951SPadmanabh Ratnakar goto err; 3317abb93951SPadmanabh Ratnakar } 3318abb93951SPadmanabh Ratnakar 3319a05f99dbSVasundhara Volam req = cmd->va; 3320abb93951SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3321abb93951SPadmanabh Ratnakar OPCODE_COMMON_GET_PROFILE_CONFIG, 3322a05f99dbSVasundhara Volam cmd->size, wrb, cmd); 3323abb93951SPadmanabh Ratnakar 3324abb93951SPadmanabh Ratnakar req->type = ACTIVE_PROFILE_TYPE; 3325abb93951SPadmanabh Ratnakar req->hdr.domain = domain; 3326a05f99dbSVasundhara Volam if (!lancer_chip(adapter)) 3327a05f99dbSVasundhara Volam req->hdr.version = 1; 3328abb93951SPadmanabh Ratnakar 3329abb93951SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3330a05f99dbSVasundhara Volam 3331a05f99dbSVasundhara Volam err: 3332a05f99dbSVasundhara Volam spin_unlock_bh(&adapter->mcc_lock); 3333a05f99dbSVasundhara Volam return status; 3334a05f99dbSVasundhara Volam } 3335a05f99dbSVasundhara Volam 3336a05f99dbSVasundhara Volam /* Uses sync mcc, if MCCQ is already created otherwise mbox */ 333792bf14abSSathya Perla int be_cmd_get_profile_config(struct be_adapter *adapter, 333892bf14abSSathya Perla struct be_resources *res, u8 domain) 3339a05f99dbSVasundhara Volam { 3340150d58c7SVasundhara Volam struct be_cmd_resp_get_profile_config *resp; 3341150d58c7SVasundhara Volam struct be_pcie_res_desc *pcie; 3342150d58c7SVasundhara Volam struct be_nic_res_desc *nic; 3343a05f99dbSVasundhara Volam struct be_queue_info *mccq = &adapter->mcc_obj.q; 3344a05f99dbSVasundhara Volam struct be_dma_mem cmd; 3345150d58c7SVasundhara Volam u32 desc_count; 3346a05f99dbSVasundhara Volam int status; 3347a05f99dbSVasundhara Volam 3348a05f99dbSVasundhara Volam memset(&cmd, 0, sizeof(struct be_dma_mem)); 3349a05f99dbSVasundhara Volam cmd.size = sizeof(struct be_cmd_resp_get_profile_config); 3350150d58c7SVasundhara Volam cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); 3351150d58c7SVasundhara Volam if (!cmd.va) 3352a05f99dbSVasundhara Volam return -ENOMEM; 3353a05f99dbSVasundhara Volam 3354a05f99dbSVasundhara Volam if (!mccq->created) 3355a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd); 3356a05f99dbSVasundhara Volam else 3357a05f99dbSVasundhara Volam status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd); 3358150d58c7SVasundhara Volam if (status) 3359abb93951SPadmanabh Ratnakar goto err; 3360150d58c7SVasundhara Volam 3361150d58c7SVasundhara Volam resp = cmd.va; 3362150d58c7SVasundhara Volam desc_count = le32_to_cpu(resp->desc_count); 3363150d58c7SVasundhara Volam 3364150d58c7SVasundhara Volam pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3365150d58c7SVasundhara Volam desc_count); 3366150d58c7SVasundhara Volam if (pcie) 336792bf14abSSathya Perla res->max_vfs = le16_to_cpu(pcie->num_vfs); 3368150d58c7SVasundhara Volam 3369150d58c7SVasundhara Volam nic = be_get_nic_desc(resp->func_param, desc_count); 337092bf14abSSathya Perla if (nic) 337192bf14abSSathya Perla be_copy_nic_desc(res, nic); 337292bf14abSSathya Perla 3373abb93951SPadmanabh Ratnakar err: 3374a05f99dbSVasundhara Volam if (cmd.va) 3375150d58c7SVasundhara Volam pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); 3376abb93951SPadmanabh Ratnakar return status; 3377abb93951SPadmanabh Ratnakar } 3378abb93951SPadmanabh Ratnakar 3379150d58c7SVasundhara Volam /* Currently only Lancer uses this command and it supports version 0 only 3380150d58c7SVasundhara Volam * Uses sync mcc 3381150d58c7SVasundhara Volam */ 3382d5c18473SPadmanabh Ratnakar int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps, 3383d5c18473SPadmanabh Ratnakar u8 domain) 3384d5c18473SPadmanabh Ratnakar { 3385d5c18473SPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3386d5c18473SPadmanabh Ratnakar struct be_cmd_req_set_profile_config *req; 3387d5c18473SPadmanabh Ratnakar int status; 3388d5c18473SPadmanabh Ratnakar 3389d5c18473SPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3390d5c18473SPadmanabh Ratnakar 3391d5c18473SPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3392d5c18473SPadmanabh Ratnakar if (!wrb) { 3393d5c18473SPadmanabh Ratnakar status = -EBUSY; 3394d5c18473SPadmanabh Ratnakar goto err; 3395d5c18473SPadmanabh Ratnakar } 3396d5c18473SPadmanabh Ratnakar 3397d5c18473SPadmanabh Ratnakar req = embedded_payload(wrb); 3398d5c18473SPadmanabh Ratnakar 3399d5c18473SPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3400d5c18473SPadmanabh Ratnakar OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req), 3401d5c18473SPadmanabh Ratnakar wrb, NULL); 3402d5c18473SPadmanabh Ratnakar req->hdr.domain = domain; 3403d5c18473SPadmanabh Ratnakar req->desc_count = cpu_to_le32(1); 3404150d58c7SVasundhara Volam req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0; 3405150d58c7SVasundhara Volam req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0; 3406d5c18473SPadmanabh Ratnakar req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV); 3407d5c18473SPadmanabh Ratnakar req->nic_desc.pf_num = adapter->pf_number; 3408d5c18473SPadmanabh Ratnakar req->nic_desc.vf_num = domain; 3409d5c18473SPadmanabh Ratnakar 3410d5c18473SPadmanabh Ratnakar /* Mark fields invalid */ 3411d5c18473SPadmanabh Ratnakar req->nic_desc.unicast_mac_count = 0xFFFF; 3412d5c18473SPadmanabh Ratnakar req->nic_desc.mcc_count = 0xFFFF; 3413d5c18473SPadmanabh Ratnakar req->nic_desc.vlan_count = 0xFFFF; 3414d5c18473SPadmanabh Ratnakar req->nic_desc.mcast_mac_count = 0xFFFF; 3415d5c18473SPadmanabh Ratnakar req->nic_desc.txq_count = 0xFFFF; 3416d5c18473SPadmanabh Ratnakar req->nic_desc.rq_count = 0xFFFF; 3417d5c18473SPadmanabh Ratnakar req->nic_desc.rssq_count = 0xFFFF; 3418d5c18473SPadmanabh Ratnakar req->nic_desc.lro_count = 0xFFFF; 3419d5c18473SPadmanabh Ratnakar req->nic_desc.cq_count = 0xFFFF; 3420d5c18473SPadmanabh Ratnakar req->nic_desc.toe_conn_count = 0xFFFF; 3421d5c18473SPadmanabh Ratnakar req->nic_desc.eq_count = 0xFFFF; 3422d5c18473SPadmanabh Ratnakar req->nic_desc.link_param = 0xFF; 3423d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = 0xFFFFFFFF; 3424d5c18473SPadmanabh Ratnakar req->nic_desc.acpi_params = 0xFF; 3425d5c18473SPadmanabh Ratnakar req->nic_desc.wol_param = 0x0F; 3426d5c18473SPadmanabh Ratnakar 3427d5c18473SPadmanabh Ratnakar /* Change BW */ 3428d5c18473SPadmanabh Ratnakar req->nic_desc.bw_min = cpu_to_le32(bps); 3429d5c18473SPadmanabh Ratnakar req->nic_desc.bw_max = cpu_to_le32(bps); 3430d5c18473SPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3431d5c18473SPadmanabh Ratnakar err: 3432d5c18473SPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3433d5c18473SPadmanabh Ratnakar return status; 3434d5c18473SPadmanabh Ratnakar } 3435d5c18473SPadmanabh Ratnakar 34364c876616SSathya Perla int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg, 34374c876616SSathya Perla int vf_num) 34384c876616SSathya Perla { 34394c876616SSathya Perla struct be_mcc_wrb *wrb; 34404c876616SSathya Perla struct be_cmd_req_get_iface_list *req; 34414c876616SSathya Perla struct be_cmd_resp_get_iface_list *resp; 34424c876616SSathya Perla int status; 34434c876616SSathya Perla 34444c876616SSathya Perla spin_lock_bh(&adapter->mcc_lock); 34454c876616SSathya Perla 34464c876616SSathya Perla wrb = wrb_from_mccq(adapter); 34474c876616SSathya Perla if (!wrb) { 34484c876616SSathya Perla status = -EBUSY; 34494c876616SSathya Perla goto err; 34504c876616SSathya Perla } 34514c876616SSathya Perla req = embedded_payload(wrb); 34524c876616SSathya Perla 34534c876616SSathya Perla be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 34544c876616SSathya Perla OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp), 34554c876616SSathya Perla wrb, NULL); 34564c876616SSathya Perla req->hdr.domain = vf_num + 1; 34574c876616SSathya Perla 34584c876616SSathya Perla status = be_mcc_notify_wait(adapter); 34594c876616SSathya Perla if (!status) { 34604c876616SSathya Perla resp = (struct be_cmd_resp_get_iface_list *)req; 34614c876616SSathya Perla vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id); 34624c876616SSathya Perla } 34634c876616SSathya Perla 34644c876616SSathya Perla err: 34654c876616SSathya Perla spin_unlock_bh(&adapter->mcc_lock); 34664c876616SSathya Perla return status; 34674c876616SSathya Perla } 34684c876616SSathya Perla 34695c510811SSomnath Kotur static int lancer_wait_idle(struct be_adapter *adapter) 34705c510811SSomnath Kotur { 34715c510811SSomnath Kotur #define SLIPORT_IDLE_TIMEOUT 30 34725c510811SSomnath Kotur u32 reg_val; 34735c510811SSomnath Kotur int status = 0, i; 34745c510811SSomnath Kotur 34755c510811SSomnath Kotur for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { 34765c510811SSomnath Kotur reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); 34775c510811SSomnath Kotur if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) 34785c510811SSomnath Kotur break; 34795c510811SSomnath Kotur 34805c510811SSomnath Kotur ssleep(1); 34815c510811SSomnath Kotur } 34825c510811SSomnath Kotur 34835c510811SSomnath Kotur if (i == SLIPORT_IDLE_TIMEOUT) 34845c510811SSomnath Kotur status = -1; 34855c510811SSomnath Kotur 34865c510811SSomnath Kotur return status; 34875c510811SSomnath Kotur } 34885c510811SSomnath Kotur 34895c510811SSomnath Kotur int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) 34905c510811SSomnath Kotur { 34915c510811SSomnath Kotur int status = 0; 34925c510811SSomnath Kotur 34935c510811SSomnath Kotur status = lancer_wait_idle(adapter); 34945c510811SSomnath Kotur if (status) 34955c510811SSomnath Kotur return status; 34965c510811SSomnath Kotur 34975c510811SSomnath Kotur iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); 34985c510811SSomnath Kotur 34995c510811SSomnath Kotur return status; 35005c510811SSomnath Kotur } 35015c510811SSomnath Kotur 35025c510811SSomnath Kotur /* Routine to check whether dump image is present or not */ 35035c510811SSomnath Kotur bool dump_present(struct be_adapter *adapter) 35045c510811SSomnath Kotur { 35055c510811SSomnath Kotur u32 sliport_status = 0; 35065c510811SSomnath Kotur 35075c510811SSomnath Kotur sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 35085c510811SSomnath Kotur return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); 35095c510811SSomnath Kotur } 35105c510811SSomnath Kotur 35115c510811SSomnath Kotur int lancer_initiate_dump(struct be_adapter *adapter) 35125c510811SSomnath Kotur { 35135c510811SSomnath Kotur int status; 35145c510811SSomnath Kotur 35155c510811SSomnath Kotur /* give firmware reset and diagnostic dump */ 35165c510811SSomnath Kotur status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | 35175c510811SSomnath Kotur PHYSDEV_CONTROL_DD_MASK); 35185c510811SSomnath Kotur if (status < 0) { 35195c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); 35205c510811SSomnath Kotur return status; 35215c510811SSomnath Kotur } 35225c510811SSomnath Kotur 35235c510811SSomnath Kotur status = lancer_wait_idle(adapter); 35245c510811SSomnath Kotur if (status) 35255c510811SSomnath Kotur return status; 35265c510811SSomnath Kotur 35275c510811SSomnath Kotur if (!dump_present(adapter)) { 35285c510811SSomnath Kotur dev_err(&adapter->pdev->dev, "Dump image not present\n"); 35295c510811SSomnath Kotur return -1; 35305c510811SSomnath Kotur } 35315c510811SSomnath Kotur 35325c510811SSomnath Kotur return 0; 35335c510811SSomnath Kotur } 35345c510811SSomnath Kotur 3535dcf7ebbaSPadmanabh Ratnakar /* Uses sync mcc */ 3536dcf7ebbaSPadmanabh Ratnakar int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) 3537dcf7ebbaSPadmanabh Ratnakar { 3538dcf7ebbaSPadmanabh Ratnakar struct be_mcc_wrb *wrb; 3539dcf7ebbaSPadmanabh Ratnakar struct be_cmd_enable_disable_vf *req; 3540dcf7ebbaSPadmanabh Ratnakar int status; 3541dcf7ebbaSPadmanabh Ratnakar 35420599863dSVasundhara Volam if (BEx_chip(adapter)) 3543dcf7ebbaSPadmanabh Ratnakar return 0; 3544dcf7ebbaSPadmanabh Ratnakar 3545dcf7ebbaSPadmanabh Ratnakar spin_lock_bh(&adapter->mcc_lock); 3546dcf7ebbaSPadmanabh Ratnakar 3547dcf7ebbaSPadmanabh Ratnakar wrb = wrb_from_mccq(adapter); 3548dcf7ebbaSPadmanabh Ratnakar if (!wrb) { 3549dcf7ebbaSPadmanabh Ratnakar status = -EBUSY; 3550dcf7ebbaSPadmanabh Ratnakar goto err; 3551dcf7ebbaSPadmanabh Ratnakar } 3552dcf7ebbaSPadmanabh Ratnakar 3553dcf7ebbaSPadmanabh Ratnakar req = embedded_payload(wrb); 3554dcf7ebbaSPadmanabh Ratnakar 3555dcf7ebbaSPadmanabh Ratnakar be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3556dcf7ebbaSPadmanabh Ratnakar OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req), 3557dcf7ebbaSPadmanabh Ratnakar wrb, NULL); 3558dcf7ebbaSPadmanabh Ratnakar 3559dcf7ebbaSPadmanabh Ratnakar req->hdr.domain = domain; 3560dcf7ebbaSPadmanabh Ratnakar req->enable = 1; 3561dcf7ebbaSPadmanabh Ratnakar status = be_mcc_notify_wait(adapter); 3562dcf7ebbaSPadmanabh Ratnakar err: 3563dcf7ebbaSPadmanabh Ratnakar spin_unlock_bh(&adapter->mcc_lock); 3564dcf7ebbaSPadmanabh Ratnakar return status; 3565dcf7ebbaSPadmanabh Ratnakar } 3566dcf7ebbaSPadmanabh Ratnakar 356768c45a2dSSomnath Kotur int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable) 356868c45a2dSSomnath Kotur { 356968c45a2dSSomnath Kotur struct be_mcc_wrb *wrb; 357068c45a2dSSomnath Kotur struct be_cmd_req_intr_set *req; 357168c45a2dSSomnath Kotur int status; 357268c45a2dSSomnath Kotur 357368c45a2dSSomnath Kotur if (mutex_lock_interruptible(&adapter->mbox_lock)) 357468c45a2dSSomnath Kotur return -1; 357568c45a2dSSomnath Kotur 357668c45a2dSSomnath Kotur wrb = wrb_from_mbox(adapter); 357768c45a2dSSomnath Kotur 357868c45a2dSSomnath Kotur req = embedded_payload(wrb); 357968c45a2dSSomnath Kotur 358068c45a2dSSomnath Kotur be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 358168c45a2dSSomnath Kotur OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req), 358268c45a2dSSomnath Kotur wrb, NULL); 358368c45a2dSSomnath Kotur 358468c45a2dSSomnath Kotur req->intr_enabled = intr_enable; 358568c45a2dSSomnath Kotur 358668c45a2dSSomnath Kotur status = be_mbox_notify_wait(adapter); 358768c45a2dSSomnath Kotur 358868c45a2dSSomnath Kotur mutex_unlock(&adapter->mbox_lock); 358968c45a2dSSomnath Kotur return status; 359068c45a2dSSomnath Kotur } 359168c45a2dSSomnath Kotur 35926a4ab669SParav Pandit int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 35936a4ab669SParav Pandit int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 35946a4ab669SParav Pandit { 35956a4ab669SParav Pandit struct be_adapter *adapter = netdev_priv(netdev_handle); 35966a4ab669SParav Pandit struct be_mcc_wrb *wrb; 35976a4ab669SParav Pandit struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload; 35986a4ab669SParav Pandit struct be_cmd_req_hdr *req; 35996a4ab669SParav Pandit struct be_cmd_resp_hdr *resp; 36006a4ab669SParav Pandit int status; 36016a4ab669SParav Pandit 36026a4ab669SParav Pandit spin_lock_bh(&adapter->mcc_lock); 36036a4ab669SParav Pandit 36046a4ab669SParav Pandit wrb = wrb_from_mccq(adapter); 36056a4ab669SParav Pandit if (!wrb) { 36066a4ab669SParav Pandit status = -EBUSY; 36076a4ab669SParav Pandit goto err; 36086a4ab669SParav Pandit } 36096a4ab669SParav Pandit req = embedded_payload(wrb); 36106a4ab669SParav Pandit resp = embedded_payload(wrb); 36116a4ab669SParav Pandit 36126a4ab669SParav Pandit be_wrb_cmd_hdr_prepare(req, hdr->subsystem, 36136a4ab669SParav Pandit hdr->opcode, wrb_payload_size, wrb, NULL); 36146a4ab669SParav Pandit memcpy(req, wrb_payload, wrb_payload_size); 36156a4ab669SParav Pandit be_dws_cpu_to_le(req, wrb_payload_size); 36166a4ab669SParav Pandit 36176a4ab669SParav Pandit status = be_mcc_notify_wait(adapter); 36186a4ab669SParav Pandit if (cmd_status) 36196a4ab669SParav Pandit *cmd_status = (status & 0xffff); 36206a4ab669SParav Pandit if (ext_status) 36216a4ab669SParav Pandit *ext_status = 0; 36226a4ab669SParav Pandit memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length); 36236a4ab669SParav Pandit be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length); 36246a4ab669SParav Pandit err: 36256a4ab669SParav Pandit spin_unlock_bh(&adapter->mcc_lock); 36266a4ab669SParav Pandit return status; 36276a4ab669SParav Pandit } 36286a4ab669SParav Pandit EXPORT_SYMBOL(be_roce_mcc_cmd); 3629