1 /* 2 * Copyright (C) 2005 - 2015 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 #include <linux/cpumask.h> 34 #include <linux/hwmon.h> 35 #include <linux/hwmon-sysfs.h> 36 37 #include "be_hw.h" 38 #include "be_roce.h" 39 40 #define DRV_VER "10.6.0.2" 41 #define DRV_NAME "be2net" 42 #define BE_NAME "Emulex BladeEngine2" 43 #define BE3_NAME "Emulex BladeEngine3" 44 #define OC_NAME "Emulex OneConnect" 45 #define OC_NAME_BE OC_NAME "(be3)" 46 #define OC_NAME_LANCER OC_NAME "(Lancer)" 47 #define OC_NAME_SH OC_NAME "(Skyhawk)" 48 #define DRV_DESC "Emulex OneConnect NIC Driver" 49 50 #define BE_VENDOR_ID 0x19a2 51 #define EMULEX_VENDOR_ID 0x10df 52 #define BE_DEVICE_ID1 0x211 53 #define BE_DEVICE_ID2 0x221 54 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 55 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 56 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 57 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 58 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 59 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 60 #define OC_SUBSYS_DEVICE_ID1 0xE602 61 #define OC_SUBSYS_DEVICE_ID2 0xE642 62 #define OC_SUBSYS_DEVICE_ID3 0xE612 63 #define OC_SUBSYS_DEVICE_ID4 0xE652 64 65 /* Number of bytes of an RX frame that are copied to skb->data */ 66 #define BE_HDR_LEN ((u16) 64) 67 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 68 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 69 70 #define BE_MAX_JUMBO_FRAME_SIZE 9018 71 #define BE_MIN_MTU 256 72 #define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \ 73 (ETH_HLEN + ETH_FCS_LEN)) 74 75 #define BE_NUM_VLANS_SUPPORTED 64 76 #define BE_MAX_EQD 128u 77 #define BE_MAX_TX_FRAG_COUNT 30 78 79 #define EVNT_Q_LEN 1024 80 #define TX_Q_LEN 2048 81 #define TX_CQ_LEN 1024 82 #define RX_Q_LEN 1024 /* Does not support any other value */ 83 #define RX_CQ_LEN 1024 84 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 85 #define MCC_CQ_LEN 256 86 87 #define BE2_MAX_RSS_QS 4 88 #define BE3_MAX_RSS_QS 16 89 #define BE3_MAX_TX_QS 16 90 #define BE3_MAX_EVT_QS 16 91 #define BE3_SRIOV_MAX_EVT_QS 8 92 93 #define MAX_RSS_IFACES 15 94 #define MAX_RX_QS 32 95 #define MAX_EVT_QS 32 96 #define MAX_TX_QS 32 97 98 #define MAX_ROCE_EQS 5 99 #define MAX_MSIX_VECTORS 32 100 #define MIN_MSIX_VECTORS 1 101 #define BE_NAPI_WEIGHT 64 102 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 103 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 104 #define MAX_NUM_POST_ERX_DB 255u 105 106 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 107 #define FW_VER_LEN 32 108 109 #define RSS_INDIR_TABLE_LEN 128 110 #define RSS_HASH_KEY_LEN 40 111 112 struct be_dma_mem { 113 void *va; 114 dma_addr_t dma; 115 u32 size; 116 }; 117 118 struct be_queue_info { 119 struct be_dma_mem dma_mem; 120 u16 len; 121 u16 entry_size; /* Size of an element in the queue */ 122 u16 id; 123 u16 tail, head; 124 bool created; 125 atomic_t used; /* Number of valid elements in the queue */ 126 }; 127 128 static inline u32 MODULO(u16 val, u16 limit) 129 { 130 BUG_ON(limit & (limit - 1)); 131 return val & (limit - 1); 132 } 133 134 static inline void index_adv(u16 *index, u16 val, u16 limit) 135 { 136 *index = MODULO((*index + val), limit); 137 } 138 139 static inline void index_inc(u16 *index, u16 limit) 140 { 141 *index = MODULO((*index + 1), limit); 142 } 143 144 static inline void *queue_head_node(struct be_queue_info *q) 145 { 146 return q->dma_mem.va + q->head * q->entry_size; 147 } 148 149 static inline void *queue_tail_node(struct be_queue_info *q) 150 { 151 return q->dma_mem.va + q->tail * q->entry_size; 152 } 153 154 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 155 { 156 return q->dma_mem.va + index * q->entry_size; 157 } 158 159 static inline void queue_head_inc(struct be_queue_info *q) 160 { 161 index_inc(&q->head, q->len); 162 } 163 164 static inline void index_dec(u16 *index, u16 limit) 165 { 166 *index = MODULO((*index - 1), limit); 167 } 168 169 static inline void queue_tail_inc(struct be_queue_info *q) 170 { 171 index_inc(&q->tail, q->len); 172 } 173 174 struct be_eq_obj { 175 struct be_queue_info q; 176 char desc[32]; 177 178 /* Adaptive interrupt coalescing (AIC) info */ 179 bool enable_aic; 180 u32 min_eqd; /* in usecs */ 181 u32 max_eqd; /* in usecs */ 182 u32 eqd; /* configured val when aic is off */ 183 u32 cur_eqd; /* in usecs */ 184 185 u8 idx; /* array index */ 186 u8 msix_idx; 187 u16 spurious_intr; 188 struct napi_struct napi; 189 struct be_adapter *adapter; 190 cpumask_var_t affinity_mask; 191 192 #ifdef CONFIG_NET_RX_BUSY_POLL 193 #define BE_EQ_IDLE 0 194 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 195 #define BE_EQ_POLL 2 /* poll owns this EQ */ 196 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 197 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 198 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 199 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 200 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 201 unsigned int state; 202 spinlock_t lock; /* lock to serialize napi and busy-poll */ 203 #endif /* CONFIG_NET_RX_BUSY_POLL */ 204 } ____cacheline_aligned_in_smp; 205 206 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 207 bool enable; 208 u32 min_eqd; /* in usecs */ 209 u32 max_eqd; /* in usecs */ 210 u32 prev_eqd; /* in usecs */ 211 u32 et_eqd; /* configured val when aic is off */ 212 ulong jiffies; 213 u64 rx_pkts_prev; /* Used to calculate RX pps */ 214 u64 tx_reqs_prev; /* Used to calculate TX pps */ 215 }; 216 217 enum { 218 NAPI_POLLING, 219 BUSY_POLLING 220 }; 221 222 struct be_mcc_obj { 223 struct be_queue_info q; 224 struct be_queue_info cq; 225 bool rearm_cq; 226 }; 227 228 struct be_tx_stats { 229 u64 tx_bytes; 230 u64 tx_pkts; 231 u64 tx_reqs; 232 u64 tx_compl; 233 ulong tx_jiffies; 234 u32 tx_stops; 235 u32 tx_drv_drops; /* pkts dropped by driver */ 236 /* the error counters are described in be_ethtool.c */ 237 u32 tx_hdr_parse_err; 238 u32 tx_dma_err; 239 u32 tx_tso_err; 240 u32 tx_spoof_check_err; 241 u32 tx_qinq_err; 242 u32 tx_internal_parity_err; 243 struct u64_stats_sync sync; 244 struct u64_stats_sync sync_compl; 245 }; 246 247 /* Structure to hold some data of interest obtained from a TX CQE */ 248 struct be_tx_compl_info { 249 u8 status; /* Completion status */ 250 u16 end_index; /* Completed TXQ Index */ 251 }; 252 253 struct be_tx_obj { 254 u32 db_offset; 255 struct be_queue_info q; 256 struct be_queue_info cq; 257 struct be_tx_compl_info txcp; 258 /* Remember the skbs that were transmitted */ 259 struct sk_buff *sent_skb_list[TX_Q_LEN]; 260 struct be_tx_stats stats; 261 u16 pend_wrb_cnt; /* Number of WRBs yet to be given to HW */ 262 u16 last_req_wrb_cnt; /* wrb cnt of the last req in the Q */ 263 u16 last_req_hdr; /* index of the last req's hdr-wrb */ 264 } ____cacheline_aligned_in_smp; 265 266 /* Struct to remember the pages posted for rx frags */ 267 struct be_rx_page_info { 268 struct page *page; 269 /* set to page-addr for last frag of the page & frag-addr otherwise */ 270 DEFINE_DMA_UNMAP_ADDR(bus); 271 u16 page_offset; 272 bool last_frag; /* last frag of the page */ 273 }; 274 275 struct be_rx_stats { 276 u64 rx_bytes; 277 u64 rx_pkts; 278 u32 rx_drops_no_skbs; /* skb allocation errors */ 279 u32 rx_drops_no_frags; /* HW has no fetched frags */ 280 u32 rx_post_fail; /* page post alloc failures */ 281 u32 rx_compl; 282 u32 rx_mcast_pkts; 283 u32 rx_compl_err; /* completions with err set */ 284 struct u64_stats_sync sync; 285 }; 286 287 struct be_rx_compl_info { 288 u32 rss_hash; 289 u16 vlan_tag; 290 u16 pkt_size; 291 u16 port; 292 u8 vlanf; 293 u8 num_rcvd; 294 u8 err; 295 u8 ipf; 296 u8 tcpf; 297 u8 udpf; 298 u8 ip_csum; 299 u8 l4_csum; 300 u8 ipv6; 301 u8 qnq; 302 u8 pkt_type; 303 u8 ip_frag; 304 u8 tunneled; 305 }; 306 307 struct be_rx_obj { 308 struct be_adapter *adapter; 309 struct be_queue_info q; 310 struct be_queue_info cq; 311 struct be_rx_compl_info rxcp; 312 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 313 struct be_rx_stats stats; 314 u8 rss_id; 315 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 316 } ____cacheline_aligned_in_smp; 317 318 struct be_drv_stats { 319 u32 eth_red_drops; 320 u32 dma_map_errors; 321 u32 rx_drops_no_pbuf; 322 u32 rx_drops_no_txpb; 323 u32 rx_drops_no_erx_descr; 324 u32 rx_drops_no_tpre_descr; 325 u32 rx_drops_too_many_frags; 326 u32 forwarded_packets; 327 u32 rx_drops_mtu; 328 u32 rx_crc_errors; 329 u32 rx_alignment_symbol_errors; 330 u32 rx_pause_frames; 331 u32 rx_priority_pause_frames; 332 u32 rx_control_frames; 333 u32 rx_in_range_errors; 334 u32 rx_out_range_errors; 335 u32 rx_frame_too_long; 336 u32 rx_address_filtered; 337 u32 rx_dropped_too_small; 338 u32 rx_dropped_too_short; 339 u32 rx_dropped_header_too_small; 340 u32 rx_dropped_tcp_length; 341 u32 rx_dropped_runt; 342 u32 rx_ip_checksum_errs; 343 u32 rx_tcp_checksum_errs; 344 u32 rx_udp_checksum_errs; 345 u32 tx_pauseframes; 346 u32 tx_priority_pauseframes; 347 u32 tx_controlframes; 348 u32 rxpp_fifo_overflow_drop; 349 u32 rx_input_fifo_overflow_drop; 350 u32 pmem_fifo_overflow_drop; 351 u32 jabber_events; 352 u32 rx_roce_bytes_lsd; 353 u32 rx_roce_bytes_msd; 354 u32 rx_roce_frames; 355 u32 roce_drops_payload_len; 356 u32 roce_drops_crc; 357 }; 358 359 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 360 #define BE_RESET_VLAN_TAG_ID 0xFFFF 361 362 struct be_vf_cfg { 363 unsigned char mac_addr[ETH_ALEN]; 364 int if_handle; 365 int pmac_id; 366 u16 vlan_tag; 367 u32 tx_rate; 368 u32 plink_tracking; 369 u32 privileges; 370 bool spoofchk; 371 }; 372 373 enum vf_state { 374 ENABLED = 0, 375 ASSIGNED = 1 376 }; 377 378 #define BE_FLAGS_LINK_STATUS_INIT BIT(1) 379 #define BE_FLAGS_SRIOV_ENABLED BIT(2) 380 #define BE_FLAGS_WORKER_SCHEDULED BIT(3) 381 #define BE_FLAGS_NAPI_ENABLED BIT(6) 382 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD BIT(7) 383 #define BE_FLAGS_VXLAN_OFFLOADS BIT(8) 384 #define BE_FLAGS_SETUP_DONE BIT(9) 385 #define BE_FLAGS_EVT_INCOMPATIBLE_SFP BIT(10) 386 #define BE_FLAGS_ERR_DETECTION_SCHEDULED BIT(11) 387 #define BE_FLAGS_OS2BMC BIT(12) 388 389 #define BE_UC_PMAC_COUNT 30 390 #define BE_VF_UC_PMAC_COUNT 2 391 392 /* Ethtool set_dump flags */ 393 #define LANCER_INITIATE_FW_DUMP 0x1 394 #define LANCER_DELETE_FW_DUMP 0x2 395 396 struct phy_info { 397 /* From SFF-8472 spec */ 398 #define SFP_VENDOR_NAME_LEN 17 399 u8 transceiver; 400 u8 autoneg; 401 u8 fc_autoneg; 402 u8 port_type; 403 u16 phy_type; 404 u16 interface_type; 405 u32 misc_params; 406 u16 auto_speeds_supported; 407 u16 fixed_speeds_supported; 408 int link_speed; 409 u32 advertising; 410 u32 supported; 411 u8 cable_type; 412 u8 vendor_name[SFP_VENDOR_NAME_LEN]; 413 u8 vendor_pn[SFP_VENDOR_NAME_LEN]; 414 }; 415 416 struct be_resources { 417 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 418 u16 max_mcast_mac; 419 u16 max_tx_qs; 420 u16 max_rss_qs; 421 u16 max_rx_qs; 422 u16 max_cq_count; 423 u16 max_uc_mac; /* Max UC MACs programmable */ 424 u16 max_vlans; /* Number of vlans supported */ 425 u16 max_iface_count; 426 u16 max_mcc_count; 427 u16 max_evt_qs; 428 u32 if_cap_flags; 429 u32 vf_if_cap_flags; /* VF if capability flags */ 430 }; 431 432 #define be_is_os2bmc_enabled(adapter) (adapter->flags & BE_FLAGS_OS2BMC) 433 434 struct rss_info { 435 u64 rss_flags; 436 u8 rsstable[RSS_INDIR_TABLE_LEN]; 437 u8 rss_queue[RSS_INDIR_TABLE_LEN]; 438 u8 rss_hkey[RSS_HASH_KEY_LEN]; 439 }; 440 441 #define BE_INVALID_DIE_TEMP 0xFF 442 struct be_hwmon { 443 struct device *hwmon_dev; 444 u8 be_on_die_temp; /* Unit: millidegree Celsius */ 445 }; 446 447 /* Macros to read/write the 'features' word of be_wrb_params structure. 448 */ 449 #define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT 450 #define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT) 451 452 #define BE_WRB_F_GET(word, name) \ 453 (((word) & (BE_WRB_F_MASK(name))) >> BE_WRB_F_BIT(name)) 454 455 #define BE_WRB_F_SET(word, name, val) \ 456 ((word) |= (((val) << BE_WRB_F_BIT(name)) & BE_WRB_F_MASK(name))) 457 458 /* Feature/offload bits */ 459 enum { 460 BE_WRB_F_CRC_BIT, /* Ethernet CRC */ 461 BE_WRB_F_IPCS_BIT, /* IP csum */ 462 BE_WRB_F_TCPCS_BIT, /* TCP csum */ 463 BE_WRB_F_UDPCS_BIT, /* UDP csum */ 464 BE_WRB_F_LSO_BIT, /* LSO */ 465 BE_WRB_F_LSO6_BIT, /* LSO6 */ 466 BE_WRB_F_VLAN_BIT, /* VLAN */ 467 BE_WRB_F_VLAN_SKIP_HW_BIT, /* Skip VLAN tag (workaround) */ 468 BE_WRB_F_OS2BMC_BIT /* Send packet to the management ring */ 469 }; 470 471 /* The structure below provides a HW-agnostic abstraction of WRB params 472 * retrieved from a TX skb. This is in turn passed to chip specific routines 473 * during transmit, to set the corresponding params in the WRB. 474 */ 475 struct be_wrb_params { 476 u32 features; /* Feature bits */ 477 u16 vlan_tag; /* VLAN tag */ 478 u16 lso_mss; /* MSS for LSO */ 479 }; 480 481 struct be_adapter { 482 struct pci_dev *pdev; 483 struct net_device *netdev; 484 485 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 486 u8 __iomem *db; /* Door Bell */ 487 u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */ 488 489 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 490 struct be_dma_mem mbox_mem; 491 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 492 * is stored for freeing purpose */ 493 struct be_dma_mem mbox_mem_alloced; 494 495 struct be_mcc_obj mcc_obj; 496 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 497 spinlock_t mcc_cq_lock; 498 499 u16 cfg_num_qs; /* configured via set-channels */ 500 u16 num_evt_qs; 501 u16 num_msix_vec; 502 struct be_eq_obj eq_obj[MAX_EVT_QS]; 503 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 504 bool isr_registered; 505 506 /* TX Rings */ 507 u16 num_tx_qs; 508 struct be_tx_obj tx_obj[MAX_TX_QS]; 509 510 /* Rx rings */ 511 u16 num_rx_qs; 512 u16 num_rss_qs; 513 u16 need_def_rxq; 514 struct be_rx_obj rx_obj[MAX_RX_QS]; 515 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 516 517 struct be_drv_stats drv_stats; 518 struct be_aic_obj aic_obj[MAX_EVT_QS]; 519 u8 vlan_prio_bmap; /* Available Priority BitMap */ 520 u16 recommended_prio; /* Recommended Priority */ 521 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 522 523 struct be_dma_mem stats_cmd; 524 /* Work queue used to perform periodic tasks like getting statistics */ 525 struct delayed_work work; 526 u16 work_counter; 527 528 struct delayed_work be_err_detection_work; 529 u8 err_flags; 530 u32 flags; 531 u32 cmd_privileges; 532 /* Ethtool knobs and info */ 533 char fw_ver[FW_VER_LEN]; 534 char fw_on_flash[FW_VER_LEN]; 535 536 /* IFACE filtering fields */ 537 int if_handle; /* Used to configure filtering */ 538 u32 if_flags; /* Interface filtering flags */ 539 u32 *pmac_id; /* MAC addr handle used by BE card */ 540 u32 uc_macs; /* Count of secondary UC MAC programmed */ 541 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; 542 u16 vlans_added; 543 544 u32 beacon_state; /* for set_phys_id */ 545 546 bool eeh_error; 547 bool fw_timeout; 548 bool hw_error; 549 550 u32 port_num; 551 char port_name; 552 u8 mc_type; 553 u32 function_mode; 554 u32 function_caps; 555 u32 rx_fc; /* Rx flow control */ 556 u32 tx_fc; /* Tx flow control */ 557 bool stats_cmd_sent; 558 struct { 559 u32 size; 560 u32 total_size; 561 u64 io_addr; 562 } roce_db; 563 u32 num_msix_roce_vec; 564 struct ocrdma_dev *ocrdma_dev; 565 struct list_head entry; 566 567 u32 flash_status; 568 struct completion et_cmd_compl; 569 570 struct be_resources pool_res; /* resources available for the port */ 571 struct be_resources res; /* resources available for the func */ 572 u16 num_vfs; /* Number of VFs provisioned by PF */ 573 u8 virtfn; 574 struct be_vf_cfg *vf_cfg; 575 bool be3_native; 576 u32 sli_family; 577 u8 hba_port_num; 578 u16 pvid; 579 __be16 vxlan_port; 580 int vxlan_port_count; 581 struct phy_info phy; 582 u8 wol_cap; 583 bool wol_en; 584 u16 asic_rev; 585 u16 qnq_vid; 586 u32 msg_enable; 587 int be_get_temp_freq; 588 struct be_hwmon hwmon_info; 589 u8 pf_number; 590 struct rss_info rss_info; 591 /* Filters for packets that need to be sent to BMC */ 592 u32 bmc_filt_mask; 593 }; 594 595 #define be_physfn(adapter) (!adapter->virtfn) 596 #define be_virtfn(adapter) (adapter->virtfn) 597 #define sriov_enabled(adapter) (adapter->flags & \ 598 BE_FLAGS_SRIOV_ENABLED) 599 600 #define for_all_vfs(adapter, vf_cfg, i) \ 601 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 602 i++, vf_cfg++) 603 604 #define ON 1 605 #define OFF 0 606 607 #define be_max_vlans(adapter) (adapter->res.max_vlans) 608 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 609 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 610 #define be_max_vfs(adapter) (adapter->pool_res.max_vfs) 611 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 612 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 613 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 614 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 615 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 616 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 617 618 static inline u16 be_max_qs(struct be_adapter *adapter) 619 { 620 /* If no RSS, need atleast the one def RXQ */ 621 u16 num = max_t(u16, be_max_rss(adapter), 1); 622 623 num = min(num, be_max_eqs(adapter)); 624 return min_t(u16, num, num_online_cpus()); 625 } 626 627 /* Is BE in pvid_tagging mode */ 628 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 629 630 /* Is BE in QNQ multi-channel mode */ 631 #define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE) 632 633 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 634 adapter->pdev->device == OC_DEVICE_ID4) 635 636 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 637 adapter->pdev->device == OC_DEVICE_ID6) 638 639 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 640 adapter->pdev->device == OC_DEVICE_ID2) 641 642 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 643 adapter->pdev->device == OC_DEVICE_ID1) 644 645 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 646 647 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 648 (adapter->function_mode & RDMA_ENABLED)) 649 650 extern const struct ethtool_ops be_ethtool_ops; 651 652 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 653 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 654 adapter->num_msix_vec : 1) 655 #define tx_stats(txo) (&(txo)->stats) 656 #define rx_stats(rxo) (&(rxo)->stats) 657 658 /* The default RXQ is the last RXQ */ 659 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 660 661 #define for_all_rx_queues(adapter, rxo, i) \ 662 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 663 i++, rxo++) 664 665 #define for_all_rss_queues(adapter, rxo, i) \ 666 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rss_qs; \ 667 i++, rxo++) 668 669 #define for_all_tx_queues(adapter, txo, i) \ 670 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 671 i++, txo++) 672 673 #define for_all_evt_queues(adapter, eqo, i) \ 674 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 675 i++, eqo++) 676 677 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 678 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 679 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 680 681 #define for_all_tx_queues_on_eq(adapter, eqo, txo, i) \ 682 for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\ 683 i += adapter->num_evt_qs, txo += adapter->num_evt_qs) 684 685 #define is_mcc_eqo(eqo) (eqo->idx == 0) 686 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 687 688 #define PAGE_SHIFT_4K 12 689 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 690 691 /* Returns number of pages spanned by the data starting at the given addr */ 692 #define PAGES_4K_SPANNED(_address, size) \ 693 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 694 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 695 696 /* Returns bit offset within a DWORD of a bitfield */ 697 #define AMAP_BIT_OFFSET(_struct, field) \ 698 (((size_t)&(((_struct *)0)->field))%32) 699 700 /* Returns the bit mask of the field that is NOT shifted into location. */ 701 static inline u32 amap_mask(u32 bitsize) 702 { 703 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 704 } 705 706 static inline void 707 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 708 { 709 u32 *dw = (u32 *) ptr + dw_offset; 710 *dw &= ~(mask << offset); 711 *dw |= (mask & value) << offset; 712 } 713 714 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 715 amap_set(ptr, \ 716 offsetof(_struct, field)/32, \ 717 amap_mask(sizeof(((_struct *)0)->field)), \ 718 AMAP_BIT_OFFSET(_struct, field), \ 719 val) 720 721 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 722 { 723 u32 *dw = (u32 *) ptr; 724 return mask & (*(dw + dw_offset) >> offset); 725 } 726 727 #define AMAP_GET_BITS(_struct, field, ptr) \ 728 amap_get(ptr, \ 729 offsetof(_struct, field)/32, \ 730 amap_mask(sizeof(((_struct *)0)->field)), \ 731 AMAP_BIT_OFFSET(_struct, field)) 732 733 #define GET_RX_COMPL_V0_BITS(field, ptr) \ 734 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr) 735 736 #define GET_RX_COMPL_V1_BITS(field, ptr) \ 737 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr) 738 739 #define GET_TX_COMPL_BITS(field, ptr) \ 740 AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr) 741 742 #define SET_TX_WRB_HDR_BITS(field, ptr, val) \ 743 AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val) 744 745 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 746 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 747 static inline void swap_dws(void *wrb, int len) 748 { 749 #ifdef __BIG_ENDIAN 750 u32 *dw = wrb; 751 BUG_ON(len % 4); 752 do { 753 *dw = cpu_to_le32(*dw); 754 dw++; 755 len -= 4; 756 } while (len); 757 #endif /* __BIG_ENDIAN */ 758 } 759 760 #define be_cmd_status(status) (status > 0 ? -EIO : status) 761 762 static inline u8 is_tcp_pkt(struct sk_buff *skb) 763 { 764 u8 val = 0; 765 766 if (ip_hdr(skb)->version == 4) 767 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 768 else if (ip_hdr(skb)->version == 6) 769 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 770 771 return val; 772 } 773 774 static inline u8 is_udp_pkt(struct sk_buff *skb) 775 { 776 u8 val = 0; 777 778 if (ip_hdr(skb)->version == 4) 779 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 780 else if (ip_hdr(skb)->version == 6) 781 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 782 783 return val; 784 } 785 786 static inline bool is_ipv4_pkt(struct sk_buff *skb) 787 { 788 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 789 } 790 791 #define BE_ERROR_EEH 1 792 #define BE_ERROR_UE BIT(1) 793 #define BE_ERROR_FW BIT(2) 794 #define BE_ERROR_HW (BE_ERROR_EEH | BE_ERROR_UE) 795 #define BE_ERROR_ANY (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_FW) 796 #define BE_CLEAR_ALL 0xFF 797 798 static inline u8 be_check_error(struct be_adapter *adapter, u32 err_type) 799 { 800 return (adapter->err_flags & err_type); 801 } 802 803 static inline void be_set_error(struct be_adapter *adapter, int err_type) 804 { 805 struct net_device *netdev = adapter->netdev; 806 807 adapter->err_flags |= err_type; 808 netif_carrier_off(netdev); 809 810 dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name); 811 } 812 813 static inline void be_clear_error(struct be_adapter *adapter, int err_type) 814 { 815 adapter->err_flags &= ~err_type; 816 } 817 818 static inline bool be_multi_rxq(const struct be_adapter *adapter) 819 { 820 return adapter->num_rx_qs > 1; 821 } 822 823 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 824 u16 num_popped); 825 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 826 void be_parse_stats(struct be_adapter *adapter); 827 int be_load_fw(struct be_adapter *adapter, u8 *func); 828 bool be_is_wol_supported(struct be_adapter *adapter); 829 bool be_pause_supported(struct be_adapter *adapter); 830 u32 be_get_fw_log_level(struct be_adapter *adapter); 831 int be_update_queues(struct be_adapter *adapter); 832 int be_poll(struct napi_struct *napi, int budget); 833 void be_eqd_update(struct be_adapter *adapter, bool force_update); 834 835 /* 836 * internal function to initialize-cleanup roce device. 837 */ 838 void be_roce_dev_add(struct be_adapter *); 839 void be_roce_dev_remove(struct be_adapter *); 840 841 /* 842 * internal function to open-close roce device during ifup-ifdown. 843 */ 844 void be_roce_dev_open(struct be_adapter *); 845 void be_roce_dev_close(struct be_adapter *); 846 void be_roce_dev_shutdown(struct be_adapter *); 847 848 #endif /* BE_H */ 849