1 /* 2 * Copyright (C) 2005 - 2011 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "4.4.161.0u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect 10Gbps NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 90 #define BE_NUM_VLANS_SUPPORTED 64 91 #define BE_MAX_EQD 96u 92 #define BE_MAX_TX_FRAG_COUNT 30 93 94 #define EVNT_Q_LEN 1024 95 #define TX_Q_LEN 2048 96 #define TX_CQ_LEN 1024 97 #define RX_Q_LEN 1024 /* Does not support any other value */ 98 #define RX_CQ_LEN 1024 99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 100 #define MCC_CQ_LEN 256 101 102 #define BE3_MAX_RSS_QS 8 103 #define BE2_MAX_RSS_QS 4 104 #define MAX_RSS_QS BE3_MAX_RSS_QS 105 #define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */ 106 107 #define MAX_TX_QS 8 108 #define MAX_ROCE_EQS 5 109 #define MAX_MSIX_VECTORS (MAX_RSS_QS + MAX_ROCE_EQS) /* RSS qs + RoCE */ 110 #define BE_TX_BUDGET 256 111 #define BE_NAPI_WEIGHT 64 112 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 113 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 114 115 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 116 #define FW_VER_LEN 32 117 118 struct be_dma_mem { 119 void *va; 120 dma_addr_t dma; 121 u32 size; 122 }; 123 124 struct be_queue_info { 125 struct be_dma_mem dma_mem; 126 u16 len; 127 u16 entry_size; /* Size of an element in the queue */ 128 u16 id; 129 u16 tail, head; 130 bool created; 131 atomic_t used; /* Number of valid elements in the queue */ 132 }; 133 134 static inline u32 MODULO(u16 val, u16 limit) 135 { 136 BUG_ON(limit & (limit - 1)); 137 return val & (limit - 1); 138 } 139 140 static inline void index_adv(u16 *index, u16 val, u16 limit) 141 { 142 *index = MODULO((*index + val), limit); 143 } 144 145 static inline void index_inc(u16 *index, u16 limit) 146 { 147 *index = MODULO((*index + 1), limit); 148 } 149 150 static inline void *queue_head_node(struct be_queue_info *q) 151 { 152 return q->dma_mem.va + q->head * q->entry_size; 153 } 154 155 static inline void *queue_tail_node(struct be_queue_info *q) 156 { 157 return q->dma_mem.va + q->tail * q->entry_size; 158 } 159 160 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 161 { 162 return q->dma_mem.va + index * q->entry_size; 163 } 164 165 static inline void queue_head_inc(struct be_queue_info *q) 166 { 167 index_inc(&q->head, q->len); 168 } 169 170 static inline void index_dec(u16 *index, u16 limit) 171 { 172 *index = MODULO((*index - 1), limit); 173 } 174 175 static inline void queue_tail_inc(struct be_queue_info *q) 176 { 177 index_inc(&q->tail, q->len); 178 } 179 180 struct be_eq_obj { 181 struct be_queue_info q; 182 char desc[32]; 183 184 /* Adaptive interrupt coalescing (AIC) info */ 185 bool enable_aic; 186 u32 min_eqd; /* in usecs */ 187 u32 max_eqd; /* in usecs */ 188 u32 eqd; /* configured val when aic is off */ 189 u32 cur_eqd; /* in usecs */ 190 191 u8 idx; /* array index */ 192 u16 tx_budget; 193 u16 spurious_intr; 194 struct napi_struct napi; 195 struct be_adapter *adapter; 196 } ____cacheline_aligned_in_smp; 197 198 struct be_mcc_obj { 199 struct be_queue_info q; 200 struct be_queue_info cq; 201 bool rearm_cq; 202 }; 203 204 struct be_tx_stats { 205 u64 tx_bytes; 206 u64 tx_pkts; 207 u64 tx_reqs; 208 u64 tx_wrbs; 209 u64 tx_compl; 210 ulong tx_jiffies; 211 u32 tx_stops; 212 struct u64_stats_sync sync; 213 struct u64_stats_sync sync_compl; 214 }; 215 216 struct be_tx_obj { 217 struct be_queue_info q; 218 struct be_queue_info cq; 219 /* Remember the skbs that were transmitted */ 220 struct sk_buff *sent_skb_list[TX_Q_LEN]; 221 struct be_tx_stats stats; 222 } ____cacheline_aligned_in_smp; 223 224 /* Struct to remember the pages posted for rx frags */ 225 struct be_rx_page_info { 226 struct page *page; 227 DEFINE_DMA_UNMAP_ADDR(bus); 228 u16 page_offset; 229 bool last_page_user; 230 }; 231 232 struct be_rx_stats { 233 u64 rx_bytes; 234 u64 rx_pkts; 235 u64 rx_pkts_prev; 236 ulong rx_jiffies; 237 u32 rx_drops_no_skbs; /* skb allocation errors */ 238 u32 rx_drops_no_frags; /* HW has no fetched frags */ 239 u32 rx_post_fail; /* page post alloc failures */ 240 u32 rx_compl; 241 u32 rx_mcast_pkts; 242 u32 rx_compl_err; /* completions with err set */ 243 u32 rx_pps; /* pkts per second */ 244 struct u64_stats_sync sync; 245 }; 246 247 struct be_rx_compl_info { 248 u32 rss_hash; 249 u16 vlan_tag; 250 u16 pkt_size; 251 u16 rxq_idx; 252 u16 port; 253 u8 vlanf; 254 u8 num_rcvd; 255 u8 err; 256 u8 ipf; 257 u8 tcpf; 258 u8 udpf; 259 u8 ip_csum; 260 u8 l4_csum; 261 u8 ipv6; 262 u8 vtm; 263 u8 pkt_type; 264 }; 265 266 struct be_rx_obj { 267 struct be_adapter *adapter; 268 struct be_queue_info q; 269 struct be_queue_info cq; 270 struct be_rx_compl_info rxcp; 271 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 272 struct be_rx_stats stats; 273 u8 rss_id; 274 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 275 } ____cacheline_aligned_in_smp; 276 277 struct be_drv_stats { 278 u32 be_on_die_temperature; 279 u32 eth_red_drops; 280 u32 rx_drops_no_pbuf; 281 u32 rx_drops_no_txpb; 282 u32 rx_drops_no_erx_descr; 283 u32 rx_drops_no_tpre_descr; 284 u32 rx_drops_too_many_frags; 285 u32 forwarded_packets; 286 u32 rx_drops_mtu; 287 u32 rx_crc_errors; 288 u32 rx_alignment_symbol_errors; 289 u32 rx_pause_frames; 290 u32 rx_priority_pause_frames; 291 u32 rx_control_frames; 292 u32 rx_in_range_errors; 293 u32 rx_out_range_errors; 294 u32 rx_frame_too_long; 295 u32 rx_address_mismatch_drops; 296 u32 rx_dropped_too_small; 297 u32 rx_dropped_too_short; 298 u32 rx_dropped_header_too_small; 299 u32 rx_dropped_tcp_length; 300 u32 rx_dropped_runt; 301 u32 rx_ip_checksum_errs; 302 u32 rx_tcp_checksum_errs; 303 u32 rx_udp_checksum_errs; 304 u32 tx_pauseframes; 305 u32 tx_priority_pauseframes; 306 u32 tx_controlframes; 307 u32 rxpp_fifo_overflow_drop; 308 u32 rx_input_fifo_overflow_drop; 309 u32 pmem_fifo_overflow_drop; 310 u32 jabber_events; 311 }; 312 313 struct be_vf_cfg { 314 unsigned char mac_addr[ETH_ALEN]; 315 int if_handle; 316 int pmac_id; 317 u16 def_vid; 318 u16 vlan_tag; 319 u32 tx_rate; 320 }; 321 322 enum vf_state { 323 ENABLED = 0, 324 ASSIGNED = 1 325 }; 326 327 #define BE_FLAGS_LINK_STATUS_INIT 1 328 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 329 #define BE_UC_PMAC_COUNT 30 330 #define BE_VF_UC_PMAC_COUNT 2 331 332 struct phy_info { 333 u8 transceiver; 334 u8 autoneg; 335 u8 fc_autoneg; 336 u8 port_type; 337 u16 phy_type; 338 u16 interface_type; 339 u32 misc_params; 340 u16 auto_speeds_supported; 341 u16 fixed_speeds_supported; 342 int link_speed; 343 u32 dac_cable_len; 344 u32 advertising; 345 u32 supported; 346 }; 347 348 struct be_adapter { 349 struct pci_dev *pdev; 350 struct net_device *netdev; 351 352 u8 __iomem *db; /* Door Bell */ 353 354 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 355 struct be_dma_mem mbox_mem; 356 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 357 * is stored for freeing purpose */ 358 struct be_dma_mem mbox_mem_alloced; 359 360 struct be_mcc_obj mcc_obj; 361 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 362 spinlock_t mcc_cq_lock; 363 364 u32 num_msix_vec; 365 u32 num_evt_qs; 366 struct be_eq_obj eq_obj[MAX_MSIX_VECTORS]; 367 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 368 bool isr_registered; 369 370 /* TX Rings */ 371 u32 num_tx_qs; 372 struct be_tx_obj tx_obj[MAX_TX_QS]; 373 374 /* Rx rings */ 375 u32 num_rx_qs; 376 struct be_rx_obj rx_obj[MAX_RX_QS]; 377 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 378 379 struct be_drv_stats drv_stats; 380 u16 vlans_added; 381 u8 vlan_tag[VLAN_N_VID]; 382 u8 vlan_prio_bmap; /* Available Priority BitMap */ 383 u16 recommended_prio; /* Recommended Priority */ 384 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 385 386 struct be_dma_mem stats_cmd; 387 /* Work queue used to perform periodic tasks like getting statistics */ 388 struct delayed_work work; 389 u16 work_counter; 390 391 struct delayed_work func_recovery_work; 392 u32 flags; 393 u32 cmd_privileges; 394 /* Ethtool knobs and info */ 395 char fw_ver[FW_VER_LEN]; 396 int if_handle; /* Used to configure filtering */ 397 u32 *pmac_id; /* MAC addr handle used by BE card */ 398 u32 beacon_state; /* for set_phys_id */ 399 400 bool eeh_error; 401 bool fw_timeout; 402 bool hw_error; 403 404 u32 port_num; 405 bool promiscuous; 406 u32 function_mode; 407 u32 function_caps; 408 u32 rx_fc; /* Rx flow control */ 409 u32 tx_fc; /* Tx flow control */ 410 bool stats_cmd_sent; 411 u32 if_type; 412 struct { 413 u32 size; 414 u32 total_size; 415 u64 io_addr; 416 } roce_db; 417 u32 num_msix_roce_vec; 418 struct ocrdma_dev *ocrdma_dev; 419 struct list_head entry; 420 421 u32 flash_status; 422 struct completion flash_compl; 423 424 u32 num_vfs; /* Number of VFs provisioned by PF driver */ 425 u32 dev_num_vfs; /* Number of VFs supported by HW */ 426 u8 virtfn; 427 struct be_vf_cfg *vf_cfg; 428 bool be3_native; 429 u32 sli_family; 430 u8 hba_port_num; 431 u16 pvid; 432 struct phy_info phy; 433 u8 wol_cap; 434 bool wol; 435 u32 uc_macs; /* Count of secondary UC MAC programmed */ 436 u32 msg_enable; 437 int be_get_temp_freq; 438 u16 max_mcast_mac; 439 u16 max_tx_queues; 440 u16 max_rss_queues; 441 u16 max_rx_queues; 442 u16 max_pmac_cnt; 443 u16 max_vlans; 444 u16 max_event_queues; 445 u32 if_cap_flags; 446 u8 pf_number; 447 }; 448 449 #define be_physfn(adapter) (!adapter->virtfn) 450 #define sriov_enabled(adapter) (adapter->num_vfs > 0) 451 #define sriov_want(adapter) (adapter->dev_num_vfs && num_vfs && \ 452 be_physfn(adapter)) 453 #define for_all_vfs(adapter, vf_cfg, i) \ 454 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 455 i++, vf_cfg++) 456 457 #define ON 1 458 #define OFF 0 459 460 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 461 adapter->pdev->device == OC_DEVICE_ID4) 462 463 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 464 adapter->pdev->device == OC_DEVICE_ID6) 465 466 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 467 adapter->pdev->device == OC_DEVICE_ID2) 468 469 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 470 adapter->pdev->device == OC_DEVICE_ID1) 471 472 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 473 474 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 475 (adapter->function_mode & RDMA_ENABLED)) 476 477 extern const struct ethtool_ops be_ethtool_ops; 478 479 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 480 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 481 adapter->num_msix_vec : 1) 482 #define tx_stats(txo) (&(txo)->stats) 483 #define rx_stats(rxo) (&(rxo)->stats) 484 485 /* The default RXQ is the last RXQ */ 486 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 487 488 #define for_all_rx_queues(adapter, rxo, i) \ 489 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 490 i++, rxo++) 491 492 /* Skip the default non-rss queue (last one)*/ 493 #define for_all_rss_queues(adapter, rxo, i) \ 494 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 495 i++, rxo++) 496 497 #define for_all_tx_queues(adapter, txo, i) \ 498 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 499 i++, txo++) 500 501 #define for_all_evt_queues(adapter, eqo, i) \ 502 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 503 i++, eqo++) 504 505 #define is_mcc_eqo(eqo) (eqo->idx == 0) 506 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 507 508 #define PAGE_SHIFT_4K 12 509 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 510 511 /* Returns number of pages spanned by the data starting at the given addr */ 512 #define PAGES_4K_SPANNED(_address, size) \ 513 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 514 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 515 516 /* Returns bit offset within a DWORD of a bitfield */ 517 #define AMAP_BIT_OFFSET(_struct, field) \ 518 (((size_t)&(((_struct *)0)->field))%32) 519 520 /* Returns the bit mask of the field that is NOT shifted into location. */ 521 static inline u32 amap_mask(u32 bitsize) 522 { 523 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 524 } 525 526 static inline void 527 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 528 { 529 u32 *dw = (u32 *) ptr + dw_offset; 530 *dw &= ~(mask << offset); 531 *dw |= (mask & value) << offset; 532 } 533 534 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 535 amap_set(ptr, \ 536 offsetof(_struct, field)/32, \ 537 amap_mask(sizeof(((_struct *)0)->field)), \ 538 AMAP_BIT_OFFSET(_struct, field), \ 539 val) 540 541 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 542 { 543 u32 *dw = (u32 *) ptr; 544 return mask & (*(dw + dw_offset) >> offset); 545 } 546 547 #define AMAP_GET_BITS(_struct, field, ptr) \ 548 amap_get(ptr, \ 549 offsetof(_struct, field)/32, \ 550 amap_mask(sizeof(((_struct *)0)->field)), \ 551 AMAP_BIT_OFFSET(_struct, field)) 552 553 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 554 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 555 static inline void swap_dws(void *wrb, int len) 556 { 557 #ifdef __BIG_ENDIAN 558 u32 *dw = wrb; 559 BUG_ON(len % 4); 560 do { 561 *dw = cpu_to_le32(*dw); 562 dw++; 563 len -= 4; 564 } while (len); 565 #endif /* __BIG_ENDIAN */ 566 } 567 568 static inline u8 is_tcp_pkt(struct sk_buff *skb) 569 { 570 u8 val = 0; 571 572 if (ip_hdr(skb)->version == 4) 573 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 574 else if (ip_hdr(skb)->version == 6) 575 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 576 577 return val; 578 } 579 580 static inline u8 is_udp_pkt(struct sk_buff *skb) 581 { 582 u8 val = 0; 583 584 if (ip_hdr(skb)->version == 4) 585 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 586 else if (ip_hdr(skb)->version == 6) 587 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 588 589 return val; 590 } 591 592 static inline bool is_ipv4_pkt(struct sk_buff *skb) 593 { 594 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 595 } 596 597 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 598 { 599 u32 addr; 600 601 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 602 603 mac[5] = (u8)(addr & 0xFF); 604 mac[4] = (u8)((addr >> 8) & 0xFF); 605 mac[3] = (u8)((addr >> 16) & 0xFF); 606 /* Use the OUI from the current MAC address */ 607 memcpy(mac, adapter->netdev->dev_addr, 3); 608 } 609 610 static inline bool be_multi_rxq(const struct be_adapter *adapter) 611 { 612 return adapter->num_rx_qs > 1; 613 } 614 615 static inline bool be_error(struct be_adapter *adapter) 616 { 617 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 618 } 619 620 static inline bool be_hw_error(struct be_adapter *adapter) 621 { 622 return adapter->eeh_error || adapter->hw_error; 623 } 624 625 static inline void be_clear_all_error(struct be_adapter *adapter) 626 { 627 adapter->eeh_error = false; 628 adapter->hw_error = false; 629 adapter->fw_timeout = false; 630 } 631 632 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 633 { 634 struct pci_dev *pdev = adapter->pdev; 635 636 if (!be_physfn(adapter)) 637 return true; 638 639 switch (pdev->subsystem_device) { 640 case OC_SUBSYS_DEVICE_ID1: 641 case OC_SUBSYS_DEVICE_ID2: 642 case OC_SUBSYS_DEVICE_ID3: 643 case OC_SUBSYS_DEVICE_ID4: 644 return true; 645 default: 646 return false; 647 } 648 } 649 650 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 651 u16 num_popped); 652 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status); 653 extern void be_parse_stats(struct be_adapter *adapter); 654 extern int be_load_fw(struct be_adapter *adapter, u8 *func); 655 extern bool be_is_wol_supported(struct be_adapter *adapter); 656 extern bool be_pause_supported(struct be_adapter *adapter); 657 extern u32 be_get_fw_log_level(struct be_adapter *adapter); 658 659 /* 660 * internal function to initialize-cleanup roce device. 661 */ 662 extern void be_roce_dev_add(struct be_adapter *); 663 extern void be_roce_dev_remove(struct be_adapter *); 664 665 /* 666 * internal function to open-close roce device during ifup-ifdown. 667 */ 668 extern void be_roce_dev_open(struct be_adapter *); 669 extern void be_roce_dev_close(struct be_adapter *); 670 671 #endif /* BE_H */ 672