1 /* 2 * Copyright (C) 2005 - 2014 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "10.2u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 90 #define BE_NUM_VLANS_SUPPORTED 64 91 #define BE_MAX_EQD 128u 92 #define BE_MAX_TX_FRAG_COUNT 30 93 94 #define EVNT_Q_LEN 1024 95 #define TX_Q_LEN 2048 96 #define TX_CQ_LEN 1024 97 #define RX_Q_LEN 1024 /* Does not support any other value */ 98 #define RX_CQ_LEN 1024 99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 100 #define MCC_CQ_LEN 256 101 102 #define BE2_MAX_RSS_QS 4 103 #define BE3_MAX_RSS_QS 16 104 #define BE3_MAX_TX_QS 16 105 #define BE3_MAX_EVT_QS 16 106 #define BE3_SRIOV_MAX_EVT_QS 8 107 108 #define MAX_RX_QS 32 109 #define MAX_EVT_QS 32 110 #define MAX_TX_QS 32 111 112 #define MAX_ROCE_EQS 5 113 #define MAX_MSIX_VECTORS 32 114 #define MIN_MSIX_VECTORS 1 115 #define BE_TX_BUDGET 256 116 #define BE_NAPI_WEIGHT 64 117 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 118 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 119 120 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 121 #define FW_VER_LEN 32 122 123 struct be_dma_mem { 124 void *va; 125 dma_addr_t dma; 126 u32 size; 127 }; 128 129 struct be_queue_info { 130 struct be_dma_mem dma_mem; 131 u16 len; 132 u16 entry_size; /* Size of an element in the queue */ 133 u16 id; 134 u16 tail, head; 135 bool created; 136 atomic_t used; /* Number of valid elements in the queue */ 137 }; 138 139 static inline u32 MODULO(u16 val, u16 limit) 140 { 141 BUG_ON(limit & (limit - 1)); 142 return val & (limit - 1); 143 } 144 145 static inline void index_adv(u16 *index, u16 val, u16 limit) 146 { 147 *index = MODULO((*index + val), limit); 148 } 149 150 static inline void index_inc(u16 *index, u16 limit) 151 { 152 *index = MODULO((*index + 1), limit); 153 } 154 155 static inline void *queue_head_node(struct be_queue_info *q) 156 { 157 return q->dma_mem.va + q->head * q->entry_size; 158 } 159 160 static inline void *queue_tail_node(struct be_queue_info *q) 161 { 162 return q->dma_mem.va + q->tail * q->entry_size; 163 } 164 165 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 166 { 167 return q->dma_mem.va + index * q->entry_size; 168 } 169 170 static inline void queue_head_inc(struct be_queue_info *q) 171 { 172 index_inc(&q->head, q->len); 173 } 174 175 static inline void index_dec(u16 *index, u16 limit) 176 { 177 *index = MODULO((*index - 1), limit); 178 } 179 180 static inline void queue_tail_inc(struct be_queue_info *q) 181 { 182 index_inc(&q->tail, q->len); 183 } 184 185 struct be_eq_obj { 186 struct be_queue_info q; 187 char desc[32]; 188 189 /* Adaptive interrupt coalescing (AIC) info */ 190 bool enable_aic; 191 u32 min_eqd; /* in usecs */ 192 u32 max_eqd; /* in usecs */ 193 u32 eqd; /* configured val when aic is off */ 194 u32 cur_eqd; /* in usecs */ 195 196 u8 idx; /* array index */ 197 u8 msix_idx; 198 u16 tx_budget; 199 u16 spurious_intr; 200 struct napi_struct napi; 201 struct be_adapter *adapter; 202 203 #ifdef CONFIG_NET_RX_BUSY_POLL 204 #define BE_EQ_IDLE 0 205 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 206 #define BE_EQ_POLL 2 /* poll owns this EQ */ 207 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 208 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 209 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 210 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 211 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 212 unsigned int state; 213 spinlock_t lock; /* lock to serialize napi and busy-poll */ 214 #endif /* CONFIG_NET_RX_BUSY_POLL */ 215 } ____cacheline_aligned_in_smp; 216 217 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 218 bool enable; 219 u32 min_eqd; /* in usecs */ 220 u32 max_eqd; /* in usecs */ 221 u32 prev_eqd; /* in usecs */ 222 u32 et_eqd; /* configured val when aic is off */ 223 ulong jiffies; 224 u64 rx_pkts_prev; /* Used to calculate RX pps */ 225 u64 tx_reqs_prev; /* Used to calculate TX pps */ 226 }; 227 228 enum { 229 NAPI_POLLING, 230 BUSY_POLLING 231 }; 232 233 struct be_mcc_obj { 234 struct be_queue_info q; 235 struct be_queue_info cq; 236 bool rearm_cq; 237 }; 238 239 struct be_tx_stats { 240 u64 tx_bytes; 241 u64 tx_pkts; 242 u64 tx_reqs; 243 u64 tx_wrbs; 244 u64 tx_compl; 245 ulong tx_jiffies; 246 u32 tx_stops; 247 u32 tx_drv_drops; /* pkts dropped by driver */ 248 struct u64_stats_sync sync; 249 struct u64_stats_sync sync_compl; 250 }; 251 252 struct be_tx_obj { 253 u32 db_offset; 254 struct be_queue_info q; 255 struct be_queue_info cq; 256 /* Remember the skbs that were transmitted */ 257 struct sk_buff *sent_skb_list[TX_Q_LEN]; 258 struct be_tx_stats stats; 259 } ____cacheline_aligned_in_smp; 260 261 /* Struct to remember the pages posted for rx frags */ 262 struct be_rx_page_info { 263 struct page *page; 264 /* set to page-addr for last frag of the page & frag-addr otherwise */ 265 DEFINE_DMA_UNMAP_ADDR(bus); 266 u16 page_offset; 267 bool last_frag; /* last frag of the page */ 268 }; 269 270 struct be_rx_stats { 271 u64 rx_bytes; 272 u64 rx_pkts; 273 u32 rx_drops_no_skbs; /* skb allocation errors */ 274 u32 rx_drops_no_frags; /* HW has no fetched frags */ 275 u32 rx_post_fail; /* page post alloc failures */ 276 u32 rx_compl; 277 u32 rx_mcast_pkts; 278 u32 rx_compl_err; /* completions with err set */ 279 struct u64_stats_sync sync; 280 }; 281 282 struct be_rx_compl_info { 283 u32 rss_hash; 284 u16 vlan_tag; 285 u16 pkt_size; 286 u16 port; 287 u8 vlanf; 288 u8 num_rcvd; 289 u8 err; 290 u8 ipf; 291 u8 tcpf; 292 u8 udpf; 293 u8 ip_csum; 294 u8 l4_csum; 295 u8 ipv6; 296 u8 qnq; 297 u8 pkt_type; 298 u8 ip_frag; 299 u8 tunneled; 300 }; 301 302 struct be_rx_obj { 303 struct be_adapter *adapter; 304 struct be_queue_info q; 305 struct be_queue_info cq; 306 struct be_rx_compl_info rxcp; 307 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 308 struct be_rx_stats stats; 309 u8 rss_id; 310 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 311 } ____cacheline_aligned_in_smp; 312 313 struct be_drv_stats { 314 u32 be_on_die_temperature; 315 u32 eth_red_drops; 316 u32 rx_drops_no_pbuf; 317 u32 rx_drops_no_txpb; 318 u32 rx_drops_no_erx_descr; 319 u32 rx_drops_no_tpre_descr; 320 u32 rx_drops_too_many_frags; 321 u32 forwarded_packets; 322 u32 rx_drops_mtu; 323 u32 rx_crc_errors; 324 u32 rx_alignment_symbol_errors; 325 u32 rx_pause_frames; 326 u32 rx_priority_pause_frames; 327 u32 rx_control_frames; 328 u32 rx_in_range_errors; 329 u32 rx_out_range_errors; 330 u32 rx_frame_too_long; 331 u32 rx_address_filtered; 332 u32 rx_dropped_too_small; 333 u32 rx_dropped_too_short; 334 u32 rx_dropped_header_too_small; 335 u32 rx_dropped_tcp_length; 336 u32 rx_dropped_runt; 337 u32 rx_ip_checksum_errs; 338 u32 rx_tcp_checksum_errs; 339 u32 rx_udp_checksum_errs; 340 u32 tx_pauseframes; 341 u32 tx_priority_pauseframes; 342 u32 tx_controlframes; 343 u32 rxpp_fifo_overflow_drop; 344 u32 rx_input_fifo_overflow_drop; 345 u32 pmem_fifo_overflow_drop; 346 u32 jabber_events; 347 u32 rx_roce_bytes_lsd; 348 u32 rx_roce_bytes_msd; 349 u32 rx_roce_frames; 350 u32 roce_drops_payload_len; 351 u32 roce_drops_crc; 352 }; 353 354 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 355 #define BE_RESET_VLAN_TAG_ID 0xFFFF 356 357 struct be_vf_cfg { 358 unsigned char mac_addr[ETH_ALEN]; 359 int if_handle; 360 int pmac_id; 361 u16 vlan_tag; 362 u32 tx_rate; 363 u32 plink_tracking; 364 }; 365 366 enum vf_state { 367 ENABLED = 0, 368 ASSIGNED = 1 369 }; 370 371 #define BE_FLAGS_LINK_STATUS_INIT 1 372 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 373 #define BE_FLAGS_VLAN_PROMISC (1 << 4) 374 #define BE_FLAGS_NAPI_ENABLED (1 << 9) 375 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 376 #define BE_FLAGS_VXLAN_OFFLOADS (1 << 12) 377 378 #define BE_UC_PMAC_COUNT 30 379 #define BE_VF_UC_PMAC_COUNT 2 380 /* Ethtool set_dump flags */ 381 #define LANCER_INITIATE_FW_DUMP 0x1 382 383 struct phy_info { 384 u8 transceiver; 385 u8 autoneg; 386 u8 fc_autoneg; 387 u8 port_type; 388 u16 phy_type; 389 u16 interface_type; 390 u32 misc_params; 391 u16 auto_speeds_supported; 392 u16 fixed_speeds_supported; 393 int link_speed; 394 u32 dac_cable_len; 395 u32 advertising; 396 u32 supported; 397 }; 398 399 struct be_resources { 400 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 401 u16 max_mcast_mac; 402 u16 max_tx_qs; 403 u16 max_rss_qs; 404 u16 max_rx_qs; 405 u16 max_uc_mac; /* Max UC MACs programmable */ 406 u16 max_vlans; /* Number of vlans supported */ 407 u16 max_evt_qs; 408 u32 if_cap_flags; 409 }; 410 411 struct be_adapter { 412 struct pci_dev *pdev; 413 struct net_device *netdev; 414 415 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 416 u8 __iomem *db; /* Door Bell */ 417 418 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 419 struct be_dma_mem mbox_mem; 420 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 421 * is stored for freeing purpose */ 422 struct be_dma_mem mbox_mem_alloced; 423 424 struct be_mcc_obj mcc_obj; 425 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 426 spinlock_t mcc_cq_lock; 427 428 u16 cfg_num_qs; /* configured via set-channels */ 429 u16 num_evt_qs; 430 u16 num_msix_vec; 431 struct be_eq_obj eq_obj[MAX_EVT_QS]; 432 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 433 bool isr_registered; 434 435 /* TX Rings */ 436 u16 num_tx_qs; 437 struct be_tx_obj tx_obj[MAX_TX_QS]; 438 439 /* Rx rings */ 440 u16 num_rx_qs; 441 struct be_rx_obj rx_obj[MAX_RX_QS]; 442 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 443 444 struct be_drv_stats drv_stats; 445 struct be_aic_obj aic_obj[MAX_EVT_QS]; 446 u16 vlans_added; 447 u8 vlan_tag[VLAN_N_VID]; 448 u8 vlan_prio_bmap; /* Available Priority BitMap */ 449 u16 recommended_prio; /* Recommended Priority */ 450 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 451 452 struct be_dma_mem stats_cmd; 453 /* Work queue used to perform periodic tasks like getting statistics */ 454 struct delayed_work work; 455 u16 work_counter; 456 457 struct delayed_work func_recovery_work; 458 u32 flags; 459 u32 cmd_privileges; 460 /* Ethtool knobs and info */ 461 char fw_ver[FW_VER_LEN]; 462 char fw_on_flash[FW_VER_LEN]; 463 int if_handle; /* Used to configure filtering */ 464 u32 *pmac_id; /* MAC addr handle used by BE card */ 465 u32 beacon_state; /* for set_phys_id */ 466 467 bool eeh_error; 468 bool fw_timeout; 469 bool hw_error; 470 471 u32 port_num; 472 bool promiscuous; 473 u8 mc_type; 474 u32 function_mode; 475 u32 function_caps; 476 u32 rx_fc; /* Rx flow control */ 477 u32 tx_fc; /* Tx flow control */ 478 bool stats_cmd_sent; 479 struct { 480 u32 size; 481 u32 total_size; 482 u64 io_addr; 483 } roce_db; 484 u32 num_msix_roce_vec; 485 struct ocrdma_dev *ocrdma_dev; 486 struct list_head entry; 487 488 u32 flash_status; 489 struct completion et_cmd_compl; 490 491 struct be_resources res; /* resources available for the func */ 492 u16 num_vfs; /* Number of VFs provisioned by PF */ 493 u8 virtfn; 494 struct be_vf_cfg *vf_cfg; 495 bool be3_native; 496 u32 sli_family; 497 u8 hba_port_num; 498 u16 pvid; 499 __be16 vxlan_port; 500 struct phy_info phy; 501 u8 wol_cap; 502 bool wol_en; 503 u32 uc_macs; /* Count of secondary UC MAC programmed */ 504 u16 asic_rev; 505 u16 qnq_vid; 506 u32 msg_enable; 507 int be_get_temp_freq; 508 u8 pf_number; 509 u64 rss_flags; 510 }; 511 512 #define be_physfn(adapter) (!adapter->virtfn) 513 #define be_virtfn(adapter) (adapter->virtfn) 514 #define sriov_enabled(adapter) (adapter->num_vfs > 0) 515 #define sriov_want(adapter) (be_physfn(adapter) && \ 516 (num_vfs || pci_num_vf(adapter->pdev))) 517 #define for_all_vfs(adapter, vf_cfg, i) \ 518 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 519 i++, vf_cfg++) 520 521 #define ON 1 522 #define OFF 0 523 524 #define be_max_vlans(adapter) (adapter->res.max_vlans) 525 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 526 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 527 #define be_max_vfs(adapter) (adapter->res.max_vfs) 528 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 529 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 530 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 531 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 532 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 533 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 534 535 static inline u16 be_max_qs(struct be_adapter *adapter) 536 { 537 /* If no RSS, need atleast the one def RXQ */ 538 u16 num = max_t(u16, be_max_rss(adapter), 1); 539 540 num = min(num, be_max_eqs(adapter)); 541 return min_t(u16, num, num_online_cpus()); 542 } 543 544 /* Is BE in pvid_tagging mode */ 545 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 546 547 /* Is BE in QNQ multi-channel mode */ 548 #define be_is_qnq_mode(adapter) (adapter->mc_type == FLEX10 || \ 549 adapter->mc_type == vNIC1 || \ 550 adapter->mc_type == UFP) 551 552 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 553 adapter->pdev->device == OC_DEVICE_ID4) 554 555 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 556 adapter->pdev->device == OC_DEVICE_ID6) 557 558 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 559 adapter->pdev->device == OC_DEVICE_ID2) 560 561 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 562 adapter->pdev->device == OC_DEVICE_ID1) 563 564 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 565 566 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 567 (adapter->function_mode & RDMA_ENABLED)) 568 569 extern const struct ethtool_ops be_ethtool_ops; 570 571 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 572 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 573 adapter->num_msix_vec : 1) 574 #define tx_stats(txo) (&(txo)->stats) 575 #define rx_stats(rxo) (&(rxo)->stats) 576 577 /* The default RXQ is the last RXQ */ 578 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 579 580 #define for_all_rx_queues(adapter, rxo, i) \ 581 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 582 i++, rxo++) 583 584 /* Skip the default non-rss queue (last one)*/ 585 #define for_all_rss_queues(adapter, rxo, i) \ 586 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 587 i++, rxo++) 588 589 #define for_all_tx_queues(adapter, txo, i) \ 590 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 591 i++, txo++) 592 593 #define for_all_evt_queues(adapter, eqo, i) \ 594 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 595 i++, eqo++) 596 597 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 598 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 599 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 600 601 #define is_mcc_eqo(eqo) (eqo->idx == 0) 602 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 603 604 #define PAGE_SHIFT_4K 12 605 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 606 607 /* Returns number of pages spanned by the data starting at the given addr */ 608 #define PAGES_4K_SPANNED(_address, size) \ 609 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 610 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 611 612 /* Returns bit offset within a DWORD of a bitfield */ 613 #define AMAP_BIT_OFFSET(_struct, field) \ 614 (((size_t)&(((_struct *)0)->field))%32) 615 616 /* Returns the bit mask of the field that is NOT shifted into location. */ 617 static inline u32 amap_mask(u32 bitsize) 618 { 619 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 620 } 621 622 static inline void 623 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 624 { 625 u32 *dw = (u32 *) ptr + dw_offset; 626 *dw &= ~(mask << offset); 627 *dw |= (mask & value) << offset; 628 } 629 630 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 631 amap_set(ptr, \ 632 offsetof(_struct, field)/32, \ 633 amap_mask(sizeof(((_struct *)0)->field)), \ 634 AMAP_BIT_OFFSET(_struct, field), \ 635 val) 636 637 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 638 { 639 u32 *dw = (u32 *) ptr; 640 return mask & (*(dw + dw_offset) >> offset); 641 } 642 643 #define AMAP_GET_BITS(_struct, field, ptr) \ 644 amap_get(ptr, \ 645 offsetof(_struct, field)/32, \ 646 amap_mask(sizeof(((_struct *)0)->field)), \ 647 AMAP_BIT_OFFSET(_struct, field)) 648 649 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 650 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 651 static inline void swap_dws(void *wrb, int len) 652 { 653 #ifdef __BIG_ENDIAN 654 u32 *dw = wrb; 655 BUG_ON(len % 4); 656 do { 657 *dw = cpu_to_le32(*dw); 658 dw++; 659 len -= 4; 660 } while (len); 661 #endif /* __BIG_ENDIAN */ 662 } 663 664 static inline u8 is_tcp_pkt(struct sk_buff *skb) 665 { 666 u8 val = 0; 667 668 if (ip_hdr(skb)->version == 4) 669 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 670 else if (ip_hdr(skb)->version == 6) 671 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 672 673 return val; 674 } 675 676 static inline u8 is_udp_pkt(struct sk_buff *skb) 677 { 678 u8 val = 0; 679 680 if (ip_hdr(skb)->version == 4) 681 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 682 else if (ip_hdr(skb)->version == 6) 683 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 684 685 return val; 686 } 687 688 static inline bool is_ipv4_pkt(struct sk_buff *skb) 689 { 690 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 691 } 692 693 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 694 { 695 u32 addr; 696 697 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 698 699 mac[5] = (u8)(addr & 0xFF); 700 mac[4] = (u8)((addr >> 8) & 0xFF); 701 mac[3] = (u8)((addr >> 16) & 0xFF); 702 /* Use the OUI from the current MAC address */ 703 memcpy(mac, adapter->netdev->dev_addr, 3); 704 } 705 706 static inline bool be_multi_rxq(const struct be_adapter *adapter) 707 { 708 return adapter->num_rx_qs > 1; 709 } 710 711 static inline bool be_error(struct be_adapter *adapter) 712 { 713 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 714 } 715 716 static inline bool be_hw_error(struct be_adapter *adapter) 717 { 718 return adapter->eeh_error || adapter->hw_error; 719 } 720 721 static inline void be_clear_all_error(struct be_adapter *adapter) 722 { 723 adapter->eeh_error = false; 724 adapter->hw_error = false; 725 adapter->fw_timeout = false; 726 } 727 728 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 729 { 730 struct pci_dev *pdev = adapter->pdev; 731 732 if (!be_physfn(adapter)) 733 return true; 734 735 switch (pdev->subsystem_device) { 736 case OC_SUBSYS_DEVICE_ID1: 737 case OC_SUBSYS_DEVICE_ID2: 738 case OC_SUBSYS_DEVICE_ID3: 739 case OC_SUBSYS_DEVICE_ID4: 740 return true; 741 default: 742 return false; 743 } 744 } 745 746 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter) 747 { 748 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 749 } 750 751 #ifdef CONFIG_NET_RX_BUSY_POLL 752 static inline bool be_lock_napi(struct be_eq_obj *eqo) 753 { 754 bool status = true; 755 756 spin_lock(&eqo->lock); /* BH is already disabled */ 757 if (eqo->state & BE_EQ_LOCKED) { 758 WARN_ON(eqo->state & BE_EQ_NAPI); 759 eqo->state |= BE_EQ_NAPI_YIELD; 760 status = false; 761 } else { 762 eqo->state = BE_EQ_NAPI; 763 } 764 spin_unlock(&eqo->lock); 765 return status; 766 } 767 768 static inline void be_unlock_napi(struct be_eq_obj *eqo) 769 { 770 spin_lock(&eqo->lock); /* BH is already disabled */ 771 772 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD)); 773 eqo->state = BE_EQ_IDLE; 774 775 spin_unlock(&eqo->lock); 776 } 777 778 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 779 { 780 bool status = true; 781 782 spin_lock_bh(&eqo->lock); 783 if (eqo->state & BE_EQ_LOCKED) { 784 eqo->state |= BE_EQ_POLL_YIELD; 785 status = false; 786 } else { 787 eqo->state |= BE_EQ_POLL; 788 } 789 spin_unlock_bh(&eqo->lock); 790 return status; 791 } 792 793 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 794 { 795 spin_lock_bh(&eqo->lock); 796 797 WARN_ON(eqo->state & (BE_EQ_NAPI)); 798 eqo->state = BE_EQ_IDLE; 799 800 spin_unlock_bh(&eqo->lock); 801 } 802 803 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 804 { 805 spin_lock_init(&eqo->lock); 806 eqo->state = BE_EQ_IDLE; 807 } 808 809 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 810 { 811 local_bh_disable(); 812 813 /* It's enough to just acquire napi lock on the eqo to stop 814 * be_busy_poll() from processing any queueus. 815 */ 816 while (!be_lock_napi(eqo)) 817 mdelay(1); 818 819 local_bh_enable(); 820 } 821 822 #else /* CONFIG_NET_RX_BUSY_POLL */ 823 824 static inline bool be_lock_napi(struct be_eq_obj *eqo) 825 { 826 return true; 827 } 828 829 static inline void be_unlock_napi(struct be_eq_obj *eqo) 830 { 831 } 832 833 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 834 { 835 return false; 836 } 837 838 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 839 { 840 } 841 842 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 843 { 844 } 845 846 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 847 { 848 } 849 #endif /* CONFIG_NET_RX_BUSY_POLL */ 850 851 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 852 u16 num_popped); 853 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 854 void be_parse_stats(struct be_adapter *adapter); 855 int be_load_fw(struct be_adapter *adapter, u8 *func); 856 bool be_is_wol_supported(struct be_adapter *adapter); 857 bool be_pause_supported(struct be_adapter *adapter); 858 u32 be_get_fw_log_level(struct be_adapter *adapter); 859 860 static inline int fw_major_num(const char *fw_ver) 861 { 862 int fw_major = 0; 863 864 sscanf(fw_ver, "%d.", &fw_major); 865 866 return fw_major; 867 } 868 869 int be_update_queues(struct be_adapter *adapter); 870 int be_poll(struct napi_struct *napi, int budget); 871 872 /* 873 * internal function to initialize-cleanup roce device. 874 */ 875 void be_roce_dev_add(struct be_adapter *); 876 void be_roce_dev_remove(struct be_adapter *); 877 878 /* 879 * internal function to open-close roce device during ifup-ifdown. 880 */ 881 void be_roce_dev_open(struct be_adapter *); 882 void be_roce_dev_close(struct be_adapter *); 883 884 #endif /* BE_H */ 885