1 /* 2 * Copyright (C) 2005 - 2014 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "10.2u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 90 #define BE_NUM_VLANS_SUPPORTED 64 91 #define BE_MAX_EQD 128u 92 #define BE_MAX_TX_FRAG_COUNT 30 93 94 #define EVNT_Q_LEN 1024 95 #define TX_Q_LEN 2048 96 #define TX_CQ_LEN 1024 97 #define RX_Q_LEN 1024 /* Does not support any other value */ 98 #define RX_CQ_LEN 1024 99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 100 #define MCC_CQ_LEN 256 101 102 #define BE2_MAX_RSS_QS 4 103 #define BE3_MAX_RSS_QS 16 104 #define BE3_MAX_TX_QS 16 105 #define BE3_MAX_EVT_QS 16 106 #define BE3_SRIOV_MAX_EVT_QS 8 107 108 #define MAX_RX_QS 32 109 #define MAX_EVT_QS 32 110 #define MAX_TX_QS 32 111 112 #define MAX_ROCE_EQS 5 113 #define MAX_MSIX_VECTORS 32 114 #define MIN_MSIX_VECTORS 1 115 #define BE_TX_BUDGET 256 116 #define BE_NAPI_WEIGHT 64 117 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 118 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 119 120 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 121 #define FW_VER_LEN 32 122 123 struct be_dma_mem { 124 void *va; 125 dma_addr_t dma; 126 u32 size; 127 }; 128 129 struct be_queue_info { 130 struct be_dma_mem dma_mem; 131 u16 len; 132 u16 entry_size; /* Size of an element in the queue */ 133 u16 id; 134 u16 tail, head; 135 bool created; 136 atomic_t used; /* Number of valid elements in the queue */ 137 }; 138 139 static inline u32 MODULO(u16 val, u16 limit) 140 { 141 BUG_ON(limit & (limit - 1)); 142 return val & (limit - 1); 143 } 144 145 static inline void index_adv(u16 *index, u16 val, u16 limit) 146 { 147 *index = MODULO((*index + val), limit); 148 } 149 150 static inline void index_inc(u16 *index, u16 limit) 151 { 152 *index = MODULO((*index + 1), limit); 153 } 154 155 static inline void *queue_head_node(struct be_queue_info *q) 156 { 157 return q->dma_mem.va + q->head * q->entry_size; 158 } 159 160 static inline void *queue_tail_node(struct be_queue_info *q) 161 { 162 return q->dma_mem.va + q->tail * q->entry_size; 163 } 164 165 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 166 { 167 return q->dma_mem.va + index * q->entry_size; 168 } 169 170 static inline void queue_head_inc(struct be_queue_info *q) 171 { 172 index_inc(&q->head, q->len); 173 } 174 175 static inline void index_dec(u16 *index, u16 limit) 176 { 177 *index = MODULO((*index - 1), limit); 178 } 179 180 static inline void queue_tail_inc(struct be_queue_info *q) 181 { 182 index_inc(&q->tail, q->len); 183 } 184 185 struct be_eq_obj { 186 struct be_queue_info q; 187 char desc[32]; 188 189 /* Adaptive interrupt coalescing (AIC) info */ 190 bool enable_aic; 191 u32 min_eqd; /* in usecs */ 192 u32 max_eqd; /* in usecs */ 193 u32 eqd; /* configured val when aic is off */ 194 u32 cur_eqd; /* in usecs */ 195 196 u8 idx; /* array index */ 197 u8 msix_idx; 198 u16 tx_budget; 199 u16 spurious_intr; 200 struct napi_struct napi; 201 struct be_adapter *adapter; 202 203 #ifdef CONFIG_NET_RX_BUSY_POLL 204 #define BE_EQ_IDLE 0 205 #define BE_EQ_NAPI 1 /* napi owns this EQ */ 206 #define BE_EQ_POLL 2 /* poll owns this EQ */ 207 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL) 208 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */ 209 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */ 210 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD) 211 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD) 212 unsigned int state; 213 spinlock_t lock; /* lock to serialize napi and busy-poll */ 214 #endif /* CONFIG_NET_RX_BUSY_POLL */ 215 } ____cacheline_aligned_in_smp; 216 217 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ 218 bool enable; 219 u32 min_eqd; /* in usecs */ 220 u32 max_eqd; /* in usecs */ 221 u32 prev_eqd; /* in usecs */ 222 u32 et_eqd; /* configured val when aic is off */ 223 ulong jiffies; 224 u64 rx_pkts_prev; /* Used to calculate RX pps */ 225 u64 tx_reqs_prev; /* Used to calculate TX pps */ 226 }; 227 228 enum { 229 NAPI_POLLING, 230 BUSY_POLLING 231 }; 232 233 struct be_mcc_obj { 234 struct be_queue_info q; 235 struct be_queue_info cq; 236 bool rearm_cq; 237 }; 238 239 struct be_tx_stats { 240 u64 tx_bytes; 241 u64 tx_pkts; 242 u64 tx_reqs; 243 u64 tx_wrbs; 244 u64 tx_compl; 245 ulong tx_jiffies; 246 u32 tx_stops; 247 u32 tx_drv_drops; /* pkts dropped by driver */ 248 struct u64_stats_sync sync; 249 struct u64_stats_sync sync_compl; 250 }; 251 252 struct be_tx_obj { 253 u32 db_offset; 254 struct be_queue_info q; 255 struct be_queue_info cq; 256 /* Remember the skbs that were transmitted */ 257 struct sk_buff *sent_skb_list[TX_Q_LEN]; 258 struct be_tx_stats stats; 259 } ____cacheline_aligned_in_smp; 260 261 /* Struct to remember the pages posted for rx frags */ 262 struct be_rx_page_info { 263 struct page *page; 264 /* set to page-addr for last frag of the page & frag-addr otherwise */ 265 DEFINE_DMA_UNMAP_ADDR(bus); 266 u16 page_offset; 267 bool last_frag; /* last frag of the page */ 268 }; 269 270 struct be_rx_stats { 271 u64 rx_bytes; 272 u64 rx_pkts; 273 u32 rx_drops_no_skbs; /* skb allocation errors */ 274 u32 rx_drops_no_frags; /* HW has no fetched frags */ 275 u32 rx_post_fail; /* page post alloc failures */ 276 u32 rx_compl; 277 u32 rx_mcast_pkts; 278 u32 rx_compl_err; /* completions with err set */ 279 struct u64_stats_sync sync; 280 }; 281 282 struct be_rx_compl_info { 283 u32 rss_hash; 284 u16 vlan_tag; 285 u16 pkt_size; 286 u16 port; 287 u8 vlanf; 288 u8 num_rcvd; 289 u8 err; 290 u8 ipf; 291 u8 tcpf; 292 u8 udpf; 293 u8 ip_csum; 294 u8 l4_csum; 295 u8 ipv6; 296 u8 qnq; 297 u8 pkt_type; 298 u8 ip_frag; 299 u8 tunneled; 300 }; 301 302 struct be_rx_obj { 303 struct be_adapter *adapter; 304 struct be_queue_info q; 305 struct be_queue_info cq; 306 struct be_rx_compl_info rxcp; 307 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 308 struct be_rx_stats stats; 309 u8 rss_id; 310 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 311 } ____cacheline_aligned_in_smp; 312 313 struct be_drv_stats { 314 u32 be_on_die_temperature; 315 u32 eth_red_drops; 316 u32 rx_drops_no_pbuf; 317 u32 rx_drops_no_txpb; 318 u32 rx_drops_no_erx_descr; 319 u32 rx_drops_no_tpre_descr; 320 u32 rx_drops_too_many_frags; 321 u32 forwarded_packets; 322 u32 rx_drops_mtu; 323 u32 rx_crc_errors; 324 u32 rx_alignment_symbol_errors; 325 u32 rx_pause_frames; 326 u32 rx_priority_pause_frames; 327 u32 rx_control_frames; 328 u32 rx_in_range_errors; 329 u32 rx_out_range_errors; 330 u32 rx_frame_too_long; 331 u32 rx_address_filtered; 332 u32 rx_dropped_too_small; 333 u32 rx_dropped_too_short; 334 u32 rx_dropped_header_too_small; 335 u32 rx_dropped_tcp_length; 336 u32 rx_dropped_runt; 337 u32 rx_ip_checksum_errs; 338 u32 rx_tcp_checksum_errs; 339 u32 rx_udp_checksum_errs; 340 u32 tx_pauseframes; 341 u32 tx_priority_pauseframes; 342 u32 tx_controlframes; 343 u32 rxpp_fifo_overflow_drop; 344 u32 rx_input_fifo_overflow_drop; 345 u32 pmem_fifo_overflow_drop; 346 u32 jabber_events; 347 u32 rx_roce_bytes_lsd; 348 u32 rx_roce_bytes_msd; 349 u32 rx_roce_frames; 350 u32 roce_drops_payload_len; 351 u32 roce_drops_crc; 352 }; 353 354 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ 355 #define BE_RESET_VLAN_TAG_ID 0xFFFF 356 357 struct be_vf_cfg { 358 unsigned char mac_addr[ETH_ALEN]; 359 int if_handle; 360 int pmac_id; 361 u16 vlan_tag; 362 u32 tx_rate; 363 u32 plink_tracking; 364 }; 365 366 enum vf_state { 367 ENABLED = 0, 368 ASSIGNED = 1 369 }; 370 371 #define BE_FLAGS_LINK_STATUS_INIT 1 372 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 373 #define BE_FLAGS_VLAN_PROMISC (1 << 4) 374 #define BE_FLAGS_NAPI_ENABLED (1 << 9) 375 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 376 #define BE_FLAGS_VXLAN_OFFLOADS (1 << 12) 377 #define BE_FLAGS_SETUP_DONE (1 << 13) 378 379 #define BE_UC_PMAC_COUNT 30 380 #define BE_VF_UC_PMAC_COUNT 2 381 /* Ethtool set_dump flags */ 382 #define LANCER_INITIATE_FW_DUMP 0x1 383 384 struct phy_info { 385 u8 transceiver; 386 u8 autoneg; 387 u8 fc_autoneg; 388 u8 port_type; 389 u16 phy_type; 390 u16 interface_type; 391 u32 misc_params; 392 u16 auto_speeds_supported; 393 u16 fixed_speeds_supported; 394 int link_speed; 395 u32 dac_cable_len; 396 u32 advertising; 397 u32 supported; 398 }; 399 400 struct be_resources { 401 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 402 u16 max_mcast_mac; 403 u16 max_tx_qs; 404 u16 max_rss_qs; 405 u16 max_rx_qs; 406 u16 max_uc_mac; /* Max UC MACs programmable */ 407 u16 max_vlans; /* Number of vlans supported */ 408 u16 max_evt_qs; 409 u32 if_cap_flags; 410 }; 411 412 struct be_adapter { 413 struct pci_dev *pdev; 414 struct net_device *netdev; 415 416 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 417 u8 __iomem *db; /* Door Bell */ 418 419 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 420 struct be_dma_mem mbox_mem; 421 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 422 * is stored for freeing purpose */ 423 struct be_dma_mem mbox_mem_alloced; 424 425 struct be_mcc_obj mcc_obj; 426 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 427 spinlock_t mcc_cq_lock; 428 429 u16 cfg_num_qs; /* configured via set-channels */ 430 u16 num_evt_qs; 431 u16 num_msix_vec; 432 struct be_eq_obj eq_obj[MAX_EVT_QS]; 433 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 434 bool isr_registered; 435 436 /* TX Rings */ 437 u16 num_tx_qs; 438 struct be_tx_obj tx_obj[MAX_TX_QS]; 439 440 /* Rx rings */ 441 u16 num_rx_qs; 442 struct be_rx_obj rx_obj[MAX_RX_QS]; 443 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 444 445 struct be_drv_stats drv_stats; 446 struct be_aic_obj aic_obj[MAX_EVT_QS]; 447 u16 vlans_added; 448 u8 vlan_tag[VLAN_N_VID]; 449 u8 vlan_prio_bmap; /* Available Priority BitMap */ 450 u16 recommended_prio; /* Recommended Priority */ 451 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 452 453 struct be_dma_mem stats_cmd; 454 /* Work queue used to perform periodic tasks like getting statistics */ 455 struct delayed_work work; 456 u16 work_counter; 457 458 struct delayed_work func_recovery_work; 459 u32 flags; 460 u32 cmd_privileges; 461 /* Ethtool knobs and info */ 462 char fw_ver[FW_VER_LEN]; 463 char fw_on_flash[FW_VER_LEN]; 464 int if_handle; /* Used to configure filtering */ 465 u32 *pmac_id; /* MAC addr handle used by BE card */ 466 u32 beacon_state; /* for set_phys_id */ 467 468 bool eeh_error; 469 bool fw_timeout; 470 bool hw_error; 471 472 u32 port_num; 473 bool promiscuous; 474 u8 mc_type; 475 u32 function_mode; 476 u32 function_caps; 477 u32 rx_fc; /* Rx flow control */ 478 u32 tx_fc; /* Tx flow control */ 479 bool stats_cmd_sent; 480 struct { 481 u32 size; 482 u32 total_size; 483 u64 io_addr; 484 } roce_db; 485 u32 num_msix_roce_vec; 486 struct ocrdma_dev *ocrdma_dev; 487 struct list_head entry; 488 489 u32 flash_status; 490 struct completion et_cmd_compl; 491 492 struct be_resources res; /* resources available for the func */ 493 u16 num_vfs; /* Number of VFs provisioned by PF */ 494 u8 virtfn; 495 struct be_vf_cfg *vf_cfg; 496 bool be3_native; 497 u32 sli_family; 498 u8 hba_port_num; 499 u16 pvid; 500 __be16 vxlan_port; 501 struct phy_info phy; 502 u8 wol_cap; 503 bool wol_en; 504 u32 uc_macs; /* Count of secondary UC MAC programmed */ 505 u16 asic_rev; 506 u16 qnq_vid; 507 u32 msg_enable; 508 int be_get_temp_freq; 509 u8 pf_number; 510 u64 rss_flags; 511 }; 512 513 #define be_physfn(adapter) (!adapter->virtfn) 514 #define be_virtfn(adapter) (adapter->virtfn) 515 #define sriov_enabled(adapter) (adapter->num_vfs > 0) 516 #define sriov_want(adapter) (be_physfn(adapter) && \ 517 (num_vfs || pci_num_vf(adapter->pdev))) 518 #define for_all_vfs(adapter, vf_cfg, i) \ 519 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 520 i++, vf_cfg++) 521 522 #define ON 1 523 #define OFF 0 524 525 #define be_max_vlans(adapter) (adapter->res.max_vlans) 526 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 527 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 528 #define be_max_vfs(adapter) (adapter->res.max_vfs) 529 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 530 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 531 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 532 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 533 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 534 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 535 536 static inline u16 be_max_qs(struct be_adapter *adapter) 537 { 538 /* If no RSS, need atleast the one def RXQ */ 539 u16 num = max_t(u16, be_max_rss(adapter), 1); 540 541 num = min(num, be_max_eqs(adapter)); 542 return min_t(u16, num, num_online_cpus()); 543 } 544 545 /* Is BE in pvid_tagging mode */ 546 #define be_pvid_tagging_enabled(adapter) (adapter->pvid) 547 548 /* Is BE in QNQ multi-channel mode */ 549 #define be_is_qnq_mode(adapter) (adapter->mc_type == FLEX10 || \ 550 adapter->mc_type == vNIC1 || \ 551 adapter->mc_type == UFP) 552 553 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 554 adapter->pdev->device == OC_DEVICE_ID4) 555 556 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 557 adapter->pdev->device == OC_DEVICE_ID6) 558 559 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 560 adapter->pdev->device == OC_DEVICE_ID2) 561 562 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 563 adapter->pdev->device == OC_DEVICE_ID1) 564 565 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 566 567 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 568 (adapter->function_mode & RDMA_ENABLED)) 569 570 extern const struct ethtool_ops be_ethtool_ops; 571 572 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 573 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 574 adapter->num_msix_vec : 1) 575 #define tx_stats(txo) (&(txo)->stats) 576 #define rx_stats(rxo) (&(rxo)->stats) 577 578 /* The default RXQ is the last RXQ */ 579 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 580 581 #define for_all_rx_queues(adapter, rxo, i) \ 582 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 583 i++, rxo++) 584 585 /* Skip the default non-rss queue (last one)*/ 586 #define for_all_rss_queues(adapter, rxo, i) \ 587 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 588 i++, rxo++) 589 590 #define for_all_tx_queues(adapter, txo, i) \ 591 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 592 i++, txo++) 593 594 #define for_all_evt_queues(adapter, eqo, i) \ 595 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 596 i++, eqo++) 597 598 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ 599 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ 600 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) 601 602 #define is_mcc_eqo(eqo) (eqo->idx == 0) 603 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 604 605 #define PAGE_SHIFT_4K 12 606 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 607 608 /* Returns number of pages spanned by the data starting at the given addr */ 609 #define PAGES_4K_SPANNED(_address, size) \ 610 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 611 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 612 613 /* Returns bit offset within a DWORD of a bitfield */ 614 #define AMAP_BIT_OFFSET(_struct, field) \ 615 (((size_t)&(((_struct *)0)->field))%32) 616 617 /* Returns the bit mask of the field that is NOT shifted into location. */ 618 static inline u32 amap_mask(u32 bitsize) 619 { 620 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 621 } 622 623 static inline void 624 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 625 { 626 u32 *dw = (u32 *) ptr + dw_offset; 627 *dw &= ~(mask << offset); 628 *dw |= (mask & value) << offset; 629 } 630 631 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 632 amap_set(ptr, \ 633 offsetof(_struct, field)/32, \ 634 amap_mask(sizeof(((_struct *)0)->field)), \ 635 AMAP_BIT_OFFSET(_struct, field), \ 636 val) 637 638 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 639 { 640 u32 *dw = (u32 *) ptr; 641 return mask & (*(dw + dw_offset) >> offset); 642 } 643 644 #define AMAP_GET_BITS(_struct, field, ptr) \ 645 amap_get(ptr, \ 646 offsetof(_struct, field)/32, \ 647 amap_mask(sizeof(((_struct *)0)->field)), \ 648 AMAP_BIT_OFFSET(_struct, field)) 649 650 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 651 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 652 static inline void swap_dws(void *wrb, int len) 653 { 654 #ifdef __BIG_ENDIAN 655 u32 *dw = wrb; 656 BUG_ON(len % 4); 657 do { 658 *dw = cpu_to_le32(*dw); 659 dw++; 660 len -= 4; 661 } while (len); 662 #endif /* __BIG_ENDIAN */ 663 } 664 665 static inline u8 is_tcp_pkt(struct sk_buff *skb) 666 { 667 u8 val = 0; 668 669 if (ip_hdr(skb)->version == 4) 670 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 671 else if (ip_hdr(skb)->version == 6) 672 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 673 674 return val; 675 } 676 677 static inline u8 is_udp_pkt(struct sk_buff *skb) 678 { 679 u8 val = 0; 680 681 if (ip_hdr(skb)->version == 4) 682 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 683 else if (ip_hdr(skb)->version == 6) 684 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 685 686 return val; 687 } 688 689 static inline bool is_ipv4_pkt(struct sk_buff *skb) 690 { 691 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 692 } 693 694 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 695 { 696 u32 addr; 697 698 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 699 700 mac[5] = (u8)(addr & 0xFF); 701 mac[4] = (u8)((addr >> 8) & 0xFF); 702 mac[3] = (u8)((addr >> 16) & 0xFF); 703 /* Use the OUI from the current MAC address */ 704 memcpy(mac, adapter->netdev->dev_addr, 3); 705 } 706 707 static inline bool be_multi_rxq(const struct be_adapter *adapter) 708 { 709 return adapter->num_rx_qs > 1; 710 } 711 712 static inline bool be_error(struct be_adapter *adapter) 713 { 714 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 715 } 716 717 static inline bool be_hw_error(struct be_adapter *adapter) 718 { 719 return adapter->eeh_error || adapter->hw_error; 720 } 721 722 static inline void be_clear_all_error(struct be_adapter *adapter) 723 { 724 adapter->eeh_error = false; 725 adapter->hw_error = false; 726 adapter->fw_timeout = false; 727 } 728 729 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 730 { 731 struct pci_dev *pdev = adapter->pdev; 732 733 if (!be_physfn(adapter)) 734 return true; 735 736 switch (pdev->subsystem_device) { 737 case OC_SUBSYS_DEVICE_ID1: 738 case OC_SUBSYS_DEVICE_ID2: 739 case OC_SUBSYS_DEVICE_ID3: 740 case OC_SUBSYS_DEVICE_ID4: 741 return true; 742 default: 743 return false; 744 } 745 } 746 747 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter) 748 { 749 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 750 } 751 752 #ifdef CONFIG_NET_RX_BUSY_POLL 753 static inline bool be_lock_napi(struct be_eq_obj *eqo) 754 { 755 bool status = true; 756 757 spin_lock(&eqo->lock); /* BH is already disabled */ 758 if (eqo->state & BE_EQ_LOCKED) { 759 WARN_ON(eqo->state & BE_EQ_NAPI); 760 eqo->state |= BE_EQ_NAPI_YIELD; 761 status = false; 762 } else { 763 eqo->state = BE_EQ_NAPI; 764 } 765 spin_unlock(&eqo->lock); 766 return status; 767 } 768 769 static inline void be_unlock_napi(struct be_eq_obj *eqo) 770 { 771 spin_lock(&eqo->lock); /* BH is already disabled */ 772 773 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD)); 774 eqo->state = BE_EQ_IDLE; 775 776 spin_unlock(&eqo->lock); 777 } 778 779 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 780 { 781 bool status = true; 782 783 spin_lock_bh(&eqo->lock); 784 if (eqo->state & BE_EQ_LOCKED) { 785 eqo->state |= BE_EQ_POLL_YIELD; 786 status = false; 787 } else { 788 eqo->state |= BE_EQ_POLL; 789 } 790 spin_unlock_bh(&eqo->lock); 791 return status; 792 } 793 794 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 795 { 796 spin_lock_bh(&eqo->lock); 797 798 WARN_ON(eqo->state & (BE_EQ_NAPI)); 799 eqo->state = BE_EQ_IDLE; 800 801 spin_unlock_bh(&eqo->lock); 802 } 803 804 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 805 { 806 spin_lock_init(&eqo->lock); 807 eqo->state = BE_EQ_IDLE; 808 } 809 810 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 811 { 812 local_bh_disable(); 813 814 /* It's enough to just acquire napi lock on the eqo to stop 815 * be_busy_poll() from processing any queueus. 816 */ 817 while (!be_lock_napi(eqo)) 818 mdelay(1); 819 820 local_bh_enable(); 821 } 822 823 #else /* CONFIG_NET_RX_BUSY_POLL */ 824 825 static inline bool be_lock_napi(struct be_eq_obj *eqo) 826 { 827 return true; 828 } 829 830 static inline void be_unlock_napi(struct be_eq_obj *eqo) 831 { 832 } 833 834 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo) 835 { 836 return false; 837 } 838 839 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo) 840 { 841 } 842 843 static inline void be_enable_busy_poll(struct be_eq_obj *eqo) 844 { 845 } 846 847 static inline void be_disable_busy_poll(struct be_eq_obj *eqo) 848 { 849 } 850 #endif /* CONFIG_NET_RX_BUSY_POLL */ 851 852 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 853 u16 num_popped); 854 void be_link_status_update(struct be_adapter *adapter, u8 link_status); 855 void be_parse_stats(struct be_adapter *adapter); 856 int be_load_fw(struct be_adapter *adapter, u8 *func); 857 bool be_is_wol_supported(struct be_adapter *adapter); 858 bool be_pause_supported(struct be_adapter *adapter); 859 u32 be_get_fw_log_level(struct be_adapter *adapter); 860 861 static inline int fw_major_num(const char *fw_ver) 862 { 863 int fw_major = 0; 864 865 sscanf(fw_ver, "%d.", &fw_major); 866 867 return fw_major; 868 } 869 870 int be_update_queues(struct be_adapter *adapter); 871 int be_poll(struct napi_struct *napi, int budget); 872 873 /* 874 * internal function to initialize-cleanup roce device. 875 */ 876 void be_roce_dev_add(struct be_adapter *); 877 void be_roce_dev_remove(struct be_adapter *); 878 879 /* 880 * internal function to open-close roce device during ifup-ifdown. 881 */ 882 void be_roce_dev_open(struct be_adapter *); 883 void be_roce_dev_close(struct be_adapter *); 884 885 #endif /* BE_H */ 886