1 /* 2 * Copyright (C) 2005 - 2013 Emulex 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@emulex.com 12 * 13 * Emulex 14 * 3333 Susan Street 15 * Costa Mesa, CA 92626 16 */ 17 18 #ifndef BE_H 19 #define BE_H 20 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <net/tcp.h> 25 #include <net/ip.h> 26 #include <net/ipv6.h> 27 #include <linux/if_vlan.h> 28 #include <linux/workqueue.h> 29 #include <linux/interrupt.h> 30 #include <linux/firmware.h> 31 #include <linux/slab.h> 32 #include <linux/u64_stats_sync.h> 33 34 #include "be_hw.h" 35 #include "be_roce.h" 36 37 #define DRV_VER "4.9.134.0u" 38 #define DRV_NAME "be2net" 39 #define BE_NAME "Emulex BladeEngine2" 40 #define BE3_NAME "Emulex BladeEngine3" 41 #define OC_NAME "Emulex OneConnect" 42 #define OC_NAME_BE OC_NAME "(be3)" 43 #define OC_NAME_LANCER OC_NAME "(Lancer)" 44 #define OC_NAME_SH OC_NAME "(Skyhawk)" 45 #define DRV_DESC "Emulex OneConnect 10Gbps NIC Driver" 46 47 #define BE_VENDOR_ID 0x19a2 48 #define EMULEX_VENDOR_ID 0x10df 49 #define BE_DEVICE_ID1 0x211 50 #define BE_DEVICE_ID2 0x221 51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ 52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ 53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ 54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ 55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ 56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ 57 #define OC_SUBSYS_DEVICE_ID1 0xE602 58 #define OC_SUBSYS_DEVICE_ID2 0xE642 59 #define OC_SUBSYS_DEVICE_ID3 0xE612 60 #define OC_SUBSYS_DEVICE_ID4 0xE652 61 62 static inline char *nic_name(struct pci_dev *pdev) 63 { 64 switch (pdev->device) { 65 case OC_DEVICE_ID1: 66 return OC_NAME; 67 case OC_DEVICE_ID2: 68 return OC_NAME_BE; 69 case OC_DEVICE_ID3: 70 case OC_DEVICE_ID4: 71 return OC_NAME_LANCER; 72 case BE_DEVICE_ID2: 73 return BE3_NAME; 74 case OC_DEVICE_ID5: 75 case OC_DEVICE_ID6: 76 return OC_NAME_SH; 77 default: 78 return BE_NAME; 79 } 80 } 81 82 /* Number of bytes of an RX frame that are copied to skb->data */ 83 #define BE_HDR_LEN ((u16) 64) 84 /* allocate extra space to allow tunneling decapsulation without head reallocation */ 85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64) 86 87 #define BE_MAX_JUMBO_FRAME_SIZE 9018 88 #define BE_MIN_MTU 256 89 90 #define BE_NUM_VLANS_SUPPORTED 64 91 #define BE_MAX_EQD 96u 92 #define BE_MAX_TX_FRAG_COUNT 30 93 94 #define EVNT_Q_LEN 1024 95 #define TX_Q_LEN 2048 96 #define TX_CQ_LEN 1024 97 #define RX_Q_LEN 1024 /* Does not support any other value */ 98 #define RX_CQ_LEN 1024 99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 100 #define MCC_CQ_LEN 256 101 102 #define BE2_MAX_RSS_QS 4 103 #define BE3_MAX_RSS_QS 16 104 #define BE3_MAX_TX_QS 16 105 #define BE3_MAX_EVT_QS 16 106 107 #define MAX_RX_QS 32 108 #define MAX_EVT_QS 32 109 #define MAX_TX_QS 32 110 111 #define MAX_ROCE_EQS 5 112 #define MAX_MSIX_VECTORS 32 113 #define MIN_MSIX_VECTORS 1 114 #define BE_TX_BUDGET 256 115 #define BE_NAPI_WEIGHT 64 116 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 117 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 118 119 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ 120 #define FW_VER_LEN 32 121 122 struct be_dma_mem { 123 void *va; 124 dma_addr_t dma; 125 u32 size; 126 }; 127 128 struct be_queue_info { 129 struct be_dma_mem dma_mem; 130 u16 len; 131 u16 entry_size; /* Size of an element in the queue */ 132 u16 id; 133 u16 tail, head; 134 bool created; 135 atomic_t used; /* Number of valid elements in the queue */ 136 }; 137 138 static inline u32 MODULO(u16 val, u16 limit) 139 { 140 BUG_ON(limit & (limit - 1)); 141 return val & (limit - 1); 142 } 143 144 static inline void index_adv(u16 *index, u16 val, u16 limit) 145 { 146 *index = MODULO((*index + val), limit); 147 } 148 149 static inline void index_inc(u16 *index, u16 limit) 150 { 151 *index = MODULO((*index + 1), limit); 152 } 153 154 static inline void *queue_head_node(struct be_queue_info *q) 155 { 156 return q->dma_mem.va + q->head * q->entry_size; 157 } 158 159 static inline void *queue_tail_node(struct be_queue_info *q) 160 { 161 return q->dma_mem.va + q->tail * q->entry_size; 162 } 163 164 static inline void *queue_index_node(struct be_queue_info *q, u16 index) 165 { 166 return q->dma_mem.va + index * q->entry_size; 167 } 168 169 static inline void queue_head_inc(struct be_queue_info *q) 170 { 171 index_inc(&q->head, q->len); 172 } 173 174 static inline void index_dec(u16 *index, u16 limit) 175 { 176 *index = MODULO((*index - 1), limit); 177 } 178 179 static inline void queue_tail_inc(struct be_queue_info *q) 180 { 181 index_inc(&q->tail, q->len); 182 } 183 184 struct be_eq_obj { 185 struct be_queue_info q; 186 char desc[32]; 187 188 /* Adaptive interrupt coalescing (AIC) info */ 189 bool enable_aic; 190 u32 min_eqd; /* in usecs */ 191 u32 max_eqd; /* in usecs */ 192 u32 eqd; /* configured val when aic is off */ 193 u32 cur_eqd; /* in usecs */ 194 195 u8 idx; /* array index */ 196 u8 msix_idx; 197 u16 tx_budget; 198 u16 spurious_intr; 199 struct napi_struct napi; 200 struct be_adapter *adapter; 201 } ____cacheline_aligned_in_smp; 202 203 struct be_mcc_obj { 204 struct be_queue_info q; 205 struct be_queue_info cq; 206 bool rearm_cq; 207 }; 208 209 struct be_tx_stats { 210 u64 tx_bytes; 211 u64 tx_pkts; 212 u64 tx_reqs; 213 u64 tx_wrbs; 214 u64 tx_compl; 215 ulong tx_jiffies; 216 u32 tx_stops; 217 struct u64_stats_sync sync; 218 struct u64_stats_sync sync_compl; 219 }; 220 221 struct be_tx_obj { 222 u32 db_offset; 223 struct be_queue_info q; 224 struct be_queue_info cq; 225 /* Remember the skbs that were transmitted */ 226 struct sk_buff *sent_skb_list[TX_Q_LEN]; 227 struct be_tx_stats stats; 228 } ____cacheline_aligned_in_smp; 229 230 /* Struct to remember the pages posted for rx frags */ 231 struct be_rx_page_info { 232 struct page *page; 233 DEFINE_DMA_UNMAP_ADDR(bus); 234 u16 page_offset; 235 bool last_page_user; 236 }; 237 238 struct be_rx_stats { 239 u64 rx_bytes; 240 u64 rx_pkts; 241 u64 rx_pkts_prev; 242 ulong rx_jiffies; 243 u32 rx_drops_no_skbs; /* skb allocation errors */ 244 u32 rx_drops_no_frags; /* HW has no fetched frags */ 245 u32 rx_post_fail; /* page post alloc failures */ 246 u32 rx_compl; 247 u32 rx_mcast_pkts; 248 u32 rx_compl_err; /* completions with err set */ 249 u32 rx_pps; /* pkts per second */ 250 struct u64_stats_sync sync; 251 }; 252 253 struct be_rx_compl_info { 254 u32 rss_hash; 255 u16 vlan_tag; 256 u16 pkt_size; 257 u16 rxq_idx; 258 u16 port; 259 u8 vlanf; 260 u8 num_rcvd; 261 u8 err; 262 u8 ipf; 263 u8 tcpf; 264 u8 udpf; 265 u8 ip_csum; 266 u8 l4_csum; 267 u8 ipv6; 268 u8 vtm; 269 u8 pkt_type; 270 u8 ip_frag; 271 }; 272 273 struct be_rx_obj { 274 struct be_adapter *adapter; 275 struct be_queue_info q; 276 struct be_queue_info cq; 277 struct be_rx_compl_info rxcp; 278 struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 279 struct be_rx_stats stats; 280 u8 rss_id; 281 bool rx_post_starved; /* Zero rx frags have been posted to BE */ 282 } ____cacheline_aligned_in_smp; 283 284 struct be_drv_stats { 285 u32 be_on_die_temperature; 286 u32 eth_red_drops; 287 u32 rx_drops_no_pbuf; 288 u32 rx_drops_no_txpb; 289 u32 rx_drops_no_erx_descr; 290 u32 rx_drops_no_tpre_descr; 291 u32 rx_drops_too_many_frags; 292 u32 forwarded_packets; 293 u32 rx_drops_mtu; 294 u32 rx_crc_errors; 295 u32 rx_alignment_symbol_errors; 296 u32 rx_pause_frames; 297 u32 rx_priority_pause_frames; 298 u32 rx_control_frames; 299 u32 rx_in_range_errors; 300 u32 rx_out_range_errors; 301 u32 rx_frame_too_long; 302 u32 rx_address_filtered; 303 u32 rx_dropped_too_small; 304 u32 rx_dropped_too_short; 305 u32 rx_dropped_header_too_small; 306 u32 rx_dropped_tcp_length; 307 u32 rx_dropped_runt; 308 u32 rx_ip_checksum_errs; 309 u32 rx_tcp_checksum_errs; 310 u32 rx_udp_checksum_errs; 311 u32 tx_pauseframes; 312 u32 tx_priority_pauseframes; 313 u32 tx_controlframes; 314 u32 rxpp_fifo_overflow_drop; 315 u32 rx_input_fifo_overflow_drop; 316 u32 pmem_fifo_overflow_drop; 317 u32 jabber_events; 318 }; 319 320 struct be_vf_cfg { 321 unsigned char mac_addr[ETH_ALEN]; 322 int if_handle; 323 int pmac_id; 324 u16 def_vid; 325 u16 vlan_tag; 326 u32 tx_rate; 327 }; 328 329 enum vf_state { 330 ENABLED = 0, 331 ASSIGNED = 1 332 }; 333 334 #define BE_FLAGS_LINK_STATUS_INIT 1 335 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) 336 #define BE_FLAGS_NAPI_ENABLED (1 << 9) 337 #define BE_UC_PMAC_COUNT 30 338 #define BE_VF_UC_PMAC_COUNT 2 339 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) 340 341 /* Ethtool set_dump flags */ 342 #define LANCER_INITIATE_FW_DUMP 0x1 343 344 struct phy_info { 345 u8 transceiver; 346 u8 autoneg; 347 u8 fc_autoneg; 348 u8 port_type; 349 u16 phy_type; 350 u16 interface_type; 351 u32 misc_params; 352 u16 auto_speeds_supported; 353 u16 fixed_speeds_supported; 354 int link_speed; 355 u32 dac_cable_len; 356 u32 advertising; 357 u32 supported; 358 }; 359 360 struct be_resources { 361 u16 max_vfs; /* Total VFs "really" supported by FW/HW */ 362 u16 max_mcast_mac; 363 u16 max_tx_qs; 364 u16 max_rss_qs; 365 u16 max_rx_qs; 366 u16 max_uc_mac; /* Max UC MACs programmable */ 367 u16 max_vlans; /* Number of vlans supported */ 368 u16 max_evt_qs; 369 u32 if_cap_flags; 370 }; 371 372 struct be_adapter { 373 struct pci_dev *pdev; 374 struct net_device *netdev; 375 376 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ 377 u8 __iomem *db; /* Door Bell */ 378 379 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ 380 struct be_dma_mem mbox_mem; 381 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 382 * is stored for freeing purpose */ 383 struct be_dma_mem mbox_mem_alloced; 384 385 struct be_mcc_obj mcc_obj; 386 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 387 spinlock_t mcc_cq_lock; 388 389 u16 cfg_num_qs; /* configured via set-channels */ 390 u16 num_evt_qs; 391 u16 num_msix_vec; 392 struct be_eq_obj eq_obj[MAX_EVT_QS]; 393 struct msix_entry msix_entries[MAX_MSIX_VECTORS]; 394 bool isr_registered; 395 396 /* TX Rings */ 397 u16 num_tx_qs; 398 struct be_tx_obj tx_obj[MAX_TX_QS]; 399 400 /* Rx rings */ 401 u16 num_rx_qs; 402 struct be_rx_obj rx_obj[MAX_RX_QS]; 403 u32 big_page_size; /* Compounded page size shared by rx wrbs */ 404 405 struct be_drv_stats drv_stats; 406 u16 vlans_added; 407 u8 vlan_tag[VLAN_N_VID]; 408 u8 vlan_prio_bmap; /* Available Priority BitMap */ 409 u16 recommended_prio; /* Recommended Priority */ 410 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ 411 412 struct be_dma_mem stats_cmd; 413 /* Work queue used to perform periodic tasks like getting statistics */ 414 struct delayed_work work; 415 u16 work_counter; 416 417 struct delayed_work func_recovery_work; 418 u32 flags; 419 u32 cmd_privileges; 420 /* Ethtool knobs and info */ 421 char fw_ver[FW_VER_LEN]; 422 char fw_on_flash[FW_VER_LEN]; 423 int if_handle; /* Used to configure filtering */ 424 u32 *pmac_id; /* MAC addr handle used by BE card */ 425 u32 beacon_state; /* for set_phys_id */ 426 427 bool eeh_error; 428 bool fw_timeout; 429 bool hw_error; 430 431 u32 port_num; 432 bool promiscuous; 433 u32 function_mode; 434 u32 function_caps; 435 u32 rx_fc; /* Rx flow control */ 436 u32 tx_fc; /* Tx flow control */ 437 bool stats_cmd_sent; 438 u32 if_type; 439 struct { 440 u32 size; 441 u32 total_size; 442 u64 io_addr; 443 } roce_db; 444 u32 num_msix_roce_vec; 445 struct ocrdma_dev *ocrdma_dev; 446 struct list_head entry; 447 448 u32 flash_status; 449 struct completion flash_compl; 450 451 struct be_resources res; /* resources available for the func */ 452 u16 num_vfs; /* Number of VFs provisioned by PF */ 453 u8 virtfn; 454 struct be_vf_cfg *vf_cfg; 455 bool be3_native; 456 u32 sli_family; 457 u8 hba_port_num; 458 u16 pvid; 459 struct phy_info phy; 460 u8 wol_cap; 461 bool wol; 462 u32 uc_macs; /* Count of secondary UC MAC programmed */ 463 u16 asic_rev; 464 u16 qnq_vid; 465 u32 msg_enable; 466 int be_get_temp_freq; 467 u8 pf_number; 468 u64 rss_flags; 469 }; 470 471 #define be_physfn(adapter) (!adapter->virtfn) 472 #define sriov_enabled(adapter) (adapter->num_vfs > 0) 473 #define sriov_want(adapter) (be_max_vfs(adapter) && num_vfs && \ 474 be_physfn(adapter)) 475 #define for_all_vfs(adapter, vf_cfg, i) \ 476 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ 477 i++, vf_cfg++) 478 479 #define ON 1 480 #define OFF 0 481 482 #define be_max_vlans(adapter) (adapter->res.max_vlans) 483 #define be_max_uc(adapter) (adapter->res.max_uc_mac) 484 #define be_max_mc(adapter) (adapter->res.max_mcast_mac) 485 #define be_max_vfs(adapter) (adapter->res.max_vfs) 486 #define be_max_rss(adapter) (adapter->res.max_rss_qs) 487 #define be_max_txqs(adapter) (adapter->res.max_tx_qs) 488 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) 489 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) 490 #define be_max_eqs(adapter) (adapter->res.max_evt_qs) 491 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) 492 493 static inline u16 be_max_qs(struct be_adapter *adapter) 494 { 495 /* If no RSS, need atleast the one def RXQ */ 496 u16 num = max_t(u16, be_max_rss(adapter), 1); 497 498 num = min(num, be_max_eqs(adapter)); 499 return min_t(u16, num, num_online_cpus()); 500 } 501 502 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ 503 adapter->pdev->device == OC_DEVICE_ID4) 504 505 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ 506 adapter->pdev->device == OC_DEVICE_ID6) 507 508 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ 509 adapter->pdev->device == OC_DEVICE_ID2) 510 511 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ 512 adapter->pdev->device == OC_DEVICE_ID1) 513 514 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) 515 516 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ 517 (adapter->function_mode & RDMA_ENABLED)) 518 519 extern const struct ethtool_ops be_ethtool_ops; 520 521 #define msix_enabled(adapter) (adapter->num_msix_vec > 0) 522 #define num_irqs(adapter) (msix_enabled(adapter) ? \ 523 adapter->num_msix_vec : 1) 524 #define tx_stats(txo) (&(txo)->stats) 525 #define rx_stats(rxo) (&(rxo)->stats) 526 527 /* The default RXQ is the last RXQ */ 528 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) 529 530 #define for_all_rx_queues(adapter, rxo, i) \ 531 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ 532 i++, rxo++) 533 534 /* Skip the default non-rss queue (last one)*/ 535 #define for_all_rss_queues(adapter, rxo, i) \ 536 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\ 537 i++, rxo++) 538 539 #define for_all_tx_queues(adapter, txo, i) \ 540 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ 541 i++, txo++) 542 543 #define for_all_evt_queues(adapter, eqo, i) \ 544 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ 545 i++, eqo++) 546 547 #define is_mcc_eqo(eqo) (eqo->idx == 0) 548 #define mcc_eqo(adapter) (&adapter->eq_obj[0]) 549 550 #define PAGE_SHIFT_4K 12 551 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 552 553 /* Returns number of pages spanned by the data starting at the given addr */ 554 #define PAGES_4K_SPANNED(_address, size) \ 555 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 556 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 557 558 /* Returns bit offset within a DWORD of a bitfield */ 559 #define AMAP_BIT_OFFSET(_struct, field) \ 560 (((size_t)&(((_struct *)0)->field))%32) 561 562 /* Returns the bit mask of the field that is NOT shifted into location. */ 563 static inline u32 amap_mask(u32 bitsize) 564 { 565 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 566 } 567 568 static inline void 569 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 570 { 571 u32 *dw = (u32 *) ptr + dw_offset; 572 *dw &= ~(mask << offset); 573 *dw |= (mask & value) << offset; 574 } 575 576 #define AMAP_SET_BITS(_struct, field, ptr, val) \ 577 amap_set(ptr, \ 578 offsetof(_struct, field)/32, \ 579 amap_mask(sizeof(((_struct *)0)->field)), \ 580 AMAP_BIT_OFFSET(_struct, field), \ 581 val) 582 583 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 584 { 585 u32 *dw = (u32 *) ptr; 586 return mask & (*(dw + dw_offset) >> offset); 587 } 588 589 #define AMAP_GET_BITS(_struct, field, ptr) \ 590 amap_get(ptr, \ 591 offsetof(_struct, field)/32, \ 592 amap_mask(sizeof(((_struct *)0)->field)), \ 593 AMAP_BIT_OFFSET(_struct, field)) 594 595 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 596 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 597 static inline void swap_dws(void *wrb, int len) 598 { 599 #ifdef __BIG_ENDIAN 600 u32 *dw = wrb; 601 BUG_ON(len % 4); 602 do { 603 *dw = cpu_to_le32(*dw); 604 dw++; 605 len -= 4; 606 } while (len); 607 #endif /* __BIG_ENDIAN */ 608 } 609 610 static inline u8 is_tcp_pkt(struct sk_buff *skb) 611 { 612 u8 val = 0; 613 614 if (ip_hdr(skb)->version == 4) 615 val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 616 else if (ip_hdr(skb)->version == 6) 617 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 618 619 return val; 620 } 621 622 static inline u8 is_udp_pkt(struct sk_buff *skb) 623 { 624 u8 val = 0; 625 626 if (ip_hdr(skb)->version == 4) 627 val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 628 else if (ip_hdr(skb)->version == 6) 629 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 630 631 return val; 632 } 633 634 static inline bool is_ipv4_pkt(struct sk_buff *skb) 635 { 636 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; 637 } 638 639 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac) 640 { 641 u32 addr; 642 643 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0); 644 645 mac[5] = (u8)(addr & 0xFF); 646 mac[4] = (u8)((addr >> 8) & 0xFF); 647 mac[3] = (u8)((addr >> 16) & 0xFF); 648 /* Use the OUI from the current MAC address */ 649 memcpy(mac, adapter->netdev->dev_addr, 3); 650 } 651 652 static inline bool be_multi_rxq(const struct be_adapter *adapter) 653 { 654 return adapter->num_rx_qs > 1; 655 } 656 657 static inline bool be_error(struct be_adapter *adapter) 658 { 659 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout; 660 } 661 662 static inline bool be_hw_error(struct be_adapter *adapter) 663 { 664 return adapter->eeh_error || adapter->hw_error; 665 } 666 667 static inline void be_clear_all_error(struct be_adapter *adapter) 668 { 669 adapter->eeh_error = false; 670 adapter->hw_error = false; 671 adapter->fw_timeout = false; 672 } 673 674 static inline bool be_is_wol_excluded(struct be_adapter *adapter) 675 { 676 struct pci_dev *pdev = adapter->pdev; 677 678 if (!be_physfn(adapter)) 679 return true; 680 681 switch (pdev->subsystem_device) { 682 case OC_SUBSYS_DEVICE_ID1: 683 case OC_SUBSYS_DEVICE_ID2: 684 case OC_SUBSYS_DEVICE_ID3: 685 case OC_SUBSYS_DEVICE_ID4: 686 return true; 687 default: 688 return false; 689 } 690 } 691 692 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter) 693 { 694 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD; 695 } 696 697 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, 698 u16 num_popped); 699 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status); 700 extern void be_parse_stats(struct be_adapter *adapter); 701 extern int be_load_fw(struct be_adapter *adapter, u8 *func); 702 extern bool be_is_wol_supported(struct be_adapter *adapter); 703 extern bool be_pause_supported(struct be_adapter *adapter); 704 extern u32 be_get_fw_log_level(struct be_adapter *adapter); 705 int be_update_queues(struct be_adapter *adapter); 706 int be_poll(struct napi_struct *napi, int budget); 707 708 /* 709 * internal function to initialize-cleanup roce device. 710 */ 711 extern void be_roce_dev_add(struct be_adapter *); 712 extern void be_roce_dev_remove(struct be_adapter *); 713 714 /* 715 * internal function to open-close roce device during ifup-ifdown. 716 */ 717 extern void be_roce_dev_open(struct be_adapter *); 718 extern void be_roce_dev_close(struct be_adapter *); 719 720 #endif /* BE_H */ 721