1 /* 2 * Davicom DM9000 Fast Ethernet driver for Linux. 3 * Copyright (C) 1997 Sten Wang 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. 16 * 17 * Additional updates, Copyright: 18 * Ben Dooks <ben@simtec.co.uk> 19 * Sascha Hauer <s.hauer@pengutronix.de> 20 */ 21 22 #include <linux/module.h> 23 #include <linux/ioport.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/interrupt.h> 27 #include <linux/skbuff.h> 28 #include <linux/spinlock.h> 29 #include <linux/crc32.h> 30 #include <linux/mii.h> 31 #include <linux/of.h> 32 #include <linux/of_net.h> 33 #include <linux/ethtool.h> 34 #include <linux/dm9000.h> 35 #include <linux/delay.h> 36 #include <linux/platform_device.h> 37 #include <linux/irq.h> 38 #include <linux/slab.h> 39 #include <linux/regulator/consumer.h> 40 #include <linux/gpio.h> 41 #include <linux/of_gpio.h> 42 43 #include <asm/delay.h> 44 #include <asm/irq.h> 45 #include <asm/io.h> 46 47 #include "dm9000.h" 48 49 /* Board/System/Debug information/definition ---------------- */ 50 51 #define DM9000_PHY 0x40 /* PHY address 0x01 */ 52 53 #define CARDNAME "dm9000" 54 #define DRV_VERSION "1.31" 55 56 /* 57 * Transmit timeout, default 5 seconds. 58 */ 59 static int watchdog = 5000; 60 module_param(watchdog, int, 0400); 61 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); 62 63 /* 64 * Debug messages level 65 */ 66 static int debug; 67 module_param(debug, int, 0644); 68 MODULE_PARM_DESC(debug, "dm9000 debug level (0-6)"); 69 70 /* DM9000 register address locking. 71 * 72 * The DM9000 uses an address register to control where data written 73 * to the data register goes. This means that the address register 74 * must be preserved over interrupts or similar calls. 75 * 76 * During interrupt and other critical calls, a spinlock is used to 77 * protect the system, but the calls themselves save the address 78 * in the address register in case they are interrupting another 79 * access to the device. 80 * 81 * For general accesses a lock is provided so that calls which are 82 * allowed to sleep are serialised so that the address register does 83 * not need to be saved. This lock also serves to serialise access 84 * to the EEPROM and PHY access registers which are shared between 85 * these two devices. 86 */ 87 88 /* The driver supports the original DM9000E, and now the two newer 89 * devices, DM9000A and DM9000B. 90 */ 91 92 enum dm9000_type { 93 TYPE_DM9000E, /* original DM9000 */ 94 TYPE_DM9000A, 95 TYPE_DM9000B 96 }; 97 98 /* Structure/enum declaration ------------------------------- */ 99 struct board_info { 100 101 void __iomem *io_addr; /* Register I/O base address */ 102 void __iomem *io_data; /* Data I/O address */ 103 u16 irq; /* IRQ */ 104 105 u16 tx_pkt_cnt; 106 u16 queue_pkt_len; 107 u16 queue_start_addr; 108 u16 queue_ip_summed; 109 u16 dbug_cnt; 110 u8 io_mode; /* 0:word, 2:byte */ 111 u8 phy_addr; 112 u8 imr_all; 113 114 unsigned int flags; 115 unsigned int in_timeout:1; 116 unsigned int in_suspend:1; 117 unsigned int wake_supported:1; 118 119 enum dm9000_type type; 120 121 void (*inblk)(void __iomem *port, void *data, int length); 122 void (*outblk)(void __iomem *port, void *data, int length); 123 void (*dumpblk)(void __iomem *port, int length); 124 125 struct device *dev; /* parent device */ 126 127 struct resource *addr_res; /* resources found */ 128 struct resource *data_res; 129 struct resource *addr_req; /* resources requested */ 130 struct resource *data_req; 131 132 int irq_wake; 133 134 struct mutex addr_lock; /* phy and eeprom access lock */ 135 136 struct delayed_work phy_poll; 137 struct net_device *ndev; 138 139 spinlock_t lock; 140 141 struct mii_if_info mii; 142 u32 msg_enable; 143 u32 wake_state; 144 145 int ip_summed; 146 }; 147 148 /* debug code */ 149 150 #define dm9000_dbg(db, lev, msg...) do { \ 151 if ((lev) < debug) { \ 152 dev_dbg(db->dev, msg); \ 153 } \ 154 } while (0) 155 156 static inline struct board_info *to_dm9000_board(struct net_device *dev) 157 { 158 return netdev_priv(dev); 159 } 160 161 /* DM9000 network board routine ---------------------------- */ 162 163 /* 164 * Read a byte from I/O port 165 */ 166 static u8 167 ior(struct board_info *db, int reg) 168 { 169 writeb(reg, db->io_addr); 170 return readb(db->io_data); 171 } 172 173 /* 174 * Write a byte to I/O port 175 */ 176 177 static void 178 iow(struct board_info *db, int reg, int value) 179 { 180 writeb(reg, db->io_addr); 181 writeb(value, db->io_data); 182 } 183 184 static void 185 dm9000_reset(struct board_info *db) 186 { 187 dev_dbg(db->dev, "resetting device\n"); 188 189 /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 190 * The essential point is that we have to do a double reset, and the 191 * instruction is to set LBK into MAC internal loopback mode. 192 */ 193 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK); 194 udelay(100); /* Application note says at least 20 us */ 195 if (ior(db, DM9000_NCR) & 1) 196 dev_err(db->dev, "dm9000 did not respond to first reset\n"); 197 198 iow(db, DM9000_NCR, 0); 199 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK); 200 udelay(100); 201 if (ior(db, DM9000_NCR) & 1) 202 dev_err(db->dev, "dm9000 did not respond to second reset\n"); 203 } 204 205 /* routines for sending block to chip */ 206 207 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) 208 { 209 iowrite8_rep(reg, data, count); 210 } 211 212 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) 213 { 214 iowrite16_rep(reg, data, (count+1) >> 1); 215 } 216 217 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) 218 { 219 iowrite32_rep(reg, data, (count+3) >> 2); 220 } 221 222 /* input block from chip to memory */ 223 224 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) 225 { 226 ioread8_rep(reg, data, count); 227 } 228 229 230 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) 231 { 232 ioread16_rep(reg, data, (count+1) >> 1); 233 } 234 235 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) 236 { 237 ioread32_rep(reg, data, (count+3) >> 2); 238 } 239 240 /* dump block from chip to null */ 241 242 static void dm9000_dumpblk_8bit(void __iomem *reg, int count) 243 { 244 int i; 245 int tmp; 246 247 for (i = 0; i < count; i++) 248 tmp = readb(reg); 249 } 250 251 static void dm9000_dumpblk_16bit(void __iomem *reg, int count) 252 { 253 int i; 254 int tmp; 255 256 count = (count + 1) >> 1; 257 258 for (i = 0; i < count; i++) 259 tmp = readw(reg); 260 } 261 262 static void dm9000_dumpblk_32bit(void __iomem *reg, int count) 263 { 264 int i; 265 int tmp; 266 267 count = (count + 3) >> 2; 268 269 for (i = 0; i < count; i++) 270 tmp = readl(reg); 271 } 272 273 /* 274 * Sleep, either by using msleep() or if we are suspending, then 275 * use mdelay() to sleep. 276 */ 277 static void dm9000_msleep(struct board_info *db, unsigned int ms) 278 { 279 if (db->in_suspend || db->in_timeout) 280 mdelay(ms); 281 else 282 msleep(ms); 283 } 284 285 /* Read a word from phyxcer */ 286 static int 287 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) 288 { 289 struct board_info *db = netdev_priv(dev); 290 unsigned long flags; 291 unsigned int reg_save; 292 int ret; 293 294 mutex_lock(&db->addr_lock); 295 296 spin_lock_irqsave(&db->lock, flags); 297 298 /* Save previous register address */ 299 reg_save = readb(db->io_addr); 300 301 /* Fill the phyxcer register into REG_0C */ 302 iow(db, DM9000_EPAR, DM9000_PHY | reg); 303 304 /* Issue phyxcer read command */ 305 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); 306 307 writeb(reg_save, db->io_addr); 308 spin_unlock_irqrestore(&db->lock, flags); 309 310 dm9000_msleep(db, 1); /* Wait read complete */ 311 312 spin_lock_irqsave(&db->lock, flags); 313 reg_save = readb(db->io_addr); 314 315 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ 316 317 /* The read data keeps on REG_0D & REG_0E */ 318 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); 319 320 /* restore the previous address */ 321 writeb(reg_save, db->io_addr); 322 spin_unlock_irqrestore(&db->lock, flags); 323 324 mutex_unlock(&db->addr_lock); 325 326 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret); 327 return ret; 328 } 329 330 /* Write a word to phyxcer */ 331 static void 332 dm9000_phy_write(struct net_device *dev, 333 int phyaddr_unused, int reg, int value) 334 { 335 struct board_info *db = netdev_priv(dev); 336 unsigned long flags; 337 unsigned long reg_save; 338 339 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value); 340 if (!db->in_timeout) 341 mutex_lock(&db->addr_lock); 342 343 spin_lock_irqsave(&db->lock, flags); 344 345 /* Save previous register address */ 346 reg_save = readb(db->io_addr); 347 348 /* Fill the phyxcer register into REG_0C */ 349 iow(db, DM9000_EPAR, DM9000_PHY | reg); 350 351 /* Fill the written data into REG_0D & REG_0E */ 352 iow(db, DM9000_EPDRL, value); 353 iow(db, DM9000_EPDRH, value >> 8); 354 355 /* Issue phyxcer write command */ 356 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); 357 358 writeb(reg_save, db->io_addr); 359 spin_unlock_irqrestore(&db->lock, flags); 360 361 dm9000_msleep(db, 1); /* Wait write complete */ 362 363 spin_lock_irqsave(&db->lock, flags); 364 reg_save = readb(db->io_addr); 365 366 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ 367 368 /* restore the previous address */ 369 writeb(reg_save, db->io_addr); 370 371 spin_unlock_irqrestore(&db->lock, flags); 372 if (!db->in_timeout) 373 mutex_unlock(&db->addr_lock); 374 } 375 376 /* dm9000_set_io 377 * 378 * select the specified set of io routines to use with the 379 * device 380 */ 381 382 static void dm9000_set_io(struct board_info *db, int byte_width) 383 { 384 /* use the size of the data resource to work out what IO 385 * routines we want to use 386 */ 387 388 switch (byte_width) { 389 case 1: 390 db->dumpblk = dm9000_dumpblk_8bit; 391 db->outblk = dm9000_outblk_8bit; 392 db->inblk = dm9000_inblk_8bit; 393 break; 394 395 396 case 3: 397 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n"); 398 case 2: 399 db->dumpblk = dm9000_dumpblk_16bit; 400 db->outblk = dm9000_outblk_16bit; 401 db->inblk = dm9000_inblk_16bit; 402 break; 403 404 case 4: 405 default: 406 db->dumpblk = dm9000_dumpblk_32bit; 407 db->outblk = dm9000_outblk_32bit; 408 db->inblk = dm9000_inblk_32bit; 409 break; 410 } 411 } 412 413 static void dm9000_schedule_poll(struct board_info *db) 414 { 415 if (db->type == TYPE_DM9000E) 416 schedule_delayed_work(&db->phy_poll, HZ * 2); 417 } 418 419 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 420 { 421 struct board_info *dm = to_dm9000_board(dev); 422 423 if (!netif_running(dev)) 424 return -EINVAL; 425 426 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL); 427 } 428 429 static unsigned int 430 dm9000_read_locked(struct board_info *db, int reg) 431 { 432 unsigned long flags; 433 unsigned int ret; 434 435 spin_lock_irqsave(&db->lock, flags); 436 ret = ior(db, reg); 437 spin_unlock_irqrestore(&db->lock, flags); 438 439 return ret; 440 } 441 442 static int dm9000_wait_eeprom(struct board_info *db) 443 { 444 unsigned int status; 445 int timeout = 8; /* wait max 8msec */ 446 447 /* The DM9000 data sheets say we should be able to 448 * poll the ERRE bit in EPCR to wait for the EEPROM 449 * operation. From testing several chips, this bit 450 * does not seem to work. 451 * 452 * We attempt to use the bit, but fall back to the 453 * timeout (which is why we do not return an error 454 * on expiry) to say that the EEPROM operation has 455 * completed. 456 */ 457 458 while (1) { 459 status = dm9000_read_locked(db, DM9000_EPCR); 460 461 if ((status & EPCR_ERRE) == 0) 462 break; 463 464 msleep(1); 465 466 if (timeout-- < 0) { 467 dev_dbg(db->dev, "timeout waiting EEPROM\n"); 468 break; 469 } 470 } 471 472 return 0; 473 } 474 475 /* 476 * Read a word data from EEPROM 477 */ 478 static void 479 dm9000_read_eeprom(struct board_info *db, int offset, u8 *to) 480 { 481 unsigned long flags; 482 483 if (db->flags & DM9000_PLATF_NO_EEPROM) { 484 to[0] = 0xff; 485 to[1] = 0xff; 486 return; 487 } 488 489 mutex_lock(&db->addr_lock); 490 491 spin_lock_irqsave(&db->lock, flags); 492 493 iow(db, DM9000_EPAR, offset); 494 iow(db, DM9000_EPCR, EPCR_ERPRR); 495 496 spin_unlock_irqrestore(&db->lock, flags); 497 498 dm9000_wait_eeprom(db); 499 500 /* delay for at-least 150uS */ 501 msleep(1); 502 503 spin_lock_irqsave(&db->lock, flags); 504 505 iow(db, DM9000_EPCR, 0x0); 506 507 to[0] = ior(db, DM9000_EPDRL); 508 to[1] = ior(db, DM9000_EPDRH); 509 510 spin_unlock_irqrestore(&db->lock, flags); 511 512 mutex_unlock(&db->addr_lock); 513 } 514 515 /* 516 * Write a word data to SROM 517 */ 518 static void 519 dm9000_write_eeprom(struct board_info *db, int offset, u8 *data) 520 { 521 unsigned long flags; 522 523 if (db->flags & DM9000_PLATF_NO_EEPROM) 524 return; 525 526 mutex_lock(&db->addr_lock); 527 528 spin_lock_irqsave(&db->lock, flags); 529 iow(db, DM9000_EPAR, offset); 530 iow(db, DM9000_EPDRH, data[1]); 531 iow(db, DM9000_EPDRL, data[0]); 532 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); 533 spin_unlock_irqrestore(&db->lock, flags); 534 535 dm9000_wait_eeprom(db); 536 537 mdelay(1); /* wait at least 150uS to clear */ 538 539 spin_lock_irqsave(&db->lock, flags); 540 iow(db, DM9000_EPCR, 0); 541 spin_unlock_irqrestore(&db->lock, flags); 542 543 mutex_unlock(&db->addr_lock); 544 } 545 546 /* ethtool ops */ 547 548 static void dm9000_get_drvinfo(struct net_device *dev, 549 struct ethtool_drvinfo *info) 550 { 551 struct board_info *dm = to_dm9000_board(dev); 552 553 strlcpy(info->driver, CARDNAME, sizeof(info->driver)); 554 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 555 strlcpy(info->bus_info, to_platform_device(dm->dev)->name, 556 sizeof(info->bus_info)); 557 } 558 559 static u32 dm9000_get_msglevel(struct net_device *dev) 560 { 561 struct board_info *dm = to_dm9000_board(dev); 562 563 return dm->msg_enable; 564 } 565 566 static void dm9000_set_msglevel(struct net_device *dev, u32 value) 567 { 568 struct board_info *dm = to_dm9000_board(dev); 569 570 dm->msg_enable = value; 571 } 572 573 static int dm9000_get_link_ksettings(struct net_device *dev, 574 struct ethtool_link_ksettings *cmd) 575 { 576 struct board_info *dm = to_dm9000_board(dev); 577 578 mii_ethtool_get_link_ksettings(&dm->mii, cmd); 579 return 0; 580 } 581 582 static int dm9000_set_link_ksettings(struct net_device *dev, 583 const struct ethtool_link_ksettings *cmd) 584 { 585 struct board_info *dm = to_dm9000_board(dev); 586 587 return mii_ethtool_set_link_ksettings(&dm->mii, cmd); 588 } 589 590 static int dm9000_nway_reset(struct net_device *dev) 591 { 592 struct board_info *dm = to_dm9000_board(dev); 593 return mii_nway_restart(&dm->mii); 594 } 595 596 static int dm9000_set_features(struct net_device *dev, 597 netdev_features_t features) 598 { 599 struct board_info *dm = to_dm9000_board(dev); 600 netdev_features_t changed = dev->features ^ features; 601 unsigned long flags; 602 603 if (!(changed & NETIF_F_RXCSUM)) 604 return 0; 605 606 spin_lock_irqsave(&dm->lock, flags); 607 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0); 608 spin_unlock_irqrestore(&dm->lock, flags); 609 610 return 0; 611 } 612 613 static u32 dm9000_get_link(struct net_device *dev) 614 { 615 struct board_info *dm = to_dm9000_board(dev); 616 u32 ret; 617 618 if (dm->flags & DM9000_PLATF_EXT_PHY) 619 ret = mii_link_ok(&dm->mii); 620 else 621 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0; 622 623 return ret; 624 } 625 626 #define DM_EEPROM_MAGIC (0x444D394B) 627 628 static int dm9000_get_eeprom_len(struct net_device *dev) 629 { 630 return 128; 631 } 632 633 static int dm9000_get_eeprom(struct net_device *dev, 634 struct ethtool_eeprom *ee, u8 *data) 635 { 636 struct board_info *dm = to_dm9000_board(dev); 637 int offset = ee->offset; 638 int len = ee->len; 639 int i; 640 641 /* EEPROM access is aligned to two bytes */ 642 643 if ((len & 1) != 0 || (offset & 1) != 0) 644 return -EINVAL; 645 646 if (dm->flags & DM9000_PLATF_NO_EEPROM) 647 return -ENOENT; 648 649 ee->magic = DM_EEPROM_MAGIC; 650 651 for (i = 0; i < len; i += 2) 652 dm9000_read_eeprom(dm, (offset + i) / 2, data + i); 653 654 return 0; 655 } 656 657 static int dm9000_set_eeprom(struct net_device *dev, 658 struct ethtool_eeprom *ee, u8 *data) 659 { 660 struct board_info *dm = to_dm9000_board(dev); 661 int offset = ee->offset; 662 int len = ee->len; 663 int done; 664 665 /* EEPROM access is aligned to two bytes */ 666 667 if (dm->flags & DM9000_PLATF_NO_EEPROM) 668 return -ENOENT; 669 670 if (ee->magic != DM_EEPROM_MAGIC) 671 return -EINVAL; 672 673 while (len > 0) { 674 if (len & 1 || offset & 1) { 675 int which = offset & 1; 676 u8 tmp[2]; 677 678 dm9000_read_eeprom(dm, offset / 2, tmp); 679 tmp[which] = *data; 680 dm9000_write_eeprom(dm, offset / 2, tmp); 681 682 done = 1; 683 } else { 684 dm9000_write_eeprom(dm, offset / 2, data); 685 done = 2; 686 } 687 688 data += done; 689 offset += done; 690 len -= done; 691 } 692 693 return 0; 694 } 695 696 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w) 697 { 698 struct board_info *dm = to_dm9000_board(dev); 699 700 memset(w, 0, sizeof(struct ethtool_wolinfo)); 701 702 /* note, we could probably support wake-phy too */ 703 w->supported = dm->wake_supported ? WAKE_MAGIC : 0; 704 w->wolopts = dm->wake_state; 705 } 706 707 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w) 708 { 709 struct board_info *dm = to_dm9000_board(dev); 710 unsigned long flags; 711 u32 opts = w->wolopts; 712 u32 wcr = 0; 713 714 if (!dm->wake_supported) 715 return -EOPNOTSUPP; 716 717 if (opts & ~WAKE_MAGIC) 718 return -EINVAL; 719 720 if (opts & WAKE_MAGIC) 721 wcr |= WCR_MAGICEN; 722 723 mutex_lock(&dm->addr_lock); 724 725 spin_lock_irqsave(&dm->lock, flags); 726 iow(dm, DM9000_WCR, wcr); 727 spin_unlock_irqrestore(&dm->lock, flags); 728 729 mutex_unlock(&dm->addr_lock); 730 731 if (dm->wake_state != opts) { 732 /* change in wol state, update IRQ state */ 733 734 if (!dm->wake_state) 735 irq_set_irq_wake(dm->irq_wake, 1); 736 else if (dm->wake_state && !opts) 737 irq_set_irq_wake(dm->irq_wake, 0); 738 } 739 740 dm->wake_state = opts; 741 return 0; 742 } 743 744 static const struct ethtool_ops dm9000_ethtool_ops = { 745 .get_drvinfo = dm9000_get_drvinfo, 746 .get_msglevel = dm9000_get_msglevel, 747 .set_msglevel = dm9000_set_msglevel, 748 .nway_reset = dm9000_nway_reset, 749 .get_link = dm9000_get_link, 750 .get_wol = dm9000_get_wol, 751 .set_wol = dm9000_set_wol, 752 .get_eeprom_len = dm9000_get_eeprom_len, 753 .get_eeprom = dm9000_get_eeprom, 754 .set_eeprom = dm9000_set_eeprom, 755 .get_link_ksettings = dm9000_get_link_ksettings, 756 .set_link_ksettings = dm9000_set_link_ksettings, 757 }; 758 759 static void dm9000_show_carrier(struct board_info *db, 760 unsigned carrier, unsigned nsr) 761 { 762 int lpa; 763 struct net_device *ndev = db->ndev; 764 struct mii_if_info *mii = &db->mii; 765 unsigned ncr = dm9000_read_locked(db, DM9000_NCR); 766 767 if (carrier) { 768 lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA); 769 dev_info(db->dev, 770 "%s: link up, %dMbps, %s-duplex, lpa 0x%04X\n", 771 ndev->name, (nsr & NSR_SPEED) ? 10 : 100, 772 (ncr & NCR_FDX) ? "full" : "half", lpa); 773 } else { 774 dev_info(db->dev, "%s: link down\n", ndev->name); 775 } 776 } 777 778 static void 779 dm9000_poll_work(struct work_struct *w) 780 { 781 struct delayed_work *dw = to_delayed_work(w); 782 struct board_info *db = container_of(dw, struct board_info, phy_poll); 783 struct net_device *ndev = db->ndev; 784 785 if (db->flags & DM9000_PLATF_SIMPLE_PHY && 786 !(db->flags & DM9000_PLATF_EXT_PHY)) { 787 unsigned nsr = dm9000_read_locked(db, DM9000_NSR); 788 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0; 789 unsigned new_carrier; 790 791 new_carrier = (nsr & NSR_LINKST) ? 1 : 0; 792 793 if (old_carrier != new_carrier) { 794 if (netif_msg_link(db)) 795 dm9000_show_carrier(db, new_carrier, nsr); 796 797 if (!new_carrier) 798 netif_carrier_off(ndev); 799 else 800 netif_carrier_on(ndev); 801 } 802 } else 803 mii_check_media(&db->mii, netif_msg_link(db), 0); 804 805 if (netif_running(ndev)) 806 dm9000_schedule_poll(db); 807 } 808 809 /* dm9000_release_board 810 * 811 * release a board, and any mapped resources 812 */ 813 814 static void 815 dm9000_release_board(struct platform_device *pdev, struct board_info *db) 816 { 817 /* unmap our resources */ 818 819 iounmap(db->io_addr); 820 iounmap(db->io_data); 821 822 /* release the resources */ 823 824 if (db->data_req) 825 release_resource(db->data_req); 826 kfree(db->data_req); 827 828 if (db->addr_req) 829 release_resource(db->addr_req); 830 kfree(db->addr_req); 831 } 832 833 static unsigned char dm9000_type_to_char(enum dm9000_type type) 834 { 835 switch (type) { 836 case TYPE_DM9000E: return 'e'; 837 case TYPE_DM9000A: return 'a'; 838 case TYPE_DM9000B: return 'b'; 839 } 840 841 return '?'; 842 } 843 844 /* 845 * Set DM9000 multicast address 846 */ 847 static void 848 dm9000_hash_table_unlocked(struct net_device *dev) 849 { 850 struct board_info *db = netdev_priv(dev); 851 struct netdev_hw_addr *ha; 852 int i, oft; 853 u32 hash_val; 854 u16 hash_table[4] = { 0, 0, 0, 0x8000 }; /* broadcast address */ 855 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN; 856 857 dm9000_dbg(db, 1, "entering %s\n", __func__); 858 859 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++) 860 iow(db, oft, dev->dev_addr[i]); 861 862 if (dev->flags & IFF_PROMISC) 863 rcr |= RCR_PRMSC; 864 865 if (dev->flags & IFF_ALLMULTI) 866 rcr |= RCR_ALL; 867 868 /* the multicast address in Hash Table : 64 bits */ 869 netdev_for_each_mc_addr(ha, dev) { 870 hash_val = ether_crc_le(6, ha->addr) & 0x3f; 871 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); 872 } 873 874 /* Write the hash table to MAC MD table */ 875 for (i = 0, oft = DM9000_MAR; i < 4; i++) { 876 iow(db, oft++, hash_table[i]); 877 iow(db, oft++, hash_table[i] >> 8); 878 } 879 880 iow(db, DM9000_RCR, rcr); 881 } 882 883 static void 884 dm9000_hash_table(struct net_device *dev) 885 { 886 struct board_info *db = netdev_priv(dev); 887 unsigned long flags; 888 889 spin_lock_irqsave(&db->lock, flags); 890 dm9000_hash_table_unlocked(dev); 891 spin_unlock_irqrestore(&db->lock, flags); 892 } 893 894 static void 895 dm9000_mask_interrupts(struct board_info *db) 896 { 897 iow(db, DM9000_IMR, IMR_PAR); 898 } 899 900 static void 901 dm9000_unmask_interrupts(struct board_info *db) 902 { 903 iow(db, DM9000_IMR, db->imr_all); 904 } 905 906 /* 907 * Initialize dm9000 board 908 */ 909 static void 910 dm9000_init_dm9000(struct net_device *dev) 911 { 912 struct board_info *db = netdev_priv(dev); 913 unsigned int imr; 914 unsigned int ncr; 915 916 dm9000_dbg(db, 1, "entering %s\n", __func__); 917 918 dm9000_reset(db); 919 dm9000_mask_interrupts(db); 920 921 /* I/O mode */ 922 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ 923 924 /* Checksum mode */ 925 if (dev->hw_features & NETIF_F_RXCSUM) 926 iow(db, DM9000_RCSR, 927 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0); 928 929 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ 930 iow(db, DM9000_GPR, 0); 931 932 /* If we are dealing with DM9000B, some extra steps are required: a 933 * manual phy reset, and setting init params. 934 */ 935 if (db->type == TYPE_DM9000B) { 936 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); 937 dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM); 938 } 939 940 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0; 941 942 /* if wol is needed, then always set NCR_WAKEEN otherwise we end 943 * up dumping the wake events if we disable this. There is already 944 * a wake-mask in DM9000_WCR */ 945 if (db->wake_supported) 946 ncr |= NCR_WAKEEN; 947 948 iow(db, DM9000_NCR, ncr); 949 950 /* Program operating register */ 951 iow(db, DM9000_TCR, 0); /* TX Polling clear */ 952 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ 953 iow(db, DM9000_FCR, 0xff); /* Flow Control */ 954 iow(db, DM9000_SMCR, 0); /* Special Mode */ 955 /* clear TX status */ 956 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); 957 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ 958 959 /* Set address filter table */ 960 dm9000_hash_table_unlocked(dev); 961 962 imr = IMR_PAR | IMR_PTM | IMR_PRM; 963 if (db->type != TYPE_DM9000E) 964 imr |= IMR_LNKCHNG; 965 966 db->imr_all = imr; 967 968 /* Init Driver variable */ 969 db->tx_pkt_cnt = 0; 970 db->queue_pkt_len = 0; 971 netif_trans_update(dev); 972 } 973 974 /* Our watchdog timed out. Called by the networking layer */ 975 static void dm9000_timeout(struct net_device *dev) 976 { 977 struct board_info *db = netdev_priv(dev); 978 u8 reg_save; 979 unsigned long flags; 980 981 /* Save previous register address */ 982 spin_lock_irqsave(&db->lock, flags); 983 db->in_timeout = 1; 984 reg_save = readb(db->io_addr); 985 986 netif_stop_queue(dev); 987 dm9000_init_dm9000(dev); 988 dm9000_unmask_interrupts(db); 989 /* We can accept TX packets again */ 990 netif_trans_update(dev); /* prevent tx timeout */ 991 netif_wake_queue(dev); 992 993 /* Restore previous register address */ 994 writeb(reg_save, db->io_addr); 995 db->in_timeout = 0; 996 spin_unlock_irqrestore(&db->lock, flags); 997 } 998 999 static void dm9000_send_packet(struct net_device *dev, 1000 int ip_summed, 1001 u16 pkt_len) 1002 { 1003 struct board_info *dm = to_dm9000_board(dev); 1004 1005 /* The DM9000 is not smart enough to leave fragmented packets alone. */ 1006 if (dm->ip_summed != ip_summed) { 1007 if (ip_summed == CHECKSUM_NONE) 1008 iow(dm, DM9000_TCCR, 0); 1009 else 1010 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP); 1011 dm->ip_summed = ip_summed; 1012 } 1013 1014 /* Set TX length to DM9000 */ 1015 iow(dm, DM9000_TXPLL, pkt_len); 1016 iow(dm, DM9000_TXPLH, pkt_len >> 8); 1017 1018 /* Issue TX polling command */ 1019 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ 1020 } 1021 1022 /* 1023 * Hardware start transmission. 1024 * Send a packet to media from the upper layer. 1025 */ 1026 static int 1027 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) 1028 { 1029 unsigned long flags; 1030 struct board_info *db = netdev_priv(dev); 1031 1032 dm9000_dbg(db, 3, "%s:\n", __func__); 1033 1034 if (db->tx_pkt_cnt > 1) 1035 return NETDEV_TX_BUSY; 1036 1037 spin_lock_irqsave(&db->lock, flags); 1038 1039 /* Move data to DM9000 TX RAM */ 1040 writeb(DM9000_MWCMD, db->io_addr); 1041 1042 (db->outblk)(db->io_data, skb->data, skb->len); 1043 dev->stats.tx_bytes += skb->len; 1044 1045 db->tx_pkt_cnt++; 1046 /* TX control: First packet immediately send, second packet queue */ 1047 if (db->tx_pkt_cnt == 1) { 1048 dm9000_send_packet(dev, skb->ip_summed, skb->len); 1049 } else { 1050 /* Second packet */ 1051 db->queue_pkt_len = skb->len; 1052 db->queue_ip_summed = skb->ip_summed; 1053 netif_stop_queue(dev); 1054 } 1055 1056 spin_unlock_irqrestore(&db->lock, flags); 1057 1058 /* free this SKB */ 1059 dev_consume_skb_any(skb); 1060 1061 return NETDEV_TX_OK; 1062 } 1063 1064 /* 1065 * DM9000 interrupt handler 1066 * receive the packet to upper layer, free the transmitted packet 1067 */ 1068 1069 static void dm9000_tx_done(struct net_device *dev, struct board_info *db) 1070 { 1071 int tx_status = ior(db, DM9000_NSR); /* Got TX status */ 1072 1073 if (tx_status & (NSR_TX2END | NSR_TX1END)) { 1074 /* One packet sent complete */ 1075 db->tx_pkt_cnt--; 1076 dev->stats.tx_packets++; 1077 1078 if (netif_msg_tx_done(db)) 1079 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status); 1080 1081 /* Queue packet check & send */ 1082 if (db->tx_pkt_cnt > 0) 1083 dm9000_send_packet(dev, db->queue_ip_summed, 1084 db->queue_pkt_len); 1085 netif_wake_queue(dev); 1086 } 1087 } 1088 1089 struct dm9000_rxhdr { 1090 u8 RxPktReady; 1091 u8 RxStatus; 1092 __le16 RxLen; 1093 } __packed; 1094 1095 /* 1096 * Received a packet and pass to upper layer 1097 */ 1098 static void 1099 dm9000_rx(struct net_device *dev) 1100 { 1101 struct board_info *db = netdev_priv(dev); 1102 struct dm9000_rxhdr rxhdr; 1103 struct sk_buff *skb; 1104 u8 rxbyte, *rdptr; 1105 bool GoodPacket; 1106 int RxLen; 1107 1108 /* Check packet ready or not */ 1109 do { 1110 ior(db, DM9000_MRCMDX); /* Dummy read */ 1111 1112 /* Get most updated data */ 1113 rxbyte = readb(db->io_data); 1114 1115 /* Status check: this byte must be 0 or 1 */ 1116 if (rxbyte & DM9000_PKT_ERR) { 1117 dev_warn(db->dev, "status check fail: %d\n", rxbyte); 1118 iow(db, DM9000_RCR, 0x00); /* Stop Device */ 1119 return; 1120 } 1121 1122 if (!(rxbyte & DM9000_PKT_RDY)) 1123 return; 1124 1125 /* A packet ready now & Get status/length */ 1126 GoodPacket = true; 1127 writeb(DM9000_MRCMD, db->io_addr); 1128 1129 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); 1130 1131 RxLen = le16_to_cpu(rxhdr.RxLen); 1132 1133 if (netif_msg_rx_status(db)) 1134 dev_dbg(db->dev, "RX: status %02x, length %04x\n", 1135 rxhdr.RxStatus, RxLen); 1136 1137 /* Packet Status check */ 1138 if (RxLen < 0x40) { 1139 GoodPacket = false; 1140 if (netif_msg_rx_err(db)) 1141 dev_dbg(db->dev, "RX: Bad Packet (runt)\n"); 1142 } 1143 1144 if (RxLen > DM9000_PKT_MAX) { 1145 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen); 1146 } 1147 1148 /* rxhdr.RxStatus is identical to RSR register. */ 1149 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE | 1150 RSR_PLE | RSR_RWTO | 1151 RSR_LCS | RSR_RF)) { 1152 GoodPacket = false; 1153 if (rxhdr.RxStatus & RSR_FOE) { 1154 if (netif_msg_rx_err(db)) 1155 dev_dbg(db->dev, "fifo error\n"); 1156 dev->stats.rx_fifo_errors++; 1157 } 1158 if (rxhdr.RxStatus & RSR_CE) { 1159 if (netif_msg_rx_err(db)) 1160 dev_dbg(db->dev, "crc error\n"); 1161 dev->stats.rx_crc_errors++; 1162 } 1163 if (rxhdr.RxStatus & RSR_RF) { 1164 if (netif_msg_rx_err(db)) 1165 dev_dbg(db->dev, "length error\n"); 1166 dev->stats.rx_length_errors++; 1167 } 1168 } 1169 1170 /* Move data from DM9000 */ 1171 if (GoodPacket && 1172 ((skb = netdev_alloc_skb(dev, RxLen + 4)) != NULL)) { 1173 skb_reserve(skb, 2); 1174 rdptr = skb_put(skb, RxLen - 4); 1175 1176 /* Read received packet from RX SRAM */ 1177 1178 (db->inblk)(db->io_data, rdptr, RxLen); 1179 dev->stats.rx_bytes += RxLen; 1180 1181 /* Pass to upper layer */ 1182 skb->protocol = eth_type_trans(skb, dev); 1183 if (dev->features & NETIF_F_RXCSUM) { 1184 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0) 1185 skb->ip_summed = CHECKSUM_UNNECESSARY; 1186 else 1187 skb_checksum_none_assert(skb); 1188 } 1189 netif_rx(skb); 1190 dev->stats.rx_packets++; 1191 1192 } else { 1193 /* need to dump the packet's data */ 1194 1195 (db->dumpblk)(db->io_data, RxLen); 1196 } 1197 } while (rxbyte & DM9000_PKT_RDY); 1198 } 1199 1200 static irqreturn_t dm9000_interrupt(int irq, void *dev_id) 1201 { 1202 struct net_device *dev = dev_id; 1203 struct board_info *db = netdev_priv(dev); 1204 int int_status; 1205 unsigned long flags; 1206 u8 reg_save; 1207 1208 dm9000_dbg(db, 3, "entering %s\n", __func__); 1209 1210 /* A real interrupt coming */ 1211 1212 /* holders of db->lock must always block IRQs */ 1213 spin_lock_irqsave(&db->lock, flags); 1214 1215 /* Save previous register address */ 1216 reg_save = readb(db->io_addr); 1217 1218 dm9000_mask_interrupts(db); 1219 /* Got DM9000 interrupt status */ 1220 int_status = ior(db, DM9000_ISR); /* Got ISR */ 1221 iow(db, DM9000_ISR, int_status); /* Clear ISR status */ 1222 1223 if (netif_msg_intr(db)) 1224 dev_dbg(db->dev, "interrupt status %02x\n", int_status); 1225 1226 /* Received the coming packet */ 1227 if (int_status & ISR_PRS) 1228 dm9000_rx(dev); 1229 1230 /* Transmit Interrupt check */ 1231 if (int_status & ISR_PTS) 1232 dm9000_tx_done(dev, db); 1233 1234 if (db->type != TYPE_DM9000E) { 1235 if (int_status & ISR_LNKCHNG) { 1236 /* fire a link-change request */ 1237 schedule_delayed_work(&db->phy_poll, 1); 1238 } 1239 } 1240 1241 dm9000_unmask_interrupts(db); 1242 /* Restore previous register address */ 1243 writeb(reg_save, db->io_addr); 1244 1245 spin_unlock_irqrestore(&db->lock, flags); 1246 1247 return IRQ_HANDLED; 1248 } 1249 1250 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id) 1251 { 1252 struct net_device *dev = dev_id; 1253 struct board_info *db = netdev_priv(dev); 1254 unsigned long flags; 1255 unsigned nsr, wcr; 1256 1257 spin_lock_irqsave(&db->lock, flags); 1258 1259 nsr = ior(db, DM9000_NSR); 1260 wcr = ior(db, DM9000_WCR); 1261 1262 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr); 1263 1264 if (nsr & NSR_WAKEST) { 1265 /* clear, so we can avoid */ 1266 iow(db, DM9000_NSR, NSR_WAKEST); 1267 1268 if (wcr & WCR_LINKST) 1269 dev_info(db->dev, "wake by link status change\n"); 1270 if (wcr & WCR_SAMPLEST) 1271 dev_info(db->dev, "wake by sample packet\n"); 1272 if (wcr & WCR_MAGICST) 1273 dev_info(db->dev, "wake by magic packet\n"); 1274 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST))) 1275 dev_err(db->dev, "wake signalled with no reason? " 1276 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr); 1277 } 1278 1279 spin_unlock_irqrestore(&db->lock, flags); 1280 1281 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE; 1282 } 1283 1284 #ifdef CONFIG_NET_POLL_CONTROLLER 1285 /* 1286 *Used by netconsole 1287 */ 1288 static void dm9000_poll_controller(struct net_device *dev) 1289 { 1290 disable_irq(dev->irq); 1291 dm9000_interrupt(dev->irq, dev); 1292 enable_irq(dev->irq); 1293 } 1294 #endif 1295 1296 /* 1297 * Open the interface. 1298 * The interface is opened whenever "ifconfig" actives it. 1299 */ 1300 static int 1301 dm9000_open(struct net_device *dev) 1302 { 1303 struct board_info *db = netdev_priv(dev); 1304 unsigned int irq_flags = irq_get_trigger_type(dev->irq); 1305 1306 if (netif_msg_ifup(db)) 1307 dev_dbg(db->dev, "enabling %s\n", dev->name); 1308 1309 /* If there is no IRQ type specified, tell the user that this is a 1310 * problem 1311 */ 1312 if (irq_flags == IRQF_TRIGGER_NONE) 1313 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n"); 1314 1315 irq_flags |= IRQF_SHARED; 1316 1317 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */ 1318 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ 1319 mdelay(1); /* delay needs by DM9000B */ 1320 1321 /* Initialize DM9000 board */ 1322 dm9000_init_dm9000(dev); 1323 1324 if (request_irq(dev->irq, dm9000_interrupt, irq_flags, dev->name, dev)) 1325 return -EAGAIN; 1326 /* Now that we have an interrupt handler hooked up we can unmask 1327 * our interrupts 1328 */ 1329 dm9000_unmask_interrupts(db); 1330 1331 /* Init driver variable */ 1332 db->dbug_cnt = 0; 1333 1334 mii_check_media(&db->mii, netif_msg_link(db), 1); 1335 netif_start_queue(dev); 1336 1337 /* Poll initial link status */ 1338 schedule_delayed_work(&db->phy_poll, 1); 1339 1340 return 0; 1341 } 1342 1343 static void 1344 dm9000_shutdown(struct net_device *dev) 1345 { 1346 struct board_info *db = netdev_priv(dev); 1347 1348 /* RESET device */ 1349 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ 1350 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ 1351 dm9000_mask_interrupts(db); 1352 iow(db, DM9000_RCR, 0x00); /* Disable RX */ 1353 } 1354 1355 /* 1356 * Stop the interface. 1357 * The interface is stopped when it is brought. 1358 */ 1359 static int 1360 dm9000_stop(struct net_device *ndev) 1361 { 1362 struct board_info *db = netdev_priv(ndev); 1363 1364 if (netif_msg_ifdown(db)) 1365 dev_dbg(db->dev, "shutting down %s\n", ndev->name); 1366 1367 cancel_delayed_work_sync(&db->phy_poll); 1368 1369 netif_stop_queue(ndev); 1370 netif_carrier_off(ndev); 1371 1372 /* free interrupt */ 1373 free_irq(ndev->irq, ndev); 1374 1375 dm9000_shutdown(ndev); 1376 1377 return 0; 1378 } 1379 1380 static const struct net_device_ops dm9000_netdev_ops = { 1381 .ndo_open = dm9000_open, 1382 .ndo_stop = dm9000_stop, 1383 .ndo_start_xmit = dm9000_start_xmit, 1384 .ndo_tx_timeout = dm9000_timeout, 1385 .ndo_set_rx_mode = dm9000_hash_table, 1386 .ndo_do_ioctl = dm9000_ioctl, 1387 .ndo_set_features = dm9000_set_features, 1388 .ndo_validate_addr = eth_validate_addr, 1389 .ndo_set_mac_address = eth_mac_addr, 1390 #ifdef CONFIG_NET_POLL_CONTROLLER 1391 .ndo_poll_controller = dm9000_poll_controller, 1392 #endif 1393 }; 1394 1395 static struct dm9000_plat_data *dm9000_parse_dt(struct device *dev) 1396 { 1397 struct dm9000_plat_data *pdata; 1398 struct device_node *np = dev->of_node; 1399 const void *mac_addr; 1400 1401 if (!IS_ENABLED(CONFIG_OF) || !np) 1402 return ERR_PTR(-ENXIO); 1403 1404 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 1405 if (!pdata) 1406 return ERR_PTR(-ENOMEM); 1407 1408 if (of_find_property(np, "davicom,ext-phy", NULL)) 1409 pdata->flags |= DM9000_PLATF_EXT_PHY; 1410 if (of_find_property(np, "davicom,no-eeprom", NULL)) 1411 pdata->flags |= DM9000_PLATF_NO_EEPROM; 1412 1413 mac_addr = of_get_mac_address(np); 1414 if (mac_addr) 1415 memcpy(pdata->dev_addr, mac_addr, sizeof(pdata->dev_addr)); 1416 1417 return pdata; 1418 } 1419 1420 /* 1421 * Search DM9000 board, allocate space and register it 1422 */ 1423 static int 1424 dm9000_probe(struct platform_device *pdev) 1425 { 1426 struct dm9000_plat_data *pdata = dev_get_platdata(&pdev->dev); 1427 struct board_info *db; /* Point a board information structure */ 1428 struct net_device *ndev; 1429 struct device *dev = &pdev->dev; 1430 const unsigned char *mac_src; 1431 int ret = 0; 1432 int iosize; 1433 int i; 1434 u32 id_val; 1435 int reset_gpios; 1436 enum of_gpio_flags flags; 1437 struct regulator *power; 1438 bool inv_mac_addr = false; 1439 1440 power = devm_regulator_get(dev, "vcc"); 1441 if (IS_ERR(power)) { 1442 if (PTR_ERR(power) == -EPROBE_DEFER) 1443 return -EPROBE_DEFER; 1444 dev_dbg(dev, "no regulator provided\n"); 1445 } else { 1446 ret = regulator_enable(power); 1447 if (ret != 0) { 1448 dev_err(dev, 1449 "Failed to enable power regulator: %d\n", ret); 1450 return ret; 1451 } 1452 dev_dbg(dev, "regulator enabled\n"); 1453 } 1454 1455 reset_gpios = of_get_named_gpio_flags(dev->of_node, "reset-gpios", 0, 1456 &flags); 1457 if (gpio_is_valid(reset_gpios)) { 1458 ret = devm_gpio_request_one(dev, reset_gpios, flags, 1459 "dm9000_reset"); 1460 if (ret) { 1461 dev_err(dev, "failed to request reset gpio %d: %d\n", 1462 reset_gpios, ret); 1463 return -ENODEV; 1464 } 1465 1466 /* According to manual PWRST# Low Period Min 1ms */ 1467 msleep(2); 1468 gpio_set_value(reset_gpios, 1); 1469 /* Needs 3ms to read eeprom when PWRST is deasserted */ 1470 msleep(4); 1471 } 1472 1473 if (!pdata) { 1474 pdata = dm9000_parse_dt(&pdev->dev); 1475 if (IS_ERR(pdata)) 1476 return PTR_ERR(pdata); 1477 } 1478 1479 /* Init network device */ 1480 ndev = alloc_etherdev(sizeof(struct board_info)); 1481 if (!ndev) 1482 return -ENOMEM; 1483 1484 SET_NETDEV_DEV(ndev, &pdev->dev); 1485 1486 dev_dbg(&pdev->dev, "dm9000_probe()\n"); 1487 1488 /* setup board info structure */ 1489 db = netdev_priv(ndev); 1490 1491 db->dev = &pdev->dev; 1492 db->ndev = ndev; 1493 1494 spin_lock_init(&db->lock); 1495 mutex_init(&db->addr_lock); 1496 1497 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work); 1498 1499 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1500 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1501 1502 if (!db->addr_res || !db->data_res) { 1503 dev_err(db->dev, "insufficient resources addr=%p data=%p\n", 1504 db->addr_res, db->data_res); 1505 ret = -ENOENT; 1506 goto out; 1507 } 1508 1509 ndev->irq = platform_get_irq(pdev, 0); 1510 if (ndev->irq < 0) { 1511 dev_err(db->dev, "interrupt resource unavailable: %d\n", 1512 ndev->irq); 1513 ret = ndev->irq; 1514 goto out; 1515 } 1516 1517 db->irq_wake = platform_get_irq(pdev, 1); 1518 if (db->irq_wake >= 0) { 1519 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake); 1520 1521 ret = request_irq(db->irq_wake, dm9000_wol_interrupt, 1522 IRQF_SHARED, dev_name(db->dev), ndev); 1523 if (ret) { 1524 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret); 1525 } else { 1526 1527 /* test to see if irq is really wakeup capable */ 1528 ret = irq_set_irq_wake(db->irq_wake, 1); 1529 if (ret) { 1530 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n", 1531 db->irq_wake, ret); 1532 ret = 0; 1533 } else { 1534 irq_set_irq_wake(db->irq_wake, 0); 1535 db->wake_supported = 1; 1536 } 1537 } 1538 } 1539 1540 iosize = resource_size(db->addr_res); 1541 db->addr_req = request_mem_region(db->addr_res->start, iosize, 1542 pdev->name); 1543 1544 if (db->addr_req == NULL) { 1545 dev_err(db->dev, "cannot claim address reg area\n"); 1546 ret = -EIO; 1547 goto out; 1548 } 1549 1550 db->io_addr = ioremap(db->addr_res->start, iosize); 1551 1552 if (db->io_addr == NULL) { 1553 dev_err(db->dev, "failed to ioremap address reg\n"); 1554 ret = -EINVAL; 1555 goto out; 1556 } 1557 1558 iosize = resource_size(db->data_res); 1559 db->data_req = request_mem_region(db->data_res->start, iosize, 1560 pdev->name); 1561 1562 if (db->data_req == NULL) { 1563 dev_err(db->dev, "cannot claim data reg area\n"); 1564 ret = -EIO; 1565 goto out; 1566 } 1567 1568 db->io_data = ioremap(db->data_res->start, iosize); 1569 1570 if (db->io_data == NULL) { 1571 dev_err(db->dev, "failed to ioremap data reg\n"); 1572 ret = -EINVAL; 1573 goto out; 1574 } 1575 1576 /* fill in parameters for net-dev structure */ 1577 ndev->base_addr = (unsigned long)db->io_addr; 1578 1579 /* ensure at least we have a default set of IO routines */ 1580 dm9000_set_io(db, iosize); 1581 1582 /* check to see if anything is being over-ridden */ 1583 if (pdata != NULL) { 1584 /* check to see if the driver wants to over-ride the 1585 * default IO width */ 1586 1587 if (pdata->flags & DM9000_PLATF_8BITONLY) 1588 dm9000_set_io(db, 1); 1589 1590 if (pdata->flags & DM9000_PLATF_16BITONLY) 1591 dm9000_set_io(db, 2); 1592 1593 if (pdata->flags & DM9000_PLATF_32BITONLY) 1594 dm9000_set_io(db, 4); 1595 1596 /* check to see if there are any IO routine 1597 * over-rides */ 1598 1599 if (pdata->inblk != NULL) 1600 db->inblk = pdata->inblk; 1601 1602 if (pdata->outblk != NULL) 1603 db->outblk = pdata->outblk; 1604 1605 if (pdata->dumpblk != NULL) 1606 db->dumpblk = pdata->dumpblk; 1607 1608 db->flags = pdata->flags; 1609 } 1610 1611 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL 1612 db->flags |= DM9000_PLATF_SIMPLE_PHY; 1613 #endif 1614 1615 dm9000_reset(db); 1616 1617 /* try multiple times, DM9000 sometimes gets the read wrong */ 1618 for (i = 0; i < 8; i++) { 1619 id_val = ior(db, DM9000_VIDL); 1620 id_val |= (u32)ior(db, DM9000_VIDH) << 8; 1621 id_val |= (u32)ior(db, DM9000_PIDL) << 16; 1622 id_val |= (u32)ior(db, DM9000_PIDH) << 24; 1623 1624 if (id_val == DM9000_ID) 1625 break; 1626 dev_err(db->dev, "read wrong id 0x%08x\n", id_val); 1627 } 1628 1629 if (id_val != DM9000_ID) { 1630 dev_err(db->dev, "wrong id: 0x%08x\n", id_val); 1631 ret = -ENODEV; 1632 goto out; 1633 } 1634 1635 /* Identify what type of DM9000 we are working on */ 1636 1637 id_val = ior(db, DM9000_CHIPR); 1638 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val); 1639 1640 switch (id_val) { 1641 case CHIPR_DM9000A: 1642 db->type = TYPE_DM9000A; 1643 break; 1644 case CHIPR_DM9000B: 1645 db->type = TYPE_DM9000B; 1646 break; 1647 default: 1648 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val); 1649 db->type = TYPE_DM9000E; 1650 } 1651 1652 /* dm9000a/b are capable of hardware checksum offload */ 1653 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) { 1654 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM; 1655 ndev->features |= ndev->hw_features; 1656 } 1657 1658 /* from this point we assume that we have found a DM9000 */ 1659 1660 ndev->netdev_ops = &dm9000_netdev_ops; 1661 ndev->watchdog_timeo = msecs_to_jiffies(watchdog); 1662 ndev->ethtool_ops = &dm9000_ethtool_ops; 1663 1664 db->msg_enable = NETIF_MSG_LINK; 1665 db->mii.phy_id_mask = 0x1f; 1666 db->mii.reg_num_mask = 0x1f; 1667 db->mii.force_media = 0; 1668 db->mii.full_duplex = 0; 1669 db->mii.dev = ndev; 1670 db->mii.mdio_read = dm9000_phy_read; 1671 db->mii.mdio_write = dm9000_phy_write; 1672 1673 mac_src = "eeprom"; 1674 1675 /* try reading the node address from the attached EEPROM */ 1676 for (i = 0; i < 6; i += 2) 1677 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i); 1678 1679 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) { 1680 mac_src = "platform data"; 1681 memcpy(ndev->dev_addr, pdata->dev_addr, ETH_ALEN); 1682 } 1683 1684 if (!is_valid_ether_addr(ndev->dev_addr)) { 1685 /* try reading from mac */ 1686 1687 mac_src = "chip"; 1688 for (i = 0; i < 6; i++) 1689 ndev->dev_addr[i] = ior(db, i+DM9000_PAR); 1690 } 1691 1692 if (!is_valid_ether_addr(ndev->dev_addr)) { 1693 inv_mac_addr = true; 1694 eth_hw_addr_random(ndev); 1695 mac_src = "random"; 1696 } 1697 1698 1699 platform_set_drvdata(pdev, ndev); 1700 ret = register_netdev(ndev); 1701 1702 if (ret == 0) { 1703 if (inv_mac_addr) 1704 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please set using ip\n", 1705 ndev->name); 1706 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n", 1707 ndev->name, dm9000_type_to_char(db->type), 1708 db->io_addr, db->io_data, ndev->irq, 1709 ndev->dev_addr, mac_src); 1710 } 1711 return 0; 1712 1713 out: 1714 dev_err(db->dev, "not found (%d).\n", ret); 1715 1716 dm9000_release_board(pdev, db); 1717 free_netdev(ndev); 1718 1719 return ret; 1720 } 1721 1722 static int 1723 dm9000_drv_suspend(struct device *dev) 1724 { 1725 struct platform_device *pdev = to_platform_device(dev); 1726 struct net_device *ndev = platform_get_drvdata(pdev); 1727 struct board_info *db; 1728 1729 if (ndev) { 1730 db = netdev_priv(ndev); 1731 db->in_suspend = 1; 1732 1733 if (!netif_running(ndev)) 1734 return 0; 1735 1736 netif_device_detach(ndev); 1737 1738 /* only shutdown if not using WoL */ 1739 if (!db->wake_state) 1740 dm9000_shutdown(ndev); 1741 } 1742 return 0; 1743 } 1744 1745 static int 1746 dm9000_drv_resume(struct device *dev) 1747 { 1748 struct platform_device *pdev = to_platform_device(dev); 1749 struct net_device *ndev = platform_get_drvdata(pdev); 1750 struct board_info *db = netdev_priv(ndev); 1751 1752 if (ndev) { 1753 if (netif_running(ndev)) { 1754 /* reset if we were not in wake mode to ensure if 1755 * the device was powered off it is in a known state */ 1756 if (!db->wake_state) { 1757 dm9000_init_dm9000(ndev); 1758 dm9000_unmask_interrupts(db); 1759 } 1760 1761 netif_device_attach(ndev); 1762 } 1763 1764 db->in_suspend = 0; 1765 } 1766 return 0; 1767 } 1768 1769 static const struct dev_pm_ops dm9000_drv_pm_ops = { 1770 .suspend = dm9000_drv_suspend, 1771 .resume = dm9000_drv_resume, 1772 }; 1773 1774 static int 1775 dm9000_drv_remove(struct platform_device *pdev) 1776 { 1777 struct net_device *ndev = platform_get_drvdata(pdev); 1778 1779 unregister_netdev(ndev); 1780 dm9000_release_board(pdev, netdev_priv(ndev)); 1781 free_netdev(ndev); /* free device structure */ 1782 1783 dev_dbg(&pdev->dev, "released and freed device\n"); 1784 return 0; 1785 } 1786 1787 #ifdef CONFIG_OF 1788 static const struct of_device_id dm9000_of_matches[] = { 1789 { .compatible = "davicom,dm9000", }, 1790 { /* sentinel */ } 1791 }; 1792 MODULE_DEVICE_TABLE(of, dm9000_of_matches); 1793 #endif 1794 1795 static struct platform_driver dm9000_driver = { 1796 .driver = { 1797 .name = "dm9000", 1798 .pm = &dm9000_drv_pm_ops, 1799 .of_match_table = of_match_ptr(dm9000_of_matches), 1800 }, 1801 .probe = dm9000_probe, 1802 .remove = dm9000_drv_remove, 1803 }; 1804 1805 module_platform_driver(dm9000_driver); 1806 1807 MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); 1808 MODULE_DESCRIPTION("Davicom DM9000 network driver"); 1809 MODULE_LICENSE("GPL"); 1810 MODULE_ALIAS("platform:dm9000"); 1811