1 // SPDX-License-Identifier: GPL-2.0
2 /* Ethernet device driver for Cortina Systems Gemini SoC
3  * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus
4  * Net Engine and Gigabit Ethernet MAC (GMAC)
5  * This hardware contains a TCP Offload Engine (TOE) but currently the
6  * driver does not make use of it.
7  *
8  * Authors:
9  * Linus Walleij <linus.walleij@linaro.org>
10  * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT)
11  * Michał Mirosław <mirq-linux@rere.qmqm.pl>
12  * Paulius Zaleckas <paulius.zaleckas@gmail.com>
13  * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it>
14  * Gary Chen & Ch Hsu Storlink Semiconductor
15  */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/cache.h>
24 #include <linux/interrupt.h>
25 #include <linux/reset.h>
26 #include <linux/clk.h>
27 #include <linux/of.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_net.h>
30 #include <linux/of_platform.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_vlan.h>
33 #include <linux/skbuff.h>
34 #include <linux/phy.h>
35 #include <linux/crc32.h>
36 #include <linux/ethtool.h>
37 #include <linux/tcp.h>
38 #include <linux/u64_stats_sync.h>
39 
40 #include <linux/in.h>
41 #include <linux/ip.h>
42 #include <linux/ipv6.h>
43 
44 #include "gemini.h"
45 
46 #define DRV_NAME		"gmac-gemini"
47 
48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
49 static int debug = -1;
50 module_param(debug, int, 0);
51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
52 
53 #define HSIZE_8			0x00
54 #define HSIZE_16		0x01
55 #define HSIZE_32		0x02
56 
57 #define HBURST_SINGLE		0x00
58 #define HBURST_INCR		0x01
59 #define HBURST_INCR4		0x02
60 #define HBURST_INCR8		0x03
61 
62 #define HPROT_DATA_CACHE	BIT(0)
63 #define HPROT_PRIVILIGED	BIT(1)
64 #define HPROT_BUFFERABLE	BIT(2)
65 #define HPROT_CACHABLE		BIT(3)
66 
67 #define DEFAULT_RX_COALESCE_NSECS	0
68 #define DEFAULT_GMAC_RXQ_ORDER		9
69 #define DEFAULT_GMAC_TXQ_ORDER		8
70 #define DEFAULT_RX_BUF_ORDER		11
71 #define TX_MAX_FRAGS			16
72 #define TX_QUEUE_NUM			1	/* max: 6 */
73 #define RX_MAX_ALLOC_ORDER		2
74 
75 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \
76 		      GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT)
77 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \
78 			      GMAC0_SWTQ00_FIN_INT_BIT)
79 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT)
80 
81 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \
82 		NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \
83 		NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
84 
85 /**
86  * struct gmac_queue_page - page buffer per-page info
87  * @page: the page struct
88  * @mapping: the dma address handle
89  */
90 struct gmac_queue_page {
91 	struct page *page;
92 	dma_addr_t mapping;
93 };
94 
95 struct gmac_txq {
96 	struct gmac_txdesc *ring;
97 	struct sk_buff	**skb;
98 	unsigned int	cptr;
99 	unsigned int	noirq_packets;
100 };
101 
102 struct gemini_ethernet;
103 
104 struct gemini_ethernet_port {
105 	u8 id; /* 0 or 1 */
106 
107 	struct gemini_ethernet *geth;
108 	struct net_device *netdev;
109 	struct device *dev;
110 	void __iomem *dma_base;
111 	void __iomem *gmac_base;
112 	struct clk *pclk;
113 	struct reset_control *reset;
114 	int irq;
115 	__le32 mac_addr[3];
116 
117 	void __iomem		*rxq_rwptr;
118 	struct gmac_rxdesc	*rxq_ring;
119 	unsigned int		rxq_order;
120 
121 	struct napi_struct	napi;
122 	struct hrtimer		rx_coalesce_timer;
123 	unsigned int		rx_coalesce_nsecs;
124 	unsigned int		freeq_refill;
125 	struct gmac_txq		txq[TX_QUEUE_NUM];
126 	unsigned int		txq_order;
127 	unsigned int		irq_every_tx_packets;
128 
129 	dma_addr_t		rxq_dma_base;
130 	dma_addr_t		txq_dma_base;
131 
132 	unsigned int		msg_enable;
133 	spinlock_t		config_lock; /* Locks config register */
134 
135 	struct u64_stats_sync	tx_stats_syncp;
136 	struct u64_stats_sync	rx_stats_syncp;
137 	struct u64_stats_sync	ir_stats_syncp;
138 
139 	struct rtnl_link_stats64 stats;
140 	u64			hw_stats[RX_STATS_NUM];
141 	u64			rx_stats[RX_STATUS_NUM];
142 	u64			rx_csum_stats[RX_CHKSUM_NUM];
143 	u64			rx_napi_exits;
144 	u64			tx_frag_stats[TX_MAX_FRAGS];
145 	u64			tx_frags_linearized;
146 	u64			tx_hw_csummed;
147 };
148 
149 struct gemini_ethernet {
150 	struct device *dev;
151 	void __iomem *base;
152 	struct gemini_ethernet_port *port0;
153 	struct gemini_ethernet_port *port1;
154 	bool initialized;
155 
156 	spinlock_t	irq_lock; /* Locks IRQ-related registers */
157 	unsigned int	freeq_order;
158 	unsigned int	freeq_frag_order;
159 	struct gmac_rxdesc *freeq_ring;
160 	dma_addr_t	freeq_dma_base;
161 	struct gmac_queue_page	*freeq_pages;
162 	unsigned int	num_freeq_pages;
163 	spinlock_t	freeq_lock; /* Locks queue from reentrance */
164 };
165 
166 #define GMAC_STATS_NUM	( \
167 	RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \
168 	TX_MAX_FRAGS + 2)
169 
170 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = {
171 	"GMAC_IN_DISCARDS",
172 	"GMAC_IN_ERRORS",
173 	"GMAC_IN_MCAST",
174 	"GMAC_IN_BCAST",
175 	"GMAC_IN_MAC1",
176 	"GMAC_IN_MAC2",
177 	"RX_STATUS_GOOD_FRAME",
178 	"RX_STATUS_TOO_LONG_GOOD_CRC",
179 	"RX_STATUS_RUNT_FRAME",
180 	"RX_STATUS_SFD_NOT_FOUND",
181 	"RX_STATUS_CRC_ERROR",
182 	"RX_STATUS_TOO_LONG_BAD_CRC",
183 	"RX_STATUS_ALIGNMENT_ERROR",
184 	"RX_STATUS_TOO_LONG_BAD_ALIGN",
185 	"RX_STATUS_RX_ERR",
186 	"RX_STATUS_DA_FILTERED",
187 	"RX_STATUS_BUFFER_FULL",
188 	"RX_STATUS_11",
189 	"RX_STATUS_12",
190 	"RX_STATUS_13",
191 	"RX_STATUS_14",
192 	"RX_STATUS_15",
193 	"RX_CHKSUM_IP_UDP_TCP_OK",
194 	"RX_CHKSUM_IP_OK_ONLY",
195 	"RX_CHKSUM_NONE",
196 	"RX_CHKSUM_3",
197 	"RX_CHKSUM_IP_ERR_UNKNOWN",
198 	"RX_CHKSUM_IP_ERR",
199 	"RX_CHKSUM_TCP_UDP_ERR",
200 	"RX_CHKSUM_7",
201 	"RX_NAPI_EXITS",
202 	"TX_FRAGS[1]",
203 	"TX_FRAGS[2]",
204 	"TX_FRAGS[3]",
205 	"TX_FRAGS[4]",
206 	"TX_FRAGS[5]",
207 	"TX_FRAGS[6]",
208 	"TX_FRAGS[7]",
209 	"TX_FRAGS[8]",
210 	"TX_FRAGS[9]",
211 	"TX_FRAGS[10]",
212 	"TX_FRAGS[11]",
213 	"TX_FRAGS[12]",
214 	"TX_FRAGS[13]",
215 	"TX_FRAGS[14]",
216 	"TX_FRAGS[15]",
217 	"TX_FRAGS[16+]",
218 	"TX_FRAGS_LINEARIZED",
219 	"TX_HW_CSUMMED",
220 };
221 
222 static void gmac_dump_dma_state(struct net_device *netdev);
223 
224 static void gmac_update_config0_reg(struct net_device *netdev,
225 				    u32 val, u32 vmask)
226 {
227 	struct gemini_ethernet_port *port = netdev_priv(netdev);
228 	unsigned long flags;
229 	u32 reg;
230 
231 	spin_lock_irqsave(&port->config_lock, flags);
232 
233 	reg = readl(port->gmac_base + GMAC_CONFIG0);
234 	reg = (reg & ~vmask) | val;
235 	writel(reg, port->gmac_base + GMAC_CONFIG0);
236 
237 	spin_unlock_irqrestore(&port->config_lock, flags);
238 }
239 
240 static void gmac_enable_tx_rx(struct net_device *netdev)
241 {
242 	struct gemini_ethernet_port *port = netdev_priv(netdev);
243 	unsigned long flags;
244 	u32 reg;
245 
246 	spin_lock_irqsave(&port->config_lock, flags);
247 
248 	reg = readl(port->gmac_base + GMAC_CONFIG0);
249 	reg &= ~CONFIG0_TX_RX_DISABLE;
250 	writel(reg, port->gmac_base + GMAC_CONFIG0);
251 
252 	spin_unlock_irqrestore(&port->config_lock, flags);
253 }
254 
255 static void gmac_disable_tx_rx(struct net_device *netdev)
256 {
257 	struct gemini_ethernet_port *port = netdev_priv(netdev);
258 	unsigned long flags;
259 	u32 val;
260 
261 	spin_lock_irqsave(&port->config_lock, flags);
262 
263 	val = readl(port->gmac_base + GMAC_CONFIG0);
264 	val |= CONFIG0_TX_RX_DISABLE;
265 	writel(val, port->gmac_base + GMAC_CONFIG0);
266 
267 	spin_unlock_irqrestore(&port->config_lock, flags);
268 
269 	mdelay(10);	/* let GMAC consume packet */
270 }
271 
272 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx)
273 {
274 	struct gemini_ethernet_port *port = netdev_priv(netdev);
275 	unsigned long flags;
276 	u32 val;
277 
278 	spin_lock_irqsave(&port->config_lock, flags);
279 
280 	val = readl(port->gmac_base + GMAC_CONFIG0);
281 	val &= ~CONFIG0_FLOW_CTL;
282 	if (tx)
283 		val |= CONFIG0_FLOW_TX;
284 	if (rx)
285 		val |= CONFIG0_FLOW_RX;
286 	writel(val, port->gmac_base + GMAC_CONFIG0);
287 
288 	spin_unlock_irqrestore(&port->config_lock, flags);
289 }
290 
291 static void gmac_speed_set(struct net_device *netdev)
292 {
293 	struct gemini_ethernet_port *port = netdev_priv(netdev);
294 	struct phy_device *phydev = netdev->phydev;
295 	union gmac_status status, old_status;
296 	int pause_tx = 0;
297 	int pause_rx = 0;
298 
299 	status.bits32 = readl(port->gmac_base + GMAC_STATUS);
300 	old_status.bits32 = status.bits32;
301 	status.bits.link = phydev->link;
302 	status.bits.duplex = phydev->duplex;
303 
304 	switch (phydev->speed) {
305 	case 1000:
306 		status.bits.speed = GMAC_SPEED_1000;
307 		if (phy_interface_mode_is_rgmii(phydev->interface))
308 			status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
309 		netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n",
310 			   phydev_name(phydev));
311 		break;
312 	case 100:
313 		status.bits.speed = GMAC_SPEED_100;
314 		if (phy_interface_mode_is_rgmii(phydev->interface))
315 			status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
316 		netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n",
317 			   phydev_name(phydev));
318 		break;
319 	case 10:
320 		status.bits.speed = GMAC_SPEED_10;
321 		if (phy_interface_mode_is_rgmii(phydev->interface))
322 			status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
323 		netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n",
324 			   phydev_name(phydev));
325 		break;
326 	default:
327 		netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n",
328 			    phydev->speed, phydev_name(phydev));
329 	}
330 
331 	if (phydev->duplex == DUPLEX_FULL) {
332 		u16 lcladv = phy_read(phydev, MII_ADVERTISE);
333 		u16 rmtadv = phy_read(phydev, MII_LPA);
334 		u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
335 
336 		if (cap & FLOW_CTRL_RX)
337 			pause_rx = 1;
338 		if (cap & FLOW_CTRL_TX)
339 			pause_tx = 1;
340 	}
341 
342 	gmac_set_flow_control(netdev, pause_tx, pause_rx);
343 
344 	if (old_status.bits32 == status.bits32)
345 		return;
346 
347 	if (netif_msg_link(port)) {
348 		phy_print_status(phydev);
349 		netdev_info(netdev, "link flow control: %s\n",
350 			    phydev->pause
351 			    ? (phydev->asym_pause ? "tx" : "both")
352 			    : (phydev->asym_pause ? "rx" : "none")
353 		);
354 	}
355 
356 	gmac_disable_tx_rx(netdev);
357 	writel(status.bits32, port->gmac_base + GMAC_STATUS);
358 	gmac_enable_tx_rx(netdev);
359 }
360 
361 static int gmac_setup_phy(struct net_device *netdev)
362 {
363 	struct gemini_ethernet_port *port = netdev_priv(netdev);
364 	union gmac_status status = { .bits32 = 0 };
365 	struct device *dev = port->dev;
366 	struct phy_device *phy;
367 
368 	phy = of_phy_get_and_connect(netdev,
369 				     dev->of_node,
370 				     gmac_speed_set);
371 	if (!phy)
372 		return -ENODEV;
373 	netdev->phydev = phy;
374 
375 	phy_set_max_speed(phy, SPEED_1000);
376 	phy_support_asym_pause(phy);
377 
378 	/* set PHY interface type */
379 	switch (phy->interface) {
380 	case PHY_INTERFACE_MODE_MII:
381 		netdev_dbg(netdev,
382 			   "MII: set GMAC0 to GMII mode, GMAC1 disabled\n");
383 		status.bits.mii_rmii = GMAC_PHY_MII;
384 		break;
385 	case PHY_INTERFACE_MODE_GMII:
386 		netdev_dbg(netdev,
387 			   "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n");
388 		status.bits.mii_rmii = GMAC_PHY_GMII;
389 		break;
390 	case PHY_INTERFACE_MODE_RGMII:
391 	case PHY_INTERFACE_MODE_RGMII_ID:
392 	case PHY_INTERFACE_MODE_RGMII_TXID:
393 	case PHY_INTERFACE_MODE_RGMII_RXID:
394 		netdev_dbg(netdev,
395 			   "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n");
396 		status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
397 		break;
398 	default:
399 		netdev_err(netdev, "Unsupported MII interface\n");
400 		phy_disconnect(phy);
401 		netdev->phydev = NULL;
402 		return -EINVAL;
403 	}
404 	writel(status.bits32, port->gmac_base + GMAC_STATUS);
405 
406 	if (netif_msg_link(port))
407 		phy_attached_info(phy);
408 
409 	return 0;
410 }
411 
412 /* The maximum frame length is not logically enumerated in the
413  * hardware, so we do a table lookup to find the applicable max
414  * frame length.
415  */
416 struct gmac_max_framelen {
417 	unsigned int max_l3_len;
418 	u8 val;
419 };
420 
421 static const struct gmac_max_framelen gmac_maxlens[] = {
422 	{
423 		.max_l3_len = 1518,
424 		.val = CONFIG0_MAXLEN_1518,
425 	},
426 	{
427 		.max_l3_len = 1522,
428 		.val = CONFIG0_MAXLEN_1522,
429 	},
430 	{
431 		.max_l3_len = 1536,
432 		.val = CONFIG0_MAXLEN_1536,
433 	},
434 	{
435 		.max_l3_len = 1542,
436 		.val = CONFIG0_MAXLEN_1542,
437 	},
438 	{
439 		.max_l3_len = 9212,
440 		.val = CONFIG0_MAXLEN_9k,
441 	},
442 	{
443 		.max_l3_len = 10236,
444 		.val = CONFIG0_MAXLEN_10k,
445 	},
446 };
447 
448 static int gmac_pick_rx_max_len(unsigned int max_l3_len)
449 {
450 	const struct gmac_max_framelen *maxlen;
451 	int maxtot;
452 	int i;
453 
454 	maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN;
455 
456 	for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) {
457 		maxlen = &gmac_maxlens[i];
458 		if (maxtot <= maxlen->max_l3_len)
459 			return maxlen->val;
460 	}
461 
462 	return -1;
463 }
464 
465 static int gmac_init(struct net_device *netdev)
466 {
467 	struct gemini_ethernet_port *port = netdev_priv(netdev);
468 	union gmac_config0 config0 = { .bits = {
469 		.dis_tx = 1,
470 		.dis_rx = 1,
471 		.ipv4_rx_chksum = 1,
472 		.ipv6_rx_chksum = 1,
473 		.rx_err_detect = 1,
474 		.rgmm_edge = 1,
475 		.port0_chk_hwq = 1,
476 		.port1_chk_hwq = 1,
477 		.port0_chk_toeq = 1,
478 		.port1_chk_toeq = 1,
479 		.port0_chk_classq = 1,
480 		.port1_chk_classq = 1,
481 	} };
482 	union gmac_ahb_weight ahb_weight = { .bits = {
483 		.rx_weight = 1,
484 		.tx_weight = 1,
485 		.hash_weight = 1,
486 		.pre_req = 0x1f,
487 		.tq_dv_threshold = 0,
488 	} };
489 	union gmac_tx_wcr0 hw_weigh = { .bits = {
490 		.hw_tq3 = 1,
491 		.hw_tq2 = 1,
492 		.hw_tq1 = 1,
493 		.hw_tq0 = 1,
494 	} };
495 	union gmac_tx_wcr1 sw_weigh = { .bits = {
496 		.sw_tq5 = 1,
497 		.sw_tq4 = 1,
498 		.sw_tq3 = 1,
499 		.sw_tq2 = 1,
500 		.sw_tq1 = 1,
501 		.sw_tq0 = 1,
502 	} };
503 	union gmac_config1 config1 = { .bits = {
504 		.set_threshold = 16,
505 		.rel_threshold = 24,
506 	} };
507 	union gmac_config2 config2 = { .bits = {
508 		.set_threshold = 16,
509 		.rel_threshold = 32,
510 	} };
511 	union gmac_config3 config3 = { .bits = {
512 		.set_threshold = 0,
513 		.rel_threshold = 0,
514 	} };
515 	union gmac_config0 tmp;
516 
517 	config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
518 	tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
519 	config0.bits.reserved = tmp.bits.reserved;
520 	writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
521 	writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
522 	writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
523 	writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
524 
525 	readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
526 	writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
527 
528 	writel(hw_weigh.bits32,
529 	       port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
530 	writel(sw_weigh.bits32,
531 	       port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
532 
533 	port->rxq_order = DEFAULT_GMAC_RXQ_ORDER;
534 	port->txq_order = DEFAULT_GMAC_TXQ_ORDER;
535 	port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS;
536 
537 	/* Mark every quarter of the queue a packet for interrupt
538 	 * in order to be able to wake up the queue if it was stopped
539 	 */
540 	port->irq_every_tx_packets = 1 << (port->txq_order - 2);
541 
542 	return 0;
543 }
544 
545 static int gmac_setup_txqs(struct net_device *netdev)
546 {
547 	struct gemini_ethernet_port *port = netdev_priv(netdev);
548 	unsigned int n_txq = netdev->num_tx_queues;
549 	struct gemini_ethernet *geth = port->geth;
550 	size_t entries = 1 << port->txq_order;
551 	struct gmac_txq *txq = port->txq;
552 	struct gmac_txdesc *desc_ring;
553 	size_t len = n_txq * entries;
554 	struct sk_buff **skb_tab;
555 	void __iomem *rwptr_reg;
556 	unsigned int r;
557 	int i;
558 
559 	rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
560 
561 	skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL);
562 	if (!skb_tab)
563 		return -ENOMEM;
564 
565 	desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring),
566 				       &port->txq_dma_base, GFP_KERNEL);
567 
568 	if (!desc_ring) {
569 		kfree(skb_tab);
570 		return -ENOMEM;
571 	}
572 
573 	if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
574 		dev_warn(geth->dev, "TX queue base is not aligned\n");
575 		dma_free_coherent(geth->dev, len * sizeof(*desc_ring),
576 				  desc_ring, port->txq_dma_base);
577 		kfree(skb_tab);
578 		return -ENOMEM;
579 	}
580 
581 	writel(port->txq_dma_base | port->txq_order,
582 	       port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
583 
584 	for (i = 0; i < n_txq; i++) {
585 		txq->ring = desc_ring;
586 		txq->skb = skb_tab;
587 		txq->noirq_packets = 0;
588 
589 		r = readw(rwptr_reg);
590 		rwptr_reg += 2;
591 		writew(r, rwptr_reg);
592 		rwptr_reg += 2;
593 		txq->cptr = r;
594 
595 		txq++;
596 		desc_ring += entries;
597 		skb_tab += entries;
598 	}
599 
600 	return 0;
601 }
602 
603 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq,
604 			   unsigned int r)
605 {
606 	struct gemini_ethernet_port *port = netdev_priv(netdev);
607 	unsigned int m = (1 << port->txq_order) - 1;
608 	struct gemini_ethernet *geth = port->geth;
609 	unsigned int c = txq->cptr;
610 	union gmac_txdesc_0 word0;
611 	union gmac_txdesc_1 word1;
612 	unsigned int hwchksum = 0;
613 	unsigned long bytes = 0;
614 	struct gmac_txdesc *txd;
615 	unsigned short nfrags;
616 	unsigned int errs = 0;
617 	unsigned int pkts = 0;
618 	unsigned int word3;
619 	dma_addr_t mapping;
620 
621 	if (c == r)
622 		return;
623 
624 	while (c != r) {
625 		txd = txq->ring + c;
626 		word0 = txd->word0;
627 		word1 = txd->word1;
628 		mapping = txd->word2.buf_adr;
629 		word3 = txd->word3.bits32;
630 
631 		dma_unmap_single(geth->dev, mapping,
632 				 word0.bits.buffer_size, DMA_TO_DEVICE);
633 
634 		if (word3 & EOF_BIT)
635 			dev_kfree_skb(txq->skb[c]);
636 
637 		c++;
638 		c &= m;
639 
640 		if (!(word3 & SOF_BIT))
641 			continue;
642 
643 		if (!word0.bits.status_tx_ok) {
644 			errs++;
645 			continue;
646 		}
647 
648 		pkts++;
649 		bytes += txd->word1.bits.byte_count;
650 
651 		if (word1.bits32 & TSS_CHECKUM_ENABLE)
652 			hwchksum++;
653 
654 		nfrags = word0.bits.desc_count - 1;
655 		if (nfrags) {
656 			if (nfrags >= TX_MAX_FRAGS)
657 				nfrags = TX_MAX_FRAGS - 1;
658 
659 			u64_stats_update_begin(&port->tx_stats_syncp);
660 			port->tx_frag_stats[nfrags]++;
661 			u64_stats_update_end(&port->tx_stats_syncp);
662 		}
663 	}
664 
665 	u64_stats_update_begin(&port->ir_stats_syncp);
666 	port->stats.tx_errors += errs;
667 	port->stats.tx_packets += pkts;
668 	port->stats.tx_bytes += bytes;
669 	port->tx_hw_csummed += hwchksum;
670 	u64_stats_update_end(&port->ir_stats_syncp);
671 
672 	txq->cptr = c;
673 }
674 
675 static void gmac_cleanup_txqs(struct net_device *netdev)
676 {
677 	struct gemini_ethernet_port *port = netdev_priv(netdev);
678 	unsigned int n_txq = netdev->num_tx_queues;
679 	struct gemini_ethernet *geth = port->geth;
680 	void __iomem *rwptr_reg;
681 	unsigned int r, i;
682 
683 	rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
684 
685 	for (i = 0; i < n_txq; i++) {
686 		r = readw(rwptr_reg);
687 		rwptr_reg += 2;
688 		writew(r, rwptr_reg);
689 		rwptr_reg += 2;
690 
691 		gmac_clean_txq(netdev, port->txq + i, r);
692 	}
693 	writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
694 
695 	kfree(port->txq->skb);
696 	dma_free_coherent(geth->dev,
697 			  n_txq * sizeof(*port->txq->ring) << port->txq_order,
698 			  port->txq->ring, port->txq_dma_base);
699 }
700 
701 static int gmac_setup_rxq(struct net_device *netdev)
702 {
703 	struct gemini_ethernet_port *port = netdev_priv(netdev);
704 	struct gemini_ethernet *geth = port->geth;
705 	struct nontoe_qhdr __iomem *qhdr;
706 
707 	qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
708 	port->rxq_rwptr = &qhdr->word1;
709 
710 	/* Remap a slew of memory to use for the RX queue */
711 	port->rxq_ring = dma_alloc_coherent(geth->dev,
712 				sizeof(*port->rxq_ring) << port->rxq_order,
713 				&port->rxq_dma_base, GFP_KERNEL);
714 	if (!port->rxq_ring)
715 		return -ENOMEM;
716 	if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) {
717 		dev_warn(geth->dev, "RX queue base is not aligned\n");
718 		return -ENOMEM;
719 	}
720 
721 	writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
722 	writel(0, port->rxq_rwptr);
723 	return 0;
724 }
725 
726 static struct gmac_queue_page *
727 gmac_get_queue_page(struct gemini_ethernet *geth,
728 		    struct gemini_ethernet_port *port,
729 		    dma_addr_t addr)
730 {
731 	struct gmac_queue_page *gpage;
732 	dma_addr_t mapping;
733 	int i;
734 
735 	/* Only look for even pages */
736 	mapping = addr & PAGE_MASK;
737 
738 	if (!geth->freeq_pages) {
739 		dev_err(geth->dev, "try to get page with no page list\n");
740 		return NULL;
741 	}
742 
743 	/* Look up a ring buffer page from virtual mapping */
744 	for (i = 0; i < geth->num_freeq_pages; i++) {
745 		gpage = &geth->freeq_pages[i];
746 		if (gpage->mapping == mapping)
747 			return gpage;
748 	}
749 
750 	return NULL;
751 }
752 
753 static void gmac_cleanup_rxq(struct net_device *netdev)
754 {
755 	struct gemini_ethernet_port *port = netdev_priv(netdev);
756 	struct gemini_ethernet *geth = port->geth;
757 	struct gmac_rxdesc *rxd = port->rxq_ring;
758 	static struct gmac_queue_page *gpage;
759 	struct nontoe_qhdr __iomem *qhdr;
760 	void __iomem *dma_reg;
761 	void __iomem *ptr_reg;
762 	dma_addr_t mapping;
763 	union dma_rwptr rw;
764 	unsigned int r, w;
765 
766 	qhdr = geth->base +
767 		TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
768 	dma_reg = &qhdr->word0;
769 	ptr_reg = &qhdr->word1;
770 
771 	rw.bits32 = readl(ptr_reg);
772 	r = rw.bits.rptr;
773 	w = rw.bits.wptr;
774 	writew(r, ptr_reg + 2);
775 
776 	writel(0, dma_reg);
777 
778 	/* Loop from read pointer to write pointer of the RX queue
779 	 * and free up all pages by the queue.
780 	 */
781 	while (r != w) {
782 		mapping = rxd[r].word2.buf_adr;
783 		r++;
784 		r &= ((1 << port->rxq_order) - 1);
785 
786 		if (!mapping)
787 			continue;
788 
789 		/* Freeq pointers are one page off */
790 		gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
791 		if (!gpage) {
792 			dev_err(geth->dev, "could not find page\n");
793 			continue;
794 		}
795 		/* Release the RX queue reference to the page */
796 		put_page(gpage->page);
797 	}
798 
799 	dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
800 			  port->rxq_ring, port->rxq_dma_base);
801 }
802 
803 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth,
804 					      int pn)
805 {
806 	struct gmac_rxdesc *freeq_entry;
807 	struct gmac_queue_page *gpage;
808 	unsigned int fpp_order;
809 	unsigned int frag_len;
810 	dma_addr_t mapping;
811 	struct page *page;
812 	int i;
813 
814 	/* First allocate and DMA map a single page */
815 	page = alloc_page(GFP_ATOMIC);
816 	if (!page)
817 		return NULL;
818 
819 	mapping = dma_map_single(geth->dev, page_address(page),
820 				 PAGE_SIZE, DMA_FROM_DEVICE);
821 	if (dma_mapping_error(geth->dev, mapping)) {
822 		put_page(page);
823 		return NULL;
824 	}
825 
826 	/* The assign the page mapping (physical address) to the buffer address
827 	 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes,
828 	 * 4k), and the default RX frag order is 11 (fragments are up 20 2048
829 	 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus
830 	 * each page normally needs two entries in the queue.
831 	 */
832 	frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */
833 	fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
834 	freeq_entry = geth->freeq_ring + (pn << fpp_order);
835 	dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n",
836 		 pn, frag_len, (1 << fpp_order), freeq_entry);
837 	for (i = (1 << fpp_order); i > 0; i--) {
838 		freeq_entry->word2.buf_adr = mapping;
839 		freeq_entry++;
840 		mapping += frag_len;
841 	}
842 
843 	/* If the freeq entry already has a page mapped, then unmap it. */
844 	gpage = &geth->freeq_pages[pn];
845 	if (gpage->page) {
846 		mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
847 		dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
848 		/* This should be the last reference to the page so it gets
849 		 * released
850 		 */
851 		put_page(gpage->page);
852 	}
853 
854 	/* Then put our new mapping into the page table */
855 	dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n",
856 		pn, (unsigned int)mapping, page);
857 	gpage->mapping = mapping;
858 	gpage->page = page;
859 
860 	return page;
861 }
862 
863 /**
864  * geth_fill_freeq() - Fill the freeq with empty fragments to use
865  * @geth: the ethernet adapter
866  * @refill: whether to reset the queue by filling in all freeq entries or
867  * just refill it, usually the interrupt to refill the queue happens when
868  * the queue is half empty.
869  */
870 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill)
871 {
872 	unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
873 	unsigned int count = 0;
874 	unsigned int pn, epn;
875 	unsigned long flags;
876 	union dma_rwptr rw;
877 	unsigned int m_pn;
878 
879 	/* Mask for page */
880 	m_pn = (1 << (geth->freeq_order - fpp_order)) - 1;
881 
882 	spin_lock_irqsave(&geth->freeq_lock, flags);
883 
884 	rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
885 	pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
886 	epn = (rw.bits.rptr >> fpp_order) - 1;
887 	epn &= m_pn;
888 
889 	/* Loop over the freeq ring buffer entries */
890 	while (pn != epn) {
891 		struct gmac_queue_page *gpage;
892 		struct page *page;
893 
894 		gpage = &geth->freeq_pages[pn];
895 		page = gpage->page;
896 
897 		dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n",
898 			pn, page_ref_count(page), 1 << fpp_order);
899 
900 		if (page_ref_count(page) > 1) {
901 			unsigned int fl = (pn - epn) & m_pn;
902 
903 			if (fl > 64 >> fpp_order)
904 				break;
905 
906 			page = geth_freeq_alloc_map_page(geth, pn);
907 			if (!page)
908 				break;
909 		}
910 
911 		/* Add one reference per fragment in the page */
912 		page_ref_add(page, 1 << fpp_order);
913 		count += 1 << fpp_order;
914 		pn++;
915 		pn &= m_pn;
916 	}
917 
918 	writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
919 
920 	spin_unlock_irqrestore(&geth->freeq_lock, flags);
921 
922 	return count;
923 }
924 
925 static int geth_setup_freeq(struct gemini_ethernet *geth)
926 {
927 	unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
928 	unsigned int frag_len = 1 << geth->freeq_frag_order;
929 	unsigned int len = 1 << geth->freeq_order;
930 	unsigned int pages = len >> fpp_order;
931 	union queue_threshold qt;
932 	union dma_skb_size skbsz;
933 	unsigned int filled;
934 	unsigned int pn;
935 
936 	geth->freeq_ring = dma_alloc_coherent(geth->dev,
937 		sizeof(*geth->freeq_ring) << geth->freeq_order,
938 		&geth->freeq_dma_base, GFP_KERNEL);
939 	if (!geth->freeq_ring)
940 		return -ENOMEM;
941 	if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
942 		dev_warn(geth->dev, "queue ring base is not aligned\n");
943 		goto err_freeq;
944 	}
945 
946 	/* Allocate a mapping to page look-up index */
947 	geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages),
948 				    GFP_KERNEL);
949 	if (!geth->freeq_pages)
950 		goto err_freeq;
951 	geth->num_freeq_pages = pages;
952 
953 	dev_info(geth->dev, "allocate %d pages for queue\n", pages);
954 	for (pn = 0; pn < pages; pn++)
955 		if (!geth_freeq_alloc_map_page(geth, pn))
956 			goto err_freeq_alloc;
957 
958 	filled = geth_fill_freeq(geth, false);
959 	if (!filled)
960 		goto err_freeq_alloc;
961 
962 	qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
963 	qt.bits.swfq_empty = 32;
964 	writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
965 
966 	skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
967 	writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
968 	writel(geth->freeq_dma_base | geth->freeq_order,
969 	       geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
970 
971 	return 0;
972 
973 err_freeq_alloc:
974 	while (pn > 0) {
975 		struct gmac_queue_page *gpage;
976 		dma_addr_t mapping;
977 
978 		--pn;
979 		mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
980 		dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
981 		gpage = &geth->freeq_pages[pn];
982 		put_page(gpage->page);
983 	}
984 
985 	kfree(geth->freeq_pages);
986 err_freeq:
987 	dma_free_coherent(geth->dev,
988 			  sizeof(*geth->freeq_ring) << geth->freeq_order,
989 			  geth->freeq_ring, geth->freeq_dma_base);
990 	geth->freeq_ring = NULL;
991 	return -ENOMEM;
992 }
993 
994 /**
995  * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue
996  * @geth: the Gemini global ethernet state
997  */
998 static void geth_cleanup_freeq(struct gemini_ethernet *geth)
999 {
1000 	unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
1001 	unsigned int frag_len = 1 << geth->freeq_frag_order;
1002 	unsigned int len = 1 << geth->freeq_order;
1003 	unsigned int pages = len >> fpp_order;
1004 	unsigned int pn;
1005 
1006 	writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG),
1007 	       geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
1008 	writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
1009 
1010 	for (pn = 0; pn < pages; pn++) {
1011 		struct gmac_queue_page *gpage;
1012 		dma_addr_t mapping;
1013 
1014 		mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
1015 		dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
1016 
1017 		gpage = &geth->freeq_pages[pn];
1018 		while (page_ref_count(gpage->page) > 0)
1019 			put_page(gpage->page);
1020 	}
1021 
1022 	kfree(geth->freeq_pages);
1023 
1024 	dma_free_coherent(geth->dev,
1025 			  sizeof(*geth->freeq_ring) << geth->freeq_order,
1026 			  geth->freeq_ring, geth->freeq_dma_base);
1027 }
1028 
1029 /**
1030  * geth_resize_freeq() - resize the software queue depth
1031  * @port: the port requesting the change
1032  *
1033  * This gets called at least once during probe() so the device queue gets
1034  * "resized" from the hardware defaults. Since both ports/net devices share
1035  * the same hardware queue, some synchronization between the ports is
1036  * needed.
1037  */
1038 static int geth_resize_freeq(struct gemini_ethernet_port *port)
1039 {
1040 	struct gemini_ethernet *geth = port->geth;
1041 	struct net_device *netdev = port->netdev;
1042 	struct gemini_ethernet_port *other_port;
1043 	struct net_device *other_netdev;
1044 	unsigned int new_size = 0;
1045 	unsigned int new_order;
1046 	unsigned long flags;
1047 	u32 en;
1048 	int ret;
1049 
1050 	if (netdev->dev_id == 0)
1051 		other_netdev = geth->port1->netdev;
1052 	else
1053 		other_netdev = geth->port0->netdev;
1054 
1055 	if (other_netdev && netif_running(other_netdev))
1056 		return -EBUSY;
1057 
1058 	new_size = 1 << (port->rxq_order + 1);
1059 	netdev_dbg(netdev, "port %d size: %d order %d\n",
1060 		   netdev->dev_id,
1061 		   new_size,
1062 		   port->rxq_order);
1063 	if (other_netdev) {
1064 		other_port = netdev_priv(other_netdev);
1065 		new_size += 1 << (other_port->rxq_order + 1);
1066 		netdev_dbg(other_netdev, "port %d size: %d order %d\n",
1067 			   other_netdev->dev_id,
1068 			   (1 << (other_port->rxq_order + 1)),
1069 			   other_port->rxq_order);
1070 	}
1071 
1072 	new_order = min(15, ilog2(new_size - 1) + 1);
1073 	dev_dbg(geth->dev, "set shared queue to size %d order %d\n",
1074 		new_size, new_order);
1075 	if (geth->freeq_order == new_order)
1076 		return 0;
1077 
1078 	spin_lock_irqsave(&geth->irq_lock, flags);
1079 
1080 	/* Disable the software queue IRQs */
1081 	en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1082 	en &= ~SWFQ_EMPTY_INT_BIT;
1083 	writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1084 	spin_unlock_irqrestore(&geth->irq_lock, flags);
1085 
1086 	/* Drop the old queue */
1087 	if (geth->freeq_ring)
1088 		geth_cleanup_freeq(geth);
1089 
1090 	/* Allocate a new queue with the desired order */
1091 	geth->freeq_order = new_order;
1092 	ret = geth_setup_freeq(geth);
1093 
1094 	/* Restart the interrupts - NOTE if this is the first resize
1095 	 * after probe(), this is where the interrupts get turned on
1096 	 * in the first place.
1097 	 */
1098 	spin_lock_irqsave(&geth->irq_lock, flags);
1099 	en |= SWFQ_EMPTY_INT_BIT;
1100 	writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1101 	spin_unlock_irqrestore(&geth->irq_lock, flags);
1102 
1103 	return ret;
1104 }
1105 
1106 static void gmac_tx_irq_enable(struct net_device *netdev,
1107 			       unsigned int txq, int en)
1108 {
1109 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1110 	struct gemini_ethernet *geth = port->geth;
1111 	u32 val, mask;
1112 
1113 	netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id);
1114 
1115 	mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq);
1116 
1117 	if (en)
1118 		writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1119 
1120 	val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1121 	val = en ? val | mask : val & ~mask;
1122 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1123 }
1124 
1125 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num)
1126 {
1127 	struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num);
1128 
1129 	gmac_tx_irq_enable(netdev, txq_num, 0);
1130 	netif_tx_wake_queue(ntxq);
1131 }
1132 
1133 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,
1134 			    struct gmac_txq *txq, unsigned short *desc)
1135 {
1136 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1137 	struct skb_shared_info *skb_si =  skb_shinfo(skb);
1138 	unsigned short m = (1 << port->txq_order) - 1;
1139 	short frag, last_frag = skb_si->nr_frags - 1;
1140 	struct gemini_ethernet *geth = port->geth;
1141 	unsigned int word1, word3, buflen;
1142 	unsigned short w = *desc;
1143 	struct gmac_txdesc *txd;
1144 	skb_frag_t *skb_frag;
1145 	dma_addr_t mapping;
1146 	unsigned short mtu;
1147 	void *buffer;
1148 
1149 	mtu  = ETH_HLEN;
1150 	mtu += netdev->mtu;
1151 	if (skb->protocol == htons(ETH_P_8021Q))
1152 		mtu += VLAN_HLEN;
1153 
1154 	word1 = skb->len;
1155 	word3 = SOF_BIT;
1156 
1157 	if (word1 > mtu) {
1158 		word1 |= TSS_MTU_ENABLE_BIT;
1159 		word3 |= mtu;
1160 	}
1161 
1162 	if (skb->ip_summed != CHECKSUM_NONE) {
1163 		int tcp = 0;
1164 
1165 		if (skb->protocol == htons(ETH_P_IP)) {
1166 			word1 |= TSS_IP_CHKSUM_BIT;
1167 			tcp = ip_hdr(skb)->protocol == IPPROTO_TCP;
1168 		} else { /* IPv6 */
1169 			word1 |= TSS_IPV6_ENABLE_BIT;
1170 			tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP;
1171 		}
1172 
1173 		word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;
1174 	}
1175 
1176 	frag = -1;
1177 	while (frag <= last_frag) {
1178 		if (frag == -1) {
1179 			buffer = skb->data;
1180 			buflen = skb_headlen(skb);
1181 		} else {
1182 			skb_frag = skb_si->frags + frag;
1183 			buffer = skb_frag_address(skb_frag);
1184 			buflen = skb_frag_size(skb_frag);
1185 		}
1186 
1187 		if (frag == last_frag) {
1188 			word3 |= EOF_BIT;
1189 			txq->skb[w] = skb;
1190 		}
1191 
1192 		mapping = dma_map_single(geth->dev, buffer, buflen,
1193 					 DMA_TO_DEVICE);
1194 		if (dma_mapping_error(geth->dev, mapping))
1195 			goto map_error;
1196 
1197 		txd = txq->ring + w;
1198 		txd->word0.bits32 = buflen;
1199 		txd->word1.bits32 = word1;
1200 		txd->word2.buf_adr = mapping;
1201 		txd->word3.bits32 = word3;
1202 
1203 		word3 &= MTU_SIZE_BIT_MASK;
1204 		w++;
1205 		w &= m;
1206 		frag++;
1207 	}
1208 
1209 	*desc = w;
1210 	return 0;
1211 
1212 map_error:
1213 	while (w != *desc) {
1214 		w--;
1215 		w &= m;
1216 
1217 		dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr,
1218 			       txq->ring[w].word0.bits.buffer_size,
1219 			       DMA_TO_DEVICE);
1220 	}
1221 	return -ENOMEM;
1222 }
1223 
1224 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb,
1225 				   struct net_device *netdev)
1226 {
1227 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1228 	unsigned short m = (1 << port->txq_order) - 1;
1229 	struct netdev_queue *ntxq;
1230 	unsigned short r, w, d;
1231 	void __iomem *ptr_reg;
1232 	struct gmac_txq *txq;
1233 	int txq_num, nfrags;
1234 	union dma_rwptr rw;
1235 
1236 	if (skb->len >= 0x10000)
1237 		goto out_drop_free;
1238 
1239 	txq_num = skb_get_queue_mapping(skb);
1240 	ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num);
1241 	txq = &port->txq[txq_num];
1242 	ntxq = netdev_get_tx_queue(netdev, txq_num);
1243 	nfrags = skb_shinfo(skb)->nr_frags;
1244 
1245 	rw.bits32 = readl(ptr_reg);
1246 	r = rw.bits.rptr;
1247 	w = rw.bits.wptr;
1248 
1249 	d = txq->cptr - w - 1;
1250 	d &= m;
1251 
1252 	if (d < nfrags + 2) {
1253 		gmac_clean_txq(netdev, txq, r);
1254 		d = txq->cptr - w - 1;
1255 		d &= m;
1256 
1257 		if (d < nfrags + 2) {
1258 			netif_tx_stop_queue(ntxq);
1259 
1260 			d = txq->cptr + nfrags + 16;
1261 			d &= m;
1262 			txq->ring[d].word3.bits.eofie = 1;
1263 			gmac_tx_irq_enable(netdev, txq_num, 1);
1264 
1265 			u64_stats_update_begin(&port->tx_stats_syncp);
1266 			netdev->stats.tx_fifo_errors++;
1267 			u64_stats_update_end(&port->tx_stats_syncp);
1268 			return NETDEV_TX_BUSY;
1269 		}
1270 	}
1271 
1272 	if (gmac_map_tx_bufs(netdev, skb, txq, &w)) {
1273 		if (skb_linearize(skb))
1274 			goto out_drop;
1275 
1276 		u64_stats_update_begin(&port->tx_stats_syncp);
1277 		port->tx_frags_linearized++;
1278 		u64_stats_update_end(&port->tx_stats_syncp);
1279 
1280 		if (gmac_map_tx_bufs(netdev, skb, txq, &w))
1281 			goto out_drop_free;
1282 	}
1283 
1284 	writew(w, ptr_reg + 2);
1285 
1286 	gmac_clean_txq(netdev, txq, r);
1287 	return NETDEV_TX_OK;
1288 
1289 out_drop_free:
1290 	dev_kfree_skb(skb);
1291 out_drop:
1292 	u64_stats_update_begin(&port->tx_stats_syncp);
1293 	port->stats.tx_dropped++;
1294 	u64_stats_update_end(&port->tx_stats_syncp);
1295 	return NETDEV_TX_OK;
1296 }
1297 
1298 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1299 {
1300 	netdev_err(netdev, "Tx timeout\n");
1301 	gmac_dump_dma_state(netdev);
1302 }
1303 
1304 static void gmac_enable_irq(struct net_device *netdev, int enable)
1305 {
1306 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1307 	struct gemini_ethernet *geth = port->geth;
1308 	unsigned long flags;
1309 	u32 val, mask;
1310 
1311 	netdev_dbg(netdev, "%s device %d %s\n", __func__,
1312 		   netdev->dev_id, enable ? "enable" : "disable");
1313 	spin_lock_irqsave(&geth->irq_lock, flags);
1314 
1315 	mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2);
1316 	val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1317 	val = enable ? (val | mask) : (val & ~mask);
1318 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1319 
1320 	mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1321 	val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1322 	val = enable ? (val | mask) : (val & ~mask);
1323 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1324 
1325 	mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8);
1326 	val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1327 	val = enable ? (val | mask) : (val & ~mask);
1328 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1329 
1330 	spin_unlock_irqrestore(&geth->irq_lock, flags);
1331 }
1332 
1333 static void gmac_enable_rx_irq(struct net_device *netdev, int enable)
1334 {
1335 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1336 	struct gemini_ethernet *geth = port->geth;
1337 	unsigned long flags;
1338 	u32 val, mask;
1339 
1340 	netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id,
1341 		   enable ? "enable" : "disable");
1342 	spin_lock_irqsave(&geth->irq_lock, flags);
1343 	mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1344 
1345 	val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1346 	val = enable ? (val | mask) : (val & ~mask);
1347 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1348 
1349 	spin_unlock_irqrestore(&geth->irq_lock, flags);
1350 }
1351 
1352 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port,
1353 					      union gmac_rxdesc_0 word0,
1354 					      unsigned int frame_len)
1355 {
1356 	unsigned int rx_csum = word0.bits.chksum_status;
1357 	unsigned int rx_status = word0.bits.status;
1358 	struct sk_buff *skb = NULL;
1359 
1360 	port->rx_stats[rx_status]++;
1361 	port->rx_csum_stats[rx_csum]++;
1362 
1363 	if (word0.bits.derr || word0.bits.perr ||
1364 	    rx_status || frame_len < ETH_ZLEN ||
1365 	    rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) {
1366 		port->stats.rx_errors++;
1367 
1368 		if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status))
1369 			port->stats.rx_length_errors++;
1370 		if (RX_ERROR_OVER(rx_status))
1371 			port->stats.rx_over_errors++;
1372 		if (RX_ERROR_CRC(rx_status))
1373 			port->stats.rx_crc_errors++;
1374 		if (RX_ERROR_FRAME(rx_status))
1375 			port->stats.rx_frame_errors++;
1376 		return NULL;
1377 	}
1378 
1379 	skb = napi_get_frags(&port->napi);
1380 	if (!skb)
1381 		goto update_exit;
1382 
1383 	if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK)
1384 		skb->ip_summed = CHECKSUM_UNNECESSARY;
1385 
1386 update_exit:
1387 	port->stats.rx_bytes += frame_len;
1388 	port->stats.rx_packets++;
1389 	return skb;
1390 }
1391 
1392 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget)
1393 {
1394 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1395 	unsigned short m = (1 << port->rxq_order) - 1;
1396 	struct gemini_ethernet *geth = port->geth;
1397 	void __iomem *ptr_reg = port->rxq_rwptr;
1398 	unsigned int frame_len, frag_len;
1399 	struct gmac_rxdesc *rx = NULL;
1400 	struct gmac_queue_page *gpage;
1401 	static struct sk_buff *skb;
1402 	union gmac_rxdesc_0 word0;
1403 	union gmac_rxdesc_1 word1;
1404 	union gmac_rxdesc_3 word3;
1405 	struct page *page = NULL;
1406 	unsigned int page_offs;
1407 	unsigned short r, w;
1408 	union dma_rwptr rw;
1409 	dma_addr_t mapping;
1410 	int frag_nr = 0;
1411 
1412 	rw.bits32 = readl(ptr_reg);
1413 	/* Reset interrupt as all packages until here are taken into account */
1414 	writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
1415 	       geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1416 	r = rw.bits.rptr;
1417 	w = rw.bits.wptr;
1418 
1419 	while (budget && w != r) {
1420 		rx = port->rxq_ring + r;
1421 		word0 = rx->word0;
1422 		word1 = rx->word1;
1423 		mapping = rx->word2.buf_adr;
1424 		word3 = rx->word3;
1425 
1426 		r++;
1427 		r &= m;
1428 
1429 		frag_len = word0.bits.buffer_size;
1430 		frame_len = word1.bits.byte_count;
1431 		page_offs = mapping & ~PAGE_MASK;
1432 
1433 		if (!mapping) {
1434 			netdev_err(netdev,
1435 				   "rxq[%u]: HW BUG: zero DMA desc\n", r);
1436 			goto err_drop;
1437 		}
1438 
1439 		/* Freeq pointers are one page off */
1440 		gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
1441 		if (!gpage) {
1442 			dev_err(geth->dev, "could not find mapping\n");
1443 			continue;
1444 		}
1445 		page = gpage->page;
1446 
1447 		if (word3.bits32 & SOF_BIT) {
1448 			if (skb) {
1449 				napi_free_frags(&port->napi);
1450 				port->stats.rx_dropped++;
1451 			}
1452 
1453 			skb = gmac_skb_if_good_frame(port, word0, frame_len);
1454 			if (!skb)
1455 				goto err_drop;
1456 
1457 			page_offs += NET_IP_ALIGN;
1458 			frag_len -= NET_IP_ALIGN;
1459 			frag_nr = 0;
1460 
1461 		} else if (!skb) {
1462 			put_page(page);
1463 			continue;
1464 		}
1465 
1466 		if (word3.bits32 & EOF_BIT)
1467 			frag_len = frame_len - skb->len;
1468 
1469 		/* append page frag to skb */
1470 		if (frag_nr == MAX_SKB_FRAGS)
1471 			goto err_drop;
1472 
1473 		if (frag_len == 0)
1474 			netdev_err(netdev, "Received fragment with len = 0\n");
1475 
1476 		skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len);
1477 		skb->len += frag_len;
1478 		skb->data_len += frag_len;
1479 		skb->truesize += frag_len;
1480 		frag_nr++;
1481 
1482 		if (word3.bits32 & EOF_BIT) {
1483 			napi_gro_frags(&port->napi);
1484 			skb = NULL;
1485 			--budget;
1486 		}
1487 		continue;
1488 
1489 err_drop:
1490 		if (skb) {
1491 			napi_free_frags(&port->napi);
1492 			skb = NULL;
1493 		}
1494 
1495 		if (mapping)
1496 			put_page(page);
1497 
1498 		port->stats.rx_dropped++;
1499 	}
1500 
1501 	writew(r, ptr_reg);
1502 	return budget;
1503 }
1504 
1505 static int gmac_napi_poll(struct napi_struct *napi, int budget)
1506 {
1507 	struct gemini_ethernet_port *port = netdev_priv(napi->dev);
1508 	struct gemini_ethernet *geth = port->geth;
1509 	unsigned int freeq_threshold;
1510 	unsigned int received;
1511 
1512 	freeq_threshold = 1 << (geth->freeq_order - 1);
1513 	u64_stats_update_begin(&port->rx_stats_syncp);
1514 
1515 	received = gmac_rx(napi->dev, budget);
1516 	if (received < budget) {
1517 		napi_gro_flush(napi, false);
1518 		napi_complete_done(napi, received);
1519 		gmac_enable_rx_irq(napi->dev, 1);
1520 		++port->rx_napi_exits;
1521 	}
1522 
1523 	port->freeq_refill += (budget - received);
1524 	if (port->freeq_refill > freeq_threshold) {
1525 		port->freeq_refill -= freeq_threshold;
1526 		geth_fill_freeq(geth, true);
1527 	}
1528 
1529 	u64_stats_update_end(&port->rx_stats_syncp);
1530 	return received;
1531 }
1532 
1533 static void gmac_dump_dma_state(struct net_device *netdev)
1534 {
1535 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1536 	struct gemini_ethernet *geth = port->geth;
1537 	void __iomem *ptr_reg;
1538 	u32 reg[5];
1539 
1540 	/* Interrupt status */
1541 	reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1542 	reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1543 	reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
1544 	reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
1545 	reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1546 	netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1547 		   reg[0], reg[1], reg[2], reg[3], reg[4]);
1548 
1549 	/* Interrupt enable */
1550 	reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1551 	reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1552 	reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
1553 	reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
1554 	reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1555 	netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1556 		   reg[0], reg[1], reg[2], reg[3], reg[4]);
1557 
1558 	/* RX DMA status */
1559 	reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
1560 	reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
1561 	reg[2] = GET_RPTR(port->rxq_rwptr);
1562 	reg[3] = GET_WPTR(port->rxq_rwptr);
1563 	netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1564 		   reg[0], reg[1], reg[2], reg[3]);
1565 
1566 	reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
1567 	reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
1568 	reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
1569 	reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
1570 	netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1571 		   reg[0], reg[1], reg[2], reg[3]);
1572 
1573 	/* TX DMA status */
1574 	ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
1575 
1576 	reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
1577 	reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
1578 	reg[2] = GET_RPTR(ptr_reg);
1579 	reg[3] = GET_WPTR(ptr_reg);
1580 	netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1581 		   reg[0], reg[1], reg[2], reg[3]);
1582 
1583 	reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
1584 	reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
1585 	reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
1586 	reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
1587 	netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1588 		   reg[0], reg[1], reg[2], reg[3]);
1589 
1590 	/* FREE queues status */
1591 	ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG;
1592 
1593 	reg[0] = GET_RPTR(ptr_reg);
1594 	reg[1] = GET_WPTR(ptr_reg);
1595 
1596 	ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG;
1597 
1598 	reg[2] = GET_RPTR(ptr_reg);
1599 	reg[3] = GET_WPTR(ptr_reg);
1600 	netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n",
1601 		   reg[0], reg[1], reg[2], reg[3]);
1602 }
1603 
1604 static void gmac_update_hw_stats(struct net_device *netdev)
1605 {
1606 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1607 	unsigned int rx_discards, rx_mcast, rx_bcast;
1608 	struct gemini_ethernet *geth = port->geth;
1609 	unsigned long flags;
1610 
1611 	spin_lock_irqsave(&geth->irq_lock, flags);
1612 	u64_stats_update_begin(&port->ir_stats_syncp);
1613 
1614 	rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
1615 	port->hw_stats[0] += rx_discards;
1616 	port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
1617 	rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
1618 	port->hw_stats[2] += rx_mcast;
1619 	rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
1620 	port->hw_stats[3] += rx_bcast;
1621 	port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
1622 	port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
1623 
1624 	port->stats.rx_missed_errors += rx_discards;
1625 	port->stats.multicast += rx_mcast;
1626 	port->stats.multicast += rx_bcast;
1627 
1628 	writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
1629 	       geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1630 
1631 	u64_stats_update_end(&port->ir_stats_syncp);
1632 	spin_unlock_irqrestore(&geth->irq_lock, flags);
1633 }
1634 
1635 /**
1636  * gmac_get_intr_flags() - get interrupt status flags for a port from
1637  * @netdev: the net device for the port to get flags from
1638  * @i: the interrupt status register 0..4
1639  */
1640 static u32 gmac_get_intr_flags(struct net_device *netdev, int i)
1641 {
1642 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1643 	struct gemini_ethernet *geth = port->geth;
1644 	void __iomem *irqif_reg, *irqen_reg;
1645 	unsigned int offs, val;
1646 
1647 	/* Calculate the offset using the stride of the status registers */
1648 	offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG -
1649 		    GLOBAL_INTERRUPT_STATUS_0_REG);
1650 
1651 	irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs;
1652 	irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs;
1653 
1654 	val = readl(irqif_reg) & readl(irqen_reg);
1655 	return val;
1656 }
1657 
1658 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer)
1659 {
1660 	struct gemini_ethernet_port *port =
1661 		container_of(timer, struct gemini_ethernet_port,
1662 			     rx_coalesce_timer);
1663 
1664 	napi_schedule(&port->napi);
1665 	return HRTIMER_NORESTART;
1666 }
1667 
1668 static irqreturn_t gmac_irq(int irq, void *data)
1669 {
1670 	struct gemini_ethernet_port *port;
1671 	struct net_device *netdev = data;
1672 	struct gemini_ethernet *geth;
1673 	u32 val, orr = 0;
1674 
1675 	port = netdev_priv(netdev);
1676 	geth = port->geth;
1677 
1678 	val = gmac_get_intr_flags(netdev, 0);
1679 	orr |= val;
1680 
1681 	if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) {
1682 		/* Oh, crap */
1683 		netdev_err(netdev, "hw failure/sw bug\n");
1684 		gmac_dump_dma_state(netdev);
1685 
1686 		/* don't know how to recover, just reduce losses */
1687 		gmac_enable_irq(netdev, 0);
1688 		return IRQ_HANDLED;
1689 	}
1690 
1691 	if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6)))
1692 		gmac_tx_irq(netdev, 0);
1693 
1694 	val = gmac_get_intr_flags(netdev, 1);
1695 	orr |= val;
1696 
1697 	if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) {
1698 		gmac_enable_rx_irq(netdev, 0);
1699 
1700 		if (!port->rx_coalesce_nsecs) {
1701 			napi_schedule(&port->napi);
1702 		} else {
1703 			ktime_t ktime;
1704 
1705 			ktime = ktime_set(0, port->rx_coalesce_nsecs);
1706 			hrtimer_start(&port->rx_coalesce_timer, ktime,
1707 				      HRTIMER_MODE_REL);
1708 		}
1709 	}
1710 
1711 	val = gmac_get_intr_flags(netdev, 4);
1712 	orr |= val;
1713 
1714 	if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8)))
1715 		gmac_update_hw_stats(netdev);
1716 
1717 	if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) {
1718 		writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
1719 		       geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1720 
1721 		spin_lock(&geth->irq_lock);
1722 		u64_stats_update_begin(&port->ir_stats_syncp);
1723 		++port->stats.rx_fifo_errors;
1724 		u64_stats_update_end(&port->ir_stats_syncp);
1725 		spin_unlock(&geth->irq_lock);
1726 	}
1727 
1728 	return orr ? IRQ_HANDLED : IRQ_NONE;
1729 }
1730 
1731 static void gmac_start_dma(struct gemini_ethernet_port *port)
1732 {
1733 	void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1734 	union gmac_dma_ctrl dma_ctrl;
1735 
1736 	dma_ctrl.bits32 = readl(dma_ctrl_reg);
1737 	dma_ctrl.bits.rd_enable = 1;
1738 	dma_ctrl.bits.td_enable = 1;
1739 	dma_ctrl.bits.loopback = 0;
1740 	dma_ctrl.bits.drop_small_ack = 0;
1741 	dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
1742 	dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
1743 	dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
1744 	dma_ctrl.bits.rd_bus = HSIZE_8;
1745 	dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
1746 	dma_ctrl.bits.td_burst_size = HBURST_INCR8;
1747 	dma_ctrl.bits.td_bus = HSIZE_8;
1748 
1749 	writel(dma_ctrl.bits32, dma_ctrl_reg);
1750 }
1751 
1752 static void gmac_stop_dma(struct gemini_ethernet_port *port)
1753 {
1754 	void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1755 	union gmac_dma_ctrl dma_ctrl;
1756 
1757 	dma_ctrl.bits32 = readl(dma_ctrl_reg);
1758 	dma_ctrl.bits.rd_enable = 0;
1759 	dma_ctrl.bits.td_enable = 0;
1760 	writel(dma_ctrl.bits32, dma_ctrl_reg);
1761 }
1762 
1763 static int gmac_open(struct net_device *netdev)
1764 {
1765 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1766 	int err;
1767 
1768 	err = request_irq(netdev->irq, gmac_irq,
1769 			  IRQF_SHARED, netdev->name, netdev);
1770 	if (err) {
1771 		netdev_err(netdev, "no IRQ\n");
1772 		return err;
1773 	}
1774 
1775 	netif_carrier_off(netdev);
1776 	phy_start(netdev->phydev);
1777 
1778 	err = geth_resize_freeq(port);
1779 	/* It's fine if it's just busy, the other port has set up
1780 	 * the freeq in that case.
1781 	 */
1782 	if (err && (err != -EBUSY)) {
1783 		netdev_err(netdev, "could not resize freeq\n");
1784 		goto err_stop_phy;
1785 	}
1786 
1787 	err = gmac_setup_rxq(netdev);
1788 	if (err) {
1789 		netdev_err(netdev, "could not setup RXQ\n");
1790 		goto err_stop_phy;
1791 	}
1792 
1793 	err = gmac_setup_txqs(netdev);
1794 	if (err) {
1795 		netdev_err(netdev, "could not setup TXQs\n");
1796 		gmac_cleanup_rxq(netdev);
1797 		goto err_stop_phy;
1798 	}
1799 
1800 	napi_enable(&port->napi);
1801 
1802 	gmac_start_dma(port);
1803 	gmac_enable_irq(netdev, 1);
1804 	gmac_enable_tx_rx(netdev);
1805 	netif_tx_start_all_queues(netdev);
1806 
1807 	hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC,
1808 		     HRTIMER_MODE_REL);
1809 	port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired;
1810 
1811 	netdev_dbg(netdev, "opened\n");
1812 
1813 	return 0;
1814 
1815 err_stop_phy:
1816 	phy_stop(netdev->phydev);
1817 	free_irq(netdev->irq, netdev);
1818 	return err;
1819 }
1820 
1821 static int gmac_stop(struct net_device *netdev)
1822 {
1823 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1824 
1825 	hrtimer_cancel(&port->rx_coalesce_timer);
1826 	netif_tx_stop_all_queues(netdev);
1827 	gmac_disable_tx_rx(netdev);
1828 	gmac_stop_dma(port);
1829 	napi_disable(&port->napi);
1830 
1831 	gmac_enable_irq(netdev, 0);
1832 	gmac_cleanup_rxq(netdev);
1833 	gmac_cleanup_txqs(netdev);
1834 
1835 	phy_stop(netdev->phydev);
1836 	free_irq(netdev->irq, netdev);
1837 
1838 	gmac_update_hw_stats(netdev);
1839 	return 0;
1840 }
1841 
1842 static void gmac_set_rx_mode(struct net_device *netdev)
1843 {
1844 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1845 	union gmac_rx_fltr filter = { .bits = {
1846 		.broadcast = 1,
1847 		.multicast = 1,
1848 		.unicast = 1,
1849 	} };
1850 	struct netdev_hw_addr *ha;
1851 	unsigned int bit_nr;
1852 	u32 mc_filter[2];
1853 
1854 	mc_filter[1] = 0;
1855 	mc_filter[0] = 0;
1856 
1857 	if (netdev->flags & IFF_PROMISC) {
1858 		filter.bits.error = 1;
1859 		filter.bits.promiscuous = 1;
1860 		mc_filter[1] = ~0;
1861 		mc_filter[0] = ~0;
1862 	} else if (netdev->flags & IFF_ALLMULTI) {
1863 		mc_filter[1] = ~0;
1864 		mc_filter[0] = ~0;
1865 	} else {
1866 		netdev_for_each_mc_addr(ha, netdev) {
1867 			bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f;
1868 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f);
1869 		}
1870 	}
1871 
1872 	writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
1873 	writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
1874 	writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
1875 }
1876 
1877 static void gmac_write_mac_address(struct net_device *netdev)
1878 {
1879 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1880 	__le32 addr[3];
1881 
1882 	memset(addr, 0, sizeof(addr));
1883 	memcpy(addr, netdev->dev_addr, ETH_ALEN);
1884 
1885 	writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
1886 	writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
1887 	writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
1888 }
1889 
1890 static int gmac_set_mac_address(struct net_device *netdev, void *addr)
1891 {
1892 	struct sockaddr *sa = addr;
1893 
1894 	eth_hw_addr_set(netdev, sa->sa_data);
1895 	gmac_write_mac_address(netdev);
1896 
1897 	return 0;
1898 }
1899 
1900 static void gmac_clear_hw_stats(struct net_device *netdev)
1901 {
1902 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1903 
1904 	readl(port->gmac_base + GMAC_IN_DISCARDS);
1905 	readl(port->gmac_base + GMAC_IN_ERRORS);
1906 	readl(port->gmac_base + GMAC_IN_MCAST);
1907 	readl(port->gmac_base + GMAC_IN_BCAST);
1908 	readl(port->gmac_base + GMAC_IN_MAC1);
1909 	readl(port->gmac_base + GMAC_IN_MAC2);
1910 }
1911 
1912 static void gmac_get_stats64(struct net_device *netdev,
1913 			     struct rtnl_link_stats64 *stats)
1914 {
1915 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1916 	unsigned int start;
1917 
1918 	gmac_update_hw_stats(netdev);
1919 
1920 	/* Racing with RX NAPI */
1921 	do {
1922 		start = u64_stats_fetch_begin(&port->rx_stats_syncp);
1923 
1924 		stats->rx_packets = port->stats.rx_packets;
1925 		stats->rx_bytes = port->stats.rx_bytes;
1926 		stats->rx_errors = port->stats.rx_errors;
1927 		stats->rx_dropped = port->stats.rx_dropped;
1928 
1929 		stats->rx_length_errors = port->stats.rx_length_errors;
1930 		stats->rx_over_errors = port->stats.rx_over_errors;
1931 		stats->rx_crc_errors = port->stats.rx_crc_errors;
1932 		stats->rx_frame_errors = port->stats.rx_frame_errors;
1933 
1934 	} while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
1935 
1936 	/* Racing with MIB and TX completion interrupts */
1937 	do {
1938 		start = u64_stats_fetch_begin(&port->ir_stats_syncp);
1939 
1940 		stats->tx_errors = port->stats.tx_errors;
1941 		stats->tx_packets = port->stats.tx_packets;
1942 		stats->tx_bytes = port->stats.tx_bytes;
1943 
1944 		stats->multicast = port->stats.multicast;
1945 		stats->rx_missed_errors = port->stats.rx_missed_errors;
1946 		stats->rx_fifo_errors = port->stats.rx_fifo_errors;
1947 
1948 	} while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
1949 
1950 	/* Racing with hard_start_xmit */
1951 	do {
1952 		start = u64_stats_fetch_begin(&port->tx_stats_syncp);
1953 
1954 		stats->tx_dropped = port->stats.tx_dropped;
1955 
1956 	} while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
1957 
1958 	stats->rx_dropped += stats->rx_missed_errors;
1959 }
1960 
1961 static int gmac_change_mtu(struct net_device *netdev, int new_mtu)
1962 {
1963 	int max_len = gmac_pick_rx_max_len(new_mtu);
1964 
1965 	if (max_len < 0)
1966 		return -EINVAL;
1967 
1968 	gmac_disable_tx_rx(netdev);
1969 
1970 	netdev->mtu = new_mtu;
1971 	gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT,
1972 				CONFIG0_MAXLEN_MASK);
1973 
1974 	netdev_update_features(netdev);
1975 
1976 	gmac_enable_tx_rx(netdev);
1977 
1978 	return 0;
1979 }
1980 
1981 static netdev_features_t gmac_fix_features(struct net_device *netdev,
1982 					   netdev_features_t features)
1983 {
1984 	if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK)
1985 		features &= ~GMAC_OFFLOAD_FEATURES;
1986 
1987 	return features;
1988 }
1989 
1990 static int gmac_set_features(struct net_device *netdev,
1991 			     netdev_features_t features)
1992 {
1993 	struct gemini_ethernet_port *port = netdev_priv(netdev);
1994 	int enable = features & NETIF_F_RXCSUM;
1995 	unsigned long flags;
1996 	u32 reg;
1997 
1998 	spin_lock_irqsave(&port->config_lock, flags);
1999 
2000 	reg = readl(port->gmac_base + GMAC_CONFIG0);
2001 	reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM;
2002 	writel(reg, port->gmac_base + GMAC_CONFIG0);
2003 
2004 	spin_unlock_irqrestore(&port->config_lock, flags);
2005 	return 0;
2006 }
2007 
2008 static int gmac_get_sset_count(struct net_device *netdev, int sset)
2009 {
2010 	return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0;
2011 }
2012 
2013 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2014 {
2015 	if (stringset != ETH_SS_STATS)
2016 		return;
2017 
2018 	memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings));
2019 }
2020 
2021 static void gmac_get_ethtool_stats(struct net_device *netdev,
2022 				   struct ethtool_stats *estats, u64 *values)
2023 {
2024 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2025 	unsigned int start;
2026 	u64 *p;
2027 	int i;
2028 
2029 	gmac_update_hw_stats(netdev);
2030 
2031 	/* Racing with MIB interrupt */
2032 	do {
2033 		p = values;
2034 		start = u64_stats_fetch_begin(&port->ir_stats_syncp);
2035 
2036 		for (i = 0; i < RX_STATS_NUM; i++)
2037 			*p++ = port->hw_stats[i];
2038 
2039 	} while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
2040 	values = p;
2041 
2042 	/* Racing with RX NAPI */
2043 	do {
2044 		p = values;
2045 		start = u64_stats_fetch_begin(&port->rx_stats_syncp);
2046 
2047 		for (i = 0; i < RX_STATUS_NUM; i++)
2048 			*p++ = port->rx_stats[i];
2049 		for (i = 0; i < RX_CHKSUM_NUM; i++)
2050 			*p++ = port->rx_csum_stats[i];
2051 		*p++ = port->rx_napi_exits;
2052 
2053 	} while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
2054 	values = p;
2055 
2056 	/* Racing with TX start_xmit */
2057 	do {
2058 		p = values;
2059 		start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2060 
2061 		for (i = 0; i < TX_MAX_FRAGS; i++) {
2062 			*values++ = port->tx_frag_stats[i];
2063 			port->tx_frag_stats[i] = 0;
2064 		}
2065 		*values++ = port->tx_frags_linearized;
2066 		*values++ = port->tx_hw_csummed;
2067 
2068 	} while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2069 }
2070 
2071 static int gmac_get_ksettings(struct net_device *netdev,
2072 			      struct ethtool_link_ksettings *cmd)
2073 {
2074 	if (!netdev->phydev)
2075 		return -ENXIO;
2076 	phy_ethtool_ksettings_get(netdev->phydev, cmd);
2077 
2078 	return 0;
2079 }
2080 
2081 static int gmac_set_ksettings(struct net_device *netdev,
2082 			      const struct ethtool_link_ksettings *cmd)
2083 {
2084 	if (!netdev->phydev)
2085 		return -ENXIO;
2086 	return phy_ethtool_ksettings_set(netdev->phydev, cmd);
2087 }
2088 
2089 static int gmac_nway_reset(struct net_device *netdev)
2090 {
2091 	if (!netdev->phydev)
2092 		return -ENXIO;
2093 	return phy_start_aneg(netdev->phydev);
2094 }
2095 
2096 static void gmac_get_pauseparam(struct net_device *netdev,
2097 				struct ethtool_pauseparam *pparam)
2098 {
2099 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2100 	union gmac_config0 config0;
2101 
2102 	config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2103 
2104 	pparam->rx_pause = config0.bits.rx_fc_en;
2105 	pparam->tx_pause = config0.bits.tx_fc_en;
2106 	pparam->autoneg = true;
2107 }
2108 
2109 static void gmac_get_ringparam(struct net_device *netdev,
2110 			       struct ethtool_ringparam *rp,
2111 			       struct kernel_ethtool_ringparam *kernel_rp,
2112 			       struct netlink_ext_ack *extack)
2113 {
2114 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2115 
2116 	readl(port->gmac_base + GMAC_CONFIG0);
2117 
2118 	rp->rx_max_pending = 1 << 15;
2119 	rp->rx_mini_max_pending = 0;
2120 	rp->rx_jumbo_max_pending = 0;
2121 	rp->tx_max_pending = 1 << 15;
2122 
2123 	rp->rx_pending = 1 << port->rxq_order;
2124 	rp->rx_mini_pending = 0;
2125 	rp->rx_jumbo_pending = 0;
2126 	rp->tx_pending = 1 << port->txq_order;
2127 }
2128 
2129 static int gmac_set_ringparam(struct net_device *netdev,
2130 			      struct ethtool_ringparam *rp,
2131 			      struct kernel_ethtool_ringparam *kernel_rp,
2132 			      struct netlink_ext_ack *extack)
2133 {
2134 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2135 	int err = 0;
2136 
2137 	if (netif_running(netdev))
2138 		return -EBUSY;
2139 
2140 	if (rp->rx_pending) {
2141 		port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1);
2142 		err = geth_resize_freeq(port);
2143 	}
2144 	if (rp->tx_pending) {
2145 		port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1);
2146 		port->irq_every_tx_packets = 1 << (port->txq_order - 2);
2147 	}
2148 
2149 	return err;
2150 }
2151 
2152 static int gmac_get_coalesce(struct net_device *netdev,
2153 			     struct ethtool_coalesce *ecmd,
2154 			     struct kernel_ethtool_coalesce *kernel_coal,
2155 			     struct netlink_ext_ack *extack)
2156 {
2157 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2158 
2159 	ecmd->rx_max_coalesced_frames = 1;
2160 	ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets;
2161 	ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000;
2162 
2163 	return 0;
2164 }
2165 
2166 static int gmac_set_coalesce(struct net_device *netdev,
2167 			     struct ethtool_coalesce *ecmd,
2168 			     struct kernel_ethtool_coalesce *kernel_coal,
2169 			     struct netlink_ext_ack *extack)
2170 {
2171 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2172 
2173 	if (ecmd->tx_max_coalesced_frames < 1)
2174 		return -EINVAL;
2175 	if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order)
2176 		return -EINVAL;
2177 
2178 	port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames;
2179 	port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000;
2180 
2181 	return 0;
2182 }
2183 
2184 static u32 gmac_get_msglevel(struct net_device *netdev)
2185 {
2186 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2187 
2188 	return port->msg_enable;
2189 }
2190 
2191 static void gmac_set_msglevel(struct net_device *netdev, u32 level)
2192 {
2193 	struct gemini_ethernet_port *port = netdev_priv(netdev);
2194 
2195 	port->msg_enable = level;
2196 }
2197 
2198 static void gmac_get_drvinfo(struct net_device *netdev,
2199 			     struct ethtool_drvinfo *info)
2200 {
2201 	strcpy(info->driver,  DRV_NAME);
2202 	strcpy(info->bus_info, netdev->dev_id ? "1" : "0");
2203 }
2204 
2205 static const struct net_device_ops gmac_351x_ops = {
2206 	.ndo_init		= gmac_init,
2207 	.ndo_open		= gmac_open,
2208 	.ndo_stop		= gmac_stop,
2209 	.ndo_start_xmit		= gmac_start_xmit,
2210 	.ndo_tx_timeout		= gmac_tx_timeout,
2211 	.ndo_set_rx_mode	= gmac_set_rx_mode,
2212 	.ndo_set_mac_address	= gmac_set_mac_address,
2213 	.ndo_get_stats64	= gmac_get_stats64,
2214 	.ndo_change_mtu		= gmac_change_mtu,
2215 	.ndo_fix_features	= gmac_fix_features,
2216 	.ndo_set_features	= gmac_set_features,
2217 };
2218 
2219 static const struct ethtool_ops gmac_351x_ethtool_ops = {
2220 	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
2221 				     ETHTOOL_COALESCE_MAX_FRAMES,
2222 	.get_sset_count	= gmac_get_sset_count,
2223 	.get_strings	= gmac_get_strings,
2224 	.get_ethtool_stats = gmac_get_ethtool_stats,
2225 	.get_link	= ethtool_op_get_link,
2226 	.get_link_ksettings = gmac_get_ksettings,
2227 	.set_link_ksettings = gmac_set_ksettings,
2228 	.nway_reset	= gmac_nway_reset,
2229 	.get_pauseparam	= gmac_get_pauseparam,
2230 	.get_ringparam	= gmac_get_ringparam,
2231 	.set_ringparam	= gmac_set_ringparam,
2232 	.get_coalesce	= gmac_get_coalesce,
2233 	.set_coalesce	= gmac_set_coalesce,
2234 	.get_msglevel	= gmac_get_msglevel,
2235 	.set_msglevel	= gmac_set_msglevel,
2236 	.get_drvinfo	= gmac_get_drvinfo,
2237 };
2238 
2239 static irqreturn_t gemini_port_irq_thread(int irq, void *data)
2240 {
2241 	unsigned long irqmask = SWFQ_EMPTY_INT_BIT;
2242 	struct gemini_ethernet_port *port = data;
2243 	struct gemini_ethernet *geth;
2244 	unsigned long flags;
2245 
2246 	geth = port->geth;
2247 	/* The queue is half empty so refill it */
2248 	geth_fill_freeq(geth, true);
2249 
2250 	spin_lock_irqsave(&geth->irq_lock, flags);
2251 	/* ACK queue interrupt */
2252 	writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2253 	/* Enable queue interrupt again */
2254 	irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2255 	writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2256 	spin_unlock_irqrestore(&geth->irq_lock, flags);
2257 
2258 	return IRQ_HANDLED;
2259 }
2260 
2261 static irqreturn_t gemini_port_irq(int irq, void *data)
2262 {
2263 	struct gemini_ethernet_port *port = data;
2264 	struct gemini_ethernet *geth;
2265 	irqreturn_t ret = IRQ_NONE;
2266 	u32 val, en;
2267 
2268 	geth = port->geth;
2269 	spin_lock(&geth->irq_lock);
2270 
2271 	val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2272 	en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2273 
2274 	if (val & en & SWFQ_EMPTY_INT_BIT) {
2275 		/* Disable the queue empty interrupt while we work on
2276 		 * processing the queue. Also disable overrun interrupts
2277 		 * as there is not much we can do about it here.
2278 		 */
2279 		en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT
2280 					   | GMAC1_RX_OVERRUN_INT_BIT);
2281 		writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2282 		ret = IRQ_WAKE_THREAD;
2283 	}
2284 
2285 	spin_unlock(&geth->irq_lock);
2286 
2287 	return ret;
2288 }
2289 
2290 static void gemini_port_remove(struct gemini_ethernet_port *port)
2291 {
2292 	if (port->netdev) {
2293 		phy_disconnect(port->netdev->phydev);
2294 		unregister_netdev(port->netdev);
2295 	}
2296 	clk_disable_unprepare(port->pclk);
2297 	geth_cleanup_freeq(port->geth);
2298 }
2299 
2300 static void gemini_ethernet_init(struct gemini_ethernet *geth)
2301 {
2302 	/* Only do this once both ports are online */
2303 	if (geth->initialized)
2304 		return;
2305 	if (geth->port0 && geth->port1)
2306 		geth->initialized = true;
2307 	else
2308 		return;
2309 
2310 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
2311 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
2312 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
2313 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
2314 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2315 
2316 	/* Interrupt config:
2317 	 *
2318 	 *	GMAC0 intr bits ------> int0 ----> eth0
2319 	 *	GMAC1 intr bits ------> int1 ----> eth1
2320 	 *	TOE intr -------------> int1 ----> eth1
2321 	 *	Classification Intr --> int0 ----> eth0
2322 	 *	Default Q0 -----------> int0 ----> eth0
2323 	 *	Default Q1 -----------> int1 ----> eth1
2324 	 *	FreeQ intr -----------> int1 ----> eth1
2325 	 */
2326 	writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
2327 	writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
2328 	writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
2329 	writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
2330 	writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
2331 
2332 	/* edge-triggered interrupts packed to level-triggered one... */
2333 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
2334 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
2335 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
2336 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
2337 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2338 
2339 	/* Set up queue */
2340 	writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
2341 	writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
2342 	writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
2343 	writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
2344 
2345 	geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER;
2346 	/* This makes the queue resize on probe() so that we
2347 	 * set up and enable the queue IRQ. FIXME: fragile.
2348 	 */
2349 	geth->freeq_order = 1;
2350 }
2351 
2352 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port)
2353 {
2354 	port->mac_addr[0] =
2355 		cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
2356 	port->mac_addr[1] =
2357 		cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
2358 	port->mac_addr[2] =
2359 		cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
2360 }
2361 
2362 static int gemini_ethernet_port_probe(struct platform_device *pdev)
2363 {
2364 	char *port_names[2] = { "ethernet0", "ethernet1" };
2365 	struct device_node *np = pdev->dev.of_node;
2366 	struct gemini_ethernet_port *port;
2367 	struct device *dev = &pdev->dev;
2368 	struct gemini_ethernet *geth;
2369 	struct net_device *netdev;
2370 	struct device *parent;
2371 	u8 mac[ETH_ALEN];
2372 	unsigned int id;
2373 	int irq;
2374 	int ret;
2375 
2376 	parent = dev->parent;
2377 	geth = dev_get_drvdata(parent);
2378 
2379 	if (!strcmp(dev_name(dev), "60008000.ethernet-port"))
2380 		id = 0;
2381 	else if (!strcmp(dev_name(dev), "6000c000.ethernet-port"))
2382 		id = 1;
2383 	else
2384 		return -ENODEV;
2385 
2386 	dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
2387 
2388 	netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
2389 	if (!netdev) {
2390 		dev_err(dev, "Can't allocate ethernet device #%d\n", id);
2391 		return -ENOMEM;
2392 	}
2393 
2394 	port = netdev_priv(netdev);
2395 	SET_NETDEV_DEV(netdev, dev);
2396 	port->netdev = netdev;
2397 	port->id = id;
2398 	port->geth = geth;
2399 	port->dev = dev;
2400 	port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2401 
2402 	/* DMA memory */
2403 	port->dma_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2404 	if (IS_ERR(port->dma_base)) {
2405 		dev_err(dev, "get DMA address failed\n");
2406 		return PTR_ERR(port->dma_base);
2407 	}
2408 
2409 	/* GMAC config memory */
2410 	port->gmac_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
2411 	if (IS_ERR(port->gmac_base)) {
2412 		dev_err(dev, "get GMAC address failed\n");
2413 		return PTR_ERR(port->gmac_base);
2414 	}
2415 
2416 	/* Interrupt */
2417 	irq = platform_get_irq(pdev, 0);
2418 	if (irq < 0)
2419 		return irq;
2420 	port->irq = irq;
2421 
2422 	/* Clock the port */
2423 	port->pclk = devm_clk_get(dev, "PCLK");
2424 	if (IS_ERR(port->pclk)) {
2425 		dev_err(dev, "no PCLK\n");
2426 		return PTR_ERR(port->pclk);
2427 	}
2428 	ret = clk_prepare_enable(port->pclk);
2429 	if (ret)
2430 		return ret;
2431 
2432 	/* Maybe there is a nice ethernet address we should use */
2433 	gemini_port_save_mac_addr(port);
2434 
2435 	/* Reset the port */
2436 	port->reset = devm_reset_control_get_exclusive(dev, NULL);
2437 	if (IS_ERR(port->reset)) {
2438 		dev_err(dev, "no reset\n");
2439 		ret = PTR_ERR(port->reset);
2440 		goto unprepare;
2441 	}
2442 	reset_control_reset(port->reset);
2443 	usleep_range(100, 500);
2444 
2445 	/* Assign pointer in the main state container */
2446 	if (!id)
2447 		geth->port0 = port;
2448 	else
2449 		geth->port1 = port;
2450 
2451 	/* This will just be done once both ports are up and reset */
2452 	gemini_ethernet_init(geth);
2453 
2454 	platform_set_drvdata(pdev, port);
2455 
2456 	/* Set up and register the netdev */
2457 	netdev->dev_id = port->id;
2458 	netdev->irq = irq;
2459 	netdev->netdev_ops = &gmac_351x_ops;
2460 	netdev->ethtool_ops = &gmac_351x_ethtool_ops;
2461 
2462 	spin_lock_init(&port->config_lock);
2463 	gmac_clear_hw_stats(netdev);
2464 
2465 	netdev->hw_features = GMAC_OFFLOAD_FEATURES;
2466 	netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2467 	/* We can handle jumbo frames up to 10236 bytes so, let's accept
2468 	 * payloads of 10236 bytes minus VLAN and ethernet header
2469 	 */
2470 	netdev->min_mtu = ETH_MIN_MTU;
2471 	netdev->max_mtu = 10236 - VLAN_ETH_HLEN;
2472 
2473 	port->freeq_refill = 0;
2474 	netif_napi_add(netdev, &port->napi, gmac_napi_poll);
2475 
2476 	ret = of_get_mac_address(np, mac);
2477 	if (!ret) {
2478 		dev_info(dev, "Setting macaddr from DT %pM\n", mac);
2479 		memcpy(port->mac_addr, mac, ETH_ALEN);
2480 	}
2481 
2482 	if (is_valid_ether_addr((void *)port->mac_addr)) {
2483 		eth_hw_addr_set(netdev, (u8 *)port->mac_addr);
2484 	} else {
2485 		dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n",
2486 			port->mac_addr[0], port->mac_addr[1],
2487 			port->mac_addr[2]);
2488 		dev_info(dev, "using a random ethernet address\n");
2489 		eth_hw_addr_random(netdev);
2490 	}
2491 	gmac_write_mac_address(netdev);
2492 
2493 	ret = devm_request_threaded_irq(port->dev,
2494 					port->irq,
2495 					gemini_port_irq,
2496 					gemini_port_irq_thread,
2497 					IRQF_SHARED,
2498 					port_names[port->id],
2499 					port);
2500 	if (ret)
2501 		goto unprepare;
2502 
2503 	ret = gmac_setup_phy(netdev);
2504 	if (ret) {
2505 		netdev_err(netdev,
2506 			   "PHY init failed\n");
2507 		goto unprepare;
2508 	}
2509 
2510 	ret = register_netdev(netdev);
2511 	if (ret)
2512 		goto unprepare;
2513 
2514 	return 0;
2515 
2516 unprepare:
2517 	clk_disable_unprepare(port->pclk);
2518 	return ret;
2519 }
2520 
2521 static int gemini_ethernet_port_remove(struct platform_device *pdev)
2522 {
2523 	struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
2524 
2525 	gemini_port_remove(port);
2526 
2527 	return 0;
2528 }
2529 
2530 static const struct of_device_id gemini_ethernet_port_of_match[] = {
2531 	{
2532 		.compatible = "cortina,gemini-ethernet-port",
2533 	},
2534 	{},
2535 };
2536 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match);
2537 
2538 static struct platform_driver gemini_ethernet_port_driver = {
2539 	.driver = {
2540 		.name = "gemini-ethernet-port",
2541 		.of_match_table = gemini_ethernet_port_of_match,
2542 	},
2543 	.probe = gemini_ethernet_port_probe,
2544 	.remove = gemini_ethernet_port_remove,
2545 };
2546 
2547 static int gemini_ethernet_probe(struct platform_device *pdev)
2548 {
2549 	struct device *dev = &pdev->dev;
2550 	struct gemini_ethernet *geth;
2551 	unsigned int retry = 5;
2552 	u32 val;
2553 
2554 	/* Global registers */
2555 	geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL);
2556 	if (!geth)
2557 		return -ENOMEM;
2558 	geth->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2559 	if (IS_ERR(geth->base))
2560 		return PTR_ERR(geth->base);
2561 	geth->dev = dev;
2562 
2563 	/* Wait for ports to stabilize */
2564 	do {
2565 		udelay(2);
2566 		val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
2567 		barrier();
2568 	} while (!val && --retry);
2569 	if (!retry) {
2570 		dev_err(dev, "failed to reset ethernet\n");
2571 		return -EIO;
2572 	}
2573 	dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n",
2574 		 (val >> 4) & 0xFFFU, val & 0xFU);
2575 
2576 	spin_lock_init(&geth->irq_lock);
2577 	spin_lock_init(&geth->freeq_lock);
2578 
2579 	/* The children will use this */
2580 	platform_set_drvdata(pdev, geth);
2581 
2582 	/* Spawn child devices for the two ports */
2583 	return devm_of_platform_populate(dev);
2584 }
2585 
2586 static int gemini_ethernet_remove(struct platform_device *pdev)
2587 {
2588 	struct gemini_ethernet *geth = platform_get_drvdata(pdev);
2589 
2590 	geth_cleanup_freeq(geth);
2591 	geth->initialized = false;
2592 
2593 	return 0;
2594 }
2595 
2596 static const struct of_device_id gemini_ethernet_of_match[] = {
2597 	{
2598 		.compatible = "cortina,gemini-ethernet",
2599 	},
2600 	{},
2601 };
2602 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match);
2603 
2604 static struct platform_driver gemini_ethernet_driver = {
2605 	.driver = {
2606 		.name = DRV_NAME,
2607 		.of_match_table = gemini_ethernet_of_match,
2608 	},
2609 	.probe = gemini_ethernet_probe,
2610 	.remove = gemini_ethernet_remove,
2611 };
2612 
2613 static int __init gemini_ethernet_module_init(void)
2614 {
2615 	int ret;
2616 
2617 	ret = platform_driver_register(&gemini_ethernet_port_driver);
2618 	if (ret)
2619 		return ret;
2620 
2621 	ret = platform_driver_register(&gemini_ethernet_driver);
2622 	if (ret) {
2623 		platform_driver_unregister(&gemini_ethernet_port_driver);
2624 		return ret;
2625 	}
2626 
2627 	return 0;
2628 }
2629 module_init(gemini_ethernet_module_init);
2630 
2631 static void __exit gemini_ethernet_module_exit(void)
2632 {
2633 	platform_driver_unregister(&gemini_ethernet_driver);
2634 	platform_driver_unregister(&gemini_ethernet_port_driver);
2635 }
2636 module_exit(gemini_ethernet_module_exit);
2637 
2638 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
2639 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver");
2640 MODULE_LICENSE("GPL");
2641 MODULE_ALIAS("platform:" DRV_NAME);
2642